exynos5250.dtsi 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778
  1. /*
  2. * SAMSUNG EXYNOS5250 SoC device tree source
  3. *
  4. * Copyright (c) 2012 Samsung Electronics Co., Ltd.
  5. * http://www.samsung.com
  6. *
  7. * SAMSUNG EXYNOS5250 SoC device nodes are listed in this file.
  8. * EXYNOS5250 based board files can include this file and provide
  9. * values for board specfic bindings.
  10. *
  11. * Note: This file does not include device nodes for all the controllers in
  12. * EXYNOS5250 SoC. As device tree coverage for EXYNOS5250 increases,
  13. * additional nodes can be added to this file.
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License version 2 as
  17. * published by the Free Software Foundation.
  18. */
  19. /include/ "skeleton.dtsi"
  20. / {
  21. compatible = "samsung,exynos5250";
  22. interrupt-parent = <&gic>;
  23. aliases {
  24. spi0 = &spi_0;
  25. spi1 = &spi_1;
  26. spi2 = &spi_2;
  27. gsc0 = &gsc_0;
  28. gsc1 = &gsc_1;
  29. gsc2 = &gsc_2;
  30. gsc3 = &gsc_3;
  31. mshc0 = &dwmmc_0;
  32. mshc1 = &dwmmc_1;
  33. mshc2 = &dwmmc_2;
  34. mshc3 = &dwmmc_3;
  35. i2c0 = &i2c_0;
  36. i2c1 = &i2c_1;
  37. i2c2 = &i2c_2;
  38. i2c3 = &i2c_3;
  39. i2c4 = &i2c_4;
  40. i2c5 = &i2c_5;
  41. i2c6 = &i2c_6;
  42. i2c7 = &i2c_7;
  43. i2c8 = &i2c_8;
  44. };
  45. pd_gsc: gsc-power-domain@0x10044000 {
  46. compatible = "samsung,exynos4210-pd";
  47. reg = <0x10044000 0x20>;
  48. };
  49. pd_mfc: mfc-power-domain@0x10044040 {
  50. compatible = "samsung,exynos4210-pd";
  51. reg = <0x10044040 0x20>;
  52. };
  53. clock: clock-controller@0x10010000 {
  54. compatible = "samsung,exynos5250-clock";
  55. reg = <0x10010000 0x30000>;
  56. #clock-cells = <1>;
  57. };
  58. gic:interrupt-controller@10481000 {
  59. compatible = "arm,cortex-a9-gic";
  60. #interrupt-cells = <3>;
  61. interrupt-controller;
  62. reg = <0x10481000 0x1000>, <0x10482000 0x2000>;
  63. };
  64. combiner:interrupt-controller@10440000 {
  65. compatible = "samsung,exynos4210-combiner";
  66. #interrupt-cells = <2>;
  67. interrupt-controller;
  68. samsung,combiner-nr = <32>;
  69. reg = <0x10440000 0x1000>;
  70. interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
  71. <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
  72. <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
  73. <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
  74. <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
  75. <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
  76. <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
  77. <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
  78. };
  79. mct@101C0000 {
  80. compatible = "samsung,exynos4210-mct";
  81. reg = <0x101C0000 0x800>;
  82. interrupt-controller;
  83. #interrups-cells = <2>;
  84. interrupt-parent = <&mct_map>;
  85. interrupts = <0 0>, <1 0>, <2 0>, <3 0>,
  86. <4 0>, <5 0>;
  87. clocks = <&clock 1>, <&clock 335>;
  88. clock-names = "fin_pll", "mct";
  89. mct_map: mct-map {
  90. #interrupt-cells = <2>;
  91. #address-cells = <0>;
  92. #size-cells = <0>;
  93. interrupt-map = <0x0 0 &combiner 23 3>,
  94. <0x1 0 &combiner 23 4>,
  95. <0x2 0 &combiner 25 2>,
  96. <0x3 0 &combiner 25 3>,
  97. <0x4 0 &gic 0 120 0>,
  98. <0x5 0 &gic 0 121 0>;
  99. };
  100. };
  101. pmu {
  102. compatible = "arm,cortex-a15-pmu";
  103. interrupt-parent = <&combiner>;
  104. interrupts = <1 2>, <22 4>;
  105. };
  106. watchdog {
  107. compatible = "samsung,s3c2410-wdt";
  108. reg = <0x101D0000 0x100>;
  109. interrupts = <0 42 0>;
  110. clocks = <&clock 336>;
  111. clock-names = "watchdog";
  112. };
  113. codec@11000000 {
  114. compatible = "samsung,mfc-v6";
  115. reg = <0x11000000 0x10000>;
  116. interrupts = <0 96 0>;
  117. samsung,power-domain = <&pd_mfc>;
  118. };
  119. rtc {
  120. compatible = "samsung,s3c6410-rtc";
  121. reg = <0x101E0000 0x100>;
  122. interrupts = <0 43 0>, <0 44 0>;
  123. clocks = <&clock 337>;
  124. clock-names = "rtc";
  125. };
  126. tmu@10060000 {
  127. compatible = "samsung,exynos5250-tmu";
  128. reg = <0x10060000 0x100>;
  129. interrupts = <0 65 0>;
  130. clocks = <&clock 338>;
  131. clock-names = "tmu_apbif";
  132. };
  133. serial@12C00000 {
  134. compatible = "samsung,exynos4210-uart";
  135. reg = <0x12C00000 0x100>;
  136. interrupts = <0 51 0>;
  137. clocks = <&clock 289>, <&clock 146>;
  138. clock-names = "uart", "clk_uart_baud0";
  139. };
  140. serial@12C10000 {
  141. compatible = "samsung,exynos4210-uart";
  142. reg = <0x12C10000 0x100>;
  143. interrupts = <0 52 0>;
  144. clocks = <&clock 290>, <&clock 147>;
  145. clock-names = "uart", "clk_uart_baud0";
  146. };
  147. serial@12C20000 {
  148. compatible = "samsung,exynos4210-uart";
  149. reg = <0x12C20000 0x100>;
  150. interrupts = <0 53 0>;
  151. clocks = <&clock 291>, <&clock 148>;
  152. clock-names = "uart", "clk_uart_baud0";
  153. };
  154. serial@12C30000 {
  155. compatible = "samsung,exynos4210-uart";
  156. reg = <0x12C30000 0x100>;
  157. interrupts = <0 54 0>;
  158. clocks = <&clock 292>, <&clock 149>;
  159. clock-names = "uart", "clk_uart_baud0";
  160. };
  161. sata@122F0000 {
  162. compatible = "samsung,exynos5-sata-ahci";
  163. reg = <0x122F0000 0x1ff>;
  164. interrupts = <0 115 0>;
  165. clocks = <&clock 277>, <&clock 143>;
  166. clock-names = "sata", "sclk_sata";
  167. };
  168. sata-phy@12170000 {
  169. compatible = "samsung,exynos5-sata-phy";
  170. reg = <0x12170000 0x1ff>;
  171. };
  172. i2c_0: i2c@12C60000 {
  173. compatible = "samsung,s3c2440-i2c";
  174. reg = <0x12C60000 0x100>;
  175. interrupts = <0 56 0>;
  176. #address-cells = <1>;
  177. #size-cells = <0>;
  178. clocks = <&clock 294>;
  179. clock-names = "i2c";
  180. };
  181. i2c_1: i2c@12C70000 {
  182. compatible = "samsung,s3c2440-i2c";
  183. reg = <0x12C70000 0x100>;
  184. interrupts = <0 57 0>;
  185. #address-cells = <1>;
  186. #size-cells = <0>;
  187. clocks = <&clock 295>;
  188. clock-names = "i2c";
  189. };
  190. i2c_2: i2c@12C80000 {
  191. compatible = "samsung,s3c2440-i2c";
  192. reg = <0x12C80000 0x100>;
  193. interrupts = <0 58 0>;
  194. #address-cells = <1>;
  195. #size-cells = <0>;
  196. clocks = <&clock 296>;
  197. clock-names = "i2c";
  198. };
  199. i2c_3: i2c@12C90000 {
  200. compatible = "samsung,s3c2440-i2c";
  201. reg = <0x12C90000 0x100>;
  202. interrupts = <0 59 0>;
  203. #address-cells = <1>;
  204. #size-cells = <0>;
  205. clocks = <&clock 297>;
  206. clock-names = "i2c";
  207. };
  208. i2c_4: i2c@12CA0000 {
  209. compatible = "samsung,s3c2440-i2c";
  210. reg = <0x12CA0000 0x100>;
  211. interrupts = <0 60 0>;
  212. #address-cells = <1>;
  213. #size-cells = <0>;
  214. clocks = <&clock 298>;
  215. clock-names = "i2c";
  216. };
  217. i2c_5: i2c@12CB0000 {
  218. compatible = "samsung,s3c2440-i2c";
  219. reg = <0x12CB0000 0x100>;
  220. interrupts = <0 61 0>;
  221. #address-cells = <1>;
  222. #size-cells = <0>;
  223. clocks = <&clock 299>;
  224. clock-names = "i2c";
  225. };
  226. i2c_6: i2c@12CC0000 {
  227. compatible = "samsung,s3c2440-i2c";
  228. reg = <0x12CC0000 0x100>;
  229. interrupts = <0 62 0>;
  230. #address-cells = <1>;
  231. #size-cells = <0>;
  232. clocks = <&clock 300>;
  233. clock-names = "i2c";
  234. };
  235. i2c_7: i2c@12CD0000 {
  236. compatible = "samsung,s3c2440-i2c";
  237. reg = <0x12CD0000 0x100>;
  238. interrupts = <0 63 0>;
  239. #address-cells = <1>;
  240. #size-cells = <0>;
  241. clocks = <&clock 301>;
  242. clock-names = "i2c";
  243. };
  244. i2c_8: i2c@12CE0000 {
  245. compatible = "samsung,s3c2440-hdmiphy-i2c";
  246. reg = <0x12CE0000 0x1000>;
  247. interrupts = <0 64 0>;
  248. #address-cells = <1>;
  249. #size-cells = <0>;
  250. clocks = <&clock 302>;
  251. clock-names = "i2c";
  252. };
  253. i2c@121D0000 {
  254. compatible = "samsung,exynos5-sata-phy-i2c";
  255. reg = <0x121D0000 0x100>;
  256. #address-cells = <1>;
  257. #size-cells = <0>;
  258. clocks = <&clock 288>;
  259. clock-names = "i2c";
  260. };
  261. spi_0: spi@12d20000 {
  262. compatible = "samsung,exynos4210-spi";
  263. reg = <0x12d20000 0x100>;
  264. interrupts = <0 66 0>;
  265. dmas = <&pdma0 5
  266. &pdma0 4>;
  267. dma-names = "tx", "rx";
  268. #address-cells = <1>;
  269. #size-cells = <0>;
  270. clocks = <&clock 304>, <&clock 154>;
  271. clock-names = "spi", "spi_busclk0";
  272. };
  273. spi_1: spi@12d30000 {
  274. compatible = "samsung,exynos4210-spi";
  275. reg = <0x12d30000 0x100>;
  276. interrupts = <0 67 0>;
  277. dmas = <&pdma1 5
  278. &pdma1 4>;
  279. dma-names = "tx", "rx";
  280. #address-cells = <1>;
  281. #size-cells = <0>;
  282. clocks = <&clock 305>, <&clock 155>;
  283. clock-names = "spi", "spi_busclk0";
  284. };
  285. spi_2: spi@12d40000 {
  286. compatible = "samsung,exynos4210-spi";
  287. reg = <0x12d40000 0x100>;
  288. interrupts = <0 68 0>;
  289. dmas = <&pdma0 7
  290. &pdma0 6>;
  291. dma-names = "tx", "rx";
  292. #address-cells = <1>;
  293. #size-cells = <0>;
  294. clocks = <&clock 306>, <&clock 156>;
  295. clock-names = "spi", "spi_busclk0";
  296. };
  297. dwmmc_0: dwmmc0@12200000 {
  298. compatible = "samsung,exynos5250-dw-mshc";
  299. reg = <0x12200000 0x1000>;
  300. interrupts = <0 75 0>;
  301. #address-cells = <1>;
  302. #size-cells = <0>;
  303. clocks = <&clock 280>, <&clock 139>;
  304. clock-names = "biu", "ciu";
  305. };
  306. dwmmc_1: dwmmc1@12210000 {
  307. compatible = "samsung,exynos5250-dw-mshc";
  308. reg = <0x12210000 0x1000>;
  309. interrupts = <0 76 0>;
  310. #address-cells = <1>;
  311. #size-cells = <0>;
  312. clocks = <&clock 281>, <&clock 140>;
  313. clock-names = "biu", "ciu";
  314. };
  315. dwmmc_2: dwmmc2@12220000 {
  316. compatible = "samsung,exynos5250-dw-mshc";
  317. reg = <0x12220000 0x1000>;
  318. interrupts = <0 77 0>;
  319. #address-cells = <1>;
  320. #size-cells = <0>;
  321. clocks = <&clock 282>, <&clock 141>;
  322. clock-names = "biu", "ciu";
  323. };
  324. dwmmc_3: dwmmc3@12230000 {
  325. compatible = "samsung,exynos5250-dw-mshc";
  326. reg = <0x12230000 0x1000>;
  327. interrupts = <0 78 0>;
  328. #address-cells = <1>;
  329. #size-cells = <0>;
  330. clocks = <&clock 283>, <&clock 142>;
  331. clock-names = "biu", "ciu";
  332. };
  333. i2s0: i2s@03830000 {
  334. compatible = "samsung,i2s-v5";
  335. reg = <0x03830000 0x100>;
  336. dmas = <&pdma0 10
  337. &pdma0 9
  338. &pdma0 8>;
  339. dma-names = "tx", "rx", "tx-sec";
  340. samsung,supports-6ch;
  341. samsung,supports-rstclr;
  342. samsung,supports-secdai;
  343. samsung,idma-addr = <0x03000000>;
  344. };
  345. i2s1: i2s@12D60000 {
  346. compatible = "samsung,i2s-v5";
  347. reg = <0x12D60000 0x100>;
  348. dmas = <&pdma1 12
  349. &pdma1 11>;
  350. dma-names = "tx", "rx";
  351. };
  352. i2s2: i2s@12D70000 {
  353. compatible = "samsung,i2s-v5";
  354. reg = <0x12D70000 0x100>;
  355. dmas = <&pdma0 12
  356. &pdma0 11>;
  357. dma-names = "tx", "rx";
  358. };
  359. usb@12110000 {
  360. compatible = "samsung,exynos4210-ehci";
  361. reg = <0x12110000 0x100>;
  362. interrupts = <0 71 0>;
  363. };
  364. usb@12120000 {
  365. compatible = "samsung,exynos4210-ohci";
  366. reg = <0x12120000 0x100>;
  367. interrupts = <0 71 0>;
  368. };
  369. amba {
  370. #address-cells = <1>;
  371. #size-cells = <1>;
  372. compatible = "arm,amba-bus";
  373. interrupt-parent = <&gic>;
  374. ranges;
  375. pdma0: pdma@121A0000 {
  376. compatible = "arm,pl330", "arm,primecell";
  377. reg = <0x121A0000 0x1000>;
  378. interrupts = <0 34 0>;
  379. clocks = <&clock 275>;
  380. clock-names = "apb_pclk";
  381. #dma-cells = <1>;
  382. #dma-channels = <8>;
  383. #dma-requests = <32>;
  384. };
  385. pdma1: pdma@121B0000 {
  386. compatible = "arm,pl330", "arm,primecell";
  387. reg = <0x121B0000 0x1000>;
  388. interrupts = <0 35 0>;
  389. clocks = <&clock 276>;
  390. clock-names = "apb_pclk";
  391. #dma-cells = <1>;
  392. #dma-channels = <8>;
  393. #dma-requests = <32>;
  394. };
  395. mdma0: mdma@10800000 {
  396. compatible = "arm,pl330", "arm,primecell";
  397. reg = <0x10800000 0x1000>;
  398. interrupts = <0 33 0>;
  399. clocks = <&clock 271>;
  400. clock-names = "apb_pclk";
  401. #dma-cells = <1>;
  402. #dma-channels = <8>;
  403. #dma-requests = <1>;
  404. };
  405. mdma1: mdma@11C10000 {
  406. compatible = "arm,pl330", "arm,primecell";
  407. reg = <0x11C10000 0x1000>;
  408. interrupts = <0 124 0>;
  409. clocks = <&clock 271>;
  410. clock-names = "apb_pclk";
  411. #dma-cells = <1>;
  412. #dma-channels = <8>;
  413. #dma-requests = <1>;
  414. };
  415. };
  416. gpio-controllers {
  417. #address-cells = <1>;
  418. #size-cells = <1>;
  419. gpio-controller;
  420. ranges;
  421. gpa0: gpio-controller@11400000 {
  422. compatible = "samsung,exynos4-gpio";
  423. reg = <0x11400000 0x20>;
  424. #gpio-cells = <4>;
  425. };
  426. gpa1: gpio-controller@11400020 {
  427. compatible = "samsung,exynos4-gpio";
  428. reg = <0x11400020 0x20>;
  429. #gpio-cells = <4>;
  430. };
  431. gpa2: gpio-controller@11400040 {
  432. compatible = "samsung,exynos4-gpio";
  433. reg = <0x11400040 0x20>;
  434. #gpio-cells = <4>;
  435. };
  436. gpb0: gpio-controller@11400060 {
  437. compatible = "samsung,exynos4-gpio";
  438. reg = <0x11400060 0x20>;
  439. #gpio-cells = <4>;
  440. };
  441. gpb1: gpio-controller@11400080 {
  442. compatible = "samsung,exynos4-gpio";
  443. reg = <0x11400080 0x20>;
  444. #gpio-cells = <4>;
  445. };
  446. gpb2: gpio-controller@114000A0 {
  447. compatible = "samsung,exynos4-gpio";
  448. reg = <0x114000A0 0x20>;
  449. #gpio-cells = <4>;
  450. };
  451. gpb3: gpio-controller@114000C0 {
  452. compatible = "samsung,exynos4-gpio";
  453. reg = <0x114000C0 0x20>;
  454. #gpio-cells = <4>;
  455. };
  456. gpc0: gpio-controller@114000E0 {
  457. compatible = "samsung,exynos4-gpio";
  458. reg = <0x114000E0 0x20>;
  459. #gpio-cells = <4>;
  460. };
  461. gpc1: gpio-controller@11400100 {
  462. compatible = "samsung,exynos4-gpio";
  463. reg = <0x11400100 0x20>;
  464. #gpio-cells = <4>;
  465. };
  466. gpc2: gpio-controller@11400120 {
  467. compatible = "samsung,exynos4-gpio";
  468. reg = <0x11400120 0x20>;
  469. #gpio-cells = <4>;
  470. };
  471. gpc3: gpio-controller@11400140 {
  472. compatible = "samsung,exynos4-gpio";
  473. reg = <0x11400140 0x20>;
  474. #gpio-cells = <4>;
  475. };
  476. gpc4: gpio-controller@114002E0 {
  477. compatible = "samsung,exynos4-gpio";
  478. reg = <0x114002E0 0x20>;
  479. #gpio-cells = <4>;
  480. };
  481. gpd0: gpio-controller@11400160 {
  482. compatible = "samsung,exynos4-gpio";
  483. reg = <0x11400160 0x20>;
  484. #gpio-cells = <4>;
  485. };
  486. gpd1: gpio-controller@11400180 {
  487. compatible = "samsung,exynos4-gpio";
  488. reg = <0x11400180 0x20>;
  489. #gpio-cells = <4>;
  490. };
  491. gpy0: gpio-controller@114001A0 {
  492. compatible = "samsung,exynos4-gpio";
  493. reg = <0x114001A0 0x20>;
  494. #gpio-cells = <4>;
  495. };
  496. gpy1: gpio-controller@114001C0 {
  497. compatible = "samsung,exynos4-gpio";
  498. reg = <0x114001C0 0x20>;
  499. #gpio-cells = <4>;
  500. };
  501. gpy2: gpio-controller@114001E0 {
  502. compatible = "samsung,exynos4-gpio";
  503. reg = <0x114001E0 0x20>;
  504. #gpio-cells = <4>;
  505. };
  506. gpy3: gpio-controller@11400200 {
  507. compatible = "samsung,exynos4-gpio";
  508. reg = <0x11400200 0x20>;
  509. #gpio-cells = <4>;
  510. };
  511. gpy4: gpio-controller@11400220 {
  512. compatible = "samsung,exynos4-gpio";
  513. reg = <0x11400220 0x20>;
  514. #gpio-cells = <4>;
  515. };
  516. gpy5: gpio-controller@11400240 {
  517. compatible = "samsung,exynos4-gpio";
  518. reg = <0x11400240 0x20>;
  519. #gpio-cells = <4>;
  520. };
  521. gpy6: gpio-controller@11400260 {
  522. compatible = "samsung,exynos4-gpio";
  523. reg = <0x11400260 0x20>;
  524. #gpio-cells = <4>;
  525. };
  526. gpx0: gpio-controller@11400C00 {
  527. compatible = "samsung,exynos4-gpio";
  528. reg = <0x11400C00 0x20>;
  529. #gpio-cells = <4>;
  530. };
  531. gpx1: gpio-controller@11400C20 {
  532. compatible = "samsung,exynos4-gpio";
  533. reg = <0x11400C20 0x20>;
  534. #gpio-cells = <4>;
  535. };
  536. gpx2: gpio-controller@11400C40 {
  537. compatible = "samsung,exynos4-gpio";
  538. reg = <0x11400C40 0x20>;
  539. #gpio-cells = <4>;
  540. };
  541. gpx3: gpio-controller@11400C60 {
  542. compatible = "samsung,exynos4-gpio";
  543. reg = <0x11400C60 0x20>;
  544. #gpio-cells = <4>;
  545. };
  546. gpe0: gpio-controller@13400000 {
  547. compatible = "samsung,exynos4-gpio";
  548. reg = <0x13400000 0x20>;
  549. #gpio-cells = <4>;
  550. };
  551. gpe1: gpio-controller@13400020 {
  552. compatible = "samsung,exynos4-gpio";
  553. reg = <0x13400020 0x20>;
  554. #gpio-cells = <4>;
  555. };
  556. gpf0: gpio-controller@13400040 {
  557. compatible = "samsung,exynos4-gpio";
  558. reg = <0x13400040 0x20>;
  559. #gpio-cells = <4>;
  560. };
  561. gpf1: gpio-controller@13400060 {
  562. compatible = "samsung,exynos4-gpio";
  563. reg = <0x13400060 0x20>;
  564. #gpio-cells = <4>;
  565. };
  566. gpg0: gpio-controller@13400080 {
  567. compatible = "samsung,exynos4-gpio";
  568. reg = <0x13400080 0x20>;
  569. #gpio-cells = <4>;
  570. };
  571. gpg1: gpio-controller@134000A0 {
  572. compatible = "samsung,exynos4-gpio";
  573. reg = <0x134000A0 0x20>;
  574. #gpio-cells = <4>;
  575. };
  576. gpg2: gpio-controller@134000C0 {
  577. compatible = "samsung,exynos4-gpio";
  578. reg = <0x134000C0 0x20>;
  579. #gpio-cells = <4>;
  580. };
  581. gph0: gpio-controller@134000E0 {
  582. compatible = "samsung,exynos4-gpio";
  583. reg = <0x134000E0 0x20>;
  584. #gpio-cells = <4>;
  585. };
  586. gph1: gpio-controller@13400100 {
  587. compatible = "samsung,exynos4-gpio";
  588. reg = <0x13400100 0x20>;
  589. #gpio-cells = <4>;
  590. };
  591. gpv0: gpio-controller@10D10000 {
  592. compatible = "samsung,exynos4-gpio";
  593. reg = <0x10D10000 0x20>;
  594. #gpio-cells = <4>;
  595. };
  596. gpv1: gpio-controller@10D10020 {
  597. compatible = "samsung,exynos4-gpio";
  598. reg = <0x10D10020 0x20>;
  599. #gpio-cells = <4>;
  600. };
  601. gpv2: gpio-controller@10D10040 {
  602. compatible = "samsung,exynos4-gpio";
  603. reg = <0x10D10060 0x20>;
  604. #gpio-cells = <4>;
  605. };
  606. gpv3: gpio-controller@10D10060 {
  607. compatible = "samsung,exynos4-gpio";
  608. reg = <0x10D10080 0x20>;
  609. #gpio-cells = <4>;
  610. };
  611. gpv4: gpio-controller@10D10080 {
  612. compatible = "samsung,exynos4-gpio";
  613. reg = <0x10D100C0 0x20>;
  614. #gpio-cells = <4>;
  615. };
  616. gpz: gpio-controller@03860000 {
  617. compatible = "samsung,exynos4-gpio";
  618. reg = <0x03860000 0x20>;
  619. #gpio-cells = <4>;
  620. };
  621. };
  622. gsc_0: gsc@0x13e00000 {
  623. compatible = "samsung,exynos5-gsc";
  624. reg = <0x13e00000 0x1000>;
  625. interrupts = <0 85 0>;
  626. samsung,power-domain = <&pd_gsc>;
  627. clocks = <&clock 256>;
  628. clock-names = "gscl";
  629. };
  630. gsc_1: gsc@0x13e10000 {
  631. compatible = "samsung,exynos5-gsc";
  632. reg = <0x13e10000 0x1000>;
  633. interrupts = <0 86 0>;
  634. samsung,power-domain = <&pd_gsc>;
  635. clocks = <&clock 257>;
  636. clock-names = "gscl";
  637. };
  638. gsc_2: gsc@0x13e20000 {
  639. compatible = "samsung,exynos5-gsc";
  640. reg = <0x13e20000 0x1000>;
  641. interrupts = <0 87 0>;
  642. samsung,power-domain = <&pd_gsc>;
  643. clocks = <&clock 258>;
  644. clock-names = "gscl";
  645. };
  646. gsc_3: gsc@0x13e30000 {
  647. compatible = "samsung,exynos5-gsc";
  648. reg = <0x13e30000 0x1000>;
  649. interrupts = <0 88 0>;
  650. samsung,power-domain = <&pd_gsc>;
  651. clocks = <&clock 259>;
  652. clock-names = "gscl";
  653. };
  654. hdmi {
  655. compatible = "samsung,exynos5-hdmi";
  656. reg = <0x14530000 0x70000>;
  657. interrupts = <0 95 0>;
  658. clocks = <&clock 333>, <&clock 136>, <&clock 137>,
  659. <&clock 333>, <&clock 333>;
  660. clock-names = "hdmi", "sclk_hdmi", "sclk_pixel",
  661. "sclk_hdmiphy", "hdmiphy";
  662. };
  663. mixer {
  664. compatible = "samsung,exynos5-mixer";
  665. reg = <0x14450000 0x10000>;
  666. interrupts = <0 94 0>;
  667. };
  668. dp-controller {
  669. compatible = "samsung,exynos5-dp";
  670. reg = <0x145b0000 0x1000>;
  671. interrupts = <10 3>;
  672. interrupt-parent = <&combiner>;
  673. #address-cells = <1>;
  674. #size-cells = <0>;
  675. dptx-phy {
  676. reg = <0x10040720>;
  677. samsung,enable-mask = <1>;
  678. };
  679. };
  680. };