fsl_soc.c 30 KB

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  1. /*
  2. * FSL SoC setup code
  3. *
  4. * Maintained by Kumar Gala (see MAINTAINERS for contact information)
  5. *
  6. * 2006 (c) MontaVista Software, Inc.
  7. * Vitaly Bordug <vbordug@ru.mvista.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <linux/stddef.h>
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/errno.h>
  18. #include <linux/major.h>
  19. #include <linux/delay.h>
  20. #include <linux/irq.h>
  21. #include <linux/module.h>
  22. #include <linux/device.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/of_platform.h>
  25. #include <linux/phy.h>
  26. #include <linux/spi/spi.h>
  27. #include <linux/fsl_devices.h>
  28. #include <linux/fs_enet_pd.h>
  29. #include <linux/fs_uart_pd.h>
  30. #include <asm/system.h>
  31. #include <asm/atomic.h>
  32. #include <asm/io.h>
  33. #include <asm/irq.h>
  34. #include <asm/time.h>
  35. #include <asm/prom.h>
  36. #include <sysdev/fsl_soc.h>
  37. #include <mm/mmu_decl.h>
  38. #include <asm/cpm2.h>
  39. extern void init_fcc_ioports(struct fs_platform_info*);
  40. extern void init_fec_ioports(struct fs_platform_info*);
  41. extern void init_smc_ioports(struct fs_uart_platform_info*);
  42. static phys_addr_t immrbase = -1;
  43. phys_addr_t get_immrbase(void)
  44. {
  45. struct device_node *soc;
  46. if (immrbase != -1)
  47. return immrbase;
  48. soc = of_find_node_by_type(NULL, "soc");
  49. if (soc) {
  50. int size;
  51. const void *prop = of_get_property(soc, "reg", &size);
  52. if (prop)
  53. immrbase = of_translate_address(soc, prop);
  54. of_node_put(soc);
  55. }
  56. return immrbase;
  57. }
  58. EXPORT_SYMBOL(get_immrbase);
  59. #if defined(CONFIG_CPM2) || defined(CONFIG_8xx)
  60. static u32 brgfreq = -1;
  61. u32 get_brgfreq(void)
  62. {
  63. struct device_node *node;
  64. const unsigned int *prop;
  65. int size;
  66. if (brgfreq != -1)
  67. return brgfreq;
  68. node = of_find_compatible_node(NULL, NULL, "fsl,cpm-brg");
  69. if (node) {
  70. prop = of_get_property(node, "clock-frequency", &size);
  71. if (prop && size == 4)
  72. brgfreq = *prop;
  73. of_node_put(node);
  74. return brgfreq;
  75. }
  76. /* Legacy device binding -- will go away when no users are left. */
  77. node = of_find_node_by_type(NULL, "cpm");
  78. if (node) {
  79. prop = of_get_property(node, "brg-frequency", &size);
  80. if (prop && size == 4)
  81. brgfreq = *prop;
  82. of_node_put(node);
  83. }
  84. return brgfreq;
  85. }
  86. EXPORT_SYMBOL(get_brgfreq);
  87. static u32 fs_baudrate = -1;
  88. u32 get_baudrate(void)
  89. {
  90. struct device_node *node;
  91. if (fs_baudrate != -1)
  92. return fs_baudrate;
  93. node = of_find_node_by_type(NULL, "serial");
  94. if (node) {
  95. int size;
  96. const unsigned int *prop = of_get_property(node,
  97. "current-speed", &size);
  98. if (prop)
  99. fs_baudrate = *prop;
  100. of_node_put(node);
  101. }
  102. return fs_baudrate;
  103. }
  104. EXPORT_SYMBOL(get_baudrate);
  105. #endif /* CONFIG_CPM2 */
  106. static int __init gfar_mdio_of_init(void)
  107. {
  108. struct device_node *np = NULL;
  109. struct platform_device *mdio_dev;
  110. struct resource res;
  111. int ret;
  112. np = of_find_compatible_node(np, NULL, "fsl,gianfar-mdio");
  113. /* try the deprecated version */
  114. if (!np)
  115. np = of_find_compatible_node(np, "mdio", "gianfar");
  116. if (np) {
  117. int k;
  118. struct device_node *child = NULL;
  119. struct gianfar_mdio_data mdio_data;
  120. memset(&res, 0, sizeof(res));
  121. memset(&mdio_data, 0, sizeof(mdio_data));
  122. ret = of_address_to_resource(np, 0, &res);
  123. if (ret)
  124. goto err;
  125. mdio_dev =
  126. platform_device_register_simple("fsl-gianfar_mdio",
  127. res.start, &res, 1);
  128. if (IS_ERR(mdio_dev)) {
  129. ret = PTR_ERR(mdio_dev);
  130. goto err;
  131. }
  132. for (k = 0; k < 32; k++)
  133. mdio_data.irq[k] = PHY_POLL;
  134. while ((child = of_get_next_child(np, child)) != NULL) {
  135. int irq = irq_of_parse_and_map(child, 0);
  136. if (irq != NO_IRQ) {
  137. const u32 *id = of_get_property(child,
  138. "reg", NULL);
  139. mdio_data.irq[*id] = irq;
  140. }
  141. }
  142. ret =
  143. platform_device_add_data(mdio_dev, &mdio_data,
  144. sizeof(struct gianfar_mdio_data));
  145. if (ret)
  146. goto unreg;
  147. }
  148. of_node_put(np);
  149. return 0;
  150. unreg:
  151. platform_device_unregister(mdio_dev);
  152. err:
  153. of_node_put(np);
  154. return ret;
  155. }
  156. arch_initcall(gfar_mdio_of_init);
  157. static const char *gfar_tx_intr = "tx";
  158. static const char *gfar_rx_intr = "rx";
  159. static const char *gfar_err_intr = "error";
  160. static int __init gfar_of_init(void)
  161. {
  162. struct device_node *np;
  163. unsigned int i;
  164. struct platform_device *gfar_dev;
  165. struct resource res;
  166. int ret;
  167. for (np = NULL, i = 0;
  168. (np = of_find_compatible_node(np, "network", "gianfar")) != NULL;
  169. i++) {
  170. struct resource r[4];
  171. struct device_node *phy, *mdio;
  172. struct gianfar_platform_data gfar_data;
  173. const unsigned int *id;
  174. const char *model;
  175. const char *ctype;
  176. const void *mac_addr;
  177. const phandle *ph;
  178. int n_res = 2;
  179. memset(r, 0, sizeof(r));
  180. memset(&gfar_data, 0, sizeof(gfar_data));
  181. ret = of_address_to_resource(np, 0, &r[0]);
  182. if (ret)
  183. goto err;
  184. of_irq_to_resource(np, 0, &r[1]);
  185. model = of_get_property(np, "model", NULL);
  186. /* If we aren't the FEC we have multiple interrupts */
  187. if (model && strcasecmp(model, "FEC")) {
  188. r[1].name = gfar_tx_intr;
  189. r[2].name = gfar_rx_intr;
  190. of_irq_to_resource(np, 1, &r[2]);
  191. r[3].name = gfar_err_intr;
  192. of_irq_to_resource(np, 2, &r[3]);
  193. n_res += 2;
  194. }
  195. gfar_dev =
  196. platform_device_register_simple("fsl-gianfar", i, &r[0],
  197. n_res);
  198. if (IS_ERR(gfar_dev)) {
  199. ret = PTR_ERR(gfar_dev);
  200. goto err;
  201. }
  202. mac_addr = of_get_mac_address(np);
  203. if (mac_addr)
  204. memcpy(gfar_data.mac_addr, mac_addr, 6);
  205. if (model && !strcasecmp(model, "TSEC"))
  206. gfar_data.device_flags =
  207. FSL_GIANFAR_DEV_HAS_GIGABIT |
  208. FSL_GIANFAR_DEV_HAS_COALESCE |
  209. FSL_GIANFAR_DEV_HAS_RMON |
  210. FSL_GIANFAR_DEV_HAS_MULTI_INTR;
  211. if (model && !strcasecmp(model, "eTSEC"))
  212. gfar_data.device_flags =
  213. FSL_GIANFAR_DEV_HAS_GIGABIT |
  214. FSL_GIANFAR_DEV_HAS_COALESCE |
  215. FSL_GIANFAR_DEV_HAS_RMON |
  216. FSL_GIANFAR_DEV_HAS_MULTI_INTR |
  217. FSL_GIANFAR_DEV_HAS_CSUM |
  218. FSL_GIANFAR_DEV_HAS_VLAN |
  219. FSL_GIANFAR_DEV_HAS_EXTENDED_HASH;
  220. ctype = of_get_property(np, "phy-connection-type", NULL);
  221. /* We only care about rgmii-id. The rest are autodetected */
  222. if (ctype && !strcmp(ctype, "rgmii-id"))
  223. gfar_data.interface = PHY_INTERFACE_MODE_RGMII_ID;
  224. else
  225. gfar_data.interface = PHY_INTERFACE_MODE_MII;
  226. ph = of_get_property(np, "phy-handle", NULL);
  227. phy = of_find_node_by_phandle(*ph);
  228. if (phy == NULL) {
  229. ret = -ENODEV;
  230. goto unreg;
  231. }
  232. mdio = of_get_parent(phy);
  233. id = of_get_property(phy, "reg", NULL);
  234. ret = of_address_to_resource(mdio, 0, &res);
  235. if (ret) {
  236. of_node_put(phy);
  237. of_node_put(mdio);
  238. goto unreg;
  239. }
  240. gfar_data.phy_id = *id;
  241. gfar_data.bus_id = res.start;
  242. of_node_put(phy);
  243. of_node_put(mdio);
  244. ret =
  245. platform_device_add_data(gfar_dev, &gfar_data,
  246. sizeof(struct
  247. gianfar_platform_data));
  248. if (ret)
  249. goto unreg;
  250. }
  251. return 0;
  252. unreg:
  253. platform_device_unregister(gfar_dev);
  254. err:
  255. return ret;
  256. }
  257. arch_initcall(gfar_of_init);
  258. #ifdef CONFIG_I2C_BOARDINFO
  259. #include <linux/i2c.h>
  260. struct i2c_driver_device {
  261. char *of_device;
  262. char *i2c_driver;
  263. char *i2c_type;
  264. };
  265. static struct i2c_driver_device i2c_devices[] __initdata = {
  266. {"ricoh,rs5c372a", "rtc-rs5c372", "rs5c372a",},
  267. {"ricoh,rs5c372b", "rtc-rs5c372", "rs5c372b",},
  268. {"ricoh,rv5c386", "rtc-rs5c372", "rv5c386",},
  269. {"ricoh,rv5c387a", "rtc-rs5c372", "rv5c387a",},
  270. {"dallas,ds1307", "rtc-ds1307", "ds1307",},
  271. {"dallas,ds1337", "rtc-ds1307", "ds1337",},
  272. {"dallas,ds1338", "rtc-ds1307", "ds1338",},
  273. {"dallas,ds1339", "rtc-ds1307", "ds1339",},
  274. {"dallas,ds1340", "rtc-ds1307", "ds1340",},
  275. {"stm,m41t00", "rtc-ds1307", "m41t00"},
  276. {"dallas,ds1374", "rtc-ds1374", "rtc-ds1374",},
  277. };
  278. static int __init of_find_i2c_driver(struct device_node *node,
  279. struct i2c_board_info *info)
  280. {
  281. int i;
  282. for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) {
  283. if (!of_device_is_compatible(node, i2c_devices[i].of_device))
  284. continue;
  285. if (strlcpy(info->driver_name, i2c_devices[i].i2c_driver,
  286. KOBJ_NAME_LEN) >= KOBJ_NAME_LEN ||
  287. strlcpy(info->type, i2c_devices[i].i2c_type,
  288. I2C_NAME_SIZE) >= I2C_NAME_SIZE)
  289. return -ENOMEM;
  290. return 0;
  291. }
  292. return -ENODEV;
  293. }
  294. static void __init of_register_i2c_devices(struct device_node *adap_node,
  295. int bus_num)
  296. {
  297. struct device_node *node = NULL;
  298. while ((node = of_get_next_child(adap_node, node))) {
  299. struct i2c_board_info info = {};
  300. const u32 *addr;
  301. int len;
  302. addr = of_get_property(node, "reg", &len);
  303. if (!addr || len < sizeof(int) || *addr > (1 << 10) - 1) {
  304. printk(KERN_WARNING "fsl_soc.c: invalid i2c device entry\n");
  305. continue;
  306. }
  307. info.irq = irq_of_parse_and_map(node, 0);
  308. if (info.irq == NO_IRQ)
  309. info.irq = -1;
  310. if (of_find_i2c_driver(node, &info) < 0)
  311. continue;
  312. info.addr = *addr;
  313. i2c_register_board_info(bus_num, &info, 1);
  314. }
  315. }
  316. static int __init fsl_i2c_of_init(void)
  317. {
  318. struct device_node *np;
  319. unsigned int i = 0;
  320. struct platform_device *i2c_dev;
  321. int ret;
  322. for_each_compatible_node(np, NULL, "fsl-i2c") {
  323. struct resource r[2];
  324. struct fsl_i2c_platform_data i2c_data;
  325. const unsigned char *flags = NULL;
  326. memset(&r, 0, sizeof(r));
  327. memset(&i2c_data, 0, sizeof(i2c_data));
  328. ret = of_address_to_resource(np, 0, &r[0]);
  329. if (ret)
  330. goto err;
  331. of_irq_to_resource(np, 0, &r[1]);
  332. i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
  333. if (IS_ERR(i2c_dev)) {
  334. ret = PTR_ERR(i2c_dev);
  335. goto err;
  336. }
  337. i2c_data.device_flags = 0;
  338. flags = of_get_property(np, "dfsrr", NULL);
  339. if (flags)
  340. i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
  341. flags = of_get_property(np, "fsl5200-clocking", NULL);
  342. if (flags)
  343. i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200;
  344. ret =
  345. platform_device_add_data(i2c_dev, &i2c_data,
  346. sizeof(struct
  347. fsl_i2c_platform_data));
  348. if (ret)
  349. goto unreg;
  350. of_register_i2c_devices(np, i++);
  351. }
  352. return 0;
  353. unreg:
  354. platform_device_unregister(i2c_dev);
  355. err:
  356. return ret;
  357. }
  358. arch_initcall(fsl_i2c_of_init);
  359. #endif
  360. #ifdef CONFIG_PPC_83xx
  361. static int __init mpc83xx_wdt_init(void)
  362. {
  363. struct resource r;
  364. struct device_node *soc, *np;
  365. struct platform_device *dev;
  366. const unsigned int *freq;
  367. int ret;
  368. np = of_find_compatible_node(NULL, "watchdog", "mpc83xx_wdt");
  369. if (!np) {
  370. ret = -ENODEV;
  371. goto nodev;
  372. }
  373. soc = of_find_node_by_type(NULL, "soc");
  374. if (!soc) {
  375. ret = -ENODEV;
  376. goto nosoc;
  377. }
  378. freq = of_get_property(soc, "bus-frequency", NULL);
  379. if (!freq) {
  380. ret = -ENODEV;
  381. goto err;
  382. }
  383. memset(&r, 0, sizeof(r));
  384. ret = of_address_to_resource(np, 0, &r);
  385. if (ret)
  386. goto err;
  387. dev = platform_device_register_simple("mpc83xx_wdt", 0, &r, 1);
  388. if (IS_ERR(dev)) {
  389. ret = PTR_ERR(dev);
  390. goto err;
  391. }
  392. ret = platform_device_add_data(dev, freq, sizeof(int));
  393. if (ret)
  394. goto unreg;
  395. of_node_put(soc);
  396. of_node_put(np);
  397. return 0;
  398. unreg:
  399. platform_device_unregister(dev);
  400. err:
  401. of_node_put(soc);
  402. nosoc:
  403. of_node_put(np);
  404. nodev:
  405. return ret;
  406. }
  407. arch_initcall(mpc83xx_wdt_init);
  408. #endif
  409. static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
  410. {
  411. if (!phy_type)
  412. return FSL_USB2_PHY_NONE;
  413. if (!strcasecmp(phy_type, "ulpi"))
  414. return FSL_USB2_PHY_ULPI;
  415. if (!strcasecmp(phy_type, "utmi"))
  416. return FSL_USB2_PHY_UTMI;
  417. if (!strcasecmp(phy_type, "utmi_wide"))
  418. return FSL_USB2_PHY_UTMI_WIDE;
  419. if (!strcasecmp(phy_type, "serial"))
  420. return FSL_USB2_PHY_SERIAL;
  421. return FSL_USB2_PHY_NONE;
  422. }
  423. static int __init fsl_usb_of_init(void)
  424. {
  425. struct device_node *np;
  426. unsigned int i;
  427. struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
  428. *usb_dev_dr_client = NULL;
  429. int ret;
  430. for (np = NULL, i = 0;
  431. (np = of_find_compatible_node(np, "usb", "fsl-usb2-mph")) != NULL;
  432. i++) {
  433. struct resource r[2];
  434. struct fsl_usb2_platform_data usb_data;
  435. const unsigned char *prop = NULL;
  436. memset(&r, 0, sizeof(r));
  437. memset(&usb_data, 0, sizeof(usb_data));
  438. ret = of_address_to_resource(np, 0, &r[0]);
  439. if (ret)
  440. goto err;
  441. of_irq_to_resource(np, 0, &r[1]);
  442. usb_dev_mph =
  443. platform_device_register_simple("fsl-ehci", i, r, 2);
  444. if (IS_ERR(usb_dev_mph)) {
  445. ret = PTR_ERR(usb_dev_mph);
  446. goto err;
  447. }
  448. usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
  449. usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
  450. usb_data.operating_mode = FSL_USB2_MPH_HOST;
  451. prop = of_get_property(np, "port0", NULL);
  452. if (prop)
  453. usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
  454. prop = of_get_property(np, "port1", NULL);
  455. if (prop)
  456. usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
  457. prop = of_get_property(np, "phy_type", NULL);
  458. usb_data.phy_mode = determine_usb_phy(prop);
  459. ret =
  460. platform_device_add_data(usb_dev_mph, &usb_data,
  461. sizeof(struct
  462. fsl_usb2_platform_data));
  463. if (ret)
  464. goto unreg_mph;
  465. }
  466. for (np = NULL;
  467. (np = of_find_compatible_node(np, "usb", "fsl-usb2-dr")) != NULL;
  468. i++) {
  469. struct resource r[2];
  470. struct fsl_usb2_platform_data usb_data;
  471. const unsigned char *prop = NULL;
  472. memset(&r, 0, sizeof(r));
  473. memset(&usb_data, 0, sizeof(usb_data));
  474. ret = of_address_to_resource(np, 0, &r[0]);
  475. if (ret)
  476. goto unreg_mph;
  477. of_irq_to_resource(np, 0, &r[1]);
  478. prop = of_get_property(np, "dr_mode", NULL);
  479. if (!prop || !strcmp(prop, "host")) {
  480. usb_data.operating_mode = FSL_USB2_DR_HOST;
  481. usb_dev_dr_host = platform_device_register_simple(
  482. "fsl-ehci", i, r, 2);
  483. if (IS_ERR(usb_dev_dr_host)) {
  484. ret = PTR_ERR(usb_dev_dr_host);
  485. goto err;
  486. }
  487. } else if (prop && !strcmp(prop, "peripheral")) {
  488. usb_data.operating_mode = FSL_USB2_DR_DEVICE;
  489. usb_dev_dr_client = platform_device_register_simple(
  490. "fsl-usb2-udc", i, r, 2);
  491. if (IS_ERR(usb_dev_dr_client)) {
  492. ret = PTR_ERR(usb_dev_dr_client);
  493. goto err;
  494. }
  495. } else if (prop && !strcmp(prop, "otg")) {
  496. usb_data.operating_mode = FSL_USB2_DR_OTG;
  497. usb_dev_dr_host = platform_device_register_simple(
  498. "fsl-ehci", i, r, 2);
  499. if (IS_ERR(usb_dev_dr_host)) {
  500. ret = PTR_ERR(usb_dev_dr_host);
  501. goto err;
  502. }
  503. usb_dev_dr_client = platform_device_register_simple(
  504. "fsl-usb2-udc", i, r, 2);
  505. if (IS_ERR(usb_dev_dr_client)) {
  506. ret = PTR_ERR(usb_dev_dr_client);
  507. goto err;
  508. }
  509. } else {
  510. ret = -EINVAL;
  511. goto err;
  512. }
  513. prop = of_get_property(np, "phy_type", NULL);
  514. usb_data.phy_mode = determine_usb_phy(prop);
  515. if (usb_dev_dr_host) {
  516. usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
  517. usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
  518. dev.coherent_dma_mask;
  519. if ((ret = platform_device_add_data(usb_dev_dr_host,
  520. &usb_data, sizeof(struct
  521. fsl_usb2_platform_data))))
  522. goto unreg_dr;
  523. }
  524. if (usb_dev_dr_client) {
  525. usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
  526. usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
  527. dev.coherent_dma_mask;
  528. if ((ret = platform_device_add_data(usb_dev_dr_client,
  529. &usb_data, sizeof(struct
  530. fsl_usb2_platform_data))))
  531. goto unreg_dr;
  532. }
  533. }
  534. return 0;
  535. unreg_dr:
  536. if (usb_dev_dr_host)
  537. platform_device_unregister(usb_dev_dr_host);
  538. if (usb_dev_dr_client)
  539. platform_device_unregister(usb_dev_dr_client);
  540. unreg_mph:
  541. if (usb_dev_mph)
  542. platform_device_unregister(usb_dev_mph);
  543. err:
  544. return ret;
  545. }
  546. arch_initcall(fsl_usb_of_init);
  547. #ifndef CONFIG_PPC_CPM_NEW_BINDING
  548. #ifdef CONFIG_CPM2
  549. extern void init_scc_ioports(struct fs_uart_platform_info*);
  550. static const char fcc_regs[] = "fcc_regs";
  551. static const char fcc_regs_c[] = "fcc_regs_c";
  552. static const char fcc_pram[] = "fcc_pram";
  553. static char bus_id[9][BUS_ID_SIZE];
  554. static int __init fs_enet_of_init(void)
  555. {
  556. struct device_node *np;
  557. unsigned int i;
  558. struct platform_device *fs_enet_dev;
  559. struct resource res;
  560. int ret;
  561. for (np = NULL, i = 0;
  562. (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
  563. i++) {
  564. struct resource r[4];
  565. struct device_node *phy, *mdio;
  566. struct fs_platform_info fs_enet_data;
  567. const unsigned int *id, *phy_addr, *phy_irq;
  568. const void *mac_addr;
  569. const phandle *ph;
  570. const char *model;
  571. memset(r, 0, sizeof(r));
  572. memset(&fs_enet_data, 0, sizeof(fs_enet_data));
  573. ret = of_address_to_resource(np, 0, &r[0]);
  574. if (ret)
  575. goto err;
  576. r[0].name = fcc_regs;
  577. ret = of_address_to_resource(np, 1, &r[1]);
  578. if (ret)
  579. goto err;
  580. r[1].name = fcc_pram;
  581. ret = of_address_to_resource(np, 2, &r[2]);
  582. if (ret)
  583. goto err;
  584. r[2].name = fcc_regs_c;
  585. fs_enet_data.fcc_regs_c = r[2].start;
  586. of_irq_to_resource(np, 0, &r[3]);
  587. fs_enet_dev =
  588. platform_device_register_simple("fsl-cpm-fcc", i, &r[0], 4);
  589. if (IS_ERR(fs_enet_dev)) {
  590. ret = PTR_ERR(fs_enet_dev);
  591. goto err;
  592. }
  593. model = of_get_property(np, "model", NULL);
  594. if (model == NULL) {
  595. ret = -ENODEV;
  596. goto unreg;
  597. }
  598. mac_addr = of_get_mac_address(np);
  599. if (mac_addr)
  600. memcpy(fs_enet_data.macaddr, mac_addr, 6);
  601. ph = of_get_property(np, "phy-handle", NULL);
  602. phy = of_find_node_by_phandle(*ph);
  603. if (phy == NULL) {
  604. ret = -ENODEV;
  605. goto unreg;
  606. }
  607. phy_addr = of_get_property(phy, "reg", NULL);
  608. fs_enet_data.phy_addr = *phy_addr;
  609. phy_irq = of_get_property(phy, "interrupts", NULL);
  610. id = of_get_property(np, "device-id", NULL);
  611. fs_enet_data.fs_no = *id;
  612. strcpy(fs_enet_data.fs_type, model);
  613. mdio = of_get_parent(phy);
  614. ret = of_address_to_resource(mdio, 0, &res);
  615. if (ret) {
  616. of_node_put(phy);
  617. of_node_put(mdio);
  618. goto unreg;
  619. }
  620. fs_enet_data.clk_rx = *((u32 *)of_get_property(np,
  621. "rx-clock", NULL));
  622. fs_enet_data.clk_tx = *((u32 *)of_get_property(np,
  623. "tx-clock", NULL));
  624. if (strstr(model, "FCC")) {
  625. int fcc_index = *id - 1;
  626. const unsigned char *mdio_bb_prop;
  627. fs_enet_data.dpram_offset = (u32)cpm_dpram_addr(0);
  628. fs_enet_data.rx_ring = 32;
  629. fs_enet_data.tx_ring = 32;
  630. fs_enet_data.rx_copybreak = 240;
  631. fs_enet_data.use_napi = 0;
  632. fs_enet_data.napi_weight = 17;
  633. fs_enet_data.mem_offset = FCC_MEM_OFFSET(fcc_index);
  634. fs_enet_data.cp_page = CPM_CR_FCC_PAGE(fcc_index);
  635. fs_enet_data.cp_block = CPM_CR_FCC_SBLOCK(fcc_index);
  636. snprintf((char*)&bus_id[(*id)], BUS_ID_SIZE, "%x:%02x",
  637. (u32)res.start, fs_enet_data.phy_addr);
  638. fs_enet_data.bus_id = (char*)&bus_id[(*id)];
  639. fs_enet_data.init_ioports = init_fcc_ioports;
  640. mdio_bb_prop = of_get_property(phy, "bitbang", NULL);
  641. if (mdio_bb_prop) {
  642. struct platform_device *fs_enet_mdio_bb_dev;
  643. struct fs_mii_bb_platform_info fs_enet_mdio_bb_data;
  644. fs_enet_mdio_bb_dev =
  645. platform_device_register_simple("fsl-bb-mdio",
  646. i, NULL, 0);
  647. memset(&fs_enet_mdio_bb_data, 0,
  648. sizeof(struct fs_mii_bb_platform_info));
  649. fs_enet_mdio_bb_data.mdio_dat.bit =
  650. mdio_bb_prop[0];
  651. fs_enet_mdio_bb_data.mdio_dir.bit =
  652. mdio_bb_prop[1];
  653. fs_enet_mdio_bb_data.mdc_dat.bit =
  654. mdio_bb_prop[2];
  655. fs_enet_mdio_bb_data.mdio_port =
  656. mdio_bb_prop[3];
  657. fs_enet_mdio_bb_data.mdc_port =
  658. mdio_bb_prop[4];
  659. fs_enet_mdio_bb_data.delay =
  660. mdio_bb_prop[5];
  661. fs_enet_mdio_bb_data.irq[0] = phy_irq[0];
  662. fs_enet_mdio_bb_data.irq[1] = -1;
  663. fs_enet_mdio_bb_data.irq[2] = -1;
  664. fs_enet_mdio_bb_data.irq[3] = phy_irq[0];
  665. fs_enet_mdio_bb_data.irq[31] = -1;
  666. fs_enet_mdio_bb_data.mdio_dat.offset =
  667. (u32)&cpm2_immr->im_ioport.iop_pdatc;
  668. fs_enet_mdio_bb_data.mdio_dir.offset =
  669. (u32)&cpm2_immr->im_ioport.iop_pdirc;
  670. fs_enet_mdio_bb_data.mdc_dat.offset =
  671. (u32)&cpm2_immr->im_ioport.iop_pdatc;
  672. ret = platform_device_add_data(
  673. fs_enet_mdio_bb_dev,
  674. &fs_enet_mdio_bb_data,
  675. sizeof(struct fs_mii_bb_platform_info));
  676. if (ret)
  677. goto unreg;
  678. }
  679. of_node_put(phy);
  680. of_node_put(mdio);
  681. ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
  682. sizeof(struct
  683. fs_platform_info));
  684. if (ret)
  685. goto unreg;
  686. }
  687. }
  688. return 0;
  689. unreg:
  690. platform_device_unregister(fs_enet_dev);
  691. err:
  692. return ret;
  693. }
  694. arch_initcall(fs_enet_of_init);
  695. static const char scc_regs[] = "regs";
  696. static const char scc_pram[] = "pram";
  697. static int __init cpm_uart_of_init(void)
  698. {
  699. struct device_node *np;
  700. unsigned int i;
  701. struct platform_device *cpm_uart_dev;
  702. int ret;
  703. for (np = NULL, i = 0;
  704. (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
  705. i++) {
  706. struct resource r[3];
  707. struct fs_uart_platform_info cpm_uart_data;
  708. const int *id;
  709. const char *model;
  710. memset(r, 0, sizeof(r));
  711. memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
  712. ret = of_address_to_resource(np, 0, &r[0]);
  713. if (ret)
  714. goto err;
  715. r[0].name = scc_regs;
  716. ret = of_address_to_resource(np, 1, &r[1]);
  717. if (ret)
  718. goto err;
  719. r[1].name = scc_pram;
  720. of_irq_to_resource(np, 0, &r[2]);
  721. cpm_uart_dev =
  722. platform_device_register_simple("fsl-cpm-scc:uart", i, &r[0], 3);
  723. if (IS_ERR(cpm_uart_dev)) {
  724. ret = PTR_ERR(cpm_uart_dev);
  725. goto err;
  726. }
  727. id = of_get_property(np, "device-id", NULL);
  728. cpm_uart_data.fs_no = *id;
  729. model = of_get_property(np, "model", NULL);
  730. strcpy(cpm_uart_data.fs_type, model);
  731. cpm_uart_data.uart_clk = ppc_proc_freq;
  732. cpm_uart_data.tx_num_fifo = 4;
  733. cpm_uart_data.tx_buf_size = 32;
  734. cpm_uart_data.rx_num_fifo = 4;
  735. cpm_uart_data.rx_buf_size = 32;
  736. cpm_uart_data.clk_rx = *((u32 *)of_get_property(np,
  737. "rx-clock", NULL));
  738. cpm_uart_data.clk_tx = *((u32 *)of_get_property(np,
  739. "tx-clock", NULL));
  740. ret =
  741. platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
  742. sizeof(struct
  743. fs_uart_platform_info));
  744. if (ret)
  745. goto unreg;
  746. }
  747. return 0;
  748. unreg:
  749. platform_device_unregister(cpm_uart_dev);
  750. err:
  751. return ret;
  752. }
  753. arch_initcall(cpm_uart_of_init);
  754. #endif /* CONFIG_CPM2 */
  755. #ifdef CONFIG_8xx
  756. extern void init_scc_ioports(struct fs_platform_info*);
  757. extern int platform_device_skip(const char *model, int id);
  758. static int __init fs_enet_mdio_of_init(void)
  759. {
  760. struct device_node *np;
  761. unsigned int i;
  762. struct platform_device *mdio_dev;
  763. struct resource res;
  764. int ret;
  765. for (np = NULL, i = 0;
  766. (np = of_find_compatible_node(np, "mdio", "fs_enet")) != NULL;
  767. i++) {
  768. struct fs_mii_fec_platform_info mdio_data;
  769. memset(&res, 0, sizeof(res));
  770. memset(&mdio_data, 0, sizeof(mdio_data));
  771. ret = of_address_to_resource(np, 0, &res);
  772. if (ret)
  773. goto err;
  774. mdio_dev =
  775. platform_device_register_simple("fsl-cpm-fec-mdio",
  776. res.start, &res, 1);
  777. if (IS_ERR(mdio_dev)) {
  778. ret = PTR_ERR(mdio_dev);
  779. goto err;
  780. }
  781. mdio_data.mii_speed = ((((ppc_proc_freq + 4999999) / 2500000) / 2) & 0x3F) << 1;
  782. ret =
  783. platform_device_add_data(mdio_dev, &mdio_data,
  784. sizeof(struct fs_mii_fec_platform_info));
  785. if (ret)
  786. goto unreg;
  787. }
  788. return 0;
  789. unreg:
  790. platform_device_unregister(mdio_dev);
  791. err:
  792. return ret;
  793. }
  794. arch_initcall(fs_enet_mdio_of_init);
  795. static const char *enet_regs = "regs";
  796. static const char *enet_pram = "pram";
  797. static const char *enet_irq = "interrupt";
  798. static char bus_id[9][BUS_ID_SIZE];
  799. static int __init fs_enet_of_init(void)
  800. {
  801. struct device_node *np;
  802. unsigned int i;
  803. struct platform_device *fs_enet_dev = NULL;
  804. struct resource res;
  805. int ret;
  806. for (np = NULL, i = 0;
  807. (np = of_find_compatible_node(np, "network", "fs_enet")) != NULL;
  808. i++) {
  809. struct resource r[4];
  810. struct device_node *phy = NULL, *mdio = NULL;
  811. struct fs_platform_info fs_enet_data;
  812. const unsigned int *id;
  813. const unsigned int *phy_addr;
  814. const void *mac_addr;
  815. const phandle *ph;
  816. const char *model;
  817. memset(r, 0, sizeof(r));
  818. memset(&fs_enet_data, 0, sizeof(fs_enet_data));
  819. model = of_get_property(np, "model", NULL);
  820. if (model == NULL) {
  821. ret = -ENODEV;
  822. goto unreg;
  823. }
  824. id = of_get_property(np, "device-id", NULL);
  825. fs_enet_data.fs_no = *id;
  826. if (platform_device_skip(model, *id))
  827. continue;
  828. ret = of_address_to_resource(np, 0, &r[0]);
  829. if (ret)
  830. goto err;
  831. r[0].name = enet_regs;
  832. mac_addr = of_get_mac_address(np);
  833. if (mac_addr)
  834. memcpy(fs_enet_data.macaddr, mac_addr, 6);
  835. ph = of_get_property(np, "phy-handle", NULL);
  836. if (ph != NULL)
  837. phy = of_find_node_by_phandle(*ph);
  838. if (phy != NULL) {
  839. phy_addr = of_get_property(phy, "reg", NULL);
  840. fs_enet_data.phy_addr = *phy_addr;
  841. fs_enet_data.has_phy = 1;
  842. mdio = of_get_parent(phy);
  843. ret = of_address_to_resource(mdio, 0, &res);
  844. if (ret) {
  845. of_node_put(phy);
  846. of_node_put(mdio);
  847. goto unreg;
  848. }
  849. }
  850. model = of_get_property(np, "model", NULL);
  851. strcpy(fs_enet_data.fs_type, model);
  852. if (strstr(model, "FEC")) {
  853. r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
  854. r[1].flags = IORESOURCE_IRQ;
  855. r[1].name = enet_irq;
  856. fs_enet_dev =
  857. platform_device_register_simple("fsl-cpm-fec", i, &r[0], 2);
  858. if (IS_ERR(fs_enet_dev)) {
  859. ret = PTR_ERR(fs_enet_dev);
  860. goto err;
  861. }
  862. fs_enet_data.rx_ring = 128;
  863. fs_enet_data.tx_ring = 16;
  864. fs_enet_data.rx_copybreak = 240;
  865. fs_enet_data.use_napi = 1;
  866. fs_enet_data.napi_weight = 17;
  867. snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%x:%02x",
  868. (u32)res.start, fs_enet_data.phy_addr);
  869. fs_enet_data.bus_id = (char*)&bus_id[i];
  870. fs_enet_data.init_ioports = init_fec_ioports;
  871. }
  872. if (strstr(model, "SCC")) {
  873. ret = of_address_to_resource(np, 1, &r[1]);
  874. if (ret)
  875. goto err;
  876. r[1].name = enet_pram;
  877. r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
  878. r[2].flags = IORESOURCE_IRQ;
  879. r[2].name = enet_irq;
  880. fs_enet_dev =
  881. platform_device_register_simple("fsl-cpm-scc", i, &r[0], 3);
  882. if (IS_ERR(fs_enet_dev)) {
  883. ret = PTR_ERR(fs_enet_dev);
  884. goto err;
  885. }
  886. fs_enet_data.rx_ring = 64;
  887. fs_enet_data.tx_ring = 8;
  888. fs_enet_data.rx_copybreak = 240;
  889. fs_enet_data.use_napi = 1;
  890. fs_enet_data.napi_weight = 17;
  891. snprintf((char*)&bus_id[i], BUS_ID_SIZE, "%s", "fixed@10:1");
  892. fs_enet_data.bus_id = (char*)&bus_id[i];
  893. fs_enet_data.init_ioports = init_scc_ioports;
  894. }
  895. of_node_put(phy);
  896. of_node_put(mdio);
  897. ret = platform_device_add_data(fs_enet_dev, &fs_enet_data,
  898. sizeof(struct
  899. fs_platform_info));
  900. if (ret)
  901. goto unreg;
  902. }
  903. return 0;
  904. unreg:
  905. platform_device_unregister(fs_enet_dev);
  906. err:
  907. return ret;
  908. }
  909. arch_initcall(fs_enet_of_init);
  910. static int __init fsl_pcmcia_of_init(void)
  911. {
  912. struct device_node *np = NULL;
  913. /*
  914. * Register all the devices which type is "pcmcia"
  915. */
  916. while ((np = of_find_compatible_node(np,
  917. "pcmcia", "fsl,pq-pcmcia")) != NULL)
  918. of_platform_device_create(np, "m8xx-pcmcia", NULL);
  919. return 0;
  920. }
  921. arch_initcall(fsl_pcmcia_of_init);
  922. static const char *smc_regs = "regs";
  923. static const char *smc_pram = "pram";
  924. static int __init cpm_smc_uart_of_init(void)
  925. {
  926. struct device_node *np;
  927. unsigned int i;
  928. struct platform_device *cpm_uart_dev;
  929. int ret;
  930. for (np = NULL, i = 0;
  931. (np = of_find_compatible_node(np, "serial", "cpm_uart")) != NULL;
  932. i++) {
  933. struct resource r[3];
  934. struct fs_uart_platform_info cpm_uart_data;
  935. const int *id;
  936. const char *model;
  937. memset(r, 0, sizeof(r));
  938. memset(&cpm_uart_data, 0, sizeof(cpm_uart_data));
  939. ret = of_address_to_resource(np, 0, &r[0]);
  940. if (ret)
  941. goto err;
  942. r[0].name = smc_regs;
  943. ret = of_address_to_resource(np, 1, &r[1]);
  944. if (ret)
  945. goto err;
  946. r[1].name = smc_pram;
  947. r[2].start = r[2].end = irq_of_parse_and_map(np, 0);
  948. r[2].flags = IORESOURCE_IRQ;
  949. cpm_uart_dev =
  950. platform_device_register_simple("fsl-cpm-smc:uart", i, &r[0], 3);
  951. if (IS_ERR(cpm_uart_dev)) {
  952. ret = PTR_ERR(cpm_uart_dev);
  953. goto err;
  954. }
  955. model = of_get_property(np, "model", NULL);
  956. strcpy(cpm_uart_data.fs_type, model);
  957. id = of_get_property(np, "device-id", NULL);
  958. cpm_uart_data.fs_no = *id;
  959. cpm_uart_data.uart_clk = ppc_proc_freq;
  960. cpm_uart_data.tx_num_fifo = 4;
  961. cpm_uart_data.tx_buf_size = 32;
  962. cpm_uart_data.rx_num_fifo = 4;
  963. cpm_uart_data.rx_buf_size = 32;
  964. ret =
  965. platform_device_add_data(cpm_uart_dev, &cpm_uart_data,
  966. sizeof(struct
  967. fs_uart_platform_info));
  968. if (ret)
  969. goto unreg;
  970. }
  971. return 0;
  972. unreg:
  973. platform_device_unregister(cpm_uart_dev);
  974. err:
  975. return ret;
  976. }
  977. arch_initcall(cpm_smc_uart_of_init);
  978. #endif /* CONFIG_8xx */
  979. #endif /* CONFIG_PPC_CPM_NEW_BINDING */
  980. int __init fsl_spi_init(struct spi_board_info *board_infos,
  981. unsigned int num_board_infos,
  982. void (*activate_cs)(u8 cs, u8 polarity),
  983. void (*deactivate_cs)(u8 cs, u8 polarity))
  984. {
  985. struct device_node *np;
  986. unsigned int i;
  987. const u32 *sysclk;
  988. /* SPI controller is either clocked from QE or SoC clock */
  989. np = of_find_node_by_type(NULL, "qe");
  990. if (!np)
  991. np = of_find_node_by_type(NULL, "soc");
  992. if (!np)
  993. return -ENODEV;
  994. sysclk = of_get_property(np, "bus-frequency", NULL);
  995. if (!sysclk)
  996. return -ENODEV;
  997. for (np = NULL, i = 1;
  998. (np = of_find_compatible_node(np, "spi", "fsl_spi")) != NULL;
  999. i++) {
  1000. int ret = 0;
  1001. unsigned int j;
  1002. const void *prop;
  1003. struct resource res[2];
  1004. struct platform_device *pdev;
  1005. struct fsl_spi_platform_data pdata = {
  1006. .activate_cs = activate_cs,
  1007. .deactivate_cs = deactivate_cs,
  1008. };
  1009. memset(res, 0, sizeof(res));
  1010. pdata.sysclk = *sysclk;
  1011. prop = of_get_property(np, "reg", NULL);
  1012. if (!prop)
  1013. goto err;
  1014. pdata.bus_num = *(u32 *)prop;
  1015. prop = of_get_property(np, "mode", NULL);
  1016. if (prop && !strcmp(prop, "cpu-qe"))
  1017. pdata.qe_mode = 1;
  1018. for (j = 0; j < num_board_infos; j++) {
  1019. if (board_infos[j].bus_num == pdata.bus_num)
  1020. pdata.max_chipselect++;
  1021. }
  1022. if (!pdata.max_chipselect)
  1023. goto err;
  1024. ret = of_address_to_resource(np, 0, &res[0]);
  1025. if (ret)
  1026. goto err;
  1027. ret = of_irq_to_resource(np, 0, &res[1]);
  1028. if (ret == NO_IRQ)
  1029. goto err;
  1030. pdev = platform_device_alloc("mpc83xx_spi", i);
  1031. if (!pdev)
  1032. goto err;
  1033. ret = platform_device_add_data(pdev, &pdata, sizeof(pdata));
  1034. if (ret)
  1035. goto unreg;
  1036. ret = platform_device_add_resources(pdev, res,
  1037. ARRAY_SIZE(res));
  1038. if (ret)
  1039. goto unreg;
  1040. ret = platform_device_register(pdev);
  1041. if (ret)
  1042. goto unreg;
  1043. continue;
  1044. unreg:
  1045. platform_device_del(pdev);
  1046. err:
  1047. continue;
  1048. }
  1049. return spi_register_board_info(board_infos, num_board_infos);
  1050. }
  1051. #if defined(CONFIG_PPC_85xx) || defined(CONFIG_PPC_86xx)
  1052. static __be32 __iomem *rstcr;
  1053. static int __init setup_rstcr(void)
  1054. {
  1055. struct device_node *np;
  1056. np = of_find_node_by_name(NULL, "global-utilities");
  1057. if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
  1058. const u32 *prop = of_get_property(np, "reg", NULL);
  1059. if (prop) {
  1060. /* map reset control register
  1061. * 0xE00B0 is offset of reset control register
  1062. */
  1063. rstcr = ioremap(get_immrbase() + *prop + 0xB0, 0xff);
  1064. if (!rstcr)
  1065. printk (KERN_EMERG "Error: reset control "
  1066. "register not mapped!\n");
  1067. }
  1068. } else
  1069. printk (KERN_INFO "rstcr compatible register does not exist!\n");
  1070. if (np)
  1071. of_node_put(np);
  1072. return 0;
  1073. }
  1074. arch_initcall(setup_rstcr);
  1075. void fsl_rstcr_restart(char *cmd)
  1076. {
  1077. local_irq_disable();
  1078. if (rstcr)
  1079. /* set reset control register */
  1080. out_be32(rstcr, 0x2); /* HRESET_REQ */
  1081. while (1) ;
  1082. }
  1083. #endif