cx88-dvb.c 44 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-simple.h"
  46. #include "tda9887.h"
  47. #include "s5h1411.h"
  48. #include "stv0299.h"
  49. #include "z0194a.h"
  50. #include "stv0288.h"
  51. #include "stb6000.h"
  52. #include "cx24116.h"
  53. #include "stv0900.h"
  54. #include "stb6100.h"
  55. #include "stb6100_proc.h"
  56. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  57. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  58. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  59. MODULE_LICENSE("GPL");
  60. static unsigned int debug;
  61. module_param(debug, int, 0644);
  62. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  63. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  64. #define dprintk(level,fmt, arg...) if (debug >= level) \
  65. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  66. /* ------------------------------------------------------------------ */
  67. static int dvb_buf_setup(struct videobuf_queue *q,
  68. unsigned int *count, unsigned int *size)
  69. {
  70. struct cx8802_dev *dev = q->priv_data;
  71. dev->ts_packet_size = 188 * 4;
  72. dev->ts_packet_count = 32;
  73. *size = dev->ts_packet_size * dev->ts_packet_count;
  74. *count = 32;
  75. return 0;
  76. }
  77. static int dvb_buf_prepare(struct videobuf_queue *q,
  78. struct videobuf_buffer *vb, enum v4l2_field field)
  79. {
  80. struct cx8802_dev *dev = q->priv_data;
  81. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  82. }
  83. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  84. {
  85. struct cx8802_dev *dev = q->priv_data;
  86. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  87. }
  88. static void dvb_buf_release(struct videobuf_queue *q,
  89. struct videobuf_buffer *vb)
  90. {
  91. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  92. }
  93. static struct videobuf_queue_ops dvb_qops = {
  94. .buf_setup = dvb_buf_setup,
  95. .buf_prepare = dvb_buf_prepare,
  96. .buf_queue = dvb_buf_queue,
  97. .buf_release = dvb_buf_release,
  98. };
  99. /* ------------------------------------------------------------------ */
  100. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  101. {
  102. struct cx8802_dev *dev= fe->dvb->priv;
  103. struct cx8802_driver *drv = NULL;
  104. int ret = 0;
  105. int fe_id;
  106. fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
  107. if (!fe_id) {
  108. printk(KERN_ERR "%s() No frontend found\n", __func__);
  109. return -EINVAL;
  110. }
  111. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  112. if (drv) {
  113. if (acquire){
  114. dev->frontends.active_fe_id = fe_id;
  115. ret = drv->request_acquire(drv);
  116. } else {
  117. ret = drv->request_release(drv);
  118. dev->frontends.active_fe_id = 0;
  119. }
  120. }
  121. return ret;
  122. }
  123. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  124. {
  125. struct videobuf_dvb_frontends *f;
  126. struct videobuf_dvb_frontend *fe;
  127. if (!core->dvbdev)
  128. return;
  129. f = &core->dvbdev->frontends;
  130. if (!f)
  131. return;
  132. if (f->gate <= 1) /* undefined or fe0 */
  133. fe = videobuf_dvb_get_frontend(f, 1);
  134. else
  135. fe = videobuf_dvb_get_frontend(f, f->gate);
  136. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  137. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  138. }
  139. /* ------------------------------------------------------------------ */
  140. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  141. {
  142. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  143. static u8 reset [] = { RESET, 0x80 };
  144. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  145. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  146. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  147. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  148. mt352_write(fe, clock_config, sizeof(clock_config));
  149. udelay(200);
  150. mt352_write(fe, reset, sizeof(reset));
  151. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  152. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  153. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  154. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  155. return 0;
  156. }
  157. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  158. {
  159. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  160. static u8 reset [] = { RESET, 0x80 };
  161. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  162. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  163. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  164. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  165. mt352_write(fe, clock_config, sizeof(clock_config));
  166. udelay(200);
  167. mt352_write(fe, reset, sizeof(reset));
  168. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  169. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  170. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  171. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  172. return 0;
  173. }
  174. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  175. {
  176. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  177. static u8 reset [] = { 0x50, 0x80 };
  178. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  179. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  180. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  181. static u8 dntv_extra[] = { 0xB5, 0x7A };
  182. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  183. mt352_write(fe, clock_config, sizeof(clock_config));
  184. udelay(2000);
  185. mt352_write(fe, reset, sizeof(reset));
  186. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  187. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  188. udelay(2000);
  189. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  190. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  191. return 0;
  192. }
  193. static struct mt352_config dvico_fusionhdtv = {
  194. .demod_address = 0x0f,
  195. .demod_init = dvico_fusionhdtv_demod_init,
  196. };
  197. static struct mt352_config dntv_live_dvbt_config = {
  198. .demod_address = 0x0f,
  199. .demod_init = dntv_live_dvbt_demod_init,
  200. };
  201. static struct mt352_config dvico_fusionhdtv_dual = {
  202. .demod_address = 0x0f,
  203. .demod_init = dvico_dual_demod_init,
  204. };
  205. static struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
  206. .demod_address = (0x1e >> 1),
  207. .no_tuner = 1,
  208. .if2 = 45600,
  209. };
  210. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  211. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  212. {
  213. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  214. static u8 reset [] = { 0x50, 0x80 };
  215. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  216. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  217. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  218. static u8 dntv_extra[] = { 0xB5, 0x7A };
  219. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  220. mt352_write(fe, clock_config, sizeof(clock_config));
  221. udelay(2000);
  222. mt352_write(fe, reset, sizeof(reset));
  223. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  224. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  225. udelay(2000);
  226. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  227. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  228. return 0;
  229. }
  230. static struct mt352_config dntv_live_dvbt_pro_config = {
  231. .demod_address = 0x0f,
  232. .no_tuner = 1,
  233. .demod_init = dntv_live_dvbt_pro_demod_init,
  234. };
  235. #endif
  236. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  237. .demod_address = 0x0f,
  238. .no_tuner = 1,
  239. };
  240. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  241. .demod_address = 0x0f,
  242. .if2 = 45600,
  243. .no_tuner = 1,
  244. };
  245. static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  246. .demod_address = 0x0f,
  247. .if2 = 4560,
  248. .no_tuner = 1,
  249. .demod_init = dvico_fusionhdtv_demod_init,
  250. };
  251. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  252. .demod_address = 0x0f,
  253. };
  254. static struct cx22702_config connexant_refboard_config = {
  255. .demod_address = 0x43,
  256. .output_mode = CX22702_SERIAL_OUTPUT,
  257. };
  258. static struct cx22702_config hauppauge_hvr_config = {
  259. .demod_address = 0x63,
  260. .output_mode = CX22702_SERIAL_OUTPUT,
  261. };
  262. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  263. {
  264. struct cx8802_dev *dev= fe->dvb->priv;
  265. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  266. return 0;
  267. }
  268. static struct or51132_config pchdtv_hd3000 = {
  269. .demod_address = 0x15,
  270. .set_ts_params = or51132_set_ts_param,
  271. };
  272. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  273. {
  274. struct cx8802_dev *dev= fe->dvb->priv;
  275. struct cx88_core *core = dev->core;
  276. dprintk(1, "%s: index = %d\n", __func__, index);
  277. if (index == 0)
  278. cx_clear(MO_GP0_IO, 8);
  279. else
  280. cx_set(MO_GP0_IO, 8);
  281. return 0;
  282. }
  283. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  284. {
  285. struct cx8802_dev *dev= fe->dvb->priv;
  286. if (is_punctured)
  287. dev->ts_gen_cntrl |= 0x04;
  288. else
  289. dev->ts_gen_cntrl &= ~0x04;
  290. return 0;
  291. }
  292. static struct lgdt330x_config fusionhdtv_3_gold = {
  293. .demod_address = 0x0e,
  294. .demod_chip = LGDT3302,
  295. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  296. .set_ts_params = lgdt330x_set_ts_param,
  297. };
  298. static struct lgdt330x_config fusionhdtv_5_gold = {
  299. .demod_address = 0x0e,
  300. .demod_chip = LGDT3303,
  301. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  302. .set_ts_params = lgdt330x_set_ts_param,
  303. };
  304. static struct lgdt330x_config pchdtv_hd5500 = {
  305. .demod_address = 0x59,
  306. .demod_chip = LGDT3303,
  307. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  308. .set_ts_params = lgdt330x_set_ts_param,
  309. };
  310. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  311. {
  312. struct cx8802_dev *dev= fe->dvb->priv;
  313. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  314. return 0;
  315. }
  316. static struct nxt200x_config ati_hdtvwonder = {
  317. .demod_address = 0x0a,
  318. .set_ts_params = nxt200x_set_ts_param,
  319. };
  320. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  321. int is_punctured)
  322. {
  323. struct cx8802_dev *dev= fe->dvb->priv;
  324. dev->ts_gen_cntrl = 0x02;
  325. return 0;
  326. }
  327. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  328. fe_sec_voltage_t voltage)
  329. {
  330. struct cx8802_dev *dev= fe->dvb->priv;
  331. struct cx88_core *core = dev->core;
  332. if (voltage == SEC_VOLTAGE_OFF)
  333. cx_write(MO_GP0_IO, 0x000006fb);
  334. else
  335. cx_write(MO_GP0_IO, 0x000006f9);
  336. if (core->prev_set_voltage)
  337. return core->prev_set_voltage(fe, voltage);
  338. return 0;
  339. }
  340. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  341. fe_sec_voltage_t voltage)
  342. {
  343. struct cx8802_dev *dev= fe->dvb->priv;
  344. struct cx88_core *core = dev->core;
  345. if (voltage == SEC_VOLTAGE_OFF) {
  346. dprintk(1,"LNB Voltage OFF\n");
  347. cx_write(MO_GP0_IO, 0x0000efff);
  348. }
  349. if (core->prev_set_voltage)
  350. return core->prev_set_voltage(fe, voltage);
  351. return 0;
  352. }
  353. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  354. fe_sec_voltage_t voltage)
  355. {
  356. struct cx8802_dev *dev= fe->dvb->priv;
  357. struct cx88_core *core = dev->core;
  358. cx_set(MO_GP0_IO, 0x6040);
  359. switch (voltage) {
  360. case SEC_VOLTAGE_13:
  361. cx_clear(MO_GP0_IO, 0x20);
  362. break;
  363. case SEC_VOLTAGE_18:
  364. cx_set(MO_GP0_IO, 0x20);
  365. break;
  366. case SEC_VOLTAGE_OFF:
  367. cx_clear(MO_GP0_IO, 0x20);
  368. break;
  369. }
  370. if (core->prev_set_voltage)
  371. return core->prev_set_voltage(fe, voltage);
  372. return 0;
  373. }
  374. static struct cx24123_config geniatech_dvbs_config = {
  375. .demod_address = 0x55,
  376. .set_ts_params = cx24123_set_ts_param,
  377. };
  378. static struct cx24123_config hauppauge_novas_config = {
  379. .demod_address = 0x55,
  380. .set_ts_params = cx24123_set_ts_param,
  381. };
  382. static struct cx24123_config kworld_dvbs_100_config = {
  383. .demod_address = 0x15,
  384. .set_ts_params = cx24123_set_ts_param,
  385. .lnb_polarity = 1,
  386. };
  387. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  388. .demod_address = 0x32 >> 1,
  389. .output_mode = S5H1409_PARALLEL_OUTPUT,
  390. .gpio = S5H1409_GPIO_ON,
  391. .qam_if = 44000,
  392. .inversion = S5H1409_INVERSION_OFF,
  393. .status_mode = S5H1409_DEMODLOCKING,
  394. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  395. };
  396. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  397. .demod_address = 0x32 >> 1,
  398. .output_mode = S5H1409_SERIAL_OUTPUT,
  399. .gpio = S5H1409_GPIO_OFF,
  400. .inversion = S5H1409_INVERSION_OFF,
  401. .status_mode = S5H1409_DEMODLOCKING,
  402. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  403. };
  404. static struct s5h1409_config kworld_atsc_120_config = {
  405. .demod_address = 0x32 >> 1,
  406. .output_mode = S5H1409_SERIAL_OUTPUT,
  407. .gpio = S5H1409_GPIO_OFF,
  408. .inversion = S5H1409_INVERSION_OFF,
  409. .status_mode = S5H1409_DEMODLOCKING,
  410. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  411. };
  412. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  413. .i2c_address = 0x64,
  414. .if_khz = 5380,
  415. };
  416. static struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  417. .demod_address = (0x1e >> 1),
  418. .no_tuner = 1,
  419. .if2 = 45600,
  420. };
  421. static struct zl10353_config cx88_geniatech_x8000_mt = {
  422. .demod_address = (0x1e >> 1),
  423. .no_tuner = 1,
  424. .disable_i2c_gate_ctrl = 1,
  425. };
  426. static struct s5h1411_config dvico_fusionhdtv7_config = {
  427. .output_mode = S5H1411_SERIAL_OUTPUT,
  428. .gpio = S5H1411_GPIO_ON,
  429. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  430. .qam_if = S5H1411_IF_44000,
  431. .vsb_if = S5H1411_IF_44000,
  432. .inversion = S5H1411_INVERSION_OFF,
  433. .status_mode = S5H1411_DEMODLOCKING
  434. };
  435. static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  436. .i2c_address = 0xc2 >> 1,
  437. .if_khz = 5380,
  438. };
  439. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  440. {
  441. struct dvb_frontend *fe;
  442. struct videobuf_dvb_frontend *fe0 = NULL;
  443. struct xc2028_ctrl ctl;
  444. struct xc2028_config cfg = {
  445. .i2c_adap = &dev->core->i2c_adap,
  446. .i2c_addr = addr,
  447. .ctrl = &ctl,
  448. };
  449. /* Get the first frontend */
  450. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  451. if (!fe0)
  452. return -EINVAL;
  453. if (!fe0->dvb.frontend) {
  454. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  455. "Can't attach xc3028\n",
  456. dev->core->name);
  457. return -EINVAL;
  458. }
  459. /*
  460. * Some xc3028 devices may be hidden by an I2C gate. This is known
  461. * to happen with some s5h1409-based devices.
  462. * Now that I2C gate is open, sets up xc3028 configuration
  463. */
  464. cx88_setup_xc3028(dev->core, &ctl);
  465. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  466. if (!fe) {
  467. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  468. dev->core->name);
  469. dvb_frontend_detach(fe0->dvb.frontend);
  470. dvb_unregister_frontend(fe0->dvb.frontend);
  471. fe0->dvb.frontend = NULL;
  472. return -EINVAL;
  473. }
  474. printk(KERN_INFO "%s/2: xc3028 attached\n",
  475. dev->core->name);
  476. return 0;
  477. }
  478. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  479. int is_punctured)
  480. {
  481. struct cx8802_dev *dev = fe->dvb->priv;
  482. dev->ts_gen_cntrl = 0x2;
  483. return 0;
  484. }
  485. static int stv0900_set_ts_param(struct dvb_frontend *fe,
  486. int is_punctured)
  487. {
  488. struct cx8802_dev *dev = fe->dvb->priv;
  489. dev->ts_gen_cntrl = 0;
  490. return 0;
  491. }
  492. static int cx24116_reset_device(struct dvb_frontend *fe)
  493. {
  494. struct cx8802_dev *dev = fe->dvb->priv;
  495. struct cx88_core *core = dev->core;
  496. /* Reset the part */
  497. /* Put the cx24116 into reset */
  498. cx_write(MO_SRST_IO, 0);
  499. msleep(10);
  500. /* Take the cx24116 out of reset */
  501. cx_write(MO_SRST_IO, 1);
  502. msleep(10);
  503. return 0;
  504. }
  505. static struct cx24116_config hauppauge_hvr4000_config = {
  506. .demod_address = 0x05,
  507. .set_ts_params = cx24116_set_ts_param,
  508. .reset_device = cx24116_reset_device,
  509. };
  510. static struct cx24116_config tevii_s460_config = {
  511. .demod_address = 0x55,
  512. .set_ts_params = cx24116_set_ts_param,
  513. .reset_device = cx24116_reset_device,
  514. };
  515. static struct stv0900_config prof_7301_stv0900_config = {
  516. .demod_address = 0x6a,
  517. /* demod_mode = 0,*/
  518. .xtal = 27000000,
  519. .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
  520. .diseqc_mode = 2,/* 2/3 PWM */
  521. .tun1_maddress = 0,/* 0x60 */
  522. .tun1_adc = 0,/* 2 Vpp */
  523. .path1_mode = 3,
  524. .set_ts_params = stv0900_set_ts_param,
  525. };
  526. static struct stb6100_config prof_7301_stb6100_config = {
  527. .tuner_address = 0x60,
  528. .refclock = 27000000,
  529. };
  530. static struct stv0299_config tevii_tuner_sharp_config = {
  531. .demod_address = 0x68,
  532. .inittab = sharp_z0194a_inittab,
  533. .mclk = 88000000UL,
  534. .invert = 1,
  535. .skip_reinit = 0,
  536. .lock_output = 1,
  537. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  538. .min_delay_ms = 100,
  539. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  540. .set_ts_params = cx24116_set_ts_param,
  541. };
  542. static struct stv0288_config tevii_tuner_earda_config = {
  543. .demod_address = 0x68,
  544. .min_delay_ms = 100,
  545. .set_ts_params = cx24116_set_ts_param,
  546. };
  547. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  548. {
  549. struct cx88_core *core = dev->core;
  550. struct videobuf_dvb_frontend *fe = NULL;
  551. int i;
  552. mutex_init(&dev->frontends.lock);
  553. INIT_LIST_HEAD(&dev->frontends.felist);
  554. if (!core->board.num_frontends)
  555. return -ENODEV;
  556. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  557. core->board.num_frontends);
  558. for (i = 1; i <= core->board.num_frontends; i++) {
  559. fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
  560. if (!fe) {
  561. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  562. videobuf_dvb_dealloc_frontends(&dev->frontends);
  563. return -ENOMEM;
  564. }
  565. }
  566. return 0;
  567. }
  568. static u8 samsung_smt_7020_inittab[] = {
  569. 0x01, 0x15,
  570. 0x02, 0x00,
  571. 0x03, 0x00,
  572. 0x04, 0x7D,
  573. 0x05, 0x0F,
  574. 0x06, 0x02,
  575. 0x07, 0x00,
  576. 0x08, 0x60,
  577. 0x0A, 0xC2,
  578. 0x0B, 0x00,
  579. 0x0C, 0x01,
  580. 0x0D, 0x81,
  581. 0x0E, 0x44,
  582. 0x0F, 0x09,
  583. 0x10, 0x3C,
  584. 0x11, 0x84,
  585. 0x12, 0xDA,
  586. 0x13, 0x99,
  587. 0x14, 0x8D,
  588. 0x15, 0xCE,
  589. 0x16, 0xE8,
  590. 0x17, 0x43,
  591. 0x18, 0x1C,
  592. 0x19, 0x1B,
  593. 0x1A, 0x1D,
  594. 0x1C, 0x12,
  595. 0x1D, 0x00,
  596. 0x1E, 0x00,
  597. 0x1F, 0x00,
  598. 0x20, 0x00,
  599. 0x21, 0x00,
  600. 0x22, 0x00,
  601. 0x23, 0x00,
  602. 0x28, 0x02,
  603. 0x29, 0x28,
  604. 0x2A, 0x14,
  605. 0x2B, 0x0F,
  606. 0x2C, 0x09,
  607. 0x2D, 0x05,
  608. 0x31, 0x1F,
  609. 0x32, 0x19,
  610. 0x33, 0xFC,
  611. 0x34, 0x13,
  612. 0xff, 0xff,
  613. };
  614. static int samsung_smt_7020_tuner_set_params(struct dvb_frontend *fe,
  615. struct dvb_frontend_parameters *params)
  616. {
  617. struct cx8802_dev *dev = fe->dvb->priv;
  618. u8 buf[4];
  619. u32 div;
  620. struct i2c_msg msg = {
  621. .addr = 0x61,
  622. .flags = 0,
  623. .buf = buf,
  624. .len = sizeof(buf) };
  625. div = params->frequency / 125;
  626. buf[0] = (div >> 8) & 0x7f;
  627. buf[1] = div & 0xff;
  628. buf[2] = 0x84; /* 0xC4 */
  629. buf[3] = 0x00;
  630. if (params->frequency < 1500000)
  631. buf[3] |= 0x10;
  632. if (fe->ops.i2c_gate_ctrl)
  633. fe->ops.i2c_gate_ctrl(fe, 1);
  634. if (i2c_transfer(&dev->core->i2c_adap, &msg, 1) != 1)
  635. return -EIO;
  636. return 0;
  637. }
  638. static int samsung_smt_7020_set_tone(struct dvb_frontend *fe,
  639. fe_sec_tone_mode_t tone)
  640. {
  641. struct cx8802_dev *dev = fe->dvb->priv;
  642. struct cx88_core *core = dev->core;
  643. cx_set(MO_GP0_IO, 0x0800);
  644. switch (tone) {
  645. case SEC_TONE_ON:
  646. cx_set(MO_GP0_IO, 0x08);
  647. break;
  648. case SEC_TONE_OFF:
  649. cx_clear(MO_GP0_IO, 0x08);
  650. break;
  651. default:
  652. return -EINVAL;
  653. }
  654. return 0;
  655. }
  656. static int samsung_smt_7020_set_voltage(struct dvb_frontend *fe,
  657. fe_sec_voltage_t voltage)
  658. {
  659. struct cx8802_dev *dev = fe->dvb->priv;
  660. struct cx88_core *core = dev->core;
  661. u8 data;
  662. struct i2c_msg msg = {
  663. .addr = 8,
  664. .flags = 0,
  665. .buf = &data,
  666. .len = sizeof(data) };
  667. cx_set(MO_GP0_IO, 0x8000);
  668. switch (voltage) {
  669. case SEC_VOLTAGE_OFF:
  670. break;
  671. case SEC_VOLTAGE_13:
  672. data = ISL6421_EN1 | ISL6421_LLC1;
  673. cx_clear(MO_GP0_IO, 0x80);
  674. break;
  675. case SEC_VOLTAGE_18:
  676. data = ISL6421_EN1 | ISL6421_LLC1 | ISL6421_VSEL1;
  677. cx_clear(MO_GP0_IO, 0x80);
  678. break;
  679. default:
  680. return -EINVAL;
  681. };
  682. return (i2c_transfer(&dev->core->i2c_adap, &msg, 1) == 1) ? 0 : -EIO;
  683. }
  684. static int samsung_smt_7020_stv0299_set_symbol_rate(struct dvb_frontend *fe,
  685. u32 srate, u32 ratio)
  686. {
  687. u8 aclk = 0;
  688. u8 bclk = 0;
  689. if (srate < 1500000) {
  690. aclk = 0xb7;
  691. bclk = 0x47;
  692. } else if (srate < 3000000) {
  693. aclk = 0xb7;
  694. bclk = 0x4b;
  695. } else if (srate < 7000000) {
  696. aclk = 0xb7;
  697. bclk = 0x4f;
  698. } else if (srate < 14000000) {
  699. aclk = 0xb7;
  700. bclk = 0x53;
  701. } else if (srate < 30000000) {
  702. aclk = 0xb6;
  703. bclk = 0x53;
  704. } else if (srate < 45000000) {
  705. aclk = 0xb4;
  706. bclk = 0x51;
  707. }
  708. stv0299_writereg(fe, 0x13, aclk);
  709. stv0299_writereg(fe, 0x14, bclk);
  710. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  711. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  712. stv0299_writereg(fe, 0x21, ratio & 0xf0);
  713. return 0;
  714. }
  715. static struct stv0299_config samsung_stv0299_config = {
  716. .demod_address = 0x68,
  717. .inittab = samsung_smt_7020_inittab,
  718. .mclk = 88000000UL,
  719. .invert = 0,
  720. .skip_reinit = 0,
  721. .lock_output = STV0299_LOCKOUTPUT_LK,
  722. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  723. .min_delay_ms = 100,
  724. .set_symbol_rate = samsung_smt_7020_stv0299_set_symbol_rate,
  725. };
  726. static int dvb_register(struct cx8802_dev *dev)
  727. {
  728. struct cx88_core *core = dev->core;
  729. struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
  730. int mfe_shared = 0; /* bus not shared by default */
  731. if (0 != core->i2c_rc) {
  732. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  733. goto frontend_detach;
  734. }
  735. /* Get the first frontend */
  736. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  737. if (!fe0)
  738. goto frontend_detach;
  739. /* multi-frontend gate control is undefined or defaults to fe0 */
  740. dev->frontends.gate = 0;
  741. /* Sets the gate control callback to be used by i2c command calls */
  742. core->gate_ctrl = cx88_dvb_gate_ctrl;
  743. /* init frontend(s) */
  744. switch (core->boardnr) {
  745. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  746. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  747. &connexant_refboard_config,
  748. &core->i2c_adap);
  749. if (fe0->dvb.frontend != NULL) {
  750. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  751. 0x61, &core->i2c_adap,
  752. DVB_PLL_THOMSON_DTT759X))
  753. goto frontend_detach;
  754. }
  755. break;
  756. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  757. case CX88_BOARD_CONEXANT_DVB_T1:
  758. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  759. case CX88_BOARD_WINFAST_DTV1000:
  760. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  761. &connexant_refboard_config,
  762. &core->i2c_adap);
  763. if (fe0->dvb.frontend != NULL) {
  764. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  765. 0x60, &core->i2c_adap,
  766. DVB_PLL_THOMSON_DTT7579))
  767. goto frontend_detach;
  768. }
  769. break;
  770. case CX88_BOARD_WINFAST_DTV2000H:
  771. case CX88_BOARD_WINFAST_DTV2000H_J:
  772. case CX88_BOARD_HAUPPAUGE_HVR1100:
  773. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  774. case CX88_BOARD_HAUPPAUGE_HVR1300:
  775. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  776. &hauppauge_hvr_config,
  777. &core->i2c_adap);
  778. if (fe0->dvb.frontend != NULL) {
  779. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  780. &core->i2c_adap, 0x61,
  781. TUNER_PHILIPS_FMD1216ME_MK3))
  782. goto frontend_detach;
  783. }
  784. break;
  785. case CX88_BOARD_HAUPPAUGE_HVR3000:
  786. /* MFE frontend 1 */
  787. mfe_shared = 1;
  788. dev->frontends.gate = 2;
  789. /* DVB-S init */
  790. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  791. &hauppauge_novas_config,
  792. &dev->core->i2c_adap);
  793. if (fe0->dvb.frontend) {
  794. if (!dvb_attach(isl6421_attach,
  795. fe0->dvb.frontend,
  796. &dev->core->i2c_adap,
  797. 0x08, ISL6421_DCL, 0x00))
  798. goto frontend_detach;
  799. }
  800. /* MFE frontend 2 */
  801. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  802. if (!fe1)
  803. goto frontend_detach;
  804. /* DVB-T init */
  805. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  806. &hauppauge_hvr_config,
  807. &dev->core->i2c_adap);
  808. if (fe1->dvb.frontend) {
  809. fe1->dvb.frontend->id = 1;
  810. if (!dvb_attach(simple_tuner_attach,
  811. fe1->dvb.frontend,
  812. &dev->core->i2c_adap,
  813. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  814. goto frontend_detach;
  815. }
  816. break;
  817. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  818. fe0->dvb.frontend = dvb_attach(mt352_attach,
  819. &dvico_fusionhdtv,
  820. &core->i2c_adap);
  821. if (fe0->dvb.frontend != NULL) {
  822. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  823. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  824. goto frontend_detach;
  825. break;
  826. }
  827. /* ZL10353 replaces MT352 on later cards */
  828. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  829. &dvico_fusionhdtv_plus_v1_1,
  830. &core->i2c_adap);
  831. if (fe0->dvb.frontend != NULL) {
  832. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  833. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  834. goto frontend_detach;
  835. }
  836. break;
  837. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  838. /* The tin box says DEE1601, but it seems to be DTT7579
  839. * compatible, with a slightly different MT352 AGC gain. */
  840. fe0->dvb.frontend = dvb_attach(mt352_attach,
  841. &dvico_fusionhdtv_dual,
  842. &core->i2c_adap);
  843. if (fe0->dvb.frontend != NULL) {
  844. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  845. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  846. goto frontend_detach;
  847. break;
  848. }
  849. /* ZL10353 replaces MT352 on later cards */
  850. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  851. &dvico_fusionhdtv_plus_v1_1,
  852. &core->i2c_adap);
  853. if (fe0->dvb.frontend != NULL) {
  854. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  855. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  856. goto frontend_detach;
  857. }
  858. break;
  859. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  860. fe0->dvb.frontend = dvb_attach(mt352_attach,
  861. &dvico_fusionhdtv,
  862. &core->i2c_adap);
  863. if (fe0->dvb.frontend != NULL) {
  864. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  865. 0x61, NULL, DVB_PLL_LG_Z201))
  866. goto frontend_detach;
  867. }
  868. break;
  869. case CX88_BOARD_KWORLD_DVB_T:
  870. case CX88_BOARD_DNTV_LIVE_DVB_T:
  871. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  872. fe0->dvb.frontend = dvb_attach(mt352_attach,
  873. &dntv_live_dvbt_config,
  874. &core->i2c_adap);
  875. if (fe0->dvb.frontend != NULL) {
  876. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  877. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  878. goto frontend_detach;
  879. }
  880. break;
  881. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  882. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  883. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  884. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  885. &dev->vp3054->adap);
  886. if (fe0->dvb.frontend != NULL) {
  887. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  888. &core->i2c_adap, 0x61,
  889. TUNER_PHILIPS_FMD1216ME_MK3))
  890. goto frontend_detach;
  891. }
  892. #else
  893. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  894. core->name);
  895. #endif
  896. break;
  897. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  898. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  899. &dvico_fusionhdtv_hybrid,
  900. &core->i2c_adap);
  901. if (fe0->dvb.frontend != NULL) {
  902. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  903. &core->i2c_adap, 0x61,
  904. TUNER_THOMSON_FE6600))
  905. goto frontend_detach;
  906. }
  907. break;
  908. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  909. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  910. &dvico_fusionhdtv_xc3028,
  911. &core->i2c_adap);
  912. if (fe0->dvb.frontend == NULL)
  913. fe0->dvb.frontend = dvb_attach(mt352_attach,
  914. &dvico_fusionhdtv_mt352_xc3028,
  915. &core->i2c_adap);
  916. /*
  917. * On this board, the demod provides the I2C bus pullup.
  918. * We must not permit gate_ctrl to be performed, or
  919. * the xc3028 cannot communicate on the bus.
  920. */
  921. if (fe0->dvb.frontend)
  922. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  923. if (attach_xc3028(0x61, dev) < 0)
  924. goto frontend_detach;
  925. break;
  926. case CX88_BOARD_PCHDTV_HD3000:
  927. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  928. &core->i2c_adap);
  929. if (fe0->dvb.frontend != NULL) {
  930. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  931. &core->i2c_adap, 0x61,
  932. TUNER_THOMSON_DTT761X))
  933. goto frontend_detach;
  934. }
  935. break;
  936. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  937. dev->ts_gen_cntrl = 0x08;
  938. /* Do a hardware reset of chip before using it. */
  939. cx_clear(MO_GP0_IO, 1);
  940. mdelay(100);
  941. cx_set(MO_GP0_IO, 1);
  942. mdelay(200);
  943. /* Select RF connector callback */
  944. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  945. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  946. &fusionhdtv_3_gold,
  947. &core->i2c_adap);
  948. if (fe0->dvb.frontend != NULL) {
  949. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  950. &core->i2c_adap, 0x61,
  951. TUNER_MICROTUNE_4042FI5))
  952. goto frontend_detach;
  953. }
  954. break;
  955. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  956. dev->ts_gen_cntrl = 0x08;
  957. /* Do a hardware reset of chip before using it. */
  958. cx_clear(MO_GP0_IO, 1);
  959. mdelay(100);
  960. cx_set(MO_GP0_IO, 9);
  961. mdelay(200);
  962. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  963. &fusionhdtv_3_gold,
  964. &core->i2c_adap);
  965. if (fe0->dvb.frontend != NULL) {
  966. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  967. &core->i2c_adap, 0x61,
  968. TUNER_THOMSON_DTT761X))
  969. goto frontend_detach;
  970. }
  971. break;
  972. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  973. dev->ts_gen_cntrl = 0x08;
  974. /* Do a hardware reset of chip before using it. */
  975. cx_clear(MO_GP0_IO, 1);
  976. mdelay(100);
  977. cx_set(MO_GP0_IO, 1);
  978. mdelay(200);
  979. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  980. &fusionhdtv_5_gold,
  981. &core->i2c_adap);
  982. if (fe0->dvb.frontend != NULL) {
  983. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  984. &core->i2c_adap, 0x61,
  985. TUNER_LG_TDVS_H06XF))
  986. goto frontend_detach;
  987. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  988. &core->i2c_adap, 0x43))
  989. goto frontend_detach;
  990. }
  991. break;
  992. case CX88_BOARD_PCHDTV_HD5500:
  993. dev->ts_gen_cntrl = 0x08;
  994. /* Do a hardware reset of chip before using it. */
  995. cx_clear(MO_GP0_IO, 1);
  996. mdelay(100);
  997. cx_set(MO_GP0_IO, 1);
  998. mdelay(200);
  999. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  1000. &pchdtv_hd5500,
  1001. &core->i2c_adap);
  1002. if (fe0->dvb.frontend != NULL) {
  1003. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1004. &core->i2c_adap, 0x61,
  1005. TUNER_LG_TDVS_H06XF))
  1006. goto frontend_detach;
  1007. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  1008. &core->i2c_adap, 0x43))
  1009. goto frontend_detach;
  1010. }
  1011. break;
  1012. case CX88_BOARD_ATI_HDTVWONDER:
  1013. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  1014. &ati_hdtvwonder,
  1015. &core->i2c_adap);
  1016. if (fe0->dvb.frontend != NULL) {
  1017. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  1018. &core->i2c_adap, 0x61,
  1019. TUNER_PHILIPS_TUV1236D))
  1020. goto frontend_detach;
  1021. }
  1022. break;
  1023. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  1024. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  1025. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1026. &hauppauge_novas_config,
  1027. &core->i2c_adap);
  1028. if (fe0->dvb.frontend) {
  1029. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  1030. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
  1031. goto frontend_detach;
  1032. }
  1033. break;
  1034. case CX88_BOARD_KWORLD_DVBS_100:
  1035. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1036. &kworld_dvbs_100_config,
  1037. &core->i2c_adap);
  1038. if (fe0->dvb.frontend) {
  1039. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1040. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  1041. }
  1042. break;
  1043. case CX88_BOARD_GENIATECH_DVBS:
  1044. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  1045. &geniatech_dvbs_config,
  1046. &core->i2c_adap);
  1047. if (fe0->dvb.frontend) {
  1048. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1049. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  1050. }
  1051. break;
  1052. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  1053. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1054. &pinnacle_pctv_hd_800i_config,
  1055. &core->i2c_adap);
  1056. if (fe0->dvb.frontend != NULL) {
  1057. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1058. &core->i2c_adap,
  1059. &pinnacle_pctv_hd_800i_tuner_config))
  1060. goto frontend_detach;
  1061. }
  1062. break;
  1063. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  1064. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1065. &dvico_hdtv5_pci_nano_config,
  1066. &core->i2c_adap);
  1067. if (fe0->dvb.frontend != NULL) {
  1068. struct dvb_frontend *fe;
  1069. struct xc2028_config cfg = {
  1070. .i2c_adap = &core->i2c_adap,
  1071. .i2c_addr = 0x61,
  1072. };
  1073. static struct xc2028_ctrl ctl = {
  1074. .fname = XC2028_DEFAULT_FIRMWARE,
  1075. .max_len = 64,
  1076. .scode_table = XC3028_FE_OREN538,
  1077. };
  1078. fe = dvb_attach(xc2028_attach,
  1079. fe0->dvb.frontend, &cfg);
  1080. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  1081. fe->ops.tuner_ops.set_config(fe, &ctl);
  1082. }
  1083. break;
  1084. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  1085. case CX88_BOARD_WINFAST_DTV1800H:
  1086. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1087. &cx88_pinnacle_hybrid_pctv,
  1088. &core->i2c_adap);
  1089. if (fe0->dvb.frontend) {
  1090. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1091. if (attach_xc3028(0x61, dev) < 0)
  1092. goto frontend_detach;
  1093. }
  1094. break;
  1095. case CX88_BOARD_GENIATECH_X8000_MT:
  1096. dev->ts_gen_cntrl = 0x00;
  1097. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1098. &cx88_geniatech_x8000_mt,
  1099. &core->i2c_adap);
  1100. if (attach_xc3028(0x61, dev) < 0)
  1101. goto frontend_detach;
  1102. break;
  1103. case CX88_BOARD_KWORLD_ATSC_120:
  1104. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  1105. &kworld_atsc_120_config,
  1106. &core->i2c_adap);
  1107. if (attach_xc3028(0x61, dev) < 0)
  1108. goto frontend_detach;
  1109. break;
  1110. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  1111. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  1112. &dvico_fusionhdtv7_config,
  1113. &core->i2c_adap);
  1114. if (fe0->dvb.frontend != NULL) {
  1115. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  1116. &core->i2c_adap,
  1117. &dvico_fusionhdtv7_tuner_config))
  1118. goto frontend_detach;
  1119. }
  1120. break;
  1121. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1122. /* MFE frontend 1 */
  1123. mfe_shared = 1;
  1124. dev->frontends.gate = 2;
  1125. /* DVB-S/S2 Init */
  1126. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1127. &hauppauge_hvr4000_config,
  1128. &dev->core->i2c_adap);
  1129. if (fe0->dvb.frontend) {
  1130. if (!dvb_attach(isl6421_attach,
  1131. fe0->dvb.frontend,
  1132. &dev->core->i2c_adap,
  1133. 0x08, ISL6421_DCL, 0x00))
  1134. goto frontend_detach;
  1135. }
  1136. /* MFE frontend 2 */
  1137. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  1138. if (!fe1)
  1139. goto frontend_detach;
  1140. /* DVB-T Init */
  1141. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  1142. &hauppauge_hvr_config,
  1143. &dev->core->i2c_adap);
  1144. if (fe1->dvb.frontend) {
  1145. fe1->dvb.frontend->id = 1;
  1146. if (!dvb_attach(simple_tuner_attach,
  1147. fe1->dvb.frontend,
  1148. &dev->core->i2c_adap,
  1149. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  1150. goto frontend_detach;
  1151. }
  1152. break;
  1153. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  1154. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1155. &hauppauge_hvr4000_config,
  1156. &dev->core->i2c_adap);
  1157. if (fe0->dvb.frontend) {
  1158. if (!dvb_attach(isl6421_attach,
  1159. fe0->dvb.frontend,
  1160. &dev->core->i2c_adap,
  1161. 0x08, ISL6421_DCL, 0x00))
  1162. goto frontend_detach;
  1163. }
  1164. break;
  1165. case CX88_BOARD_PROF_6200:
  1166. case CX88_BOARD_TBS_8910:
  1167. case CX88_BOARD_TEVII_S420:
  1168. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1169. &tevii_tuner_sharp_config,
  1170. &core->i2c_adap);
  1171. if (fe0->dvb.frontend != NULL) {
  1172. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  1173. &core->i2c_adap, DVB_PLL_OPERA1))
  1174. goto frontend_detach;
  1175. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1176. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1177. } else {
  1178. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  1179. &tevii_tuner_earda_config,
  1180. &core->i2c_adap);
  1181. if (fe0->dvb.frontend != NULL) {
  1182. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  1183. &core->i2c_adap))
  1184. goto frontend_detach;
  1185. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1186. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1187. }
  1188. }
  1189. break;
  1190. case CX88_BOARD_TEVII_S460:
  1191. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1192. &tevii_s460_config,
  1193. &core->i2c_adap);
  1194. if (fe0->dvb.frontend != NULL)
  1195. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1196. break;
  1197. case CX88_BOARD_OMICOM_SS4_PCI:
  1198. case CX88_BOARD_TBS_8920:
  1199. case CX88_BOARD_PROF_7300:
  1200. case CX88_BOARD_SATTRADE_ST4200:
  1201. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1202. &hauppauge_hvr4000_config,
  1203. &core->i2c_adap);
  1204. if (fe0->dvb.frontend != NULL)
  1205. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1206. break;
  1207. case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
  1208. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1209. &cx88_terratec_cinergy_ht_pci_mkii_config,
  1210. &core->i2c_adap);
  1211. if (fe0->dvb.frontend) {
  1212. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1213. if (attach_xc3028(0x61, dev) < 0)
  1214. goto frontend_detach;
  1215. }
  1216. break;
  1217. case CX88_BOARD_PROF_7301:{
  1218. struct dvb_tuner_ops *tuner_ops = NULL;
  1219. fe0->dvb.frontend = dvb_attach(stv0900_attach,
  1220. &prof_7301_stv0900_config,
  1221. &core->i2c_adap, 0);
  1222. if (fe0->dvb.frontend != NULL) {
  1223. if (!dvb_attach(stb6100_attach, fe0->dvb.frontend,
  1224. &prof_7301_stb6100_config,
  1225. &core->i2c_adap))
  1226. goto frontend_detach;
  1227. tuner_ops = &fe0->dvb.frontend->ops.tuner_ops;
  1228. tuner_ops->set_frequency = stb6100_set_freq;
  1229. tuner_ops->get_frequency = stb6100_get_freq;
  1230. tuner_ops->set_bandwidth = stb6100_set_bandw;
  1231. tuner_ops->get_bandwidth = stb6100_get_bandw;
  1232. core->prev_set_voltage =
  1233. fe0->dvb.frontend->ops.set_voltage;
  1234. fe0->dvb.frontend->ops.set_voltage =
  1235. tevii_dvbs_set_voltage;
  1236. }
  1237. break;
  1238. }
  1239. case CX88_BOARD_SAMSUNG_SMT_7020:
  1240. dev->ts_gen_cntrl = 0x08;
  1241. struct cx88_core *core = dev->core;
  1242. cx_set(MO_GP0_IO, 0x0101);
  1243. cx_clear(MO_GP0_IO, 0x01);
  1244. mdelay(100);
  1245. cx_set(MO_GP0_IO, 0x01);
  1246. mdelay(200);
  1247. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  1248. &samsung_stv0299_config,
  1249. &dev->core->i2c_adap);
  1250. if (fe0->dvb.frontend) {
  1251. fe0->dvb.frontend->ops.tuner_ops.set_params =
  1252. samsung_smt_7020_tuner_set_params;
  1253. fe0->dvb.frontend->tuner_priv =
  1254. &dev->core->i2c_adap;
  1255. fe0->dvb.frontend->ops.set_voltage =
  1256. samsung_smt_7020_set_voltage;
  1257. fe0->dvb.frontend->ops.set_tone =
  1258. samsung_smt_7020_set_tone;
  1259. }
  1260. break;
  1261. default:
  1262. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  1263. core->name);
  1264. break;
  1265. }
  1266. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  1267. printk(KERN_ERR
  1268. "%s/2: frontend initialization failed\n",
  1269. core->name);
  1270. goto frontend_detach;
  1271. }
  1272. /* define general-purpose callback pointer */
  1273. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1274. /* Ensure all frontends negotiate bus access */
  1275. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1276. if (fe1)
  1277. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1278. /* Put the analog decoder in standby to keep it quiet */
  1279. call_all(core, core, s_power, 0);
  1280. /* register everything */
  1281. return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1282. &dev->pci->dev, adapter_nr, mfe_shared, NULL);
  1283. frontend_detach:
  1284. core->gate_ctrl = NULL;
  1285. videobuf_dvb_dealloc_frontends(&dev->frontends);
  1286. return -EINVAL;
  1287. }
  1288. /* ----------------------------------------------------------- */
  1289. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1290. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1291. {
  1292. struct cx88_core *core = drv->core;
  1293. int err = 0;
  1294. dprintk( 1, "%s\n", __func__);
  1295. switch (core->boardnr) {
  1296. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1297. /* We arrive here with either the cx23416 or the cx22702
  1298. * on the bus. Take the bus from the cx23416 and enable the
  1299. * cx22702 demod
  1300. */
  1301. /* Toggle reset on cx22702 leaving i2c active */
  1302. cx_set(MO_GP0_IO, 0x00000080);
  1303. udelay(1000);
  1304. cx_clear(MO_GP0_IO, 0x00000080);
  1305. udelay(50);
  1306. cx_set(MO_GP0_IO, 0x00000080);
  1307. udelay(1000);
  1308. /* enable the cx22702 pins */
  1309. cx_clear(MO_GP0_IO, 0x00000004);
  1310. udelay(1000);
  1311. break;
  1312. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1313. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1314. /* Toggle reset on cx22702 leaving i2c active */
  1315. cx_set(MO_GP0_IO, 0x00000080);
  1316. udelay(1000);
  1317. cx_clear(MO_GP0_IO, 0x00000080);
  1318. udelay(50);
  1319. cx_set(MO_GP0_IO, 0x00000080);
  1320. udelay(1000);
  1321. switch (core->dvbdev->frontends.active_fe_id) {
  1322. case 1: /* DVB-S/S2 Enabled */
  1323. /* tri-state the cx22702 pins */
  1324. cx_set(MO_GP0_IO, 0x00000004);
  1325. /* Take the cx24116/cx24123 out of reset */
  1326. cx_write(MO_SRST_IO, 1);
  1327. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1328. break;
  1329. case 2: /* DVB-T Enabled */
  1330. /* Put the cx24116/cx24123 into reset */
  1331. cx_write(MO_SRST_IO, 0);
  1332. /* enable the cx22702 pins */
  1333. cx_clear(MO_GP0_IO, 0x00000004);
  1334. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1335. break;
  1336. }
  1337. udelay(1000);
  1338. break;
  1339. default:
  1340. err = -ENODEV;
  1341. }
  1342. return err;
  1343. }
  1344. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1345. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1346. {
  1347. struct cx88_core *core = drv->core;
  1348. int err = 0;
  1349. dprintk( 1, "%s\n", __func__);
  1350. switch (core->boardnr) {
  1351. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1352. /* Do Nothing, leave the cx22702 on the bus. */
  1353. break;
  1354. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1355. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1356. break;
  1357. default:
  1358. err = -ENODEV;
  1359. }
  1360. return err;
  1361. }
  1362. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1363. {
  1364. struct cx88_core *core = drv->core;
  1365. struct cx8802_dev *dev = drv->core->dvbdev;
  1366. int err;
  1367. struct videobuf_dvb_frontend *fe;
  1368. int i;
  1369. dprintk( 1, "%s\n", __func__);
  1370. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1371. core->boardnr,
  1372. core->name,
  1373. core->pci_bus,
  1374. core->pci_slot);
  1375. err = -ENODEV;
  1376. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1377. goto fail_core;
  1378. /* If vp3054 isn't enabled, a stub will just return 0 */
  1379. err = vp3054_i2c_probe(dev);
  1380. if (0 != err)
  1381. goto fail_core;
  1382. /* dvb stuff */
  1383. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1384. dev->ts_gen_cntrl = 0x0c;
  1385. err = cx8802_alloc_frontends(dev);
  1386. if (err)
  1387. goto fail_core;
  1388. err = -ENODEV;
  1389. for (i = 1; i <= core->board.num_frontends; i++) {
  1390. fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
  1391. if (fe == NULL) {
  1392. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1393. __func__, i);
  1394. goto fail_probe;
  1395. }
  1396. videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
  1397. &dev->pci->dev, &dev->slock,
  1398. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  1399. V4L2_FIELD_TOP,
  1400. sizeof(struct cx88_buffer),
  1401. dev);
  1402. /* init struct videobuf_dvb */
  1403. fe->dvb.name = dev->core->name;
  1404. }
  1405. err = dvb_register(dev);
  1406. if (err)
  1407. /* frontends/adapter de-allocated in dvb_register */
  1408. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1409. core->name, err);
  1410. return err;
  1411. fail_probe:
  1412. videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1413. fail_core:
  1414. return err;
  1415. }
  1416. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1417. {
  1418. struct cx88_core *core = drv->core;
  1419. struct cx8802_dev *dev = drv->core->dvbdev;
  1420. dprintk( 1, "%s\n", __func__);
  1421. videobuf_dvb_unregister_bus(&dev->frontends);
  1422. vp3054_i2c_remove(dev);
  1423. core->gate_ctrl = NULL;
  1424. return 0;
  1425. }
  1426. static struct cx8802_driver cx8802_dvb_driver = {
  1427. .type_id = CX88_MPEG_DVB,
  1428. .hw_access = CX8802_DRVCTL_SHARED,
  1429. .probe = cx8802_dvb_probe,
  1430. .remove = cx8802_dvb_remove,
  1431. .advise_acquire = cx8802_dvb_advise_acquire,
  1432. .advise_release = cx8802_dvb_advise_release,
  1433. };
  1434. static int __init dvb_init(void)
  1435. {
  1436. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  1437. (CX88_VERSION_CODE >> 16) & 0xff,
  1438. (CX88_VERSION_CODE >> 8) & 0xff,
  1439. CX88_VERSION_CODE & 0xff);
  1440. #ifdef SNAPSHOT
  1441. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  1442. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  1443. #endif
  1444. return cx8802_register_driver(&cx8802_dvb_driver);
  1445. }
  1446. static void __exit dvb_fini(void)
  1447. {
  1448. cx8802_unregister_driver(&cx8802_dvb_driver);
  1449. }
  1450. module_init(dvb_init);
  1451. module_exit(dvb_fini);
  1452. /*
  1453. * Local variables:
  1454. * c-basic-offset: 8
  1455. * compile-command: "make DVB=1"
  1456. * End:
  1457. */