iwl3945-base.c 215 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-3945.h"
  50. #include "iwl-helpers.h"
  51. #include "iwl-core.h"
  52. #include "iwl-dev.h"
  53. /*
  54. * module name, copyright, version, etc.
  55. */
  56. #define DRV_DESCRIPTION \
  57. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  58. #ifdef CONFIG_IWL3945_DEBUG
  59. #define VD "d"
  60. #else
  61. #define VD
  62. #endif
  63. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  64. #define VS "s"
  65. #else
  66. #define VS
  67. #endif
  68. #define IWL39_VERSION "1.2.26k" VD VS
  69. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  70. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  71. #define DRV_VERSION IWL39_VERSION
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  75. MODULE_LICENSE("GPL");
  76. /* module parameters */
  77. struct iwl_mod_params iwl3945_mod_params = {
  78. .num_of_queues = IWL39_MAX_NUM_QUEUES,
  79. .sw_crypto = 1,
  80. /* the rest are 0 by default */
  81. };
  82. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  83. * DMA services
  84. *
  85. * Theory of operation
  86. *
  87. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  88. * of buffer descriptors, each of which points to one or more data buffers for
  89. * the device to read from or fill. Driver and device exchange status of each
  90. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  91. * entries in each circular buffer, to protect against confusing empty and full
  92. * queue states.
  93. *
  94. * The device reads or writes the data in the queues via the device's several
  95. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  96. *
  97. * For Tx queue, there are low mark and high mark limits. If, after queuing
  98. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  99. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  100. * Tx queue resumed.
  101. *
  102. * The 3945 operates with six queues: One receive queue, one transmit queue
  103. * (#4) for sending commands to the device firmware, and four transmit queues
  104. * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
  105. ***************************************************/
  106. /**
  107. * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
  108. */
  109. static int iwl3945_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
  110. int count, int slots_num, u32 id)
  111. {
  112. q->n_bd = count;
  113. q->n_window = slots_num;
  114. q->id = id;
  115. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  116. * and iwl_queue_dec_wrap are broken. */
  117. BUG_ON(!is_power_of_2(count));
  118. /* slots_num must be power-of-two size, otherwise
  119. * get_cmd_index is broken. */
  120. BUG_ON(!is_power_of_2(slots_num));
  121. q->low_mark = q->n_window / 4;
  122. if (q->low_mark < 4)
  123. q->low_mark = 4;
  124. q->high_mark = q->n_window / 8;
  125. if (q->high_mark < 2)
  126. q->high_mark = 2;
  127. q->write_ptr = q->read_ptr = 0;
  128. return 0;
  129. }
  130. /**
  131. * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  132. */
  133. static int iwl3945_tx_queue_alloc(struct iwl_priv *priv,
  134. struct iwl_tx_queue *txq, u32 id)
  135. {
  136. struct pci_dev *dev = priv->pci_dev;
  137. /* Driver private data, only for Tx (not command) queues,
  138. * not shared with device. */
  139. if (id != IWL_CMD_QUEUE_NUM) {
  140. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  141. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  142. if (!txq->txb) {
  143. IWL_ERR(priv, "kmalloc for auxiliary BD "
  144. "structures failed\n");
  145. goto error;
  146. }
  147. } else
  148. txq->txb = NULL;
  149. /* Circular buffer of transmit frame descriptors (TFDs),
  150. * shared with device */
  151. txq->tfds39 = pci_alloc_consistent(dev,
  152. sizeof(txq->tfds39[0]) * TFD_QUEUE_SIZE_MAX,
  153. &txq->q.dma_addr);
  154. if (!txq->tfds39) {
  155. IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n",
  156. sizeof(txq->tfds39[0]) * TFD_QUEUE_SIZE_MAX);
  157. goto error;
  158. }
  159. txq->q.id = id;
  160. return 0;
  161. error:
  162. kfree(txq->txb);
  163. txq->txb = NULL;
  164. return -ENOMEM;
  165. }
  166. /**
  167. * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
  168. */
  169. int iwl3945_tx_queue_init(struct iwl_priv *priv,
  170. struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
  171. {
  172. int len, i;
  173. int rc = 0;
  174. /*
  175. * Alloc buffer array for commands (Tx or other types of commands).
  176. * For the command queue (#4), allocate command space + one big
  177. * command for scan, since scan command is very huge; the system will
  178. * not have two scans at the same time, so only one is needed.
  179. * For data Tx queues (all other queues), no super-size command
  180. * space is needed.
  181. */
  182. len = sizeof(struct iwl_cmd);
  183. for (i = 0; i <= slots_num; i++) {
  184. if (i == slots_num) {
  185. if (txq_id == IWL_CMD_QUEUE_NUM)
  186. len += IWL_MAX_SCAN_SIZE;
  187. else
  188. continue;
  189. }
  190. txq->cmd[i] = kmalloc(len, GFP_KERNEL);
  191. if (!txq->cmd[i])
  192. goto err;
  193. }
  194. /* Alloc driver data array and TFD circular buffer */
  195. rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
  196. if (rc)
  197. goto err;
  198. txq->need_update = 0;
  199. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  200. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  201. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  202. /* Initialize queue high/low-water, head/tail indexes */
  203. iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  204. /* Tell device where to find queue, enable DMA channel. */
  205. iwl3945_hw_tx_queue_init(priv, txq);
  206. return 0;
  207. err:
  208. for (i = 0; i < slots_num; i++) {
  209. kfree(txq->cmd[i]);
  210. txq->cmd[i] = NULL;
  211. }
  212. if (txq_id == IWL_CMD_QUEUE_NUM) {
  213. kfree(txq->cmd[slots_num]);
  214. txq->cmd[slots_num] = NULL;
  215. }
  216. return -ENOMEM;
  217. }
  218. /**
  219. * iwl3945_tx_queue_free - Deallocate DMA queue.
  220. * @txq: Transmit queue to deallocate.
  221. *
  222. * Empty queue by removing and destroying all BD's.
  223. * Free all buffers.
  224. * 0-fill, but do not free "txq" descriptor structure.
  225. */
  226. void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
  227. {
  228. struct iwl_queue *q = &txq->q;
  229. struct pci_dev *dev = priv->pci_dev;
  230. int len, i;
  231. if (q->n_bd == 0)
  232. return;
  233. /* first, empty all BD's */
  234. for (; q->write_ptr != q->read_ptr;
  235. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  236. iwl3945_hw_txq_free_tfd(priv, txq);
  237. len = sizeof(struct iwl_cmd) * q->n_window;
  238. if (q->id == IWL_CMD_QUEUE_NUM)
  239. len += IWL_MAX_SCAN_SIZE;
  240. /* De-alloc array of command/tx buffers */
  241. for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
  242. kfree(txq->cmd[i]);
  243. /* De-alloc circular buffer of TFDs */
  244. if (txq->q.n_bd)
  245. pci_free_consistent(dev, sizeof(struct iwl3945_tfd) *
  246. txq->q.n_bd, txq->tfds39, txq->q.dma_addr);
  247. /* De-alloc array of per-TFD driver data */
  248. kfree(txq->txb);
  249. txq->txb = NULL;
  250. /* 0-fill queue descriptor structure */
  251. memset(txq, 0, sizeof(*txq));
  252. }
  253. /*************** STATION TABLE MANAGEMENT ****
  254. * mac80211 should be examined to determine if sta_info is duplicating
  255. * the functionality provided here
  256. */
  257. /**************************************************************/
  258. #if 0 /* temporary disable till we add real remove station */
  259. /**
  260. * iwl3945_remove_station - Remove driver's knowledge of station.
  261. *
  262. * NOTE: This does not remove station from device's station table.
  263. */
  264. static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  265. {
  266. int index = IWL_INVALID_STATION;
  267. int i;
  268. unsigned long flags;
  269. spin_lock_irqsave(&priv->sta_lock, flags);
  270. if (is_ap)
  271. index = IWL_AP_ID;
  272. else if (is_broadcast_ether_addr(addr))
  273. index = priv->hw_params.bcast_sta_id;
  274. else
  275. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
  276. if (priv->stations_39[i].used &&
  277. !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  278. addr)) {
  279. index = i;
  280. break;
  281. }
  282. if (unlikely(index == IWL_INVALID_STATION))
  283. goto out;
  284. if (priv->stations_39[index].used) {
  285. priv->stations_39[index].used = 0;
  286. priv->num_stations--;
  287. }
  288. BUG_ON(priv->num_stations < 0);
  289. out:
  290. spin_unlock_irqrestore(&priv->sta_lock, flags);
  291. return 0;
  292. }
  293. #endif
  294. /**
  295. * iwl3945_clear_stations_table - Clear the driver's station table
  296. *
  297. * NOTE: This does not clear or otherwise alter the device's station table.
  298. */
  299. static void iwl3945_clear_stations_table(struct iwl_priv *priv)
  300. {
  301. unsigned long flags;
  302. spin_lock_irqsave(&priv->sta_lock, flags);
  303. priv->num_stations = 0;
  304. memset(priv->stations_39, 0, sizeof(priv->stations_39));
  305. spin_unlock_irqrestore(&priv->sta_lock, flags);
  306. }
  307. /**
  308. * iwl3945_add_station - Add station to station tables in driver and device
  309. */
  310. u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  311. {
  312. int i;
  313. int index = IWL_INVALID_STATION;
  314. struct iwl3945_station_entry *station;
  315. unsigned long flags_spin;
  316. u8 rate;
  317. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  318. if (is_ap)
  319. index = IWL_AP_ID;
  320. else if (is_broadcast_ether_addr(addr))
  321. index = priv->hw_params.bcast_sta_id;
  322. else
  323. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
  324. if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  325. addr)) {
  326. index = i;
  327. break;
  328. }
  329. if (!priv->stations_39[i].used &&
  330. index == IWL_INVALID_STATION)
  331. index = i;
  332. }
  333. /* These two conditions has the same outcome but keep them separate
  334. since they have different meaning */
  335. if (unlikely(index == IWL_INVALID_STATION)) {
  336. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  337. return index;
  338. }
  339. if (priv->stations_39[index].used &&
  340. !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
  341. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  342. return index;
  343. }
  344. IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
  345. station = &priv->stations_39[index];
  346. station->used = 1;
  347. priv->num_stations++;
  348. /* Set up the REPLY_ADD_STA command to send to device */
  349. memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
  350. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  351. station->sta.mode = 0;
  352. station->sta.sta.sta_id = index;
  353. station->sta.station_flags = 0;
  354. if (priv->band == IEEE80211_BAND_5GHZ)
  355. rate = IWL_RATE_6M_PLCP;
  356. else
  357. rate = IWL_RATE_1M_PLCP;
  358. /* Turn on both antennas for the station... */
  359. station->sta.rate_n_flags =
  360. iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  361. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  362. /* Add station to device's station table */
  363. iwl3945_send_add_station(priv, &station->sta, flags);
  364. return index;
  365. }
  366. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  367. #define IWL_CMD(x) case x: return #x
  368. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  369. /**
  370. * iwl3945_enqueue_hcmd - enqueue a uCode command
  371. * @priv: device private data point
  372. * @cmd: a point to the ucode command structure
  373. *
  374. * The function returns < 0 values to indicate the operation is
  375. * failed. On success, it turns the index (> 0) of command in the
  376. * command queue.
  377. */
  378. static int iwl3945_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  379. {
  380. struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  381. struct iwl_queue *q = &txq->q;
  382. struct iwl3945_tfd *tfd;
  383. struct iwl_cmd *out_cmd;
  384. u32 idx;
  385. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  386. dma_addr_t phys_addr;
  387. int pad;
  388. int ret, len;
  389. unsigned long flags;
  390. /* If any of the command structures end up being larger than
  391. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  392. * we will need to increase the size of the TFD entries */
  393. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  394. !(cmd->meta.flags & CMD_SIZE_HUGE));
  395. if (iwl_is_rfkill(priv)) {
  396. IWL_DEBUG_INFO("Not sending command - RF KILL");
  397. return -EIO;
  398. }
  399. if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  400. IWL_ERR(priv, "No space for Tx\n");
  401. return -ENOSPC;
  402. }
  403. spin_lock_irqsave(&priv->hcmd_lock, flags);
  404. tfd = &txq->tfds39[q->write_ptr];
  405. memset(tfd, 0, sizeof(*tfd));
  406. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  407. out_cmd = txq->cmd[idx];
  408. out_cmd->hdr.cmd = cmd->id;
  409. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  410. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  411. /* At this point, the out_cmd now has all of the incoming cmd
  412. * information */
  413. out_cmd->hdr.flags = 0;
  414. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  415. INDEX_TO_SEQ(q->write_ptr));
  416. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  417. out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
  418. len = (idx == TFD_CMD_SLOTS) ?
  419. IWL_MAX_SCAN_SIZE : sizeof(struct iwl_cmd);
  420. phys_addr = pci_map_single(priv->pci_dev, out_cmd,
  421. len, PCI_DMA_TODEVICE);
  422. pci_unmap_addr_set(&out_cmd->meta, mapping, phys_addr);
  423. pci_unmap_len_set(&out_cmd->meta, len, len);
  424. phys_addr += offsetof(struct iwl_cmd, hdr);
  425. iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  426. pad = U32_PAD(cmd->len);
  427. tfd->control_flags |= cpu_to_le32(TFD_CTL_PAD_SET(pad));
  428. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  429. "%d bytes at %d[%d]:%d\n",
  430. get_cmd_string(out_cmd->hdr.cmd),
  431. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  432. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  433. txq->need_update = 1;
  434. /* Increment and update queue's write index */
  435. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  436. ret = iwl_txq_update_write_ptr(priv, txq);
  437. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  438. return ret ? ret : idx;
  439. }
  440. static int iwl3945_send_cmd_async(struct iwl_priv *priv,
  441. struct iwl_host_cmd *cmd)
  442. {
  443. int ret;
  444. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  445. /* An asynchronous command can not expect an SKB to be set. */
  446. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  447. /* An asynchronous command MUST have a callback. */
  448. BUG_ON(!cmd->meta.u.callback);
  449. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  450. return -EBUSY;
  451. ret = iwl3945_enqueue_hcmd(priv, cmd);
  452. if (ret < 0) {
  453. IWL_ERR(priv,
  454. "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
  455. get_cmd_string(cmd->id), ret);
  456. return ret;
  457. }
  458. return 0;
  459. }
  460. static int iwl3945_send_cmd_sync(struct iwl_priv *priv,
  461. struct iwl_host_cmd *cmd)
  462. {
  463. int cmd_idx;
  464. int ret;
  465. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  466. /* A synchronous command can not have a callback set. */
  467. BUG_ON(cmd->meta.u.callback != NULL);
  468. if (test_and_set_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status)) {
  469. IWL_ERR(priv,
  470. "Error sending %s: Already sending a host command\n",
  471. get_cmd_string(cmd->id));
  472. ret = -EBUSY;
  473. goto out;
  474. }
  475. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  476. if (cmd->meta.flags & CMD_WANT_SKB)
  477. cmd->meta.source = &cmd->meta;
  478. cmd_idx = iwl3945_enqueue_hcmd(priv, cmd);
  479. if (cmd_idx < 0) {
  480. ret = cmd_idx;
  481. IWL_ERR(priv,
  482. "Error sending %s: iwl3945_enqueue_hcmd failed: %d\n",
  483. get_cmd_string(cmd->id), ret);
  484. goto out;
  485. }
  486. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  487. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  488. HOST_COMPLETE_TIMEOUT);
  489. if (!ret) {
  490. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  491. IWL_ERR(priv, "Error sending %s: time out after %dms\n",
  492. get_cmd_string(cmd->id),
  493. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  494. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  495. ret = -ETIMEDOUT;
  496. goto cancel;
  497. }
  498. }
  499. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  500. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  501. get_cmd_string(cmd->id));
  502. ret = -ECANCELED;
  503. goto fail;
  504. }
  505. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  506. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  507. get_cmd_string(cmd->id));
  508. ret = -EIO;
  509. goto fail;
  510. }
  511. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  512. IWL_ERR(priv, "Error: Response NULL in '%s'\n",
  513. get_cmd_string(cmd->id));
  514. ret = -EIO;
  515. goto cancel;
  516. }
  517. ret = 0;
  518. goto out;
  519. cancel:
  520. if (cmd->meta.flags & CMD_WANT_SKB) {
  521. struct iwl_cmd *qcmd;
  522. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  523. * TX cmd queue. Otherwise in case the cmd comes
  524. * in later, it will possibly set an invalid
  525. * address (cmd->meta.source). */
  526. qcmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  527. qcmd->meta.flags &= ~CMD_WANT_SKB;
  528. }
  529. fail:
  530. if (cmd->meta.u.skb) {
  531. dev_kfree_skb_any(cmd->meta.u.skb);
  532. cmd->meta.u.skb = NULL;
  533. }
  534. out:
  535. clear_bit(STATUS_HCMD_SYNC_ACTIVE, &priv->status);
  536. return ret;
  537. }
  538. int iwl3945_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  539. {
  540. if (cmd->meta.flags & CMD_ASYNC)
  541. return iwl3945_send_cmd_async(priv, cmd);
  542. return iwl3945_send_cmd_sync(priv, cmd);
  543. }
  544. int iwl3945_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
  545. {
  546. struct iwl_host_cmd cmd = {
  547. .id = id,
  548. .len = len,
  549. .data = data,
  550. };
  551. return iwl3945_send_cmd_sync(priv, &cmd);
  552. }
  553. static int __must_check iwl3945_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
  554. {
  555. struct iwl_host_cmd cmd = {
  556. .id = id,
  557. .len = sizeof(val),
  558. .data = &val,
  559. };
  560. return iwl3945_send_cmd_sync(priv, &cmd);
  561. }
  562. int iwl3945_send_statistics_request(struct iwl_priv *priv)
  563. {
  564. return iwl3945_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  565. }
  566. /**
  567. * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
  568. * @band: 2.4 or 5 GHz band
  569. * @channel: Any channel valid for the requested band
  570. * In addition to setting the staging RXON, priv->band is also set.
  571. *
  572. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  573. * in the staging RXON flag structure based on the band
  574. */
  575. static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
  576. enum ieee80211_band band,
  577. u16 channel)
  578. {
  579. if (!iwl3945_get_channel_info(priv, band, channel)) {
  580. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  581. channel, band);
  582. return -EINVAL;
  583. }
  584. if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
  585. (priv->band == band))
  586. return 0;
  587. priv->staging39_rxon.channel = cpu_to_le16(channel);
  588. if (band == IEEE80211_BAND_5GHZ)
  589. priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  590. else
  591. priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  592. priv->band = band;
  593. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  594. return 0;
  595. }
  596. /**
  597. * iwl3945_check_rxon_cmd - validate RXON structure is valid
  598. *
  599. * NOTE: This is really only useful during development and can eventually
  600. * be #ifdef'd out once the driver is stable and folks aren't actively
  601. * making changes
  602. */
  603. static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
  604. {
  605. int error = 0;
  606. int counter = 1;
  607. struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
  608. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  609. error |= le32_to_cpu(rxon->flags &
  610. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  611. RXON_FLG_RADAR_DETECT_MSK));
  612. if (error)
  613. IWL_WARN(priv, "check 24G fields %d | %d\n",
  614. counter++, error);
  615. } else {
  616. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  617. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  618. if (error)
  619. IWL_WARN(priv, "check 52 fields %d | %d\n",
  620. counter++, error);
  621. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  622. if (error)
  623. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  624. counter++, error);
  625. }
  626. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  627. if (error)
  628. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  629. /* make sure basic rates 6Mbps and 1Mbps are supported */
  630. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  631. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  632. if (error)
  633. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  634. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  635. if (error)
  636. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  637. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  638. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  639. if (error)
  640. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  641. counter++, error);
  642. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  643. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  644. if (error)
  645. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  646. counter++, error);
  647. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  648. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  649. if (error)
  650. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  651. counter++, error);
  652. if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
  653. error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
  654. RXON_FLG_ANT_A_MSK)) == 0);
  655. if (error)
  656. IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
  657. if (error)
  658. IWL_WARN(priv, "Tuning to channel %d\n",
  659. le16_to_cpu(rxon->channel));
  660. if (error) {
  661. IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n");
  662. return -1;
  663. }
  664. return 0;
  665. }
  666. /**
  667. * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  668. * @priv: staging_rxon is compared to active_rxon
  669. *
  670. * If the RXON structure is changing enough to require a new tune,
  671. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  672. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  673. */
  674. static int iwl3945_full_rxon_required(struct iwl_priv *priv)
  675. {
  676. /* These items are only settable from the full RXON command */
  677. if (!(iwl3945_is_associated(priv)) ||
  678. compare_ether_addr(priv->staging39_rxon.bssid_addr,
  679. priv->active39_rxon.bssid_addr) ||
  680. compare_ether_addr(priv->staging39_rxon.node_addr,
  681. priv->active39_rxon.node_addr) ||
  682. compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
  683. priv->active39_rxon.wlap_bssid_addr) ||
  684. (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
  685. (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
  686. (priv->staging39_rxon.air_propagation !=
  687. priv->active39_rxon.air_propagation) ||
  688. (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
  689. return 1;
  690. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  691. * be updated with the RXON_ASSOC command -- however only some
  692. * flag transitions are allowed using RXON_ASSOC */
  693. /* Check if we are not switching bands */
  694. if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  695. (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
  696. return 1;
  697. /* Check if we are switching association toggle */
  698. if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  699. (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  700. return 1;
  701. return 0;
  702. }
  703. static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
  704. {
  705. int rc = 0;
  706. struct iwl_rx_packet *res = NULL;
  707. struct iwl3945_rxon_assoc_cmd rxon_assoc;
  708. struct iwl_host_cmd cmd = {
  709. .id = REPLY_RXON_ASSOC,
  710. .len = sizeof(rxon_assoc),
  711. .meta.flags = CMD_WANT_SKB,
  712. .data = &rxon_assoc,
  713. };
  714. const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
  715. const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
  716. if ((rxon1->flags == rxon2->flags) &&
  717. (rxon1->filter_flags == rxon2->filter_flags) &&
  718. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  719. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  720. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  721. return 0;
  722. }
  723. rxon_assoc.flags = priv->staging39_rxon.flags;
  724. rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
  725. rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
  726. rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
  727. rxon_assoc.reserved = 0;
  728. rc = iwl3945_send_cmd_sync(priv, &cmd);
  729. if (rc)
  730. return rc;
  731. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  732. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  733. IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
  734. rc = -EIO;
  735. }
  736. priv->alloc_rxb_skb--;
  737. dev_kfree_skb_any(cmd.meta.u.skb);
  738. return rc;
  739. }
  740. /**
  741. * iwl3945_commit_rxon - commit staging_rxon to hardware
  742. *
  743. * The RXON command in staging_rxon is committed to the hardware and
  744. * the active_rxon structure is updated with the new data. This
  745. * function correctly transitions out of the RXON_ASSOC_MSK state if
  746. * a HW tune is required based on the RXON structure changes.
  747. */
  748. static int iwl3945_commit_rxon(struct iwl_priv *priv)
  749. {
  750. /* cast away the const for active_rxon in this function */
  751. struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
  752. int rc = 0;
  753. if (!iwl_is_alive(priv))
  754. return -1;
  755. /* always get timestamp with Rx frame */
  756. priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  757. /* select antenna */
  758. priv->staging39_rxon.flags &=
  759. ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
  760. priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
  761. rc = iwl3945_check_rxon_cmd(priv);
  762. if (rc) {
  763. IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
  764. return -EINVAL;
  765. }
  766. /* If we don't need to send a full RXON, we can use
  767. * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
  768. * and other flags for the current radio configuration. */
  769. if (!iwl3945_full_rxon_required(priv)) {
  770. rc = iwl3945_send_rxon_assoc(priv);
  771. if (rc) {
  772. IWL_ERR(priv, "Error setting RXON_ASSOC "
  773. "configuration (%d).\n", rc);
  774. return rc;
  775. }
  776. memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
  777. return 0;
  778. }
  779. /* If we are currently associated and the new config requires
  780. * an RXON_ASSOC and the new config wants the associated mask enabled,
  781. * we must clear the associated from the active configuration
  782. * before we apply the new config */
  783. if (iwl3945_is_associated(priv) &&
  784. (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  785. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  786. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  787. rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
  788. sizeof(struct iwl3945_rxon_cmd),
  789. &priv->active39_rxon);
  790. /* If the mask clearing failed then we set
  791. * active_rxon back to what it was previously */
  792. if (rc) {
  793. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  794. IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
  795. "configuration (%d).\n", rc);
  796. return rc;
  797. }
  798. }
  799. IWL_DEBUG_INFO("Sending RXON\n"
  800. "* with%s RXON_FILTER_ASSOC_MSK\n"
  801. "* channel = %d\n"
  802. "* bssid = %pM\n",
  803. ((priv->staging39_rxon.filter_flags &
  804. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  805. le16_to_cpu(priv->staging39_rxon.channel),
  806. priv->staging_rxon.bssid_addr);
  807. /* Apply the new configuration */
  808. rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON,
  809. sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
  810. if (rc) {
  811. IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
  812. return rc;
  813. }
  814. memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
  815. iwl3945_clear_stations_table(priv);
  816. /* If we issue a new RXON command which required a tune then we must
  817. * send a new TXPOWER command or we won't be able to Tx any frames */
  818. rc = iwl3945_hw_reg_send_txpower(priv);
  819. if (rc) {
  820. IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
  821. return rc;
  822. }
  823. /* Add the broadcast address so we can send broadcast frames */
  824. if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
  825. IWL_INVALID_STATION) {
  826. IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
  827. return -EIO;
  828. }
  829. /* If we have set the ASSOC_MSK and we are in BSS mode then
  830. * add the IWL_AP_ID to the station rate table */
  831. if (iwl3945_is_associated(priv) &&
  832. (priv->iw_mode == NL80211_IFTYPE_STATION))
  833. if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
  834. == IWL_INVALID_STATION) {
  835. IWL_ERR(priv, "Error adding AP address for transmit\n");
  836. return -EIO;
  837. }
  838. /* Init the hardware's rate fallback order based on the band */
  839. rc = iwl3945_init_hw_rate_table(priv);
  840. if (rc) {
  841. IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
  842. return -EIO;
  843. }
  844. return 0;
  845. }
  846. static int iwl3945_send_bt_config(struct iwl_priv *priv)
  847. {
  848. struct iwl_bt_cmd bt_cmd = {
  849. .flags = 3,
  850. .lead_time = 0xAA,
  851. .max_kill = 1,
  852. .kill_ack_mask = 0,
  853. .kill_cts_mask = 0,
  854. };
  855. return iwl3945_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  856. sizeof(bt_cmd), &bt_cmd);
  857. }
  858. static int iwl3945_send_scan_abort(struct iwl_priv *priv)
  859. {
  860. int rc = 0;
  861. struct iwl_rx_packet *res;
  862. struct iwl_host_cmd cmd = {
  863. .id = REPLY_SCAN_ABORT_CMD,
  864. .meta.flags = CMD_WANT_SKB,
  865. };
  866. /* If there isn't a scan actively going on in the hardware
  867. * then we are in between scan bands and not actually
  868. * actively scanning, so don't send the abort command */
  869. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  870. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  871. return 0;
  872. }
  873. rc = iwl3945_send_cmd_sync(priv, &cmd);
  874. if (rc) {
  875. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  876. return rc;
  877. }
  878. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  879. if (res->u.status != CAN_ABORT_STATUS) {
  880. /* The scan abort will return 1 for success or
  881. * 2 for "failure". A failure condition can be
  882. * due to simply not being in an active scan which
  883. * can occur if we send the scan abort before we
  884. * the microcode has notified us that a scan is
  885. * completed. */
  886. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  887. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  888. clear_bit(STATUS_SCAN_HW, &priv->status);
  889. }
  890. dev_kfree_skb_any(cmd.meta.u.skb);
  891. return rc;
  892. }
  893. static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
  894. struct iwl_cmd *cmd, struct sk_buff *skb)
  895. {
  896. struct iwl_rx_packet *res = NULL;
  897. if (!skb) {
  898. IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
  899. return 1;
  900. }
  901. res = (struct iwl_rx_packet *)skb->data;
  902. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  903. IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
  904. res->hdr.flags);
  905. return 1;
  906. }
  907. switch (res->u.add_sta.status) {
  908. case ADD_STA_SUCCESS_MSK:
  909. break;
  910. default:
  911. break;
  912. }
  913. /* We didn't cache the SKB; let the caller free it */
  914. return 1;
  915. }
  916. int iwl3945_send_add_station(struct iwl_priv *priv,
  917. struct iwl3945_addsta_cmd *sta, u8 flags)
  918. {
  919. struct iwl_rx_packet *res = NULL;
  920. int rc = 0;
  921. struct iwl_host_cmd cmd = {
  922. .id = REPLY_ADD_STA,
  923. .len = sizeof(struct iwl3945_addsta_cmd),
  924. .meta.flags = flags,
  925. .data = sta,
  926. };
  927. if (flags & CMD_ASYNC)
  928. cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
  929. else
  930. cmd.meta.flags |= CMD_WANT_SKB;
  931. rc = iwl3945_send_cmd(priv, &cmd);
  932. if (rc || (flags & CMD_ASYNC))
  933. return rc;
  934. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  935. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  936. IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
  937. res->hdr.flags);
  938. rc = -EIO;
  939. }
  940. if (rc == 0) {
  941. switch (res->u.add_sta.status) {
  942. case ADD_STA_SUCCESS_MSK:
  943. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  944. break;
  945. default:
  946. rc = -EIO;
  947. IWL_WARN(priv, "REPLY_ADD_STA failed\n");
  948. break;
  949. }
  950. }
  951. priv->alloc_rxb_skb--;
  952. dev_kfree_skb_any(cmd.meta.u.skb);
  953. return rc;
  954. }
  955. static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
  956. struct ieee80211_key_conf *keyconf,
  957. u8 sta_id)
  958. {
  959. unsigned long flags;
  960. __le16 key_flags = 0;
  961. switch (keyconf->alg) {
  962. case ALG_CCMP:
  963. key_flags |= STA_KEY_FLG_CCMP;
  964. key_flags |= cpu_to_le16(
  965. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  966. key_flags &= ~STA_KEY_FLG_INVALID;
  967. break;
  968. case ALG_TKIP:
  969. case ALG_WEP:
  970. default:
  971. return -EINVAL;
  972. }
  973. spin_lock_irqsave(&priv->sta_lock, flags);
  974. priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
  975. priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
  976. memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
  977. keyconf->keylen);
  978. memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
  979. keyconf->keylen);
  980. priv->stations_39[sta_id].sta.key.key_flags = key_flags;
  981. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  982. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  983. spin_unlock_irqrestore(&priv->sta_lock, flags);
  984. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  985. iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
  986. return 0;
  987. }
  988. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  989. {
  990. unsigned long flags;
  991. spin_lock_irqsave(&priv->sta_lock, flags);
  992. memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
  993. memset(&priv->stations_39[sta_id].sta.key, 0,
  994. sizeof(struct iwl4965_keyinfo));
  995. priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  996. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  997. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  998. spin_unlock_irqrestore(&priv->sta_lock, flags);
  999. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1000. iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
  1001. return 0;
  1002. }
  1003. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  1004. {
  1005. struct list_head *element;
  1006. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1007. priv->frames_count);
  1008. while (!list_empty(&priv->free_frames)) {
  1009. element = priv->free_frames.next;
  1010. list_del(element);
  1011. kfree(list_entry(element, struct iwl3945_frame, list));
  1012. priv->frames_count--;
  1013. }
  1014. if (priv->frames_count) {
  1015. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  1016. priv->frames_count);
  1017. priv->frames_count = 0;
  1018. }
  1019. }
  1020. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  1021. {
  1022. struct iwl3945_frame *frame;
  1023. struct list_head *element;
  1024. if (list_empty(&priv->free_frames)) {
  1025. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1026. if (!frame) {
  1027. IWL_ERR(priv, "Could not allocate frame!\n");
  1028. return NULL;
  1029. }
  1030. priv->frames_count++;
  1031. return frame;
  1032. }
  1033. element = priv->free_frames.next;
  1034. list_del(element);
  1035. return list_entry(element, struct iwl3945_frame, list);
  1036. }
  1037. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  1038. {
  1039. memset(frame, 0, sizeof(*frame));
  1040. list_add(&frame->list, &priv->free_frames);
  1041. }
  1042. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  1043. struct ieee80211_hdr *hdr,
  1044. int left)
  1045. {
  1046. if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
  1047. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  1048. (priv->iw_mode != NL80211_IFTYPE_AP)))
  1049. return 0;
  1050. if (priv->ibss_beacon->len > left)
  1051. return 0;
  1052. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1053. return priv->ibss_beacon->len;
  1054. }
  1055. static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
  1056. {
  1057. u8 i;
  1058. int rate_mask;
  1059. /* Set rate mask*/
  1060. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  1061. rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
  1062. else
  1063. rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
  1064. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1065. i = iwl3945_rates[i].next_ieee) {
  1066. if (rate_mask & (1 << i))
  1067. return iwl3945_rates[i].plcp;
  1068. }
  1069. /* No valid rate was found. Assign the lowest one */
  1070. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  1071. return IWL_RATE_1M_PLCP;
  1072. else
  1073. return IWL_RATE_6M_PLCP;
  1074. }
  1075. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  1076. {
  1077. struct iwl3945_frame *frame;
  1078. unsigned int frame_size;
  1079. int rc;
  1080. u8 rate;
  1081. frame = iwl3945_get_free_frame(priv);
  1082. if (!frame) {
  1083. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  1084. "command.\n");
  1085. return -ENOMEM;
  1086. }
  1087. rate = iwl3945_rate_get_lowest_plcp(priv);
  1088. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  1089. rc = iwl3945_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1090. &frame->u.cmd[0]);
  1091. iwl3945_free_frame(priv, frame);
  1092. return rc;
  1093. }
  1094. /******************************************************************************
  1095. *
  1096. * EEPROM related functions
  1097. *
  1098. ******************************************************************************/
  1099. static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
  1100. {
  1101. memcpy(mac, priv->eeprom39.mac_address, 6);
  1102. }
  1103. /*
  1104. * Clear the OWNER_MSK, to establish driver (instead of uCode running on
  1105. * embedded controller) as EEPROM reader; each read is a series of pulses
  1106. * to/from the EEPROM chip, not a single event, so even reads could conflict
  1107. * if they weren't arbitrated by some ownership mechanism. Here, the driver
  1108. * simply claims ownership, which should be safe when this function is called
  1109. * (i.e. before loading uCode!).
  1110. */
  1111. static inline int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
  1112. {
  1113. _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
  1114. return 0;
  1115. }
  1116. /**
  1117. * iwl3945_eeprom_init - read EEPROM contents
  1118. *
  1119. * Load the EEPROM contents from adapter into priv->eeprom39
  1120. *
  1121. * NOTE: This routine uses the non-debug IO access functions.
  1122. */
  1123. int iwl3945_eeprom_init(struct iwl_priv *priv)
  1124. {
  1125. u16 *e = (u16 *)&priv->eeprom39;
  1126. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  1127. int sz = sizeof(priv->eeprom39);
  1128. int ret;
  1129. u16 addr;
  1130. /* The EEPROM structure has several padding buffers within it
  1131. * and when adding new EEPROM maps is subject to programmer errors
  1132. * which may be very difficult to identify without explicitly
  1133. * checking the resulting size of the eeprom map. */
  1134. BUILD_BUG_ON(sizeof(priv->eeprom39) != IWL_EEPROM_IMAGE_SIZE);
  1135. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1136. IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
  1137. return -ENOENT;
  1138. }
  1139. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1140. ret = iwl3945_eeprom_acquire_semaphore(priv);
  1141. if (ret < 0) {
  1142. IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
  1143. return -ENOENT;
  1144. }
  1145. /* eeprom is an array of 16bit values */
  1146. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1147. u32 r;
  1148. _iwl_write32(priv, CSR_EEPROM_REG,
  1149. CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
  1150. _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1151. ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
  1152. CSR_EEPROM_REG_READ_VALID_MSK,
  1153. IWL_EEPROM_ACCESS_TIMEOUT);
  1154. if (ret < 0) {
  1155. IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
  1156. return ret;
  1157. }
  1158. r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
  1159. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  1160. }
  1161. return 0;
  1162. }
  1163. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  1164. {
  1165. if (priv->shared_virt)
  1166. pci_free_consistent(priv->pci_dev,
  1167. sizeof(struct iwl3945_shared),
  1168. priv->shared_virt,
  1169. priv->shared_phys);
  1170. }
  1171. /**
  1172. * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
  1173. *
  1174. * return : set the bit for each supported rate insert in ie
  1175. */
  1176. static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1177. u16 basic_rate, int *left)
  1178. {
  1179. u16 ret_rates = 0, bit;
  1180. int i;
  1181. u8 *cnt = ie;
  1182. u8 *rates = ie + 1;
  1183. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1184. if (bit & supported_rate) {
  1185. ret_rates |= bit;
  1186. rates[*cnt] = iwl3945_rates[i].ieee |
  1187. ((bit & basic_rate) ? 0x80 : 0x00);
  1188. (*cnt)++;
  1189. (*left)--;
  1190. if ((*left <= 0) ||
  1191. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1192. break;
  1193. }
  1194. }
  1195. return ret_rates;
  1196. }
  1197. /**
  1198. * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
  1199. */
  1200. static u16 iwl3945_fill_probe_req(struct iwl_priv *priv,
  1201. struct ieee80211_mgmt *frame,
  1202. int left)
  1203. {
  1204. int len = 0;
  1205. u8 *pos = NULL;
  1206. u16 active_rates, ret_rates, cck_rates;
  1207. /* Make sure there is enough space for the probe request,
  1208. * two mandatory IEs and the data */
  1209. left -= 24;
  1210. if (left < 0)
  1211. return 0;
  1212. len += 24;
  1213. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1214. memcpy(frame->da, iwl_bcast_addr, ETH_ALEN);
  1215. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1216. memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN);
  1217. frame->seq_ctrl = 0;
  1218. /* fill in our indirect SSID IE */
  1219. /* ...next IE... */
  1220. left -= 2;
  1221. if (left < 0)
  1222. return 0;
  1223. len += 2;
  1224. pos = &(frame->u.probe_req.variable[0]);
  1225. *pos++ = WLAN_EID_SSID;
  1226. *pos++ = 0;
  1227. /* fill in supported rate */
  1228. /* ...next IE... */
  1229. left -= 2;
  1230. if (left < 0)
  1231. return 0;
  1232. /* ... fill it in... */
  1233. *pos++ = WLAN_EID_SUPP_RATES;
  1234. *pos = 0;
  1235. priv->active_rate = priv->rates_mask;
  1236. active_rates = priv->active_rate;
  1237. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  1238. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1239. ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
  1240. priv->active_rate_basic, &left);
  1241. active_rates &= ~ret_rates;
  1242. ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
  1243. priv->active_rate_basic, &left);
  1244. active_rates &= ~ret_rates;
  1245. len += 2 + *pos;
  1246. pos += (*pos) + 1;
  1247. if (active_rates == 0)
  1248. goto fill_end;
  1249. /* fill in supported extended rate */
  1250. /* ...next IE... */
  1251. left -= 2;
  1252. if (left < 0)
  1253. return 0;
  1254. /* ... fill it in... */
  1255. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1256. *pos = 0;
  1257. iwl3945_supported_rate_to_ie(pos, active_rates,
  1258. priv->active_rate_basic, &left);
  1259. if (*pos > 0)
  1260. len += 2 + *pos;
  1261. fill_end:
  1262. return (u16)len;
  1263. }
  1264. /*
  1265. * QoS support
  1266. */
  1267. static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
  1268. struct iwl_qosparam_cmd *qos)
  1269. {
  1270. return iwl3945_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1271. sizeof(struct iwl_qosparam_cmd), qos);
  1272. }
  1273. static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
  1274. {
  1275. unsigned long flags;
  1276. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1277. return;
  1278. spin_lock_irqsave(&priv->lock, flags);
  1279. priv->qos_data.def_qos_parm.qos_flags = 0;
  1280. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1281. !priv->qos_data.qos_cap.q_AP.txop_request)
  1282. priv->qos_data.def_qos_parm.qos_flags |=
  1283. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1284. if (priv->qos_data.qos_active)
  1285. priv->qos_data.def_qos_parm.qos_flags |=
  1286. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1287. spin_unlock_irqrestore(&priv->lock, flags);
  1288. if (force || iwl3945_is_associated(priv)) {
  1289. IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
  1290. priv->qos_data.qos_active);
  1291. iwl3945_send_qos_params_command(priv,
  1292. &(priv->qos_data.def_qos_parm));
  1293. }
  1294. }
  1295. /*
  1296. * Power management (not Tx power!) functions
  1297. */
  1298. #define MSEC_TO_USEC 1024
  1299. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1300. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1301. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1302. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1303. __constant_cpu_to_le32(X1), \
  1304. __constant_cpu_to_le32(X2), \
  1305. __constant_cpu_to_le32(X3), \
  1306. __constant_cpu_to_le32(X4)}
  1307. /* default power management (not Tx power) table values */
  1308. /* for TIM 0-10 */
  1309. static struct iwl_power_vec_entry range_0[IWL39_POWER_AC] = {
  1310. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1311. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1312. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1313. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1314. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1315. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1316. };
  1317. /* for TIM > 10 */
  1318. static struct iwl_power_vec_entry range_1[IWL39_POWER_AC] = {
  1319. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1320. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1321. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1322. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1323. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1324. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1325. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1326. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1327. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1328. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1329. };
  1330. int iwl3945_power_init_handle(struct iwl_priv *priv)
  1331. {
  1332. int rc = 0, i;
  1333. struct iwl3945_power_mgr *pow_data;
  1334. int size = sizeof(struct iwl_power_vec_entry) * IWL39_POWER_AC;
  1335. u16 pci_pm;
  1336. IWL_DEBUG_POWER("Initialize power \n");
  1337. pow_data = &(priv->power_data_39);
  1338. memset(pow_data, 0, sizeof(*pow_data));
  1339. pow_data->active_index = IWL_POWER_RANGE_0;
  1340. pow_data->dtim_val = 0xffff;
  1341. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1342. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1343. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1344. if (rc != 0)
  1345. return 0;
  1346. else {
  1347. struct iwl_powertable_cmd *cmd;
  1348. IWL_DEBUG_POWER("adjust power command flags\n");
  1349. for (i = 0; i < IWL39_POWER_AC; i++) {
  1350. cmd = &pow_data->pwr_range_0[i].cmd;
  1351. if (pci_pm & 0x1)
  1352. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1353. else
  1354. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1355. }
  1356. }
  1357. return rc;
  1358. }
  1359. static int iwl3945_update_power_cmd(struct iwl_priv *priv,
  1360. struct iwl_powertable_cmd *cmd, u32 mode)
  1361. {
  1362. int rc = 0, i;
  1363. u8 skip;
  1364. u32 max_sleep = 0;
  1365. struct iwl_power_vec_entry *range;
  1366. u8 period = 0;
  1367. struct iwl3945_power_mgr *pow_data;
  1368. if (mode > IWL_POWER_INDEX_5) {
  1369. IWL_DEBUG_POWER("Error invalid power mode \n");
  1370. return -1;
  1371. }
  1372. pow_data = &(priv->power_data_39);
  1373. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1374. range = &pow_data->pwr_range_0[0];
  1375. else
  1376. range = &pow_data->pwr_range_1[1];
  1377. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
  1378. #ifdef IWL_MAC80211_DISABLE
  1379. if (priv->assoc_network != NULL) {
  1380. unsigned long flags;
  1381. period = priv->assoc_network->tim.tim_period;
  1382. }
  1383. #endif /*IWL_MAC80211_DISABLE */
  1384. skip = range[mode].no_dtim;
  1385. if (period == 0) {
  1386. period = 1;
  1387. skip = 0;
  1388. }
  1389. if (skip == 0) {
  1390. max_sleep = period;
  1391. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1392. } else {
  1393. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1394. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1395. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1396. }
  1397. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1398. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1399. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1400. }
  1401. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1402. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1403. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1404. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1405. le32_to_cpu(cmd->sleep_interval[0]),
  1406. le32_to_cpu(cmd->sleep_interval[1]),
  1407. le32_to_cpu(cmd->sleep_interval[2]),
  1408. le32_to_cpu(cmd->sleep_interval[3]),
  1409. le32_to_cpu(cmd->sleep_interval[4]));
  1410. return rc;
  1411. }
  1412. static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
  1413. {
  1414. u32 uninitialized_var(final_mode);
  1415. int rc;
  1416. struct iwl_powertable_cmd cmd;
  1417. /* If on battery, set to 3,
  1418. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1419. * else user level */
  1420. switch (mode) {
  1421. case IWL39_POWER_BATTERY:
  1422. final_mode = IWL_POWER_INDEX_3;
  1423. break;
  1424. case IWL39_POWER_AC:
  1425. final_mode = IWL_POWER_MODE_CAM;
  1426. break;
  1427. default:
  1428. final_mode = mode;
  1429. break;
  1430. }
  1431. iwl3945_update_power_cmd(priv, &cmd, final_mode);
  1432. /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
  1433. rc = iwl3945_send_cmd_pdu(priv, POWER_TABLE_CMD,
  1434. sizeof(struct iwl3945_powertable_cmd), &cmd);
  1435. if (final_mode == IWL_POWER_MODE_CAM)
  1436. clear_bit(STATUS_POWER_PMI, &priv->status);
  1437. else
  1438. set_bit(STATUS_POWER_PMI, &priv->status);
  1439. return rc;
  1440. }
  1441. #define MAX_UCODE_BEACON_INTERVAL 1024
  1442. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1443. static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
  1444. {
  1445. u16 new_val = 0;
  1446. u16 beacon_factor = 0;
  1447. beacon_factor =
  1448. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1449. / MAX_UCODE_BEACON_INTERVAL;
  1450. new_val = beacon_val / beacon_factor;
  1451. return cpu_to_le16(new_val);
  1452. }
  1453. static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
  1454. {
  1455. u64 interval_tm_unit;
  1456. u64 tsf, result;
  1457. unsigned long flags;
  1458. struct ieee80211_conf *conf = NULL;
  1459. u16 beacon_int = 0;
  1460. conf = ieee80211_get_hw_conf(priv->hw);
  1461. spin_lock_irqsave(&priv->lock, flags);
  1462. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  1463. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1464. tsf = priv->timestamp;
  1465. beacon_int = priv->beacon_int;
  1466. spin_unlock_irqrestore(&priv->lock, flags);
  1467. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  1468. if (beacon_int == 0) {
  1469. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1470. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1471. } else {
  1472. priv->rxon_timing.beacon_interval =
  1473. cpu_to_le16(beacon_int);
  1474. priv->rxon_timing.beacon_interval =
  1475. iwl3945_adjust_beacon_interval(
  1476. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1477. }
  1478. priv->rxon_timing.atim_window = 0;
  1479. } else {
  1480. priv->rxon_timing.beacon_interval =
  1481. iwl3945_adjust_beacon_interval(conf->beacon_int);
  1482. /* TODO: we need to get atim_window from upper stack
  1483. * for now we set to 0 */
  1484. priv->rxon_timing.atim_window = 0;
  1485. }
  1486. interval_tm_unit =
  1487. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1488. result = do_div(tsf, interval_tm_unit);
  1489. priv->rxon_timing.beacon_init_val =
  1490. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1491. IWL_DEBUG_ASSOC
  1492. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1493. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1494. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1495. le16_to_cpu(priv->rxon_timing.atim_window));
  1496. }
  1497. static int iwl3945_scan_initiate(struct iwl_priv *priv)
  1498. {
  1499. if (!iwl_is_ready_rf(priv)) {
  1500. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1501. return -EIO;
  1502. }
  1503. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1504. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1505. return -EAGAIN;
  1506. }
  1507. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1508. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1509. "Queuing.\n");
  1510. return -EAGAIN;
  1511. }
  1512. IWL_DEBUG_INFO("Starting scan...\n");
  1513. if (priv->cfg->sku & IWL_SKU_G)
  1514. priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
  1515. if (priv->cfg->sku & IWL_SKU_A)
  1516. priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
  1517. set_bit(STATUS_SCANNING, &priv->status);
  1518. priv->scan_start = jiffies;
  1519. priv->scan_pass_start = priv->scan_start;
  1520. queue_work(priv->workqueue, &priv->request_scan);
  1521. return 0;
  1522. }
  1523. static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  1524. {
  1525. struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
  1526. if (hw_decrypt)
  1527. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  1528. else
  1529. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  1530. return 0;
  1531. }
  1532. static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
  1533. enum ieee80211_band band)
  1534. {
  1535. if (band == IEEE80211_BAND_5GHZ) {
  1536. priv->staging39_rxon.flags &=
  1537. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1538. | RXON_FLG_CCK_MSK);
  1539. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1540. } else {
  1541. /* Copied from iwl3945_bg_post_associate() */
  1542. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1543. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1544. else
  1545. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1546. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  1547. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1548. priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1549. priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1550. priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1551. }
  1552. }
  1553. /*
  1554. * initialize rxon structure with default values from eeprom
  1555. */
  1556. static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
  1557. int mode)
  1558. {
  1559. const struct iwl_channel_info *ch_info;
  1560. memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
  1561. switch (mode) {
  1562. case NL80211_IFTYPE_AP:
  1563. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
  1564. break;
  1565. case NL80211_IFTYPE_STATION:
  1566. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1567. priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1568. break;
  1569. case NL80211_IFTYPE_ADHOC:
  1570. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1571. priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1572. priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1573. RXON_FILTER_ACCEPT_GRP_MSK;
  1574. break;
  1575. case NL80211_IFTYPE_MONITOR:
  1576. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1577. priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1578. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1579. break;
  1580. default:
  1581. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  1582. break;
  1583. }
  1584. #if 0
  1585. /* TODO: Figure out when short_preamble would be set and cache from
  1586. * that */
  1587. if (!hw_to_local(priv->hw)->short_preamble)
  1588. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1589. else
  1590. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1591. #endif
  1592. ch_info = iwl3945_get_channel_info(priv, priv->band,
  1593. le16_to_cpu(priv->active39_rxon.channel));
  1594. if (!ch_info)
  1595. ch_info = &priv->channel_info[0];
  1596. /*
  1597. * in some case A channels are all non IBSS
  1598. * in this case force B/G channel
  1599. */
  1600. if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
  1601. ch_info = &priv->channel_info[0];
  1602. priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
  1603. if (is_channel_a_band(ch_info))
  1604. priv->band = IEEE80211_BAND_5GHZ;
  1605. else
  1606. priv->band = IEEE80211_BAND_2GHZ;
  1607. iwl3945_set_flags_for_phymode(priv, priv->band);
  1608. priv->staging39_rxon.ofdm_basic_rates =
  1609. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1610. priv->staging39_rxon.cck_basic_rates =
  1611. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1612. }
  1613. static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
  1614. {
  1615. if (mode == NL80211_IFTYPE_ADHOC) {
  1616. const struct iwl_channel_info *ch_info;
  1617. ch_info = iwl3945_get_channel_info(priv,
  1618. priv->band,
  1619. le16_to_cpu(priv->staging39_rxon.channel));
  1620. if (!ch_info || !is_channel_ibss(ch_info)) {
  1621. IWL_ERR(priv, "channel %d not IBSS channel\n",
  1622. le16_to_cpu(priv->staging39_rxon.channel));
  1623. return -EINVAL;
  1624. }
  1625. }
  1626. iwl3945_connection_init_rx_config(priv, mode);
  1627. memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1628. iwl3945_clear_stations_table(priv);
  1629. /* don't commit rxon if rf-kill is on*/
  1630. if (!iwl_is_ready_rf(priv))
  1631. return -EAGAIN;
  1632. cancel_delayed_work(&priv->scan_check);
  1633. if (iwl_scan_cancel_timeout(priv, 100)) {
  1634. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1635. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1636. return -EAGAIN;
  1637. }
  1638. iwl3945_commit_rxon(priv);
  1639. return 0;
  1640. }
  1641. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1642. struct ieee80211_tx_info *info,
  1643. struct iwl_cmd *cmd,
  1644. struct sk_buff *skb_frag,
  1645. int last_frag)
  1646. {
  1647. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  1648. struct iwl3945_hw_key *keyinfo =
  1649. &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
  1650. switch (keyinfo->alg) {
  1651. case ALG_CCMP:
  1652. tx->sec_ctl = TX_CMD_SEC_CCM;
  1653. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  1654. IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
  1655. break;
  1656. case ALG_TKIP:
  1657. #if 0
  1658. tx->sec_ctl = TX_CMD_SEC_TKIP;
  1659. if (last_frag)
  1660. memcpy(tx->tkip_mic.byte, skb_frag->tail - 8,
  1661. 8);
  1662. else
  1663. memset(tx->tkip_mic.byte, 0, 8);
  1664. #endif
  1665. break;
  1666. case ALG_WEP:
  1667. tx->sec_ctl = TX_CMD_SEC_WEP |
  1668. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  1669. if (keyinfo->keylen == 13)
  1670. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  1671. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  1672. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1673. "with key %d\n", info->control.hw_key->hw_key_idx);
  1674. break;
  1675. default:
  1676. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  1677. break;
  1678. }
  1679. }
  1680. /*
  1681. * handle build REPLY_TX command notification.
  1682. */
  1683. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  1684. struct iwl_cmd *cmd,
  1685. struct ieee80211_tx_info *info,
  1686. struct ieee80211_hdr *hdr, u8 std_id)
  1687. {
  1688. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  1689. __le32 tx_flags = tx->tx_flags;
  1690. __le16 fc = hdr->frame_control;
  1691. u8 rc_flags = info->control.rates[0].flags;
  1692. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1693. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  1694. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1695. if (ieee80211_is_mgmt(fc))
  1696. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1697. if (ieee80211_is_probe_resp(fc) &&
  1698. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1699. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1700. } else {
  1701. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1702. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1703. }
  1704. tx->sta_id = std_id;
  1705. if (ieee80211_has_morefrags(fc))
  1706. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1707. if (ieee80211_is_data_qos(fc)) {
  1708. u8 *qc = ieee80211_get_qos_ctl(hdr);
  1709. tx->tid_tspec = qc[0] & 0xf;
  1710. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1711. } else {
  1712. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1713. }
  1714. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  1715. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1716. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1717. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  1718. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1719. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1720. }
  1721. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1722. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1723. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1724. if (ieee80211_is_mgmt(fc)) {
  1725. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  1726. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  1727. else
  1728. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  1729. } else {
  1730. tx->timeout.pm_frame_timeout = 0;
  1731. #ifdef CONFIG_IWL3945_LEDS
  1732. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  1733. #endif
  1734. }
  1735. tx->driver_txop = 0;
  1736. tx->tx_flags = tx_flags;
  1737. tx->next_frame_len = 0;
  1738. }
  1739. /**
  1740. * iwl3945_get_sta_id - Find station's index within station table
  1741. */
  1742. static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  1743. {
  1744. int sta_id;
  1745. u16 fc = le16_to_cpu(hdr->frame_control);
  1746. /* If this frame is broadcast or management, use broadcast station id */
  1747. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1748. is_multicast_ether_addr(hdr->addr1))
  1749. return priv->hw_params.bcast_sta_id;
  1750. switch (priv->iw_mode) {
  1751. /* If we are a client station in a BSS network, use the special
  1752. * AP station entry (that's the only station we communicate with) */
  1753. case NL80211_IFTYPE_STATION:
  1754. return IWL_AP_ID;
  1755. /* If we are an AP, then find the station, or use BCAST */
  1756. case NL80211_IFTYPE_AP:
  1757. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  1758. if (sta_id != IWL_INVALID_STATION)
  1759. return sta_id;
  1760. return priv->hw_params.bcast_sta_id;
  1761. /* If this frame is going out to an IBSS network, find the station,
  1762. * or create a new station table entry */
  1763. case NL80211_IFTYPE_ADHOC: {
  1764. /* Create new station table entry */
  1765. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  1766. if (sta_id != IWL_INVALID_STATION)
  1767. return sta_id;
  1768. sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  1769. if (sta_id != IWL_INVALID_STATION)
  1770. return sta_id;
  1771. IWL_DEBUG_DROP("Station %pM not in station map. "
  1772. "Defaulting to broadcast...\n",
  1773. hdr->addr1);
  1774. iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1775. return priv->hw_params.bcast_sta_id;
  1776. }
  1777. /* If we are in monitor mode, use BCAST. This is required for
  1778. * packet injection. */
  1779. case NL80211_IFTYPE_MONITOR:
  1780. return priv->hw_params.bcast_sta_id;
  1781. default:
  1782. IWL_WARN(priv, "Unknown mode of operation: %d\n",
  1783. priv->iw_mode);
  1784. return priv->hw_params.bcast_sta_id;
  1785. }
  1786. }
  1787. /*
  1788. * start REPLY_TX command process
  1789. */
  1790. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  1791. {
  1792. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1793. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  1794. struct iwl3945_tfd *tfd;
  1795. struct iwl3945_tx_cmd *tx;
  1796. struct iwl_tx_queue *txq = NULL;
  1797. struct iwl_queue *q = NULL;
  1798. struct iwl_cmd *out_cmd = NULL;
  1799. dma_addr_t phys_addr;
  1800. dma_addr_t txcmd_phys;
  1801. int txq_id = skb_get_queue_mapping(skb);
  1802. u16 len, idx, len_org, hdr_len;
  1803. u8 id;
  1804. u8 unicast;
  1805. u8 sta_id;
  1806. u8 tid = 0;
  1807. u16 seq_number = 0;
  1808. __le16 fc;
  1809. u8 wait_write_ptr = 0;
  1810. u8 *qc = NULL;
  1811. unsigned long flags;
  1812. int rc;
  1813. spin_lock_irqsave(&priv->lock, flags);
  1814. if (iwl_is_rfkill(priv)) {
  1815. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1816. goto drop_unlock;
  1817. }
  1818. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1819. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  1820. goto drop_unlock;
  1821. }
  1822. unicast = !is_multicast_ether_addr(hdr->addr1);
  1823. id = 0;
  1824. fc = hdr->frame_control;
  1825. #ifdef CONFIG_IWL3945_DEBUG
  1826. if (ieee80211_is_auth(fc))
  1827. IWL_DEBUG_TX("Sending AUTH frame\n");
  1828. else if (ieee80211_is_assoc_req(fc))
  1829. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1830. else if (ieee80211_is_reassoc_req(fc))
  1831. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1832. #endif
  1833. /* drop all data frame if we are not associated */
  1834. if (ieee80211_is_data(fc) &&
  1835. (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
  1836. (!iwl3945_is_associated(priv) ||
  1837. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  1838. IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
  1839. goto drop_unlock;
  1840. }
  1841. spin_unlock_irqrestore(&priv->lock, flags);
  1842. hdr_len = ieee80211_hdrlen(fc);
  1843. /* Find (or create) index into station table for destination station */
  1844. sta_id = iwl3945_get_sta_id(priv, hdr);
  1845. if (sta_id == IWL_INVALID_STATION) {
  1846. IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
  1847. hdr->addr1);
  1848. goto drop;
  1849. }
  1850. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1851. if (ieee80211_is_data_qos(fc)) {
  1852. qc = ieee80211_get_qos_ctl(hdr);
  1853. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  1854. seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
  1855. IEEE80211_SCTL_SEQ;
  1856. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1857. (hdr->seq_ctrl &
  1858. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1859. seq_number += 0x10;
  1860. }
  1861. /* Descriptor for chosen Tx queue */
  1862. txq = &priv->txq[txq_id];
  1863. q = &txq->q;
  1864. spin_lock_irqsave(&priv->lock, flags);
  1865. /* Set up first empty TFD within this queue's circular TFD buffer */
  1866. tfd = &txq->tfds39[q->write_ptr];
  1867. memset(tfd, 0, sizeof(*tfd));
  1868. idx = get_cmd_index(q, q->write_ptr, 0);
  1869. /* Set up driver data for this TFD */
  1870. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  1871. txq->txb[q->write_ptr].skb[0] = skb;
  1872. /* Init first empty entry in queue's array of Tx/cmd buffers */
  1873. out_cmd = txq->cmd[idx];
  1874. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  1875. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  1876. memset(tx, 0, sizeof(*tx));
  1877. /*
  1878. * Set up the Tx-command (not MAC!) header.
  1879. * Store the chosen Tx queue and TFD index within the sequence field;
  1880. * after Tx, uCode's Tx response will return this value so driver can
  1881. * locate the frame within the tx queue and do post-tx processing.
  1882. */
  1883. out_cmd->hdr.cmd = REPLY_TX;
  1884. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  1885. INDEX_TO_SEQ(q->write_ptr)));
  1886. /* Copy MAC header from skb into command buffer */
  1887. memcpy(tx->hdr, hdr, hdr_len);
  1888. /*
  1889. * Use the first empty entry in this queue's command buffer array
  1890. * to contain the Tx command and MAC header concatenated together
  1891. * (payload data will be in another buffer).
  1892. * Size of this varies, due to varying MAC header length.
  1893. * If end is not dword aligned, we'll have 2 extra bytes at the end
  1894. * of the MAC header (device reads on dword boundaries).
  1895. * We'll tell device about this padding later.
  1896. */
  1897. len = sizeof(struct iwl3945_tx_cmd) +
  1898. sizeof(struct iwl_cmd_header) + hdr_len;
  1899. len_org = len;
  1900. len = (len + 3) & ~3;
  1901. if (len_org != len)
  1902. len_org = 1;
  1903. else
  1904. len_org = 0;
  1905. /* Physical address of this Tx command's header (not MAC header!),
  1906. * within command buffer array. */
  1907. txcmd_phys = pci_map_single(priv->pci_dev,
  1908. out_cmd, sizeof(struct iwl_cmd),
  1909. PCI_DMA_TODEVICE);
  1910. pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
  1911. pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
  1912. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1913. * first entry */
  1914. txcmd_phys += offsetof(struct iwl_cmd, hdr);
  1915. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1916. * first entry */
  1917. iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  1918. if (info->control.hw_key)
  1919. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
  1920. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  1921. * if any (802.11 null frames have no payload). */
  1922. len = skb->len - hdr_len;
  1923. if (len) {
  1924. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  1925. len, PCI_DMA_TODEVICE);
  1926. iwl3945_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  1927. }
  1928. if (!len)
  1929. /* If there is no payload, then we use only one Tx buffer */
  1930. tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(1));
  1931. else
  1932. /* Else use 2 buffers.
  1933. * Tell 3945 about any padding after MAC header */
  1934. tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(2) |
  1935. TFD_CTL_PAD_SET(U32_PAD(len)));
  1936. /* Total # bytes to be transmitted */
  1937. len = (u16)skb->len;
  1938. tx->len = cpu_to_le16(len);
  1939. /* TODO need this for burst mode later on */
  1940. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  1941. /* set is_hcca to 0; it probably will never be implemented */
  1942. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  1943. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  1944. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  1945. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  1946. txq->need_update = 1;
  1947. if (qc)
  1948. priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
  1949. } else {
  1950. wait_write_ptr = 1;
  1951. txq->need_update = 0;
  1952. }
  1953. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  1954. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  1955. ieee80211_hdrlen(fc));
  1956. /* Tell device the write index *just past* this latest filled TFD */
  1957. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  1958. rc = iwl_txq_update_write_ptr(priv, txq);
  1959. spin_unlock_irqrestore(&priv->lock, flags);
  1960. if (rc)
  1961. return rc;
  1962. if ((iwl_queue_space(q) < q->high_mark)
  1963. && priv->mac80211_registered) {
  1964. if (wait_write_ptr) {
  1965. spin_lock_irqsave(&priv->lock, flags);
  1966. txq->need_update = 1;
  1967. iwl_txq_update_write_ptr(priv, txq);
  1968. spin_unlock_irqrestore(&priv->lock, flags);
  1969. }
  1970. ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
  1971. }
  1972. return 0;
  1973. drop_unlock:
  1974. spin_unlock_irqrestore(&priv->lock, flags);
  1975. drop:
  1976. return -1;
  1977. }
  1978. static void iwl3945_set_rate(struct iwl_priv *priv)
  1979. {
  1980. const struct ieee80211_supported_band *sband = NULL;
  1981. struct ieee80211_rate *rate;
  1982. int i;
  1983. sband = iwl_get_hw_mode(priv, priv->band);
  1984. if (!sband) {
  1985. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  1986. return;
  1987. }
  1988. priv->active_rate = 0;
  1989. priv->active_rate_basic = 0;
  1990. IWL_DEBUG_RATE("Setting rates for %s GHz\n",
  1991. sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
  1992. for (i = 0; i < sband->n_bitrates; i++) {
  1993. rate = &sband->bitrates[i];
  1994. if ((rate->hw_value < IWL_RATE_COUNT) &&
  1995. !(rate->flags & IEEE80211_CHAN_DISABLED)) {
  1996. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
  1997. rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
  1998. priv->active_rate |= (1 << rate->hw_value);
  1999. }
  2000. }
  2001. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2002. priv->active_rate, priv->active_rate_basic);
  2003. /*
  2004. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2005. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2006. * OFDM
  2007. */
  2008. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2009. priv->staging39_rxon.cck_basic_rates =
  2010. ((priv->active_rate_basic &
  2011. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2012. else
  2013. priv->staging39_rxon.cck_basic_rates =
  2014. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2015. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2016. priv->staging39_rxon.ofdm_basic_rates =
  2017. ((priv->active_rate_basic &
  2018. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2019. IWL_FIRST_OFDM_RATE) & 0xFF;
  2020. else
  2021. priv->staging39_rxon.ofdm_basic_rates =
  2022. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2023. }
  2024. static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2025. {
  2026. unsigned long flags;
  2027. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2028. return;
  2029. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2030. disable_radio ? "OFF" : "ON");
  2031. if (disable_radio) {
  2032. iwl_scan_cancel(priv);
  2033. /* FIXME: This is a workaround for AP */
  2034. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  2035. spin_lock_irqsave(&priv->lock, flags);
  2036. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2037. CSR_UCODE_SW_BIT_RFKILL);
  2038. spin_unlock_irqrestore(&priv->lock, flags);
  2039. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2040. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2041. }
  2042. return;
  2043. }
  2044. spin_lock_irqsave(&priv->lock, flags);
  2045. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2046. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2047. spin_unlock_irqrestore(&priv->lock, flags);
  2048. /* wake up ucode */
  2049. msleep(10);
  2050. spin_lock_irqsave(&priv->lock, flags);
  2051. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2052. if (!iwl_grab_nic_access(priv))
  2053. iwl_release_nic_access(priv);
  2054. spin_unlock_irqrestore(&priv->lock, flags);
  2055. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2056. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2057. "disabled by HW switch\n");
  2058. return;
  2059. }
  2060. if (priv->is_open)
  2061. queue_work(priv->workqueue, &priv->restart);
  2062. return;
  2063. }
  2064. void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2065. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2066. {
  2067. u16 fc =
  2068. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2069. if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2070. return;
  2071. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2072. return;
  2073. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2074. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2075. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2076. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2077. RX_RES_STATUS_BAD_ICV_MIC)
  2078. stats->flag |= RX_FLAG_MMIC_ERROR;
  2079. case RX_RES_STATUS_SEC_TYPE_WEP:
  2080. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2081. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2082. RX_RES_STATUS_DECRYPT_OK) {
  2083. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2084. stats->flag |= RX_FLAG_DECRYPTED;
  2085. }
  2086. break;
  2087. default:
  2088. break;
  2089. }
  2090. }
  2091. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2092. #include "iwl-spectrum.h"
  2093. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2094. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2095. #define TIME_UNIT 1024
  2096. /*
  2097. * extended beacon time format
  2098. * time in usec will be changed into a 32-bit value in 8:24 format
  2099. * the high 1 byte is the beacon counts
  2100. * the lower 3 bytes is the time in usec within one beacon interval
  2101. */
  2102. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2103. {
  2104. u32 quot;
  2105. u32 rem;
  2106. u32 interval = beacon_interval * 1024;
  2107. if (!interval || !usec)
  2108. return 0;
  2109. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2110. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2111. return (quot << 24) + rem;
  2112. }
  2113. /* base is usually what we get from ucode with each received frame,
  2114. * the same as HW timer counter counting down
  2115. */
  2116. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2117. {
  2118. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2119. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2120. u32 interval = beacon_interval * TIME_UNIT;
  2121. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2122. (addon & BEACON_TIME_MASK_HIGH);
  2123. if (base_low > addon_low)
  2124. res += base_low - addon_low;
  2125. else if (base_low < addon_low) {
  2126. res += interval + base_low - addon_low;
  2127. res += (1 << 24);
  2128. } else
  2129. res += (1 << 24);
  2130. return cpu_to_le32(res);
  2131. }
  2132. static int iwl3945_get_measurement(struct iwl_priv *priv,
  2133. struct ieee80211_measurement_params *params,
  2134. u8 type)
  2135. {
  2136. struct iwl_spectrum_cmd spectrum;
  2137. struct iwl_rx_packet *res;
  2138. struct iwl_host_cmd cmd = {
  2139. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2140. .data = (void *)&spectrum,
  2141. .meta.flags = CMD_WANT_SKB,
  2142. };
  2143. u32 add_time = le64_to_cpu(params->start_time);
  2144. int rc;
  2145. int spectrum_resp_status;
  2146. int duration = le16_to_cpu(params->duration);
  2147. if (iwl3945_is_associated(priv))
  2148. add_time =
  2149. iwl3945_usecs_to_beacons(
  2150. le64_to_cpu(params->start_time) - priv->last_tsf,
  2151. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2152. memset(&spectrum, 0, sizeof(spectrum));
  2153. spectrum.channel_count = cpu_to_le16(1);
  2154. spectrum.flags =
  2155. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2156. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2157. cmd.len = sizeof(spectrum);
  2158. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2159. if (iwl3945_is_associated(priv))
  2160. spectrum.start_time =
  2161. iwl3945_add_beacon_time(priv->last_beacon_time,
  2162. add_time,
  2163. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2164. else
  2165. spectrum.start_time = 0;
  2166. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2167. spectrum.channels[0].channel = params->channel;
  2168. spectrum.channels[0].type = type;
  2169. if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2170. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2171. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2172. rc = iwl3945_send_cmd_sync(priv, &cmd);
  2173. if (rc)
  2174. return rc;
  2175. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  2176. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2177. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  2178. rc = -EIO;
  2179. }
  2180. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2181. switch (spectrum_resp_status) {
  2182. case 0: /* Command will be handled */
  2183. if (res->u.spectrum.id != 0xff) {
  2184. IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
  2185. res->u.spectrum.id);
  2186. priv->measurement_status &= ~MEASUREMENT_READY;
  2187. }
  2188. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2189. rc = 0;
  2190. break;
  2191. case 1: /* Command will not be handled */
  2192. rc = -EAGAIN;
  2193. break;
  2194. }
  2195. dev_kfree_skb_any(cmd.meta.u.skb);
  2196. return rc;
  2197. }
  2198. #endif
  2199. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  2200. struct iwl_rx_mem_buffer *rxb)
  2201. {
  2202. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2203. struct iwl_alive_resp *palive;
  2204. struct delayed_work *pwork;
  2205. palive = &pkt->u.alive_frame;
  2206. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2207. "0x%01X 0x%01X\n",
  2208. palive->is_valid, palive->ver_type,
  2209. palive->ver_subtype);
  2210. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2211. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2212. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  2213. sizeof(struct iwl_alive_resp));
  2214. pwork = &priv->init_alive_start;
  2215. } else {
  2216. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2217. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2218. sizeof(struct iwl_alive_resp));
  2219. pwork = &priv->alive_start;
  2220. iwl3945_disable_events(priv);
  2221. }
  2222. /* We delay the ALIVE response by 5ms to
  2223. * give the HW RF Kill time to activate... */
  2224. if (palive->is_valid == UCODE_VALID_OK)
  2225. queue_delayed_work(priv->workqueue, pwork,
  2226. msecs_to_jiffies(5));
  2227. else
  2228. IWL_WARN(priv, "uCode did not respond OK.\n");
  2229. }
  2230. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  2231. struct iwl_rx_mem_buffer *rxb)
  2232. {
  2233. #ifdef CONFIG_IWLWIFI_DEBUG
  2234. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2235. #endif
  2236. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2237. return;
  2238. }
  2239. static void iwl3945_rx_reply_error(struct iwl_priv *priv,
  2240. struct iwl_rx_mem_buffer *rxb)
  2241. {
  2242. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2243. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  2244. "seq 0x%04X ser 0x%08X\n",
  2245. le32_to_cpu(pkt->u.err_resp.error_type),
  2246. get_cmd_string(pkt->u.err_resp.cmd_id),
  2247. pkt->u.err_resp.cmd_id,
  2248. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2249. le32_to_cpu(pkt->u.err_resp.error_info));
  2250. }
  2251. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2252. static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  2253. {
  2254. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2255. struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
  2256. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  2257. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2258. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2259. rxon->channel = csa->channel;
  2260. priv->staging39_rxon.channel = csa->channel;
  2261. }
  2262. static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2263. struct iwl_rx_mem_buffer *rxb)
  2264. {
  2265. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2266. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2267. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2268. if (!report->state) {
  2269. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2270. "Spectrum Measure Notification: Start\n");
  2271. return;
  2272. }
  2273. memcpy(&priv->measure_report, report, sizeof(*report));
  2274. priv->measurement_status |= MEASUREMENT_READY;
  2275. #endif
  2276. }
  2277. static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
  2278. struct iwl_rx_mem_buffer *rxb)
  2279. {
  2280. #ifdef CONFIG_IWL3945_DEBUG
  2281. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2282. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2283. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2284. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2285. #endif
  2286. }
  2287. static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2288. struct iwl_rx_mem_buffer *rxb)
  2289. {
  2290. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2291. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2292. "notification for %s:\n",
  2293. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2294. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
  2295. le32_to_cpu(pkt->len));
  2296. }
  2297. static void iwl3945_bg_beacon_update(struct work_struct *work)
  2298. {
  2299. struct iwl_priv *priv =
  2300. container_of(work, struct iwl_priv, beacon_update);
  2301. struct sk_buff *beacon;
  2302. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2303. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  2304. if (!beacon) {
  2305. IWL_ERR(priv, "update beacon failed\n");
  2306. return;
  2307. }
  2308. mutex_lock(&priv->mutex);
  2309. /* new beacon skb is allocated every time; dispose previous.*/
  2310. if (priv->ibss_beacon)
  2311. dev_kfree_skb(priv->ibss_beacon);
  2312. priv->ibss_beacon = beacon;
  2313. mutex_unlock(&priv->mutex);
  2314. iwl3945_send_beacon_cmd(priv);
  2315. }
  2316. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  2317. struct iwl_rx_mem_buffer *rxb)
  2318. {
  2319. #ifdef CONFIG_IWL3945_DEBUG
  2320. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2321. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  2322. u8 rate = beacon->beacon_notify_hdr.rate;
  2323. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  2324. "tsf %d %d rate %d\n",
  2325. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  2326. beacon->beacon_notify_hdr.failure_frame,
  2327. le32_to_cpu(beacon->ibss_mgr_status),
  2328. le32_to_cpu(beacon->high_tsf),
  2329. le32_to_cpu(beacon->low_tsf), rate);
  2330. #endif
  2331. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  2332. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  2333. queue_work(priv->workqueue, &priv->beacon_update);
  2334. }
  2335. /* Service response to REPLY_SCAN_CMD (0x80) */
  2336. static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
  2337. struct iwl_rx_mem_buffer *rxb)
  2338. {
  2339. #ifdef CONFIG_IWL3945_DEBUG
  2340. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2341. struct iwl_scanreq_notification *notif =
  2342. (struct iwl_scanreq_notification *)pkt->u.raw;
  2343. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  2344. #endif
  2345. }
  2346. /* Service SCAN_START_NOTIFICATION (0x82) */
  2347. static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
  2348. struct iwl_rx_mem_buffer *rxb)
  2349. {
  2350. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2351. struct iwl_scanstart_notification *notif =
  2352. (struct iwl_scanstart_notification *)pkt->u.raw;
  2353. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  2354. IWL_DEBUG_SCAN("Scan start: "
  2355. "%d [802.11%s] "
  2356. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  2357. notif->channel,
  2358. notif->band ? "bg" : "a",
  2359. notif->tsf_high,
  2360. notif->tsf_low, notif->status, notif->beacon_timer);
  2361. }
  2362. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  2363. static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
  2364. struct iwl_rx_mem_buffer *rxb)
  2365. {
  2366. #ifdef CONFIG_IWLWIFI_DEBUG
  2367. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2368. struct iwl_scanresults_notification *notif =
  2369. (struct iwl_scanresults_notification *)pkt->u.raw;
  2370. #endif
  2371. IWL_DEBUG_SCAN("Scan ch.res: "
  2372. "%d [802.11%s] "
  2373. "(TSF: 0x%08X:%08X) - %d "
  2374. "elapsed=%lu usec (%dms since last)\n",
  2375. notif->channel,
  2376. notif->band ? "bg" : "a",
  2377. le32_to_cpu(notif->tsf_high),
  2378. le32_to_cpu(notif->tsf_low),
  2379. le32_to_cpu(notif->statistics[0]),
  2380. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  2381. jiffies_to_msecs(elapsed_jiffies
  2382. (priv->last_scan_jiffies, jiffies)));
  2383. priv->last_scan_jiffies = jiffies;
  2384. priv->next_scan_jiffies = 0;
  2385. }
  2386. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  2387. static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
  2388. struct iwl_rx_mem_buffer *rxb)
  2389. {
  2390. #ifdef CONFIG_IWLWIFI_DEBUG
  2391. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2392. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  2393. #endif
  2394. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  2395. scan_notif->scanned_channels,
  2396. scan_notif->tsf_low,
  2397. scan_notif->tsf_high, scan_notif->status);
  2398. /* The HW is no longer scanning */
  2399. clear_bit(STATUS_SCAN_HW, &priv->status);
  2400. /* The scan completion notification came in, so kill that timer... */
  2401. cancel_delayed_work(&priv->scan_check);
  2402. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  2403. (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
  2404. "2.4" : "5.2",
  2405. jiffies_to_msecs(elapsed_jiffies
  2406. (priv->scan_pass_start, jiffies)));
  2407. /* Remove this scanned band from the list of pending
  2408. * bands to scan, band G precedes A in order of scanning
  2409. * as seen in iwl3945_bg_request_scan */
  2410. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
  2411. priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
  2412. else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
  2413. priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
  2414. /* If a request to abort was given, or the scan did not succeed
  2415. * then we reset the scan state machine and terminate,
  2416. * re-queuing another scan if one has been requested */
  2417. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2418. IWL_DEBUG_INFO("Aborted scan completed.\n");
  2419. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  2420. } else {
  2421. /* If there are more bands on this scan pass reschedule */
  2422. if (priv->scan_bands > 0)
  2423. goto reschedule;
  2424. }
  2425. priv->last_scan_jiffies = jiffies;
  2426. priv->next_scan_jiffies = 0;
  2427. IWL_DEBUG_INFO("Setting scan to off\n");
  2428. clear_bit(STATUS_SCANNING, &priv->status);
  2429. IWL_DEBUG_INFO("Scan took %dms\n",
  2430. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  2431. queue_work(priv->workqueue, &priv->scan_completed);
  2432. return;
  2433. reschedule:
  2434. priv->scan_pass_start = jiffies;
  2435. queue_work(priv->workqueue, &priv->request_scan);
  2436. }
  2437. /* Handle notification from uCode that card's power state is changing
  2438. * due to software, hardware, or critical temperature RFKILL */
  2439. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  2440. struct iwl_rx_mem_buffer *rxb)
  2441. {
  2442. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2443. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  2444. unsigned long status = priv->status;
  2445. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  2446. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  2447. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  2448. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2449. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2450. if (flags & HW_CARD_DISABLED)
  2451. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2452. else
  2453. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2454. if (flags & SW_CARD_DISABLED)
  2455. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2456. else
  2457. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2458. iwl_scan_cancel(priv);
  2459. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  2460. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  2461. (test_bit(STATUS_RF_KILL_SW, &status) !=
  2462. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  2463. queue_work(priv->workqueue, &priv->rf_kill);
  2464. else
  2465. wake_up_interruptible(&priv->wait_command_queue);
  2466. }
  2467. /**
  2468. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  2469. *
  2470. * Setup the RX handlers for each of the reply types sent from the uCode
  2471. * to the host.
  2472. *
  2473. * This function chains into the hardware specific files for them to setup
  2474. * any hardware specific handlers as well.
  2475. */
  2476. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  2477. {
  2478. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  2479. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  2480. priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
  2481. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
  2482. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  2483. iwl3945_rx_spectrum_measure_notif;
  2484. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
  2485. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  2486. iwl3945_rx_pm_debug_statistics_notif;
  2487. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  2488. /*
  2489. * The same handler is used for both the REPLY to a discrete
  2490. * statistics request from the host as well as for the periodic
  2491. * statistics notifications (after received beacons) from the uCode.
  2492. */
  2493. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  2494. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  2495. priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
  2496. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
  2497. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  2498. iwl3945_rx_scan_results_notif;
  2499. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  2500. iwl3945_rx_scan_complete_notif;
  2501. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  2502. /* Set up hardware specific Rx handlers */
  2503. iwl3945_hw_rx_handler_setup(priv);
  2504. }
  2505. /**
  2506. * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
  2507. * When FW advances 'R' index, all entries between old and new 'R' index
  2508. * need to be reclaimed.
  2509. */
  2510. static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
  2511. int txq_id, int index)
  2512. {
  2513. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2514. struct iwl_queue *q = &txq->q;
  2515. int nfreed = 0;
  2516. if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
  2517. IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
  2518. "is out of range [0-%d] %d %d.\n", txq_id,
  2519. index, q->n_bd, q->write_ptr, q->read_ptr);
  2520. return;
  2521. }
  2522. for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
  2523. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2524. if (nfreed > 1) {
  2525. IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
  2526. q->write_ptr, q->read_ptr);
  2527. queue_work(priv->workqueue, &priv->restart);
  2528. break;
  2529. }
  2530. nfreed++;
  2531. }
  2532. }
  2533. /**
  2534. * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2535. * @rxb: Rx buffer to reclaim
  2536. *
  2537. * If an Rx buffer has an async callback associated with it the callback
  2538. * will be executed. The attached skb (if present) will only be freed
  2539. * if the callback returns 1
  2540. */
  2541. static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
  2542. struct iwl_rx_mem_buffer *rxb)
  2543. {
  2544. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2545. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2546. int txq_id = SEQ_TO_QUEUE(sequence);
  2547. int index = SEQ_TO_INDEX(sequence);
  2548. int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
  2549. int cmd_index;
  2550. struct iwl_cmd *cmd;
  2551. if (WARN(txq_id != IWL_CMD_QUEUE_NUM,
  2552. "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n",
  2553. txq_id, sequence,
  2554. priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr,
  2555. priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) {
  2556. iwl_print_hex_dump(priv, IWL_DL_INFO , rxb, 32);
  2557. return;
  2558. }
  2559. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  2560. cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  2561. /* Input error checking is done when commands are added to queue. */
  2562. if (cmd->meta.flags & CMD_WANT_SKB) {
  2563. cmd->meta.source->u.skb = rxb->skb;
  2564. rxb->skb = NULL;
  2565. } else if (cmd->meta.u.callback &&
  2566. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  2567. rxb->skb = NULL;
  2568. iwl3945_cmd_queue_reclaim(priv, txq_id, index);
  2569. if (!(cmd->meta.flags & CMD_ASYNC)) {
  2570. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  2571. wake_up_interruptible(&priv->wait_command_queue);
  2572. }
  2573. }
  2574. /************************** RX-FUNCTIONS ****************************/
  2575. /*
  2576. * Rx theory of operation
  2577. *
  2578. * The host allocates 32 DMA target addresses and passes the host address
  2579. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  2580. * 0 to 31
  2581. *
  2582. * Rx Queue Indexes
  2583. * The host/firmware share two index registers for managing the Rx buffers.
  2584. *
  2585. * The READ index maps to the first position that the firmware may be writing
  2586. * to -- the driver can read up to (but not including) this position and get
  2587. * good data.
  2588. * The READ index is managed by the firmware once the card is enabled.
  2589. *
  2590. * The WRITE index maps to the last position the driver has read from -- the
  2591. * position preceding WRITE is the last slot the firmware can place a packet.
  2592. *
  2593. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2594. * WRITE = READ.
  2595. *
  2596. * During initialization, the host sets up the READ queue position to the first
  2597. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  2598. *
  2599. * When the firmware places a packet in a buffer, it will advance the READ index
  2600. * and fire the RX interrupt. The driver can then query the READ index and
  2601. * process as many packets as possible, moving the WRITE index forward as it
  2602. * resets the Rx queue buffers with new memory.
  2603. *
  2604. * The management in the driver is as follows:
  2605. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2606. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2607. * to replenish the iwl->rxq->rx_free.
  2608. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  2609. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  2610. * 'processed' and 'read' driver indexes as well)
  2611. * + A received packet is processed and handed to the kernel network stack,
  2612. * detached from the iwl->rxq. The driver 'processed' index is updated.
  2613. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2614. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2615. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  2616. * were enough free buffers and RX_STALLED is set it is cleared.
  2617. *
  2618. *
  2619. * Driver sequence:
  2620. *
  2621. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2622. * iwl3945_rx_queue_restock
  2623. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  2624. * queue, updates firmware pointers, and updates
  2625. * the WRITE index. If insufficient rx_free buffers
  2626. * are available, schedules iwl3945_rx_replenish
  2627. *
  2628. * -- enable interrupts --
  2629. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  2630. * READ INDEX, detaching the SKB from the pool.
  2631. * Moves the packet buffer from queue to rx_used.
  2632. * Calls iwl3945_rx_queue_restock to refill any empty
  2633. * slots.
  2634. * ...
  2635. *
  2636. */
  2637. /**
  2638. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  2639. */
  2640. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  2641. dma_addr_t dma_addr)
  2642. {
  2643. return cpu_to_le32((u32)dma_addr);
  2644. }
  2645. /**
  2646. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  2647. *
  2648. * If there are slots in the RX queue that need to be restocked,
  2649. * and we have free pre-allocated buffers, fill the ranks as much
  2650. * as we can, pulling from rx_free.
  2651. *
  2652. * This moves the 'write' index forward to catch up with 'processed', and
  2653. * also updates the memory address in the firmware to reference the new
  2654. * target buffer.
  2655. */
  2656. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  2657. {
  2658. struct iwl_rx_queue *rxq = &priv->rxq;
  2659. struct list_head *element;
  2660. struct iwl_rx_mem_buffer *rxb;
  2661. unsigned long flags;
  2662. int write, rc;
  2663. spin_lock_irqsave(&rxq->lock, flags);
  2664. write = rxq->write & ~0x7;
  2665. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  2666. /* Get next free Rx buffer, remove from free list */
  2667. element = rxq->rx_free.next;
  2668. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  2669. list_del(element);
  2670. /* Point to Rx buffer via next RBD in circular buffer */
  2671. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  2672. rxq->queue[rxq->write] = rxb;
  2673. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  2674. rxq->free_count--;
  2675. }
  2676. spin_unlock_irqrestore(&rxq->lock, flags);
  2677. /* If the pre-allocated buffer pool is dropping low, schedule to
  2678. * refill it */
  2679. if (rxq->free_count <= RX_LOW_WATERMARK)
  2680. queue_work(priv->workqueue, &priv->rx_replenish);
  2681. /* If we've added more space for the firmware to place data, tell it.
  2682. * Increment device's write pointer in multiples of 8. */
  2683. if ((write != (rxq->write & ~0x7))
  2684. || (abs(rxq->write - rxq->read) > 7)) {
  2685. spin_lock_irqsave(&rxq->lock, flags);
  2686. rxq->need_update = 1;
  2687. spin_unlock_irqrestore(&rxq->lock, flags);
  2688. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  2689. if (rc)
  2690. return rc;
  2691. }
  2692. return 0;
  2693. }
  2694. /**
  2695. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  2696. *
  2697. * When moving to rx_free an SKB is allocated for the slot.
  2698. *
  2699. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  2700. * This is called as a scheduled work item (except for during initialization)
  2701. */
  2702. static void iwl3945_rx_allocate(struct iwl_priv *priv)
  2703. {
  2704. struct iwl_rx_queue *rxq = &priv->rxq;
  2705. struct list_head *element;
  2706. struct iwl_rx_mem_buffer *rxb;
  2707. unsigned long flags;
  2708. spin_lock_irqsave(&rxq->lock, flags);
  2709. while (!list_empty(&rxq->rx_used)) {
  2710. element = rxq->rx_used.next;
  2711. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  2712. /* Alloc a new receive buffer */
  2713. rxb->skb =
  2714. alloc_skb(priv->hw_params.rx_buf_size,
  2715. __GFP_NOWARN | GFP_ATOMIC);
  2716. if (!rxb->skb) {
  2717. if (net_ratelimit())
  2718. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  2719. /* We don't reschedule replenish work here -- we will
  2720. * call the restock method and if it still needs
  2721. * more buffers it will schedule replenish */
  2722. break;
  2723. }
  2724. /* If radiotap head is required, reserve some headroom here.
  2725. * The physical head count is a variable rx_stats->phy_count.
  2726. * We reserve 4 bytes here. Plus these extra bytes, the
  2727. * headroom of the physical head should be enough for the
  2728. * radiotap head that iwl3945 supported. See iwl3945_rt.
  2729. */
  2730. skb_reserve(rxb->skb, 4);
  2731. priv->alloc_rxb_skb++;
  2732. list_del(element);
  2733. /* Get physical address of RB/SKB */
  2734. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  2735. rxb->skb->data,
  2736. priv->hw_params.rx_buf_size,
  2737. PCI_DMA_FROMDEVICE);
  2738. list_add_tail(&rxb->list, &rxq->rx_free);
  2739. rxq->free_count++;
  2740. }
  2741. spin_unlock_irqrestore(&rxq->lock, flags);
  2742. }
  2743. /*
  2744. * this should be called while priv->lock is locked
  2745. */
  2746. static void __iwl3945_rx_replenish(void *data)
  2747. {
  2748. struct iwl_priv *priv = data;
  2749. iwl3945_rx_allocate(priv);
  2750. iwl3945_rx_queue_restock(priv);
  2751. }
  2752. void iwl3945_rx_replenish(void *data)
  2753. {
  2754. struct iwl_priv *priv = data;
  2755. unsigned long flags;
  2756. iwl3945_rx_allocate(priv);
  2757. spin_lock_irqsave(&priv->lock, flags);
  2758. iwl3945_rx_queue_restock(priv);
  2759. spin_unlock_irqrestore(&priv->lock, flags);
  2760. }
  2761. /* Convert linear signal-to-noise ratio into dB */
  2762. static u8 ratio2dB[100] = {
  2763. /* 0 1 2 3 4 5 6 7 8 9 */
  2764. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  2765. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  2766. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  2767. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  2768. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  2769. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  2770. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  2771. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  2772. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  2773. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  2774. };
  2775. /* Calculates a relative dB value from a ratio of linear
  2776. * (i.e. not dB) signal levels.
  2777. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  2778. int iwl3945_calc_db_from_ratio(int sig_ratio)
  2779. {
  2780. /* 1000:1 or higher just report as 60 dB */
  2781. if (sig_ratio >= 1000)
  2782. return 60;
  2783. /* 100:1 or higher, divide by 10 and use table,
  2784. * add 20 dB to make up for divide by 10 */
  2785. if (sig_ratio >= 100)
  2786. return 20 + (int)ratio2dB[sig_ratio/10];
  2787. /* We shouldn't see this */
  2788. if (sig_ratio < 1)
  2789. return 0;
  2790. /* Use table for ratios 1:1 - 99:1 */
  2791. return (int)ratio2dB[sig_ratio];
  2792. }
  2793. #define PERFECT_RSSI (-20) /* dBm */
  2794. #define WORST_RSSI (-95) /* dBm */
  2795. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  2796. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  2797. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  2798. * about formulas used below. */
  2799. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  2800. {
  2801. int sig_qual;
  2802. int degradation = PERFECT_RSSI - rssi_dbm;
  2803. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  2804. * as indicator; formula is (signal dbm - noise dbm).
  2805. * SNR at or above 40 is a great signal (100%).
  2806. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  2807. * Weakest usable signal is usually 10 - 15 dB SNR. */
  2808. if (noise_dbm) {
  2809. if (rssi_dbm - noise_dbm >= 40)
  2810. return 100;
  2811. else if (rssi_dbm < noise_dbm)
  2812. return 0;
  2813. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  2814. /* Else use just the signal level.
  2815. * This formula is a least squares fit of data points collected and
  2816. * compared with a reference system that had a percentage (%) display
  2817. * for signal quality. */
  2818. } else
  2819. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  2820. (15 * RSSI_RANGE + 62 * degradation)) /
  2821. (RSSI_RANGE * RSSI_RANGE);
  2822. if (sig_qual > 100)
  2823. sig_qual = 100;
  2824. else if (sig_qual < 1)
  2825. sig_qual = 0;
  2826. return sig_qual;
  2827. }
  2828. /**
  2829. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  2830. *
  2831. * Uses the priv->rx_handlers callback function array to invoke
  2832. * the appropriate handlers, including command responses,
  2833. * frame-received notifications, and other notifications.
  2834. */
  2835. static void iwl3945_rx_handle(struct iwl_priv *priv)
  2836. {
  2837. struct iwl_rx_mem_buffer *rxb;
  2838. struct iwl_rx_packet *pkt;
  2839. struct iwl_rx_queue *rxq = &priv->rxq;
  2840. u32 r, i;
  2841. int reclaim;
  2842. unsigned long flags;
  2843. u8 fill_rx = 0;
  2844. u32 count = 8;
  2845. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  2846. * buffer that the driver may process (last buffer filled by ucode). */
  2847. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  2848. i = rxq->read;
  2849. if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  2850. fill_rx = 1;
  2851. /* Rx interrupt, but nothing sent from uCode */
  2852. if (i == r)
  2853. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  2854. while (i != r) {
  2855. rxb = rxq->queue[i];
  2856. /* If an RXB doesn't have a Rx queue slot associated with it,
  2857. * then a bug has been introduced in the queue refilling
  2858. * routines -- catch it here */
  2859. BUG_ON(rxb == NULL);
  2860. rxq->queue[i] = NULL;
  2861. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
  2862. priv->hw_params.rx_buf_size,
  2863. PCI_DMA_FROMDEVICE);
  2864. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2865. /* Reclaim a command buffer only if this packet is a response
  2866. * to a (driver-originated) command.
  2867. * If the packet (e.g. Rx frame) originated from uCode,
  2868. * there is no command buffer to reclaim.
  2869. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  2870. * but apparently a few don't get set; catch them here. */
  2871. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  2872. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  2873. (pkt->hdr.cmd != REPLY_TX);
  2874. /* Based on type of command response or notification,
  2875. * handle those that need handling via function in
  2876. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  2877. if (priv->rx_handlers[pkt->hdr.cmd]) {
  2878. IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  2879. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  2880. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  2881. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  2882. } else {
  2883. /* No handling needed */
  2884. IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  2885. "r %d i %d No handler needed for %s, 0x%02x\n",
  2886. r, i, get_cmd_string(pkt->hdr.cmd),
  2887. pkt->hdr.cmd);
  2888. }
  2889. if (reclaim) {
  2890. /* Invoke any callbacks, transfer the skb to caller, and
  2891. * fire off the (possibly) blocking iwl3945_send_cmd()
  2892. * as we reclaim the driver command queue */
  2893. if (rxb && rxb->skb)
  2894. iwl3945_tx_cmd_complete(priv, rxb);
  2895. else
  2896. IWL_WARN(priv, "Claim null rxb?\n");
  2897. }
  2898. /* For now we just don't re-use anything. We can tweak this
  2899. * later to try and re-use notification packets and SKBs that
  2900. * fail to Rx correctly */
  2901. if (rxb->skb != NULL) {
  2902. priv->alloc_rxb_skb--;
  2903. dev_kfree_skb_any(rxb->skb);
  2904. rxb->skb = NULL;
  2905. }
  2906. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  2907. priv->hw_params.rx_buf_size,
  2908. PCI_DMA_FROMDEVICE);
  2909. spin_lock_irqsave(&rxq->lock, flags);
  2910. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  2911. spin_unlock_irqrestore(&rxq->lock, flags);
  2912. i = (i + 1) & RX_QUEUE_MASK;
  2913. /* If there are a lot of unused frames,
  2914. * restock the Rx queue so ucode won't assert. */
  2915. if (fill_rx) {
  2916. count++;
  2917. if (count >= 8) {
  2918. priv->rxq.read = i;
  2919. __iwl3945_rx_replenish(priv);
  2920. count = 0;
  2921. }
  2922. }
  2923. }
  2924. /* Backtrack one entry */
  2925. priv->rxq.read = i;
  2926. iwl3945_rx_queue_restock(priv);
  2927. }
  2928. #ifdef CONFIG_IWL3945_DEBUG
  2929. static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
  2930. struct iwl3945_rxon_cmd *rxon)
  2931. {
  2932. IWL_DEBUG_RADIO("RX CONFIG:\n");
  2933. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  2934. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  2935. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  2936. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  2937. le32_to_cpu(rxon->filter_flags));
  2938. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  2939. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  2940. rxon->ofdm_basic_rates);
  2941. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  2942. IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  2943. IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  2944. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  2945. }
  2946. #endif
  2947. static void iwl3945_enable_interrupts(struct iwl_priv *priv)
  2948. {
  2949. IWL_DEBUG_ISR("Enabling interrupts\n");
  2950. set_bit(STATUS_INT_ENABLED, &priv->status);
  2951. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  2952. }
  2953. /* call this function to flush any scheduled tasklet */
  2954. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  2955. {
  2956. /* wait to make sure we flush pending tasklet*/
  2957. synchronize_irq(priv->pci_dev->irq);
  2958. tasklet_kill(&priv->irq_tasklet);
  2959. }
  2960. static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
  2961. {
  2962. clear_bit(STATUS_INT_ENABLED, &priv->status);
  2963. /* disable interrupts from uCode/NIC to host */
  2964. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  2965. /* acknowledge/clear/reset any interrupts still pending
  2966. * from uCode or flow handler (Rx/Tx DMA) */
  2967. iwl_write32(priv, CSR_INT, 0xffffffff);
  2968. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  2969. IWL_DEBUG_ISR("Disabled interrupts\n");
  2970. }
  2971. static const char *desc_lookup(int i)
  2972. {
  2973. switch (i) {
  2974. case 1:
  2975. return "FAIL";
  2976. case 2:
  2977. return "BAD_PARAM";
  2978. case 3:
  2979. return "BAD_CHECKSUM";
  2980. case 4:
  2981. return "NMI_INTERRUPT";
  2982. case 5:
  2983. return "SYSASSERT";
  2984. case 6:
  2985. return "FATAL_ERROR";
  2986. }
  2987. return "UNKNOWN";
  2988. }
  2989. #define ERROR_START_OFFSET (1 * sizeof(u32))
  2990. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  2991. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  2992. {
  2993. u32 i;
  2994. u32 desc, time, count, base, data1;
  2995. u32 blink1, blink2, ilink1, ilink2;
  2996. int rc;
  2997. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  2998. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  2999. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  3000. return;
  3001. }
  3002. rc = iwl_grab_nic_access(priv);
  3003. if (rc) {
  3004. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  3005. return;
  3006. }
  3007. count = iwl_read_targ_mem(priv, base);
  3008. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3009. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  3010. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  3011. priv->status, count);
  3012. }
  3013. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  3014. "ilink1 nmiPC Line\n");
  3015. for (i = ERROR_START_OFFSET;
  3016. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  3017. i += ERROR_ELEM_SIZE) {
  3018. desc = iwl_read_targ_mem(priv, base + i);
  3019. time =
  3020. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  3021. blink1 =
  3022. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  3023. blink2 =
  3024. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  3025. ilink1 =
  3026. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  3027. ilink2 =
  3028. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  3029. data1 =
  3030. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  3031. IWL_ERR(priv,
  3032. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  3033. desc_lookup(desc), desc, time, blink1, blink2,
  3034. ilink1, ilink2, data1);
  3035. }
  3036. iwl_release_nic_access(priv);
  3037. }
  3038. #define EVENT_START_OFFSET (6 * sizeof(u32))
  3039. /**
  3040. * iwl3945_print_event_log - Dump error event log to syslog
  3041. *
  3042. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  3043. */
  3044. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3045. u32 num_events, u32 mode)
  3046. {
  3047. u32 i;
  3048. u32 base; /* SRAM byte address of event log header */
  3049. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3050. u32 ptr; /* SRAM byte address of log data */
  3051. u32 ev, time, data; /* event log data */
  3052. if (num_events == 0)
  3053. return;
  3054. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3055. if (mode == 0)
  3056. event_size = 2 * sizeof(u32);
  3057. else
  3058. event_size = 3 * sizeof(u32);
  3059. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3060. /* "time" is actually "data" for mode 0 (no timestamp).
  3061. * place event id # at far right for easier visual parsing. */
  3062. for (i = 0; i < num_events; i++) {
  3063. ev = iwl_read_targ_mem(priv, ptr);
  3064. ptr += sizeof(u32);
  3065. time = iwl_read_targ_mem(priv, ptr);
  3066. ptr += sizeof(u32);
  3067. if (mode == 0) {
  3068. /* data, ev */
  3069. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  3070. } else {
  3071. data = iwl_read_targ_mem(priv, ptr);
  3072. ptr += sizeof(u32);
  3073. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  3074. }
  3075. }
  3076. }
  3077. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  3078. {
  3079. int rc;
  3080. u32 base; /* SRAM byte address of event log header */
  3081. u32 capacity; /* event log capacity in # entries */
  3082. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3083. u32 num_wraps; /* # times uCode wrapped to top of log */
  3084. u32 next_entry; /* index of next entry to be written by uCode */
  3085. u32 size; /* # entries that we'll print */
  3086. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3087. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  3088. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  3089. return;
  3090. }
  3091. rc = iwl_grab_nic_access(priv);
  3092. if (rc) {
  3093. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  3094. return;
  3095. }
  3096. /* event log header */
  3097. capacity = iwl_read_targ_mem(priv, base);
  3098. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  3099. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  3100. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  3101. size = num_wraps ? capacity : next_entry;
  3102. /* bail out if nothing in log */
  3103. if (size == 0) {
  3104. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  3105. iwl_release_nic_access(priv);
  3106. return;
  3107. }
  3108. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  3109. size, num_wraps);
  3110. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3111. * i.e the next one that uCode would fill. */
  3112. if (num_wraps)
  3113. iwl3945_print_event_log(priv, next_entry,
  3114. capacity - next_entry, mode);
  3115. /* (then/else) start at top of log */
  3116. iwl3945_print_event_log(priv, 0, next_entry, mode);
  3117. iwl_release_nic_access(priv);
  3118. }
  3119. /**
  3120. * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
  3121. */
  3122. static void iwl3945_irq_handle_error(struct iwl_priv *priv)
  3123. {
  3124. /* Set the FW error flag -- cleared on iwl3945_down */
  3125. set_bit(STATUS_FW_ERROR, &priv->status);
  3126. /* Cancel currently queued command. */
  3127. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3128. #ifdef CONFIG_IWL3945_DEBUG
  3129. if (priv->debug_level & IWL_DL_FW_ERRORS) {
  3130. iwl3945_dump_nic_error_log(priv);
  3131. iwl3945_dump_nic_event_log(priv);
  3132. iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
  3133. }
  3134. #endif
  3135. wake_up_interruptible(&priv->wait_command_queue);
  3136. /* Keep the restart process from trying to send host
  3137. * commands by clearing the INIT status bit */
  3138. clear_bit(STATUS_READY, &priv->status);
  3139. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3140. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3141. "Restarting adapter due to uCode error.\n");
  3142. if (iwl3945_is_associated(priv)) {
  3143. memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
  3144. sizeof(priv->recovery39_rxon));
  3145. priv->error_recovering = 1;
  3146. }
  3147. queue_work(priv->workqueue, &priv->restart);
  3148. }
  3149. }
  3150. static void iwl3945_error_recovery(struct iwl_priv *priv)
  3151. {
  3152. unsigned long flags;
  3153. memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
  3154. sizeof(priv->staging39_rxon));
  3155. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3156. iwl3945_commit_rxon(priv);
  3157. iwl3945_add_station(priv, priv->bssid, 1, 0);
  3158. spin_lock_irqsave(&priv->lock, flags);
  3159. priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
  3160. priv->error_recovering = 0;
  3161. spin_unlock_irqrestore(&priv->lock, flags);
  3162. }
  3163. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  3164. {
  3165. u32 inta, handled = 0;
  3166. u32 inta_fh;
  3167. unsigned long flags;
  3168. #ifdef CONFIG_IWL3945_DEBUG
  3169. u32 inta_mask;
  3170. #endif
  3171. spin_lock_irqsave(&priv->lock, flags);
  3172. /* Ack/clear/reset pending uCode interrupts.
  3173. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3174. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3175. inta = iwl_read32(priv, CSR_INT);
  3176. iwl_write32(priv, CSR_INT, inta);
  3177. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3178. * Any new interrupts that happen after this, either while we're
  3179. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3180. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3181. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3182. #ifdef CONFIG_IWL3945_DEBUG
  3183. if (priv->debug_level & IWL_DL_ISR) {
  3184. /* just for debug */
  3185. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3186. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3187. inta, inta_mask, inta_fh);
  3188. }
  3189. #endif
  3190. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3191. * atomic, make sure that inta covers all the interrupts that
  3192. * we've discovered, even if FH interrupt came in just after
  3193. * reading CSR_INT. */
  3194. if (inta_fh & CSR39_FH_INT_RX_MASK)
  3195. inta |= CSR_INT_BIT_FH_RX;
  3196. if (inta_fh & CSR39_FH_INT_TX_MASK)
  3197. inta |= CSR_INT_BIT_FH_TX;
  3198. /* Now service all interrupt bits discovered above. */
  3199. if (inta & CSR_INT_BIT_HW_ERR) {
  3200. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  3201. /* Tell the device to stop sending interrupts */
  3202. iwl3945_disable_interrupts(priv);
  3203. iwl3945_irq_handle_error(priv);
  3204. handled |= CSR_INT_BIT_HW_ERR;
  3205. spin_unlock_irqrestore(&priv->lock, flags);
  3206. return;
  3207. }
  3208. #ifdef CONFIG_IWL3945_DEBUG
  3209. if (priv->debug_level & (IWL_DL_ISR)) {
  3210. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3211. if (inta & CSR_INT_BIT_SCD)
  3212. IWL_DEBUG_ISR("Scheduler finished to transmit "
  3213. "the frame/frames.\n");
  3214. /* Alive notification via Rx interrupt will do the real work */
  3215. if (inta & CSR_INT_BIT_ALIVE)
  3216. IWL_DEBUG_ISR("Alive interrupt\n");
  3217. }
  3218. #endif
  3219. /* Safely ignore these bits for debug checks below */
  3220. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  3221. /* Error detected by uCode */
  3222. if (inta & CSR_INT_BIT_SW_ERR) {
  3223. IWL_ERR(priv, "Microcode SW error detected. "
  3224. "Restarting 0x%X.\n", inta);
  3225. iwl3945_irq_handle_error(priv);
  3226. handled |= CSR_INT_BIT_SW_ERR;
  3227. }
  3228. /* uCode wakes up after power-down sleep */
  3229. if (inta & CSR_INT_BIT_WAKEUP) {
  3230. IWL_DEBUG_ISR("Wakeup interrupt\n");
  3231. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  3232. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  3233. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  3234. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  3235. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  3236. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  3237. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  3238. handled |= CSR_INT_BIT_WAKEUP;
  3239. }
  3240. /* All uCode command responses, including Tx command responses,
  3241. * Rx "responses" (frame-received notification), and other
  3242. * notifications from uCode come through here*/
  3243. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  3244. iwl3945_rx_handle(priv);
  3245. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  3246. }
  3247. if (inta & CSR_INT_BIT_FH_TX) {
  3248. IWL_DEBUG_ISR("Tx interrupt\n");
  3249. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  3250. if (!iwl_grab_nic_access(priv)) {
  3251. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  3252. (FH39_SRVC_CHNL), 0x0);
  3253. iwl_release_nic_access(priv);
  3254. }
  3255. handled |= CSR_INT_BIT_FH_TX;
  3256. }
  3257. if (inta & ~handled)
  3258. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  3259. if (inta & ~CSR_INI_SET_MASK) {
  3260. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  3261. inta & ~CSR_INI_SET_MASK);
  3262. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  3263. }
  3264. /* Re-enable all interrupts */
  3265. /* only Re-enable if disabled by irq */
  3266. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3267. iwl3945_enable_interrupts(priv);
  3268. #ifdef CONFIG_IWL3945_DEBUG
  3269. if (priv->debug_level & (IWL_DL_ISR)) {
  3270. inta = iwl_read32(priv, CSR_INT);
  3271. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3272. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3273. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  3274. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  3275. }
  3276. #endif
  3277. spin_unlock_irqrestore(&priv->lock, flags);
  3278. }
  3279. static irqreturn_t iwl3945_isr(int irq, void *data)
  3280. {
  3281. struct iwl_priv *priv = data;
  3282. u32 inta, inta_mask;
  3283. u32 inta_fh;
  3284. if (!priv)
  3285. return IRQ_NONE;
  3286. spin_lock(&priv->lock);
  3287. /* Disable (but don't clear!) interrupts here to avoid
  3288. * back-to-back ISRs and sporadic interrupts from our NIC.
  3289. * If we have something to service, the tasklet will re-enable ints.
  3290. * If we *don't* have something, we'll re-enable before leaving here. */
  3291. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3292. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3293. /* Discover which interrupts are active/pending */
  3294. inta = iwl_read32(priv, CSR_INT);
  3295. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3296. /* Ignore interrupt if there's nothing in NIC to service.
  3297. * This may be due to IRQ shared with another device,
  3298. * or due to sporadic interrupts thrown from our NIC. */
  3299. if (!inta && !inta_fh) {
  3300. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  3301. goto none;
  3302. }
  3303. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  3304. /* Hardware disappeared */
  3305. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  3306. goto unplugged;
  3307. }
  3308. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3309. inta, inta_mask, inta_fh);
  3310. inta &= ~CSR_INT_BIT_SCD;
  3311. /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
  3312. if (likely(inta || inta_fh))
  3313. tasklet_schedule(&priv->irq_tasklet);
  3314. unplugged:
  3315. spin_unlock(&priv->lock);
  3316. return IRQ_HANDLED;
  3317. none:
  3318. /* re-enable interrupts here since we don't have anything to service. */
  3319. /* only Re-enable if disabled by irq */
  3320. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3321. iwl3945_enable_interrupts(priv);
  3322. spin_unlock(&priv->lock);
  3323. return IRQ_NONE;
  3324. }
  3325. /************************** EEPROM BANDS ****************************
  3326. *
  3327. * The iwl3945_eeprom_band definitions below provide the mapping from the
  3328. * EEPROM contents to the specific channel number supported for each
  3329. * band.
  3330. *
  3331. * For example, iwl3945_priv->eeprom39.band_3_channels[4] from the band_3
  3332. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  3333. * The specific geography and calibration information for that channel
  3334. * is contained in the eeprom map itself.
  3335. *
  3336. * During init, we copy the eeprom information and channel map
  3337. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  3338. *
  3339. * channel_map_24/52 provides the index in the channel_info array for a
  3340. * given channel. We have to have two separate maps as there is channel
  3341. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  3342. * band_2
  3343. *
  3344. * A value of 0xff stored in the channel_map indicates that the channel
  3345. * is not supported by the hardware at all.
  3346. *
  3347. * A value of 0xfe in the channel_map indicates that the channel is not
  3348. * valid for Tx with the current hardware. This means that
  3349. * while the system can tune and receive on a given channel, it may not
  3350. * be able to associate or transmit any frames on that
  3351. * channel. There is no corresponding channel information for that
  3352. * entry.
  3353. *
  3354. *********************************************************************/
  3355. /* 2.4 GHz */
  3356. static const u8 iwl3945_eeprom_band_1[14] = {
  3357. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  3358. };
  3359. /* 5.2 GHz bands */
  3360. static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
  3361. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  3362. };
  3363. static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
  3364. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  3365. };
  3366. static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
  3367. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  3368. };
  3369. static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
  3370. 145, 149, 153, 157, 161, 165
  3371. };
  3372. static void iwl3945_init_band_reference(const struct iwl_priv *priv, int band,
  3373. int *eeprom_ch_count,
  3374. const struct iwl_eeprom_channel
  3375. **eeprom_ch_info,
  3376. const u8 **eeprom_ch_index)
  3377. {
  3378. switch (band) {
  3379. case 1: /* 2.4GHz band */
  3380. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
  3381. *eeprom_ch_info = priv->eeprom39.band_1_channels;
  3382. *eeprom_ch_index = iwl3945_eeprom_band_1;
  3383. break;
  3384. case 2: /* 4.9GHz band */
  3385. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
  3386. *eeprom_ch_info = priv->eeprom39.band_2_channels;
  3387. *eeprom_ch_index = iwl3945_eeprom_band_2;
  3388. break;
  3389. case 3: /* 5.2GHz band */
  3390. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
  3391. *eeprom_ch_info = priv->eeprom39.band_3_channels;
  3392. *eeprom_ch_index = iwl3945_eeprom_band_3;
  3393. break;
  3394. case 4: /* 5.5GHz band */
  3395. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
  3396. *eeprom_ch_info = priv->eeprom39.band_4_channels;
  3397. *eeprom_ch_index = iwl3945_eeprom_band_4;
  3398. break;
  3399. case 5: /* 5.7GHz band */
  3400. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
  3401. *eeprom_ch_info = priv->eeprom39.band_5_channels;
  3402. *eeprom_ch_index = iwl3945_eeprom_band_5;
  3403. break;
  3404. default:
  3405. BUG();
  3406. return;
  3407. }
  3408. }
  3409. /**
  3410. * iwl3945_get_channel_info - Find driver's private channel info
  3411. *
  3412. * Based on band and channel number.
  3413. */
  3414. const struct iwl_channel_info *
  3415. iwl3945_get_channel_info(const struct iwl_priv *priv,
  3416. enum ieee80211_band band, u16 channel)
  3417. {
  3418. int i;
  3419. switch (band) {
  3420. case IEEE80211_BAND_5GHZ:
  3421. for (i = 14; i < priv->channel_count; i++) {
  3422. if (priv->channel_info[i].channel == channel)
  3423. return &priv->channel_info[i];
  3424. }
  3425. break;
  3426. case IEEE80211_BAND_2GHZ:
  3427. if (channel >= 1 && channel <= 14)
  3428. return &priv->channel_info[channel - 1];
  3429. break;
  3430. case IEEE80211_NUM_BANDS:
  3431. WARN_ON(1);
  3432. }
  3433. return NULL;
  3434. }
  3435. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  3436. ? # x " " : "")
  3437. /**
  3438. * iwl3945_init_channel_map - Set up driver's info for all possible channels
  3439. */
  3440. static int iwl3945_init_channel_map(struct iwl_priv *priv)
  3441. {
  3442. int eeprom_ch_count = 0;
  3443. const u8 *eeprom_ch_index = NULL;
  3444. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  3445. int band, ch;
  3446. struct iwl_channel_info *ch_info;
  3447. if (priv->channel_count) {
  3448. IWL_DEBUG_INFO("Channel map already initialized.\n");
  3449. return 0;
  3450. }
  3451. if (priv->eeprom39.version < 0x2f) {
  3452. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3453. priv->eeprom39.version);
  3454. return -EINVAL;
  3455. }
  3456. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  3457. priv->channel_count =
  3458. ARRAY_SIZE(iwl3945_eeprom_band_1) +
  3459. ARRAY_SIZE(iwl3945_eeprom_band_2) +
  3460. ARRAY_SIZE(iwl3945_eeprom_band_3) +
  3461. ARRAY_SIZE(iwl3945_eeprom_band_4) +
  3462. ARRAY_SIZE(iwl3945_eeprom_band_5);
  3463. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  3464. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  3465. priv->channel_count, GFP_KERNEL);
  3466. if (!priv->channel_info) {
  3467. IWL_ERR(priv, "Could not allocate channel_info\n");
  3468. priv->channel_count = 0;
  3469. return -ENOMEM;
  3470. }
  3471. ch_info = priv->channel_info;
  3472. /* Loop through the 5 EEPROM bands adding them in order to the
  3473. * channel map we maintain (that contains additional information than
  3474. * what just in the EEPROM) */
  3475. for (band = 1; band <= 5; band++) {
  3476. iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
  3477. &eeprom_ch_info, &eeprom_ch_index);
  3478. /* Loop through each band adding each of the channels */
  3479. for (ch = 0; ch < eeprom_ch_count; ch++) {
  3480. ch_info->channel = eeprom_ch_index[ch];
  3481. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  3482. IEEE80211_BAND_5GHZ;
  3483. /* permanently store EEPROM's channel regulatory flags
  3484. * and max power in channel info database. */
  3485. ch_info->eeprom = eeprom_ch_info[ch];
  3486. /* Copy the run-time flags so they are there even on
  3487. * invalid channels */
  3488. ch_info->flags = eeprom_ch_info[ch].flags;
  3489. if (!(is_channel_valid(ch_info))) {
  3490. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  3491. "No traffic\n",
  3492. ch_info->channel,
  3493. ch_info->flags,
  3494. is_channel_a_band(ch_info) ?
  3495. "5.2" : "2.4");
  3496. ch_info++;
  3497. continue;
  3498. }
  3499. /* Initialize regulatory-based run-time data */
  3500. ch_info->max_power_avg = ch_info->curr_txpow =
  3501. eeprom_ch_info[ch].max_power_avg;
  3502. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  3503. ch_info->min_power = 0;
  3504. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  3505. " %ddBm): Ad-Hoc %ssupported\n",
  3506. ch_info->channel,
  3507. is_channel_a_band(ch_info) ?
  3508. "5.2" : "2.4",
  3509. CHECK_AND_PRINT(VALID),
  3510. CHECK_AND_PRINT(IBSS),
  3511. CHECK_AND_PRINT(ACTIVE),
  3512. CHECK_AND_PRINT(RADAR),
  3513. CHECK_AND_PRINT(WIDE),
  3514. CHECK_AND_PRINT(DFS),
  3515. eeprom_ch_info[ch].flags,
  3516. eeprom_ch_info[ch].max_power_avg,
  3517. ((eeprom_ch_info[ch].
  3518. flags & EEPROM_CHANNEL_IBSS)
  3519. && !(eeprom_ch_info[ch].
  3520. flags & EEPROM_CHANNEL_RADAR))
  3521. ? "" : "not ");
  3522. /* Set the user_txpower_limit to the highest power
  3523. * supported by any channel */
  3524. if (eeprom_ch_info[ch].max_power_avg >
  3525. priv->user_txpower_limit)
  3526. priv->user_txpower_limit =
  3527. eeprom_ch_info[ch].max_power_avg;
  3528. ch_info++;
  3529. }
  3530. }
  3531. /* Set up txpower settings in driver for all channels */
  3532. if (iwl3945_txpower_set_from_eeprom(priv))
  3533. return -EIO;
  3534. return 0;
  3535. }
  3536. /*
  3537. * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
  3538. */
  3539. static void iwl3945_free_channel_map(struct iwl_priv *priv)
  3540. {
  3541. kfree(priv->channel_info);
  3542. priv->channel_count = 0;
  3543. }
  3544. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  3545. * sending probe req. This should be set long enough to hear probe responses
  3546. * from more than one AP. */
  3547. #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
  3548. #define IWL_ACTIVE_DWELL_TIME_52 (20)
  3549. #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
  3550. #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
  3551. /* For faster active scanning, scan will move to the next channel if fewer than
  3552. * PLCP_QUIET_THRESH packets are heard on this channel within
  3553. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  3554. * time if it's a quiet channel (nothing responded to our probe, and there's
  3555. * no other traffic).
  3556. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  3557. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  3558. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
  3559. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  3560. * Must be set longer than active dwell time.
  3561. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  3562. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  3563. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  3564. #define IWL_PASSIVE_DWELL_BASE (100)
  3565. #define IWL_CHANNEL_TUNE_TIME 5
  3566. #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
  3567. static inline u16 iwl3945_get_active_dwell_time(struct iwl_priv *priv,
  3568. enum ieee80211_band band,
  3569. u8 n_probes)
  3570. {
  3571. if (band == IEEE80211_BAND_5GHZ)
  3572. return IWL_ACTIVE_DWELL_TIME_52 +
  3573. IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
  3574. else
  3575. return IWL_ACTIVE_DWELL_TIME_24 +
  3576. IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
  3577. }
  3578. static u16 iwl3945_get_passive_dwell_time(struct iwl_priv *priv,
  3579. enum ieee80211_band band)
  3580. {
  3581. u16 passive = (band == IEEE80211_BAND_2GHZ) ?
  3582. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  3583. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  3584. if (iwl3945_is_associated(priv)) {
  3585. /* If we're associated, we clamp the maximum passive
  3586. * dwell time to be 98% of the beacon interval (minus
  3587. * 2 * channel tune time) */
  3588. passive = priv->beacon_int;
  3589. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  3590. passive = IWL_PASSIVE_DWELL_BASE;
  3591. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  3592. }
  3593. return passive;
  3594. }
  3595. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  3596. enum ieee80211_band band,
  3597. u8 is_active, u8 n_probes,
  3598. struct iwl3945_scan_channel *scan_ch)
  3599. {
  3600. const struct ieee80211_channel *channels = NULL;
  3601. const struct ieee80211_supported_band *sband;
  3602. const struct iwl_channel_info *ch_info;
  3603. u16 passive_dwell = 0;
  3604. u16 active_dwell = 0;
  3605. int added, i;
  3606. sband = iwl_get_hw_mode(priv, band);
  3607. if (!sband)
  3608. return 0;
  3609. channels = sband->channels;
  3610. active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
  3611. passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
  3612. if (passive_dwell <= active_dwell)
  3613. passive_dwell = active_dwell + 1;
  3614. for (i = 0, added = 0; i < sband->n_channels; i++) {
  3615. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  3616. continue;
  3617. scan_ch->channel = channels[i].hw_value;
  3618. ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
  3619. if (!is_channel_valid(ch_info)) {
  3620. IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
  3621. scan_ch->channel);
  3622. continue;
  3623. }
  3624. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  3625. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  3626. /* If passive , set up for auto-switch
  3627. * and use long active_dwell time.
  3628. */
  3629. if (!is_active || is_channel_passive(ch_info) ||
  3630. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  3631. scan_ch->type = 0; /* passive */
  3632. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  3633. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  3634. } else {
  3635. scan_ch->type = 1; /* active */
  3636. }
  3637. /* Set direct probe bits. These may be used both for active
  3638. * scan channels (probes gets sent right away),
  3639. * or for passive channels (probes get se sent only after
  3640. * hearing clear Rx packet).*/
  3641. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  3642. if (n_probes)
  3643. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  3644. } else {
  3645. /* uCode v1 does not allow setting direct probe bits on
  3646. * passive channel. */
  3647. if ((scan_ch->type & 1) && n_probes)
  3648. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  3649. }
  3650. /* Set txpower levels to defaults */
  3651. scan_ch->tpc.dsp_atten = 110;
  3652. /* scan_pwr_info->tpc.dsp_atten; */
  3653. /*scan_pwr_info->tpc.tx_gain; */
  3654. if (band == IEEE80211_BAND_5GHZ)
  3655. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  3656. else {
  3657. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  3658. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  3659. * power level:
  3660. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  3661. */
  3662. }
  3663. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  3664. scan_ch->channel,
  3665. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  3666. (scan_ch->type & 1) ?
  3667. active_dwell : passive_dwell);
  3668. scan_ch++;
  3669. added++;
  3670. }
  3671. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  3672. return added;
  3673. }
  3674. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  3675. struct ieee80211_rate *rates)
  3676. {
  3677. int i;
  3678. for (i = 0; i < IWL_RATE_COUNT; i++) {
  3679. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  3680. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  3681. rates[i].hw_value_short = i;
  3682. rates[i].flags = 0;
  3683. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  3684. /*
  3685. * If CCK != 1M then set short preamble rate flag.
  3686. */
  3687. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  3688. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  3689. }
  3690. }
  3691. }
  3692. /**
  3693. * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
  3694. */
  3695. static int iwl3945_init_geos(struct iwl_priv *priv)
  3696. {
  3697. struct iwl_channel_info *ch;
  3698. struct ieee80211_supported_band *sband;
  3699. struct ieee80211_channel *channels;
  3700. struct ieee80211_channel *geo_ch;
  3701. struct ieee80211_rate *rates;
  3702. int i = 0;
  3703. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  3704. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  3705. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  3706. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3707. return 0;
  3708. }
  3709. channels = kzalloc(sizeof(struct ieee80211_channel) *
  3710. priv->channel_count, GFP_KERNEL);
  3711. if (!channels)
  3712. return -ENOMEM;
  3713. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  3714. GFP_KERNEL);
  3715. if (!rates) {
  3716. kfree(channels);
  3717. return -ENOMEM;
  3718. }
  3719. /* 5.2GHz channels start after the 2.4GHz channels */
  3720. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  3721. sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
  3722. /* just OFDM */
  3723. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  3724. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  3725. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  3726. sband->channels = channels;
  3727. /* OFDM & CCK */
  3728. sband->bitrates = rates;
  3729. sband->n_bitrates = IWL_RATE_COUNT;
  3730. priv->ieee_channels = channels;
  3731. priv->ieee_rates = rates;
  3732. iwl3945_init_hw_rates(priv, rates);
  3733. for (i = 0; i < priv->channel_count; i++) {
  3734. ch = &priv->channel_info[i];
  3735. /* FIXME: might be removed if scan is OK*/
  3736. if (!is_channel_valid(ch))
  3737. continue;
  3738. if (is_channel_a_band(ch))
  3739. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  3740. else
  3741. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  3742. geo_ch = &sband->channels[sband->n_channels++];
  3743. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  3744. geo_ch->max_power = ch->max_power_avg;
  3745. geo_ch->max_antenna_gain = 0xff;
  3746. geo_ch->hw_value = ch->channel;
  3747. if (is_channel_valid(ch)) {
  3748. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  3749. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  3750. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  3751. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  3752. if (ch->flags & EEPROM_CHANNEL_RADAR)
  3753. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  3754. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  3755. priv->max_channel_txpower_limit =
  3756. ch->max_power_avg;
  3757. } else {
  3758. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  3759. }
  3760. /* Save flags for reg domain usage */
  3761. geo_ch->orig_flags = geo_ch->flags;
  3762. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  3763. ch->channel, geo_ch->center_freq,
  3764. is_channel_a_band(ch) ? "5.2" : "2.4",
  3765. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  3766. "restricted" : "valid",
  3767. geo_ch->flags);
  3768. }
  3769. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  3770. priv->cfg->sku & IWL_SKU_A) {
  3771. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  3772. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  3773. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  3774. priv->cfg->sku &= ~IWL_SKU_A;
  3775. }
  3776. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  3777. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  3778. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  3779. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3780. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3781. &priv->bands[IEEE80211_BAND_2GHZ];
  3782. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3783. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3784. &priv->bands[IEEE80211_BAND_5GHZ];
  3785. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3786. return 0;
  3787. }
  3788. /*
  3789. * iwl3945_free_geos - undo allocations in iwl3945_init_geos
  3790. */
  3791. static void iwl3945_free_geos(struct iwl_priv *priv)
  3792. {
  3793. kfree(priv->ieee_channels);
  3794. kfree(priv->ieee_rates);
  3795. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3796. }
  3797. /******************************************************************************
  3798. *
  3799. * uCode download functions
  3800. *
  3801. ******************************************************************************/
  3802. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  3803. {
  3804. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  3805. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  3806. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  3807. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  3808. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  3809. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  3810. }
  3811. /**
  3812. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  3813. * looking at all data.
  3814. */
  3815. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  3816. {
  3817. u32 val;
  3818. u32 save_len = len;
  3819. int rc = 0;
  3820. u32 errcnt;
  3821. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  3822. rc = iwl_grab_nic_access(priv);
  3823. if (rc)
  3824. return rc;
  3825. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  3826. IWL39_RTC_INST_LOWER_BOUND);
  3827. errcnt = 0;
  3828. for (; len > 0; len -= sizeof(u32), image++) {
  3829. /* read data comes through single port, auto-incr addr */
  3830. /* NOTE: Use the debugless read so we don't flood kernel log
  3831. * if IWL_DL_IO is set */
  3832. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  3833. if (val != le32_to_cpu(*image)) {
  3834. IWL_ERR(priv, "uCode INST section is invalid at "
  3835. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  3836. save_len - len, val, le32_to_cpu(*image));
  3837. rc = -EIO;
  3838. errcnt++;
  3839. if (errcnt >= 20)
  3840. break;
  3841. }
  3842. }
  3843. iwl_release_nic_access(priv);
  3844. if (!errcnt)
  3845. IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
  3846. return rc;
  3847. }
  3848. /**
  3849. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  3850. * using sample data 100 bytes apart. If these sample points are good,
  3851. * it's a pretty good bet that everything between them is good, too.
  3852. */
  3853. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  3854. {
  3855. u32 val;
  3856. int rc = 0;
  3857. u32 errcnt = 0;
  3858. u32 i;
  3859. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  3860. rc = iwl_grab_nic_access(priv);
  3861. if (rc)
  3862. return rc;
  3863. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  3864. /* read data comes through single port, auto-incr addr */
  3865. /* NOTE: Use the debugless read so we don't flood kernel log
  3866. * if IWL_DL_IO is set */
  3867. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  3868. i + IWL39_RTC_INST_LOWER_BOUND);
  3869. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  3870. if (val != le32_to_cpu(*image)) {
  3871. #if 0 /* Enable this if you want to see details */
  3872. IWL_ERR(priv, "uCode INST section is invalid at "
  3873. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  3874. i, val, *image);
  3875. #endif
  3876. rc = -EIO;
  3877. errcnt++;
  3878. if (errcnt >= 3)
  3879. break;
  3880. }
  3881. }
  3882. iwl_release_nic_access(priv);
  3883. return rc;
  3884. }
  3885. /**
  3886. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  3887. * and verify its contents
  3888. */
  3889. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  3890. {
  3891. __le32 *image;
  3892. u32 len;
  3893. int rc = 0;
  3894. /* Try bootstrap */
  3895. image = (__le32 *)priv->ucode_boot.v_addr;
  3896. len = priv->ucode_boot.len;
  3897. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3898. if (rc == 0) {
  3899. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  3900. return 0;
  3901. }
  3902. /* Try initialize */
  3903. image = (__le32 *)priv->ucode_init.v_addr;
  3904. len = priv->ucode_init.len;
  3905. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3906. if (rc == 0) {
  3907. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  3908. return 0;
  3909. }
  3910. /* Try runtime/protocol */
  3911. image = (__le32 *)priv->ucode_code.v_addr;
  3912. len = priv->ucode_code.len;
  3913. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3914. if (rc == 0) {
  3915. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  3916. return 0;
  3917. }
  3918. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  3919. /* Since nothing seems to match, show first several data entries in
  3920. * instruction SRAM, so maybe visual inspection will give a clue.
  3921. * Selection of bootstrap image (vs. other images) is arbitrary. */
  3922. image = (__le32 *)priv->ucode_boot.v_addr;
  3923. len = priv->ucode_boot.len;
  3924. rc = iwl3945_verify_inst_full(priv, image, len);
  3925. return rc;
  3926. }
  3927. static void iwl3945_nic_start(struct iwl_priv *priv)
  3928. {
  3929. /* Remove all resets to allow NIC to operate */
  3930. iwl_write32(priv, CSR_RESET, 0);
  3931. }
  3932. /**
  3933. * iwl3945_read_ucode - Read uCode images from disk file.
  3934. *
  3935. * Copy into buffers for card to fetch via bus-mastering
  3936. */
  3937. static int iwl3945_read_ucode(struct iwl_priv *priv)
  3938. {
  3939. struct iwl_ucode *ucode;
  3940. int ret = -EINVAL, index;
  3941. const struct firmware *ucode_raw;
  3942. /* firmware file name contains uCode/driver compatibility version */
  3943. const char *name_pre = priv->cfg->fw_name_pre;
  3944. const unsigned int api_max = priv->cfg->ucode_api_max;
  3945. const unsigned int api_min = priv->cfg->ucode_api_min;
  3946. char buf[25];
  3947. u8 *src;
  3948. size_t len;
  3949. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  3950. /* Ask kernel firmware_class module to get the boot firmware off disk.
  3951. * request_firmware() is synchronous, file is in memory on return. */
  3952. for (index = api_max; index >= api_min; index--) {
  3953. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  3954. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  3955. if (ret < 0) {
  3956. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  3957. buf, ret);
  3958. if (ret == -ENOENT)
  3959. continue;
  3960. else
  3961. goto error;
  3962. } else {
  3963. if (index < api_max)
  3964. IWL_ERR(priv, "Loaded firmware %s, "
  3965. "which is deprecated. "
  3966. " Please use API v%u instead.\n",
  3967. buf, api_max);
  3968. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  3969. buf, ucode_raw->size);
  3970. break;
  3971. }
  3972. }
  3973. if (ret < 0)
  3974. goto error;
  3975. /* Make sure that we got at least our header! */
  3976. if (ucode_raw->size < sizeof(*ucode)) {
  3977. IWL_ERR(priv, "File size way too small!\n");
  3978. ret = -EINVAL;
  3979. goto err_release;
  3980. }
  3981. /* Data from ucode file: header followed by uCode images */
  3982. ucode = (void *)ucode_raw->data;
  3983. priv->ucode_ver = le32_to_cpu(ucode->ver);
  3984. api_ver = IWL_UCODE_API(priv->ucode_ver);
  3985. inst_size = le32_to_cpu(ucode->inst_size);
  3986. data_size = le32_to_cpu(ucode->data_size);
  3987. init_size = le32_to_cpu(ucode->init_size);
  3988. init_data_size = le32_to_cpu(ucode->init_data_size);
  3989. boot_size = le32_to_cpu(ucode->boot_size);
  3990. /* api_ver should match the api version forming part of the
  3991. * firmware filename ... but we don't check for that and only rely
  3992. * on the API version read from firware header from here on forward */
  3993. if (api_ver < api_min || api_ver > api_max) {
  3994. IWL_ERR(priv, "Driver unable to support your firmware API. "
  3995. "Driver supports v%u, firmware is v%u.\n",
  3996. api_max, api_ver);
  3997. priv->ucode_ver = 0;
  3998. ret = -EINVAL;
  3999. goto err_release;
  4000. }
  4001. if (api_ver != api_max)
  4002. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  4003. "got %u. New firmware can be obtained "
  4004. "from http://www.intellinuxwireless.org.\n",
  4005. api_max, api_ver);
  4006. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  4007. IWL_UCODE_MAJOR(priv->ucode_ver),
  4008. IWL_UCODE_MINOR(priv->ucode_ver),
  4009. IWL_UCODE_API(priv->ucode_ver),
  4010. IWL_UCODE_SERIAL(priv->ucode_ver));
  4011. IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
  4012. priv->ucode_ver);
  4013. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  4014. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
  4015. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
  4016. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
  4017. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  4018. /* Verify size of file vs. image size info in file's header */
  4019. if (ucode_raw->size < sizeof(*ucode) +
  4020. inst_size + data_size + init_size +
  4021. init_data_size + boot_size) {
  4022. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4023. (int)ucode_raw->size);
  4024. ret = -EINVAL;
  4025. goto err_release;
  4026. }
  4027. /* Verify that uCode images will fit in card's SRAM */
  4028. if (inst_size > IWL39_MAX_INST_SIZE) {
  4029. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  4030. inst_size);
  4031. ret = -EINVAL;
  4032. goto err_release;
  4033. }
  4034. if (data_size > IWL39_MAX_DATA_SIZE) {
  4035. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  4036. data_size);
  4037. ret = -EINVAL;
  4038. goto err_release;
  4039. }
  4040. if (init_size > IWL39_MAX_INST_SIZE) {
  4041. IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
  4042. init_size);
  4043. ret = -EINVAL;
  4044. goto err_release;
  4045. }
  4046. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  4047. IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
  4048. init_data_size);
  4049. ret = -EINVAL;
  4050. goto err_release;
  4051. }
  4052. if (boot_size > IWL39_MAX_BSM_SIZE) {
  4053. IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
  4054. boot_size);
  4055. ret = -EINVAL;
  4056. goto err_release;
  4057. }
  4058. /* Allocate ucode buffers for card's bus-master loading ... */
  4059. /* Runtime instructions and 2 copies of data:
  4060. * 1) unmodified from disk
  4061. * 2) backup cache for save/restore during power-downs */
  4062. priv->ucode_code.len = inst_size;
  4063. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  4064. priv->ucode_data.len = data_size;
  4065. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  4066. priv->ucode_data_backup.len = data_size;
  4067. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4068. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  4069. !priv->ucode_data_backup.v_addr)
  4070. goto err_pci_alloc;
  4071. /* Initialization instructions and data */
  4072. if (init_size && init_data_size) {
  4073. priv->ucode_init.len = init_size;
  4074. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  4075. priv->ucode_init_data.len = init_data_size;
  4076. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4077. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  4078. goto err_pci_alloc;
  4079. }
  4080. /* Bootstrap (instructions only, no data) */
  4081. if (boot_size) {
  4082. priv->ucode_boot.len = boot_size;
  4083. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4084. if (!priv->ucode_boot.v_addr)
  4085. goto err_pci_alloc;
  4086. }
  4087. /* Copy images into buffers for card's bus-master reads ... */
  4088. /* Runtime instructions (first block of data in file) */
  4089. src = &ucode->data[0];
  4090. len = priv->ucode_code.len;
  4091. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  4092. memcpy(priv->ucode_code.v_addr, src, len);
  4093. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  4094. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  4095. /* Runtime data (2nd block)
  4096. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  4097. src = &ucode->data[inst_size];
  4098. len = priv->ucode_data.len;
  4099. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  4100. memcpy(priv->ucode_data.v_addr, src, len);
  4101. memcpy(priv->ucode_data_backup.v_addr, src, len);
  4102. /* Initialization instructions (3rd block) */
  4103. if (init_size) {
  4104. src = &ucode->data[inst_size + data_size];
  4105. len = priv->ucode_init.len;
  4106. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  4107. len);
  4108. memcpy(priv->ucode_init.v_addr, src, len);
  4109. }
  4110. /* Initialization data (4th block) */
  4111. if (init_data_size) {
  4112. src = &ucode->data[inst_size + data_size + init_size];
  4113. len = priv->ucode_init_data.len;
  4114. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  4115. (int)len);
  4116. memcpy(priv->ucode_init_data.v_addr, src, len);
  4117. }
  4118. /* Bootstrap instructions (5th block) */
  4119. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  4120. len = priv->ucode_boot.len;
  4121. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  4122. (int)len);
  4123. memcpy(priv->ucode_boot.v_addr, src, len);
  4124. /* We have our copies now, allow OS release its copies */
  4125. release_firmware(ucode_raw);
  4126. return 0;
  4127. err_pci_alloc:
  4128. IWL_ERR(priv, "failed to allocate pci memory\n");
  4129. ret = -ENOMEM;
  4130. iwl3945_dealloc_ucode_pci(priv);
  4131. err_release:
  4132. release_firmware(ucode_raw);
  4133. error:
  4134. return ret;
  4135. }
  4136. /**
  4137. * iwl3945_set_ucode_ptrs - Set uCode address location
  4138. *
  4139. * Tell initialization uCode where to find runtime uCode.
  4140. *
  4141. * BSM registers initially contain pointers to initialization uCode.
  4142. * We need to replace them to load runtime uCode inst and data,
  4143. * and to save runtime data when powering down.
  4144. */
  4145. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  4146. {
  4147. dma_addr_t pinst;
  4148. dma_addr_t pdata;
  4149. int rc = 0;
  4150. unsigned long flags;
  4151. /* bits 31:0 for 3945 */
  4152. pinst = priv->ucode_code.p_addr;
  4153. pdata = priv->ucode_data_backup.p_addr;
  4154. spin_lock_irqsave(&priv->lock, flags);
  4155. rc = iwl_grab_nic_access(priv);
  4156. if (rc) {
  4157. spin_unlock_irqrestore(&priv->lock, flags);
  4158. return rc;
  4159. }
  4160. /* Tell bootstrap uCode where to find image to load */
  4161. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4162. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4163. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  4164. priv->ucode_data.len);
  4165. /* Inst byte count must be last to set up, bit 31 signals uCode
  4166. * that all new ptr/size info is in place */
  4167. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  4168. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  4169. iwl_release_nic_access(priv);
  4170. spin_unlock_irqrestore(&priv->lock, flags);
  4171. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  4172. return rc;
  4173. }
  4174. /**
  4175. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  4176. *
  4177. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  4178. *
  4179. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  4180. */
  4181. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  4182. {
  4183. /* Check alive response for "valid" sign from uCode */
  4184. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  4185. /* We had an error bringing up the hardware, so take it
  4186. * all the way back down so we can try again */
  4187. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  4188. goto restart;
  4189. }
  4190. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  4191. * This is a paranoid check, because we would not have gotten the
  4192. * "initialize" alive if code weren't properly loaded. */
  4193. if (iwl3945_verify_ucode(priv)) {
  4194. /* Runtime instruction load was bad;
  4195. * take it all the way back down so we can try again */
  4196. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  4197. goto restart;
  4198. }
  4199. /* Send pointers to protocol/runtime uCode image ... init code will
  4200. * load and launch runtime uCode, which will send us another "Alive"
  4201. * notification. */
  4202. IWL_DEBUG_INFO("Initialization Alive received.\n");
  4203. if (iwl3945_set_ucode_ptrs(priv)) {
  4204. /* Runtime instruction load won't happen;
  4205. * take it all the way back down so we can try again */
  4206. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  4207. goto restart;
  4208. }
  4209. return;
  4210. restart:
  4211. queue_work(priv->workqueue, &priv->restart);
  4212. }
  4213. /* temporary */
  4214. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
  4215. struct sk_buff *skb);
  4216. /**
  4217. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  4218. * from protocol/runtime uCode (initialization uCode's
  4219. * Alive gets handled by iwl3945_init_alive_start()).
  4220. */
  4221. static void iwl3945_alive_start(struct iwl_priv *priv)
  4222. {
  4223. int rc = 0;
  4224. int thermal_spin = 0;
  4225. u32 rfkill;
  4226. IWL_DEBUG_INFO("Runtime Alive received.\n");
  4227. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  4228. /* We had an error bringing up the hardware, so take it
  4229. * all the way back down so we can try again */
  4230. IWL_DEBUG_INFO("Alive failed.\n");
  4231. goto restart;
  4232. }
  4233. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  4234. * This is a paranoid check, because we would not have gotten the
  4235. * "runtime" alive if code weren't properly loaded. */
  4236. if (iwl3945_verify_ucode(priv)) {
  4237. /* Runtime instruction load was bad;
  4238. * take it all the way back down so we can try again */
  4239. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  4240. goto restart;
  4241. }
  4242. iwl3945_clear_stations_table(priv);
  4243. rc = iwl_grab_nic_access(priv);
  4244. if (rc) {
  4245. IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
  4246. return;
  4247. }
  4248. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  4249. IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
  4250. iwl_release_nic_access(priv);
  4251. if (rfkill & 0x1) {
  4252. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4253. /* if RFKILL is not on, then wait for thermal
  4254. * sensor in adapter to kick in */
  4255. while (iwl3945_hw_get_temperature(priv) == 0) {
  4256. thermal_spin++;
  4257. udelay(10);
  4258. }
  4259. if (thermal_spin)
  4260. IWL_DEBUG_INFO("Thermal calibration took %dus\n",
  4261. thermal_spin * 10);
  4262. } else
  4263. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4264. /* After the ALIVE response, we can send commands to 3945 uCode */
  4265. set_bit(STATUS_ALIVE, &priv->status);
  4266. /* Clear out the uCode error bit if it is set */
  4267. clear_bit(STATUS_FW_ERROR, &priv->status);
  4268. if (iwl_is_rfkill(priv))
  4269. return;
  4270. ieee80211_wake_queues(priv->hw);
  4271. priv->active_rate = priv->rates_mask;
  4272. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  4273. iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  4274. if (iwl3945_is_associated(priv)) {
  4275. struct iwl3945_rxon_cmd *active_rxon =
  4276. (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
  4277. memcpy(&priv->staging39_rxon, &priv->active39_rxon,
  4278. sizeof(priv->staging39_rxon));
  4279. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4280. } else {
  4281. /* Initialize our rx_config data */
  4282. iwl3945_connection_init_rx_config(priv, priv->iw_mode);
  4283. memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  4284. }
  4285. /* Configure Bluetooth device coexistence support */
  4286. iwl3945_send_bt_config(priv);
  4287. /* Configure the adapter for unassociated operation */
  4288. iwl3945_commit_rxon(priv);
  4289. iwl3945_reg_txpower_periodic(priv);
  4290. iwl3945_led_register(priv);
  4291. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  4292. set_bit(STATUS_READY, &priv->status);
  4293. wake_up_interruptible(&priv->wait_command_queue);
  4294. if (priv->error_recovering)
  4295. iwl3945_error_recovery(priv);
  4296. /* reassociate for ADHOC mode */
  4297. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  4298. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  4299. priv->vif);
  4300. if (beacon)
  4301. iwl3945_mac_beacon_update(priv->hw, beacon);
  4302. }
  4303. return;
  4304. restart:
  4305. queue_work(priv->workqueue, &priv->restart);
  4306. }
  4307. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  4308. static void __iwl3945_down(struct iwl_priv *priv)
  4309. {
  4310. unsigned long flags;
  4311. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  4312. struct ieee80211_conf *conf = NULL;
  4313. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  4314. conf = ieee80211_get_hw_conf(priv->hw);
  4315. if (!exit_pending)
  4316. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4317. iwl3945_led_unregister(priv);
  4318. iwl3945_clear_stations_table(priv);
  4319. /* Unblock any waiting calls */
  4320. wake_up_interruptible_all(&priv->wait_command_queue);
  4321. /* Wipe out the EXIT_PENDING status bit if we are not actually
  4322. * exiting the module */
  4323. if (!exit_pending)
  4324. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4325. /* stop and reset the on-board processor */
  4326. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  4327. /* tell the device to stop sending interrupts */
  4328. spin_lock_irqsave(&priv->lock, flags);
  4329. iwl3945_disable_interrupts(priv);
  4330. spin_unlock_irqrestore(&priv->lock, flags);
  4331. iwl_synchronize_irq(priv);
  4332. if (priv->mac80211_registered)
  4333. ieee80211_stop_queues(priv->hw);
  4334. /* If we have not previously called iwl3945_init() then
  4335. * clear all bits but the RF Kill and SUSPEND bits and return */
  4336. if (!iwl_is_init(priv)) {
  4337. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4338. STATUS_RF_KILL_HW |
  4339. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4340. STATUS_RF_KILL_SW |
  4341. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4342. STATUS_GEO_CONFIGURED |
  4343. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4344. STATUS_IN_SUSPEND |
  4345. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  4346. STATUS_EXIT_PENDING;
  4347. goto exit;
  4348. }
  4349. /* ...otherwise clear out all the status bits but the RF Kill and
  4350. * SUSPEND bits and continue taking the NIC down. */
  4351. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4352. STATUS_RF_KILL_HW |
  4353. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4354. STATUS_RF_KILL_SW |
  4355. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4356. STATUS_GEO_CONFIGURED |
  4357. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4358. STATUS_IN_SUSPEND |
  4359. test_bit(STATUS_FW_ERROR, &priv->status) <<
  4360. STATUS_FW_ERROR |
  4361. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  4362. STATUS_EXIT_PENDING;
  4363. spin_lock_irqsave(&priv->lock, flags);
  4364. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4365. spin_unlock_irqrestore(&priv->lock, flags);
  4366. iwl3945_hw_txq_ctx_stop(priv);
  4367. iwl3945_hw_rxq_stop(priv);
  4368. spin_lock_irqsave(&priv->lock, flags);
  4369. if (!iwl_grab_nic_access(priv)) {
  4370. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  4371. APMG_CLK_VAL_DMA_CLK_RQT);
  4372. iwl_release_nic_access(priv);
  4373. }
  4374. spin_unlock_irqrestore(&priv->lock, flags);
  4375. udelay(5);
  4376. priv->cfg->ops->lib->apm_ops.reset(priv);
  4377. exit:
  4378. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  4379. if (priv->ibss_beacon)
  4380. dev_kfree_skb(priv->ibss_beacon);
  4381. priv->ibss_beacon = NULL;
  4382. /* clear out any free frames */
  4383. iwl3945_clear_free_frames(priv);
  4384. }
  4385. static void iwl3945_down(struct iwl_priv *priv)
  4386. {
  4387. mutex_lock(&priv->mutex);
  4388. __iwl3945_down(priv);
  4389. mutex_unlock(&priv->mutex);
  4390. iwl3945_cancel_deferred_work(priv);
  4391. }
  4392. #define MAX_HW_RESTARTS 5
  4393. static int __iwl3945_up(struct iwl_priv *priv)
  4394. {
  4395. int rc, i;
  4396. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4397. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  4398. return -EIO;
  4399. }
  4400. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  4401. IWL_WARN(priv, "Radio disabled by SW RF kill (module "
  4402. "parameter)\n");
  4403. return -ENODEV;
  4404. }
  4405. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  4406. IWL_ERR(priv, "ucode not available for device bring up\n");
  4407. return -EIO;
  4408. }
  4409. /* If platform's RF_KILL switch is NOT set to KILL */
  4410. if (iwl_read32(priv, CSR_GP_CNTRL) &
  4411. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4412. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4413. else {
  4414. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4415. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  4416. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  4417. return -ENODEV;
  4418. }
  4419. }
  4420. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4421. rc = iwl3945_hw_nic_init(priv);
  4422. if (rc) {
  4423. IWL_ERR(priv, "Unable to int nic\n");
  4424. return rc;
  4425. }
  4426. /* make sure rfkill handshake bits are cleared */
  4427. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4428. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  4429. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  4430. /* clear (again), then enable host interrupts */
  4431. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4432. iwl3945_enable_interrupts(priv);
  4433. /* really make sure rfkill handshake bits are cleared */
  4434. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4435. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4436. /* Copy original ucode data image from disk into backup cache.
  4437. * This will be used to initialize the on-board processor's
  4438. * data SRAM for a clean start when the runtime program first loads. */
  4439. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  4440. priv->ucode_data.len);
  4441. /* We return success when we resume from suspend and rf_kill is on. */
  4442. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  4443. return 0;
  4444. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  4445. iwl3945_clear_stations_table(priv);
  4446. /* load bootstrap state machine,
  4447. * load bootstrap program into processor's memory,
  4448. * prepare to load the "initialize" uCode */
  4449. priv->cfg->ops->lib->load_ucode(priv);
  4450. if (rc) {
  4451. IWL_ERR(priv,
  4452. "Unable to set up bootstrap uCode: %d\n", rc);
  4453. continue;
  4454. }
  4455. /* start card; "initialize" will load runtime ucode */
  4456. iwl3945_nic_start(priv);
  4457. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  4458. return 0;
  4459. }
  4460. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4461. __iwl3945_down(priv);
  4462. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4463. /* tried to restart and config the device for as long as our
  4464. * patience could withstand */
  4465. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  4466. return -EIO;
  4467. }
  4468. /*****************************************************************************
  4469. *
  4470. * Workqueue callbacks
  4471. *
  4472. *****************************************************************************/
  4473. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  4474. {
  4475. struct iwl_priv *priv =
  4476. container_of(data, struct iwl_priv, init_alive_start.work);
  4477. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4478. return;
  4479. mutex_lock(&priv->mutex);
  4480. iwl3945_init_alive_start(priv);
  4481. mutex_unlock(&priv->mutex);
  4482. }
  4483. static void iwl3945_bg_alive_start(struct work_struct *data)
  4484. {
  4485. struct iwl_priv *priv =
  4486. container_of(data, struct iwl_priv, alive_start.work);
  4487. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4488. return;
  4489. mutex_lock(&priv->mutex);
  4490. iwl3945_alive_start(priv);
  4491. mutex_unlock(&priv->mutex);
  4492. }
  4493. static void iwl3945_bg_rf_kill(struct work_struct *work)
  4494. {
  4495. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  4496. wake_up_interruptible(&priv->wait_command_queue);
  4497. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4498. return;
  4499. mutex_lock(&priv->mutex);
  4500. if (!iwl_is_rfkill(priv)) {
  4501. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  4502. "HW and/or SW RF Kill no longer active, restarting "
  4503. "device\n");
  4504. if (!test_bit(STATUS_EXIT_PENDING, &priv->status) &&
  4505. test_bit(STATUS_ALIVE, &priv->status))
  4506. queue_work(priv->workqueue, &priv->restart);
  4507. } else {
  4508. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  4509. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  4510. "disabled by SW switch\n");
  4511. else
  4512. IWL_WARN(priv, "Radio Frequency Kill Switch is On:\n"
  4513. "Kill switch must be turned off for "
  4514. "wireless networking to work.\n");
  4515. }
  4516. mutex_unlock(&priv->mutex);
  4517. iwl3945_rfkill_set_hw_state(priv);
  4518. }
  4519. static void iwl3945_rfkill_poll(struct work_struct *data)
  4520. {
  4521. struct iwl_priv *priv =
  4522. container_of(data, struct iwl_priv, rfkill_poll.work);
  4523. unsigned long status = priv->status;
  4524. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4525. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4526. else
  4527. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4528. if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
  4529. queue_work(priv->workqueue, &priv->rf_kill);
  4530. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  4531. round_jiffies_relative(2 * HZ));
  4532. }
  4533. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  4534. static void iwl3945_bg_scan_check(struct work_struct *data)
  4535. {
  4536. struct iwl_priv *priv =
  4537. container_of(data, struct iwl_priv, scan_check.work);
  4538. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4539. return;
  4540. mutex_lock(&priv->mutex);
  4541. if (test_bit(STATUS_SCANNING, &priv->status) ||
  4542. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4543. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  4544. "Scan completion watchdog resetting adapter (%dms)\n",
  4545. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  4546. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4547. iwl3945_send_scan_abort(priv);
  4548. }
  4549. mutex_unlock(&priv->mutex);
  4550. }
  4551. static void iwl3945_bg_request_scan(struct work_struct *data)
  4552. {
  4553. struct iwl_priv *priv =
  4554. container_of(data, struct iwl_priv, request_scan);
  4555. struct iwl_host_cmd cmd = {
  4556. .id = REPLY_SCAN_CMD,
  4557. .len = sizeof(struct iwl3945_scan_cmd),
  4558. .meta.flags = CMD_SIZE_HUGE,
  4559. };
  4560. int rc = 0;
  4561. struct iwl3945_scan_cmd *scan;
  4562. struct ieee80211_conf *conf = NULL;
  4563. u8 n_probes = 2;
  4564. enum ieee80211_band band;
  4565. DECLARE_SSID_BUF(ssid);
  4566. conf = ieee80211_get_hw_conf(priv->hw);
  4567. mutex_lock(&priv->mutex);
  4568. if (!iwl_is_ready(priv)) {
  4569. IWL_WARN(priv, "request scan called when driver not ready.\n");
  4570. goto done;
  4571. }
  4572. /* Make sure the scan wasn't canceled before this queued work
  4573. * was given the chance to run... */
  4574. if (!test_bit(STATUS_SCANNING, &priv->status))
  4575. goto done;
  4576. /* This should never be called or scheduled if there is currently
  4577. * a scan active in the hardware. */
  4578. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  4579. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  4580. "Ignoring second request.\n");
  4581. rc = -EIO;
  4582. goto done;
  4583. }
  4584. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4585. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  4586. goto done;
  4587. }
  4588. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4589. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  4590. goto done;
  4591. }
  4592. if (iwl_is_rfkill(priv)) {
  4593. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  4594. goto done;
  4595. }
  4596. if (!test_bit(STATUS_READY, &priv->status)) {
  4597. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  4598. goto done;
  4599. }
  4600. if (!priv->scan_bands) {
  4601. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  4602. goto done;
  4603. }
  4604. if (!priv->scan39) {
  4605. priv->scan39 = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  4606. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  4607. if (!priv->scan39) {
  4608. rc = -ENOMEM;
  4609. goto done;
  4610. }
  4611. }
  4612. scan = priv->scan39;
  4613. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  4614. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  4615. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  4616. if (iwl3945_is_associated(priv)) {
  4617. u16 interval = 0;
  4618. u32 extra;
  4619. u32 suspend_time = 100;
  4620. u32 scan_suspend_time = 100;
  4621. unsigned long flags;
  4622. IWL_DEBUG_INFO("Scanning while associated...\n");
  4623. spin_lock_irqsave(&priv->lock, flags);
  4624. interval = priv->beacon_int;
  4625. spin_unlock_irqrestore(&priv->lock, flags);
  4626. scan->suspend_time = 0;
  4627. scan->max_out_time = cpu_to_le32(200 * 1024);
  4628. if (!interval)
  4629. interval = suspend_time;
  4630. /*
  4631. * suspend time format:
  4632. * 0-19: beacon interval in usec (time before exec.)
  4633. * 20-23: 0
  4634. * 24-31: number of beacons (suspend between channels)
  4635. */
  4636. extra = (suspend_time / interval) << 24;
  4637. scan_suspend_time = 0xFF0FFFFF &
  4638. (extra | ((suspend_time % interval) * 1024));
  4639. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  4640. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  4641. scan_suspend_time, interval);
  4642. }
  4643. /* We should add the ability for user to lock to PASSIVE ONLY */
  4644. if (priv->one_direct_scan) {
  4645. IWL_DEBUG_SCAN
  4646. ("Kicking off one direct scan for '%s'\n",
  4647. print_ssid(ssid, priv->direct_ssid,
  4648. priv->direct_ssid_len));
  4649. scan->direct_scan[0].id = WLAN_EID_SSID;
  4650. scan->direct_scan[0].len = priv->direct_ssid_len;
  4651. memcpy(scan->direct_scan[0].ssid,
  4652. priv->direct_ssid, priv->direct_ssid_len);
  4653. n_probes++;
  4654. } else
  4655. IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
  4656. /* We don't build a direct scan probe request; the uCode will do
  4657. * that based on the direct_mask added to each channel entry */
  4658. scan->tx_cmd.len = cpu_to_le16(
  4659. iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  4660. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  4661. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  4662. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  4663. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  4664. /* flags + rate selection */
  4665. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  4666. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  4667. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  4668. scan->good_CRC_th = 0;
  4669. band = IEEE80211_BAND_2GHZ;
  4670. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  4671. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  4672. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  4673. band = IEEE80211_BAND_5GHZ;
  4674. } else {
  4675. IWL_WARN(priv, "Invalid scan band count\n");
  4676. goto done;
  4677. }
  4678. /* select Rx antennas */
  4679. scan->flags |= iwl3945_get_antenna_flags(priv);
  4680. if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
  4681. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  4682. scan->channel_count =
  4683. iwl3945_get_channels_for_scan(priv, band, 1, /* active */
  4684. n_probes,
  4685. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  4686. if (scan->channel_count == 0) {
  4687. IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
  4688. goto done;
  4689. }
  4690. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  4691. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  4692. cmd.data = scan;
  4693. scan->len = cpu_to_le16(cmd.len);
  4694. set_bit(STATUS_SCAN_HW, &priv->status);
  4695. rc = iwl3945_send_cmd_sync(priv, &cmd);
  4696. if (rc)
  4697. goto done;
  4698. queue_delayed_work(priv->workqueue, &priv->scan_check,
  4699. IWL_SCAN_CHECK_WATCHDOG);
  4700. mutex_unlock(&priv->mutex);
  4701. return;
  4702. done:
  4703. /* can not perform scan make sure we clear scanning
  4704. * bits from status so next scan request can be performed.
  4705. * if we dont clear scanning status bit here all next scan
  4706. * will fail
  4707. */
  4708. clear_bit(STATUS_SCAN_HW, &priv->status);
  4709. clear_bit(STATUS_SCANNING, &priv->status);
  4710. /* inform mac80211 scan aborted */
  4711. queue_work(priv->workqueue, &priv->scan_completed);
  4712. mutex_unlock(&priv->mutex);
  4713. }
  4714. static void iwl3945_bg_up(struct work_struct *data)
  4715. {
  4716. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  4717. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4718. return;
  4719. mutex_lock(&priv->mutex);
  4720. __iwl3945_up(priv);
  4721. mutex_unlock(&priv->mutex);
  4722. iwl3945_rfkill_set_hw_state(priv);
  4723. }
  4724. static void iwl3945_bg_restart(struct work_struct *data)
  4725. {
  4726. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  4727. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4728. return;
  4729. iwl3945_down(priv);
  4730. queue_work(priv->workqueue, &priv->up);
  4731. }
  4732. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  4733. {
  4734. struct iwl_priv *priv =
  4735. container_of(data, struct iwl_priv, rx_replenish);
  4736. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4737. return;
  4738. mutex_lock(&priv->mutex);
  4739. iwl3945_rx_replenish(priv);
  4740. mutex_unlock(&priv->mutex);
  4741. }
  4742. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  4743. static void iwl3945_post_associate(struct iwl_priv *priv)
  4744. {
  4745. int rc = 0;
  4746. struct ieee80211_conf *conf = NULL;
  4747. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  4748. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  4749. return;
  4750. }
  4751. IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
  4752. priv->assoc_id, priv->active39_rxon.bssid_addr);
  4753. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4754. return;
  4755. if (!priv->vif || !priv->is_open)
  4756. return;
  4757. iwl_scan_cancel_timeout(priv, 200);
  4758. conf = ieee80211_get_hw_conf(priv->hw);
  4759. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4760. iwl3945_commit_rxon(priv);
  4761. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  4762. iwl3945_setup_rxon_timing(priv);
  4763. rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  4764. sizeof(priv->rxon_timing), &priv->rxon_timing);
  4765. if (rc)
  4766. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  4767. "Attempting to continue.\n");
  4768. priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  4769. priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  4770. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  4771. priv->assoc_id, priv->beacon_int);
  4772. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  4773. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4774. else
  4775. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4776. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  4777. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  4778. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  4779. else
  4780. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  4781. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  4782. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  4783. }
  4784. iwl3945_commit_rxon(priv);
  4785. switch (priv->iw_mode) {
  4786. case NL80211_IFTYPE_STATION:
  4787. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  4788. break;
  4789. case NL80211_IFTYPE_ADHOC:
  4790. priv->assoc_id = 1;
  4791. iwl3945_add_station(priv, priv->bssid, 0, 0);
  4792. iwl3945_sync_sta(priv, IWL_STA_ID,
  4793. (priv->band == IEEE80211_BAND_5GHZ) ?
  4794. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  4795. CMD_ASYNC);
  4796. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  4797. iwl3945_send_beacon_cmd(priv);
  4798. break;
  4799. default:
  4800. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  4801. __func__, priv->iw_mode);
  4802. break;
  4803. }
  4804. iwl3945_activate_qos(priv, 0);
  4805. /* we have just associated, don't start scan too early */
  4806. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  4807. }
  4808. static void iwl3945_bg_abort_scan(struct work_struct *work)
  4809. {
  4810. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  4811. if (!iwl_is_ready(priv))
  4812. return;
  4813. mutex_lock(&priv->mutex);
  4814. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  4815. iwl3945_send_scan_abort(priv);
  4816. mutex_unlock(&priv->mutex);
  4817. }
  4818. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
  4819. static void iwl3945_bg_scan_completed(struct work_struct *work)
  4820. {
  4821. struct iwl_priv *priv =
  4822. container_of(work, struct iwl_priv, scan_completed);
  4823. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  4824. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4825. return;
  4826. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  4827. iwl3945_mac_config(priv->hw, 0);
  4828. ieee80211_scan_completed(priv->hw);
  4829. /* Since setting the TXPOWER may have been deferred while
  4830. * performing the scan, fire one off */
  4831. mutex_lock(&priv->mutex);
  4832. iwl3945_hw_reg_send_txpower(priv);
  4833. mutex_unlock(&priv->mutex);
  4834. }
  4835. /*****************************************************************************
  4836. *
  4837. * mac80211 entry point functions
  4838. *
  4839. *****************************************************************************/
  4840. #define UCODE_READY_TIMEOUT (2 * HZ)
  4841. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  4842. {
  4843. struct iwl_priv *priv = hw->priv;
  4844. int ret;
  4845. IWL_DEBUG_MAC80211("enter\n");
  4846. /* we should be verifying the device is ready to be opened */
  4847. mutex_lock(&priv->mutex);
  4848. memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
  4849. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  4850. * ucode filename and max sizes are card-specific. */
  4851. if (!priv->ucode_code.len) {
  4852. ret = iwl3945_read_ucode(priv);
  4853. if (ret) {
  4854. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  4855. mutex_unlock(&priv->mutex);
  4856. goto out_release_irq;
  4857. }
  4858. }
  4859. ret = __iwl3945_up(priv);
  4860. mutex_unlock(&priv->mutex);
  4861. iwl3945_rfkill_set_hw_state(priv);
  4862. if (ret)
  4863. goto out_release_irq;
  4864. IWL_DEBUG_INFO("Start UP work.\n");
  4865. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  4866. return 0;
  4867. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  4868. * mac80211 will not be run successfully. */
  4869. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  4870. test_bit(STATUS_READY, &priv->status),
  4871. UCODE_READY_TIMEOUT);
  4872. if (!ret) {
  4873. if (!test_bit(STATUS_READY, &priv->status)) {
  4874. IWL_ERR(priv,
  4875. "Wait for START_ALIVE timeout after %dms.\n",
  4876. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  4877. ret = -ETIMEDOUT;
  4878. goto out_release_irq;
  4879. }
  4880. }
  4881. /* ucode is running and will send rfkill notifications,
  4882. * no need to poll the killswitch state anymore */
  4883. cancel_delayed_work(&priv->rfkill_poll);
  4884. priv->is_open = 1;
  4885. IWL_DEBUG_MAC80211("leave\n");
  4886. return 0;
  4887. out_release_irq:
  4888. priv->is_open = 0;
  4889. IWL_DEBUG_MAC80211("leave - failed\n");
  4890. return ret;
  4891. }
  4892. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  4893. {
  4894. struct iwl_priv *priv = hw->priv;
  4895. IWL_DEBUG_MAC80211("enter\n");
  4896. if (!priv->is_open) {
  4897. IWL_DEBUG_MAC80211("leave - skip\n");
  4898. return;
  4899. }
  4900. priv->is_open = 0;
  4901. if (iwl_is_ready_rf(priv)) {
  4902. /* stop mac, cancel any scan request and clear
  4903. * RXON_FILTER_ASSOC_MSK BIT
  4904. */
  4905. mutex_lock(&priv->mutex);
  4906. iwl_scan_cancel_timeout(priv, 100);
  4907. mutex_unlock(&priv->mutex);
  4908. }
  4909. iwl3945_down(priv);
  4910. flush_workqueue(priv->workqueue);
  4911. /* start polling the killswitch state again */
  4912. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  4913. round_jiffies_relative(2 * HZ));
  4914. IWL_DEBUG_MAC80211("leave\n");
  4915. }
  4916. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  4917. {
  4918. struct iwl_priv *priv = hw->priv;
  4919. IWL_DEBUG_MAC80211("enter\n");
  4920. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  4921. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  4922. if (iwl3945_tx_skb(priv, skb))
  4923. dev_kfree_skb_any(skb);
  4924. IWL_DEBUG_MAC80211("leave\n");
  4925. return NETDEV_TX_OK;
  4926. }
  4927. static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
  4928. struct ieee80211_if_init_conf *conf)
  4929. {
  4930. struct iwl_priv *priv = hw->priv;
  4931. unsigned long flags;
  4932. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  4933. if (priv->vif) {
  4934. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  4935. return -EOPNOTSUPP;
  4936. }
  4937. spin_lock_irqsave(&priv->lock, flags);
  4938. priv->vif = conf->vif;
  4939. priv->iw_mode = conf->type;
  4940. spin_unlock_irqrestore(&priv->lock, flags);
  4941. mutex_lock(&priv->mutex);
  4942. if (conf->mac_addr) {
  4943. IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
  4944. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  4945. }
  4946. if (iwl_is_ready(priv))
  4947. iwl3945_set_mode(priv, conf->type);
  4948. mutex_unlock(&priv->mutex);
  4949. IWL_DEBUG_MAC80211("leave\n");
  4950. return 0;
  4951. }
  4952. /**
  4953. * iwl3945_mac_config - mac80211 config callback
  4954. *
  4955. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  4956. * be set inappropriately and the driver currently sets the hardware up to
  4957. * use it whenever needed.
  4958. */
  4959. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
  4960. {
  4961. struct iwl_priv *priv = hw->priv;
  4962. const struct iwl_channel_info *ch_info;
  4963. struct ieee80211_conf *conf = &hw->conf;
  4964. unsigned long flags;
  4965. int ret = 0;
  4966. mutex_lock(&priv->mutex);
  4967. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  4968. if (!iwl_is_ready(priv)) {
  4969. IWL_DEBUG_MAC80211("leave - not ready\n");
  4970. ret = -EIO;
  4971. goto out;
  4972. }
  4973. if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
  4974. test_bit(STATUS_SCANNING, &priv->status))) {
  4975. IWL_DEBUG_MAC80211("leave - scanning\n");
  4976. set_bit(STATUS_CONF_PENDING, &priv->status);
  4977. mutex_unlock(&priv->mutex);
  4978. return 0;
  4979. }
  4980. spin_lock_irqsave(&priv->lock, flags);
  4981. ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
  4982. conf->channel->hw_value);
  4983. if (!is_channel_valid(ch_info)) {
  4984. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
  4985. conf->channel->hw_value, conf->channel->band);
  4986. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  4987. spin_unlock_irqrestore(&priv->lock, flags);
  4988. ret = -EINVAL;
  4989. goto out;
  4990. }
  4991. iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
  4992. iwl3945_set_flags_for_phymode(priv, conf->channel->band);
  4993. /* The list of supported rates and rate mask can be different
  4994. * for each phymode; since the phymode may have changed, reset
  4995. * the rate mask to what mac80211 lists */
  4996. iwl3945_set_rate(priv);
  4997. spin_unlock_irqrestore(&priv->lock, flags);
  4998. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  4999. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5000. iwl3945_hw_channel_switch(priv, conf->channel);
  5001. goto out;
  5002. }
  5003. #endif
  5004. iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
  5005. if (!conf->radio_enabled) {
  5006. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5007. goto out;
  5008. }
  5009. if (iwl_is_rfkill(priv)) {
  5010. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5011. ret = -EIO;
  5012. goto out;
  5013. }
  5014. iwl3945_set_rate(priv);
  5015. if (memcmp(&priv->active39_rxon,
  5016. &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
  5017. iwl3945_commit_rxon(priv);
  5018. else
  5019. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5020. IWL_DEBUG_MAC80211("leave\n");
  5021. out:
  5022. clear_bit(STATUS_CONF_PENDING, &priv->status);
  5023. mutex_unlock(&priv->mutex);
  5024. return ret;
  5025. }
  5026. static void iwl3945_config_ap(struct iwl_priv *priv)
  5027. {
  5028. int rc = 0;
  5029. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5030. return;
  5031. /* The following should be done only at AP bring up */
  5032. if (!(iwl3945_is_associated(priv))) {
  5033. /* RXON - unassoc (to set timing command) */
  5034. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5035. iwl3945_commit_rxon(priv);
  5036. /* RXON Timing */
  5037. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5038. iwl3945_setup_rxon_timing(priv);
  5039. rc = iwl3945_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5040. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5041. if (rc)
  5042. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  5043. "Attempting to continue.\n");
  5044. /* FIXME: what should be the assoc_id for AP? */
  5045. priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5046. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5047. priv->staging39_rxon.flags |=
  5048. RXON_FLG_SHORT_PREAMBLE_MSK;
  5049. else
  5050. priv->staging39_rxon.flags &=
  5051. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5052. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5053. if (priv->assoc_capability &
  5054. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5055. priv->staging39_rxon.flags |=
  5056. RXON_FLG_SHORT_SLOT_MSK;
  5057. else
  5058. priv->staging39_rxon.flags &=
  5059. ~RXON_FLG_SHORT_SLOT_MSK;
  5060. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  5061. priv->staging39_rxon.flags &=
  5062. ~RXON_FLG_SHORT_SLOT_MSK;
  5063. }
  5064. /* restore RXON assoc */
  5065. priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5066. iwl3945_commit_rxon(priv);
  5067. iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
  5068. }
  5069. iwl3945_send_beacon_cmd(priv);
  5070. /* FIXME - we need to add code here to detect a totally new
  5071. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5072. * clear sta table, add BCAST sta... */
  5073. }
  5074. static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
  5075. struct ieee80211_vif *vif,
  5076. struct ieee80211_if_conf *conf)
  5077. {
  5078. struct iwl_priv *priv = hw->priv;
  5079. int rc;
  5080. if (conf == NULL)
  5081. return -EIO;
  5082. if (priv->vif != vif) {
  5083. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  5084. return 0;
  5085. }
  5086. /* handle this temporarily here */
  5087. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  5088. conf->changed & IEEE80211_IFCC_BEACON) {
  5089. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  5090. if (!beacon)
  5091. return -ENOMEM;
  5092. mutex_lock(&priv->mutex);
  5093. rc = iwl3945_mac_beacon_update(hw, beacon);
  5094. mutex_unlock(&priv->mutex);
  5095. if (rc)
  5096. return rc;
  5097. }
  5098. if (!iwl_is_alive(priv))
  5099. return -EAGAIN;
  5100. mutex_lock(&priv->mutex);
  5101. if (conf->bssid)
  5102. IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
  5103. /*
  5104. * very dubious code was here; the probe filtering flag is never set:
  5105. *
  5106. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5107. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5108. */
  5109. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  5110. if (!conf->bssid) {
  5111. conf->bssid = priv->mac_addr;
  5112. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5113. IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
  5114. conf->bssid);
  5115. }
  5116. if (priv->ibss_beacon)
  5117. dev_kfree_skb(priv->ibss_beacon);
  5118. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  5119. }
  5120. if (iwl_is_rfkill(priv))
  5121. goto done;
  5122. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5123. !is_multicast_ether_addr(conf->bssid)) {
  5124. /* If there is currently a HW scan going on in the background
  5125. * then we need to cancel it else the RXON below will fail. */
  5126. if (iwl_scan_cancel_timeout(priv, 100)) {
  5127. IWL_WARN(priv, "Aborted scan still in progress "
  5128. "after 100ms\n");
  5129. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5130. mutex_unlock(&priv->mutex);
  5131. return -EAGAIN;
  5132. }
  5133. memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5134. /* TODO: Audit driver for usage of these members and see
  5135. * if mac80211 deprecates them (priv->bssid looks like it
  5136. * shouldn't be there, but I haven't scanned the IBSS code
  5137. * to verify) - jpk */
  5138. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5139. if (priv->iw_mode == NL80211_IFTYPE_AP)
  5140. iwl3945_config_ap(priv);
  5141. else {
  5142. rc = iwl3945_commit_rxon(priv);
  5143. if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
  5144. iwl3945_add_station(priv,
  5145. priv->active39_rxon.bssid_addr, 1, 0);
  5146. }
  5147. } else {
  5148. iwl_scan_cancel_timeout(priv, 100);
  5149. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5150. iwl3945_commit_rxon(priv);
  5151. }
  5152. done:
  5153. IWL_DEBUG_MAC80211("leave\n");
  5154. mutex_unlock(&priv->mutex);
  5155. return 0;
  5156. }
  5157. static void iwl3945_configure_filter(struct ieee80211_hw *hw,
  5158. unsigned int changed_flags,
  5159. unsigned int *total_flags,
  5160. int mc_count, struct dev_addr_list *mc_list)
  5161. {
  5162. struct iwl_priv *priv = hw->priv;
  5163. __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
  5164. IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
  5165. changed_flags, *total_flags);
  5166. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  5167. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  5168. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  5169. else
  5170. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  5171. }
  5172. if (changed_flags & FIF_ALLMULTI) {
  5173. if (*total_flags & FIF_ALLMULTI)
  5174. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  5175. else
  5176. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  5177. }
  5178. if (changed_flags & FIF_CONTROL) {
  5179. if (*total_flags & FIF_CONTROL)
  5180. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  5181. else
  5182. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  5183. }
  5184. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  5185. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  5186. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  5187. else
  5188. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  5189. }
  5190. /* We avoid iwl_commit_rxon here to commit the new filter flags
  5191. * since mac80211 will call ieee80211_hw_config immediately.
  5192. * (mc_list is not supported at this time). Otherwise, we need to
  5193. * queue a background iwl_commit_rxon work.
  5194. */
  5195. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  5196. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  5197. }
  5198. static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
  5199. struct ieee80211_if_init_conf *conf)
  5200. {
  5201. struct iwl_priv *priv = hw->priv;
  5202. IWL_DEBUG_MAC80211("enter\n");
  5203. mutex_lock(&priv->mutex);
  5204. if (iwl_is_ready_rf(priv)) {
  5205. iwl_scan_cancel_timeout(priv, 100);
  5206. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5207. iwl3945_commit_rxon(priv);
  5208. }
  5209. if (priv->vif == conf->vif) {
  5210. priv->vif = NULL;
  5211. memset(priv->bssid, 0, ETH_ALEN);
  5212. }
  5213. mutex_unlock(&priv->mutex);
  5214. IWL_DEBUG_MAC80211("leave\n");
  5215. }
  5216. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  5217. static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
  5218. struct ieee80211_vif *vif,
  5219. struct ieee80211_bss_conf *bss_conf,
  5220. u32 changes)
  5221. {
  5222. struct iwl_priv *priv = hw->priv;
  5223. IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
  5224. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  5225. IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
  5226. bss_conf->use_short_preamble);
  5227. if (bss_conf->use_short_preamble)
  5228. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5229. else
  5230. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5231. }
  5232. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  5233. IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  5234. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  5235. priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  5236. else
  5237. priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  5238. }
  5239. if (changes & BSS_CHANGED_ASSOC) {
  5240. IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
  5241. /* This should never happen as this function should
  5242. * never be called from interrupt context. */
  5243. if (WARN_ON_ONCE(in_interrupt()))
  5244. return;
  5245. if (bss_conf->assoc) {
  5246. priv->assoc_id = bss_conf->aid;
  5247. priv->beacon_int = bss_conf->beacon_int;
  5248. priv->timestamp = bss_conf->timestamp;
  5249. priv->assoc_capability = bss_conf->assoc_capability;
  5250. priv->next_scan_jiffies = jiffies +
  5251. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  5252. mutex_lock(&priv->mutex);
  5253. iwl3945_post_associate(priv);
  5254. mutex_unlock(&priv->mutex);
  5255. } else {
  5256. priv->assoc_id = 0;
  5257. IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
  5258. }
  5259. } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
  5260. IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
  5261. iwl3945_send_rxon_assoc(priv);
  5262. }
  5263. }
  5264. static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  5265. {
  5266. int rc = 0;
  5267. unsigned long flags;
  5268. struct iwl_priv *priv = hw->priv;
  5269. DECLARE_SSID_BUF(ssid_buf);
  5270. IWL_DEBUG_MAC80211("enter\n");
  5271. mutex_lock(&priv->mutex);
  5272. spin_lock_irqsave(&priv->lock, flags);
  5273. if (!iwl_is_ready_rf(priv)) {
  5274. rc = -EIO;
  5275. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  5276. goto out_unlock;
  5277. }
  5278. /* we don't schedule scan within next_scan_jiffies period */
  5279. if (priv->next_scan_jiffies &&
  5280. time_after(priv->next_scan_jiffies, jiffies)) {
  5281. rc = -EAGAIN;
  5282. goto out_unlock;
  5283. }
  5284. /* if we just finished scan ask for delay for a broadcast scan */
  5285. if ((len == 0) && priv->last_scan_jiffies &&
  5286. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  5287. jiffies)) {
  5288. rc = -EAGAIN;
  5289. goto out_unlock;
  5290. }
  5291. if (len) {
  5292. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  5293. print_ssid(ssid_buf, ssid, len), (int)len);
  5294. priv->one_direct_scan = 1;
  5295. priv->direct_ssid_len = (u8)
  5296. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  5297. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  5298. } else
  5299. priv->one_direct_scan = 0;
  5300. rc = iwl3945_scan_initiate(priv);
  5301. IWL_DEBUG_MAC80211("leave\n");
  5302. out_unlock:
  5303. spin_unlock_irqrestore(&priv->lock, flags);
  5304. mutex_unlock(&priv->mutex);
  5305. return rc;
  5306. }
  5307. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  5308. struct ieee80211_vif *vif,
  5309. struct ieee80211_sta *sta,
  5310. struct ieee80211_key_conf *key)
  5311. {
  5312. struct iwl_priv *priv = hw->priv;
  5313. const u8 *addr;
  5314. int ret;
  5315. u8 sta_id;
  5316. IWL_DEBUG_MAC80211("enter\n");
  5317. if (iwl3945_mod_params.sw_crypto) {
  5318. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  5319. return -EOPNOTSUPP;
  5320. }
  5321. addr = sta ? sta->addr : iwl_bcast_addr;
  5322. sta_id = iwl3945_hw_find_station(priv, addr);
  5323. if (sta_id == IWL_INVALID_STATION) {
  5324. IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
  5325. addr);
  5326. return -EINVAL;
  5327. }
  5328. mutex_lock(&priv->mutex);
  5329. iwl_scan_cancel_timeout(priv, 100);
  5330. switch (cmd) {
  5331. case SET_KEY:
  5332. ret = iwl3945_update_sta_key_info(priv, key, sta_id);
  5333. if (!ret) {
  5334. iwl3945_set_rxon_hwcrypto(priv, 1);
  5335. iwl3945_commit_rxon(priv);
  5336. key->hw_key_idx = sta_id;
  5337. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  5338. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  5339. }
  5340. break;
  5341. case DISABLE_KEY:
  5342. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  5343. if (!ret) {
  5344. iwl3945_set_rxon_hwcrypto(priv, 0);
  5345. iwl3945_commit_rxon(priv);
  5346. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  5347. }
  5348. break;
  5349. default:
  5350. ret = -EINVAL;
  5351. }
  5352. IWL_DEBUG_MAC80211("leave\n");
  5353. mutex_unlock(&priv->mutex);
  5354. return ret;
  5355. }
  5356. static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  5357. const struct ieee80211_tx_queue_params *params)
  5358. {
  5359. struct iwl_priv *priv = hw->priv;
  5360. unsigned long flags;
  5361. int q;
  5362. IWL_DEBUG_MAC80211("enter\n");
  5363. if (!iwl_is_ready_rf(priv)) {
  5364. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5365. return -EIO;
  5366. }
  5367. if (queue >= AC_NUM) {
  5368. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  5369. return 0;
  5370. }
  5371. q = AC_NUM - 1 - queue;
  5372. spin_lock_irqsave(&priv->lock, flags);
  5373. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  5374. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  5375. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  5376. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  5377. cpu_to_le16((params->txop * 32));
  5378. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  5379. priv->qos_data.qos_active = 1;
  5380. spin_unlock_irqrestore(&priv->lock, flags);
  5381. mutex_lock(&priv->mutex);
  5382. if (priv->iw_mode == NL80211_IFTYPE_AP)
  5383. iwl3945_activate_qos(priv, 1);
  5384. else if (priv->assoc_id && iwl3945_is_associated(priv))
  5385. iwl3945_activate_qos(priv, 0);
  5386. mutex_unlock(&priv->mutex);
  5387. IWL_DEBUG_MAC80211("leave\n");
  5388. return 0;
  5389. }
  5390. static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
  5391. struct ieee80211_tx_queue_stats *stats)
  5392. {
  5393. struct iwl_priv *priv = hw->priv;
  5394. int i, avail;
  5395. struct iwl_tx_queue *txq;
  5396. struct iwl_queue *q;
  5397. unsigned long flags;
  5398. IWL_DEBUG_MAC80211("enter\n");
  5399. if (!iwl_is_ready_rf(priv)) {
  5400. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5401. return -EIO;
  5402. }
  5403. spin_lock_irqsave(&priv->lock, flags);
  5404. for (i = 0; i < AC_NUM; i++) {
  5405. txq = &priv->txq[i];
  5406. q = &txq->q;
  5407. avail = iwl_queue_space(q);
  5408. stats[i].len = q->n_window - avail;
  5409. stats[i].limit = q->n_window - q->high_mark;
  5410. stats[i].count = q->n_window;
  5411. }
  5412. spin_unlock_irqrestore(&priv->lock, flags);
  5413. IWL_DEBUG_MAC80211("leave\n");
  5414. return 0;
  5415. }
  5416. static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
  5417. {
  5418. struct iwl_priv *priv = hw->priv;
  5419. unsigned long flags;
  5420. mutex_lock(&priv->mutex);
  5421. IWL_DEBUG_MAC80211("enter\n");
  5422. iwl_reset_qos(priv);
  5423. spin_lock_irqsave(&priv->lock, flags);
  5424. priv->assoc_id = 0;
  5425. priv->assoc_capability = 0;
  5426. priv->call_post_assoc_from_beacon = 0;
  5427. /* new association get rid of ibss beacon skb */
  5428. if (priv->ibss_beacon)
  5429. dev_kfree_skb(priv->ibss_beacon);
  5430. priv->ibss_beacon = NULL;
  5431. priv->beacon_int = priv->hw->conf.beacon_int;
  5432. priv->timestamp = 0;
  5433. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  5434. priv->beacon_int = 0;
  5435. spin_unlock_irqrestore(&priv->lock, flags);
  5436. if (!iwl_is_ready_rf(priv)) {
  5437. IWL_DEBUG_MAC80211("leave - not ready\n");
  5438. mutex_unlock(&priv->mutex);
  5439. return;
  5440. }
  5441. /* we are restarting association process
  5442. * clear RXON_FILTER_ASSOC_MSK bit
  5443. */
  5444. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  5445. iwl_scan_cancel_timeout(priv, 100);
  5446. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5447. iwl3945_commit_rxon(priv);
  5448. }
  5449. /* Per mac80211.h: This is only used in IBSS mode... */
  5450. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  5451. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  5452. mutex_unlock(&priv->mutex);
  5453. return;
  5454. }
  5455. iwl3945_set_rate(priv);
  5456. mutex_unlock(&priv->mutex);
  5457. IWL_DEBUG_MAC80211("leave\n");
  5458. }
  5459. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  5460. {
  5461. struct iwl_priv *priv = hw->priv;
  5462. unsigned long flags;
  5463. IWL_DEBUG_MAC80211("enter\n");
  5464. if (!iwl_is_ready_rf(priv)) {
  5465. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5466. return -EIO;
  5467. }
  5468. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  5469. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  5470. return -EIO;
  5471. }
  5472. spin_lock_irqsave(&priv->lock, flags);
  5473. if (priv->ibss_beacon)
  5474. dev_kfree_skb(priv->ibss_beacon);
  5475. priv->ibss_beacon = skb;
  5476. priv->assoc_id = 0;
  5477. IWL_DEBUG_MAC80211("leave\n");
  5478. spin_unlock_irqrestore(&priv->lock, flags);
  5479. iwl_reset_qos(priv);
  5480. iwl3945_post_associate(priv);
  5481. return 0;
  5482. }
  5483. /*****************************************************************************
  5484. *
  5485. * sysfs attributes
  5486. *
  5487. *****************************************************************************/
  5488. #ifdef CONFIG_IWL3945_DEBUG
  5489. /*
  5490. * The following adds a new attribute to the sysfs representation
  5491. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  5492. * used for controlling the debug level.
  5493. *
  5494. * See the level definitions in iwl for details.
  5495. */
  5496. static ssize_t show_debug_level(struct device *d,
  5497. struct device_attribute *attr, char *buf)
  5498. {
  5499. struct iwl_priv *priv = d->driver_data;
  5500. return sprintf(buf, "0x%08X\n", priv->debug_level);
  5501. }
  5502. static ssize_t store_debug_level(struct device *d,
  5503. struct device_attribute *attr,
  5504. const char *buf, size_t count)
  5505. {
  5506. struct iwl_priv *priv = d->driver_data;
  5507. unsigned long val;
  5508. int ret;
  5509. ret = strict_strtoul(buf, 0, &val);
  5510. if (ret)
  5511. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  5512. else
  5513. priv->debug_level = val;
  5514. return strnlen(buf, count);
  5515. }
  5516. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  5517. show_debug_level, store_debug_level);
  5518. #endif /* CONFIG_IWL3945_DEBUG */
  5519. static ssize_t show_temperature(struct device *d,
  5520. struct device_attribute *attr, char *buf)
  5521. {
  5522. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5523. if (!iwl_is_alive(priv))
  5524. return -EAGAIN;
  5525. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  5526. }
  5527. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  5528. static ssize_t show_tx_power(struct device *d,
  5529. struct device_attribute *attr, char *buf)
  5530. {
  5531. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5532. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  5533. }
  5534. static ssize_t store_tx_power(struct device *d,
  5535. struct device_attribute *attr,
  5536. const char *buf, size_t count)
  5537. {
  5538. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5539. char *p = (char *)buf;
  5540. u32 val;
  5541. val = simple_strtoul(p, &p, 10);
  5542. if (p == buf)
  5543. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  5544. else
  5545. iwl3945_hw_reg_set_txpower(priv, val);
  5546. return count;
  5547. }
  5548. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  5549. static ssize_t show_flags(struct device *d,
  5550. struct device_attribute *attr, char *buf)
  5551. {
  5552. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5553. return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
  5554. }
  5555. static ssize_t store_flags(struct device *d,
  5556. struct device_attribute *attr,
  5557. const char *buf, size_t count)
  5558. {
  5559. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5560. u32 flags = simple_strtoul(buf, NULL, 0);
  5561. mutex_lock(&priv->mutex);
  5562. if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
  5563. /* Cancel any currently running scans... */
  5564. if (iwl_scan_cancel_timeout(priv, 100))
  5565. IWL_WARN(priv, "Could not cancel scan.\n");
  5566. else {
  5567. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  5568. flags);
  5569. priv->staging39_rxon.flags = cpu_to_le32(flags);
  5570. iwl3945_commit_rxon(priv);
  5571. }
  5572. }
  5573. mutex_unlock(&priv->mutex);
  5574. return count;
  5575. }
  5576. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  5577. static ssize_t show_filter_flags(struct device *d,
  5578. struct device_attribute *attr, char *buf)
  5579. {
  5580. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5581. return sprintf(buf, "0x%04X\n",
  5582. le32_to_cpu(priv->active39_rxon.filter_flags));
  5583. }
  5584. static ssize_t store_filter_flags(struct device *d,
  5585. struct device_attribute *attr,
  5586. const char *buf, size_t count)
  5587. {
  5588. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5589. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  5590. mutex_lock(&priv->mutex);
  5591. if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
  5592. /* Cancel any currently running scans... */
  5593. if (iwl_scan_cancel_timeout(priv, 100))
  5594. IWL_WARN(priv, "Could not cancel scan.\n");
  5595. else {
  5596. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  5597. "0x%04X\n", filter_flags);
  5598. priv->staging39_rxon.filter_flags =
  5599. cpu_to_le32(filter_flags);
  5600. iwl3945_commit_rxon(priv);
  5601. }
  5602. }
  5603. mutex_unlock(&priv->mutex);
  5604. return count;
  5605. }
  5606. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  5607. store_filter_flags);
  5608. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  5609. static ssize_t show_measurement(struct device *d,
  5610. struct device_attribute *attr, char *buf)
  5611. {
  5612. struct iwl_priv *priv = dev_get_drvdata(d);
  5613. struct iwl_spectrum_notification measure_report;
  5614. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  5615. u8 *data = (u8 *)&measure_report;
  5616. unsigned long flags;
  5617. spin_lock_irqsave(&priv->lock, flags);
  5618. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  5619. spin_unlock_irqrestore(&priv->lock, flags);
  5620. return 0;
  5621. }
  5622. memcpy(&measure_report, &priv->measure_report, size);
  5623. priv->measurement_status = 0;
  5624. spin_unlock_irqrestore(&priv->lock, flags);
  5625. while (size && (PAGE_SIZE - len)) {
  5626. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  5627. PAGE_SIZE - len, 1);
  5628. len = strlen(buf);
  5629. if (PAGE_SIZE - len)
  5630. buf[len++] = '\n';
  5631. ofs += 16;
  5632. size -= min(size, 16U);
  5633. }
  5634. return len;
  5635. }
  5636. static ssize_t store_measurement(struct device *d,
  5637. struct device_attribute *attr,
  5638. const char *buf, size_t count)
  5639. {
  5640. struct iwl_priv *priv = dev_get_drvdata(d);
  5641. struct ieee80211_measurement_params params = {
  5642. .channel = le16_to_cpu(priv->active39_rxon.channel),
  5643. .start_time = cpu_to_le64(priv->last_tsf),
  5644. .duration = cpu_to_le16(1),
  5645. };
  5646. u8 type = IWL_MEASURE_BASIC;
  5647. u8 buffer[32];
  5648. u8 channel;
  5649. if (count) {
  5650. char *p = buffer;
  5651. strncpy(buffer, buf, min(sizeof(buffer), count));
  5652. channel = simple_strtoul(p, NULL, 0);
  5653. if (channel)
  5654. params.channel = channel;
  5655. p = buffer;
  5656. while (*p && *p != ' ')
  5657. p++;
  5658. if (*p)
  5659. type = simple_strtoul(p + 1, NULL, 0);
  5660. }
  5661. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  5662. "channel %d (for '%s')\n", type, params.channel, buf);
  5663. iwl3945_get_measurement(priv, &params, type);
  5664. return count;
  5665. }
  5666. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  5667. show_measurement, store_measurement);
  5668. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  5669. static ssize_t store_retry_rate(struct device *d,
  5670. struct device_attribute *attr,
  5671. const char *buf, size_t count)
  5672. {
  5673. struct iwl_priv *priv = dev_get_drvdata(d);
  5674. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  5675. if (priv->retry_rate <= 0)
  5676. priv->retry_rate = 1;
  5677. return count;
  5678. }
  5679. static ssize_t show_retry_rate(struct device *d,
  5680. struct device_attribute *attr, char *buf)
  5681. {
  5682. struct iwl_priv *priv = dev_get_drvdata(d);
  5683. return sprintf(buf, "%d", priv->retry_rate);
  5684. }
  5685. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  5686. store_retry_rate);
  5687. static ssize_t store_power_level(struct device *d,
  5688. struct device_attribute *attr,
  5689. const char *buf, size_t count)
  5690. {
  5691. struct iwl_priv *priv = dev_get_drvdata(d);
  5692. int rc;
  5693. int mode;
  5694. mode = simple_strtoul(buf, NULL, 0);
  5695. mutex_lock(&priv->mutex);
  5696. if (!iwl_is_ready(priv)) {
  5697. rc = -EAGAIN;
  5698. goto out;
  5699. }
  5700. if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
  5701. (mode == IWL39_POWER_AC))
  5702. mode = IWL39_POWER_AC;
  5703. else
  5704. mode |= IWL_POWER_ENABLED;
  5705. if (mode != priv->power_mode) {
  5706. rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  5707. if (rc) {
  5708. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  5709. goto out;
  5710. }
  5711. priv->power_mode = mode;
  5712. }
  5713. rc = count;
  5714. out:
  5715. mutex_unlock(&priv->mutex);
  5716. return rc;
  5717. }
  5718. #define MAX_WX_STRING 80
  5719. /* Values are in microsecond */
  5720. static const s32 timeout_duration[] = {
  5721. 350000,
  5722. 250000,
  5723. 75000,
  5724. 37000,
  5725. 25000,
  5726. };
  5727. static const s32 period_duration[] = {
  5728. 400000,
  5729. 700000,
  5730. 1000000,
  5731. 1000000,
  5732. 1000000
  5733. };
  5734. static ssize_t show_power_level(struct device *d,
  5735. struct device_attribute *attr, char *buf)
  5736. {
  5737. struct iwl_priv *priv = dev_get_drvdata(d);
  5738. int level = IWL_POWER_LEVEL(priv->power_mode);
  5739. char *p = buf;
  5740. p += sprintf(p, "%d ", level);
  5741. switch (level) {
  5742. case IWL_POWER_MODE_CAM:
  5743. case IWL39_POWER_AC:
  5744. p += sprintf(p, "(AC)");
  5745. break;
  5746. case IWL39_POWER_BATTERY:
  5747. p += sprintf(p, "(BATTERY)");
  5748. break;
  5749. default:
  5750. p += sprintf(p,
  5751. "(Timeout %dms, Period %dms)",
  5752. timeout_duration[level - 1] / 1000,
  5753. period_duration[level - 1] / 1000);
  5754. }
  5755. if (!(priv->power_mode & IWL_POWER_ENABLED))
  5756. p += sprintf(p, " OFF\n");
  5757. else
  5758. p += sprintf(p, " \n");
  5759. return p - buf + 1;
  5760. }
  5761. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  5762. store_power_level);
  5763. static ssize_t show_channels(struct device *d,
  5764. struct device_attribute *attr, char *buf)
  5765. {
  5766. /* all this shit doesn't belong into sysfs anyway */
  5767. return 0;
  5768. }
  5769. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  5770. static ssize_t show_statistics(struct device *d,
  5771. struct device_attribute *attr, char *buf)
  5772. {
  5773. struct iwl_priv *priv = dev_get_drvdata(d);
  5774. u32 size = sizeof(struct iwl3945_notif_statistics);
  5775. u32 len = 0, ofs = 0;
  5776. u8 *data = (u8 *)&priv->statistics_39;
  5777. int rc = 0;
  5778. if (!iwl_is_alive(priv))
  5779. return -EAGAIN;
  5780. mutex_lock(&priv->mutex);
  5781. rc = iwl3945_send_statistics_request(priv);
  5782. mutex_unlock(&priv->mutex);
  5783. if (rc) {
  5784. len = sprintf(buf,
  5785. "Error sending statistics request: 0x%08X\n", rc);
  5786. return len;
  5787. }
  5788. while (size && (PAGE_SIZE - len)) {
  5789. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  5790. PAGE_SIZE - len, 1);
  5791. len = strlen(buf);
  5792. if (PAGE_SIZE - len)
  5793. buf[len++] = '\n';
  5794. ofs += 16;
  5795. size -= min(size, 16U);
  5796. }
  5797. return len;
  5798. }
  5799. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  5800. static ssize_t show_antenna(struct device *d,
  5801. struct device_attribute *attr, char *buf)
  5802. {
  5803. struct iwl_priv *priv = dev_get_drvdata(d);
  5804. if (!iwl_is_alive(priv))
  5805. return -EAGAIN;
  5806. return sprintf(buf, "%d\n", priv->antenna);
  5807. }
  5808. static ssize_t store_antenna(struct device *d,
  5809. struct device_attribute *attr,
  5810. const char *buf, size_t count)
  5811. {
  5812. int ant;
  5813. struct iwl_priv *priv = dev_get_drvdata(d);
  5814. if (count == 0)
  5815. return 0;
  5816. if (sscanf(buf, "%1i", &ant) != 1) {
  5817. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  5818. return count;
  5819. }
  5820. if ((ant >= 0) && (ant <= 2)) {
  5821. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  5822. priv->antenna = (enum iwl3945_antenna)ant;
  5823. } else
  5824. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  5825. return count;
  5826. }
  5827. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  5828. static ssize_t show_status(struct device *d,
  5829. struct device_attribute *attr, char *buf)
  5830. {
  5831. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5832. if (!iwl_is_alive(priv))
  5833. return -EAGAIN;
  5834. return sprintf(buf, "0x%08x\n", (int)priv->status);
  5835. }
  5836. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  5837. static ssize_t dump_error_log(struct device *d,
  5838. struct device_attribute *attr,
  5839. const char *buf, size_t count)
  5840. {
  5841. char *p = (char *)buf;
  5842. if (p[0] == '1')
  5843. iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  5844. return strnlen(buf, count);
  5845. }
  5846. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  5847. static ssize_t dump_event_log(struct device *d,
  5848. struct device_attribute *attr,
  5849. const char *buf, size_t count)
  5850. {
  5851. char *p = (char *)buf;
  5852. if (p[0] == '1')
  5853. iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  5854. return strnlen(buf, count);
  5855. }
  5856. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  5857. /*****************************************************************************
  5858. *
  5859. * driver setup and tear down
  5860. *
  5861. *****************************************************************************/
  5862. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  5863. {
  5864. priv->workqueue = create_workqueue(DRV_NAME);
  5865. init_waitqueue_head(&priv->wait_command_queue);
  5866. INIT_WORK(&priv->up, iwl3945_bg_up);
  5867. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  5868. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  5869. INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
  5870. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  5871. INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
  5872. INIT_WORK(&priv->rf_kill, iwl3945_bg_rf_kill);
  5873. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  5874. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  5875. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  5876. INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
  5877. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  5878. iwl3945_hw_setup_deferred_work(priv);
  5879. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  5880. iwl3945_irq_tasklet, (unsigned long)priv);
  5881. }
  5882. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  5883. {
  5884. iwl3945_hw_cancel_deferred_work(priv);
  5885. cancel_delayed_work_sync(&priv->init_alive_start);
  5886. cancel_delayed_work(&priv->scan_check);
  5887. cancel_delayed_work(&priv->alive_start);
  5888. cancel_work_sync(&priv->beacon_update);
  5889. }
  5890. static struct attribute *iwl3945_sysfs_entries[] = {
  5891. &dev_attr_antenna.attr,
  5892. &dev_attr_channels.attr,
  5893. &dev_attr_dump_errors.attr,
  5894. &dev_attr_dump_events.attr,
  5895. &dev_attr_flags.attr,
  5896. &dev_attr_filter_flags.attr,
  5897. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  5898. &dev_attr_measurement.attr,
  5899. #endif
  5900. &dev_attr_power_level.attr,
  5901. &dev_attr_retry_rate.attr,
  5902. &dev_attr_statistics.attr,
  5903. &dev_attr_status.attr,
  5904. &dev_attr_temperature.attr,
  5905. &dev_attr_tx_power.attr,
  5906. #ifdef CONFIG_IWL3945_DEBUG
  5907. &dev_attr_debug_level.attr,
  5908. #endif
  5909. NULL
  5910. };
  5911. static struct attribute_group iwl3945_attribute_group = {
  5912. .name = NULL, /* put in device directory */
  5913. .attrs = iwl3945_sysfs_entries,
  5914. };
  5915. static struct ieee80211_ops iwl3945_hw_ops = {
  5916. .tx = iwl3945_mac_tx,
  5917. .start = iwl3945_mac_start,
  5918. .stop = iwl3945_mac_stop,
  5919. .add_interface = iwl3945_mac_add_interface,
  5920. .remove_interface = iwl3945_mac_remove_interface,
  5921. .config = iwl3945_mac_config,
  5922. .config_interface = iwl3945_mac_config_interface,
  5923. .configure_filter = iwl3945_configure_filter,
  5924. .set_key = iwl3945_mac_set_key,
  5925. .get_tx_stats = iwl3945_mac_get_tx_stats,
  5926. .conf_tx = iwl3945_mac_conf_tx,
  5927. .reset_tsf = iwl3945_mac_reset_tsf,
  5928. .bss_info_changed = iwl3945_bss_info_changed,
  5929. .hw_scan = iwl3945_mac_hw_scan
  5930. };
  5931. static int iwl3945_init_drv(struct iwl_priv *priv)
  5932. {
  5933. int ret;
  5934. priv->retry_rate = 1;
  5935. priv->ibss_beacon = NULL;
  5936. spin_lock_init(&priv->lock);
  5937. spin_lock_init(&priv->power_data_39.lock);
  5938. spin_lock_init(&priv->sta_lock);
  5939. spin_lock_init(&priv->hcmd_lock);
  5940. INIT_LIST_HEAD(&priv->free_frames);
  5941. mutex_init(&priv->mutex);
  5942. /* Clear the driver's (not device's) station table */
  5943. iwl3945_clear_stations_table(priv);
  5944. priv->data_retry_limit = -1;
  5945. priv->ieee_channels = NULL;
  5946. priv->ieee_rates = NULL;
  5947. priv->band = IEEE80211_BAND_2GHZ;
  5948. priv->iw_mode = NL80211_IFTYPE_STATION;
  5949. iwl_reset_qos(priv);
  5950. priv->qos_data.qos_active = 0;
  5951. priv->qos_data.qos_cap.val = 0;
  5952. priv->rates_mask = IWL_RATES_MASK;
  5953. /* If power management is turned on, default to AC mode */
  5954. priv->power_mode = IWL39_POWER_AC;
  5955. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  5956. ret = iwl3945_init_channel_map(priv);
  5957. if (ret) {
  5958. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  5959. goto err;
  5960. }
  5961. ret = iwl3945_init_geos(priv);
  5962. if (ret) {
  5963. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  5964. goto err_free_channel_map;
  5965. }
  5966. return 0;
  5967. err_free_channel_map:
  5968. iwl3945_free_channel_map(priv);
  5969. err:
  5970. return ret;
  5971. }
  5972. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  5973. {
  5974. int err = 0;
  5975. struct iwl_priv *priv;
  5976. struct ieee80211_hw *hw;
  5977. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  5978. unsigned long flags;
  5979. /***********************
  5980. * 1. Allocating HW data
  5981. * ********************/
  5982. /* mac80211 allocates memory for this device instance, including
  5983. * space for this driver's private structure */
  5984. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  5985. if (hw == NULL) {
  5986. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  5987. err = -ENOMEM;
  5988. goto out;
  5989. }
  5990. priv = hw->priv;
  5991. SET_IEEE80211_DEV(hw, &pdev->dev);
  5992. if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
  5993. (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  5994. IWL_ERR(priv,
  5995. "invalid queues_num, should be between %d and %d\n",
  5996. IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
  5997. err = -EINVAL;
  5998. goto out;
  5999. }
  6000. /*
  6001. * Disabling hardware scan means that mac80211 will perform scans
  6002. * "the hard way", rather than using device's scan.
  6003. */
  6004. if (iwl3945_mod_params.disable_hw_scan) {
  6005. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6006. iwl3945_hw_ops.hw_scan = NULL;
  6007. }
  6008. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6009. priv->cfg = cfg;
  6010. priv->pci_dev = pdev;
  6011. #ifdef CONFIG_IWL3945_DEBUG
  6012. priv->debug_level = iwl3945_mod_params.debug;
  6013. atomic_set(&priv->restrict_refcnt, 0);
  6014. #endif
  6015. hw->rate_control_algorithm = "iwl-3945-rs";
  6016. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  6017. /* Select antenna (may be helpful if only one antenna is connected) */
  6018. priv->antenna = (enum iwl3945_antenna)iwl3945_mod_params.antenna;
  6019. /* Tell mac80211 our characteristics */
  6020. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  6021. IEEE80211_HW_NOISE_DBM;
  6022. hw->wiphy->interface_modes =
  6023. BIT(NL80211_IFTYPE_STATION) |
  6024. BIT(NL80211_IFTYPE_ADHOC);
  6025. hw->wiphy->fw_handles_regulatory = true;
  6026. /* 4 EDCA QOS priorities */
  6027. hw->queues = 4;
  6028. /***************************
  6029. * 2. Initializing PCI bus
  6030. * *************************/
  6031. if (pci_enable_device(pdev)) {
  6032. err = -ENODEV;
  6033. goto out_ieee80211_free_hw;
  6034. }
  6035. pci_set_master(pdev);
  6036. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6037. if (!err)
  6038. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6039. if (err) {
  6040. IWL_WARN(priv, "No suitable DMA available.\n");
  6041. goto out_pci_disable_device;
  6042. }
  6043. pci_set_drvdata(pdev, priv);
  6044. err = pci_request_regions(pdev, DRV_NAME);
  6045. if (err)
  6046. goto out_pci_disable_device;
  6047. /***********************
  6048. * 3. Read REV Register
  6049. * ********************/
  6050. priv->hw_base = pci_iomap(pdev, 0, 0);
  6051. if (!priv->hw_base) {
  6052. err = -ENODEV;
  6053. goto out_pci_release_regions;
  6054. }
  6055. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  6056. (unsigned long long) pci_resource_len(pdev, 0));
  6057. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  6058. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6059. * PCI Tx retries from interfering with C3 CPU state */
  6060. pci_write_config_byte(pdev, 0x41, 0x00);
  6061. /* amp init */
  6062. err = priv->cfg->ops->lib->apm_ops.init(priv);
  6063. if (err < 0) {
  6064. IWL_DEBUG_INFO("Failed to init APMG\n");
  6065. goto out_iounmap;
  6066. }
  6067. /***********************
  6068. * 4. Read EEPROM
  6069. * ********************/
  6070. /* Read the EEPROM */
  6071. err = iwl3945_eeprom_init(priv);
  6072. if (err) {
  6073. IWL_ERR(priv, "Unable to init EEPROM\n");
  6074. goto out_remove_sysfs;
  6075. }
  6076. /* MAC Address location in EEPROM same for 3945/4965 */
  6077. get_eeprom_mac(priv, priv->mac_addr);
  6078. IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
  6079. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  6080. /***********************
  6081. * 5. Setup HW Constants
  6082. * ********************/
  6083. /* Device-specific setup */
  6084. if (iwl3945_hw_set_hw_params(priv)) {
  6085. IWL_ERR(priv, "failed to set hw settings\n");
  6086. goto out_iounmap;
  6087. }
  6088. /***********************
  6089. * 6. Setup priv
  6090. * ********************/
  6091. err = iwl3945_init_drv(priv);
  6092. if (err) {
  6093. IWL_ERR(priv, "initializing driver failed\n");
  6094. goto out_free_geos;
  6095. }
  6096. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  6097. priv->cfg->name);
  6098. /***********************************
  6099. * 7. Initialize Module Parameters
  6100. * **********************************/
  6101. /* Initialize module parameter values here */
  6102. /* Disable radio (SW RF KILL) via parameter when loading driver */
  6103. if (iwl3945_mod_params.disable) {
  6104. set_bit(STATUS_RF_KILL_SW, &priv->status);
  6105. IWL_DEBUG_INFO("Radio disabled.\n");
  6106. }
  6107. /***********************
  6108. * 8. Setup Services
  6109. * ********************/
  6110. spin_lock_irqsave(&priv->lock, flags);
  6111. iwl3945_disable_interrupts(priv);
  6112. spin_unlock_irqrestore(&priv->lock, flags);
  6113. pci_enable_msi(priv->pci_dev);
  6114. err = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
  6115. DRV_NAME, priv);
  6116. if (err) {
  6117. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  6118. goto out_disable_msi;
  6119. }
  6120. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  6121. if (err) {
  6122. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  6123. goto out_release_irq;
  6124. }
  6125. iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  6126. iwl3945_setup_deferred_work(priv);
  6127. iwl3945_setup_rx_handlers(priv);
  6128. /*********************************
  6129. * 9. Setup and Register mac80211
  6130. * *******************************/
  6131. err = ieee80211_register_hw(priv->hw);
  6132. if (err) {
  6133. IWL_ERR(priv, "Failed to register network device: %d\n", err);
  6134. goto out_remove_sysfs;
  6135. }
  6136. priv->hw->conf.beacon_int = 100;
  6137. priv->mac80211_registered = 1;
  6138. err = iwl3945_rfkill_init(priv);
  6139. if (err)
  6140. IWL_ERR(priv, "Unable to initialize RFKILL system. "
  6141. "Ignoring error: %d\n", err);
  6142. /* Start monitoring the killswitch */
  6143. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  6144. 2 * HZ);
  6145. return 0;
  6146. out_remove_sysfs:
  6147. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  6148. out_free_geos:
  6149. iwl3945_free_geos(priv);
  6150. out_release_irq:
  6151. free_irq(priv->pci_dev->irq, priv);
  6152. destroy_workqueue(priv->workqueue);
  6153. priv->workqueue = NULL;
  6154. iwl3945_unset_hw_params(priv);
  6155. out_disable_msi:
  6156. pci_disable_msi(priv->pci_dev);
  6157. out_iounmap:
  6158. pci_iounmap(pdev, priv->hw_base);
  6159. out_pci_release_regions:
  6160. pci_release_regions(pdev);
  6161. out_pci_disable_device:
  6162. pci_disable_device(pdev);
  6163. pci_set_drvdata(pdev, NULL);
  6164. out_ieee80211_free_hw:
  6165. ieee80211_free_hw(priv->hw);
  6166. out:
  6167. return err;
  6168. }
  6169. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  6170. {
  6171. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6172. unsigned long flags;
  6173. if (!priv)
  6174. return;
  6175. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  6176. set_bit(STATUS_EXIT_PENDING, &priv->status);
  6177. if (priv->mac80211_registered) {
  6178. ieee80211_unregister_hw(priv->hw);
  6179. priv->mac80211_registered = 0;
  6180. } else {
  6181. iwl3945_down(priv);
  6182. }
  6183. /* make sure we flush any pending irq or
  6184. * tasklet for the driver
  6185. */
  6186. spin_lock_irqsave(&priv->lock, flags);
  6187. iwl3945_disable_interrupts(priv);
  6188. spin_unlock_irqrestore(&priv->lock, flags);
  6189. iwl_synchronize_irq(priv);
  6190. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  6191. iwl3945_rfkill_unregister(priv);
  6192. cancel_delayed_work(&priv->rfkill_poll);
  6193. iwl3945_dealloc_ucode_pci(priv);
  6194. if (priv->rxq.bd)
  6195. iwl_rx_queue_free(priv, &priv->rxq);
  6196. iwl3945_hw_txq_ctx_free(priv);
  6197. iwl3945_unset_hw_params(priv);
  6198. iwl3945_clear_stations_table(priv);
  6199. /*netif_stop_queue(dev); */
  6200. flush_workqueue(priv->workqueue);
  6201. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  6202. * priv->workqueue... so we can't take down the workqueue
  6203. * until now... */
  6204. destroy_workqueue(priv->workqueue);
  6205. priv->workqueue = NULL;
  6206. free_irq(pdev->irq, priv);
  6207. pci_disable_msi(pdev);
  6208. pci_iounmap(pdev, priv->hw_base);
  6209. pci_release_regions(pdev);
  6210. pci_disable_device(pdev);
  6211. pci_set_drvdata(pdev, NULL);
  6212. iwl3945_free_channel_map(priv);
  6213. iwl3945_free_geos(priv);
  6214. kfree(priv->scan39);
  6215. if (priv->ibss_beacon)
  6216. dev_kfree_skb(priv->ibss_beacon);
  6217. ieee80211_free_hw(priv->hw);
  6218. }
  6219. #ifdef CONFIG_PM
  6220. static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  6221. {
  6222. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6223. if (priv->is_open) {
  6224. set_bit(STATUS_IN_SUSPEND, &priv->status);
  6225. iwl3945_mac_stop(priv->hw);
  6226. priv->is_open = 1;
  6227. }
  6228. pci_save_state(pdev);
  6229. pci_disable_device(pdev);
  6230. pci_set_power_state(pdev, PCI_D3hot);
  6231. return 0;
  6232. }
  6233. static int iwl3945_pci_resume(struct pci_dev *pdev)
  6234. {
  6235. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6236. pci_set_power_state(pdev, PCI_D0);
  6237. pci_enable_device(pdev);
  6238. pci_restore_state(pdev);
  6239. if (priv->is_open)
  6240. iwl3945_mac_start(priv->hw);
  6241. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  6242. return 0;
  6243. }
  6244. #endif /* CONFIG_PM */
  6245. /*************** RFKILL FUNCTIONS **********/
  6246. #ifdef CONFIG_IWL3945_RFKILL
  6247. /* software rf-kill from user */
  6248. static int iwl3945_rfkill_soft_rf_kill(void *data, enum rfkill_state state)
  6249. {
  6250. struct iwl_priv *priv = data;
  6251. int err = 0;
  6252. if (!priv->rfkill)
  6253. return 0;
  6254. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6255. return 0;
  6256. IWL_DEBUG_RF_KILL("we received soft RFKILL set to state %d\n", state);
  6257. mutex_lock(&priv->mutex);
  6258. switch (state) {
  6259. case RFKILL_STATE_UNBLOCKED:
  6260. if (iwl_is_rfkill_hw(priv)) {
  6261. err = -EBUSY;
  6262. goto out_unlock;
  6263. }
  6264. iwl3945_radio_kill_sw(priv, 0);
  6265. break;
  6266. case RFKILL_STATE_SOFT_BLOCKED:
  6267. iwl3945_radio_kill_sw(priv, 1);
  6268. break;
  6269. default:
  6270. IWL_WARN(priv, "received unexpected RFKILL state %d\n", state);
  6271. break;
  6272. }
  6273. out_unlock:
  6274. mutex_unlock(&priv->mutex);
  6275. return err;
  6276. }
  6277. int iwl3945_rfkill_init(struct iwl_priv *priv)
  6278. {
  6279. struct device *device = wiphy_dev(priv->hw->wiphy);
  6280. int ret = 0;
  6281. BUG_ON(device == NULL);
  6282. IWL_DEBUG_RF_KILL("Initializing RFKILL.\n");
  6283. priv->rfkill = rfkill_allocate(device, RFKILL_TYPE_WLAN);
  6284. if (!priv->rfkill) {
  6285. IWL_ERR(priv, "Unable to allocate rfkill device.\n");
  6286. ret = -ENOMEM;
  6287. goto error;
  6288. }
  6289. priv->rfkill->name = priv->cfg->name;
  6290. priv->rfkill->data = priv;
  6291. priv->rfkill->state = RFKILL_STATE_UNBLOCKED;
  6292. priv->rfkill->toggle_radio = iwl3945_rfkill_soft_rf_kill;
  6293. priv->rfkill->user_claim_unsupported = 1;
  6294. priv->rfkill->dev.class->suspend = NULL;
  6295. priv->rfkill->dev.class->resume = NULL;
  6296. ret = rfkill_register(priv->rfkill);
  6297. if (ret) {
  6298. IWL_ERR(priv, "Unable to register rfkill: %d\n", ret);
  6299. goto freed_rfkill;
  6300. }
  6301. IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
  6302. return ret;
  6303. freed_rfkill:
  6304. if (priv->rfkill != NULL)
  6305. rfkill_free(priv->rfkill);
  6306. priv->rfkill = NULL;
  6307. error:
  6308. IWL_DEBUG_RF_KILL("RFKILL initialization complete.\n");
  6309. return ret;
  6310. }
  6311. void iwl3945_rfkill_unregister(struct iwl_priv *priv)
  6312. {
  6313. if (priv->rfkill)
  6314. rfkill_unregister(priv->rfkill);
  6315. priv->rfkill = NULL;
  6316. }
  6317. /* set rf-kill to the right state. */
  6318. void iwl3945_rfkill_set_hw_state(struct iwl_priv *priv)
  6319. {
  6320. if (!priv->rfkill)
  6321. return;
  6322. if (iwl_is_rfkill_hw(priv)) {
  6323. rfkill_force_state(priv->rfkill, RFKILL_STATE_HARD_BLOCKED);
  6324. return;
  6325. }
  6326. if (!iwl_is_rfkill_sw(priv))
  6327. rfkill_force_state(priv->rfkill, RFKILL_STATE_UNBLOCKED);
  6328. else
  6329. rfkill_force_state(priv->rfkill, RFKILL_STATE_SOFT_BLOCKED);
  6330. }
  6331. #endif
  6332. /*****************************************************************************
  6333. *
  6334. * driver and module entry point
  6335. *
  6336. *****************************************************************************/
  6337. static struct pci_driver iwl3945_driver = {
  6338. .name = DRV_NAME,
  6339. .id_table = iwl3945_hw_card_ids,
  6340. .probe = iwl3945_pci_probe,
  6341. .remove = __devexit_p(iwl3945_pci_remove),
  6342. #ifdef CONFIG_PM
  6343. .suspend = iwl3945_pci_suspend,
  6344. .resume = iwl3945_pci_resume,
  6345. #endif
  6346. };
  6347. static int __init iwl3945_init(void)
  6348. {
  6349. int ret;
  6350. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  6351. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  6352. ret = iwl3945_rate_control_register();
  6353. if (ret) {
  6354. printk(KERN_ERR DRV_NAME
  6355. "Unable to register rate control algorithm: %d\n", ret);
  6356. return ret;
  6357. }
  6358. ret = pci_register_driver(&iwl3945_driver);
  6359. if (ret) {
  6360. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  6361. goto error_register;
  6362. }
  6363. return ret;
  6364. error_register:
  6365. iwl3945_rate_control_unregister();
  6366. return ret;
  6367. }
  6368. static void __exit iwl3945_exit(void)
  6369. {
  6370. pci_unregister_driver(&iwl3945_driver);
  6371. iwl3945_rate_control_unregister();
  6372. }
  6373. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  6374. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  6375. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  6376. module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
  6377. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  6378. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  6379. MODULE_PARM_DESC(swcrypto,
  6380. "using software crypto (default 1 [software])\n");
  6381. module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
  6382. MODULE_PARM_DESC(debug, "debug output mask");
  6383. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  6384. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  6385. module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
  6386. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  6387. module_exit(iwl3945_exit);
  6388. module_init(iwl3945_init);