init.c 43 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818
  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/moduleparam.h>
  17. #include <linux/errno.h>
  18. #include <linux/of.h>
  19. #include <linux/mmc/sdio_func.h>
  20. #include "core.h"
  21. #include "cfg80211.h"
  22. #include "target.h"
  23. #include "debug.h"
  24. #include "hif-ops.h"
  25. unsigned int debug_mask;
  26. static unsigned int testmode;
  27. static bool suspend_cutpower;
  28. static unsigned int uart_debug;
  29. module_param(debug_mask, uint, 0644);
  30. module_param(testmode, uint, 0644);
  31. module_param(suspend_cutpower, bool, 0444);
  32. module_param(uart_debug, uint, 0644);
  33. static const struct ath6kl_hw hw_list[] = {
  34. {
  35. .id = AR6003_HW_2_0_VERSION,
  36. .name = "ar6003 hw 2.0",
  37. .dataset_patch_addr = 0x57e884,
  38. .app_load_addr = 0x543180,
  39. .board_ext_data_addr = 0x57e500,
  40. .reserved_ram_size = 6912,
  41. .refclk_hz = 26000000,
  42. .uarttx_pin = 8,
  43. /* hw2.0 needs override address hardcoded */
  44. .app_start_override_addr = 0x944C00,
  45. .fw = {
  46. .dir = AR6003_HW_2_0_FW_DIR,
  47. .otp = AR6003_HW_2_0_OTP_FILE,
  48. .fw = AR6003_HW_2_0_FIRMWARE_FILE,
  49. .tcmd = AR6003_HW_2_0_TCMD_FIRMWARE_FILE,
  50. .patch = AR6003_HW_2_0_PATCH_FILE,
  51. },
  52. .fw_board = AR6003_HW_2_0_BOARD_DATA_FILE,
  53. .fw_default_board = AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE,
  54. },
  55. {
  56. .id = AR6003_HW_2_1_1_VERSION,
  57. .name = "ar6003 hw 2.1.1",
  58. .dataset_patch_addr = 0x57ff74,
  59. .app_load_addr = 0x1234,
  60. .board_ext_data_addr = 0x542330,
  61. .reserved_ram_size = 512,
  62. .refclk_hz = 26000000,
  63. .uarttx_pin = 8,
  64. .fw = {
  65. .dir = AR6003_HW_2_1_1_FW_DIR,
  66. .otp = AR6003_HW_2_1_1_OTP_FILE,
  67. .fw = AR6003_HW_2_1_1_FIRMWARE_FILE,
  68. .tcmd = AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE,
  69. .patch = AR6003_HW_2_1_1_PATCH_FILE,
  70. },
  71. .fw_board = AR6003_HW_2_1_1_BOARD_DATA_FILE,
  72. .fw_default_board = AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE,
  73. },
  74. {
  75. .id = AR6004_HW_1_0_VERSION,
  76. .name = "ar6004 hw 1.0",
  77. .dataset_patch_addr = 0x57e884,
  78. .app_load_addr = 0x1234,
  79. .board_ext_data_addr = 0x437000,
  80. .reserved_ram_size = 19456,
  81. .board_addr = 0x433900,
  82. .refclk_hz = 26000000,
  83. .uarttx_pin = 11,
  84. .fw = {
  85. .dir = AR6004_HW_1_0_FW_DIR,
  86. .fw = AR6004_HW_1_0_FIRMWARE_FILE,
  87. },
  88. .fw_board = AR6004_HW_1_0_BOARD_DATA_FILE,
  89. .fw_default_board = AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE,
  90. },
  91. {
  92. .id = AR6004_HW_1_1_VERSION,
  93. .name = "ar6004 hw 1.1",
  94. .dataset_patch_addr = 0x57e884,
  95. .app_load_addr = 0x1234,
  96. .board_ext_data_addr = 0x437000,
  97. .reserved_ram_size = 11264,
  98. .board_addr = 0x43d400,
  99. .refclk_hz = 40000000,
  100. .uarttx_pin = 11,
  101. .fw = {
  102. .dir = AR6004_HW_1_1_FW_DIR,
  103. .fw = AR6004_HW_1_1_FIRMWARE_FILE,
  104. },
  105. .fw_board = AR6004_HW_1_1_BOARD_DATA_FILE,
  106. .fw_default_board = AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE,
  107. },
  108. };
  109. /*
  110. * Include definitions here that can be used to tune the WLAN module
  111. * behavior. Different customers can tune the behavior as per their needs,
  112. * here.
  113. */
  114. /*
  115. * This configuration item enable/disable keepalive support.
  116. * Keepalive support: In the absence of any data traffic to AP, null
  117. * frames will be sent to the AP at periodic interval, to keep the association
  118. * active. This configuration item defines the periodic interval.
  119. * Use value of zero to disable keepalive support
  120. * Default: 60 seconds
  121. */
  122. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  123. /*
  124. * This configuration item sets the value of disconnect timeout
  125. * Firmware delays sending the disconnec event to the host for this
  126. * timeout after is gets disconnected from the current AP.
  127. * If the firmware successly roams within the disconnect timeout
  128. * it sends a new connect event
  129. */
  130. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  131. #define ATH6KL_DATA_OFFSET 64
  132. struct sk_buff *ath6kl_buf_alloc(int size)
  133. {
  134. struct sk_buff *skb;
  135. u16 reserved;
  136. /* Add chacheline space at front and back of buffer */
  137. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  138. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  139. skb = dev_alloc_skb(size + reserved);
  140. if (skb)
  141. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  142. return skb;
  143. }
  144. void ath6kl_init_profile_info(struct ath6kl_vif *vif)
  145. {
  146. vif->ssid_len = 0;
  147. memset(vif->ssid, 0, sizeof(vif->ssid));
  148. vif->dot11_auth_mode = OPEN_AUTH;
  149. vif->auth_mode = NONE_AUTH;
  150. vif->prwise_crypto = NONE_CRYPT;
  151. vif->prwise_crypto_len = 0;
  152. vif->grp_crypto = NONE_CRYPT;
  153. vif->grp_crypto_len = 0;
  154. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  155. memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
  156. memset(vif->bssid, 0, sizeof(vif->bssid));
  157. vif->bss_ch = 0;
  158. }
  159. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  160. {
  161. u32 address, data;
  162. struct host_app_area host_app_area;
  163. /* Fetch the address of the host_app_area_s
  164. * instance in the host interest area */
  165. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  166. address = TARG_VTOP(ar->target_type, address);
  167. if (ath6kl_diag_read32(ar, address, &data))
  168. return -EIO;
  169. address = TARG_VTOP(ar->target_type, data);
  170. host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
  171. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  172. sizeof(struct host_app_area)))
  173. return -EIO;
  174. return 0;
  175. }
  176. static inline void set_ac2_ep_map(struct ath6kl *ar,
  177. u8 ac,
  178. enum htc_endpoint_id ep)
  179. {
  180. ar->ac2ep_map[ac] = ep;
  181. ar->ep2ac_map[ep] = ac;
  182. }
  183. /* connect to a service */
  184. static int ath6kl_connectservice(struct ath6kl *ar,
  185. struct htc_service_connect_req *con_req,
  186. char *desc)
  187. {
  188. int status;
  189. struct htc_service_connect_resp response;
  190. memset(&response, 0, sizeof(response));
  191. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  192. if (status) {
  193. ath6kl_err("failed to connect to %s service status:%d\n",
  194. desc, status);
  195. return status;
  196. }
  197. switch (con_req->svc_id) {
  198. case WMI_CONTROL_SVC:
  199. if (test_bit(WMI_ENABLED, &ar->flag))
  200. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  201. ar->ctrl_ep = response.endpoint;
  202. break;
  203. case WMI_DATA_BE_SVC:
  204. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  205. break;
  206. case WMI_DATA_BK_SVC:
  207. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  208. break;
  209. case WMI_DATA_VI_SVC:
  210. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  211. break;
  212. case WMI_DATA_VO_SVC:
  213. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  214. break;
  215. default:
  216. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  217. return -EINVAL;
  218. }
  219. return 0;
  220. }
  221. static int ath6kl_init_service_ep(struct ath6kl *ar)
  222. {
  223. struct htc_service_connect_req connect;
  224. memset(&connect, 0, sizeof(connect));
  225. /* these fields are the same for all service endpoints */
  226. connect.ep_cb.rx = ath6kl_rx;
  227. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  228. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  229. /*
  230. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  231. * gets called.
  232. */
  233. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  234. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  235. if (!connect.ep_cb.rx_refill_thresh)
  236. connect.ep_cb.rx_refill_thresh++;
  237. /* connect to control service */
  238. connect.svc_id = WMI_CONTROL_SVC;
  239. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  240. return -EIO;
  241. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  242. /*
  243. * Limit the HTC message size on the send path, although e can
  244. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  245. * (802.3) frames on the send path.
  246. */
  247. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  248. /*
  249. * To reduce the amount of committed memory for larger A_MSDU
  250. * frames, use the recv-alloc threshold mechanism for larger
  251. * packets.
  252. */
  253. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  254. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  255. /*
  256. * For the remaining data services set the connection flag to
  257. * reduce dribbling, if configured to do so.
  258. */
  259. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  260. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  261. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  262. connect.svc_id = WMI_DATA_BE_SVC;
  263. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  264. return -EIO;
  265. /* connect to back-ground map this to WMI LOW_PRI */
  266. connect.svc_id = WMI_DATA_BK_SVC;
  267. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  268. return -EIO;
  269. /* connect to Video service, map this to to HI PRI */
  270. connect.svc_id = WMI_DATA_VI_SVC;
  271. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  272. return -EIO;
  273. /*
  274. * Connect to VO service, this is currently not mapped to a WMI
  275. * priority stream due to historical reasons. WMI originally
  276. * defined 3 priorities over 3 mailboxes We can change this when
  277. * WMI is reworked so that priorities are not dependent on
  278. * mailboxes.
  279. */
  280. connect.svc_id = WMI_DATA_VO_SVC;
  281. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  282. return -EIO;
  283. return 0;
  284. }
  285. void ath6kl_init_control_info(struct ath6kl_vif *vif)
  286. {
  287. ath6kl_init_profile_info(vif);
  288. vif->def_txkey_index = 0;
  289. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  290. vif->ch_hint = 0;
  291. }
  292. /*
  293. * Set HTC/Mbox operational parameters, this can only be called when the
  294. * target is in the BMI phase.
  295. */
  296. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  297. u8 htc_ctrl_buf)
  298. {
  299. int status;
  300. u32 blk_size;
  301. blk_size = ar->mbox_info.block_size;
  302. if (htc_ctrl_buf)
  303. blk_size |= ((u32)htc_ctrl_buf) << 16;
  304. /* set the host interest area for the block size */
  305. status = ath6kl_bmi_write(ar,
  306. ath6kl_get_hi_item_addr(ar,
  307. HI_ITEM(hi_mbox_io_block_sz)),
  308. (u8 *)&blk_size,
  309. 4);
  310. if (status) {
  311. ath6kl_err("bmi_write_memory for IO block size failed\n");
  312. goto out;
  313. }
  314. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  315. blk_size,
  316. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  317. if (mbox_isr_yield_val) {
  318. /* set the host interest area for the mbox ISR yield limit */
  319. status = ath6kl_bmi_write(ar,
  320. ath6kl_get_hi_item_addr(ar,
  321. HI_ITEM(hi_mbox_isr_yield_limit)),
  322. (u8 *)&mbox_isr_yield_val,
  323. 4);
  324. if (status) {
  325. ath6kl_err("bmi_write_memory for yield limit failed\n");
  326. goto out;
  327. }
  328. }
  329. out:
  330. return status;
  331. }
  332. static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
  333. {
  334. int status = 0;
  335. int ret;
  336. /*
  337. * Configure the device for rx dot11 header rules. "0,0" are the
  338. * default values. Required if checksum offload is needed. Set
  339. * RxMetaVersion to 2.
  340. */
  341. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
  342. ar->rx_meta_ver, 0, 0)) {
  343. ath6kl_err("unable to set the rx frame format\n");
  344. status = -EIO;
  345. }
  346. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  347. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
  348. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  349. ath6kl_err("unable to set power save fail event policy\n");
  350. status = -EIO;
  351. }
  352. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  353. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
  354. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  355. ath6kl_err("unable to set barker preamble policy\n");
  356. status = -EIO;
  357. }
  358. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
  359. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  360. ath6kl_err("unable to set keep alive interval\n");
  361. status = -EIO;
  362. }
  363. if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
  364. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  365. ath6kl_err("unable to set disconnect timeout\n");
  366. status = -EIO;
  367. }
  368. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  369. if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
  370. ath6kl_err("unable to set txop bursting\n");
  371. status = -EIO;
  372. }
  373. if (ar->p2p && (ar->vif_max == 1 || idx)) {
  374. ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
  375. P2P_FLAG_CAPABILITIES_REQ |
  376. P2P_FLAG_MACADDR_REQ |
  377. P2P_FLAG_HMODEL_REQ);
  378. if (ret) {
  379. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  380. "capabilities (%d) - assuming P2P not "
  381. "supported\n", ret);
  382. ar->p2p = 0;
  383. }
  384. }
  385. if (ar->p2p && (ar->vif_max == 1 || idx)) {
  386. /* Enable Probe Request reporting for P2P */
  387. ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
  388. if (ret) {
  389. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
  390. "Request reporting (%d)\n", ret);
  391. }
  392. }
  393. return status;
  394. }
  395. int ath6kl_configure_target(struct ath6kl *ar)
  396. {
  397. u32 param, ram_reserved_size;
  398. u8 fw_iftype, fw_mode = 0, fw_submode = 0;
  399. int i, status;
  400. param = uart_debug;
  401. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  402. HI_ITEM(hi_serial_enable)), (u8 *)&param, 4)) {
  403. ath6kl_err("bmi_write_memory for uart debug failed\n");
  404. return -EIO;
  405. }
  406. /*
  407. * Note: Even though the firmware interface type is
  408. * chosen as BSS_STA for all three interfaces, can
  409. * be configured to IBSS/AP as long as the fw submode
  410. * remains normal mode (0 - AP, STA and IBSS). But
  411. * due to an target assert in firmware only one interface is
  412. * configured for now.
  413. */
  414. fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
  415. for (i = 0; i < ar->vif_max; i++)
  416. fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
  417. /*
  418. * By default, submodes :
  419. * vif[0] - AP/STA/IBSS
  420. * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
  421. * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
  422. */
  423. for (i = 0; i < ar->max_norm_iface; i++)
  424. fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
  425. (i * HI_OPTION_FW_SUBMODE_BITS);
  426. for (i = ar->max_norm_iface; i < ar->vif_max; i++)
  427. fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
  428. (i * HI_OPTION_FW_SUBMODE_BITS);
  429. if (ar->p2p && ar->vif_max == 1)
  430. fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
  431. param = HTC_PROTOCOL_VERSION;
  432. if (ath6kl_bmi_write(ar,
  433. ath6kl_get_hi_item_addr(ar,
  434. HI_ITEM(hi_app_host_interest)),
  435. (u8 *)&param, 4) != 0) {
  436. ath6kl_err("bmi_write_memory for htc version failed\n");
  437. return -EIO;
  438. }
  439. /* set the firmware mode to STA/IBSS/AP */
  440. param = 0;
  441. if (ath6kl_bmi_read(ar,
  442. ath6kl_get_hi_item_addr(ar,
  443. HI_ITEM(hi_option_flag)),
  444. (u8 *)&param, 4) != 0) {
  445. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  446. return -EIO;
  447. }
  448. param |= (ar->vif_max << HI_OPTION_NUM_DEV_SHIFT);
  449. param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
  450. param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
  451. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  452. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  453. if (ath6kl_bmi_write(ar,
  454. ath6kl_get_hi_item_addr(ar,
  455. HI_ITEM(hi_option_flag)),
  456. (u8 *)&param,
  457. 4) != 0) {
  458. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  459. return -EIO;
  460. }
  461. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  462. /*
  463. * Hardcode the address use for the extended board data
  464. * Ideally this should be pre-allocate by the OS at boot time
  465. * But since it is a new feature and board data is loaded
  466. * at init time, we have to workaround this from host.
  467. * It is difficult to patch the firmware boot code,
  468. * but possible in theory.
  469. */
  470. param = ar->hw.board_ext_data_addr;
  471. ram_reserved_size = ar->hw.reserved_ram_size;
  472. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  473. HI_ITEM(hi_board_ext_data)),
  474. (u8 *)&param, 4) != 0) {
  475. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  476. return -EIO;
  477. }
  478. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  479. HI_ITEM(hi_end_ram_reserve_sz)),
  480. (u8 *)&ram_reserved_size, 4) != 0) {
  481. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  482. return -EIO;
  483. }
  484. /* set the block size for the target */
  485. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  486. /* use default number of control buffers */
  487. return -EIO;
  488. /* Configure GPIO AR600x UART */
  489. param = ar->hw.uarttx_pin;
  490. status = ath6kl_bmi_write(ar,
  491. ath6kl_get_hi_item_addr(ar,
  492. HI_ITEM(hi_dbg_uart_txpin)),
  493. (u8 *)&param, 4);
  494. if (status)
  495. return status;
  496. /* Configure target refclk_hz */
  497. param = ar->hw.refclk_hz;
  498. status = ath6kl_bmi_write(ar,
  499. ath6kl_get_hi_item_addr(ar,
  500. HI_ITEM(hi_refclk_hz)),
  501. (u8 *)&param, 4);
  502. if (status)
  503. return status;
  504. return 0;
  505. }
  506. void ath6kl_core_free(struct ath6kl *ar)
  507. {
  508. wiphy_free(ar->wiphy);
  509. }
  510. void ath6kl_core_cleanup(struct ath6kl *ar)
  511. {
  512. ath6kl_hif_power_off(ar);
  513. destroy_workqueue(ar->ath6kl_wq);
  514. if (ar->htc_target)
  515. ath6kl_htc_cleanup(ar->htc_target);
  516. ath6kl_cookie_cleanup(ar);
  517. ath6kl_cleanup_amsdu_rxbufs(ar);
  518. ath6kl_bmi_cleanup(ar);
  519. ath6kl_debug_cleanup(ar);
  520. kfree(ar->fw_board);
  521. kfree(ar->fw_otp);
  522. kfree(ar->fw);
  523. kfree(ar->fw_patch);
  524. ath6kl_deinit_ieee80211_hw(ar);
  525. }
  526. /* firmware upload */
  527. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  528. u8 **fw, size_t *fw_len)
  529. {
  530. const struct firmware *fw_entry;
  531. int ret;
  532. ret = request_firmware(&fw_entry, filename, ar->dev);
  533. if (ret)
  534. return ret;
  535. *fw_len = fw_entry->size;
  536. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  537. if (*fw == NULL)
  538. ret = -ENOMEM;
  539. release_firmware(fw_entry);
  540. return ret;
  541. }
  542. #ifdef CONFIG_OF
  543. /*
  544. * Check the device tree for a board-id and use it to construct
  545. * the pathname to the firmware file. Used (for now) to find a
  546. * fallback to the "bdata.bin" file--typically a symlink to the
  547. * appropriate board-specific file.
  548. */
  549. static bool check_device_tree(struct ath6kl *ar)
  550. {
  551. static const char *board_id_prop = "atheros,board-id";
  552. struct device_node *node;
  553. char board_filename[64];
  554. const char *board_id;
  555. int ret;
  556. for_each_compatible_node(node, NULL, "atheros,ath6kl") {
  557. board_id = of_get_property(node, board_id_prop, NULL);
  558. if (board_id == NULL) {
  559. ath6kl_warn("No \"%s\" property on %s node.\n",
  560. board_id_prop, node->name);
  561. continue;
  562. }
  563. snprintf(board_filename, sizeof(board_filename),
  564. "%s/bdata.%s.bin", ar->hw.fw.dir, board_id);
  565. ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
  566. &ar->fw_board_len);
  567. if (ret) {
  568. ath6kl_err("Failed to get DT board file %s: %d\n",
  569. board_filename, ret);
  570. continue;
  571. }
  572. return true;
  573. }
  574. return false;
  575. }
  576. #else
  577. static bool check_device_tree(struct ath6kl *ar)
  578. {
  579. return false;
  580. }
  581. #endif /* CONFIG_OF */
  582. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  583. {
  584. const char *filename;
  585. int ret;
  586. if (ar->fw_board != NULL)
  587. return 0;
  588. if (WARN_ON(ar->hw.fw_board == NULL))
  589. return -EINVAL;
  590. filename = ar->hw.fw_board;
  591. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  592. &ar->fw_board_len);
  593. if (ret == 0) {
  594. /* managed to get proper board file */
  595. return 0;
  596. }
  597. if (check_device_tree(ar)) {
  598. /* got board file from device tree */
  599. return 0;
  600. }
  601. /* there was no proper board file, try to use default instead */
  602. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  603. filename, ret);
  604. filename = ar->hw.fw_default_board;
  605. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  606. &ar->fw_board_len);
  607. if (ret) {
  608. ath6kl_err("Failed to get default board file %s: %d\n",
  609. filename, ret);
  610. return ret;
  611. }
  612. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  613. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  614. return 0;
  615. }
  616. static int ath6kl_fetch_otp_file(struct ath6kl *ar)
  617. {
  618. char filename[100];
  619. int ret;
  620. if (ar->fw_otp != NULL)
  621. return 0;
  622. if (ar->hw.fw.otp == NULL) {
  623. ath6kl_dbg(ATH6KL_DBG_BOOT,
  624. "no OTP file configured for this hw\n");
  625. return 0;
  626. }
  627. snprintf(filename, sizeof(filename), "%s/%s",
  628. ar->hw.fw.dir, ar->hw.fw.otp);
  629. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  630. &ar->fw_otp_len);
  631. if (ret) {
  632. ath6kl_err("Failed to get OTP file %s: %d\n",
  633. filename, ret);
  634. return ret;
  635. }
  636. return 0;
  637. }
  638. static int ath6kl_fetch_fw_file(struct ath6kl *ar)
  639. {
  640. char filename[100];
  641. int ret;
  642. if (ar->fw != NULL)
  643. return 0;
  644. if (testmode) {
  645. if (ar->hw.fw.tcmd == NULL) {
  646. ath6kl_warn("testmode not supported\n");
  647. return -EOPNOTSUPP;
  648. }
  649. snprintf(filename, sizeof(filename), "%s/%s",
  650. ar->hw.fw.dir, ar->hw.fw.tcmd);
  651. set_bit(TESTMODE, &ar->flag);
  652. goto get_fw;
  653. }
  654. /* FIXME: remove WARN_ON() as we won't support FW API 1 for long */
  655. if (WARN_ON(ar->hw.fw.fw == NULL))
  656. return -EINVAL;
  657. snprintf(filename, sizeof(filename), "%s/%s",
  658. ar->hw.fw.dir, ar->hw.fw.fw);
  659. get_fw:
  660. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  661. if (ret) {
  662. ath6kl_err("Failed to get firmware file %s: %d\n",
  663. filename, ret);
  664. return ret;
  665. }
  666. return 0;
  667. }
  668. static int ath6kl_fetch_patch_file(struct ath6kl *ar)
  669. {
  670. char filename[100];
  671. int ret;
  672. if (ar->fw_patch != NULL)
  673. return 0;
  674. if (ar->hw.fw.patch == NULL)
  675. return 0;
  676. snprintf(filename, sizeof(filename), "%s/%s",
  677. ar->hw.fw.dir, ar->hw.fw.patch);
  678. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  679. &ar->fw_patch_len);
  680. if (ret) {
  681. ath6kl_err("Failed to get patch file %s: %d\n",
  682. filename, ret);
  683. return ret;
  684. }
  685. return 0;
  686. }
  687. static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
  688. {
  689. int ret;
  690. ret = ath6kl_fetch_otp_file(ar);
  691. if (ret)
  692. return ret;
  693. ret = ath6kl_fetch_fw_file(ar);
  694. if (ret)
  695. return ret;
  696. ret = ath6kl_fetch_patch_file(ar);
  697. if (ret)
  698. return ret;
  699. return 0;
  700. }
  701. static int ath6kl_fetch_fw_apin(struct ath6kl *ar, const char *name)
  702. {
  703. size_t magic_len, len, ie_len;
  704. const struct firmware *fw;
  705. struct ath6kl_fw_ie *hdr;
  706. char filename[100];
  707. const u8 *data;
  708. int ret, ie_id, i, index, bit;
  709. __le32 *val;
  710. snprintf(filename, sizeof(filename), "%s/%s", ar->hw.fw.dir, name);
  711. ret = request_firmware(&fw, filename, ar->dev);
  712. if (ret)
  713. return ret;
  714. data = fw->data;
  715. len = fw->size;
  716. /* magic also includes the null byte, check that as well */
  717. magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
  718. if (len < magic_len) {
  719. ret = -EINVAL;
  720. goto out;
  721. }
  722. if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
  723. ret = -EINVAL;
  724. goto out;
  725. }
  726. len -= magic_len;
  727. data += magic_len;
  728. /* loop elements */
  729. while (len > sizeof(struct ath6kl_fw_ie)) {
  730. /* hdr is unaligned! */
  731. hdr = (struct ath6kl_fw_ie *) data;
  732. ie_id = le32_to_cpup(&hdr->id);
  733. ie_len = le32_to_cpup(&hdr->len);
  734. len -= sizeof(*hdr);
  735. data += sizeof(*hdr);
  736. if (len < ie_len) {
  737. ret = -EINVAL;
  738. goto out;
  739. }
  740. switch (ie_id) {
  741. case ATH6KL_FW_IE_OTP_IMAGE:
  742. ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
  743. ie_len);
  744. ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
  745. if (ar->fw_otp == NULL) {
  746. ret = -ENOMEM;
  747. goto out;
  748. }
  749. ar->fw_otp_len = ie_len;
  750. break;
  751. case ATH6KL_FW_IE_FW_IMAGE:
  752. ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
  753. ie_len);
  754. ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
  755. if (ar->fw == NULL) {
  756. ret = -ENOMEM;
  757. goto out;
  758. }
  759. ar->fw_len = ie_len;
  760. break;
  761. case ATH6KL_FW_IE_PATCH_IMAGE:
  762. ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
  763. ie_len);
  764. ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
  765. if (ar->fw_patch == NULL) {
  766. ret = -ENOMEM;
  767. goto out;
  768. }
  769. ar->fw_patch_len = ie_len;
  770. break;
  771. case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
  772. val = (__le32 *) data;
  773. ar->hw.reserved_ram_size = le32_to_cpup(val);
  774. ath6kl_dbg(ATH6KL_DBG_BOOT,
  775. "found reserved ram size ie 0x%d\n",
  776. ar->hw.reserved_ram_size);
  777. break;
  778. case ATH6KL_FW_IE_CAPABILITIES:
  779. if (ie_len < DIV_ROUND_UP(ATH6KL_FW_CAPABILITY_MAX, 8))
  780. break;
  781. ath6kl_dbg(ATH6KL_DBG_BOOT,
  782. "found firmware capabilities ie (%zd B)\n",
  783. ie_len);
  784. for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
  785. index = i / 8;
  786. bit = i % 8;
  787. if (data[index] & (1 << bit))
  788. __set_bit(i, ar->fw_capabilities);
  789. }
  790. ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
  791. ar->fw_capabilities,
  792. sizeof(ar->fw_capabilities));
  793. break;
  794. case ATH6KL_FW_IE_PATCH_ADDR:
  795. if (ie_len != sizeof(*val))
  796. break;
  797. val = (__le32 *) data;
  798. ar->hw.dataset_patch_addr = le32_to_cpup(val);
  799. ath6kl_dbg(ATH6KL_DBG_BOOT,
  800. "found patch address ie 0x%x\n",
  801. ar->hw.dataset_patch_addr);
  802. break;
  803. case ATH6KL_FW_IE_BOARD_ADDR:
  804. if (ie_len != sizeof(*val))
  805. break;
  806. val = (__le32 *) data;
  807. ar->hw.board_addr = le32_to_cpup(val);
  808. ath6kl_dbg(ATH6KL_DBG_BOOT,
  809. "found board address ie 0x%x\n",
  810. ar->hw.board_addr);
  811. break;
  812. case ATH6KL_FW_IE_VIF_MAX:
  813. if (ie_len != sizeof(*val))
  814. break;
  815. val = (__le32 *) data;
  816. ar->vif_max = min_t(unsigned int, le32_to_cpup(val),
  817. ATH6KL_VIF_MAX);
  818. if (ar->vif_max > 1 && !ar->p2p)
  819. ar->max_norm_iface = 2;
  820. ath6kl_dbg(ATH6KL_DBG_BOOT,
  821. "found vif max ie %d\n", ar->vif_max);
  822. break;
  823. default:
  824. ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
  825. le32_to_cpup(&hdr->id));
  826. break;
  827. }
  828. len -= ie_len;
  829. data += ie_len;
  830. };
  831. ret = 0;
  832. out:
  833. release_firmware(fw);
  834. return ret;
  835. }
  836. static int ath6kl_fetch_firmwares(struct ath6kl *ar)
  837. {
  838. int ret;
  839. ret = ath6kl_fetch_board_file(ar);
  840. if (ret)
  841. return ret;
  842. ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API3_FILE);
  843. if (ret == 0) {
  844. ar->fw_api = 3;
  845. goto out;
  846. }
  847. ret = ath6kl_fetch_fw_apin(ar, ATH6KL_FW_API2_FILE);
  848. if (ret == 0) {
  849. ar->fw_api = 2;
  850. goto out;
  851. }
  852. ret = ath6kl_fetch_fw_api1(ar);
  853. if (ret)
  854. return ret;
  855. ar->fw_api = 1;
  856. out:
  857. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api %d\n", ar->fw_api);
  858. return 0;
  859. }
  860. static int ath6kl_upload_board_file(struct ath6kl *ar)
  861. {
  862. u32 board_address, board_ext_address, param;
  863. u32 board_data_size, board_ext_data_size;
  864. int ret;
  865. if (WARN_ON(ar->fw_board == NULL))
  866. return -ENOENT;
  867. /*
  868. * Determine where in Target RAM to write Board Data.
  869. * For AR6004, host determine Target RAM address for
  870. * writing board data.
  871. */
  872. if (ar->hw.board_addr != 0) {
  873. board_address = ar->hw.board_addr;
  874. ath6kl_bmi_write(ar,
  875. ath6kl_get_hi_item_addr(ar,
  876. HI_ITEM(hi_board_data)),
  877. (u8 *) &board_address, 4);
  878. } else {
  879. ath6kl_bmi_read(ar,
  880. ath6kl_get_hi_item_addr(ar,
  881. HI_ITEM(hi_board_data)),
  882. (u8 *) &board_address, 4);
  883. }
  884. /* determine where in target ram to write extended board data */
  885. ath6kl_bmi_read(ar,
  886. ath6kl_get_hi_item_addr(ar,
  887. HI_ITEM(hi_board_ext_data)),
  888. (u8 *) &board_ext_address, 4);
  889. if (ar->target_type == TARGET_TYPE_AR6003 &&
  890. board_ext_address == 0) {
  891. ath6kl_err("Failed to get board file target address.\n");
  892. return -EINVAL;
  893. }
  894. switch (ar->target_type) {
  895. case TARGET_TYPE_AR6003:
  896. board_data_size = AR6003_BOARD_DATA_SZ;
  897. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  898. break;
  899. case TARGET_TYPE_AR6004:
  900. board_data_size = AR6004_BOARD_DATA_SZ;
  901. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  902. break;
  903. default:
  904. WARN_ON(1);
  905. return -EINVAL;
  906. break;
  907. }
  908. if (board_ext_address &&
  909. ar->fw_board_len == (board_data_size + board_ext_data_size)) {
  910. /* write extended board data */
  911. ath6kl_dbg(ATH6KL_DBG_BOOT,
  912. "writing extended board data to 0x%x (%d B)\n",
  913. board_ext_address, board_ext_data_size);
  914. ret = ath6kl_bmi_write(ar, board_ext_address,
  915. ar->fw_board + board_data_size,
  916. board_ext_data_size);
  917. if (ret) {
  918. ath6kl_err("Failed to write extended board data: %d\n",
  919. ret);
  920. return ret;
  921. }
  922. /* record that extended board data is initialized */
  923. param = (board_ext_data_size << 16) | 1;
  924. ath6kl_bmi_write(ar,
  925. ath6kl_get_hi_item_addr(ar,
  926. HI_ITEM(hi_board_ext_data_config)),
  927. (unsigned char *) &param, 4);
  928. }
  929. if (ar->fw_board_len < board_data_size) {
  930. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  931. ret = -EINVAL;
  932. return ret;
  933. }
  934. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
  935. board_address, board_data_size);
  936. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  937. board_data_size);
  938. if (ret) {
  939. ath6kl_err("Board file bmi write failed: %d\n", ret);
  940. return ret;
  941. }
  942. /* record the fact that Board Data IS initialized */
  943. param = 1;
  944. ath6kl_bmi_write(ar,
  945. ath6kl_get_hi_item_addr(ar,
  946. HI_ITEM(hi_board_data_initialized)),
  947. (u8 *)&param, 4);
  948. return ret;
  949. }
  950. static int ath6kl_upload_otp(struct ath6kl *ar)
  951. {
  952. u32 address, param;
  953. bool from_hw = false;
  954. int ret;
  955. if (ar->fw_otp == NULL)
  956. return 0;
  957. address = ar->hw.app_load_addr;
  958. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
  959. ar->fw_otp_len);
  960. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  961. ar->fw_otp_len);
  962. if (ret) {
  963. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  964. return ret;
  965. }
  966. /* read firmware start address */
  967. ret = ath6kl_bmi_read(ar,
  968. ath6kl_get_hi_item_addr(ar,
  969. HI_ITEM(hi_app_start)),
  970. (u8 *) &address, sizeof(address));
  971. if (ret) {
  972. ath6kl_err("Failed to read hi_app_start: %d\n", ret);
  973. return ret;
  974. }
  975. if (ar->hw.app_start_override_addr == 0) {
  976. ar->hw.app_start_override_addr = address;
  977. from_hw = true;
  978. }
  979. ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
  980. from_hw ? " (from hw)" : "",
  981. ar->hw.app_start_override_addr);
  982. /* execute the OTP code */
  983. ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
  984. ar->hw.app_start_override_addr);
  985. param = 0;
  986. ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
  987. return ret;
  988. }
  989. static int ath6kl_upload_firmware(struct ath6kl *ar)
  990. {
  991. u32 address;
  992. int ret;
  993. if (WARN_ON(ar->fw == NULL))
  994. return 0;
  995. address = ar->hw.app_load_addr;
  996. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
  997. address, ar->fw_len);
  998. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  999. if (ret) {
  1000. ath6kl_err("Failed to write firmware: %d\n", ret);
  1001. return ret;
  1002. }
  1003. /*
  1004. * Set starting address for firmware
  1005. * Don't need to setup app_start override addr on AR6004
  1006. */
  1007. if (ar->target_type != TARGET_TYPE_AR6004) {
  1008. address = ar->hw.app_start_override_addr;
  1009. ath6kl_bmi_set_app_start(ar, address);
  1010. }
  1011. return ret;
  1012. }
  1013. static int ath6kl_upload_patch(struct ath6kl *ar)
  1014. {
  1015. u32 address, param;
  1016. int ret;
  1017. if (ar->fw_patch == NULL)
  1018. return 0;
  1019. address = ar->hw.dataset_patch_addr;
  1020. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
  1021. address, ar->fw_patch_len);
  1022. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  1023. if (ret) {
  1024. ath6kl_err("Failed to write patch file: %d\n", ret);
  1025. return ret;
  1026. }
  1027. param = address;
  1028. ath6kl_bmi_write(ar,
  1029. ath6kl_get_hi_item_addr(ar,
  1030. HI_ITEM(hi_dset_list_head)),
  1031. (unsigned char *) &param, 4);
  1032. return 0;
  1033. }
  1034. static int ath6kl_init_upload(struct ath6kl *ar)
  1035. {
  1036. u32 param, options, sleep, address;
  1037. int status = 0;
  1038. if (ar->target_type != TARGET_TYPE_AR6003 &&
  1039. ar->target_type != TARGET_TYPE_AR6004)
  1040. return -EINVAL;
  1041. /* temporarily disable system sleep */
  1042. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1043. status = ath6kl_bmi_reg_read(ar, address, &param);
  1044. if (status)
  1045. return status;
  1046. options = param;
  1047. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  1048. status = ath6kl_bmi_reg_write(ar, address, param);
  1049. if (status)
  1050. return status;
  1051. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1052. status = ath6kl_bmi_reg_read(ar, address, &param);
  1053. if (status)
  1054. return status;
  1055. sleep = param;
  1056. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  1057. status = ath6kl_bmi_reg_write(ar, address, param);
  1058. if (status)
  1059. return status;
  1060. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  1061. options, sleep);
  1062. /* program analog PLL register */
  1063. /* no need to control 40/44MHz clock on AR6004 */
  1064. if (ar->target_type != TARGET_TYPE_AR6004) {
  1065. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  1066. 0xF9104001);
  1067. if (status)
  1068. return status;
  1069. /* Run at 80/88MHz by default */
  1070. param = SM(CPU_CLOCK_STANDARD, 1);
  1071. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  1072. status = ath6kl_bmi_reg_write(ar, address, param);
  1073. if (status)
  1074. return status;
  1075. }
  1076. param = 0;
  1077. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  1078. param = SM(LPO_CAL_ENABLE, 1);
  1079. status = ath6kl_bmi_reg_write(ar, address, param);
  1080. if (status)
  1081. return status;
  1082. /* WAR to avoid SDIO CRC err */
  1083. if (ar->version.target_ver == AR6003_HW_2_0_VERSION) {
  1084. ath6kl_err("temporary war to avoid sdio crc error\n");
  1085. param = 0x20;
  1086. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  1087. status = ath6kl_bmi_reg_write(ar, address, param);
  1088. if (status)
  1089. return status;
  1090. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  1091. status = ath6kl_bmi_reg_write(ar, address, param);
  1092. if (status)
  1093. return status;
  1094. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  1095. status = ath6kl_bmi_reg_write(ar, address, param);
  1096. if (status)
  1097. return status;
  1098. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  1099. status = ath6kl_bmi_reg_write(ar, address, param);
  1100. if (status)
  1101. return status;
  1102. }
  1103. /* write EEPROM data to Target RAM */
  1104. status = ath6kl_upload_board_file(ar);
  1105. if (status)
  1106. return status;
  1107. /* transfer One time Programmable data */
  1108. status = ath6kl_upload_otp(ar);
  1109. if (status)
  1110. return status;
  1111. /* Download Target firmware */
  1112. status = ath6kl_upload_firmware(ar);
  1113. if (status)
  1114. return status;
  1115. status = ath6kl_upload_patch(ar);
  1116. if (status)
  1117. return status;
  1118. /* Restore system sleep */
  1119. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1120. status = ath6kl_bmi_reg_write(ar, address, sleep);
  1121. if (status)
  1122. return status;
  1123. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1124. param = options | 0x20;
  1125. status = ath6kl_bmi_reg_write(ar, address, param);
  1126. if (status)
  1127. return status;
  1128. return status;
  1129. }
  1130. static int ath6kl_init_hw_params(struct ath6kl *ar)
  1131. {
  1132. const struct ath6kl_hw *hw;
  1133. int i;
  1134. for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
  1135. hw = &hw_list[i];
  1136. if (hw->id == ar->version.target_ver)
  1137. break;
  1138. }
  1139. if (i == ARRAY_SIZE(hw_list)) {
  1140. ath6kl_err("Unsupported hardware version: 0x%x\n",
  1141. ar->version.target_ver);
  1142. return -EINVAL;
  1143. }
  1144. ar->hw = *hw;
  1145. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1146. "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
  1147. ar->version.target_ver, ar->target_type,
  1148. ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
  1149. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1150. "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
  1151. ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
  1152. ar->hw.reserved_ram_size);
  1153. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1154. "refclk_hz %d uarttx_pin %d",
  1155. ar->hw.refclk_hz, ar->hw.uarttx_pin);
  1156. return 0;
  1157. }
  1158. static const char *ath6kl_init_get_hif_name(enum ath6kl_hif_type type)
  1159. {
  1160. switch (type) {
  1161. case ATH6KL_HIF_TYPE_SDIO:
  1162. return "sdio";
  1163. case ATH6KL_HIF_TYPE_USB:
  1164. return "usb";
  1165. }
  1166. return NULL;
  1167. }
  1168. int ath6kl_init_hw_start(struct ath6kl *ar)
  1169. {
  1170. long timeleft;
  1171. int ret, i;
  1172. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
  1173. ret = ath6kl_hif_power_on(ar);
  1174. if (ret)
  1175. return ret;
  1176. ret = ath6kl_configure_target(ar);
  1177. if (ret)
  1178. goto err_power_off;
  1179. ret = ath6kl_init_upload(ar);
  1180. if (ret)
  1181. goto err_power_off;
  1182. /* Do we need to finish the BMI phase */
  1183. /* FIXME: return error from ath6kl_bmi_done() */
  1184. if (ath6kl_bmi_done(ar)) {
  1185. ret = -EIO;
  1186. goto err_power_off;
  1187. }
  1188. /*
  1189. * The reason we have to wait for the target here is that the
  1190. * driver layer has to init BMI in order to set the host block
  1191. * size.
  1192. */
  1193. if (ath6kl_htc_wait_target(ar->htc_target)) {
  1194. ret = -EIO;
  1195. goto err_power_off;
  1196. }
  1197. if (ath6kl_init_service_ep(ar)) {
  1198. ret = -EIO;
  1199. goto err_cleanup_scatter;
  1200. }
  1201. /* setup credit distribution */
  1202. ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
  1203. /* start HTC */
  1204. ret = ath6kl_htc_start(ar->htc_target);
  1205. if (ret) {
  1206. /* FIXME: call this */
  1207. ath6kl_cookie_cleanup(ar);
  1208. goto err_cleanup_scatter;
  1209. }
  1210. /* Wait for Wmi event to be ready */
  1211. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  1212. test_bit(WMI_READY,
  1213. &ar->flag),
  1214. WMI_TIMEOUT);
  1215. ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
  1216. if (test_and_clear_bit(FIRST_BOOT, &ar->flag)) {
  1217. ath6kl_info("%s %s fw %s api %d%s\n",
  1218. ar->hw.name,
  1219. ath6kl_init_get_hif_name(ar->hif_type),
  1220. ar->wiphy->fw_version,
  1221. ar->fw_api,
  1222. test_bit(TESTMODE, &ar->flag) ? " testmode" : "");
  1223. }
  1224. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1225. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1226. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1227. ret = -EIO;
  1228. goto err_htc_stop;
  1229. }
  1230. if (!timeleft || signal_pending(current)) {
  1231. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1232. ret = -EIO;
  1233. goto err_htc_stop;
  1234. }
  1235. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1236. /* communicate the wmi protocol verision to the target */
  1237. /* FIXME: return error */
  1238. if ((ath6kl_set_host_app_area(ar)) != 0)
  1239. ath6kl_err("unable to set the host app area\n");
  1240. for (i = 0; i < ar->vif_max; i++) {
  1241. ret = ath6kl_target_config_wlan_params(ar, i);
  1242. if (ret)
  1243. goto err_htc_stop;
  1244. }
  1245. ar->state = ATH6KL_STATE_ON;
  1246. return 0;
  1247. err_htc_stop:
  1248. ath6kl_htc_stop(ar->htc_target);
  1249. err_cleanup_scatter:
  1250. ath6kl_hif_cleanup_scatter(ar);
  1251. err_power_off:
  1252. ath6kl_hif_power_off(ar);
  1253. return ret;
  1254. }
  1255. int ath6kl_init_hw_stop(struct ath6kl *ar)
  1256. {
  1257. int ret;
  1258. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
  1259. ath6kl_htc_stop(ar->htc_target);
  1260. ath6kl_hif_stop(ar);
  1261. ath6kl_bmi_reset(ar);
  1262. ret = ath6kl_hif_power_off(ar);
  1263. if (ret)
  1264. ath6kl_warn("failed to power off hif: %d\n", ret);
  1265. ar->state = ATH6KL_STATE_OFF;
  1266. return 0;
  1267. }
  1268. int ath6kl_core_init(struct ath6kl *ar)
  1269. {
  1270. struct ath6kl_bmi_target_info targ_info;
  1271. struct net_device *ndev;
  1272. int ret = 0, i;
  1273. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1274. if (!ar->ath6kl_wq)
  1275. return -ENOMEM;
  1276. ret = ath6kl_bmi_init(ar);
  1277. if (ret)
  1278. goto err_wq;
  1279. /*
  1280. * Turn on power to get hardware (target) version and leave power
  1281. * on delibrately as we will boot the hardware anyway within few
  1282. * seconds.
  1283. */
  1284. ret = ath6kl_hif_power_on(ar);
  1285. if (ret)
  1286. goto err_bmi_cleanup;
  1287. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1288. if (ret)
  1289. goto err_power_off;
  1290. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1291. ar->target_type = le32_to_cpu(targ_info.type);
  1292. ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1293. ret = ath6kl_init_hw_params(ar);
  1294. if (ret)
  1295. goto err_power_off;
  1296. ar->htc_target = ath6kl_htc_create(ar);
  1297. if (!ar->htc_target) {
  1298. ret = -ENOMEM;
  1299. goto err_power_off;
  1300. }
  1301. ret = ath6kl_fetch_firmwares(ar);
  1302. if (ret)
  1303. goto err_htc_cleanup;
  1304. /* FIXME: we should free all firmwares in the error cases below */
  1305. /* Indicate that WMI is enabled (although not ready yet) */
  1306. set_bit(WMI_ENABLED, &ar->flag);
  1307. ar->wmi = ath6kl_wmi_init(ar);
  1308. if (!ar->wmi) {
  1309. ath6kl_err("failed to initialize wmi\n");
  1310. ret = -EIO;
  1311. goto err_htc_cleanup;
  1312. }
  1313. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  1314. ret = ath6kl_register_ieee80211_hw(ar);
  1315. if (ret)
  1316. goto err_node_cleanup;
  1317. ret = ath6kl_debug_init(ar);
  1318. if (ret) {
  1319. wiphy_unregister(ar->wiphy);
  1320. goto err_node_cleanup;
  1321. }
  1322. for (i = 0; i < ar->vif_max; i++)
  1323. ar->avail_idx_map |= BIT(i);
  1324. rtnl_lock();
  1325. /* Add an initial station interface */
  1326. ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
  1327. INFRA_NETWORK);
  1328. rtnl_unlock();
  1329. if (!ndev) {
  1330. ath6kl_err("Failed to instantiate a network device\n");
  1331. ret = -ENOMEM;
  1332. wiphy_unregister(ar->wiphy);
  1333. goto err_debug_init;
  1334. }
  1335. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1336. __func__, ndev->name, ndev, ar);
  1337. /* setup access class priority mappings */
  1338. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  1339. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  1340. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  1341. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  1342. /* give our connected endpoints some buffers */
  1343. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  1344. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  1345. /* allocate some buffers that handle larger AMSDU frames */
  1346. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  1347. ath6kl_cookie_init(ar);
  1348. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1349. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1350. if (suspend_cutpower)
  1351. ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER;
  1352. ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
  1353. WIPHY_FLAG_HAVE_AP_SME |
  1354. WIPHY_FLAG_HAS_REMAIN_ON_CHANNEL |
  1355. WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD;
  1356. if (test_bit(ATH6KL_FW_CAPABILITY_SCHED_SCAN, ar->fw_capabilities))
  1357. ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_SCHED_SCAN;
  1358. ar->wiphy->probe_resp_offload =
  1359. NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS |
  1360. NL80211_PROBE_RESP_OFFLOAD_SUPPORT_WPS2 |
  1361. NL80211_PROBE_RESP_OFFLOAD_SUPPORT_P2P |
  1362. NL80211_PROBE_RESP_OFFLOAD_SUPPORT_80211U;
  1363. set_bit(FIRST_BOOT, &ar->flag);
  1364. ndev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_RXCSUM;
  1365. ret = ath6kl_init_hw_start(ar);
  1366. if (ret) {
  1367. ath6kl_err("Failed to start hardware: %d\n", ret);
  1368. goto err_rxbuf_cleanup;
  1369. }
  1370. /*
  1371. * Set mac address which is received in ready event
  1372. * FIXME: Move to ath6kl_interface_add()
  1373. */
  1374. memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
  1375. return ret;
  1376. err_rxbuf_cleanup:
  1377. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1378. ath6kl_cleanup_amsdu_rxbufs(ar);
  1379. rtnl_lock();
  1380. ath6kl_deinit_if_data(netdev_priv(ndev));
  1381. rtnl_unlock();
  1382. wiphy_unregister(ar->wiphy);
  1383. err_debug_init:
  1384. ath6kl_debug_cleanup(ar);
  1385. err_node_cleanup:
  1386. ath6kl_wmi_shutdown(ar->wmi);
  1387. clear_bit(WMI_ENABLED, &ar->flag);
  1388. ar->wmi = NULL;
  1389. err_htc_cleanup:
  1390. ath6kl_htc_cleanup(ar->htc_target);
  1391. err_power_off:
  1392. ath6kl_hif_power_off(ar);
  1393. err_bmi_cleanup:
  1394. ath6kl_bmi_cleanup(ar);
  1395. err_wq:
  1396. destroy_workqueue(ar->ath6kl_wq);
  1397. return ret;
  1398. }
  1399. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
  1400. {
  1401. static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  1402. bool discon_issued;
  1403. netif_stop_queue(vif->ndev);
  1404. clear_bit(WLAN_ENABLED, &vif->flags);
  1405. if (wmi_ready) {
  1406. discon_issued = test_bit(CONNECTED, &vif->flags) ||
  1407. test_bit(CONNECT_PEND, &vif->flags);
  1408. ath6kl_disconnect(vif);
  1409. del_timer(&vif->disconnect_timer);
  1410. if (discon_issued)
  1411. ath6kl_disconnect_event(vif, DISCONNECT_CMD,
  1412. (vif->nw_type & AP_NETWORK) ?
  1413. bcast_mac : vif->bssid,
  1414. 0, NULL, 0);
  1415. }
  1416. if (vif->scan_req) {
  1417. cfg80211_scan_done(vif->scan_req, true);
  1418. vif->scan_req = NULL;
  1419. }
  1420. }
  1421. void ath6kl_stop_txrx(struct ath6kl *ar)
  1422. {
  1423. struct ath6kl_vif *vif, *tmp_vif;
  1424. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1425. if (down_interruptible(&ar->sem)) {
  1426. ath6kl_err("down_interruptible failed\n");
  1427. return;
  1428. }
  1429. spin_lock_bh(&ar->list_lock);
  1430. list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
  1431. list_del(&vif->list);
  1432. spin_unlock_bh(&ar->list_lock);
  1433. ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
  1434. rtnl_lock();
  1435. ath6kl_deinit_if_data(vif);
  1436. rtnl_unlock();
  1437. spin_lock_bh(&ar->list_lock);
  1438. }
  1439. spin_unlock_bh(&ar->list_lock);
  1440. clear_bit(WMI_READY, &ar->flag);
  1441. /*
  1442. * After wmi_shudown all WMI events will be dropped. We
  1443. * need to cleanup the buffers allocated in AP mode and
  1444. * give disconnect notification to stack, which usually
  1445. * happens in the disconnect_event. Simulate the disconnect
  1446. * event by calling the function directly. Sometimes
  1447. * disconnect_event will be received when the debug logs
  1448. * are collected.
  1449. */
  1450. ath6kl_wmi_shutdown(ar->wmi);
  1451. clear_bit(WMI_ENABLED, &ar->flag);
  1452. if (ar->htc_target) {
  1453. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
  1454. ath6kl_htc_stop(ar->htc_target);
  1455. }
  1456. /*
  1457. * Try to reset the device if we can. The driver may have been
  1458. * configure NOT to reset the target during a debug session.
  1459. */
  1460. ath6kl_dbg(ATH6KL_DBG_TRC,
  1461. "attempting to reset target on instance destroy\n");
  1462. ath6kl_reset_device(ar, ar->target_type, true, true);
  1463. clear_bit(WLAN_ENABLED, &ar->flag);
  1464. }