xhci-hcd.c 54 KB

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  1. /*
  2. * xHCI host controller driver
  3. *
  4. * Copyright (C) 2008 Intel Corp.
  5. *
  6. * Author: Sarah Sharp
  7. * Some code borrowed from the Linux EHCI driver.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  16. * for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software Foundation,
  20. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/irq.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include "xhci.h"
  26. #define DRIVER_AUTHOR "Sarah Sharp"
  27. #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
  28. /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
  29. static int link_quirk;
  30. module_param(link_quirk, int, S_IRUGO | S_IWUSR);
  31. MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
  32. /* TODO: copied from ehci-hcd.c - can this be refactored? */
  33. /*
  34. * handshake - spin reading hc until handshake completes or fails
  35. * @ptr: address of hc register to be read
  36. * @mask: bits to look at in result of read
  37. * @done: value of those bits when handshake succeeds
  38. * @usec: timeout in microseconds
  39. *
  40. * Returns negative errno, or zero on success
  41. *
  42. * Success happens when the "mask" bits have the specified value (hardware
  43. * handshake done). There are two failure modes: "usec" have passed (major
  44. * hardware flakeout), or the register reads as all-ones (hardware removed).
  45. */
  46. static int handshake(struct xhci_hcd *xhci, void __iomem *ptr,
  47. u32 mask, u32 done, int usec)
  48. {
  49. u32 result;
  50. do {
  51. result = xhci_readl(xhci, ptr);
  52. if (result == ~(u32)0) /* card removed */
  53. return -ENODEV;
  54. result &= mask;
  55. if (result == done)
  56. return 0;
  57. udelay(1);
  58. usec--;
  59. } while (usec > 0);
  60. return -ETIMEDOUT;
  61. }
  62. /*
  63. * Disable interrupts and begin the xHCI halting process.
  64. */
  65. void xhci_quiesce(struct xhci_hcd *xhci)
  66. {
  67. u32 halted;
  68. u32 cmd;
  69. u32 mask;
  70. mask = ~(XHCI_IRQS);
  71. halted = xhci_readl(xhci, &xhci->op_regs->status) & STS_HALT;
  72. if (!halted)
  73. mask &= ~CMD_RUN;
  74. cmd = xhci_readl(xhci, &xhci->op_regs->command);
  75. cmd &= mask;
  76. xhci_writel(xhci, cmd, &xhci->op_regs->command);
  77. }
  78. /*
  79. * Force HC into halt state.
  80. *
  81. * Disable any IRQs and clear the run/stop bit.
  82. * HC will complete any current and actively pipelined transactions, and
  83. * should halt within 16 microframes of the run/stop bit being cleared.
  84. * Read HC Halted bit in the status register to see when the HC is finished.
  85. * XXX: shouldn't we set HC_STATE_HALT here somewhere?
  86. */
  87. int xhci_halt(struct xhci_hcd *xhci)
  88. {
  89. xhci_dbg(xhci, "// Halt the HC\n");
  90. xhci_quiesce(xhci);
  91. return handshake(xhci, &xhci->op_regs->status,
  92. STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
  93. }
  94. /*
  95. * Reset a halted HC, and set the internal HC state to HC_STATE_HALT.
  96. *
  97. * This resets pipelines, timers, counters, state machines, etc.
  98. * Transactions will be terminated immediately, and operational registers
  99. * will be set to their defaults.
  100. */
  101. int xhci_reset(struct xhci_hcd *xhci)
  102. {
  103. u32 command;
  104. u32 state;
  105. state = xhci_readl(xhci, &xhci->op_regs->status);
  106. if ((state & STS_HALT) == 0) {
  107. xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
  108. return 0;
  109. }
  110. xhci_dbg(xhci, "// Reset the HC\n");
  111. command = xhci_readl(xhci, &xhci->op_regs->command);
  112. command |= CMD_RESET;
  113. xhci_writel(xhci, command, &xhci->op_regs->command);
  114. /* XXX: Why does EHCI set this here? Shouldn't other code do this? */
  115. xhci_to_hcd(xhci)->state = HC_STATE_HALT;
  116. return handshake(xhci, &xhci->op_regs->command, CMD_RESET, 0, 250 * 1000);
  117. }
  118. #if 0
  119. /* Set up MSI-X table for entry 0 (may claim other entries later) */
  120. static int xhci_setup_msix(struct xhci_hcd *xhci)
  121. {
  122. int ret;
  123. struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
  124. xhci->msix_count = 0;
  125. /* XXX: did I do this right? ixgbe does kcalloc for more than one */
  126. xhci->msix_entries = kmalloc(sizeof(struct msix_entry), GFP_KERNEL);
  127. if (!xhci->msix_entries) {
  128. xhci_err(xhci, "Failed to allocate MSI-X entries\n");
  129. return -ENOMEM;
  130. }
  131. xhci->msix_entries[0].entry = 0;
  132. ret = pci_enable_msix(pdev, xhci->msix_entries, xhci->msix_count);
  133. if (ret) {
  134. xhci_err(xhci, "Failed to enable MSI-X\n");
  135. goto free_entries;
  136. }
  137. /*
  138. * Pass the xhci pointer value as the request_irq "cookie".
  139. * If more irqs are added, this will need to be unique for each one.
  140. */
  141. ret = request_irq(xhci->msix_entries[0].vector, &xhci_irq, 0,
  142. "xHCI", xhci_to_hcd(xhci));
  143. if (ret) {
  144. xhci_err(xhci, "Failed to allocate MSI-X interrupt\n");
  145. goto disable_msix;
  146. }
  147. xhci_dbg(xhci, "Finished setting up MSI-X\n");
  148. return 0;
  149. disable_msix:
  150. pci_disable_msix(pdev);
  151. free_entries:
  152. kfree(xhci->msix_entries);
  153. xhci->msix_entries = NULL;
  154. return ret;
  155. }
  156. /* XXX: code duplication; can xhci_setup_msix call this? */
  157. /* Free any IRQs and disable MSI-X */
  158. static void xhci_cleanup_msix(struct xhci_hcd *xhci)
  159. {
  160. struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
  161. if (!xhci->msix_entries)
  162. return;
  163. free_irq(xhci->msix_entries[0].vector, xhci);
  164. pci_disable_msix(pdev);
  165. kfree(xhci->msix_entries);
  166. xhci->msix_entries = NULL;
  167. xhci_dbg(xhci, "Finished cleaning up MSI-X\n");
  168. }
  169. #endif
  170. /*
  171. * Initialize memory for HCD and xHC (one-time init).
  172. *
  173. * Program the PAGESIZE register, initialize the device context array, create
  174. * device contexts (?), set up a command ring segment (or two?), create event
  175. * ring (one for now).
  176. */
  177. int xhci_init(struct usb_hcd *hcd)
  178. {
  179. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  180. int retval = 0;
  181. xhci_dbg(xhci, "xhci_init\n");
  182. spin_lock_init(&xhci->lock);
  183. if (link_quirk) {
  184. xhci_dbg(xhci, "QUIRK: Not clearing Link TRB chain bits.\n");
  185. xhci->quirks |= XHCI_LINK_TRB_QUIRK;
  186. } else {
  187. xhci_dbg(xhci, "xHCI doesn't need link TRB QUIRK\n");
  188. }
  189. retval = xhci_mem_init(xhci, GFP_KERNEL);
  190. xhci_dbg(xhci, "Finished xhci_init\n");
  191. return retval;
  192. }
  193. /*
  194. * Called in interrupt context when there might be work
  195. * queued on the event ring
  196. *
  197. * xhci->lock must be held by caller.
  198. */
  199. static void xhci_work(struct xhci_hcd *xhci)
  200. {
  201. u32 temp;
  202. u64 temp_64;
  203. /*
  204. * Clear the op reg interrupt status first,
  205. * so we can receive interrupts from other MSI-X interrupters.
  206. * Write 1 to clear the interrupt status.
  207. */
  208. temp = xhci_readl(xhci, &xhci->op_regs->status);
  209. temp |= STS_EINT;
  210. xhci_writel(xhci, temp, &xhci->op_regs->status);
  211. /* FIXME when MSI-X is supported and there are multiple vectors */
  212. /* Clear the MSI-X event interrupt status */
  213. /* Acknowledge the interrupt */
  214. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  215. temp |= 0x3;
  216. xhci_writel(xhci, temp, &xhci->ir_set->irq_pending);
  217. /* Flush posted writes */
  218. xhci_readl(xhci, &xhci->ir_set->irq_pending);
  219. /* FIXME this should be a delayed service routine that clears the EHB */
  220. xhci_handle_event(xhci);
  221. /* Clear the event handler busy flag (RW1C); the event ring should be empty. */
  222. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  223. xhci_write_64(xhci, temp_64 | ERST_EHB, &xhci->ir_set->erst_dequeue);
  224. /* Flush posted writes -- FIXME is this necessary? */
  225. xhci_readl(xhci, &xhci->ir_set->irq_pending);
  226. }
  227. /*-------------------------------------------------------------------------*/
  228. /*
  229. * xHCI spec says we can get an interrupt, and if the HC has an error condition,
  230. * we might get bad data out of the event ring. Section 4.10.2.7 has a list of
  231. * indicators of an event TRB error, but we check the status *first* to be safe.
  232. */
  233. irqreturn_t xhci_irq(struct usb_hcd *hcd)
  234. {
  235. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  236. u32 temp, temp2;
  237. union xhci_trb *trb;
  238. spin_lock(&xhci->lock);
  239. trb = xhci->event_ring->dequeue;
  240. /* Check if the xHC generated the interrupt, or the irq is shared */
  241. temp = xhci_readl(xhci, &xhci->op_regs->status);
  242. temp2 = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  243. if (temp == 0xffffffff && temp2 == 0xffffffff)
  244. goto hw_died;
  245. if (!(temp & STS_EINT) && !ER_IRQ_PENDING(temp2)) {
  246. spin_unlock(&xhci->lock);
  247. return IRQ_NONE;
  248. }
  249. xhci_dbg(xhci, "op reg status = %08x\n", temp);
  250. xhci_dbg(xhci, "ir set irq_pending = %08x\n", temp2);
  251. xhci_dbg(xhci, "Event ring dequeue ptr:\n");
  252. xhci_dbg(xhci, "@%llx %08x %08x %08x %08x\n",
  253. (unsigned long long)xhci_trb_virt_to_dma(xhci->event_ring->deq_seg, trb),
  254. lower_32_bits(trb->link.segment_ptr),
  255. upper_32_bits(trb->link.segment_ptr),
  256. (unsigned int) trb->link.intr_target,
  257. (unsigned int) trb->link.control);
  258. if (temp & STS_FATAL) {
  259. xhci_warn(xhci, "WARNING: Host System Error\n");
  260. xhci_halt(xhci);
  261. hw_died:
  262. xhci_to_hcd(xhci)->state = HC_STATE_HALT;
  263. spin_unlock(&xhci->lock);
  264. return -ESHUTDOWN;
  265. }
  266. xhci_work(xhci);
  267. spin_unlock(&xhci->lock);
  268. return IRQ_HANDLED;
  269. }
  270. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  271. void xhci_event_ring_work(unsigned long arg)
  272. {
  273. unsigned long flags;
  274. int temp;
  275. u64 temp_64;
  276. struct xhci_hcd *xhci = (struct xhci_hcd *) arg;
  277. int i, j;
  278. xhci_dbg(xhci, "Poll event ring: %lu\n", jiffies);
  279. spin_lock_irqsave(&xhci->lock, flags);
  280. temp = xhci_readl(xhci, &xhci->op_regs->status);
  281. xhci_dbg(xhci, "op reg status = 0x%x\n", temp);
  282. if (temp == 0xffffffff) {
  283. xhci_dbg(xhci, "HW died, polling stopped.\n");
  284. spin_unlock_irqrestore(&xhci->lock, flags);
  285. return;
  286. }
  287. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  288. xhci_dbg(xhci, "ir_set 0 pending = 0x%x\n", temp);
  289. xhci_dbg(xhci, "No-op commands handled = %d\n", xhci->noops_handled);
  290. xhci_dbg(xhci, "HC error bitmask = 0x%x\n", xhci->error_bitmask);
  291. xhci->error_bitmask = 0;
  292. xhci_dbg(xhci, "Event ring:\n");
  293. xhci_debug_segment(xhci, xhci->event_ring->deq_seg);
  294. xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
  295. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  296. temp_64 &= ~ERST_PTR_MASK;
  297. xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
  298. xhci_dbg(xhci, "Command ring:\n");
  299. xhci_debug_segment(xhci, xhci->cmd_ring->deq_seg);
  300. xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
  301. xhci_dbg_cmd_ptrs(xhci);
  302. for (i = 0; i < MAX_HC_SLOTS; ++i) {
  303. if (!xhci->devs[i])
  304. continue;
  305. for (j = 0; j < 31; ++j) {
  306. struct xhci_ring *ring = xhci->devs[i]->eps[j].ring;
  307. if (!ring)
  308. continue;
  309. xhci_dbg(xhci, "Dev %d endpoint ring %d:\n", i, j);
  310. xhci_debug_segment(xhci, ring->deq_seg);
  311. }
  312. }
  313. if (xhci->noops_submitted != NUM_TEST_NOOPS)
  314. if (xhci_setup_one_noop(xhci))
  315. xhci_ring_cmd_db(xhci);
  316. spin_unlock_irqrestore(&xhci->lock, flags);
  317. if (!xhci->zombie)
  318. mod_timer(&xhci->event_ring_timer, jiffies + POLL_TIMEOUT * HZ);
  319. else
  320. xhci_dbg(xhci, "Quit polling the event ring.\n");
  321. }
  322. #endif
  323. /*
  324. * Start the HC after it was halted.
  325. *
  326. * This function is called by the USB core when the HC driver is added.
  327. * Its opposite is xhci_stop().
  328. *
  329. * xhci_init() must be called once before this function can be called.
  330. * Reset the HC, enable device slot contexts, program DCBAAP, and
  331. * set command ring pointer and event ring pointer.
  332. *
  333. * Setup MSI-X vectors and enable interrupts.
  334. */
  335. int xhci_run(struct usb_hcd *hcd)
  336. {
  337. u32 temp;
  338. u64 temp_64;
  339. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  340. void (*doorbell)(struct xhci_hcd *) = NULL;
  341. hcd->uses_new_polling = 1;
  342. hcd->poll_rh = 0;
  343. xhci_dbg(xhci, "xhci_run\n");
  344. #if 0 /* FIXME: MSI not setup yet */
  345. /* Do this at the very last minute */
  346. ret = xhci_setup_msix(xhci);
  347. if (!ret)
  348. return ret;
  349. return -ENOSYS;
  350. #endif
  351. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  352. init_timer(&xhci->event_ring_timer);
  353. xhci->event_ring_timer.data = (unsigned long) xhci;
  354. xhci->event_ring_timer.function = xhci_event_ring_work;
  355. /* Poll the event ring */
  356. xhci->event_ring_timer.expires = jiffies + POLL_TIMEOUT * HZ;
  357. xhci->zombie = 0;
  358. xhci_dbg(xhci, "Setting event ring polling timer\n");
  359. add_timer(&xhci->event_ring_timer);
  360. #endif
  361. xhci_dbg(xhci, "Command ring memory map follows:\n");
  362. xhci_debug_ring(xhci, xhci->cmd_ring);
  363. xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
  364. xhci_dbg_cmd_ptrs(xhci);
  365. xhci_dbg(xhci, "ERST memory map follows:\n");
  366. xhci_dbg_erst(xhci, &xhci->erst);
  367. xhci_dbg(xhci, "Event ring:\n");
  368. xhci_debug_ring(xhci, xhci->event_ring);
  369. xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
  370. temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
  371. temp_64 &= ~ERST_PTR_MASK;
  372. xhci_dbg(xhci, "ERST deq = 64'h%0lx\n", (long unsigned int) temp_64);
  373. xhci_dbg(xhci, "// Set the interrupt modulation register\n");
  374. temp = xhci_readl(xhci, &xhci->ir_set->irq_control);
  375. temp &= ~ER_IRQ_INTERVAL_MASK;
  376. temp |= (u32) 160;
  377. xhci_writel(xhci, temp, &xhci->ir_set->irq_control);
  378. /* Set the HCD state before we enable the irqs */
  379. hcd->state = HC_STATE_RUNNING;
  380. temp = xhci_readl(xhci, &xhci->op_regs->command);
  381. temp |= (CMD_EIE);
  382. xhci_dbg(xhci, "// Enable interrupts, cmd = 0x%x.\n",
  383. temp);
  384. xhci_writel(xhci, temp, &xhci->op_regs->command);
  385. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  386. xhci_dbg(xhci, "// Enabling event ring interrupter %p by writing 0x%x to irq_pending\n",
  387. xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
  388. xhci_writel(xhci, ER_IRQ_ENABLE(temp),
  389. &xhci->ir_set->irq_pending);
  390. xhci_print_ir_set(xhci, xhci->ir_set, 0);
  391. if (NUM_TEST_NOOPS > 0)
  392. doorbell = xhci_setup_one_noop(xhci);
  393. temp = xhci_readl(xhci, &xhci->op_regs->command);
  394. temp |= (CMD_RUN);
  395. xhci_dbg(xhci, "// Turn on HC, cmd = 0x%x.\n",
  396. temp);
  397. xhci_writel(xhci, temp, &xhci->op_regs->command);
  398. /* Flush PCI posted writes */
  399. temp = xhci_readl(xhci, &xhci->op_regs->command);
  400. xhci_dbg(xhci, "// @%p = 0x%x\n", &xhci->op_regs->command, temp);
  401. if (doorbell)
  402. (*doorbell)(xhci);
  403. xhci_dbg(xhci, "Finished xhci_run\n");
  404. return 0;
  405. }
  406. /*
  407. * Stop xHCI driver.
  408. *
  409. * This function is called by the USB core when the HC driver is removed.
  410. * Its opposite is xhci_run().
  411. *
  412. * Disable device contexts, disable IRQs, and quiesce the HC.
  413. * Reset the HC, finish any completed transactions, and cleanup memory.
  414. */
  415. void xhci_stop(struct usb_hcd *hcd)
  416. {
  417. u32 temp;
  418. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  419. spin_lock_irq(&xhci->lock);
  420. xhci_halt(xhci);
  421. xhci_reset(xhci);
  422. spin_unlock_irq(&xhci->lock);
  423. #if 0 /* No MSI yet */
  424. xhci_cleanup_msix(xhci);
  425. #endif
  426. #ifdef CONFIG_USB_XHCI_HCD_DEBUGGING
  427. /* Tell the event ring poll function not to reschedule */
  428. xhci->zombie = 1;
  429. del_timer_sync(&xhci->event_ring_timer);
  430. #endif
  431. xhci_dbg(xhci, "// Disabling event ring interrupts\n");
  432. temp = xhci_readl(xhci, &xhci->op_regs->status);
  433. xhci_writel(xhci, temp & ~STS_EINT, &xhci->op_regs->status);
  434. temp = xhci_readl(xhci, &xhci->ir_set->irq_pending);
  435. xhci_writel(xhci, ER_IRQ_DISABLE(temp),
  436. &xhci->ir_set->irq_pending);
  437. xhci_print_ir_set(xhci, xhci->ir_set, 0);
  438. xhci_dbg(xhci, "cleaning up memory\n");
  439. xhci_mem_cleanup(xhci);
  440. xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
  441. xhci_readl(xhci, &xhci->op_regs->status));
  442. }
  443. /*
  444. * Shutdown HC (not bus-specific)
  445. *
  446. * This is called when the machine is rebooting or halting. We assume that the
  447. * machine will be powered off, and the HC's internal state will be reset.
  448. * Don't bother to free memory.
  449. */
  450. void xhci_shutdown(struct usb_hcd *hcd)
  451. {
  452. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  453. spin_lock_irq(&xhci->lock);
  454. xhci_halt(xhci);
  455. spin_unlock_irq(&xhci->lock);
  456. #if 0
  457. xhci_cleanup_msix(xhci);
  458. #endif
  459. xhci_dbg(xhci, "xhci_shutdown completed - status = %x\n",
  460. xhci_readl(xhci, &xhci->op_regs->status));
  461. }
  462. /*-------------------------------------------------------------------------*/
  463. /**
  464. * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
  465. * HCDs. Find the index for an endpoint given its descriptor. Use the return
  466. * value to right shift 1 for the bitmask.
  467. *
  468. * Index = (epnum * 2) + direction - 1,
  469. * where direction = 0 for OUT, 1 for IN.
  470. * For control endpoints, the IN index is used (OUT index is unused), so
  471. * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
  472. */
  473. unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
  474. {
  475. unsigned int index;
  476. if (usb_endpoint_xfer_control(desc))
  477. index = (unsigned int) (usb_endpoint_num(desc)*2);
  478. else
  479. index = (unsigned int) (usb_endpoint_num(desc)*2) +
  480. (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
  481. return index;
  482. }
  483. /* Find the flag for this endpoint (for use in the control context). Use the
  484. * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
  485. * bit 1, etc.
  486. */
  487. unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
  488. {
  489. return 1 << (xhci_get_endpoint_index(desc) + 1);
  490. }
  491. /* Find the flag for this endpoint (for use in the control context). Use the
  492. * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
  493. * bit 1, etc.
  494. */
  495. unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
  496. {
  497. return 1 << (ep_index + 1);
  498. }
  499. /* Compute the last valid endpoint context index. Basically, this is the
  500. * endpoint index plus one. For slot contexts with more than valid endpoint,
  501. * we find the most significant bit set in the added contexts flags.
  502. * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
  503. * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
  504. */
  505. unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
  506. {
  507. return fls(added_ctxs) - 1;
  508. }
  509. /* Returns 1 if the arguments are OK;
  510. * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
  511. */
  512. int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
  513. struct usb_host_endpoint *ep, int check_ep, const char *func) {
  514. if (!hcd || (check_ep && !ep) || !udev) {
  515. printk(KERN_DEBUG "xHCI %s called with invalid args\n",
  516. func);
  517. return -EINVAL;
  518. }
  519. if (!udev->parent) {
  520. printk(KERN_DEBUG "xHCI %s called for root hub\n",
  521. func);
  522. return 0;
  523. }
  524. if (!udev->slot_id) {
  525. printk(KERN_DEBUG "xHCI %s called with unaddressed device\n",
  526. func);
  527. return -EINVAL;
  528. }
  529. return 1;
  530. }
  531. static int xhci_configure_endpoint(struct xhci_hcd *xhci,
  532. struct usb_device *udev, struct xhci_command *command,
  533. bool ctx_change, bool must_succeed);
  534. /*
  535. * Full speed devices may have a max packet size greater than 8 bytes, but the
  536. * USB core doesn't know that until it reads the first 8 bytes of the
  537. * descriptor. If the usb_device's max packet size changes after that point,
  538. * we need to issue an evaluate context command and wait on it.
  539. */
  540. static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
  541. unsigned int ep_index, struct urb *urb)
  542. {
  543. struct xhci_container_ctx *in_ctx;
  544. struct xhci_container_ctx *out_ctx;
  545. struct xhci_input_control_ctx *ctrl_ctx;
  546. struct xhci_ep_ctx *ep_ctx;
  547. int max_packet_size;
  548. int hw_max_packet_size;
  549. int ret = 0;
  550. out_ctx = xhci->devs[slot_id]->out_ctx;
  551. ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
  552. hw_max_packet_size = MAX_PACKET_DECODED(ep_ctx->ep_info2);
  553. max_packet_size = urb->dev->ep0.desc.wMaxPacketSize;
  554. if (hw_max_packet_size != max_packet_size) {
  555. xhci_dbg(xhci, "Max Packet Size for ep 0 changed.\n");
  556. xhci_dbg(xhci, "Max packet size in usb_device = %d\n",
  557. max_packet_size);
  558. xhci_dbg(xhci, "Max packet size in xHCI HW = %d\n",
  559. hw_max_packet_size);
  560. xhci_dbg(xhci, "Issuing evaluate context command.\n");
  561. /* Set up the modified control endpoint 0 */
  562. xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
  563. xhci->devs[slot_id]->out_ctx, ep_index);
  564. in_ctx = xhci->devs[slot_id]->in_ctx;
  565. ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
  566. ep_ctx->ep_info2 &= ~MAX_PACKET_MASK;
  567. ep_ctx->ep_info2 |= MAX_PACKET(max_packet_size);
  568. /* Set up the input context flags for the command */
  569. /* FIXME: This won't work if a non-default control endpoint
  570. * changes max packet sizes.
  571. */
  572. ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
  573. ctrl_ctx->add_flags = EP0_FLAG;
  574. ctrl_ctx->drop_flags = 0;
  575. xhci_dbg(xhci, "Slot %d input context\n", slot_id);
  576. xhci_dbg_ctx(xhci, in_ctx, ep_index);
  577. xhci_dbg(xhci, "Slot %d output context\n", slot_id);
  578. xhci_dbg_ctx(xhci, out_ctx, ep_index);
  579. ret = xhci_configure_endpoint(xhci, urb->dev, NULL,
  580. true, false);
  581. /* Clean up the input context for later use by bandwidth
  582. * functions.
  583. */
  584. ctrl_ctx->add_flags = SLOT_FLAG;
  585. }
  586. return ret;
  587. }
  588. /*
  589. * non-error returns are a promise to giveback() the urb later
  590. * we drop ownership so next owner (or urb unlink) can get it
  591. */
  592. int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
  593. {
  594. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  595. unsigned long flags;
  596. int ret = 0;
  597. unsigned int slot_id, ep_index;
  598. if (!urb || xhci_check_args(hcd, urb->dev, urb->ep, true, __func__) <= 0)
  599. return -EINVAL;
  600. slot_id = urb->dev->slot_id;
  601. ep_index = xhci_get_endpoint_index(&urb->ep->desc);
  602. if (!xhci->devs || !xhci->devs[slot_id]) {
  603. if (!in_interrupt())
  604. dev_warn(&urb->dev->dev, "WARN: urb submitted for dev with no Slot ID\n");
  605. ret = -EINVAL;
  606. goto exit;
  607. }
  608. if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
  609. if (!in_interrupt())
  610. xhci_dbg(xhci, "urb submitted during PCI suspend\n");
  611. ret = -ESHUTDOWN;
  612. goto exit;
  613. }
  614. if (usb_endpoint_xfer_control(&urb->ep->desc)) {
  615. /* Check to see if the max packet size for the default control
  616. * endpoint changed during FS device enumeration
  617. */
  618. if (urb->dev->speed == USB_SPEED_FULL) {
  619. ret = xhci_check_maxpacket(xhci, slot_id,
  620. ep_index, urb);
  621. if (ret < 0)
  622. return ret;
  623. }
  624. /* We have a spinlock and interrupts disabled, so we must pass
  625. * atomic context to this function, which may allocate memory.
  626. */
  627. spin_lock_irqsave(&xhci->lock, flags);
  628. ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
  629. slot_id, ep_index);
  630. spin_unlock_irqrestore(&xhci->lock, flags);
  631. } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
  632. spin_lock_irqsave(&xhci->lock, flags);
  633. ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
  634. slot_id, ep_index);
  635. spin_unlock_irqrestore(&xhci->lock, flags);
  636. } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
  637. spin_lock_irqsave(&xhci->lock, flags);
  638. ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
  639. slot_id, ep_index);
  640. spin_unlock_irqrestore(&xhci->lock, flags);
  641. } else {
  642. ret = -EINVAL;
  643. }
  644. exit:
  645. return ret;
  646. }
  647. /*
  648. * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
  649. * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
  650. * should pick up where it left off in the TD, unless a Set Transfer Ring
  651. * Dequeue Pointer is issued.
  652. *
  653. * The TRBs that make up the buffers for the canceled URB will be "removed" from
  654. * the ring. Since the ring is a contiguous structure, they can't be physically
  655. * removed. Instead, there are two options:
  656. *
  657. * 1) If the HC is in the middle of processing the URB to be canceled, we
  658. * simply move the ring's dequeue pointer past those TRBs using the Set
  659. * Transfer Ring Dequeue Pointer command. This will be the common case,
  660. * when drivers timeout on the last submitted URB and attempt to cancel.
  661. *
  662. * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
  663. * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
  664. * HC will need to invalidate the any TRBs it has cached after the stop
  665. * endpoint command, as noted in the xHCI 0.95 errata.
  666. *
  667. * 3) The TD may have completed by the time the Stop Endpoint Command
  668. * completes, so software needs to handle that case too.
  669. *
  670. * This function should protect against the TD enqueueing code ringing the
  671. * doorbell while this code is waiting for a Stop Endpoint command to complete.
  672. * It also needs to account for multiple cancellations on happening at the same
  673. * time for the same endpoint.
  674. *
  675. * Note that this function can be called in any context, or so says
  676. * usb_hcd_unlink_urb()
  677. */
  678. int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
  679. {
  680. unsigned long flags;
  681. int ret;
  682. u32 temp;
  683. struct xhci_hcd *xhci;
  684. struct xhci_td *td;
  685. unsigned int ep_index;
  686. struct xhci_ring *ep_ring;
  687. struct xhci_virt_ep *ep;
  688. xhci = hcd_to_xhci(hcd);
  689. spin_lock_irqsave(&xhci->lock, flags);
  690. /* Make sure the URB hasn't completed or been unlinked already */
  691. ret = usb_hcd_check_unlink_urb(hcd, urb, status);
  692. if (ret || !urb->hcpriv)
  693. goto done;
  694. temp = xhci_readl(xhci, &xhci->op_regs->status);
  695. if (temp == 0xffffffff) {
  696. xhci_dbg(xhci, "HW died, freeing TD.\n");
  697. td = (struct xhci_td *) urb->hcpriv;
  698. usb_hcd_unlink_urb_from_ep(hcd, urb);
  699. spin_unlock_irqrestore(&xhci->lock, flags);
  700. usb_hcd_giveback_urb(xhci_to_hcd(xhci), urb, -ESHUTDOWN);
  701. kfree(td);
  702. return ret;
  703. }
  704. xhci_dbg(xhci, "Cancel URB %p\n", urb);
  705. xhci_dbg(xhci, "Event ring:\n");
  706. xhci_debug_ring(xhci, xhci->event_ring);
  707. ep_index = xhci_get_endpoint_index(&urb->ep->desc);
  708. ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
  709. ep_ring = ep->ring;
  710. xhci_dbg(xhci, "Endpoint ring:\n");
  711. xhci_debug_ring(xhci, ep_ring);
  712. td = (struct xhci_td *) urb->hcpriv;
  713. list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
  714. /* Queue a stop endpoint command, but only if this is
  715. * the first cancellation to be handled.
  716. */
  717. if (!(ep->ep_state & EP_HALT_PENDING)) {
  718. ep->ep_state |= EP_HALT_PENDING;
  719. xhci_queue_stop_endpoint(xhci, urb->dev->slot_id, ep_index);
  720. xhci_ring_cmd_db(xhci);
  721. }
  722. done:
  723. spin_unlock_irqrestore(&xhci->lock, flags);
  724. return ret;
  725. }
  726. /* Drop an endpoint from a new bandwidth configuration for this device.
  727. * Only one call to this function is allowed per endpoint before
  728. * check_bandwidth() or reset_bandwidth() must be called.
  729. * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
  730. * add the endpoint to the schedule with possibly new parameters denoted by a
  731. * different endpoint descriptor in usb_host_endpoint.
  732. * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
  733. * not allowed.
  734. *
  735. * The USB core will not allow URBs to be queued to an endpoint that is being
  736. * disabled, so there's no need for mutual exclusion to protect
  737. * the xhci->devs[slot_id] structure.
  738. */
  739. int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
  740. struct usb_host_endpoint *ep)
  741. {
  742. struct xhci_hcd *xhci;
  743. struct xhci_container_ctx *in_ctx, *out_ctx;
  744. struct xhci_input_control_ctx *ctrl_ctx;
  745. struct xhci_slot_ctx *slot_ctx;
  746. unsigned int last_ctx;
  747. unsigned int ep_index;
  748. struct xhci_ep_ctx *ep_ctx;
  749. u32 drop_flag;
  750. u32 new_add_flags, new_drop_flags, new_slot_info;
  751. int ret;
  752. ret = xhci_check_args(hcd, udev, ep, 1, __func__);
  753. if (ret <= 0)
  754. return ret;
  755. xhci = hcd_to_xhci(hcd);
  756. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  757. drop_flag = xhci_get_endpoint_flag(&ep->desc);
  758. if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
  759. xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
  760. __func__, drop_flag);
  761. return 0;
  762. }
  763. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  764. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  765. __func__);
  766. return -EINVAL;
  767. }
  768. in_ctx = xhci->devs[udev->slot_id]->in_ctx;
  769. out_ctx = xhci->devs[udev->slot_id]->out_ctx;
  770. ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
  771. ep_index = xhci_get_endpoint_index(&ep->desc);
  772. ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
  773. /* If the HC already knows the endpoint is disabled,
  774. * or the HCD has noted it is disabled, ignore this request
  775. */
  776. if ((ep_ctx->ep_info & EP_STATE_MASK) == EP_STATE_DISABLED ||
  777. ctrl_ctx->drop_flags & xhci_get_endpoint_flag(&ep->desc)) {
  778. xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
  779. __func__, ep);
  780. return 0;
  781. }
  782. ctrl_ctx->drop_flags |= drop_flag;
  783. new_drop_flags = ctrl_ctx->drop_flags;
  784. ctrl_ctx->add_flags &= ~drop_flag;
  785. new_add_flags = ctrl_ctx->add_flags;
  786. last_ctx = xhci_last_valid_endpoint(ctrl_ctx->add_flags);
  787. slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
  788. /* Update the last valid endpoint context, if we deleted the last one */
  789. if ((slot_ctx->dev_info & LAST_CTX_MASK) > LAST_CTX(last_ctx)) {
  790. slot_ctx->dev_info &= ~LAST_CTX_MASK;
  791. slot_ctx->dev_info |= LAST_CTX(last_ctx);
  792. }
  793. new_slot_info = slot_ctx->dev_info;
  794. xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
  795. xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
  796. (unsigned int) ep->desc.bEndpointAddress,
  797. udev->slot_id,
  798. (unsigned int) new_drop_flags,
  799. (unsigned int) new_add_flags,
  800. (unsigned int) new_slot_info);
  801. return 0;
  802. }
  803. /* Add an endpoint to a new possible bandwidth configuration for this device.
  804. * Only one call to this function is allowed per endpoint before
  805. * check_bandwidth() or reset_bandwidth() must be called.
  806. * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
  807. * add the endpoint to the schedule with possibly new parameters denoted by a
  808. * different endpoint descriptor in usb_host_endpoint.
  809. * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
  810. * not allowed.
  811. *
  812. * The USB core will not allow URBs to be queued to an endpoint until the
  813. * configuration or alt setting is installed in the device, so there's no need
  814. * for mutual exclusion to protect the xhci->devs[slot_id] structure.
  815. */
  816. int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
  817. struct usb_host_endpoint *ep)
  818. {
  819. struct xhci_hcd *xhci;
  820. struct xhci_container_ctx *in_ctx, *out_ctx;
  821. unsigned int ep_index;
  822. struct xhci_ep_ctx *ep_ctx;
  823. struct xhci_slot_ctx *slot_ctx;
  824. struct xhci_input_control_ctx *ctrl_ctx;
  825. u32 added_ctxs;
  826. unsigned int last_ctx;
  827. u32 new_add_flags, new_drop_flags, new_slot_info;
  828. int ret = 0;
  829. ret = xhci_check_args(hcd, udev, ep, 1, __func__);
  830. if (ret <= 0) {
  831. /* So we won't queue a reset ep command for a root hub */
  832. ep->hcpriv = NULL;
  833. return ret;
  834. }
  835. xhci = hcd_to_xhci(hcd);
  836. added_ctxs = xhci_get_endpoint_flag(&ep->desc);
  837. last_ctx = xhci_last_valid_endpoint(added_ctxs);
  838. if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
  839. /* FIXME when we have to issue an evaluate endpoint command to
  840. * deal with ep0 max packet size changing once we get the
  841. * descriptors
  842. */
  843. xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
  844. __func__, added_ctxs);
  845. return 0;
  846. }
  847. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  848. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  849. __func__);
  850. return -EINVAL;
  851. }
  852. in_ctx = xhci->devs[udev->slot_id]->in_ctx;
  853. out_ctx = xhci->devs[udev->slot_id]->out_ctx;
  854. ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
  855. ep_index = xhci_get_endpoint_index(&ep->desc);
  856. ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
  857. /* If the HCD has already noted the endpoint is enabled,
  858. * ignore this request.
  859. */
  860. if (ctrl_ctx->add_flags & xhci_get_endpoint_flag(&ep->desc)) {
  861. xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
  862. __func__, ep);
  863. return 0;
  864. }
  865. /*
  866. * Configuration and alternate setting changes must be done in
  867. * process context, not interrupt context (or so documenation
  868. * for usb_set_interface() and usb_set_configuration() claim).
  869. */
  870. if (xhci_endpoint_init(xhci, xhci->devs[udev->slot_id],
  871. udev, ep, GFP_KERNEL) < 0) {
  872. dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
  873. __func__, ep->desc.bEndpointAddress);
  874. return -ENOMEM;
  875. }
  876. ctrl_ctx->add_flags |= added_ctxs;
  877. new_add_flags = ctrl_ctx->add_flags;
  878. /* If xhci_endpoint_disable() was called for this endpoint, but the
  879. * xHC hasn't been notified yet through the check_bandwidth() call,
  880. * this re-adds a new state for the endpoint from the new endpoint
  881. * descriptors. We must drop and re-add this endpoint, so we leave the
  882. * drop flags alone.
  883. */
  884. new_drop_flags = ctrl_ctx->drop_flags;
  885. slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
  886. /* Update the last valid endpoint context, if we just added one past */
  887. if ((slot_ctx->dev_info & LAST_CTX_MASK) < LAST_CTX(last_ctx)) {
  888. slot_ctx->dev_info &= ~LAST_CTX_MASK;
  889. slot_ctx->dev_info |= LAST_CTX(last_ctx);
  890. }
  891. new_slot_info = slot_ctx->dev_info;
  892. /* Store the usb_device pointer for later use */
  893. ep->hcpriv = udev;
  894. xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
  895. (unsigned int) ep->desc.bEndpointAddress,
  896. udev->slot_id,
  897. (unsigned int) new_drop_flags,
  898. (unsigned int) new_add_flags,
  899. (unsigned int) new_slot_info);
  900. return 0;
  901. }
  902. static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
  903. {
  904. struct xhci_input_control_ctx *ctrl_ctx;
  905. struct xhci_ep_ctx *ep_ctx;
  906. struct xhci_slot_ctx *slot_ctx;
  907. int i;
  908. /* When a device's add flag and drop flag are zero, any subsequent
  909. * configure endpoint command will leave that endpoint's state
  910. * untouched. Make sure we don't leave any old state in the input
  911. * endpoint contexts.
  912. */
  913. ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
  914. ctrl_ctx->drop_flags = 0;
  915. ctrl_ctx->add_flags = 0;
  916. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
  917. slot_ctx->dev_info &= ~LAST_CTX_MASK;
  918. /* Endpoint 0 is always valid */
  919. slot_ctx->dev_info |= LAST_CTX(1);
  920. for (i = 1; i < 31; ++i) {
  921. ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
  922. ep_ctx->ep_info = 0;
  923. ep_ctx->ep_info2 = 0;
  924. ep_ctx->deq = 0;
  925. ep_ctx->tx_info = 0;
  926. }
  927. }
  928. static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
  929. struct usb_device *udev, int *cmd_status)
  930. {
  931. int ret;
  932. switch (*cmd_status) {
  933. case COMP_ENOMEM:
  934. dev_warn(&udev->dev, "Not enough host controller resources "
  935. "for new device state.\n");
  936. ret = -ENOMEM;
  937. /* FIXME: can we allocate more resources for the HC? */
  938. break;
  939. case COMP_BW_ERR:
  940. dev_warn(&udev->dev, "Not enough bandwidth "
  941. "for new device state.\n");
  942. ret = -ENOSPC;
  943. /* FIXME: can we go back to the old state? */
  944. break;
  945. case COMP_TRB_ERR:
  946. /* the HCD set up something wrong */
  947. dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
  948. "add flag = 1, "
  949. "and endpoint is not disabled.\n");
  950. ret = -EINVAL;
  951. break;
  952. case COMP_SUCCESS:
  953. dev_dbg(&udev->dev, "Successful Endpoint Configure command\n");
  954. ret = 0;
  955. break;
  956. default:
  957. xhci_err(xhci, "ERROR: unexpected command completion "
  958. "code 0x%x.\n", *cmd_status);
  959. ret = -EINVAL;
  960. break;
  961. }
  962. return ret;
  963. }
  964. static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
  965. struct usb_device *udev, int *cmd_status)
  966. {
  967. int ret;
  968. struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
  969. switch (*cmd_status) {
  970. case COMP_EINVAL:
  971. dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
  972. "context command.\n");
  973. ret = -EINVAL;
  974. break;
  975. case COMP_EBADSLT:
  976. dev_warn(&udev->dev, "WARN: slot not enabled for"
  977. "evaluate context command.\n");
  978. case COMP_CTX_STATE:
  979. dev_warn(&udev->dev, "WARN: invalid context state for "
  980. "evaluate context command.\n");
  981. xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
  982. ret = -EINVAL;
  983. break;
  984. case COMP_SUCCESS:
  985. dev_dbg(&udev->dev, "Successful evaluate context command\n");
  986. ret = 0;
  987. break;
  988. default:
  989. xhci_err(xhci, "ERROR: unexpected command completion "
  990. "code 0x%x.\n", *cmd_status);
  991. ret = -EINVAL;
  992. break;
  993. }
  994. return ret;
  995. }
  996. /* Issue a configure endpoint command or evaluate context command
  997. * and wait for it to finish.
  998. */
  999. static int xhci_configure_endpoint(struct xhci_hcd *xhci,
  1000. struct usb_device *udev,
  1001. struct xhci_command *command,
  1002. bool ctx_change, bool must_succeed)
  1003. {
  1004. int ret;
  1005. int timeleft;
  1006. unsigned long flags;
  1007. struct xhci_container_ctx *in_ctx;
  1008. struct completion *cmd_completion;
  1009. int *cmd_status;
  1010. struct xhci_virt_device *virt_dev;
  1011. spin_lock_irqsave(&xhci->lock, flags);
  1012. virt_dev = xhci->devs[udev->slot_id];
  1013. if (command) {
  1014. in_ctx = command->in_ctx;
  1015. cmd_completion = command->completion;
  1016. cmd_status = &command->status;
  1017. command->command_trb = xhci->cmd_ring->enqueue;
  1018. list_add_tail(&command->cmd_list, &virt_dev->cmd_list);
  1019. } else {
  1020. in_ctx = virt_dev->in_ctx;
  1021. cmd_completion = &virt_dev->cmd_completion;
  1022. cmd_status = &virt_dev->cmd_status;
  1023. }
  1024. if (!ctx_change)
  1025. ret = xhci_queue_configure_endpoint(xhci, in_ctx->dma,
  1026. udev->slot_id, must_succeed);
  1027. else
  1028. ret = xhci_queue_evaluate_context(xhci, in_ctx->dma,
  1029. udev->slot_id);
  1030. if (ret < 0) {
  1031. spin_unlock_irqrestore(&xhci->lock, flags);
  1032. xhci_dbg(xhci, "FIXME allocate a new ring segment\n");
  1033. return -ENOMEM;
  1034. }
  1035. xhci_ring_cmd_db(xhci);
  1036. spin_unlock_irqrestore(&xhci->lock, flags);
  1037. /* Wait for the configure endpoint command to complete */
  1038. timeleft = wait_for_completion_interruptible_timeout(
  1039. cmd_completion,
  1040. USB_CTRL_SET_TIMEOUT);
  1041. if (timeleft <= 0) {
  1042. xhci_warn(xhci, "%s while waiting for %s command\n",
  1043. timeleft == 0 ? "Timeout" : "Signal",
  1044. ctx_change == 0 ?
  1045. "configure endpoint" :
  1046. "evaluate context");
  1047. /* FIXME cancel the configure endpoint command */
  1048. return -ETIME;
  1049. }
  1050. if (!ctx_change)
  1051. return xhci_configure_endpoint_result(xhci, udev, cmd_status);
  1052. return xhci_evaluate_context_result(xhci, udev, cmd_status);
  1053. }
  1054. /* Called after one or more calls to xhci_add_endpoint() or
  1055. * xhci_drop_endpoint(). If this call fails, the USB core is expected
  1056. * to call xhci_reset_bandwidth().
  1057. *
  1058. * Since we are in the middle of changing either configuration or
  1059. * installing a new alt setting, the USB core won't allow URBs to be
  1060. * enqueued for any endpoint on the old config or interface. Nothing
  1061. * else should be touching the xhci->devs[slot_id] structure, so we
  1062. * don't need to take the xhci->lock for manipulating that.
  1063. */
  1064. int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  1065. {
  1066. int i;
  1067. int ret = 0;
  1068. struct xhci_hcd *xhci;
  1069. struct xhci_virt_device *virt_dev;
  1070. struct xhci_input_control_ctx *ctrl_ctx;
  1071. struct xhci_slot_ctx *slot_ctx;
  1072. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  1073. if (ret <= 0)
  1074. return ret;
  1075. xhci = hcd_to_xhci(hcd);
  1076. if (!udev->slot_id || !xhci->devs || !xhci->devs[udev->slot_id]) {
  1077. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  1078. __func__);
  1079. return -EINVAL;
  1080. }
  1081. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  1082. virt_dev = xhci->devs[udev->slot_id];
  1083. /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
  1084. ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
  1085. ctrl_ctx->add_flags |= SLOT_FLAG;
  1086. ctrl_ctx->add_flags &= ~EP0_FLAG;
  1087. ctrl_ctx->drop_flags &= ~SLOT_FLAG;
  1088. ctrl_ctx->drop_flags &= ~EP0_FLAG;
  1089. xhci_dbg(xhci, "New Input Control Context:\n");
  1090. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
  1091. xhci_dbg_ctx(xhci, virt_dev->in_ctx,
  1092. LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
  1093. ret = xhci_configure_endpoint(xhci, udev, NULL,
  1094. false, false);
  1095. if (ret) {
  1096. /* Callee should call reset_bandwidth() */
  1097. return ret;
  1098. }
  1099. xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
  1100. xhci_dbg_ctx(xhci, virt_dev->out_ctx,
  1101. LAST_CTX_TO_EP_NUM(slot_ctx->dev_info));
  1102. xhci_zero_in_ctx(xhci, virt_dev);
  1103. /* Free any old rings */
  1104. for (i = 1; i < 31; ++i) {
  1105. if (virt_dev->eps[i].new_ring) {
  1106. xhci_ring_free(xhci, virt_dev->eps[i].ring);
  1107. virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
  1108. virt_dev->eps[i].new_ring = NULL;
  1109. }
  1110. }
  1111. return ret;
  1112. }
  1113. void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
  1114. {
  1115. struct xhci_hcd *xhci;
  1116. struct xhci_virt_device *virt_dev;
  1117. int i, ret;
  1118. ret = xhci_check_args(hcd, udev, NULL, 0, __func__);
  1119. if (ret <= 0)
  1120. return;
  1121. xhci = hcd_to_xhci(hcd);
  1122. if (!xhci->devs || !xhci->devs[udev->slot_id]) {
  1123. xhci_warn(xhci, "xHCI %s called with unaddressed device\n",
  1124. __func__);
  1125. return;
  1126. }
  1127. xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
  1128. virt_dev = xhci->devs[udev->slot_id];
  1129. /* Free any rings allocated for added endpoints */
  1130. for (i = 0; i < 31; ++i) {
  1131. if (virt_dev->eps[i].new_ring) {
  1132. xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
  1133. virt_dev->eps[i].new_ring = NULL;
  1134. }
  1135. }
  1136. xhci_zero_in_ctx(xhci, virt_dev);
  1137. }
  1138. static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
  1139. struct xhci_container_ctx *in_ctx,
  1140. struct xhci_container_ctx *out_ctx,
  1141. u32 add_flags, u32 drop_flags)
  1142. {
  1143. struct xhci_input_control_ctx *ctrl_ctx;
  1144. ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
  1145. ctrl_ctx->add_flags = add_flags;
  1146. ctrl_ctx->drop_flags = drop_flags;
  1147. xhci_slot_copy(xhci, in_ctx, out_ctx);
  1148. ctrl_ctx->add_flags |= SLOT_FLAG;
  1149. xhci_dbg(xhci, "Input Context:\n");
  1150. xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
  1151. }
  1152. void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
  1153. unsigned int slot_id, unsigned int ep_index,
  1154. struct xhci_dequeue_state *deq_state)
  1155. {
  1156. struct xhci_container_ctx *in_ctx;
  1157. struct xhci_ep_ctx *ep_ctx;
  1158. u32 added_ctxs;
  1159. dma_addr_t addr;
  1160. xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
  1161. xhci->devs[slot_id]->out_ctx, ep_index);
  1162. in_ctx = xhci->devs[slot_id]->in_ctx;
  1163. ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
  1164. addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
  1165. deq_state->new_deq_ptr);
  1166. if (addr == 0) {
  1167. xhci_warn(xhci, "WARN Cannot submit config ep after "
  1168. "reset ep command\n");
  1169. xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
  1170. deq_state->new_deq_seg,
  1171. deq_state->new_deq_ptr);
  1172. return;
  1173. }
  1174. ep_ctx->deq = addr | deq_state->new_cycle_state;
  1175. added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
  1176. xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
  1177. xhci->devs[slot_id]->out_ctx, added_ctxs, added_ctxs);
  1178. }
  1179. void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
  1180. struct usb_device *udev, unsigned int ep_index)
  1181. {
  1182. struct xhci_dequeue_state deq_state;
  1183. struct xhci_virt_ep *ep;
  1184. xhci_dbg(xhci, "Cleaning up stalled endpoint ring\n");
  1185. ep = &xhci->devs[udev->slot_id]->eps[ep_index];
  1186. /* We need to move the HW's dequeue pointer past this TD,
  1187. * or it will attempt to resend it on the next doorbell ring.
  1188. */
  1189. xhci_find_new_dequeue_state(xhci, udev->slot_id,
  1190. ep_index, ep->stopped_td,
  1191. &deq_state);
  1192. /* HW with the reset endpoint quirk will use the saved dequeue state to
  1193. * issue a configure endpoint command later.
  1194. */
  1195. if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
  1196. xhci_dbg(xhci, "Queueing new dequeue state\n");
  1197. xhci_queue_new_dequeue_state(xhci, udev->slot_id,
  1198. ep_index, &deq_state);
  1199. } else {
  1200. /* Better hope no one uses the input context between now and the
  1201. * reset endpoint completion!
  1202. */
  1203. xhci_dbg(xhci, "Setting up input context for "
  1204. "configure endpoint command\n");
  1205. xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
  1206. ep_index, &deq_state);
  1207. }
  1208. }
  1209. /* Deal with stalled endpoints. The core should have sent the control message
  1210. * to clear the halt condition. However, we need to make the xHCI hardware
  1211. * reset its sequence number, since a device will expect a sequence number of
  1212. * zero after the halt condition is cleared.
  1213. * Context: in_interrupt
  1214. */
  1215. void xhci_endpoint_reset(struct usb_hcd *hcd,
  1216. struct usb_host_endpoint *ep)
  1217. {
  1218. struct xhci_hcd *xhci;
  1219. struct usb_device *udev;
  1220. unsigned int ep_index;
  1221. unsigned long flags;
  1222. int ret;
  1223. struct xhci_virt_ep *virt_ep;
  1224. xhci = hcd_to_xhci(hcd);
  1225. udev = (struct usb_device *) ep->hcpriv;
  1226. /* Called with a root hub endpoint (or an endpoint that wasn't added
  1227. * with xhci_add_endpoint()
  1228. */
  1229. if (!ep->hcpriv)
  1230. return;
  1231. ep_index = xhci_get_endpoint_index(&ep->desc);
  1232. virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
  1233. if (!virt_ep->stopped_td) {
  1234. xhci_dbg(xhci, "Endpoint 0x%x not halted, refusing to reset.\n",
  1235. ep->desc.bEndpointAddress);
  1236. return;
  1237. }
  1238. if (usb_endpoint_xfer_control(&ep->desc)) {
  1239. xhci_dbg(xhci, "Control endpoint stall already handled.\n");
  1240. return;
  1241. }
  1242. xhci_dbg(xhci, "Queueing reset endpoint command\n");
  1243. spin_lock_irqsave(&xhci->lock, flags);
  1244. ret = xhci_queue_reset_ep(xhci, udev->slot_id, ep_index);
  1245. /*
  1246. * Can't change the ring dequeue pointer until it's transitioned to the
  1247. * stopped state, which is only upon a successful reset endpoint
  1248. * command. Better hope that last command worked!
  1249. */
  1250. if (!ret) {
  1251. xhci_cleanup_stalled_ring(xhci, udev, ep_index);
  1252. kfree(virt_ep->stopped_td);
  1253. xhci_ring_cmd_db(xhci);
  1254. }
  1255. spin_unlock_irqrestore(&xhci->lock, flags);
  1256. if (ret)
  1257. xhci_warn(xhci, "FIXME allocate a new ring segment\n");
  1258. }
  1259. /*
  1260. * At this point, the struct usb_device is about to go away, the device has
  1261. * disconnected, and all traffic has been stopped and the endpoints have been
  1262. * disabled. Free any HC data structures associated with that device.
  1263. */
  1264. void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
  1265. {
  1266. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1267. unsigned long flags;
  1268. u32 state;
  1269. if (udev->slot_id == 0)
  1270. return;
  1271. spin_lock_irqsave(&xhci->lock, flags);
  1272. /* Don't disable the slot if the host controller is dead. */
  1273. state = xhci_readl(xhci, &xhci->op_regs->status);
  1274. if (state == 0xffffffff) {
  1275. xhci_free_virt_device(xhci, udev->slot_id);
  1276. spin_unlock_irqrestore(&xhci->lock, flags);
  1277. return;
  1278. }
  1279. if (xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id)) {
  1280. spin_unlock_irqrestore(&xhci->lock, flags);
  1281. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1282. return;
  1283. }
  1284. xhci_ring_cmd_db(xhci);
  1285. spin_unlock_irqrestore(&xhci->lock, flags);
  1286. /*
  1287. * Event command completion handler will free any data structures
  1288. * associated with the slot. XXX Can free sleep?
  1289. */
  1290. }
  1291. /*
  1292. * Returns 0 if the xHC ran out of device slots, the Enable Slot command
  1293. * timed out, or allocating memory failed. Returns 1 on success.
  1294. */
  1295. int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
  1296. {
  1297. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1298. unsigned long flags;
  1299. int timeleft;
  1300. int ret;
  1301. spin_lock_irqsave(&xhci->lock, flags);
  1302. ret = xhci_queue_slot_control(xhci, TRB_ENABLE_SLOT, 0);
  1303. if (ret) {
  1304. spin_unlock_irqrestore(&xhci->lock, flags);
  1305. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1306. return 0;
  1307. }
  1308. xhci_ring_cmd_db(xhci);
  1309. spin_unlock_irqrestore(&xhci->lock, flags);
  1310. /* XXX: how much time for xHC slot assignment? */
  1311. timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
  1312. USB_CTRL_SET_TIMEOUT);
  1313. if (timeleft <= 0) {
  1314. xhci_warn(xhci, "%s while waiting for a slot\n",
  1315. timeleft == 0 ? "Timeout" : "Signal");
  1316. /* FIXME cancel the enable slot request */
  1317. return 0;
  1318. }
  1319. if (!xhci->slot_id) {
  1320. xhci_err(xhci, "Error while assigning device slot ID\n");
  1321. return 0;
  1322. }
  1323. /* xhci_alloc_virt_device() does not touch rings; no need to lock */
  1324. if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_KERNEL)) {
  1325. /* Disable slot, if we can do it without mem alloc */
  1326. xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
  1327. spin_lock_irqsave(&xhci->lock, flags);
  1328. if (!xhci_queue_slot_control(xhci, TRB_DISABLE_SLOT, udev->slot_id))
  1329. xhci_ring_cmd_db(xhci);
  1330. spin_unlock_irqrestore(&xhci->lock, flags);
  1331. return 0;
  1332. }
  1333. udev->slot_id = xhci->slot_id;
  1334. /* Is this a LS or FS device under a HS hub? */
  1335. /* Hub or peripherial? */
  1336. return 1;
  1337. }
  1338. /*
  1339. * Issue an Address Device command (which will issue a SetAddress request to
  1340. * the device).
  1341. * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
  1342. * we should only issue and wait on one address command at the same time.
  1343. *
  1344. * We add one to the device address issued by the hardware because the USB core
  1345. * uses address 1 for the root hubs (even though they're not really devices).
  1346. */
  1347. int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
  1348. {
  1349. unsigned long flags;
  1350. int timeleft;
  1351. struct xhci_virt_device *virt_dev;
  1352. int ret = 0;
  1353. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1354. struct xhci_slot_ctx *slot_ctx;
  1355. struct xhci_input_control_ctx *ctrl_ctx;
  1356. u64 temp_64;
  1357. if (!udev->slot_id) {
  1358. xhci_dbg(xhci, "Bad Slot ID %d\n", udev->slot_id);
  1359. return -EINVAL;
  1360. }
  1361. virt_dev = xhci->devs[udev->slot_id];
  1362. /* If this is a Set Address to an unconfigured device, setup ep 0 */
  1363. if (!udev->config)
  1364. xhci_setup_addressable_virt_dev(xhci, udev);
  1365. /* Otherwise, assume the core has the device configured how it wants */
  1366. xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
  1367. xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
  1368. spin_lock_irqsave(&xhci->lock, flags);
  1369. ret = xhci_queue_address_device(xhci, virt_dev->in_ctx->dma,
  1370. udev->slot_id);
  1371. if (ret) {
  1372. spin_unlock_irqrestore(&xhci->lock, flags);
  1373. xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
  1374. return ret;
  1375. }
  1376. xhci_ring_cmd_db(xhci);
  1377. spin_unlock_irqrestore(&xhci->lock, flags);
  1378. /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
  1379. timeleft = wait_for_completion_interruptible_timeout(&xhci->addr_dev,
  1380. USB_CTRL_SET_TIMEOUT);
  1381. /* FIXME: From section 4.3.4: "Software shall be responsible for timing
  1382. * the SetAddress() "recovery interval" required by USB and aborting the
  1383. * command on a timeout.
  1384. */
  1385. if (timeleft <= 0) {
  1386. xhci_warn(xhci, "%s while waiting for a slot\n",
  1387. timeleft == 0 ? "Timeout" : "Signal");
  1388. /* FIXME cancel the address device command */
  1389. return -ETIME;
  1390. }
  1391. switch (virt_dev->cmd_status) {
  1392. case COMP_CTX_STATE:
  1393. case COMP_EBADSLT:
  1394. xhci_err(xhci, "Setup ERROR: address device command for slot %d.\n",
  1395. udev->slot_id);
  1396. ret = -EINVAL;
  1397. break;
  1398. case COMP_TX_ERR:
  1399. dev_warn(&udev->dev, "Device not responding to set address.\n");
  1400. ret = -EPROTO;
  1401. break;
  1402. case COMP_SUCCESS:
  1403. xhci_dbg(xhci, "Successful Address Device command\n");
  1404. break;
  1405. default:
  1406. xhci_err(xhci, "ERROR: unexpected command completion "
  1407. "code 0x%x.\n", virt_dev->cmd_status);
  1408. xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
  1409. xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
  1410. ret = -EINVAL;
  1411. break;
  1412. }
  1413. if (ret) {
  1414. return ret;
  1415. }
  1416. temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
  1417. xhci_dbg(xhci, "Op regs DCBAA ptr = %#016llx\n", temp_64);
  1418. xhci_dbg(xhci, "Slot ID %d dcbaa entry @%p = %#016llx\n",
  1419. udev->slot_id,
  1420. &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
  1421. (unsigned long long)
  1422. xhci->dcbaa->dev_context_ptrs[udev->slot_id]);
  1423. xhci_dbg(xhci, "Output Context DMA address = %#08llx\n",
  1424. (unsigned long long)virt_dev->out_ctx->dma);
  1425. xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
  1426. xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
  1427. xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
  1428. xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
  1429. /*
  1430. * USB core uses address 1 for the roothubs, so we add one to the
  1431. * address given back to us by the HC.
  1432. */
  1433. slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
  1434. udev->devnum = (slot_ctx->dev_state & DEV_ADDR_MASK) + 1;
  1435. /* Zero the input context control for later use */
  1436. ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
  1437. ctrl_ctx->add_flags = 0;
  1438. ctrl_ctx->drop_flags = 0;
  1439. xhci_dbg(xhci, "Device address = %d\n", udev->devnum);
  1440. /* XXX Meh, not sure if anyone else but choose_address uses this. */
  1441. set_bit(udev->devnum, udev->bus->devmap.devicemap);
  1442. return 0;
  1443. }
  1444. /* Once a hub descriptor is fetched for a device, we need to update the xHC's
  1445. * internal data structures for the device.
  1446. */
  1447. int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
  1448. struct usb_tt *tt, gfp_t mem_flags)
  1449. {
  1450. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1451. struct xhci_virt_device *vdev;
  1452. struct xhci_command *config_cmd;
  1453. struct xhci_input_control_ctx *ctrl_ctx;
  1454. struct xhci_slot_ctx *slot_ctx;
  1455. unsigned long flags;
  1456. unsigned think_time;
  1457. int ret;
  1458. /* Ignore root hubs */
  1459. if (!hdev->parent)
  1460. return 0;
  1461. vdev = xhci->devs[hdev->slot_id];
  1462. if (!vdev) {
  1463. xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
  1464. return -EINVAL;
  1465. }
  1466. config_cmd = xhci_alloc_command(xhci, true, mem_flags);
  1467. if (!config_cmd) {
  1468. xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
  1469. return -ENOMEM;
  1470. }
  1471. spin_lock_irqsave(&xhci->lock, flags);
  1472. xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
  1473. ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
  1474. ctrl_ctx->add_flags |= SLOT_FLAG;
  1475. slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
  1476. slot_ctx->dev_info |= DEV_HUB;
  1477. if (tt->multi)
  1478. slot_ctx->dev_info |= DEV_MTT;
  1479. if (xhci->hci_version > 0x95) {
  1480. xhci_dbg(xhci, "xHCI version %x needs hub "
  1481. "TT think time and number of ports\n",
  1482. (unsigned int) xhci->hci_version);
  1483. slot_ctx->dev_info2 |= XHCI_MAX_PORTS(hdev->maxchild);
  1484. /* Set TT think time - convert from ns to FS bit times.
  1485. * 0 = 8 FS bit times, 1 = 16 FS bit times,
  1486. * 2 = 24 FS bit times, 3 = 32 FS bit times.
  1487. */
  1488. think_time = tt->think_time;
  1489. if (think_time != 0)
  1490. think_time = (think_time / 666) - 1;
  1491. slot_ctx->tt_info |= TT_THINK_TIME(think_time);
  1492. } else {
  1493. xhci_dbg(xhci, "xHCI version %x doesn't need hub "
  1494. "TT think time or number of ports\n",
  1495. (unsigned int) xhci->hci_version);
  1496. }
  1497. slot_ctx->dev_state = 0;
  1498. spin_unlock_irqrestore(&xhci->lock, flags);
  1499. xhci_dbg(xhci, "Set up %s for hub device.\n",
  1500. (xhci->hci_version > 0x95) ?
  1501. "configure endpoint" : "evaluate context");
  1502. xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
  1503. xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
  1504. /* Issue and wait for the configure endpoint or
  1505. * evaluate context command.
  1506. */
  1507. if (xhci->hci_version > 0x95)
  1508. ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
  1509. false, false);
  1510. else
  1511. ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
  1512. true, false);
  1513. xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
  1514. xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
  1515. xhci_free_command(xhci, config_cmd);
  1516. return ret;
  1517. }
  1518. int xhci_get_frame(struct usb_hcd *hcd)
  1519. {
  1520. struct xhci_hcd *xhci = hcd_to_xhci(hcd);
  1521. /* EHCI mods by the periodic size. Why? */
  1522. return xhci_readl(xhci, &xhci->run_regs->microframe_index) >> 3;
  1523. }
  1524. MODULE_DESCRIPTION(DRIVER_DESC);
  1525. MODULE_AUTHOR(DRIVER_AUTHOR);
  1526. MODULE_LICENSE("GPL");
  1527. static int __init xhci_hcd_init(void)
  1528. {
  1529. #ifdef CONFIG_PCI
  1530. int retval = 0;
  1531. retval = xhci_register_pci();
  1532. if (retval < 0) {
  1533. printk(KERN_DEBUG "Problem registering PCI driver.");
  1534. return retval;
  1535. }
  1536. #endif
  1537. /*
  1538. * Check the compiler generated sizes of structures that must be laid
  1539. * out in specific ways for hardware access.
  1540. */
  1541. BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
  1542. BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
  1543. BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
  1544. /* xhci_device_control has eight fields, and also
  1545. * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
  1546. */
  1547. BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
  1548. BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
  1549. BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
  1550. BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
  1551. BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
  1552. /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
  1553. BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
  1554. BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
  1555. return 0;
  1556. }
  1557. module_init(xhci_hcd_init);
  1558. static void __exit xhci_hcd_cleanup(void)
  1559. {
  1560. #ifdef CONFIG_PCI
  1561. xhci_unregister_pci();
  1562. #endif
  1563. }
  1564. module_exit(xhci_hcd_cleanup);