cx18-i2c.c 8.4 KB

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  1. /*
  2. * cx18 I2C functions
  3. *
  4. * Derived from ivtv-i2c.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@radix.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-io.h"
  26. #include "cx18-cards.h"
  27. #include "cx18-gpio.h"
  28. #include "cx18-i2c.h"
  29. #include "cx18-irq.h"
  30. #define CX18_REG_I2C_1_WR 0xf15000
  31. #define CX18_REG_I2C_1_RD 0xf15008
  32. #define CX18_REG_I2C_2_WR 0xf25100
  33. #define CX18_REG_I2C_2_RD 0xf25108
  34. #define SETSCL_BIT 0x0001
  35. #define SETSDL_BIT 0x0002
  36. #define GETSCL_BIT 0x0004
  37. #define GETSDL_BIT 0x0008
  38. #define CX18_CS5345_I2C_ADDR 0x4c
  39. /* This array should match the CX18_HW_ defines */
  40. static const u8 hw_addrs[] = {
  41. 0, /* CX18_HW_TUNER */
  42. 0, /* CX18_HW_TVEEPROM */
  43. CX18_CS5345_I2C_ADDR, /* CX18_HW_CS5345 */
  44. 0, /* CX18_HW_DVB */
  45. 0, /* CX18_HW_418_AV */
  46. 0, /* CX18_HW_GPIO_MUX */
  47. 0, /* CX18_HW_GPIO_RESET_CTRL */
  48. };
  49. /* This array should match the CX18_HW_ defines */
  50. /* This might well become a card-specific array */
  51. static const u8 hw_bus[] = {
  52. 1, /* CX18_HW_TUNER */
  53. 0, /* CX18_HW_TVEEPROM */
  54. 0, /* CX18_HW_CS5345 */
  55. 0, /* CX18_HW_DVB */
  56. 0, /* CX18_HW_418_AV */
  57. 0, /* CX18_HW_GPIO_MUX */
  58. 0, /* CX18_HW_GPIO_RESET_CTRL */
  59. };
  60. /* This array should match the CX18_HW_ defines */
  61. static const char * const hw_modules[] = {
  62. "tuner", /* CX18_HW_TUNER */
  63. NULL, /* CX18_HW_TVEEPROM */
  64. "cs5345", /* CX18_HW_CS5345 */
  65. NULL, /* CX18_HW_DVB */
  66. NULL, /* CX18_HW_418_AV */
  67. NULL, /* CX18_HW_GPIO_MUX */
  68. NULL, /* CX18_HW_GPIO_RESET_CTRL */
  69. };
  70. /* This array should match the CX18_HW_ defines */
  71. static const char * const hw_devicenames[] = {
  72. "tuner",
  73. "tveeprom",
  74. "cs5345",
  75. "cx23418_DTV",
  76. "cx23418_AV",
  77. "gpio_mux",
  78. "gpio_reset_ctrl",
  79. };
  80. int cx18_i2c_register(struct cx18 *cx, unsigned idx)
  81. {
  82. struct v4l2_subdev *sd;
  83. int bus = hw_bus[idx];
  84. struct i2c_adapter *adap = &cx->i2c_adap[bus];
  85. const char *mod = hw_modules[idx];
  86. const char *type = hw_devicenames[idx];
  87. u32 hw = 1 << idx;
  88. if (idx >= ARRAY_SIZE(hw_addrs))
  89. return -1;
  90. if (hw == CX18_HW_TUNER) {
  91. /* special tuner group handling */
  92. sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
  93. adap, mod, type, cx->card_i2c->radio);
  94. if (sd != NULL)
  95. sd->grp_id = hw;
  96. sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
  97. adap, mod, type, cx->card_i2c->demod);
  98. if (sd != NULL)
  99. sd->grp_id = hw;
  100. sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
  101. adap, mod, type, cx->card_i2c->tv);
  102. if (sd != NULL)
  103. sd->grp_id = hw;
  104. return sd != NULL ? 0 : -1;
  105. }
  106. /* Is it not an I2C device or one we do not wish to register? */
  107. if (!hw_addrs[idx])
  108. return -1;
  109. /* It's an I2C device other than an analog tuner */
  110. sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, mod, type, hw_addrs[idx]);
  111. if (sd != NULL)
  112. sd->grp_id = hw;
  113. return sd != NULL ? 0 : -1;
  114. }
  115. /* Find the first member of the subdev group id in hw */
  116. struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw)
  117. {
  118. struct v4l2_subdev *result = NULL;
  119. struct v4l2_subdev *sd;
  120. spin_lock(&cx->v4l2_dev.lock);
  121. v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
  122. if (sd->grp_id == hw) {
  123. result = sd;
  124. break;
  125. }
  126. }
  127. spin_unlock(&cx->v4l2_dev.lock);
  128. return result;
  129. }
  130. static void cx18_setscl(void *data, int state)
  131. {
  132. struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
  133. int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
  134. u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
  135. u32 r = cx18_read_reg(cx, addr);
  136. if (state)
  137. cx18_write_reg(cx, r | SETSCL_BIT, addr);
  138. else
  139. cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
  140. }
  141. static void cx18_setsda(void *data, int state)
  142. {
  143. struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
  144. int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
  145. u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
  146. u32 r = cx18_read_reg(cx, addr);
  147. if (state)
  148. cx18_write_reg(cx, r | SETSDL_BIT, addr);
  149. else
  150. cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
  151. }
  152. static int cx18_getscl(void *data)
  153. {
  154. struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
  155. int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
  156. u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
  157. return cx18_read_reg(cx, addr) & GETSCL_BIT;
  158. }
  159. static int cx18_getsda(void *data)
  160. {
  161. struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
  162. int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
  163. u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
  164. return cx18_read_reg(cx, addr) & GETSDL_BIT;
  165. }
  166. /* template for i2c-bit-algo */
  167. static struct i2c_adapter cx18_i2c_adap_template = {
  168. .name = "cx18 i2c driver",
  169. .id = I2C_HW_B_CX2341X,
  170. .algo = NULL, /* set by i2c-algo-bit */
  171. .algo_data = NULL, /* filled from template */
  172. .owner = THIS_MODULE,
  173. };
  174. #define CX18_SCL_PERIOD (10) /* usecs. 10 usec is period for a 100 KHz clock */
  175. #define CX18_ALGO_BIT_TIMEOUT (2) /* seconds */
  176. static struct i2c_algo_bit_data cx18_i2c_algo_template = {
  177. .setsda = cx18_setsda,
  178. .setscl = cx18_setscl,
  179. .getsda = cx18_getsda,
  180. .getscl = cx18_getscl,
  181. .udelay = CX18_SCL_PERIOD/2, /* 1/2 clock period in usec*/
  182. .timeout = CX18_ALGO_BIT_TIMEOUT*HZ /* jiffies */
  183. };
  184. /* init + register i2c algo-bit adapter */
  185. int init_cx18_i2c(struct cx18 *cx)
  186. {
  187. int i;
  188. CX18_DEBUG_I2C("i2c init\n");
  189. for (i = 0; i < 2; i++) {
  190. /* Setup algorithm for adapter */
  191. memcpy(&cx->i2c_algo[i], &cx18_i2c_algo_template,
  192. sizeof(struct i2c_algo_bit_data));
  193. cx->i2c_algo_cb_data[i].cx = cx;
  194. cx->i2c_algo_cb_data[i].bus_index = i;
  195. cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];
  196. /* Setup adapter */
  197. memcpy(&cx->i2c_adap[i], &cx18_i2c_adap_template,
  198. sizeof(struct i2c_adapter));
  199. cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
  200. sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
  201. " #%d-%d", cx->instance, i);
  202. i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
  203. cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
  204. }
  205. if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
  206. /* Reset/Unreset I2C hardware block */
  207. /* Clock select 220MHz */
  208. cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
  209. 0x00000000, 0x10001000);
  210. /* Clock Enable */
  211. cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
  212. 0x00001000, 0x10001000);
  213. }
  214. /* courtesy of Steven Toth <stoth@hauppauge.com> */
  215. cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
  216. mdelay(10);
  217. cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
  218. mdelay(10);
  219. cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
  220. mdelay(10);
  221. /* Set to edge-triggered intrs. */
  222. cx18_write_reg(cx, 0x00c00000, 0xc730c8);
  223. /* Clear any stale intrs */
  224. cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
  225. ~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);
  226. /* Hw I2C1 Clock Freq ~100kHz */
  227. cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
  228. cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
  229. cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
  230. /* Hw I2C2 Clock Freq ~100kHz */
  231. cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
  232. cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
  233. cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
  234. cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
  235. core, reset, (u32) CX18_GPIO_RESET_I2C);
  236. return i2c_bit_add_bus(&cx->i2c_adap[0]) ||
  237. i2c_bit_add_bus(&cx->i2c_adap[1]);
  238. }
  239. void exit_cx18_i2c(struct cx18 *cx)
  240. {
  241. int i;
  242. CX18_DEBUG_I2C("i2c exit\n");
  243. cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
  244. CX18_REG_I2C_1_WR);
  245. cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
  246. CX18_REG_I2C_2_WR);
  247. for (i = 0; i < 2; i++) {
  248. i2c_del_adapter(&cx->i2c_adap[i]);
  249. }
  250. }
  251. /*
  252. Hauppauge HVR1600 should have:
  253. 32 cx24227
  254. 98 unknown
  255. a0 eeprom
  256. c2 tuner
  257. e? zilog ir
  258. */