adxrs450.c 11 KB

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  1. /*
  2. * ADXRS450/ADXRS453 Digital Output Gyroscope Driver
  3. *
  4. * Copyright 2011 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2.
  7. */
  8. #include <linux/interrupt.h>
  9. #include <linux/irq.h>
  10. #include <linux/delay.h>
  11. #include <linux/mutex.h>
  12. #include <linux/device.h>
  13. #include <linux/kernel.h>
  14. #include <linux/spi/spi.h>
  15. #include <linux/slab.h>
  16. #include <linux/sysfs.h>
  17. #include <linux/list.h>
  18. #include <linux/module.h>
  19. #include <linux/iio/iio.h>
  20. #include <linux/iio/sysfs.h>
  21. #define ADXRS450_STARTUP_DELAY 50 /* ms */
  22. /* The MSB for the spi commands */
  23. #define ADXRS450_SENSOR_DATA (0x20 << 24)
  24. #define ADXRS450_WRITE_DATA (0x40 << 24)
  25. #define ADXRS450_READ_DATA (0x80 << 24)
  26. #define ADXRS450_RATE1 0x00 /* Rate Registers */
  27. #define ADXRS450_TEMP1 0x02 /* Temperature Registers */
  28. #define ADXRS450_LOCST1 0x04 /* Low CST Memory Registers */
  29. #define ADXRS450_HICST1 0x06 /* High CST Memory Registers */
  30. #define ADXRS450_QUAD1 0x08 /* Quad Memory Registers */
  31. #define ADXRS450_FAULT1 0x0A /* Fault Registers */
  32. #define ADXRS450_PID1 0x0C /* Part ID Register 1 */
  33. #define ADXRS450_SNH 0x0E /* Serial Number Registers, 4 bytes */
  34. #define ADXRS450_SNL 0x10
  35. #define ADXRS450_DNC1 0x12 /* Dynamic Null Correction Registers */
  36. /* Check bits */
  37. #define ADXRS450_P 0x01
  38. #define ADXRS450_CHK 0x02
  39. #define ADXRS450_CST 0x04
  40. #define ADXRS450_PWR 0x08
  41. #define ADXRS450_POR 0x10
  42. #define ADXRS450_NVM 0x20
  43. #define ADXRS450_Q 0x40
  44. #define ADXRS450_PLL 0x80
  45. #define ADXRS450_UV 0x100
  46. #define ADXRS450_OV 0x200
  47. #define ADXRS450_AMP 0x400
  48. #define ADXRS450_FAIL 0x800
  49. #define ADXRS450_WRERR_MASK (0x7 << 29)
  50. #define ADXRS450_MAX_RX 4
  51. #define ADXRS450_MAX_TX 4
  52. #define ADXRS450_GET_ST(a) ((a >> 26) & 0x3)
  53. enum {
  54. ID_ADXRS450,
  55. ID_ADXRS453,
  56. };
  57. /**
  58. * struct adxrs450_state - device instance specific data
  59. * @us: actual spi_device
  60. * @buf_lock: mutex to protect tx and rx
  61. * @tx: transmit buffer
  62. * @rx: receive buffer
  63. **/
  64. struct adxrs450_state {
  65. struct spi_device *us;
  66. struct mutex buf_lock;
  67. __be32 tx ____cacheline_aligned;
  68. __be32 rx;
  69. };
  70. /**
  71. * adxrs450_spi_read_reg_16() - read 2 bytes from a register pair
  72. * @indio_dev: device associated with child of actual iio_dev
  73. * @reg_address: the address of the lower of the two registers, which should be
  74. * an even address, the second register's address is reg_address + 1.
  75. * @val: somewhere to pass back the value read
  76. **/
  77. static int adxrs450_spi_read_reg_16(struct iio_dev *indio_dev,
  78. u8 reg_address,
  79. u16 *val)
  80. {
  81. struct spi_message msg;
  82. struct adxrs450_state *st = iio_priv(indio_dev);
  83. u32 tx;
  84. int ret;
  85. struct spi_transfer xfers[] = {
  86. {
  87. .tx_buf = &st->tx,
  88. .bits_per_word = 8,
  89. .len = sizeof(st->tx),
  90. .cs_change = 1,
  91. }, {
  92. .rx_buf = &st->rx,
  93. .bits_per_word = 8,
  94. .len = sizeof(st->rx),
  95. },
  96. };
  97. mutex_lock(&st->buf_lock);
  98. tx = ADXRS450_READ_DATA | (reg_address << 17);
  99. if (!(hweight32(tx) & 1))
  100. tx |= ADXRS450_P;
  101. st->tx = cpu_to_be32(tx);
  102. spi_message_init(&msg);
  103. spi_message_add_tail(&xfers[0], &msg);
  104. spi_message_add_tail(&xfers[1], &msg);
  105. ret = spi_sync(st->us, &msg);
  106. if (ret) {
  107. dev_err(&st->us->dev, "problem while reading 16 bit register 0x%02x\n",
  108. reg_address);
  109. goto error_ret;
  110. }
  111. *val = (be32_to_cpu(st->rx) >> 5) & 0xFFFF;
  112. error_ret:
  113. mutex_unlock(&st->buf_lock);
  114. return ret;
  115. }
  116. /**
  117. * adxrs450_spi_write_reg_16() - write 2 bytes data to a register pair
  118. * @indio_dev: device associated with child of actual actual iio_dev
  119. * @reg_address: the address of the lower of the two registers,which should be
  120. * an even address, the second register's address is reg_address + 1.
  121. * @val: value to be written.
  122. **/
  123. static int adxrs450_spi_write_reg_16(struct iio_dev *indio_dev,
  124. u8 reg_address,
  125. u16 val)
  126. {
  127. struct adxrs450_state *st = iio_priv(indio_dev);
  128. u32 tx;
  129. int ret;
  130. mutex_lock(&st->buf_lock);
  131. tx = ADXRS450_WRITE_DATA | (reg_address << 17) | (val << 1);
  132. if (!(hweight32(tx) & 1))
  133. tx |= ADXRS450_P;
  134. st->tx = cpu_to_be32(tx);
  135. ret = spi_write(st->us, &st->tx, sizeof(st->tx));
  136. if (ret)
  137. dev_err(&st->us->dev, "problem while writing 16 bit register 0x%02x\n",
  138. reg_address);
  139. usleep_range(100, 1000); /* enforce sequential transfer delay 0.1ms */
  140. mutex_unlock(&st->buf_lock);
  141. return ret;
  142. }
  143. /**
  144. * adxrs450_spi_sensor_data() - read 2 bytes sensor data
  145. * @indio_dev: device associated with child of actual iio_dev
  146. * @val: somewhere to pass back the value read
  147. **/
  148. static int adxrs450_spi_sensor_data(struct iio_dev *indio_dev, s16 *val)
  149. {
  150. struct spi_message msg;
  151. struct adxrs450_state *st = iio_priv(indio_dev);
  152. int ret;
  153. struct spi_transfer xfers[] = {
  154. {
  155. .tx_buf = &st->tx,
  156. .bits_per_word = 8,
  157. .len = sizeof(st->tx),
  158. .cs_change = 1,
  159. }, {
  160. .rx_buf = &st->rx,
  161. .bits_per_word = 8,
  162. .len = sizeof(st->rx),
  163. },
  164. };
  165. mutex_lock(&st->buf_lock);
  166. st->tx = cpu_to_be32(ADXRS450_SENSOR_DATA);
  167. spi_message_init(&msg);
  168. spi_message_add_tail(&xfers[0], &msg);
  169. spi_message_add_tail(&xfers[1], &msg);
  170. ret = spi_sync(st->us, &msg);
  171. if (ret) {
  172. dev_err(&st->us->dev, "Problem while reading sensor data\n");
  173. goto error_ret;
  174. }
  175. *val = (be32_to_cpu(st->rx) >> 10) & 0xFFFF;
  176. error_ret:
  177. mutex_unlock(&st->buf_lock);
  178. return ret;
  179. }
  180. /**
  181. * adxrs450_spi_initial() - use for initializing procedure.
  182. * @st: device instance specific data
  183. * @val: somewhere to pass back the value read
  184. * @chk: Whether to perform fault check
  185. **/
  186. static int adxrs450_spi_initial(struct adxrs450_state *st,
  187. u32 *val, char chk)
  188. {
  189. struct spi_message msg;
  190. int ret;
  191. u32 tx;
  192. struct spi_transfer xfers = {
  193. .tx_buf = &st->tx,
  194. .rx_buf = &st->rx,
  195. .bits_per_word = 8,
  196. .len = sizeof(st->tx),
  197. };
  198. mutex_lock(&st->buf_lock);
  199. tx = ADXRS450_SENSOR_DATA;
  200. if (chk)
  201. tx |= (ADXRS450_CHK | ADXRS450_P);
  202. st->tx = cpu_to_be32(tx);
  203. spi_message_init(&msg);
  204. spi_message_add_tail(&xfers, &msg);
  205. ret = spi_sync(st->us, &msg);
  206. if (ret) {
  207. dev_err(&st->us->dev, "Problem while reading initializing data\n");
  208. goto error_ret;
  209. }
  210. *val = be32_to_cpu(st->rx);
  211. error_ret:
  212. mutex_unlock(&st->buf_lock);
  213. return ret;
  214. }
  215. /* Recommended Startup Sequence by spec */
  216. static int adxrs450_initial_setup(struct iio_dev *indio_dev)
  217. {
  218. u32 t;
  219. u16 data;
  220. int ret;
  221. struct adxrs450_state *st = iio_priv(indio_dev);
  222. msleep(ADXRS450_STARTUP_DELAY*2);
  223. ret = adxrs450_spi_initial(st, &t, 1);
  224. if (ret)
  225. return ret;
  226. if (t != 0x01)
  227. dev_warn(&st->us->dev, "The initial power on response is not correct! Restart without reset?\n");
  228. msleep(ADXRS450_STARTUP_DELAY);
  229. ret = adxrs450_spi_initial(st, &t, 0);
  230. if (ret)
  231. return ret;
  232. msleep(ADXRS450_STARTUP_DELAY);
  233. ret = adxrs450_spi_initial(st, &t, 0);
  234. if (ret)
  235. return ret;
  236. if (((t & 0xff) | 0x01) != 0xff || ADXRS450_GET_ST(t) != 2) {
  237. dev_err(&st->us->dev, "The second response is not correct!\n");
  238. return -EIO;
  239. }
  240. ret = adxrs450_spi_initial(st, &t, 0);
  241. if (ret)
  242. return ret;
  243. if (((t & 0xff) | 0x01) != 0xff || ADXRS450_GET_ST(t) != 2) {
  244. dev_err(&st->us->dev, "The third response is not correct!\n");
  245. return -EIO;
  246. }
  247. ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_FAULT1, &data);
  248. if (ret)
  249. return ret;
  250. if (data & 0x0fff) {
  251. dev_err(&st->us->dev, "The device is not in normal status!\n");
  252. return -EINVAL;
  253. }
  254. return 0;
  255. }
  256. static int adxrs450_write_raw(struct iio_dev *indio_dev,
  257. struct iio_chan_spec const *chan,
  258. int val,
  259. int val2,
  260. long mask)
  261. {
  262. int ret;
  263. switch (mask) {
  264. case IIO_CHAN_INFO_CALIBBIAS:
  265. if (val < -0x400 || val >= 0x400)
  266. return -EINVAL;
  267. ret = adxrs450_spi_write_reg_16(indio_dev,
  268. ADXRS450_DNC1, val);
  269. break;
  270. default:
  271. ret = -EINVAL;
  272. break;
  273. }
  274. return ret;
  275. }
  276. static int adxrs450_read_raw(struct iio_dev *indio_dev,
  277. struct iio_chan_spec const *chan,
  278. int *val,
  279. int *val2,
  280. long mask)
  281. {
  282. int ret;
  283. s16 t;
  284. switch (mask) {
  285. case IIO_CHAN_INFO_RAW:
  286. switch (chan->type) {
  287. case IIO_ANGL_VEL:
  288. ret = adxrs450_spi_sensor_data(indio_dev, &t);
  289. if (ret)
  290. break;
  291. *val = t;
  292. ret = IIO_VAL_INT;
  293. break;
  294. case IIO_TEMP:
  295. ret = adxrs450_spi_read_reg_16(indio_dev,
  296. ADXRS450_TEMP1, &t);
  297. if (ret)
  298. break;
  299. *val = (t >> 6) + 225;
  300. ret = IIO_VAL_INT;
  301. break;
  302. default:
  303. ret = -EINVAL;
  304. break;
  305. }
  306. break;
  307. case IIO_CHAN_INFO_SCALE:
  308. switch (chan->type) {
  309. case IIO_ANGL_VEL:
  310. *val = 0;
  311. *val2 = 218166;
  312. return IIO_VAL_INT_PLUS_NANO;
  313. case IIO_TEMP:
  314. *val = 200;
  315. *val2 = 0;
  316. return IIO_VAL_INT;
  317. default:
  318. return -EINVAL;
  319. }
  320. break;
  321. case IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW:
  322. ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_QUAD1, &t);
  323. if (ret)
  324. break;
  325. *val = t;
  326. ret = IIO_VAL_INT;
  327. break;
  328. case IIO_CHAN_INFO_CALIBBIAS:
  329. ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_DNC1, &t);
  330. if (ret)
  331. break;
  332. *val = sign_extend32(t, 9);
  333. ret = IIO_VAL_INT;
  334. break;
  335. default:
  336. ret = -EINVAL;
  337. break;
  338. }
  339. return ret;
  340. }
  341. static const struct iio_chan_spec adxrs450_channels[2][2] = {
  342. [ID_ADXRS450] = {
  343. {
  344. .type = IIO_ANGL_VEL,
  345. .modified = 1,
  346. .channel2 = IIO_MOD_Z,
  347. .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
  348. IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
  349. IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SEPARATE_BIT |
  350. IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
  351. }, {
  352. .type = IIO_TEMP,
  353. .indexed = 1,
  354. .channel = 0,
  355. .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
  356. IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
  357. }
  358. },
  359. [ID_ADXRS453] = {
  360. {
  361. .type = IIO_ANGL_VEL,
  362. .modified = 1,
  363. .channel2 = IIO_MOD_Z,
  364. .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
  365. IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
  366. IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SEPARATE_BIT,
  367. }, {
  368. .type = IIO_TEMP,
  369. .indexed = 1,
  370. .channel = 0,
  371. .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
  372. IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
  373. }
  374. },
  375. };
  376. static const struct iio_info adxrs450_info = {
  377. .driver_module = THIS_MODULE,
  378. .read_raw = &adxrs450_read_raw,
  379. .write_raw = &adxrs450_write_raw,
  380. };
  381. static int adxrs450_probe(struct spi_device *spi)
  382. {
  383. int ret;
  384. struct adxrs450_state *st;
  385. struct iio_dev *indio_dev;
  386. /* setup the industrialio driver allocated elements */
  387. indio_dev = iio_device_alloc(sizeof(*st));
  388. if (indio_dev == NULL) {
  389. ret = -ENOMEM;
  390. goto error_ret;
  391. }
  392. st = iio_priv(indio_dev);
  393. st->us = spi;
  394. mutex_init(&st->buf_lock);
  395. /* This is only used for removal purposes */
  396. spi_set_drvdata(spi, indio_dev);
  397. indio_dev->dev.parent = &spi->dev;
  398. indio_dev->info = &adxrs450_info;
  399. indio_dev->modes = INDIO_DIRECT_MODE;
  400. indio_dev->channels =
  401. adxrs450_channels[spi_get_device_id(spi)->driver_data];
  402. indio_dev->num_channels = ARRAY_SIZE(adxrs450_channels);
  403. indio_dev->name = spi->dev.driver->name;
  404. ret = iio_device_register(indio_dev);
  405. if (ret)
  406. goto error_free_dev;
  407. /* Get the device into a sane initial state */
  408. ret = adxrs450_initial_setup(indio_dev);
  409. if (ret)
  410. goto error_initial;
  411. return 0;
  412. error_initial:
  413. iio_device_unregister(indio_dev);
  414. error_free_dev:
  415. iio_device_free(indio_dev);
  416. error_ret:
  417. return ret;
  418. }
  419. static int adxrs450_remove(struct spi_device *spi)
  420. {
  421. iio_device_unregister(spi_get_drvdata(spi));
  422. iio_device_free(spi_get_drvdata(spi));
  423. return 0;
  424. }
  425. static const struct spi_device_id adxrs450_id[] = {
  426. {"adxrs450", ID_ADXRS450},
  427. {"adxrs453", ID_ADXRS453},
  428. {}
  429. };
  430. MODULE_DEVICE_TABLE(spi, adxrs450_id);
  431. static struct spi_driver adxrs450_driver = {
  432. .driver = {
  433. .name = "adxrs450",
  434. .owner = THIS_MODULE,
  435. },
  436. .probe = adxrs450_probe,
  437. .remove = adxrs450_remove,
  438. .id_table = adxrs450_id,
  439. };
  440. module_spi_driver(adxrs450_driver);
  441. MODULE_AUTHOR("Cliff Cai <cliff.cai@xxxxxxxxxx>");
  442. MODULE_DESCRIPTION("Analog Devices ADXRS450/ADXRS453 Gyroscope SPI driver");
  443. MODULE_LICENSE("GPL v2");