mmu.c 41 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "kvm.h"
  21. #include "x86.h"
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <asm/page.h>
  28. #include <asm/cmpxchg.h>
  29. #include <asm/io.h>
  30. #undef MMU_DEBUG
  31. #undef AUDIT
  32. #ifdef AUDIT
  33. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  34. #else
  35. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  36. #endif
  37. #ifdef MMU_DEBUG
  38. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  39. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  40. #else
  41. #define pgprintk(x...) do { } while (0)
  42. #define rmap_printk(x...) do { } while (0)
  43. #endif
  44. #if defined(MMU_DEBUG) || defined(AUDIT)
  45. static int dbg = 1;
  46. #endif
  47. #ifndef MMU_DEBUG
  48. #define ASSERT(x) do { } while (0)
  49. #else
  50. #define ASSERT(x) \
  51. if (!(x)) { \
  52. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  53. __FILE__, __LINE__, #x); \
  54. }
  55. #endif
  56. #define PT64_PT_BITS 9
  57. #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  58. #define PT32_PT_BITS 10
  59. #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  60. #define PT_WRITABLE_SHIFT 1
  61. #define PT_PRESENT_MASK (1ULL << 0)
  62. #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  63. #define PT_USER_MASK (1ULL << 2)
  64. #define PT_PWT_MASK (1ULL << 3)
  65. #define PT_PCD_MASK (1ULL << 4)
  66. #define PT_ACCESSED_MASK (1ULL << 5)
  67. #define PT_DIRTY_MASK (1ULL << 6)
  68. #define PT_PAGE_SIZE_MASK (1ULL << 7)
  69. #define PT_PAT_MASK (1ULL << 7)
  70. #define PT_GLOBAL_MASK (1ULL << 8)
  71. #define PT64_NX_MASK (1ULL << 63)
  72. #define PT_PAT_SHIFT 7
  73. #define PT_DIR_PAT_SHIFT 12
  74. #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  75. #define PT32_DIR_PSE36_SIZE 4
  76. #define PT32_DIR_PSE36_SHIFT 13
  77. #define PT32_DIR_PSE36_MASK \
  78. (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  79. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  80. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  81. #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  82. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  83. #define PT64_LEVEL_BITS 9
  84. #define PT64_LEVEL_SHIFT(level) \
  85. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  86. #define PT64_LEVEL_MASK(level) \
  87. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  88. #define PT64_INDEX(address, level)\
  89. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  90. #define PT32_LEVEL_BITS 10
  91. #define PT32_LEVEL_SHIFT(level) \
  92. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  93. #define PT32_LEVEL_MASK(level) \
  94. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  95. #define PT32_INDEX(address, level)\
  96. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  97. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  98. #define PT64_DIR_BASE_ADDR_MASK \
  99. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  100. #define PT32_BASE_ADDR_MASK PAGE_MASK
  101. #define PT32_DIR_BASE_ADDR_MASK \
  102. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  103. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  104. | PT64_NX_MASK)
  105. #define PFERR_PRESENT_MASK (1U << 0)
  106. #define PFERR_WRITE_MASK (1U << 1)
  107. #define PFERR_USER_MASK (1U << 2)
  108. #define PFERR_FETCH_MASK (1U << 4)
  109. #define PT64_ROOT_LEVEL 4
  110. #define PT32_ROOT_LEVEL 2
  111. #define PT32E_ROOT_LEVEL 3
  112. #define PT_DIRECTORY_LEVEL 2
  113. #define PT_PAGE_TABLE_LEVEL 1
  114. #define RMAP_EXT 4
  115. struct kvm_rmap_desc {
  116. u64 *shadow_ptes[RMAP_EXT];
  117. struct kvm_rmap_desc *more;
  118. };
  119. static struct kmem_cache *pte_chain_cache;
  120. static struct kmem_cache *rmap_desc_cache;
  121. static struct kmem_cache *mmu_page_header_cache;
  122. static u64 __read_mostly shadow_trap_nonpresent_pte;
  123. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  124. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  125. {
  126. shadow_trap_nonpresent_pte = trap_pte;
  127. shadow_notrap_nonpresent_pte = notrap_pte;
  128. }
  129. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  130. static int is_write_protection(struct kvm_vcpu *vcpu)
  131. {
  132. return vcpu->cr0 & X86_CR0_WP;
  133. }
  134. static int is_cpuid_PSE36(void)
  135. {
  136. return 1;
  137. }
  138. static int is_nx(struct kvm_vcpu *vcpu)
  139. {
  140. return vcpu->shadow_efer & EFER_NX;
  141. }
  142. static int is_present_pte(unsigned long pte)
  143. {
  144. return pte & PT_PRESENT_MASK;
  145. }
  146. static int is_shadow_present_pte(u64 pte)
  147. {
  148. pte &= ~PT_SHADOW_IO_MARK;
  149. return pte != shadow_trap_nonpresent_pte
  150. && pte != shadow_notrap_nonpresent_pte;
  151. }
  152. static int is_writeble_pte(unsigned long pte)
  153. {
  154. return pte & PT_WRITABLE_MASK;
  155. }
  156. static int is_dirty_pte(unsigned long pte)
  157. {
  158. return pte & PT_DIRTY_MASK;
  159. }
  160. static int is_io_pte(unsigned long pte)
  161. {
  162. return pte & PT_SHADOW_IO_MARK;
  163. }
  164. static int is_rmap_pte(u64 pte)
  165. {
  166. return pte != shadow_trap_nonpresent_pte
  167. && pte != shadow_notrap_nonpresent_pte;
  168. }
  169. static gfn_t pse36_gfn_delta(u32 gpte)
  170. {
  171. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  172. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  173. }
  174. static void set_shadow_pte(u64 *sptep, u64 spte)
  175. {
  176. #ifdef CONFIG_X86_64
  177. set_64bit((unsigned long *)sptep, spte);
  178. #else
  179. set_64bit((unsigned long long *)sptep, spte);
  180. #endif
  181. }
  182. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  183. struct kmem_cache *base_cache, int min)
  184. {
  185. void *obj;
  186. if (cache->nobjs >= min)
  187. return 0;
  188. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  189. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  190. if (!obj)
  191. return -ENOMEM;
  192. cache->objects[cache->nobjs++] = obj;
  193. }
  194. return 0;
  195. }
  196. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  197. {
  198. while (mc->nobjs)
  199. kfree(mc->objects[--mc->nobjs]);
  200. }
  201. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  202. int min)
  203. {
  204. struct page *page;
  205. if (cache->nobjs >= min)
  206. return 0;
  207. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  208. page = alloc_page(GFP_KERNEL);
  209. if (!page)
  210. return -ENOMEM;
  211. set_page_private(page, 0);
  212. cache->objects[cache->nobjs++] = page_address(page);
  213. }
  214. return 0;
  215. }
  216. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  217. {
  218. while (mc->nobjs)
  219. free_page((unsigned long)mc->objects[--mc->nobjs]);
  220. }
  221. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  222. {
  223. int r;
  224. kvm_mmu_free_some_pages(vcpu);
  225. r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
  226. pte_chain_cache, 4);
  227. if (r)
  228. goto out;
  229. r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
  230. rmap_desc_cache, 1);
  231. if (r)
  232. goto out;
  233. r = mmu_topup_memory_cache_page(&vcpu->mmu_page_cache, 8);
  234. if (r)
  235. goto out;
  236. r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
  237. mmu_page_header_cache, 4);
  238. out:
  239. return r;
  240. }
  241. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  242. {
  243. mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
  244. mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
  245. mmu_free_memory_cache_page(&vcpu->mmu_page_cache);
  246. mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
  247. }
  248. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  249. size_t size)
  250. {
  251. void *p;
  252. BUG_ON(!mc->nobjs);
  253. p = mc->objects[--mc->nobjs];
  254. memset(p, 0, size);
  255. return p;
  256. }
  257. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  258. {
  259. return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
  260. sizeof(struct kvm_pte_chain));
  261. }
  262. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  263. {
  264. kfree(pc);
  265. }
  266. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  267. {
  268. return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
  269. sizeof(struct kvm_rmap_desc));
  270. }
  271. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  272. {
  273. kfree(rd);
  274. }
  275. /*
  276. * Take gfn and return the reverse mapping to it.
  277. * Note: gfn must be unaliased before this function get called
  278. */
  279. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn)
  280. {
  281. struct kvm_memory_slot *slot;
  282. slot = gfn_to_memslot(kvm, gfn);
  283. return &slot->rmap[gfn - slot->base_gfn];
  284. }
  285. /*
  286. * Reverse mapping data structures:
  287. *
  288. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  289. * that points to page_address(page).
  290. *
  291. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  292. * containing more mappings.
  293. */
  294. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
  295. {
  296. struct kvm_mmu_page *page;
  297. struct kvm_rmap_desc *desc;
  298. unsigned long *rmapp;
  299. int i;
  300. if (!is_rmap_pte(*spte))
  301. return;
  302. gfn = unalias_gfn(vcpu->kvm, gfn);
  303. page = page_header(__pa(spte));
  304. page->gfns[spte - page->spt] = gfn;
  305. rmapp = gfn_to_rmap(vcpu->kvm, gfn);
  306. if (!*rmapp) {
  307. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  308. *rmapp = (unsigned long)spte;
  309. } else if (!(*rmapp & 1)) {
  310. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  311. desc = mmu_alloc_rmap_desc(vcpu);
  312. desc->shadow_ptes[0] = (u64 *)*rmapp;
  313. desc->shadow_ptes[1] = spte;
  314. *rmapp = (unsigned long)desc | 1;
  315. } else {
  316. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  317. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  318. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  319. desc = desc->more;
  320. if (desc->shadow_ptes[RMAP_EXT-1]) {
  321. desc->more = mmu_alloc_rmap_desc(vcpu);
  322. desc = desc->more;
  323. }
  324. for (i = 0; desc->shadow_ptes[i]; ++i)
  325. ;
  326. desc->shadow_ptes[i] = spte;
  327. }
  328. }
  329. static void rmap_desc_remove_entry(unsigned long *rmapp,
  330. struct kvm_rmap_desc *desc,
  331. int i,
  332. struct kvm_rmap_desc *prev_desc)
  333. {
  334. int j;
  335. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  336. ;
  337. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  338. desc->shadow_ptes[j] = NULL;
  339. if (j != 0)
  340. return;
  341. if (!prev_desc && !desc->more)
  342. *rmapp = (unsigned long)desc->shadow_ptes[0];
  343. else
  344. if (prev_desc)
  345. prev_desc->more = desc->more;
  346. else
  347. *rmapp = (unsigned long)desc->more | 1;
  348. mmu_free_rmap_desc(desc);
  349. }
  350. static void rmap_remove(struct kvm *kvm, u64 *spte)
  351. {
  352. struct kvm_rmap_desc *desc;
  353. struct kvm_rmap_desc *prev_desc;
  354. struct kvm_mmu_page *page;
  355. struct page *release_page;
  356. unsigned long *rmapp;
  357. int i;
  358. if (!is_rmap_pte(*spte))
  359. return;
  360. page = page_header(__pa(spte));
  361. release_page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  362. if (is_writeble_pte(*spte))
  363. kvm_release_page_dirty(release_page);
  364. else
  365. kvm_release_page_clean(release_page);
  366. rmapp = gfn_to_rmap(kvm, page->gfns[spte - page->spt]);
  367. if (!*rmapp) {
  368. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  369. BUG();
  370. } else if (!(*rmapp & 1)) {
  371. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  372. if ((u64 *)*rmapp != spte) {
  373. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  374. spte, *spte);
  375. BUG();
  376. }
  377. *rmapp = 0;
  378. } else {
  379. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  380. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  381. prev_desc = NULL;
  382. while (desc) {
  383. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  384. if (desc->shadow_ptes[i] == spte) {
  385. rmap_desc_remove_entry(rmapp,
  386. desc, i,
  387. prev_desc);
  388. return;
  389. }
  390. prev_desc = desc;
  391. desc = desc->more;
  392. }
  393. BUG();
  394. }
  395. }
  396. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  397. {
  398. struct kvm_rmap_desc *desc;
  399. struct kvm_rmap_desc *prev_desc;
  400. u64 *prev_spte;
  401. int i;
  402. if (!*rmapp)
  403. return NULL;
  404. else if (!(*rmapp & 1)) {
  405. if (!spte)
  406. return (u64 *)*rmapp;
  407. return NULL;
  408. }
  409. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  410. prev_desc = NULL;
  411. prev_spte = NULL;
  412. while (desc) {
  413. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  414. if (prev_spte == spte)
  415. return desc->shadow_ptes[i];
  416. prev_spte = desc->shadow_ptes[i];
  417. }
  418. desc = desc->more;
  419. }
  420. return NULL;
  421. }
  422. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  423. {
  424. unsigned long *rmapp;
  425. u64 *spte;
  426. gfn = unalias_gfn(kvm, gfn);
  427. rmapp = gfn_to_rmap(kvm, gfn);
  428. spte = rmap_next(kvm, rmapp, NULL);
  429. while (spte) {
  430. BUG_ON(!spte);
  431. BUG_ON(!(*spte & PT_PRESENT_MASK));
  432. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  433. if (is_writeble_pte(*spte))
  434. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  435. kvm_flush_remote_tlbs(kvm);
  436. spte = rmap_next(kvm, rmapp, spte);
  437. }
  438. }
  439. #ifdef MMU_DEBUG
  440. static int is_empty_shadow_page(u64 *spt)
  441. {
  442. u64 *pos;
  443. u64 *end;
  444. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  445. if ((*pos & ~PT_SHADOW_IO_MARK) != shadow_trap_nonpresent_pte) {
  446. printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
  447. pos, *pos);
  448. return 0;
  449. }
  450. return 1;
  451. }
  452. #endif
  453. static void kvm_mmu_free_page(struct kvm *kvm,
  454. struct kvm_mmu_page *page_head)
  455. {
  456. ASSERT(is_empty_shadow_page(page_head->spt));
  457. list_del(&page_head->link);
  458. __free_page(virt_to_page(page_head->spt));
  459. __free_page(virt_to_page(page_head->gfns));
  460. kfree(page_head);
  461. ++kvm->n_free_mmu_pages;
  462. }
  463. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  464. {
  465. return gfn;
  466. }
  467. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  468. u64 *parent_pte)
  469. {
  470. struct kvm_mmu_page *page;
  471. if (!vcpu->kvm->n_free_mmu_pages)
  472. return NULL;
  473. page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
  474. sizeof *page);
  475. page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  476. page->gfns = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  477. set_page_private(virt_to_page(page->spt), (unsigned long)page);
  478. list_add(&page->link, &vcpu->kvm->active_mmu_pages);
  479. ASSERT(is_empty_shadow_page(page->spt));
  480. page->slot_bitmap = 0;
  481. page->multimapped = 0;
  482. page->parent_pte = parent_pte;
  483. --vcpu->kvm->n_free_mmu_pages;
  484. return page;
  485. }
  486. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  487. struct kvm_mmu_page *page, u64 *parent_pte)
  488. {
  489. struct kvm_pte_chain *pte_chain;
  490. struct hlist_node *node;
  491. int i;
  492. if (!parent_pte)
  493. return;
  494. if (!page->multimapped) {
  495. u64 *old = page->parent_pte;
  496. if (!old) {
  497. page->parent_pte = parent_pte;
  498. return;
  499. }
  500. page->multimapped = 1;
  501. pte_chain = mmu_alloc_pte_chain(vcpu);
  502. INIT_HLIST_HEAD(&page->parent_ptes);
  503. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  504. pte_chain->parent_ptes[0] = old;
  505. }
  506. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
  507. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  508. continue;
  509. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  510. if (!pte_chain->parent_ptes[i]) {
  511. pte_chain->parent_ptes[i] = parent_pte;
  512. return;
  513. }
  514. }
  515. pte_chain = mmu_alloc_pte_chain(vcpu);
  516. BUG_ON(!pte_chain);
  517. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  518. pte_chain->parent_ptes[0] = parent_pte;
  519. }
  520. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
  521. u64 *parent_pte)
  522. {
  523. struct kvm_pte_chain *pte_chain;
  524. struct hlist_node *node;
  525. int i;
  526. if (!page->multimapped) {
  527. BUG_ON(page->parent_pte != parent_pte);
  528. page->parent_pte = NULL;
  529. return;
  530. }
  531. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
  532. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  533. if (!pte_chain->parent_ptes[i])
  534. break;
  535. if (pte_chain->parent_ptes[i] != parent_pte)
  536. continue;
  537. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  538. && pte_chain->parent_ptes[i + 1]) {
  539. pte_chain->parent_ptes[i]
  540. = pte_chain->parent_ptes[i + 1];
  541. ++i;
  542. }
  543. pte_chain->parent_ptes[i] = NULL;
  544. if (i == 0) {
  545. hlist_del(&pte_chain->link);
  546. mmu_free_pte_chain(pte_chain);
  547. if (hlist_empty(&page->parent_ptes)) {
  548. page->multimapped = 0;
  549. page->parent_pte = NULL;
  550. }
  551. }
  552. return;
  553. }
  554. BUG();
  555. }
  556. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm,
  557. gfn_t gfn)
  558. {
  559. unsigned index;
  560. struct hlist_head *bucket;
  561. struct kvm_mmu_page *page;
  562. struct hlist_node *node;
  563. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  564. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  565. bucket = &kvm->mmu_page_hash[index];
  566. hlist_for_each_entry(page, node, bucket, hash_link)
  567. if (page->gfn == gfn && !page->role.metaphysical) {
  568. pgprintk("%s: found role %x\n",
  569. __FUNCTION__, page->role.word);
  570. return page;
  571. }
  572. return NULL;
  573. }
  574. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  575. gfn_t gfn,
  576. gva_t gaddr,
  577. unsigned level,
  578. int metaphysical,
  579. unsigned hugepage_access,
  580. u64 *parent_pte)
  581. {
  582. union kvm_mmu_page_role role;
  583. unsigned index;
  584. unsigned quadrant;
  585. struct hlist_head *bucket;
  586. struct kvm_mmu_page *page;
  587. struct hlist_node *node;
  588. role.word = 0;
  589. role.glevels = vcpu->mmu.root_level;
  590. role.level = level;
  591. role.metaphysical = metaphysical;
  592. role.hugepage_access = hugepage_access;
  593. if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
  594. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  595. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  596. role.quadrant = quadrant;
  597. }
  598. pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
  599. gfn, role.word);
  600. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  601. bucket = &vcpu->kvm->mmu_page_hash[index];
  602. hlist_for_each_entry(page, node, bucket, hash_link)
  603. if (page->gfn == gfn && page->role.word == role.word) {
  604. mmu_page_add_parent_pte(vcpu, page, parent_pte);
  605. pgprintk("%s: found\n", __FUNCTION__);
  606. return page;
  607. }
  608. page = kvm_mmu_alloc_page(vcpu, parent_pte);
  609. if (!page)
  610. return page;
  611. pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
  612. page->gfn = gfn;
  613. page->role = role;
  614. hlist_add_head(&page->hash_link, bucket);
  615. vcpu->mmu.prefetch_page(vcpu, page);
  616. if (!metaphysical)
  617. rmap_write_protect(vcpu->kvm, gfn);
  618. return page;
  619. }
  620. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  621. struct kvm_mmu_page *page)
  622. {
  623. unsigned i;
  624. u64 *pt;
  625. u64 ent;
  626. pt = page->spt;
  627. if (page->role.level == PT_PAGE_TABLE_LEVEL) {
  628. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  629. if (is_shadow_present_pte(pt[i]))
  630. rmap_remove(kvm, &pt[i]);
  631. pt[i] = shadow_trap_nonpresent_pte;
  632. }
  633. kvm_flush_remote_tlbs(kvm);
  634. return;
  635. }
  636. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  637. ent = pt[i];
  638. pt[i] = shadow_trap_nonpresent_pte;
  639. if (!is_shadow_present_pte(ent))
  640. continue;
  641. ent &= PT64_BASE_ADDR_MASK;
  642. mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
  643. }
  644. kvm_flush_remote_tlbs(kvm);
  645. }
  646. static void kvm_mmu_put_page(struct kvm_mmu_page *page,
  647. u64 *parent_pte)
  648. {
  649. mmu_page_remove_parent_pte(page, parent_pte);
  650. }
  651. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  652. {
  653. int i;
  654. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  655. if (kvm->vcpus[i])
  656. kvm->vcpus[i]->last_pte_updated = NULL;
  657. }
  658. static void kvm_mmu_zap_page(struct kvm *kvm,
  659. struct kvm_mmu_page *page)
  660. {
  661. u64 *parent_pte;
  662. ++kvm->stat.mmu_shadow_zapped;
  663. while (page->multimapped || page->parent_pte) {
  664. if (!page->multimapped)
  665. parent_pte = page->parent_pte;
  666. else {
  667. struct kvm_pte_chain *chain;
  668. chain = container_of(page->parent_ptes.first,
  669. struct kvm_pte_chain, link);
  670. parent_pte = chain->parent_ptes[0];
  671. }
  672. BUG_ON(!parent_pte);
  673. kvm_mmu_put_page(page, parent_pte);
  674. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  675. }
  676. kvm_mmu_page_unlink_children(kvm, page);
  677. if (!page->root_count) {
  678. hlist_del(&page->hash_link);
  679. kvm_mmu_free_page(kvm, page);
  680. } else
  681. list_move(&page->link, &kvm->active_mmu_pages);
  682. kvm_mmu_reset_last_pte_updated(kvm);
  683. }
  684. /*
  685. * Changing the number of mmu pages allocated to the vm
  686. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  687. */
  688. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  689. {
  690. /*
  691. * If we set the number of mmu pages to be smaller be than the
  692. * number of actived pages , we must to free some mmu pages before we
  693. * change the value
  694. */
  695. if ((kvm->n_alloc_mmu_pages - kvm->n_free_mmu_pages) >
  696. kvm_nr_mmu_pages) {
  697. int n_used_mmu_pages = kvm->n_alloc_mmu_pages
  698. - kvm->n_free_mmu_pages;
  699. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  700. struct kvm_mmu_page *page;
  701. page = container_of(kvm->active_mmu_pages.prev,
  702. struct kvm_mmu_page, link);
  703. kvm_mmu_zap_page(kvm, page);
  704. n_used_mmu_pages--;
  705. }
  706. kvm->n_free_mmu_pages = 0;
  707. }
  708. else
  709. kvm->n_free_mmu_pages += kvm_nr_mmu_pages
  710. - kvm->n_alloc_mmu_pages;
  711. kvm->n_alloc_mmu_pages = kvm_nr_mmu_pages;
  712. }
  713. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  714. {
  715. unsigned index;
  716. struct hlist_head *bucket;
  717. struct kvm_mmu_page *page;
  718. struct hlist_node *node, *n;
  719. int r;
  720. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  721. r = 0;
  722. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  723. bucket = &kvm->mmu_page_hash[index];
  724. hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
  725. if (page->gfn == gfn && !page->role.metaphysical) {
  726. pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
  727. page->role.word);
  728. kvm_mmu_zap_page(kvm, page);
  729. r = 1;
  730. }
  731. return r;
  732. }
  733. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  734. {
  735. struct kvm_mmu_page *page;
  736. while ((page = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  737. pgprintk("%s: zap %lx %x\n",
  738. __FUNCTION__, gfn, page->role.word);
  739. kvm_mmu_zap_page(kvm, page);
  740. }
  741. }
  742. static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
  743. {
  744. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
  745. struct kvm_mmu_page *page_head = page_header(__pa(pte));
  746. __set_bit(slot, &page_head->slot_bitmap);
  747. }
  748. hpa_t gpa_to_hpa(struct kvm *kvm, gpa_t gpa)
  749. {
  750. struct page *page;
  751. hpa_t hpa;
  752. ASSERT((gpa & HPA_ERR_MASK) == 0);
  753. page = gfn_to_page(kvm, gpa >> PAGE_SHIFT);
  754. hpa = ((hpa_t)page_to_pfn(page) << PAGE_SHIFT) | (gpa & (PAGE_SIZE-1));
  755. if (is_error_page(page))
  756. return hpa | HPA_ERR_MASK;
  757. return hpa;
  758. }
  759. hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
  760. {
  761. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  762. if (gpa == UNMAPPED_GVA)
  763. return UNMAPPED_GVA;
  764. return gpa_to_hpa(vcpu->kvm, gpa);
  765. }
  766. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  767. {
  768. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  769. if (gpa == UNMAPPED_GVA)
  770. return NULL;
  771. return pfn_to_page(gpa_to_hpa(vcpu->kvm, gpa) >> PAGE_SHIFT);
  772. }
  773. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  774. {
  775. }
  776. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
  777. {
  778. int level = PT32E_ROOT_LEVEL;
  779. hpa_t table_addr = vcpu->mmu.root_hpa;
  780. struct page *page;
  781. page = pfn_to_page(p >> PAGE_SHIFT);
  782. for (; ; level--) {
  783. u32 index = PT64_INDEX(v, level);
  784. u64 *table;
  785. u64 pte;
  786. ASSERT(VALID_PAGE(table_addr));
  787. table = __va(table_addr);
  788. if (level == 1) {
  789. int was_rmapped;
  790. pte = table[index];
  791. was_rmapped = is_rmap_pte(pte);
  792. if (is_shadow_present_pte(pte) && is_writeble_pte(pte)) {
  793. kvm_release_page_clean(page);
  794. return 0;
  795. }
  796. mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
  797. page_header_update_slot(vcpu->kvm, table, v);
  798. table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
  799. PT_USER_MASK;
  800. if (!was_rmapped)
  801. rmap_add(vcpu, &table[index], v >> PAGE_SHIFT);
  802. else
  803. kvm_release_page_clean(page);
  804. return 0;
  805. }
  806. if (table[index] == shadow_trap_nonpresent_pte) {
  807. struct kvm_mmu_page *new_table;
  808. gfn_t pseudo_gfn;
  809. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  810. >> PAGE_SHIFT;
  811. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  812. v, level - 1,
  813. 1, 3, &table[index]);
  814. if (!new_table) {
  815. pgprintk("nonpaging_map: ENOMEM\n");
  816. kvm_release_page_clean(page);
  817. return -ENOMEM;
  818. }
  819. table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
  820. | PT_WRITABLE_MASK | PT_USER_MASK;
  821. }
  822. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  823. }
  824. }
  825. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  826. struct kvm_mmu_page *sp)
  827. {
  828. int i;
  829. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  830. sp->spt[i] = shadow_trap_nonpresent_pte;
  831. }
  832. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  833. {
  834. int i;
  835. struct kvm_mmu_page *page;
  836. if (!VALID_PAGE(vcpu->mmu.root_hpa))
  837. return;
  838. #ifdef CONFIG_X86_64
  839. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  840. hpa_t root = vcpu->mmu.root_hpa;
  841. page = page_header(root);
  842. --page->root_count;
  843. vcpu->mmu.root_hpa = INVALID_PAGE;
  844. return;
  845. }
  846. #endif
  847. for (i = 0; i < 4; ++i) {
  848. hpa_t root = vcpu->mmu.pae_root[i];
  849. if (root) {
  850. root &= PT64_BASE_ADDR_MASK;
  851. page = page_header(root);
  852. --page->root_count;
  853. }
  854. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  855. }
  856. vcpu->mmu.root_hpa = INVALID_PAGE;
  857. }
  858. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  859. {
  860. int i;
  861. gfn_t root_gfn;
  862. struct kvm_mmu_page *page;
  863. root_gfn = vcpu->cr3 >> PAGE_SHIFT;
  864. #ifdef CONFIG_X86_64
  865. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  866. hpa_t root = vcpu->mmu.root_hpa;
  867. ASSERT(!VALID_PAGE(root));
  868. page = kvm_mmu_get_page(vcpu, root_gfn, 0,
  869. PT64_ROOT_LEVEL, 0, 0, NULL);
  870. root = __pa(page->spt);
  871. ++page->root_count;
  872. vcpu->mmu.root_hpa = root;
  873. return;
  874. }
  875. #endif
  876. for (i = 0; i < 4; ++i) {
  877. hpa_t root = vcpu->mmu.pae_root[i];
  878. ASSERT(!VALID_PAGE(root));
  879. if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
  880. if (!is_present_pte(vcpu->pdptrs[i])) {
  881. vcpu->mmu.pae_root[i] = 0;
  882. continue;
  883. }
  884. root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
  885. } else if (vcpu->mmu.root_level == 0)
  886. root_gfn = 0;
  887. page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  888. PT32_ROOT_LEVEL, !is_paging(vcpu),
  889. 0, NULL);
  890. root = __pa(page->spt);
  891. ++page->root_count;
  892. vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
  893. }
  894. vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
  895. }
  896. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  897. {
  898. return vaddr;
  899. }
  900. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  901. u32 error_code)
  902. {
  903. gpa_t addr = gva;
  904. hpa_t paddr;
  905. int r;
  906. r = mmu_topup_memory_caches(vcpu);
  907. if (r)
  908. return r;
  909. ASSERT(vcpu);
  910. ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
  911. paddr = gpa_to_hpa(vcpu->kvm, addr & PT64_BASE_ADDR_MASK);
  912. if (is_error_hpa(paddr)) {
  913. kvm_release_page_clean(pfn_to_page((paddr & PT64_BASE_ADDR_MASK)
  914. >> PAGE_SHIFT));
  915. return 1;
  916. }
  917. return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
  918. }
  919. static void nonpaging_free(struct kvm_vcpu *vcpu)
  920. {
  921. mmu_free_roots(vcpu);
  922. }
  923. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  924. {
  925. struct kvm_mmu *context = &vcpu->mmu;
  926. context->new_cr3 = nonpaging_new_cr3;
  927. context->page_fault = nonpaging_page_fault;
  928. context->gva_to_gpa = nonpaging_gva_to_gpa;
  929. context->free = nonpaging_free;
  930. context->prefetch_page = nonpaging_prefetch_page;
  931. context->root_level = 0;
  932. context->shadow_root_level = PT32E_ROOT_LEVEL;
  933. context->root_hpa = INVALID_PAGE;
  934. return 0;
  935. }
  936. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  937. {
  938. ++vcpu->stat.tlb_flush;
  939. kvm_x86_ops->tlb_flush(vcpu);
  940. }
  941. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  942. {
  943. pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
  944. mmu_free_roots(vcpu);
  945. }
  946. static void inject_page_fault(struct kvm_vcpu *vcpu,
  947. u64 addr,
  948. u32 err_code)
  949. {
  950. kvm_x86_ops->inject_page_fault(vcpu, addr, err_code);
  951. }
  952. static void paging_free(struct kvm_vcpu *vcpu)
  953. {
  954. nonpaging_free(vcpu);
  955. }
  956. #define PTTYPE 64
  957. #include "paging_tmpl.h"
  958. #undef PTTYPE
  959. #define PTTYPE 32
  960. #include "paging_tmpl.h"
  961. #undef PTTYPE
  962. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  963. {
  964. struct kvm_mmu *context = &vcpu->mmu;
  965. ASSERT(is_pae(vcpu));
  966. context->new_cr3 = paging_new_cr3;
  967. context->page_fault = paging64_page_fault;
  968. context->gva_to_gpa = paging64_gva_to_gpa;
  969. context->prefetch_page = paging64_prefetch_page;
  970. context->free = paging_free;
  971. context->root_level = level;
  972. context->shadow_root_level = level;
  973. context->root_hpa = INVALID_PAGE;
  974. return 0;
  975. }
  976. static int paging64_init_context(struct kvm_vcpu *vcpu)
  977. {
  978. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  979. }
  980. static int paging32_init_context(struct kvm_vcpu *vcpu)
  981. {
  982. struct kvm_mmu *context = &vcpu->mmu;
  983. context->new_cr3 = paging_new_cr3;
  984. context->page_fault = paging32_page_fault;
  985. context->gva_to_gpa = paging32_gva_to_gpa;
  986. context->free = paging_free;
  987. context->prefetch_page = paging32_prefetch_page;
  988. context->root_level = PT32_ROOT_LEVEL;
  989. context->shadow_root_level = PT32E_ROOT_LEVEL;
  990. context->root_hpa = INVALID_PAGE;
  991. return 0;
  992. }
  993. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  994. {
  995. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  996. }
  997. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  998. {
  999. ASSERT(vcpu);
  1000. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1001. if (!is_paging(vcpu))
  1002. return nonpaging_init_context(vcpu);
  1003. else if (is_long_mode(vcpu))
  1004. return paging64_init_context(vcpu);
  1005. else if (is_pae(vcpu))
  1006. return paging32E_init_context(vcpu);
  1007. else
  1008. return paging32_init_context(vcpu);
  1009. }
  1010. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1011. {
  1012. ASSERT(vcpu);
  1013. if (VALID_PAGE(vcpu->mmu.root_hpa)) {
  1014. vcpu->mmu.free(vcpu);
  1015. vcpu->mmu.root_hpa = INVALID_PAGE;
  1016. }
  1017. }
  1018. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1019. {
  1020. destroy_kvm_mmu(vcpu);
  1021. return init_kvm_mmu(vcpu);
  1022. }
  1023. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1024. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1025. {
  1026. int r;
  1027. mutex_lock(&vcpu->kvm->lock);
  1028. r = mmu_topup_memory_caches(vcpu);
  1029. if (r)
  1030. goto out;
  1031. mmu_alloc_roots(vcpu);
  1032. kvm_x86_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
  1033. kvm_mmu_flush_tlb(vcpu);
  1034. out:
  1035. mutex_unlock(&vcpu->kvm->lock);
  1036. return r;
  1037. }
  1038. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1039. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1040. {
  1041. mmu_free_roots(vcpu);
  1042. }
  1043. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1044. struct kvm_mmu_page *page,
  1045. u64 *spte)
  1046. {
  1047. u64 pte;
  1048. struct kvm_mmu_page *child;
  1049. pte = *spte;
  1050. if (is_shadow_present_pte(pte)) {
  1051. if (page->role.level == PT_PAGE_TABLE_LEVEL)
  1052. rmap_remove(vcpu->kvm, spte);
  1053. else {
  1054. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1055. mmu_page_remove_parent_pte(child, spte);
  1056. }
  1057. }
  1058. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1059. }
  1060. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1061. struct kvm_mmu_page *page,
  1062. u64 *spte,
  1063. const void *new, int bytes,
  1064. int offset_in_pte)
  1065. {
  1066. if (page->role.level != PT_PAGE_TABLE_LEVEL) {
  1067. ++vcpu->kvm->stat.mmu_pde_zapped;
  1068. return;
  1069. }
  1070. ++vcpu->kvm->stat.mmu_pte_updated;
  1071. if (page->role.glevels == PT32_ROOT_LEVEL)
  1072. paging32_update_pte(vcpu, page, spte, new, bytes,
  1073. offset_in_pte);
  1074. else
  1075. paging64_update_pte(vcpu, page, spte, new, bytes,
  1076. offset_in_pte);
  1077. }
  1078. static bool need_remote_flush(u64 old, u64 new)
  1079. {
  1080. if (!is_shadow_present_pte(old))
  1081. return false;
  1082. if (!is_shadow_present_pte(new))
  1083. return true;
  1084. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  1085. return true;
  1086. old ^= PT64_NX_MASK;
  1087. new ^= PT64_NX_MASK;
  1088. return (old & ~new & PT64_PERM_MASK) != 0;
  1089. }
  1090. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  1091. {
  1092. if (need_remote_flush(old, new))
  1093. kvm_flush_remote_tlbs(vcpu->kvm);
  1094. else
  1095. kvm_mmu_flush_tlb(vcpu);
  1096. }
  1097. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  1098. {
  1099. u64 *spte = vcpu->last_pte_updated;
  1100. return !!(spte && (*spte & PT_ACCESSED_MASK));
  1101. }
  1102. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1103. const u8 *new, int bytes)
  1104. {
  1105. gfn_t gfn = gpa >> PAGE_SHIFT;
  1106. struct kvm_mmu_page *page;
  1107. struct hlist_node *node, *n;
  1108. struct hlist_head *bucket;
  1109. unsigned index;
  1110. u64 entry;
  1111. u64 *spte;
  1112. unsigned offset = offset_in_page(gpa);
  1113. unsigned pte_size;
  1114. unsigned page_offset;
  1115. unsigned misaligned;
  1116. unsigned quadrant;
  1117. int level;
  1118. int flooded = 0;
  1119. int npte;
  1120. pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
  1121. ++vcpu->kvm->stat.mmu_pte_write;
  1122. kvm_mmu_audit(vcpu, "pre pte write");
  1123. if (gfn == vcpu->last_pt_write_gfn
  1124. && !last_updated_pte_accessed(vcpu)) {
  1125. ++vcpu->last_pt_write_count;
  1126. if (vcpu->last_pt_write_count >= 3)
  1127. flooded = 1;
  1128. } else {
  1129. vcpu->last_pt_write_gfn = gfn;
  1130. vcpu->last_pt_write_count = 1;
  1131. vcpu->last_pte_updated = NULL;
  1132. }
  1133. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  1134. bucket = &vcpu->kvm->mmu_page_hash[index];
  1135. hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
  1136. if (page->gfn != gfn || page->role.metaphysical)
  1137. continue;
  1138. pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  1139. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  1140. misaligned |= bytes < 4;
  1141. if (misaligned || flooded) {
  1142. /*
  1143. * Misaligned accesses are too much trouble to fix
  1144. * up; also, they usually indicate a page is not used
  1145. * as a page table.
  1146. *
  1147. * If we're seeing too many writes to a page,
  1148. * it may no longer be a page table, or we may be
  1149. * forking, in which case it is better to unmap the
  1150. * page.
  1151. */
  1152. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  1153. gpa, bytes, page->role.word);
  1154. kvm_mmu_zap_page(vcpu->kvm, page);
  1155. ++vcpu->kvm->stat.mmu_flooded;
  1156. continue;
  1157. }
  1158. page_offset = offset;
  1159. level = page->role.level;
  1160. npte = 1;
  1161. if (page->role.glevels == PT32_ROOT_LEVEL) {
  1162. page_offset <<= 1; /* 32->64 */
  1163. /*
  1164. * A 32-bit pde maps 4MB while the shadow pdes map
  1165. * only 2MB. So we need to double the offset again
  1166. * and zap two pdes instead of one.
  1167. */
  1168. if (level == PT32_ROOT_LEVEL) {
  1169. page_offset &= ~7; /* kill rounding error */
  1170. page_offset <<= 1;
  1171. npte = 2;
  1172. }
  1173. quadrant = page_offset >> PAGE_SHIFT;
  1174. page_offset &= ~PAGE_MASK;
  1175. if (quadrant != page->role.quadrant)
  1176. continue;
  1177. }
  1178. spte = &page->spt[page_offset / sizeof(*spte)];
  1179. while (npte--) {
  1180. entry = *spte;
  1181. mmu_pte_write_zap_pte(vcpu, page, spte);
  1182. mmu_pte_write_new_pte(vcpu, page, spte, new, bytes,
  1183. page_offset & (pte_size - 1));
  1184. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  1185. ++spte;
  1186. }
  1187. }
  1188. kvm_mmu_audit(vcpu, "post pte write");
  1189. }
  1190. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1191. {
  1192. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  1193. return kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1194. }
  1195. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1196. {
  1197. while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
  1198. struct kvm_mmu_page *page;
  1199. page = container_of(vcpu->kvm->active_mmu_pages.prev,
  1200. struct kvm_mmu_page, link);
  1201. kvm_mmu_zap_page(vcpu->kvm, page);
  1202. ++vcpu->kvm->stat.mmu_recycled;
  1203. }
  1204. }
  1205. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  1206. {
  1207. int r;
  1208. enum emulation_result er;
  1209. mutex_lock(&vcpu->kvm->lock);
  1210. r = vcpu->mmu.page_fault(vcpu, cr2, error_code);
  1211. if (r < 0)
  1212. goto out;
  1213. if (!r) {
  1214. r = 1;
  1215. goto out;
  1216. }
  1217. r = mmu_topup_memory_caches(vcpu);
  1218. if (r)
  1219. goto out;
  1220. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  1221. mutex_unlock(&vcpu->kvm->lock);
  1222. switch (er) {
  1223. case EMULATE_DONE:
  1224. return 1;
  1225. case EMULATE_DO_MMIO:
  1226. ++vcpu->stat.mmio_exits;
  1227. return 0;
  1228. case EMULATE_FAIL:
  1229. kvm_report_emulation_failure(vcpu, "pagetable");
  1230. return 1;
  1231. default:
  1232. BUG();
  1233. }
  1234. out:
  1235. mutex_unlock(&vcpu->kvm->lock);
  1236. return r;
  1237. }
  1238. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  1239. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1240. {
  1241. struct kvm_mmu_page *page;
  1242. while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
  1243. page = container_of(vcpu->kvm->active_mmu_pages.next,
  1244. struct kvm_mmu_page, link);
  1245. kvm_mmu_zap_page(vcpu->kvm, page);
  1246. }
  1247. free_page((unsigned long)vcpu->mmu.pae_root);
  1248. }
  1249. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1250. {
  1251. struct page *page;
  1252. int i;
  1253. ASSERT(vcpu);
  1254. if (vcpu->kvm->n_requested_mmu_pages)
  1255. vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_requested_mmu_pages;
  1256. else
  1257. vcpu->kvm->n_free_mmu_pages = vcpu->kvm->n_alloc_mmu_pages;
  1258. /*
  1259. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1260. * Therefore we need to allocate shadow page tables in the first
  1261. * 4GB of memory, which happens to fit the DMA32 zone.
  1262. */
  1263. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1264. if (!page)
  1265. goto error_1;
  1266. vcpu->mmu.pae_root = page_address(page);
  1267. for (i = 0; i < 4; ++i)
  1268. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  1269. return 0;
  1270. error_1:
  1271. free_mmu_pages(vcpu);
  1272. return -ENOMEM;
  1273. }
  1274. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1275. {
  1276. ASSERT(vcpu);
  1277. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1278. return alloc_mmu_pages(vcpu);
  1279. }
  1280. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1281. {
  1282. ASSERT(vcpu);
  1283. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1284. return init_kvm_mmu(vcpu);
  1285. }
  1286. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1287. {
  1288. ASSERT(vcpu);
  1289. destroy_kvm_mmu(vcpu);
  1290. free_mmu_pages(vcpu);
  1291. mmu_free_memory_caches(vcpu);
  1292. }
  1293. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  1294. {
  1295. struct kvm_mmu_page *page;
  1296. list_for_each_entry(page, &kvm->active_mmu_pages, link) {
  1297. int i;
  1298. u64 *pt;
  1299. if (!test_bit(slot, &page->slot_bitmap))
  1300. continue;
  1301. pt = page->spt;
  1302. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1303. /* avoid RMW */
  1304. if (pt[i] & PT_WRITABLE_MASK)
  1305. pt[i] &= ~PT_WRITABLE_MASK;
  1306. }
  1307. }
  1308. void kvm_mmu_zap_all(struct kvm *kvm)
  1309. {
  1310. struct kvm_mmu_page *page, *node;
  1311. list_for_each_entry_safe(page, node, &kvm->active_mmu_pages, link)
  1312. kvm_mmu_zap_page(kvm, page);
  1313. kvm_flush_remote_tlbs(kvm);
  1314. }
  1315. void kvm_mmu_module_exit(void)
  1316. {
  1317. if (pte_chain_cache)
  1318. kmem_cache_destroy(pte_chain_cache);
  1319. if (rmap_desc_cache)
  1320. kmem_cache_destroy(rmap_desc_cache);
  1321. if (mmu_page_header_cache)
  1322. kmem_cache_destroy(mmu_page_header_cache);
  1323. }
  1324. int kvm_mmu_module_init(void)
  1325. {
  1326. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1327. sizeof(struct kvm_pte_chain),
  1328. 0, 0, NULL);
  1329. if (!pte_chain_cache)
  1330. goto nomem;
  1331. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1332. sizeof(struct kvm_rmap_desc),
  1333. 0, 0, NULL);
  1334. if (!rmap_desc_cache)
  1335. goto nomem;
  1336. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1337. sizeof(struct kvm_mmu_page),
  1338. 0, 0, NULL);
  1339. if (!mmu_page_header_cache)
  1340. goto nomem;
  1341. return 0;
  1342. nomem:
  1343. kvm_mmu_module_exit();
  1344. return -ENOMEM;
  1345. }
  1346. /*
  1347. * Caculate mmu pages needed for kvm.
  1348. */
  1349. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  1350. {
  1351. int i;
  1352. unsigned int nr_mmu_pages;
  1353. unsigned int nr_pages = 0;
  1354. for (i = 0; i < kvm->nmemslots; i++)
  1355. nr_pages += kvm->memslots[i].npages;
  1356. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  1357. nr_mmu_pages = max(nr_mmu_pages,
  1358. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  1359. return nr_mmu_pages;
  1360. }
  1361. #ifdef AUDIT
  1362. static const char *audit_msg;
  1363. static gva_t canonicalize(gva_t gva)
  1364. {
  1365. #ifdef CONFIG_X86_64
  1366. gva = (long long)(gva << 16) >> 16;
  1367. #endif
  1368. return gva;
  1369. }
  1370. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1371. gva_t va, int level)
  1372. {
  1373. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1374. int i;
  1375. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1376. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1377. u64 ent = pt[i];
  1378. if (ent == shadow_trap_nonpresent_pte)
  1379. continue;
  1380. va = canonicalize(va);
  1381. if (level > 1) {
  1382. if (ent == shadow_notrap_nonpresent_pte)
  1383. printk(KERN_ERR "audit: (%s) nontrapping pte"
  1384. " in nonleaf level: levels %d gva %lx"
  1385. " level %d pte %llx\n", audit_msg,
  1386. vcpu->mmu.root_level, va, level, ent);
  1387. audit_mappings_page(vcpu, ent, va, level - 1);
  1388. } else {
  1389. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
  1390. hpa_t hpa = gpa_to_hpa(vcpu, gpa);
  1391. struct page *page;
  1392. if (is_shadow_present_pte(ent)
  1393. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  1394. printk(KERN_ERR "xx audit error: (%s) levels %d"
  1395. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  1396. audit_msg, vcpu->mmu.root_level,
  1397. va, gpa, hpa, ent,
  1398. is_shadow_present_pte(ent));
  1399. else if (ent == shadow_notrap_nonpresent_pte
  1400. && !is_error_hpa(hpa))
  1401. printk(KERN_ERR "audit: (%s) notrap shadow,"
  1402. " valid guest gva %lx\n", audit_msg, va);
  1403. page = pfn_to_page((gpa & PT64_BASE_ADDR_MASK)
  1404. >> PAGE_SHIFT);
  1405. kvm_release_page_clean(page);
  1406. }
  1407. }
  1408. }
  1409. static void audit_mappings(struct kvm_vcpu *vcpu)
  1410. {
  1411. unsigned i;
  1412. if (vcpu->mmu.root_level == 4)
  1413. audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
  1414. else
  1415. for (i = 0; i < 4; ++i)
  1416. if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
  1417. audit_mappings_page(vcpu,
  1418. vcpu->mmu.pae_root[i],
  1419. i << 30,
  1420. 2);
  1421. }
  1422. static int count_rmaps(struct kvm_vcpu *vcpu)
  1423. {
  1424. int nmaps = 0;
  1425. int i, j, k;
  1426. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  1427. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  1428. struct kvm_rmap_desc *d;
  1429. for (j = 0; j < m->npages; ++j) {
  1430. unsigned long *rmapp = &m->rmap[j];
  1431. if (!*rmapp)
  1432. continue;
  1433. if (!(*rmapp & 1)) {
  1434. ++nmaps;
  1435. continue;
  1436. }
  1437. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  1438. while (d) {
  1439. for (k = 0; k < RMAP_EXT; ++k)
  1440. if (d->shadow_ptes[k])
  1441. ++nmaps;
  1442. else
  1443. break;
  1444. d = d->more;
  1445. }
  1446. }
  1447. }
  1448. return nmaps;
  1449. }
  1450. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  1451. {
  1452. int nmaps = 0;
  1453. struct kvm_mmu_page *page;
  1454. int i;
  1455. list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
  1456. u64 *pt = page->spt;
  1457. if (page->role.level != PT_PAGE_TABLE_LEVEL)
  1458. continue;
  1459. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1460. u64 ent = pt[i];
  1461. if (!(ent & PT_PRESENT_MASK))
  1462. continue;
  1463. if (!(ent & PT_WRITABLE_MASK))
  1464. continue;
  1465. ++nmaps;
  1466. }
  1467. }
  1468. return nmaps;
  1469. }
  1470. static void audit_rmap(struct kvm_vcpu *vcpu)
  1471. {
  1472. int n_rmap = count_rmaps(vcpu);
  1473. int n_actual = count_writable_mappings(vcpu);
  1474. if (n_rmap != n_actual)
  1475. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  1476. __FUNCTION__, audit_msg, n_rmap, n_actual);
  1477. }
  1478. static void audit_write_protection(struct kvm_vcpu *vcpu)
  1479. {
  1480. struct kvm_mmu_page *page;
  1481. struct kvm_memory_slot *slot;
  1482. unsigned long *rmapp;
  1483. gfn_t gfn;
  1484. list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
  1485. if (page->role.metaphysical)
  1486. continue;
  1487. slot = gfn_to_memslot(vcpu->kvm, page->gfn);
  1488. gfn = unalias_gfn(vcpu->kvm, page->gfn);
  1489. rmapp = &slot->rmap[gfn - slot->base_gfn];
  1490. if (*rmapp)
  1491. printk(KERN_ERR "%s: (%s) shadow page has writable"
  1492. " mappings: gfn %lx role %x\n",
  1493. __FUNCTION__, audit_msg, page->gfn,
  1494. page->role.word);
  1495. }
  1496. }
  1497. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  1498. {
  1499. int olddbg = dbg;
  1500. dbg = 0;
  1501. audit_msg = msg;
  1502. audit_rmap(vcpu);
  1503. audit_write_protection(vcpu);
  1504. audit_mappings(vcpu);
  1505. dbg = olddbg;
  1506. }
  1507. #endif