ehca_mrmw.c 61 KB

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  1. /*
  2. * IBM eServer eHCA Infiniband device driver for Linux on POWER
  3. *
  4. * MR/MW functions
  5. *
  6. * Authors: Dietmar Decker <ddecker@de.ibm.com>
  7. * Christoph Raisch <raisch@de.ibm.com>
  8. *
  9. * Copyright (c) 2005 IBM Corporation
  10. *
  11. * All rights reserved.
  12. *
  13. * This source code is distributed under a dual license of GPL v2.0 and OpenIB
  14. * BSD.
  15. *
  16. * OpenIB BSD License
  17. *
  18. * Redistribution and use in source and binary forms, with or without
  19. * modification, are permitted provided that the following conditions are met:
  20. *
  21. * Redistributions of source code must retain the above copyright notice, this
  22. * list of conditions and the following disclaimer.
  23. *
  24. * Redistributions in binary form must reproduce the above copyright notice,
  25. * this list of conditions and the following disclaimer in the documentation
  26. * and/or other materials
  27. * provided with the distribution.
  28. *
  29. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  30. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  31. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  32. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  33. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  34. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  35. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  36. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
  37. * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  38. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  39. * POSSIBILITY OF SUCH DAMAGE.
  40. */
  41. #include <rdma/ib_umem.h>
  42. #include <asm/current.h>
  43. #include "ehca_iverbs.h"
  44. #include "ehca_mrmw.h"
  45. #include "hcp_if.h"
  46. #include "hipz_hw.h"
  47. /* max number of rpages (per hcall register_rpages) */
  48. #define MAX_RPAGES 512
  49. static struct kmem_cache *mr_cache;
  50. static struct kmem_cache *mw_cache;
  51. static struct ehca_mr *ehca_mr_new(void)
  52. {
  53. struct ehca_mr *me;
  54. me = kmem_cache_zalloc(mr_cache, GFP_KERNEL);
  55. if (me) {
  56. spin_lock_init(&me->mrlock);
  57. } else
  58. ehca_gen_err("alloc failed");
  59. return me;
  60. }
  61. static void ehca_mr_delete(struct ehca_mr *me)
  62. {
  63. kmem_cache_free(mr_cache, me);
  64. }
  65. static struct ehca_mw *ehca_mw_new(void)
  66. {
  67. struct ehca_mw *me;
  68. me = kmem_cache_zalloc(mw_cache, GFP_KERNEL);
  69. if (me) {
  70. spin_lock_init(&me->mwlock);
  71. } else
  72. ehca_gen_err("alloc failed");
  73. return me;
  74. }
  75. static void ehca_mw_delete(struct ehca_mw *me)
  76. {
  77. kmem_cache_free(mw_cache, me);
  78. }
  79. /*----------------------------------------------------------------------*/
  80. struct ib_mr *ehca_get_dma_mr(struct ib_pd *pd, int mr_access_flags)
  81. {
  82. struct ib_mr *ib_mr;
  83. int ret;
  84. struct ehca_mr *e_maxmr;
  85. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  86. struct ehca_shca *shca =
  87. container_of(pd->device, struct ehca_shca, ib_device);
  88. if (shca->maxmr) {
  89. e_maxmr = ehca_mr_new();
  90. if (!e_maxmr) {
  91. ehca_err(&shca->ib_device, "out of memory");
  92. ib_mr = ERR_PTR(-ENOMEM);
  93. goto get_dma_mr_exit0;
  94. }
  95. ret = ehca_reg_maxmr(shca, e_maxmr, (u64*)KERNELBASE,
  96. mr_access_flags, e_pd,
  97. &e_maxmr->ib.ib_mr.lkey,
  98. &e_maxmr->ib.ib_mr.rkey);
  99. if (ret) {
  100. ehca_mr_delete(e_maxmr);
  101. ib_mr = ERR_PTR(ret);
  102. goto get_dma_mr_exit0;
  103. }
  104. ib_mr = &e_maxmr->ib.ib_mr;
  105. } else {
  106. ehca_err(&shca->ib_device, "no internal max-MR exist!");
  107. ib_mr = ERR_PTR(-EINVAL);
  108. goto get_dma_mr_exit0;
  109. }
  110. get_dma_mr_exit0:
  111. if (IS_ERR(ib_mr))
  112. ehca_err(&shca->ib_device, "rc=%lx pd=%p mr_access_flags=%x ",
  113. PTR_ERR(ib_mr), pd, mr_access_flags);
  114. return ib_mr;
  115. } /* end ehca_get_dma_mr() */
  116. /*----------------------------------------------------------------------*/
  117. struct ib_mr *ehca_reg_phys_mr(struct ib_pd *pd,
  118. struct ib_phys_buf *phys_buf_array,
  119. int num_phys_buf,
  120. int mr_access_flags,
  121. u64 *iova_start)
  122. {
  123. struct ib_mr *ib_mr;
  124. int ret;
  125. struct ehca_mr *e_mr;
  126. struct ehca_shca *shca =
  127. container_of(pd->device, struct ehca_shca, ib_device);
  128. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  129. u64 size;
  130. struct ehca_mr_pginfo pginfo={0,0,0,0,0,0,0,NULL,0,NULL,NULL,0,NULL,0};
  131. u32 num_pages_mr;
  132. u32 num_pages_4k; /* 4k portion "pages" */
  133. if ((num_phys_buf <= 0) || !phys_buf_array) {
  134. ehca_err(pd->device, "bad input values: num_phys_buf=%x "
  135. "phys_buf_array=%p", num_phys_buf, phys_buf_array);
  136. ib_mr = ERR_PTR(-EINVAL);
  137. goto reg_phys_mr_exit0;
  138. }
  139. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  140. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  141. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  142. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  143. /*
  144. * Remote Write Access requires Local Write Access
  145. * Remote Atomic Access requires Local Write Access
  146. */
  147. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  148. mr_access_flags);
  149. ib_mr = ERR_PTR(-EINVAL);
  150. goto reg_phys_mr_exit0;
  151. }
  152. /* check physical buffer list and calculate size */
  153. ret = ehca_mr_chk_buf_and_calc_size(phys_buf_array, num_phys_buf,
  154. iova_start, &size);
  155. if (ret) {
  156. ib_mr = ERR_PTR(ret);
  157. goto reg_phys_mr_exit0;
  158. }
  159. if ((size == 0) ||
  160. (((u64)iova_start + size) < (u64)iova_start)) {
  161. ehca_err(pd->device, "bad input values: size=%lx iova_start=%p",
  162. size, iova_start);
  163. ib_mr = ERR_PTR(-EINVAL);
  164. goto reg_phys_mr_exit0;
  165. }
  166. e_mr = ehca_mr_new();
  167. if (!e_mr) {
  168. ehca_err(pd->device, "out of memory");
  169. ib_mr = ERR_PTR(-ENOMEM);
  170. goto reg_phys_mr_exit0;
  171. }
  172. /* determine number of MR pages */
  173. num_pages_mr = ((((u64)iova_start % PAGE_SIZE) + size +
  174. PAGE_SIZE - 1) / PAGE_SIZE);
  175. num_pages_4k = ((((u64)iova_start % EHCA_PAGESIZE) + size +
  176. EHCA_PAGESIZE - 1) / EHCA_PAGESIZE);
  177. /* register MR on HCA */
  178. if (ehca_mr_is_maxmr(size, iova_start)) {
  179. e_mr->flags |= EHCA_MR_FLAG_MAXMR;
  180. ret = ehca_reg_maxmr(shca, e_mr, iova_start, mr_access_flags,
  181. e_pd, &e_mr->ib.ib_mr.lkey,
  182. &e_mr->ib.ib_mr.rkey);
  183. if (ret) {
  184. ib_mr = ERR_PTR(ret);
  185. goto reg_phys_mr_exit1;
  186. }
  187. } else {
  188. pginfo.type = EHCA_MR_PGI_PHYS;
  189. pginfo.num_pages = num_pages_mr;
  190. pginfo.num_4k = num_pages_4k;
  191. pginfo.num_phys_buf = num_phys_buf;
  192. pginfo.phys_buf_array = phys_buf_array;
  193. pginfo.next_4k = (((u64)iova_start & ~PAGE_MASK) /
  194. EHCA_PAGESIZE);
  195. ret = ehca_reg_mr(shca, e_mr, iova_start, size, mr_access_flags,
  196. e_pd, &pginfo, &e_mr->ib.ib_mr.lkey,
  197. &e_mr->ib.ib_mr.rkey);
  198. if (ret) {
  199. ib_mr = ERR_PTR(ret);
  200. goto reg_phys_mr_exit1;
  201. }
  202. }
  203. /* successful registration of all pages */
  204. return &e_mr->ib.ib_mr;
  205. reg_phys_mr_exit1:
  206. ehca_mr_delete(e_mr);
  207. reg_phys_mr_exit0:
  208. if (IS_ERR(ib_mr))
  209. ehca_err(pd->device, "rc=%lx pd=%p phys_buf_array=%p "
  210. "num_phys_buf=%x mr_access_flags=%x iova_start=%p",
  211. PTR_ERR(ib_mr), pd, phys_buf_array,
  212. num_phys_buf, mr_access_flags, iova_start);
  213. return ib_mr;
  214. } /* end ehca_reg_phys_mr() */
  215. /*----------------------------------------------------------------------*/
  216. struct ib_mr *ehca_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, u64 virt,
  217. int mr_access_flags, struct ib_udata *udata)
  218. {
  219. struct ib_mr *ib_mr;
  220. struct ehca_mr *e_mr;
  221. struct ehca_shca *shca =
  222. container_of(pd->device, struct ehca_shca, ib_device);
  223. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  224. struct ehca_mr_pginfo pginfo={0,0,0,0,0,0,0,NULL,0,NULL,NULL,0,NULL,0};
  225. int ret;
  226. u32 num_pages_mr;
  227. u32 num_pages_4k; /* 4k portion "pages" */
  228. if (!pd) {
  229. ehca_gen_err("bad pd=%p", pd);
  230. return ERR_PTR(-EFAULT);
  231. }
  232. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  233. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  234. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  235. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  236. /*
  237. * Remote Write Access requires Local Write Access
  238. * Remote Atomic Access requires Local Write Access
  239. */
  240. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  241. mr_access_flags);
  242. ib_mr = ERR_PTR(-EINVAL);
  243. goto reg_user_mr_exit0;
  244. }
  245. if (length == 0 || virt + length < virt) {
  246. ehca_err(pd->device, "bad input values: length=%lx "
  247. "virt_base=%lx", length, virt);
  248. ib_mr = ERR_PTR(-EINVAL);
  249. goto reg_user_mr_exit0;
  250. }
  251. e_mr = ehca_mr_new();
  252. if (!e_mr) {
  253. ehca_err(pd->device, "out of memory");
  254. ib_mr = ERR_PTR(-ENOMEM);
  255. goto reg_user_mr_exit0;
  256. }
  257. e_mr->umem = ib_umem_get(pd->uobject->context, start, length,
  258. mr_access_flags);
  259. if (IS_ERR(e_mr->umem)) {
  260. ib_mr = (void *) e_mr->umem;
  261. goto reg_user_mr_exit1;
  262. }
  263. if (e_mr->umem->page_size != PAGE_SIZE) {
  264. ehca_err(pd->device, "page size not supported, "
  265. "e_mr->umem->page_size=%x", e_mr->umem->page_size);
  266. ib_mr = ERR_PTR(-EINVAL);
  267. goto reg_user_mr_exit2;
  268. }
  269. /* determine number of MR pages */
  270. num_pages_mr = (((virt % PAGE_SIZE) + length + PAGE_SIZE - 1) /
  271. PAGE_SIZE);
  272. num_pages_4k = (((virt % EHCA_PAGESIZE) + length + EHCA_PAGESIZE - 1) /
  273. EHCA_PAGESIZE);
  274. /* register MR on HCA */
  275. pginfo.type = EHCA_MR_PGI_USER;
  276. pginfo.num_pages = num_pages_mr;
  277. pginfo.num_4k = num_pages_4k;
  278. pginfo.region = e_mr->umem;
  279. pginfo.next_4k = e_mr->umem->offset / EHCA_PAGESIZE;
  280. pginfo.next_chunk = list_prepare_entry(pginfo.next_chunk,
  281. (&e_mr->umem->chunk_list),
  282. list);
  283. ret = ehca_reg_mr(shca, e_mr, (u64*) virt, length, mr_access_flags, e_pd,
  284. &pginfo, &e_mr->ib.ib_mr.lkey, &e_mr->ib.ib_mr.rkey);
  285. if (ret) {
  286. ib_mr = ERR_PTR(ret);
  287. goto reg_user_mr_exit2;
  288. }
  289. /* successful registration of all pages */
  290. return &e_mr->ib.ib_mr;
  291. reg_user_mr_exit2:
  292. ib_umem_release(e_mr->umem);
  293. reg_user_mr_exit1:
  294. ehca_mr_delete(e_mr);
  295. reg_user_mr_exit0:
  296. if (IS_ERR(ib_mr))
  297. ehca_err(pd->device, "rc=%lx pd=%p mr_access_flags=%x"
  298. " udata=%p",
  299. PTR_ERR(ib_mr), pd, mr_access_flags, udata);
  300. return ib_mr;
  301. } /* end ehca_reg_user_mr() */
  302. /*----------------------------------------------------------------------*/
  303. int ehca_rereg_phys_mr(struct ib_mr *mr,
  304. int mr_rereg_mask,
  305. struct ib_pd *pd,
  306. struct ib_phys_buf *phys_buf_array,
  307. int num_phys_buf,
  308. int mr_access_flags,
  309. u64 *iova_start)
  310. {
  311. int ret;
  312. struct ehca_shca *shca =
  313. container_of(mr->device, struct ehca_shca, ib_device);
  314. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  315. struct ehca_pd *my_pd = container_of(mr->pd, struct ehca_pd, ib_pd);
  316. u64 new_size;
  317. u64 *new_start;
  318. u32 new_acl;
  319. struct ehca_pd *new_pd;
  320. u32 tmp_lkey, tmp_rkey;
  321. unsigned long sl_flags;
  322. u32 num_pages_mr = 0;
  323. u32 num_pages_4k = 0; /* 4k portion "pages" */
  324. struct ehca_mr_pginfo pginfo={0,0,0,0,0,0,0,NULL,0,NULL,NULL,0,NULL,0};
  325. u32 cur_pid = current->tgid;
  326. if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
  327. (my_pd->ownpid != cur_pid)) {
  328. ehca_err(mr->device, "Invalid caller pid=%x ownpid=%x",
  329. cur_pid, my_pd->ownpid);
  330. ret = -EINVAL;
  331. goto rereg_phys_mr_exit0;
  332. }
  333. if (!(mr_rereg_mask & IB_MR_REREG_TRANS)) {
  334. /* TODO not supported, because PHYP rereg hCall needs pages */
  335. ehca_err(mr->device, "rereg without IB_MR_REREG_TRANS not "
  336. "supported yet, mr_rereg_mask=%x", mr_rereg_mask);
  337. ret = -EINVAL;
  338. goto rereg_phys_mr_exit0;
  339. }
  340. if (mr_rereg_mask & IB_MR_REREG_PD) {
  341. if (!pd) {
  342. ehca_err(mr->device, "rereg with bad pd, pd=%p "
  343. "mr_rereg_mask=%x", pd, mr_rereg_mask);
  344. ret = -EINVAL;
  345. goto rereg_phys_mr_exit0;
  346. }
  347. }
  348. if ((mr_rereg_mask &
  349. ~(IB_MR_REREG_TRANS | IB_MR_REREG_PD | IB_MR_REREG_ACCESS)) ||
  350. (mr_rereg_mask == 0)) {
  351. ret = -EINVAL;
  352. goto rereg_phys_mr_exit0;
  353. }
  354. /* check other parameters */
  355. if (e_mr == shca->maxmr) {
  356. /* should be impossible, however reject to be sure */
  357. ehca_err(mr->device, "rereg internal max-MR impossible, mr=%p "
  358. "shca->maxmr=%p mr->lkey=%x",
  359. mr, shca->maxmr, mr->lkey);
  360. ret = -EINVAL;
  361. goto rereg_phys_mr_exit0;
  362. }
  363. if (mr_rereg_mask & IB_MR_REREG_TRANS) { /* transl., i.e. addr/size */
  364. if (e_mr->flags & EHCA_MR_FLAG_FMR) {
  365. ehca_err(mr->device, "not supported for FMR, mr=%p "
  366. "flags=%x", mr, e_mr->flags);
  367. ret = -EINVAL;
  368. goto rereg_phys_mr_exit0;
  369. }
  370. if (!phys_buf_array || num_phys_buf <= 0) {
  371. ehca_err(mr->device, "bad input values: mr_rereg_mask=%x"
  372. " phys_buf_array=%p num_phys_buf=%x",
  373. mr_rereg_mask, phys_buf_array, num_phys_buf);
  374. ret = -EINVAL;
  375. goto rereg_phys_mr_exit0;
  376. }
  377. }
  378. if ((mr_rereg_mask & IB_MR_REREG_ACCESS) && /* change ACL */
  379. (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  380. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  381. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  382. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)))) {
  383. /*
  384. * Remote Write Access requires Local Write Access
  385. * Remote Atomic Access requires Local Write Access
  386. */
  387. ehca_err(mr->device, "bad input values: mr_rereg_mask=%x "
  388. "mr_access_flags=%x", mr_rereg_mask, mr_access_flags);
  389. ret = -EINVAL;
  390. goto rereg_phys_mr_exit0;
  391. }
  392. /* set requested values dependent on rereg request */
  393. spin_lock_irqsave(&e_mr->mrlock, sl_flags);
  394. new_start = e_mr->start; /* new == old address */
  395. new_size = e_mr->size; /* new == old length */
  396. new_acl = e_mr->acl; /* new == old access control */
  397. new_pd = container_of(mr->pd,struct ehca_pd,ib_pd); /*new == old PD*/
  398. if (mr_rereg_mask & IB_MR_REREG_TRANS) {
  399. new_start = iova_start; /* change address */
  400. /* check physical buffer list and calculate size */
  401. ret = ehca_mr_chk_buf_and_calc_size(phys_buf_array,
  402. num_phys_buf, iova_start,
  403. &new_size);
  404. if (ret)
  405. goto rereg_phys_mr_exit1;
  406. if ((new_size == 0) ||
  407. (((u64)iova_start + new_size) < (u64)iova_start)) {
  408. ehca_err(mr->device, "bad input values: new_size=%lx "
  409. "iova_start=%p", new_size, iova_start);
  410. ret = -EINVAL;
  411. goto rereg_phys_mr_exit1;
  412. }
  413. num_pages_mr = ((((u64)new_start % PAGE_SIZE) + new_size +
  414. PAGE_SIZE - 1) / PAGE_SIZE);
  415. num_pages_4k = ((((u64)new_start % EHCA_PAGESIZE) + new_size +
  416. EHCA_PAGESIZE - 1) / EHCA_PAGESIZE);
  417. pginfo.type = EHCA_MR_PGI_PHYS;
  418. pginfo.num_pages = num_pages_mr;
  419. pginfo.num_4k = num_pages_4k;
  420. pginfo.num_phys_buf = num_phys_buf;
  421. pginfo.phys_buf_array = phys_buf_array;
  422. pginfo.next_4k = (((u64)iova_start & ~PAGE_MASK) /
  423. EHCA_PAGESIZE);
  424. }
  425. if (mr_rereg_mask & IB_MR_REREG_ACCESS)
  426. new_acl = mr_access_flags;
  427. if (mr_rereg_mask & IB_MR_REREG_PD)
  428. new_pd = container_of(pd, struct ehca_pd, ib_pd);
  429. ret = ehca_rereg_mr(shca, e_mr, new_start, new_size, new_acl,
  430. new_pd, &pginfo, &tmp_lkey, &tmp_rkey);
  431. if (ret)
  432. goto rereg_phys_mr_exit1;
  433. /* successful reregistration */
  434. if (mr_rereg_mask & IB_MR_REREG_PD)
  435. mr->pd = pd;
  436. mr->lkey = tmp_lkey;
  437. mr->rkey = tmp_rkey;
  438. rereg_phys_mr_exit1:
  439. spin_unlock_irqrestore(&e_mr->mrlock, sl_flags);
  440. rereg_phys_mr_exit0:
  441. if (ret)
  442. ehca_err(mr->device, "ret=%x mr=%p mr_rereg_mask=%x pd=%p "
  443. "phys_buf_array=%p num_phys_buf=%x mr_access_flags=%x "
  444. "iova_start=%p",
  445. ret, mr, mr_rereg_mask, pd, phys_buf_array,
  446. num_phys_buf, mr_access_flags, iova_start);
  447. return ret;
  448. } /* end ehca_rereg_phys_mr() */
  449. /*----------------------------------------------------------------------*/
  450. int ehca_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr)
  451. {
  452. int ret = 0;
  453. u64 h_ret;
  454. struct ehca_shca *shca =
  455. container_of(mr->device, struct ehca_shca, ib_device);
  456. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  457. struct ehca_pd *my_pd = container_of(mr->pd, struct ehca_pd, ib_pd);
  458. u32 cur_pid = current->tgid;
  459. unsigned long sl_flags;
  460. struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0};
  461. if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
  462. (my_pd->ownpid != cur_pid)) {
  463. ehca_err(mr->device, "Invalid caller pid=%x ownpid=%x",
  464. cur_pid, my_pd->ownpid);
  465. ret = -EINVAL;
  466. goto query_mr_exit0;
  467. }
  468. if ((e_mr->flags & EHCA_MR_FLAG_FMR)) {
  469. ehca_err(mr->device, "not supported for FMR, mr=%p e_mr=%p "
  470. "e_mr->flags=%x", mr, e_mr, e_mr->flags);
  471. ret = -EINVAL;
  472. goto query_mr_exit0;
  473. }
  474. memset(mr_attr, 0, sizeof(struct ib_mr_attr));
  475. spin_lock_irqsave(&e_mr->mrlock, sl_flags);
  476. h_ret = hipz_h_query_mr(shca->ipz_hca_handle, e_mr, &hipzout);
  477. if (h_ret != H_SUCCESS) {
  478. ehca_err(mr->device, "hipz_mr_query failed, h_ret=%lx mr=%p "
  479. "hca_hndl=%lx mr_hndl=%lx lkey=%x",
  480. h_ret, mr, shca->ipz_hca_handle.handle,
  481. e_mr->ipz_mr_handle.handle, mr->lkey);
  482. ret = ehca2ib_return_code(h_ret);
  483. goto query_mr_exit1;
  484. }
  485. mr_attr->pd = mr->pd;
  486. mr_attr->device_virt_addr = hipzout.vaddr;
  487. mr_attr->size = hipzout.len;
  488. mr_attr->lkey = hipzout.lkey;
  489. mr_attr->rkey = hipzout.rkey;
  490. ehca_mrmw_reverse_map_acl(&hipzout.acl, &mr_attr->mr_access_flags);
  491. query_mr_exit1:
  492. spin_unlock_irqrestore(&e_mr->mrlock, sl_flags);
  493. query_mr_exit0:
  494. if (ret)
  495. ehca_err(mr->device, "ret=%x mr=%p mr_attr=%p",
  496. ret, mr, mr_attr);
  497. return ret;
  498. } /* end ehca_query_mr() */
  499. /*----------------------------------------------------------------------*/
  500. int ehca_dereg_mr(struct ib_mr *mr)
  501. {
  502. int ret = 0;
  503. u64 h_ret;
  504. struct ehca_shca *shca =
  505. container_of(mr->device, struct ehca_shca, ib_device);
  506. struct ehca_mr *e_mr = container_of(mr, struct ehca_mr, ib.ib_mr);
  507. struct ehca_pd *my_pd = container_of(mr->pd, struct ehca_pd, ib_pd);
  508. u32 cur_pid = current->tgid;
  509. if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
  510. (my_pd->ownpid != cur_pid)) {
  511. ehca_err(mr->device, "Invalid caller pid=%x ownpid=%x",
  512. cur_pid, my_pd->ownpid);
  513. ret = -EINVAL;
  514. goto dereg_mr_exit0;
  515. }
  516. if ((e_mr->flags & EHCA_MR_FLAG_FMR)) {
  517. ehca_err(mr->device, "not supported for FMR, mr=%p e_mr=%p "
  518. "e_mr->flags=%x", mr, e_mr, e_mr->flags);
  519. ret = -EINVAL;
  520. goto dereg_mr_exit0;
  521. } else if (e_mr == shca->maxmr) {
  522. /* should be impossible, however reject to be sure */
  523. ehca_err(mr->device, "dereg internal max-MR impossible, mr=%p "
  524. "shca->maxmr=%p mr->lkey=%x",
  525. mr, shca->maxmr, mr->lkey);
  526. ret = -EINVAL;
  527. goto dereg_mr_exit0;
  528. }
  529. /* TODO: BUSY: MR still has bound window(s) */
  530. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  531. if (h_ret != H_SUCCESS) {
  532. ehca_err(mr->device, "hipz_free_mr failed, h_ret=%lx shca=%p "
  533. "e_mr=%p hca_hndl=%lx mr_hndl=%lx mr->lkey=%x",
  534. h_ret, shca, e_mr, shca->ipz_hca_handle.handle,
  535. e_mr->ipz_mr_handle.handle, mr->lkey);
  536. ret = ehca2ib_return_code(h_ret);
  537. goto dereg_mr_exit0;
  538. }
  539. if (e_mr->umem)
  540. ib_umem_release(e_mr->umem);
  541. /* successful deregistration */
  542. ehca_mr_delete(e_mr);
  543. dereg_mr_exit0:
  544. if (ret)
  545. ehca_err(mr->device, "ret=%x mr=%p", ret, mr);
  546. return ret;
  547. } /* end ehca_dereg_mr() */
  548. /*----------------------------------------------------------------------*/
  549. struct ib_mw *ehca_alloc_mw(struct ib_pd *pd)
  550. {
  551. struct ib_mw *ib_mw;
  552. u64 h_ret;
  553. struct ehca_mw *e_mw;
  554. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  555. struct ehca_shca *shca =
  556. container_of(pd->device, struct ehca_shca, ib_device);
  557. struct ehca_mw_hipzout_parms hipzout = {{0},0};
  558. e_mw = ehca_mw_new();
  559. if (!e_mw) {
  560. ib_mw = ERR_PTR(-ENOMEM);
  561. goto alloc_mw_exit0;
  562. }
  563. h_ret = hipz_h_alloc_resource_mw(shca->ipz_hca_handle, e_mw,
  564. e_pd->fw_pd, &hipzout);
  565. if (h_ret != H_SUCCESS) {
  566. ehca_err(pd->device, "hipz_mw_allocate failed, h_ret=%lx "
  567. "shca=%p hca_hndl=%lx mw=%p",
  568. h_ret, shca, shca->ipz_hca_handle.handle, e_mw);
  569. ib_mw = ERR_PTR(ehca2ib_return_code(h_ret));
  570. goto alloc_mw_exit1;
  571. }
  572. /* successful MW allocation */
  573. e_mw->ipz_mw_handle = hipzout.handle;
  574. e_mw->ib_mw.rkey = hipzout.rkey;
  575. return &e_mw->ib_mw;
  576. alloc_mw_exit1:
  577. ehca_mw_delete(e_mw);
  578. alloc_mw_exit0:
  579. if (IS_ERR(ib_mw))
  580. ehca_err(pd->device, "rc=%lx pd=%p", PTR_ERR(ib_mw), pd);
  581. return ib_mw;
  582. } /* end ehca_alloc_mw() */
  583. /*----------------------------------------------------------------------*/
  584. int ehca_bind_mw(struct ib_qp *qp,
  585. struct ib_mw *mw,
  586. struct ib_mw_bind *mw_bind)
  587. {
  588. /* TODO: not supported up to now */
  589. ehca_gen_err("bind MW currently not supported by HCAD");
  590. return -EPERM;
  591. } /* end ehca_bind_mw() */
  592. /*----------------------------------------------------------------------*/
  593. int ehca_dealloc_mw(struct ib_mw *mw)
  594. {
  595. u64 h_ret;
  596. struct ehca_shca *shca =
  597. container_of(mw->device, struct ehca_shca, ib_device);
  598. struct ehca_mw *e_mw = container_of(mw, struct ehca_mw, ib_mw);
  599. h_ret = hipz_h_free_resource_mw(shca->ipz_hca_handle, e_mw);
  600. if (h_ret != H_SUCCESS) {
  601. ehca_err(mw->device, "hipz_free_mw failed, h_ret=%lx shca=%p "
  602. "mw=%p rkey=%x hca_hndl=%lx mw_hndl=%lx",
  603. h_ret, shca, mw, mw->rkey, shca->ipz_hca_handle.handle,
  604. e_mw->ipz_mw_handle.handle);
  605. return ehca2ib_return_code(h_ret);
  606. }
  607. /* successful deallocation */
  608. ehca_mw_delete(e_mw);
  609. return 0;
  610. } /* end ehca_dealloc_mw() */
  611. /*----------------------------------------------------------------------*/
  612. struct ib_fmr *ehca_alloc_fmr(struct ib_pd *pd,
  613. int mr_access_flags,
  614. struct ib_fmr_attr *fmr_attr)
  615. {
  616. struct ib_fmr *ib_fmr;
  617. struct ehca_shca *shca =
  618. container_of(pd->device, struct ehca_shca, ib_device);
  619. struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
  620. struct ehca_mr *e_fmr;
  621. int ret;
  622. u32 tmp_lkey, tmp_rkey;
  623. struct ehca_mr_pginfo pginfo={0,0,0,0,0,0,0,NULL,0,NULL,NULL,0,NULL,0};
  624. /* check other parameters */
  625. if (((mr_access_flags & IB_ACCESS_REMOTE_WRITE) &&
  626. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE)) ||
  627. ((mr_access_flags & IB_ACCESS_REMOTE_ATOMIC) &&
  628. !(mr_access_flags & IB_ACCESS_LOCAL_WRITE))) {
  629. /*
  630. * Remote Write Access requires Local Write Access
  631. * Remote Atomic Access requires Local Write Access
  632. */
  633. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  634. mr_access_flags);
  635. ib_fmr = ERR_PTR(-EINVAL);
  636. goto alloc_fmr_exit0;
  637. }
  638. if (mr_access_flags & IB_ACCESS_MW_BIND) {
  639. ehca_err(pd->device, "bad input values: mr_access_flags=%x",
  640. mr_access_flags);
  641. ib_fmr = ERR_PTR(-EINVAL);
  642. goto alloc_fmr_exit0;
  643. }
  644. if ((fmr_attr->max_pages == 0) || (fmr_attr->max_maps == 0)) {
  645. ehca_err(pd->device, "bad input values: fmr_attr->max_pages=%x "
  646. "fmr_attr->max_maps=%x fmr_attr->page_shift=%x",
  647. fmr_attr->max_pages, fmr_attr->max_maps,
  648. fmr_attr->page_shift);
  649. ib_fmr = ERR_PTR(-EINVAL);
  650. goto alloc_fmr_exit0;
  651. }
  652. if (((1 << fmr_attr->page_shift) != EHCA_PAGESIZE) &&
  653. ((1 << fmr_attr->page_shift) != PAGE_SIZE)) {
  654. ehca_err(pd->device, "unsupported fmr_attr->page_shift=%x",
  655. fmr_attr->page_shift);
  656. ib_fmr = ERR_PTR(-EINVAL);
  657. goto alloc_fmr_exit0;
  658. }
  659. e_fmr = ehca_mr_new();
  660. if (!e_fmr) {
  661. ib_fmr = ERR_PTR(-ENOMEM);
  662. goto alloc_fmr_exit0;
  663. }
  664. e_fmr->flags |= EHCA_MR_FLAG_FMR;
  665. /* register MR on HCA */
  666. ret = ehca_reg_mr(shca, e_fmr, NULL,
  667. fmr_attr->max_pages * (1 << fmr_attr->page_shift),
  668. mr_access_flags, e_pd, &pginfo,
  669. &tmp_lkey, &tmp_rkey);
  670. if (ret) {
  671. ib_fmr = ERR_PTR(ret);
  672. goto alloc_fmr_exit1;
  673. }
  674. /* successful */
  675. e_fmr->fmr_page_size = 1 << fmr_attr->page_shift;
  676. e_fmr->fmr_max_pages = fmr_attr->max_pages;
  677. e_fmr->fmr_max_maps = fmr_attr->max_maps;
  678. e_fmr->fmr_map_cnt = 0;
  679. return &e_fmr->ib.ib_fmr;
  680. alloc_fmr_exit1:
  681. ehca_mr_delete(e_fmr);
  682. alloc_fmr_exit0:
  683. if (IS_ERR(ib_fmr))
  684. ehca_err(pd->device, "rc=%lx pd=%p mr_access_flags=%x "
  685. "fmr_attr=%p", PTR_ERR(ib_fmr), pd,
  686. mr_access_flags, fmr_attr);
  687. return ib_fmr;
  688. } /* end ehca_alloc_fmr() */
  689. /*----------------------------------------------------------------------*/
  690. int ehca_map_phys_fmr(struct ib_fmr *fmr,
  691. u64 *page_list,
  692. int list_len,
  693. u64 iova)
  694. {
  695. int ret;
  696. struct ehca_shca *shca =
  697. container_of(fmr->device, struct ehca_shca, ib_device);
  698. struct ehca_mr *e_fmr = container_of(fmr, struct ehca_mr, ib.ib_fmr);
  699. struct ehca_pd *e_pd = container_of(fmr->pd, struct ehca_pd, ib_pd);
  700. struct ehca_mr_pginfo pginfo={0,0,0,0,0,0,0,NULL,0,NULL,NULL,0,NULL,0};
  701. u32 tmp_lkey, tmp_rkey;
  702. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  703. ehca_err(fmr->device, "not a FMR, e_fmr=%p e_fmr->flags=%x",
  704. e_fmr, e_fmr->flags);
  705. ret = -EINVAL;
  706. goto map_phys_fmr_exit0;
  707. }
  708. ret = ehca_fmr_check_page_list(e_fmr, page_list, list_len);
  709. if (ret)
  710. goto map_phys_fmr_exit0;
  711. if (iova % e_fmr->fmr_page_size) {
  712. /* only whole-numbered pages */
  713. ehca_err(fmr->device, "bad iova, iova=%lx fmr_page_size=%x",
  714. iova, e_fmr->fmr_page_size);
  715. ret = -EINVAL;
  716. goto map_phys_fmr_exit0;
  717. }
  718. if (e_fmr->fmr_map_cnt >= e_fmr->fmr_max_maps) {
  719. /* HCAD does not limit the maps, however trace this anyway */
  720. ehca_info(fmr->device, "map limit exceeded, fmr=%p "
  721. "e_fmr->fmr_map_cnt=%x e_fmr->fmr_max_maps=%x",
  722. fmr, e_fmr->fmr_map_cnt, e_fmr->fmr_max_maps);
  723. }
  724. pginfo.type = EHCA_MR_PGI_FMR;
  725. pginfo.num_pages = list_len;
  726. pginfo.num_4k = list_len * (e_fmr->fmr_page_size / EHCA_PAGESIZE);
  727. pginfo.page_list = page_list;
  728. pginfo.next_4k = ((iova & (e_fmr->fmr_page_size-1)) /
  729. EHCA_PAGESIZE);
  730. ret = ehca_rereg_mr(shca, e_fmr, (u64*)iova,
  731. list_len * e_fmr->fmr_page_size,
  732. e_fmr->acl, e_pd, &pginfo, &tmp_lkey, &tmp_rkey);
  733. if (ret)
  734. goto map_phys_fmr_exit0;
  735. /* successful reregistration */
  736. e_fmr->fmr_map_cnt++;
  737. e_fmr->ib.ib_fmr.lkey = tmp_lkey;
  738. e_fmr->ib.ib_fmr.rkey = tmp_rkey;
  739. return 0;
  740. map_phys_fmr_exit0:
  741. if (ret)
  742. ehca_err(fmr->device, "ret=%x fmr=%p page_list=%p list_len=%x "
  743. "iova=%lx",
  744. ret, fmr, page_list, list_len, iova);
  745. return ret;
  746. } /* end ehca_map_phys_fmr() */
  747. /*----------------------------------------------------------------------*/
  748. int ehca_unmap_fmr(struct list_head *fmr_list)
  749. {
  750. int ret = 0;
  751. struct ib_fmr *ib_fmr;
  752. struct ehca_shca *shca = NULL;
  753. struct ehca_shca *prev_shca;
  754. struct ehca_mr *e_fmr;
  755. u32 num_fmr = 0;
  756. u32 unmap_fmr_cnt = 0;
  757. /* check all FMR belong to same SHCA, and check internal flag */
  758. list_for_each_entry(ib_fmr, fmr_list, list) {
  759. prev_shca = shca;
  760. if (!ib_fmr) {
  761. ehca_gen_err("bad fmr=%p in list", ib_fmr);
  762. ret = -EINVAL;
  763. goto unmap_fmr_exit0;
  764. }
  765. shca = container_of(ib_fmr->device, struct ehca_shca,
  766. ib_device);
  767. e_fmr = container_of(ib_fmr, struct ehca_mr, ib.ib_fmr);
  768. if ((shca != prev_shca) && prev_shca) {
  769. ehca_err(&shca->ib_device, "SHCA mismatch, shca=%p "
  770. "prev_shca=%p e_fmr=%p",
  771. shca, prev_shca, e_fmr);
  772. ret = -EINVAL;
  773. goto unmap_fmr_exit0;
  774. }
  775. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  776. ehca_err(&shca->ib_device, "not a FMR, e_fmr=%p "
  777. "e_fmr->flags=%x", e_fmr, e_fmr->flags);
  778. ret = -EINVAL;
  779. goto unmap_fmr_exit0;
  780. }
  781. num_fmr++;
  782. }
  783. /* loop over all FMRs to unmap */
  784. list_for_each_entry(ib_fmr, fmr_list, list) {
  785. unmap_fmr_cnt++;
  786. e_fmr = container_of(ib_fmr, struct ehca_mr, ib.ib_fmr);
  787. shca = container_of(ib_fmr->device, struct ehca_shca,
  788. ib_device);
  789. ret = ehca_unmap_one_fmr(shca, e_fmr);
  790. if (ret) {
  791. /* unmap failed, stop unmapping of rest of FMRs */
  792. ehca_err(&shca->ib_device, "unmap of one FMR failed, "
  793. "stop rest, e_fmr=%p num_fmr=%x "
  794. "unmap_fmr_cnt=%x lkey=%x", e_fmr, num_fmr,
  795. unmap_fmr_cnt, e_fmr->ib.ib_fmr.lkey);
  796. goto unmap_fmr_exit0;
  797. }
  798. }
  799. unmap_fmr_exit0:
  800. if (ret)
  801. ehca_gen_err("ret=%x fmr_list=%p num_fmr=%x unmap_fmr_cnt=%x",
  802. ret, fmr_list, num_fmr, unmap_fmr_cnt);
  803. return ret;
  804. } /* end ehca_unmap_fmr() */
  805. /*----------------------------------------------------------------------*/
  806. int ehca_dealloc_fmr(struct ib_fmr *fmr)
  807. {
  808. int ret;
  809. u64 h_ret;
  810. struct ehca_shca *shca =
  811. container_of(fmr->device, struct ehca_shca, ib_device);
  812. struct ehca_mr *e_fmr = container_of(fmr, struct ehca_mr, ib.ib_fmr);
  813. if (!(e_fmr->flags & EHCA_MR_FLAG_FMR)) {
  814. ehca_err(fmr->device, "not a FMR, e_fmr=%p e_fmr->flags=%x",
  815. e_fmr, e_fmr->flags);
  816. ret = -EINVAL;
  817. goto free_fmr_exit0;
  818. }
  819. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_fmr);
  820. if (h_ret != H_SUCCESS) {
  821. ehca_err(fmr->device, "hipz_free_mr failed, h_ret=%lx e_fmr=%p "
  822. "hca_hndl=%lx fmr_hndl=%lx fmr->lkey=%x",
  823. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  824. e_fmr->ipz_mr_handle.handle, fmr->lkey);
  825. ret = ehca2ib_return_code(h_ret);
  826. goto free_fmr_exit0;
  827. }
  828. /* successful deregistration */
  829. ehca_mr_delete(e_fmr);
  830. return 0;
  831. free_fmr_exit0:
  832. if (ret)
  833. ehca_err(&shca->ib_device, "ret=%x fmr=%p", ret, fmr);
  834. return ret;
  835. } /* end ehca_dealloc_fmr() */
  836. /*----------------------------------------------------------------------*/
  837. int ehca_reg_mr(struct ehca_shca *shca,
  838. struct ehca_mr *e_mr,
  839. u64 *iova_start,
  840. u64 size,
  841. int acl,
  842. struct ehca_pd *e_pd,
  843. struct ehca_mr_pginfo *pginfo,
  844. u32 *lkey, /*OUT*/
  845. u32 *rkey) /*OUT*/
  846. {
  847. int ret;
  848. u64 h_ret;
  849. u32 hipz_acl;
  850. struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0};
  851. ehca_mrmw_map_acl(acl, &hipz_acl);
  852. ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl);
  853. if (ehca_use_hp_mr == 1)
  854. hipz_acl |= 0x00000001;
  855. h_ret = hipz_h_alloc_resource_mr(shca->ipz_hca_handle, e_mr,
  856. (u64)iova_start, size, hipz_acl,
  857. e_pd->fw_pd, &hipzout);
  858. if (h_ret != H_SUCCESS) {
  859. ehca_err(&shca->ib_device, "hipz_alloc_mr failed, h_ret=%lx "
  860. "hca_hndl=%lx", h_ret, shca->ipz_hca_handle.handle);
  861. ret = ehca2ib_return_code(h_ret);
  862. goto ehca_reg_mr_exit0;
  863. }
  864. e_mr->ipz_mr_handle = hipzout.handle;
  865. ret = ehca_reg_mr_rpages(shca, e_mr, pginfo);
  866. if (ret)
  867. goto ehca_reg_mr_exit1;
  868. /* successful registration */
  869. e_mr->num_pages = pginfo->num_pages;
  870. e_mr->num_4k = pginfo->num_4k;
  871. e_mr->start = iova_start;
  872. e_mr->size = size;
  873. e_mr->acl = acl;
  874. *lkey = hipzout.lkey;
  875. *rkey = hipzout.rkey;
  876. return 0;
  877. ehca_reg_mr_exit1:
  878. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  879. if (h_ret != H_SUCCESS) {
  880. ehca_err(&shca->ib_device, "h_ret=%lx shca=%p e_mr=%p "
  881. "iova_start=%p size=%lx acl=%x e_pd=%p lkey=%x "
  882. "pginfo=%p num_pages=%lx num_4k=%lx ret=%x",
  883. h_ret, shca, e_mr, iova_start, size, acl, e_pd,
  884. hipzout.lkey, pginfo, pginfo->num_pages,
  885. pginfo->num_4k, ret);
  886. ehca_err(&shca->ib_device, "internal error in ehca_reg_mr, "
  887. "not recoverable");
  888. }
  889. ehca_reg_mr_exit0:
  890. if (ret)
  891. ehca_err(&shca->ib_device, "ret=%x shca=%p e_mr=%p "
  892. "iova_start=%p size=%lx acl=%x e_pd=%p pginfo=%p "
  893. "num_pages=%lx num_4k=%lx",
  894. ret, shca, e_mr, iova_start, size, acl, e_pd, pginfo,
  895. pginfo->num_pages, pginfo->num_4k);
  896. return ret;
  897. } /* end ehca_reg_mr() */
  898. /*----------------------------------------------------------------------*/
  899. int ehca_reg_mr_rpages(struct ehca_shca *shca,
  900. struct ehca_mr *e_mr,
  901. struct ehca_mr_pginfo *pginfo)
  902. {
  903. int ret = 0;
  904. u64 h_ret;
  905. u32 rnum;
  906. u64 rpage;
  907. u32 i;
  908. u64 *kpage;
  909. kpage = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  910. if (!kpage) {
  911. ehca_err(&shca->ib_device, "kpage alloc failed");
  912. ret = -ENOMEM;
  913. goto ehca_reg_mr_rpages_exit0;
  914. }
  915. /* max 512 pages per shot */
  916. for (i = 0; i < ((pginfo->num_4k + MAX_RPAGES - 1) / MAX_RPAGES); i++) {
  917. if (i == ((pginfo->num_4k + MAX_RPAGES - 1) / MAX_RPAGES) - 1) {
  918. rnum = pginfo->num_4k % MAX_RPAGES; /* last shot */
  919. if (rnum == 0)
  920. rnum = MAX_RPAGES; /* last shot is full */
  921. } else
  922. rnum = MAX_RPAGES;
  923. if (rnum > 1) {
  924. ret = ehca_set_pagebuf(e_mr, pginfo, rnum, kpage);
  925. if (ret) {
  926. ehca_err(&shca->ib_device, "ehca_set_pagebuf "
  927. "bad rc, ret=%x rnum=%x kpage=%p",
  928. ret, rnum, kpage);
  929. ret = -EFAULT;
  930. goto ehca_reg_mr_rpages_exit1;
  931. }
  932. rpage = virt_to_abs(kpage);
  933. if (!rpage) {
  934. ehca_err(&shca->ib_device, "kpage=%p i=%x",
  935. kpage, i);
  936. ret = -EFAULT;
  937. goto ehca_reg_mr_rpages_exit1;
  938. }
  939. } else { /* rnum==1 */
  940. ret = ehca_set_pagebuf_1(e_mr, pginfo, &rpage);
  941. if (ret) {
  942. ehca_err(&shca->ib_device, "ehca_set_pagebuf_1 "
  943. "bad rc, ret=%x i=%x", ret, i);
  944. ret = -EFAULT;
  945. goto ehca_reg_mr_rpages_exit1;
  946. }
  947. }
  948. h_ret = hipz_h_register_rpage_mr(shca->ipz_hca_handle, e_mr,
  949. 0, /* pagesize 4k */
  950. 0, rpage, rnum);
  951. if (i == ((pginfo->num_4k + MAX_RPAGES - 1) / MAX_RPAGES) - 1) {
  952. /*
  953. * check for 'registration complete'==H_SUCCESS
  954. * and for 'page registered'==H_PAGE_REGISTERED
  955. */
  956. if (h_ret != H_SUCCESS) {
  957. ehca_err(&shca->ib_device, "last "
  958. "hipz_reg_rpage_mr failed, h_ret=%lx "
  959. "e_mr=%p i=%x hca_hndl=%lx mr_hndl=%lx"
  960. " lkey=%x", h_ret, e_mr, i,
  961. shca->ipz_hca_handle.handle,
  962. e_mr->ipz_mr_handle.handle,
  963. e_mr->ib.ib_mr.lkey);
  964. ret = ehca2ib_return_code(h_ret);
  965. break;
  966. } else
  967. ret = 0;
  968. } else if (h_ret != H_PAGE_REGISTERED) {
  969. ehca_err(&shca->ib_device, "hipz_reg_rpage_mr failed, "
  970. "h_ret=%lx e_mr=%p i=%x lkey=%x hca_hndl=%lx "
  971. "mr_hndl=%lx", h_ret, e_mr, i,
  972. e_mr->ib.ib_mr.lkey,
  973. shca->ipz_hca_handle.handle,
  974. e_mr->ipz_mr_handle.handle);
  975. ret = ehca2ib_return_code(h_ret);
  976. break;
  977. } else
  978. ret = 0;
  979. } /* end for(i) */
  980. ehca_reg_mr_rpages_exit1:
  981. ehca_free_fw_ctrlblock(kpage);
  982. ehca_reg_mr_rpages_exit0:
  983. if (ret)
  984. ehca_err(&shca->ib_device, "ret=%x shca=%p e_mr=%p pginfo=%p "
  985. "num_pages=%lx num_4k=%lx", ret, shca, e_mr, pginfo,
  986. pginfo->num_pages, pginfo->num_4k);
  987. return ret;
  988. } /* end ehca_reg_mr_rpages() */
  989. /*----------------------------------------------------------------------*/
  990. inline int ehca_rereg_mr_rereg1(struct ehca_shca *shca,
  991. struct ehca_mr *e_mr,
  992. u64 *iova_start,
  993. u64 size,
  994. u32 acl,
  995. struct ehca_pd *e_pd,
  996. struct ehca_mr_pginfo *pginfo,
  997. u32 *lkey, /*OUT*/
  998. u32 *rkey) /*OUT*/
  999. {
  1000. int ret;
  1001. u64 h_ret;
  1002. u32 hipz_acl;
  1003. u64 *kpage;
  1004. u64 rpage;
  1005. struct ehca_mr_pginfo pginfo_save;
  1006. struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0};
  1007. ehca_mrmw_map_acl(acl, &hipz_acl);
  1008. ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl);
  1009. kpage = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
  1010. if (!kpage) {
  1011. ehca_err(&shca->ib_device, "kpage alloc failed");
  1012. ret = -ENOMEM;
  1013. goto ehca_rereg_mr_rereg1_exit0;
  1014. }
  1015. pginfo_save = *pginfo;
  1016. ret = ehca_set_pagebuf(e_mr, pginfo, pginfo->num_4k, kpage);
  1017. if (ret) {
  1018. ehca_err(&shca->ib_device, "set pagebuf failed, e_mr=%p "
  1019. "pginfo=%p type=%x num_pages=%lx num_4k=%lx kpage=%p",
  1020. e_mr, pginfo, pginfo->type, pginfo->num_pages,
  1021. pginfo->num_4k,kpage);
  1022. goto ehca_rereg_mr_rereg1_exit1;
  1023. }
  1024. rpage = virt_to_abs(kpage);
  1025. if (!rpage) {
  1026. ehca_err(&shca->ib_device, "kpage=%p", kpage);
  1027. ret = -EFAULT;
  1028. goto ehca_rereg_mr_rereg1_exit1;
  1029. }
  1030. h_ret = hipz_h_reregister_pmr(shca->ipz_hca_handle, e_mr,
  1031. (u64)iova_start, size, hipz_acl,
  1032. e_pd->fw_pd, rpage, &hipzout);
  1033. if (h_ret != H_SUCCESS) {
  1034. /*
  1035. * reregistration unsuccessful, try it again with the 3 hCalls,
  1036. * e.g. this is required in case H_MR_CONDITION
  1037. * (MW bound or MR is shared)
  1038. */
  1039. ehca_warn(&shca->ib_device, "hipz_h_reregister_pmr failed "
  1040. "(Rereg1), h_ret=%lx e_mr=%p", h_ret, e_mr);
  1041. *pginfo = pginfo_save;
  1042. ret = -EAGAIN;
  1043. } else if ((u64*)hipzout.vaddr != iova_start) {
  1044. ehca_err(&shca->ib_device, "PHYP changed iova_start in "
  1045. "rereg_pmr, iova_start=%p iova_start_out=%lx e_mr=%p "
  1046. "mr_handle=%lx lkey=%x lkey_out=%x", iova_start,
  1047. hipzout.vaddr, e_mr, e_mr->ipz_mr_handle.handle,
  1048. e_mr->ib.ib_mr.lkey, hipzout.lkey);
  1049. ret = -EFAULT;
  1050. } else {
  1051. /*
  1052. * successful reregistration
  1053. * note: start and start_out are identical for eServer HCAs
  1054. */
  1055. e_mr->num_pages = pginfo->num_pages;
  1056. e_mr->num_4k = pginfo->num_4k;
  1057. e_mr->start = iova_start;
  1058. e_mr->size = size;
  1059. e_mr->acl = acl;
  1060. *lkey = hipzout.lkey;
  1061. *rkey = hipzout.rkey;
  1062. }
  1063. ehca_rereg_mr_rereg1_exit1:
  1064. ehca_free_fw_ctrlblock(kpage);
  1065. ehca_rereg_mr_rereg1_exit0:
  1066. if ( ret && (ret != -EAGAIN) )
  1067. ehca_err(&shca->ib_device, "ret=%x lkey=%x rkey=%x "
  1068. "pginfo=%p num_pages=%lx num_4k=%lx",
  1069. ret, *lkey, *rkey, pginfo, pginfo->num_pages,
  1070. pginfo->num_4k);
  1071. return ret;
  1072. } /* end ehca_rereg_mr_rereg1() */
  1073. /*----------------------------------------------------------------------*/
  1074. int ehca_rereg_mr(struct ehca_shca *shca,
  1075. struct ehca_mr *e_mr,
  1076. u64 *iova_start,
  1077. u64 size,
  1078. int acl,
  1079. struct ehca_pd *e_pd,
  1080. struct ehca_mr_pginfo *pginfo,
  1081. u32 *lkey,
  1082. u32 *rkey)
  1083. {
  1084. int ret = 0;
  1085. u64 h_ret;
  1086. int rereg_1_hcall = 1; /* 1: use hipz_h_reregister_pmr directly */
  1087. int rereg_3_hcall = 0; /* 1: use 3 hipz calls for reregistration */
  1088. /* first determine reregistration hCall(s) */
  1089. if ((pginfo->num_4k > MAX_RPAGES) || (e_mr->num_4k > MAX_RPAGES) ||
  1090. (pginfo->num_4k > e_mr->num_4k)) {
  1091. ehca_dbg(&shca->ib_device, "Rereg3 case, pginfo->num_4k=%lx "
  1092. "e_mr->num_4k=%x", pginfo->num_4k, e_mr->num_4k);
  1093. rereg_1_hcall = 0;
  1094. rereg_3_hcall = 1;
  1095. }
  1096. if (e_mr->flags & EHCA_MR_FLAG_MAXMR) { /* check for max-MR */
  1097. rereg_1_hcall = 0;
  1098. rereg_3_hcall = 1;
  1099. e_mr->flags &= ~EHCA_MR_FLAG_MAXMR;
  1100. ehca_err(&shca->ib_device, "Rereg MR for max-MR! e_mr=%p",
  1101. e_mr);
  1102. }
  1103. if (rereg_1_hcall) {
  1104. ret = ehca_rereg_mr_rereg1(shca, e_mr, iova_start, size,
  1105. acl, e_pd, pginfo, lkey, rkey);
  1106. if (ret) {
  1107. if (ret == -EAGAIN)
  1108. rereg_3_hcall = 1;
  1109. else
  1110. goto ehca_rereg_mr_exit0;
  1111. }
  1112. }
  1113. if (rereg_3_hcall) {
  1114. struct ehca_mr save_mr;
  1115. /* first deregister old MR */
  1116. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_mr);
  1117. if (h_ret != H_SUCCESS) {
  1118. ehca_err(&shca->ib_device, "hipz_free_mr failed, "
  1119. "h_ret=%lx e_mr=%p hca_hndl=%lx mr_hndl=%lx "
  1120. "mr->lkey=%x",
  1121. h_ret, e_mr, shca->ipz_hca_handle.handle,
  1122. e_mr->ipz_mr_handle.handle,
  1123. e_mr->ib.ib_mr.lkey);
  1124. ret = ehca2ib_return_code(h_ret);
  1125. goto ehca_rereg_mr_exit0;
  1126. }
  1127. /* clean ehca_mr_t, without changing struct ib_mr and lock */
  1128. save_mr = *e_mr;
  1129. ehca_mr_deletenew(e_mr);
  1130. /* set some MR values */
  1131. e_mr->flags = save_mr.flags;
  1132. e_mr->fmr_page_size = save_mr.fmr_page_size;
  1133. e_mr->fmr_max_pages = save_mr.fmr_max_pages;
  1134. e_mr->fmr_max_maps = save_mr.fmr_max_maps;
  1135. e_mr->fmr_map_cnt = save_mr.fmr_map_cnt;
  1136. ret = ehca_reg_mr(shca, e_mr, iova_start, size, acl,
  1137. e_pd, pginfo, lkey, rkey);
  1138. if (ret) {
  1139. u32 offset = (u64)(&e_mr->flags) - (u64)e_mr;
  1140. memcpy(&e_mr->flags, &(save_mr.flags),
  1141. sizeof(struct ehca_mr) - offset);
  1142. goto ehca_rereg_mr_exit0;
  1143. }
  1144. }
  1145. ehca_rereg_mr_exit0:
  1146. if (ret)
  1147. ehca_err(&shca->ib_device, "ret=%x shca=%p e_mr=%p "
  1148. "iova_start=%p size=%lx acl=%x e_pd=%p pginfo=%p "
  1149. "num_pages=%lx lkey=%x rkey=%x rereg_1_hcall=%x "
  1150. "rereg_3_hcall=%x", ret, shca, e_mr, iova_start, size,
  1151. acl, e_pd, pginfo, pginfo->num_pages, *lkey, *rkey,
  1152. rereg_1_hcall, rereg_3_hcall);
  1153. return ret;
  1154. } /* end ehca_rereg_mr() */
  1155. /*----------------------------------------------------------------------*/
  1156. int ehca_unmap_one_fmr(struct ehca_shca *shca,
  1157. struct ehca_mr *e_fmr)
  1158. {
  1159. int ret = 0;
  1160. u64 h_ret;
  1161. int rereg_1_hcall = 1; /* 1: use hipz_mr_reregister directly */
  1162. int rereg_3_hcall = 0; /* 1: use 3 hipz calls for unmapping */
  1163. struct ehca_pd *e_pd =
  1164. container_of(e_fmr->ib.ib_fmr.pd, struct ehca_pd, ib_pd);
  1165. struct ehca_mr save_fmr;
  1166. u32 tmp_lkey, tmp_rkey;
  1167. struct ehca_mr_pginfo pginfo={0,0,0,0,0,0,0,NULL,0,NULL,NULL,0,NULL,0};
  1168. struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0};
  1169. /* first check if reregistration hCall can be used for unmap */
  1170. if (e_fmr->fmr_max_pages > MAX_RPAGES) {
  1171. rereg_1_hcall = 0;
  1172. rereg_3_hcall = 1;
  1173. }
  1174. if (rereg_1_hcall) {
  1175. /*
  1176. * note: after using rereg hcall with len=0,
  1177. * rereg hcall must be used again for registering pages
  1178. */
  1179. h_ret = hipz_h_reregister_pmr(shca->ipz_hca_handle, e_fmr, 0,
  1180. 0, 0, e_pd->fw_pd, 0, &hipzout);
  1181. if (h_ret != H_SUCCESS) {
  1182. /*
  1183. * should not happen, because length checked above,
  1184. * FMRs are not shared and no MW bound to FMRs
  1185. */
  1186. ehca_err(&shca->ib_device, "hipz_reregister_pmr failed "
  1187. "(Rereg1), h_ret=%lx e_fmr=%p hca_hndl=%lx "
  1188. "mr_hndl=%lx lkey=%x lkey_out=%x",
  1189. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  1190. e_fmr->ipz_mr_handle.handle,
  1191. e_fmr->ib.ib_fmr.lkey, hipzout.lkey);
  1192. rereg_3_hcall = 1;
  1193. } else {
  1194. /* successful reregistration */
  1195. e_fmr->start = NULL;
  1196. e_fmr->size = 0;
  1197. tmp_lkey = hipzout.lkey;
  1198. tmp_rkey = hipzout.rkey;
  1199. }
  1200. }
  1201. if (rereg_3_hcall) {
  1202. struct ehca_mr save_mr;
  1203. /* first free old FMR */
  1204. h_ret = hipz_h_free_resource_mr(shca->ipz_hca_handle, e_fmr);
  1205. if (h_ret != H_SUCCESS) {
  1206. ehca_err(&shca->ib_device, "hipz_free_mr failed, "
  1207. "h_ret=%lx e_fmr=%p hca_hndl=%lx mr_hndl=%lx "
  1208. "lkey=%x",
  1209. h_ret, e_fmr, shca->ipz_hca_handle.handle,
  1210. e_fmr->ipz_mr_handle.handle,
  1211. e_fmr->ib.ib_fmr.lkey);
  1212. ret = ehca2ib_return_code(h_ret);
  1213. goto ehca_unmap_one_fmr_exit0;
  1214. }
  1215. /* clean ehca_mr_t, without changing lock */
  1216. save_fmr = *e_fmr;
  1217. ehca_mr_deletenew(e_fmr);
  1218. /* set some MR values */
  1219. e_fmr->flags = save_fmr.flags;
  1220. e_fmr->fmr_page_size = save_fmr.fmr_page_size;
  1221. e_fmr->fmr_max_pages = save_fmr.fmr_max_pages;
  1222. e_fmr->fmr_max_maps = save_fmr.fmr_max_maps;
  1223. e_fmr->fmr_map_cnt = save_fmr.fmr_map_cnt;
  1224. e_fmr->acl = save_fmr.acl;
  1225. pginfo.type = EHCA_MR_PGI_FMR;
  1226. pginfo.num_pages = 0;
  1227. pginfo.num_4k = 0;
  1228. ret = ehca_reg_mr(shca, e_fmr, NULL,
  1229. (e_fmr->fmr_max_pages * e_fmr->fmr_page_size),
  1230. e_fmr->acl, e_pd, &pginfo, &tmp_lkey,
  1231. &tmp_rkey);
  1232. if (ret) {
  1233. u32 offset = (u64)(&e_fmr->flags) - (u64)e_fmr;
  1234. memcpy(&e_fmr->flags, &(save_mr.flags),
  1235. sizeof(struct ehca_mr) - offset);
  1236. goto ehca_unmap_one_fmr_exit0;
  1237. }
  1238. }
  1239. ehca_unmap_one_fmr_exit0:
  1240. if (ret)
  1241. ehca_err(&shca->ib_device, "ret=%x tmp_lkey=%x tmp_rkey=%x "
  1242. "fmr_max_pages=%x rereg_1_hcall=%x rereg_3_hcall=%x",
  1243. ret, tmp_lkey, tmp_rkey, e_fmr->fmr_max_pages,
  1244. rereg_1_hcall, rereg_3_hcall);
  1245. return ret;
  1246. } /* end ehca_unmap_one_fmr() */
  1247. /*----------------------------------------------------------------------*/
  1248. int ehca_reg_smr(struct ehca_shca *shca,
  1249. struct ehca_mr *e_origmr,
  1250. struct ehca_mr *e_newmr,
  1251. u64 *iova_start,
  1252. int acl,
  1253. struct ehca_pd *e_pd,
  1254. u32 *lkey, /*OUT*/
  1255. u32 *rkey) /*OUT*/
  1256. {
  1257. int ret = 0;
  1258. u64 h_ret;
  1259. u32 hipz_acl;
  1260. struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0};
  1261. ehca_mrmw_map_acl(acl, &hipz_acl);
  1262. ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl);
  1263. h_ret = hipz_h_register_smr(shca->ipz_hca_handle, e_newmr, e_origmr,
  1264. (u64)iova_start, hipz_acl, e_pd->fw_pd,
  1265. &hipzout);
  1266. if (h_ret != H_SUCCESS) {
  1267. ehca_err(&shca->ib_device, "hipz_reg_smr failed, h_ret=%lx "
  1268. "shca=%p e_origmr=%p e_newmr=%p iova_start=%p acl=%x "
  1269. "e_pd=%p hca_hndl=%lx mr_hndl=%lx lkey=%x",
  1270. h_ret, shca, e_origmr, e_newmr, iova_start, acl, e_pd,
  1271. shca->ipz_hca_handle.handle,
  1272. e_origmr->ipz_mr_handle.handle,
  1273. e_origmr->ib.ib_mr.lkey);
  1274. ret = ehca2ib_return_code(h_ret);
  1275. goto ehca_reg_smr_exit0;
  1276. }
  1277. /* successful registration */
  1278. e_newmr->num_pages = e_origmr->num_pages;
  1279. e_newmr->num_4k = e_origmr->num_4k;
  1280. e_newmr->start = iova_start;
  1281. e_newmr->size = e_origmr->size;
  1282. e_newmr->acl = acl;
  1283. e_newmr->ipz_mr_handle = hipzout.handle;
  1284. *lkey = hipzout.lkey;
  1285. *rkey = hipzout.rkey;
  1286. return 0;
  1287. ehca_reg_smr_exit0:
  1288. if (ret)
  1289. ehca_err(&shca->ib_device, "ret=%x shca=%p e_origmr=%p "
  1290. "e_newmr=%p iova_start=%p acl=%x e_pd=%p",
  1291. ret, shca, e_origmr, e_newmr, iova_start, acl, e_pd);
  1292. return ret;
  1293. } /* end ehca_reg_smr() */
  1294. /*----------------------------------------------------------------------*/
  1295. /* register internal max-MR to internal SHCA */
  1296. int ehca_reg_internal_maxmr(
  1297. struct ehca_shca *shca,
  1298. struct ehca_pd *e_pd,
  1299. struct ehca_mr **e_maxmr) /*OUT*/
  1300. {
  1301. int ret;
  1302. struct ehca_mr *e_mr;
  1303. u64 *iova_start;
  1304. u64 size_maxmr;
  1305. struct ehca_mr_pginfo pginfo={0,0,0,0,0,0,0,NULL,0,NULL,NULL,0,NULL,0};
  1306. struct ib_phys_buf ib_pbuf;
  1307. u32 num_pages_mr;
  1308. u32 num_pages_4k; /* 4k portion "pages" */
  1309. e_mr = ehca_mr_new();
  1310. if (!e_mr) {
  1311. ehca_err(&shca->ib_device, "out of memory");
  1312. ret = -ENOMEM;
  1313. goto ehca_reg_internal_maxmr_exit0;
  1314. }
  1315. e_mr->flags |= EHCA_MR_FLAG_MAXMR;
  1316. /* register internal max-MR on HCA */
  1317. size_maxmr = (u64)high_memory - PAGE_OFFSET;
  1318. iova_start = (u64*)KERNELBASE;
  1319. ib_pbuf.addr = 0;
  1320. ib_pbuf.size = size_maxmr;
  1321. num_pages_mr = ((((u64)iova_start % PAGE_SIZE) + size_maxmr +
  1322. PAGE_SIZE - 1) / PAGE_SIZE);
  1323. num_pages_4k = ((((u64)iova_start % EHCA_PAGESIZE) + size_maxmr +
  1324. EHCA_PAGESIZE - 1) / EHCA_PAGESIZE);
  1325. pginfo.type = EHCA_MR_PGI_PHYS;
  1326. pginfo.num_pages = num_pages_mr;
  1327. pginfo.num_4k = num_pages_4k;
  1328. pginfo.num_phys_buf = 1;
  1329. pginfo.phys_buf_array = &ib_pbuf;
  1330. ret = ehca_reg_mr(shca, e_mr, iova_start, size_maxmr, 0, e_pd,
  1331. &pginfo, &e_mr->ib.ib_mr.lkey,
  1332. &e_mr->ib.ib_mr.rkey);
  1333. if (ret) {
  1334. ehca_err(&shca->ib_device, "reg of internal max MR failed, "
  1335. "e_mr=%p iova_start=%p size_maxmr=%lx num_pages_mr=%x "
  1336. "num_pages_4k=%x", e_mr, iova_start, size_maxmr,
  1337. num_pages_mr, num_pages_4k);
  1338. goto ehca_reg_internal_maxmr_exit1;
  1339. }
  1340. /* successful registration of all pages */
  1341. e_mr->ib.ib_mr.device = e_pd->ib_pd.device;
  1342. e_mr->ib.ib_mr.pd = &e_pd->ib_pd;
  1343. e_mr->ib.ib_mr.uobject = NULL;
  1344. atomic_inc(&(e_pd->ib_pd.usecnt));
  1345. atomic_set(&(e_mr->ib.ib_mr.usecnt), 0);
  1346. *e_maxmr = e_mr;
  1347. return 0;
  1348. ehca_reg_internal_maxmr_exit1:
  1349. ehca_mr_delete(e_mr);
  1350. ehca_reg_internal_maxmr_exit0:
  1351. if (ret)
  1352. ehca_err(&shca->ib_device, "ret=%x shca=%p e_pd=%p e_maxmr=%p",
  1353. ret, shca, e_pd, e_maxmr);
  1354. return ret;
  1355. } /* end ehca_reg_internal_maxmr() */
  1356. /*----------------------------------------------------------------------*/
  1357. int ehca_reg_maxmr(struct ehca_shca *shca,
  1358. struct ehca_mr *e_newmr,
  1359. u64 *iova_start,
  1360. int acl,
  1361. struct ehca_pd *e_pd,
  1362. u32 *lkey,
  1363. u32 *rkey)
  1364. {
  1365. u64 h_ret;
  1366. struct ehca_mr *e_origmr = shca->maxmr;
  1367. u32 hipz_acl;
  1368. struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0};
  1369. ehca_mrmw_map_acl(acl, &hipz_acl);
  1370. ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl);
  1371. h_ret = hipz_h_register_smr(shca->ipz_hca_handle, e_newmr, e_origmr,
  1372. (u64)iova_start, hipz_acl, e_pd->fw_pd,
  1373. &hipzout);
  1374. if (h_ret != H_SUCCESS) {
  1375. ehca_err(&shca->ib_device, "hipz_reg_smr failed, h_ret=%lx "
  1376. "e_origmr=%p hca_hndl=%lx mr_hndl=%lx lkey=%x",
  1377. h_ret, e_origmr, shca->ipz_hca_handle.handle,
  1378. e_origmr->ipz_mr_handle.handle,
  1379. e_origmr->ib.ib_mr.lkey);
  1380. return ehca2ib_return_code(h_ret);
  1381. }
  1382. /* successful registration */
  1383. e_newmr->num_pages = e_origmr->num_pages;
  1384. e_newmr->num_4k = e_origmr->num_4k;
  1385. e_newmr->start = iova_start;
  1386. e_newmr->size = e_origmr->size;
  1387. e_newmr->acl = acl;
  1388. e_newmr->ipz_mr_handle = hipzout.handle;
  1389. *lkey = hipzout.lkey;
  1390. *rkey = hipzout.rkey;
  1391. return 0;
  1392. } /* end ehca_reg_maxmr() */
  1393. /*----------------------------------------------------------------------*/
  1394. int ehca_dereg_internal_maxmr(struct ehca_shca *shca)
  1395. {
  1396. int ret;
  1397. struct ehca_mr *e_maxmr;
  1398. struct ib_pd *ib_pd;
  1399. if (!shca->maxmr) {
  1400. ehca_err(&shca->ib_device, "bad call, shca=%p", shca);
  1401. ret = -EINVAL;
  1402. goto ehca_dereg_internal_maxmr_exit0;
  1403. }
  1404. e_maxmr = shca->maxmr;
  1405. ib_pd = e_maxmr->ib.ib_mr.pd;
  1406. shca->maxmr = NULL; /* remove internal max-MR indication from SHCA */
  1407. ret = ehca_dereg_mr(&e_maxmr->ib.ib_mr);
  1408. if (ret) {
  1409. ehca_err(&shca->ib_device, "dereg internal max-MR failed, "
  1410. "ret=%x e_maxmr=%p shca=%p lkey=%x",
  1411. ret, e_maxmr, shca, e_maxmr->ib.ib_mr.lkey);
  1412. shca->maxmr = e_maxmr;
  1413. goto ehca_dereg_internal_maxmr_exit0;
  1414. }
  1415. atomic_dec(&ib_pd->usecnt);
  1416. ehca_dereg_internal_maxmr_exit0:
  1417. if (ret)
  1418. ehca_err(&shca->ib_device, "ret=%x shca=%p shca->maxmr=%p",
  1419. ret, shca, shca->maxmr);
  1420. return ret;
  1421. } /* end ehca_dereg_internal_maxmr() */
  1422. /*----------------------------------------------------------------------*/
  1423. /*
  1424. * check physical buffer array of MR verbs for validness and
  1425. * calculates MR size
  1426. */
  1427. int ehca_mr_chk_buf_and_calc_size(struct ib_phys_buf *phys_buf_array,
  1428. int num_phys_buf,
  1429. u64 *iova_start,
  1430. u64 *size)
  1431. {
  1432. struct ib_phys_buf *pbuf = phys_buf_array;
  1433. u64 size_count = 0;
  1434. u32 i;
  1435. if (num_phys_buf == 0) {
  1436. ehca_gen_err("bad phys buf array len, num_phys_buf=0");
  1437. return -EINVAL;
  1438. }
  1439. /* check first buffer */
  1440. if (((u64)iova_start & ~PAGE_MASK) != (pbuf->addr & ~PAGE_MASK)) {
  1441. ehca_gen_err("iova_start/addr mismatch, iova_start=%p "
  1442. "pbuf->addr=%lx pbuf->size=%lx",
  1443. iova_start, pbuf->addr, pbuf->size);
  1444. return -EINVAL;
  1445. }
  1446. if (((pbuf->addr + pbuf->size) % PAGE_SIZE) &&
  1447. (num_phys_buf > 1)) {
  1448. ehca_gen_err("addr/size mismatch in 1st buf, pbuf->addr=%lx "
  1449. "pbuf->size=%lx", pbuf->addr, pbuf->size);
  1450. return -EINVAL;
  1451. }
  1452. for (i = 0; i < num_phys_buf; i++) {
  1453. if ((i > 0) && (pbuf->addr % PAGE_SIZE)) {
  1454. ehca_gen_err("bad address, i=%x pbuf->addr=%lx "
  1455. "pbuf->size=%lx",
  1456. i, pbuf->addr, pbuf->size);
  1457. return -EINVAL;
  1458. }
  1459. if (((i > 0) && /* not 1st */
  1460. (i < (num_phys_buf - 1)) && /* not last */
  1461. (pbuf->size % PAGE_SIZE)) || (pbuf->size == 0)) {
  1462. ehca_gen_err("bad size, i=%x pbuf->size=%lx",
  1463. i, pbuf->size);
  1464. return -EINVAL;
  1465. }
  1466. size_count += pbuf->size;
  1467. pbuf++;
  1468. }
  1469. *size = size_count;
  1470. return 0;
  1471. } /* end ehca_mr_chk_buf_and_calc_size() */
  1472. /*----------------------------------------------------------------------*/
  1473. /* check page list of map FMR verb for validness */
  1474. int ehca_fmr_check_page_list(struct ehca_mr *e_fmr,
  1475. u64 *page_list,
  1476. int list_len)
  1477. {
  1478. u32 i;
  1479. u64 *page;
  1480. if ((list_len == 0) || (list_len > e_fmr->fmr_max_pages)) {
  1481. ehca_gen_err("bad list_len, list_len=%x "
  1482. "e_fmr->fmr_max_pages=%x fmr=%p",
  1483. list_len, e_fmr->fmr_max_pages, e_fmr);
  1484. return -EINVAL;
  1485. }
  1486. /* each page must be aligned */
  1487. page = page_list;
  1488. for (i = 0; i < list_len; i++) {
  1489. if (*page % e_fmr->fmr_page_size) {
  1490. ehca_gen_err("bad page, i=%x *page=%lx page=%p fmr=%p "
  1491. "fmr_page_size=%x", i, *page, page, e_fmr,
  1492. e_fmr->fmr_page_size);
  1493. return -EINVAL;
  1494. }
  1495. page++;
  1496. }
  1497. return 0;
  1498. } /* end ehca_fmr_check_page_list() */
  1499. /*----------------------------------------------------------------------*/
  1500. /* setup page buffer from page info */
  1501. int ehca_set_pagebuf(struct ehca_mr *e_mr,
  1502. struct ehca_mr_pginfo *pginfo,
  1503. u32 number,
  1504. u64 *kpage)
  1505. {
  1506. int ret = 0;
  1507. struct ib_umem_chunk *prev_chunk;
  1508. struct ib_umem_chunk *chunk;
  1509. struct ib_phys_buf *pbuf;
  1510. u64 *fmrlist;
  1511. u64 num4k, pgaddr, offs4k;
  1512. u32 i = 0;
  1513. u32 j = 0;
  1514. if (pginfo->type == EHCA_MR_PGI_PHYS) {
  1515. /* loop over desired phys_buf_array entries */
  1516. while (i < number) {
  1517. pbuf = pginfo->phys_buf_array + pginfo->next_buf;
  1518. num4k = ((pbuf->addr % EHCA_PAGESIZE) + pbuf->size +
  1519. EHCA_PAGESIZE - 1) / EHCA_PAGESIZE;
  1520. offs4k = (pbuf->addr & ~PAGE_MASK) / EHCA_PAGESIZE;
  1521. while (pginfo->next_4k < offs4k + num4k) {
  1522. /* sanity check */
  1523. if ((pginfo->page_cnt >= pginfo->num_pages) ||
  1524. (pginfo->page_4k_cnt >= pginfo->num_4k)) {
  1525. ehca_gen_err("page_cnt >= num_pages, "
  1526. "page_cnt=%lx "
  1527. "num_pages=%lx "
  1528. "page_4k_cnt=%lx "
  1529. "num_4k=%lx i=%x",
  1530. pginfo->page_cnt,
  1531. pginfo->num_pages,
  1532. pginfo->page_4k_cnt,
  1533. pginfo->num_4k, i);
  1534. ret = -EFAULT;
  1535. goto ehca_set_pagebuf_exit0;
  1536. }
  1537. *kpage = phys_to_abs(
  1538. (pbuf->addr & EHCA_PAGEMASK)
  1539. + (pginfo->next_4k * EHCA_PAGESIZE));
  1540. if ( !(*kpage) && pbuf->addr ) {
  1541. ehca_gen_err("pbuf->addr=%lx "
  1542. "pbuf->size=%lx "
  1543. "next_4k=%lx", pbuf->addr,
  1544. pbuf->size,
  1545. pginfo->next_4k);
  1546. ret = -EFAULT;
  1547. goto ehca_set_pagebuf_exit0;
  1548. }
  1549. (pginfo->page_4k_cnt)++;
  1550. (pginfo->next_4k)++;
  1551. if (pginfo->next_4k %
  1552. (PAGE_SIZE / EHCA_PAGESIZE) == 0)
  1553. (pginfo->page_cnt)++;
  1554. kpage++;
  1555. i++;
  1556. if (i >= number) break;
  1557. }
  1558. if (pginfo->next_4k >= offs4k + num4k) {
  1559. (pginfo->next_buf)++;
  1560. pginfo->next_4k = 0;
  1561. }
  1562. }
  1563. } else if (pginfo->type == EHCA_MR_PGI_USER) {
  1564. /* loop over desired chunk entries */
  1565. chunk = pginfo->next_chunk;
  1566. prev_chunk = pginfo->next_chunk;
  1567. list_for_each_entry_continue(chunk,
  1568. (&(pginfo->region->chunk_list)),
  1569. list) {
  1570. for (i = pginfo->next_nmap; i < chunk->nmap; ) {
  1571. pgaddr = ( page_to_pfn(chunk->page_list[i].page)
  1572. << PAGE_SHIFT );
  1573. *kpage = phys_to_abs(pgaddr +
  1574. (pginfo->next_4k *
  1575. EHCA_PAGESIZE));
  1576. if ( !(*kpage) ) {
  1577. ehca_gen_err("pgaddr=%lx "
  1578. "chunk->page_list[i]=%lx "
  1579. "i=%x next_4k=%lx mr=%p",
  1580. pgaddr,
  1581. (u64)sg_dma_address(
  1582. &chunk->
  1583. page_list[i]),
  1584. i, pginfo->next_4k, e_mr);
  1585. ret = -EFAULT;
  1586. goto ehca_set_pagebuf_exit0;
  1587. }
  1588. (pginfo->page_4k_cnt)++;
  1589. (pginfo->next_4k)++;
  1590. kpage++;
  1591. if (pginfo->next_4k %
  1592. (PAGE_SIZE / EHCA_PAGESIZE) == 0) {
  1593. (pginfo->page_cnt)++;
  1594. (pginfo->next_nmap)++;
  1595. pginfo->next_4k = 0;
  1596. i++;
  1597. }
  1598. j++;
  1599. if (j >= number) break;
  1600. }
  1601. if ((pginfo->next_nmap >= chunk->nmap) &&
  1602. (j >= number)) {
  1603. pginfo->next_nmap = 0;
  1604. prev_chunk = chunk;
  1605. break;
  1606. } else if (pginfo->next_nmap >= chunk->nmap) {
  1607. pginfo->next_nmap = 0;
  1608. prev_chunk = chunk;
  1609. } else if (j >= number)
  1610. break;
  1611. else
  1612. prev_chunk = chunk;
  1613. }
  1614. pginfo->next_chunk =
  1615. list_prepare_entry(prev_chunk,
  1616. (&(pginfo->region->chunk_list)),
  1617. list);
  1618. } else if (pginfo->type == EHCA_MR_PGI_FMR) {
  1619. /* loop over desired page_list entries */
  1620. fmrlist = pginfo->page_list + pginfo->next_listelem;
  1621. for (i = 0; i < number; i++) {
  1622. *kpage = phys_to_abs((*fmrlist & EHCA_PAGEMASK) +
  1623. pginfo->next_4k * EHCA_PAGESIZE);
  1624. if ( !(*kpage) ) {
  1625. ehca_gen_err("*fmrlist=%lx fmrlist=%p "
  1626. "next_listelem=%lx next_4k=%lx",
  1627. *fmrlist, fmrlist,
  1628. pginfo->next_listelem,
  1629. pginfo->next_4k);
  1630. ret = -EFAULT;
  1631. goto ehca_set_pagebuf_exit0;
  1632. }
  1633. (pginfo->page_4k_cnt)++;
  1634. (pginfo->next_4k)++;
  1635. kpage++;
  1636. if (pginfo->next_4k %
  1637. (e_mr->fmr_page_size / EHCA_PAGESIZE) == 0) {
  1638. (pginfo->page_cnt)++;
  1639. (pginfo->next_listelem)++;
  1640. fmrlist++;
  1641. pginfo->next_4k = 0;
  1642. }
  1643. }
  1644. } else {
  1645. ehca_gen_err("bad pginfo->type=%x", pginfo->type);
  1646. ret = -EFAULT;
  1647. goto ehca_set_pagebuf_exit0;
  1648. }
  1649. ehca_set_pagebuf_exit0:
  1650. if (ret)
  1651. ehca_gen_err("ret=%x e_mr=%p pginfo=%p type=%x num_pages=%lx "
  1652. "num_4k=%lx next_buf=%lx next_4k=%lx number=%x "
  1653. "kpage=%p page_cnt=%lx page_4k_cnt=%lx i=%x "
  1654. "next_listelem=%lx region=%p next_chunk=%p "
  1655. "next_nmap=%lx", ret, e_mr, pginfo, pginfo->type,
  1656. pginfo->num_pages, pginfo->num_4k,
  1657. pginfo->next_buf, pginfo->next_4k, number, kpage,
  1658. pginfo->page_cnt, pginfo->page_4k_cnt, i,
  1659. pginfo->next_listelem, pginfo->region,
  1660. pginfo->next_chunk, pginfo->next_nmap);
  1661. return ret;
  1662. } /* end ehca_set_pagebuf() */
  1663. /*----------------------------------------------------------------------*/
  1664. /* setup 1 page from page info page buffer */
  1665. int ehca_set_pagebuf_1(struct ehca_mr *e_mr,
  1666. struct ehca_mr_pginfo *pginfo,
  1667. u64 *rpage)
  1668. {
  1669. int ret = 0;
  1670. struct ib_phys_buf *tmp_pbuf;
  1671. u64 *fmrlist;
  1672. struct ib_umem_chunk *chunk;
  1673. struct ib_umem_chunk *prev_chunk;
  1674. u64 pgaddr, num4k, offs4k;
  1675. if (pginfo->type == EHCA_MR_PGI_PHYS) {
  1676. /* sanity check */
  1677. if ((pginfo->page_cnt >= pginfo->num_pages) ||
  1678. (pginfo->page_4k_cnt >= pginfo->num_4k)) {
  1679. ehca_gen_err("page_cnt >= num_pages, page_cnt=%lx "
  1680. "num_pages=%lx page_4k_cnt=%lx num_4k=%lx",
  1681. pginfo->page_cnt, pginfo->num_pages,
  1682. pginfo->page_4k_cnt, pginfo->num_4k);
  1683. ret = -EFAULT;
  1684. goto ehca_set_pagebuf_1_exit0;
  1685. }
  1686. tmp_pbuf = pginfo->phys_buf_array + pginfo->next_buf;
  1687. num4k = ((tmp_pbuf->addr % EHCA_PAGESIZE) + tmp_pbuf->size +
  1688. EHCA_PAGESIZE - 1) / EHCA_PAGESIZE;
  1689. offs4k = (tmp_pbuf->addr & ~PAGE_MASK) / EHCA_PAGESIZE;
  1690. *rpage = phys_to_abs((tmp_pbuf->addr & EHCA_PAGEMASK) +
  1691. (pginfo->next_4k * EHCA_PAGESIZE));
  1692. if ( !(*rpage) && tmp_pbuf->addr ) {
  1693. ehca_gen_err("tmp_pbuf->addr=%lx"
  1694. " tmp_pbuf->size=%lx next_4k=%lx",
  1695. tmp_pbuf->addr, tmp_pbuf->size,
  1696. pginfo->next_4k);
  1697. ret = -EFAULT;
  1698. goto ehca_set_pagebuf_1_exit0;
  1699. }
  1700. (pginfo->page_4k_cnt)++;
  1701. (pginfo->next_4k)++;
  1702. if (pginfo->next_4k % (PAGE_SIZE / EHCA_PAGESIZE) == 0)
  1703. (pginfo->page_cnt)++;
  1704. if (pginfo->next_4k >= offs4k + num4k) {
  1705. (pginfo->next_buf)++;
  1706. pginfo->next_4k = 0;
  1707. }
  1708. } else if (pginfo->type == EHCA_MR_PGI_USER) {
  1709. chunk = pginfo->next_chunk;
  1710. prev_chunk = pginfo->next_chunk;
  1711. list_for_each_entry_continue(chunk,
  1712. (&(pginfo->region->chunk_list)),
  1713. list) {
  1714. pgaddr = ( page_to_pfn(chunk->page_list[
  1715. pginfo->next_nmap].page)
  1716. << PAGE_SHIFT);
  1717. *rpage = phys_to_abs(pgaddr +
  1718. (pginfo->next_4k * EHCA_PAGESIZE));
  1719. if ( !(*rpage) ) {
  1720. ehca_gen_err("pgaddr=%lx chunk->page_list[]=%lx"
  1721. " next_nmap=%lx next_4k=%lx mr=%p",
  1722. pgaddr, (u64)sg_dma_address(
  1723. &chunk->page_list[
  1724. pginfo->
  1725. next_nmap]),
  1726. pginfo->next_nmap, pginfo->next_4k,
  1727. e_mr);
  1728. ret = -EFAULT;
  1729. goto ehca_set_pagebuf_1_exit0;
  1730. }
  1731. (pginfo->page_4k_cnt)++;
  1732. (pginfo->next_4k)++;
  1733. if (pginfo->next_4k %
  1734. (PAGE_SIZE / EHCA_PAGESIZE) == 0) {
  1735. (pginfo->page_cnt)++;
  1736. (pginfo->next_nmap)++;
  1737. pginfo->next_4k = 0;
  1738. }
  1739. if (pginfo->next_nmap >= chunk->nmap) {
  1740. pginfo->next_nmap = 0;
  1741. prev_chunk = chunk;
  1742. }
  1743. break;
  1744. }
  1745. pginfo->next_chunk =
  1746. list_prepare_entry(prev_chunk,
  1747. (&(pginfo->region->chunk_list)),
  1748. list);
  1749. } else if (pginfo->type == EHCA_MR_PGI_FMR) {
  1750. fmrlist = pginfo->page_list + pginfo->next_listelem;
  1751. *rpage = phys_to_abs((*fmrlist & EHCA_PAGEMASK) +
  1752. pginfo->next_4k * EHCA_PAGESIZE);
  1753. if ( !(*rpage) ) {
  1754. ehca_gen_err("*fmrlist=%lx fmrlist=%p "
  1755. "next_listelem=%lx next_4k=%lx",
  1756. *fmrlist, fmrlist, pginfo->next_listelem,
  1757. pginfo->next_4k);
  1758. ret = -EFAULT;
  1759. goto ehca_set_pagebuf_1_exit0;
  1760. }
  1761. (pginfo->page_4k_cnt)++;
  1762. (pginfo->next_4k)++;
  1763. if (pginfo->next_4k %
  1764. (e_mr->fmr_page_size / EHCA_PAGESIZE) == 0) {
  1765. (pginfo->page_cnt)++;
  1766. (pginfo->next_listelem)++;
  1767. pginfo->next_4k = 0;
  1768. }
  1769. } else {
  1770. ehca_gen_err("bad pginfo->type=%x", pginfo->type);
  1771. ret = -EFAULT;
  1772. goto ehca_set_pagebuf_1_exit0;
  1773. }
  1774. ehca_set_pagebuf_1_exit0:
  1775. if (ret)
  1776. ehca_gen_err("ret=%x e_mr=%p pginfo=%p type=%x num_pages=%lx "
  1777. "num_4k=%lx next_buf=%lx next_4k=%lx rpage=%p "
  1778. "page_cnt=%lx page_4k_cnt=%lx next_listelem=%lx "
  1779. "region=%p next_chunk=%p next_nmap=%lx", ret, e_mr,
  1780. pginfo, pginfo->type, pginfo->num_pages,
  1781. pginfo->num_4k, pginfo->next_buf, pginfo->next_4k,
  1782. rpage, pginfo->page_cnt, pginfo->page_4k_cnt,
  1783. pginfo->next_listelem, pginfo->region,
  1784. pginfo->next_chunk, pginfo->next_nmap);
  1785. return ret;
  1786. } /* end ehca_set_pagebuf_1() */
  1787. /*----------------------------------------------------------------------*/
  1788. /*
  1789. * check MR if it is a max-MR, i.e. uses whole memory
  1790. * in case it's a max-MR 1 is returned, else 0
  1791. */
  1792. int ehca_mr_is_maxmr(u64 size,
  1793. u64 *iova_start)
  1794. {
  1795. /* a MR is treated as max-MR only if it fits following: */
  1796. if ((size == ((u64)high_memory - PAGE_OFFSET)) &&
  1797. (iova_start == (void*)KERNELBASE)) {
  1798. ehca_gen_dbg("this is a max-MR");
  1799. return 1;
  1800. } else
  1801. return 0;
  1802. } /* end ehca_mr_is_maxmr() */
  1803. /*----------------------------------------------------------------------*/
  1804. /* map access control for MR/MW. This routine is used for MR and MW. */
  1805. void ehca_mrmw_map_acl(int ib_acl,
  1806. u32 *hipz_acl)
  1807. {
  1808. *hipz_acl = 0;
  1809. if (ib_acl & IB_ACCESS_REMOTE_READ)
  1810. *hipz_acl |= HIPZ_ACCESSCTRL_R_READ;
  1811. if (ib_acl & IB_ACCESS_REMOTE_WRITE)
  1812. *hipz_acl |= HIPZ_ACCESSCTRL_R_WRITE;
  1813. if (ib_acl & IB_ACCESS_REMOTE_ATOMIC)
  1814. *hipz_acl |= HIPZ_ACCESSCTRL_R_ATOMIC;
  1815. if (ib_acl & IB_ACCESS_LOCAL_WRITE)
  1816. *hipz_acl |= HIPZ_ACCESSCTRL_L_WRITE;
  1817. if (ib_acl & IB_ACCESS_MW_BIND)
  1818. *hipz_acl |= HIPZ_ACCESSCTRL_MW_BIND;
  1819. } /* end ehca_mrmw_map_acl() */
  1820. /*----------------------------------------------------------------------*/
  1821. /* sets page size in hipz access control for MR/MW. */
  1822. void ehca_mrmw_set_pgsize_hipz_acl(u32 *hipz_acl) /*INOUT*/
  1823. {
  1824. return; /* HCA supports only 4k */
  1825. } /* end ehca_mrmw_set_pgsize_hipz_acl() */
  1826. /*----------------------------------------------------------------------*/
  1827. /*
  1828. * reverse map access control for MR/MW.
  1829. * This routine is used for MR and MW.
  1830. */
  1831. void ehca_mrmw_reverse_map_acl(const u32 *hipz_acl,
  1832. int *ib_acl) /*OUT*/
  1833. {
  1834. *ib_acl = 0;
  1835. if (*hipz_acl & HIPZ_ACCESSCTRL_R_READ)
  1836. *ib_acl |= IB_ACCESS_REMOTE_READ;
  1837. if (*hipz_acl & HIPZ_ACCESSCTRL_R_WRITE)
  1838. *ib_acl |= IB_ACCESS_REMOTE_WRITE;
  1839. if (*hipz_acl & HIPZ_ACCESSCTRL_R_ATOMIC)
  1840. *ib_acl |= IB_ACCESS_REMOTE_ATOMIC;
  1841. if (*hipz_acl & HIPZ_ACCESSCTRL_L_WRITE)
  1842. *ib_acl |= IB_ACCESS_LOCAL_WRITE;
  1843. if (*hipz_acl & HIPZ_ACCESSCTRL_MW_BIND)
  1844. *ib_acl |= IB_ACCESS_MW_BIND;
  1845. } /* end ehca_mrmw_reverse_map_acl() */
  1846. /*----------------------------------------------------------------------*/
  1847. /*
  1848. * MR destructor and constructor
  1849. * used in Reregister MR verb, sets all fields in ehca_mr_t to 0,
  1850. * except struct ib_mr and spinlock
  1851. */
  1852. void ehca_mr_deletenew(struct ehca_mr *mr)
  1853. {
  1854. mr->flags = 0;
  1855. mr->num_pages = 0;
  1856. mr->num_4k = 0;
  1857. mr->acl = 0;
  1858. mr->start = NULL;
  1859. mr->fmr_page_size = 0;
  1860. mr->fmr_max_pages = 0;
  1861. mr->fmr_max_maps = 0;
  1862. mr->fmr_map_cnt = 0;
  1863. memset(&mr->ipz_mr_handle, 0, sizeof(mr->ipz_mr_handle));
  1864. memset(&mr->galpas, 0, sizeof(mr->galpas));
  1865. mr->nr_of_pages = 0;
  1866. mr->pagearray = NULL;
  1867. } /* end ehca_mr_deletenew() */
  1868. int ehca_init_mrmw_cache(void)
  1869. {
  1870. mr_cache = kmem_cache_create("ehca_cache_mr",
  1871. sizeof(struct ehca_mr), 0,
  1872. SLAB_HWCACHE_ALIGN,
  1873. NULL, NULL);
  1874. if (!mr_cache)
  1875. return -ENOMEM;
  1876. mw_cache = kmem_cache_create("ehca_cache_mw",
  1877. sizeof(struct ehca_mw), 0,
  1878. SLAB_HWCACHE_ALIGN,
  1879. NULL, NULL);
  1880. if (!mw_cache) {
  1881. kmem_cache_destroy(mr_cache);
  1882. mr_cache = NULL;
  1883. return -ENOMEM;
  1884. }
  1885. return 0;
  1886. }
  1887. void ehca_cleanup_mrmw_cache(void)
  1888. {
  1889. if (mr_cache)
  1890. kmem_cache_destroy(mr_cache);
  1891. if (mw_cache)
  1892. kmem_cache_destroy(mw_cache);
  1893. }