microcode_intel.c 14 KB

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  1. /*
  2. * Intel CPU Microcode Update Driver for Linux
  3. *
  4. * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  5. * 2006 Shaohua Li <shaohua.li@intel.com>
  6. *
  7. * This driver allows to upgrade microcode on Intel processors
  8. * belonging to IA-32 family - PentiumPro, Pentium II,
  9. * Pentium III, Xeon, Pentium 4, etc.
  10. *
  11. * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
  12. * Software Developer's Manual
  13. * Order Number 253668 or free download from:
  14. *
  15. * http://developer.intel.com/design/pentium4/manuals/253668.htm
  16. *
  17. * For more information, go to http://www.urbanmyth.org/microcode
  18. *
  19. * This program is free software; you can redistribute it and/or
  20. * modify it under the terms of the GNU General Public License
  21. * as published by the Free Software Foundation; either version
  22. * 2 of the License, or (at your option) any later version.
  23. *
  24. * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
  25. * Initial release.
  26. * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
  27. * Added read() support + cleanups.
  28. * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
  29. * Added 'device trimming' support. open(O_WRONLY) zeroes
  30. * and frees the saved copy of applied microcode.
  31. * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
  32. * Made to use devfs (/dev/cpu/microcode) + cleanups.
  33. * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
  34. * Added misc device support (now uses both devfs and misc).
  35. * Added MICROCODE_IOCFREE ioctl to clear memory.
  36. * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
  37. * Messages for error cases (non Intel & no suitable microcode).
  38. * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
  39. * Removed ->release(). Removed exclusive open and status bitmap.
  40. * Added microcode_rwsem to serialize read()/write()/ioctl().
  41. * Removed global kernel lock usage.
  42. * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
  43. * Write 0 to 0x8B msr and then cpuid before reading revision,
  44. * so that it works even if there were no update done by the
  45. * BIOS. Otherwise, reading from 0x8B gives junk (which happened
  46. * to be 0 on my machine which is why it worked even when I
  47. * disabled update by the BIOS)
  48. * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
  49. * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
  50. * Tigran Aivazian <tigran@veritas.com>
  51. * Intel Pentium 4 processor support and bugfixes.
  52. * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
  53. * Bugfix for HT (Hyper-Threading) enabled processors
  54. * whereby processor resources are shared by all logical processors
  55. * in a single CPU package.
  56. * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
  57. * Tigran Aivazian <tigran@veritas.com>,
  58. * Serialize updates as required on HT processors due to
  59. * speculative nature of implementation.
  60. * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
  61. * Fix the panic when writing zero-length microcode chunk.
  62. * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
  63. * Jun Nakajima <jun.nakajima@intel.com>
  64. * Support for the microcode updates in the new format.
  65. * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
  66. * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
  67. * because we no longer hold a copy of applied microcode
  68. * in kernel memory.
  69. * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
  70. * Fix sigmatch() macro to handle old CPUs with pf == 0.
  71. * Thanks to Stuart Swales for pointing out this bug.
  72. */
  73. #include <linux/capability.h>
  74. #include <linux/kernel.h>
  75. #include <linux/init.h>
  76. #include <linux/sched.h>
  77. #include <linux/smp_lock.h>
  78. #include <linux/cpumask.h>
  79. #include <linux/module.h>
  80. #include <linux/slab.h>
  81. #include <linux/vmalloc.h>
  82. #include <linux/miscdevice.h>
  83. #include <linux/spinlock.h>
  84. #include <linux/mm.h>
  85. #include <linux/fs.h>
  86. #include <linux/mutex.h>
  87. #include <linux/cpu.h>
  88. #include <linux/firmware.h>
  89. #include <linux/platform_device.h>
  90. #include <asm/msr.h>
  91. #include <asm/uaccess.h>
  92. #include <asm/processor.h>
  93. #include <asm/microcode.h>
  94. MODULE_DESCRIPTION("Microcode Update Driver");
  95. MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
  96. MODULE_LICENSE("GPL");
  97. struct microcode_header_intel {
  98. unsigned int hdrver;
  99. unsigned int rev;
  100. unsigned int date;
  101. unsigned int sig;
  102. unsigned int cksum;
  103. unsigned int ldrver;
  104. unsigned int pf;
  105. unsigned int datasize;
  106. unsigned int totalsize;
  107. unsigned int reserved[3];
  108. };
  109. struct microcode_intel {
  110. struct microcode_header_intel hdr;
  111. unsigned int bits[0];
  112. };
  113. /* microcode format is extended from prescott processors */
  114. struct extended_signature {
  115. unsigned int sig;
  116. unsigned int pf;
  117. unsigned int cksum;
  118. };
  119. struct extended_sigtable {
  120. unsigned int count;
  121. unsigned int cksum;
  122. unsigned int reserved[3];
  123. struct extended_signature sigs[0];
  124. };
  125. #define DEFAULT_UCODE_DATASIZE (2000)
  126. #define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
  127. #define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
  128. #define EXT_HEADER_SIZE (sizeof(struct extended_sigtable))
  129. #define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature))
  130. #define DWSIZE (sizeof(u32))
  131. #define get_totalsize(mc) \
  132. (((struct microcode_intel *)mc)->hdr.totalsize ? \
  133. ((struct microcode_intel *)mc)->hdr.totalsize : \
  134. DEFAULT_UCODE_TOTALSIZE)
  135. #define get_datasize(mc) \
  136. (((struct microcode_intel *)mc)->hdr.datasize ? \
  137. ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
  138. #define sigmatch(s1, s2, p1, p2) \
  139. (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
  140. #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
  141. /* serialize access to the physical write to MSR 0x79 */
  142. static DEFINE_SPINLOCK(microcode_update_lock);
  143. static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
  144. {
  145. struct cpuinfo_x86 *c = &cpu_data(cpu_num);
  146. unsigned long flags;
  147. unsigned int val[2];
  148. memset(csig, 0, sizeof(*csig));
  149. if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
  150. cpu_has(c, X86_FEATURE_IA64)) {
  151. printk(KERN_ERR "microcode: CPU%d not a capable Intel "
  152. "processor\n", cpu_num);
  153. return -1;
  154. }
  155. csig->sig = cpuid_eax(0x00000001);
  156. if ((c->x86_model >= 5) || (c->x86 > 6)) {
  157. /* get processor flags from MSR 0x17 */
  158. rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
  159. csig->pf = 1 << ((val[1] >> 18) & 7);
  160. }
  161. /* serialize access to the physical write to MSR 0x79 */
  162. spin_lock_irqsave(&microcode_update_lock, flags);
  163. wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  164. /* see notes above for revision 1.07. Apparent chip bug */
  165. sync_core();
  166. /* get the current revision from MSR 0x8B */
  167. rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev);
  168. spin_unlock_irqrestore(&microcode_update_lock, flags);
  169. pr_debug("microcode: collect_cpu_info : sig=0x%x, pf=0x%x, rev=0x%x\n",
  170. csig->sig, csig->pf, csig->rev);
  171. return 0;
  172. }
  173. static inline int update_match_cpu(struct cpu_signature *csig, int sig, int pf)
  174. {
  175. return (!sigmatch(sig, csig->sig, pf, csig->pf)) ? 0 : 1;
  176. }
  177. static inline int
  178. update_match_revision(struct microcode_header_intel *mc_header, int rev)
  179. {
  180. return (mc_header->rev <= rev) ? 0 : 1;
  181. }
  182. static int microcode_sanity_check(void *mc)
  183. {
  184. struct microcode_header_intel *mc_header = mc;
  185. struct extended_sigtable *ext_header = NULL;
  186. struct extended_signature *ext_sig;
  187. unsigned long total_size, data_size, ext_table_size;
  188. int sum, orig_sum, ext_sigcount = 0, i;
  189. total_size = get_totalsize(mc_header);
  190. data_size = get_datasize(mc_header);
  191. if (data_size + MC_HEADER_SIZE > total_size) {
  192. printk(KERN_ERR "microcode: error! "
  193. "Bad data size in microcode data file\n");
  194. return -EINVAL;
  195. }
  196. if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
  197. printk(KERN_ERR "microcode: error! "
  198. "Unknown microcode update format\n");
  199. return -EINVAL;
  200. }
  201. ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
  202. if (ext_table_size) {
  203. if ((ext_table_size < EXT_HEADER_SIZE)
  204. || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
  205. printk(KERN_ERR "microcode: error! "
  206. "Small exttable size in microcode data file\n");
  207. return -EINVAL;
  208. }
  209. ext_header = mc + MC_HEADER_SIZE + data_size;
  210. if (ext_table_size != exttable_size(ext_header)) {
  211. printk(KERN_ERR "microcode: error! "
  212. "Bad exttable size in microcode data file\n");
  213. return -EFAULT;
  214. }
  215. ext_sigcount = ext_header->count;
  216. }
  217. /* check extended table checksum */
  218. if (ext_table_size) {
  219. int ext_table_sum = 0;
  220. int *ext_tablep = (int *)ext_header;
  221. i = ext_table_size / DWSIZE;
  222. while (i--)
  223. ext_table_sum += ext_tablep[i];
  224. if (ext_table_sum) {
  225. printk(KERN_WARNING "microcode: aborting, "
  226. "bad extended signature table checksum\n");
  227. return -EINVAL;
  228. }
  229. }
  230. /* calculate the checksum */
  231. orig_sum = 0;
  232. i = (MC_HEADER_SIZE + data_size) / DWSIZE;
  233. while (i--)
  234. orig_sum += ((int *)mc)[i];
  235. if (orig_sum) {
  236. printk(KERN_ERR "microcode: aborting, bad checksum\n");
  237. return -EINVAL;
  238. }
  239. if (!ext_table_size)
  240. return 0;
  241. /* check extended signature checksum */
  242. for (i = 0; i < ext_sigcount; i++) {
  243. ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
  244. EXT_SIGNATURE_SIZE * i;
  245. sum = orig_sum
  246. - (mc_header->sig + mc_header->pf + mc_header->cksum)
  247. + (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
  248. if (sum) {
  249. printk(KERN_ERR "microcode: aborting, bad checksum\n");
  250. return -EINVAL;
  251. }
  252. }
  253. return 0;
  254. }
  255. /*
  256. * return 0 - no update found
  257. * return 1 - found update
  258. */
  259. static int
  260. get_matching_microcode(struct cpu_signature *cpu_sig, void *mc, int rev)
  261. {
  262. struct microcode_header_intel *mc_header = mc;
  263. struct extended_sigtable *ext_header;
  264. unsigned long total_size = get_totalsize(mc_header);
  265. int ext_sigcount, i;
  266. struct extended_signature *ext_sig;
  267. if (!update_match_revision(mc_header, rev))
  268. return 0;
  269. if (update_match_cpu(cpu_sig, mc_header->sig, mc_header->pf))
  270. return 1;
  271. /* Look for ext. headers: */
  272. if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE)
  273. return 0;
  274. ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE;
  275. ext_sigcount = ext_header->count;
  276. ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
  277. for (i = 0; i < ext_sigcount; i++) {
  278. if (update_match_cpu(cpu_sig, ext_sig->sig, ext_sig->pf))
  279. return 1;
  280. ext_sig++;
  281. }
  282. return 0;
  283. }
  284. static void apply_microcode(int cpu)
  285. {
  286. unsigned long flags;
  287. unsigned int val[2];
  288. int cpu_num = raw_smp_processor_id();
  289. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  290. struct microcode_intel *mc_intel = uci->mc;
  291. /* We should bind the task to the CPU */
  292. BUG_ON(cpu_num != cpu);
  293. if (mc_intel == NULL)
  294. return;
  295. /* serialize access to the physical write to MSR 0x79 */
  296. spin_lock_irqsave(&microcode_update_lock, flags);
  297. /* write microcode via MSR 0x79 */
  298. wrmsr(MSR_IA32_UCODE_WRITE,
  299. (unsigned long) mc_intel->bits,
  300. (unsigned long) mc_intel->bits >> 16 >> 16);
  301. wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  302. /* see notes above for revision 1.07. Apparent chip bug */
  303. sync_core();
  304. /* get the current revision from MSR 0x8B */
  305. rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  306. spin_unlock_irqrestore(&microcode_update_lock, flags);
  307. if (val[1] != mc_intel->hdr.rev) {
  308. printk(KERN_ERR "microcode: CPU%d update from revision "
  309. "0x%x to 0x%x failed\n", cpu_num, uci->cpu_sig.rev, val[1]);
  310. return;
  311. }
  312. printk(KERN_INFO "microcode: CPU%d updated from revision "
  313. "0x%x to 0x%x, date = %04x-%02x-%02x \n",
  314. cpu_num, uci->cpu_sig.rev, val[1],
  315. mc_intel->hdr.date & 0xffff,
  316. mc_intel->hdr.date >> 24,
  317. (mc_intel->hdr.date >> 16) & 0xff);
  318. uci->cpu_sig.rev = val[1];
  319. }
  320. static int generic_load_microcode(int cpu, void *data, size_t size,
  321. int (*get_ucode_data)(void *, const void *, size_t))
  322. {
  323. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  324. u8 *ucode_ptr = data, *new_mc = NULL, *mc;
  325. int new_rev = uci->cpu_sig.rev;
  326. unsigned int leftover = size;
  327. while (leftover) {
  328. struct microcode_header_intel mc_header;
  329. unsigned int mc_size;
  330. if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
  331. break;
  332. mc_size = get_totalsize(&mc_header);
  333. if (!mc_size || mc_size > leftover) {
  334. printk(KERN_ERR "microcode: error!"
  335. "Bad data in microcode data file\n");
  336. break;
  337. }
  338. mc = vmalloc(mc_size);
  339. if (!mc)
  340. break;
  341. if (get_ucode_data(mc, ucode_ptr, mc_size) ||
  342. microcode_sanity_check(mc) < 0) {
  343. vfree(mc);
  344. break;
  345. }
  346. if (get_matching_microcode(&uci->cpu_sig, mc, new_rev)) {
  347. if (new_mc)
  348. vfree(new_mc);
  349. new_rev = mc_header.rev;
  350. new_mc = mc;
  351. } else
  352. vfree(mc);
  353. ucode_ptr += mc_size;
  354. leftover -= mc_size;
  355. }
  356. if (new_mc) {
  357. if (!leftover) {
  358. if (uci->mc)
  359. vfree(uci->mc);
  360. uci->mc = (struct microcode_intel *)new_mc;
  361. pr_debug("microcode: CPU%d found a matching microcode update with"
  362. " version 0x%x (current=0x%x)\n",
  363. cpu, new_rev, uci->cpu_sig.rev);
  364. } else
  365. vfree(new_mc);
  366. }
  367. return (int)leftover;
  368. }
  369. static int get_ucode_fw(void *to, const void *from, size_t n)
  370. {
  371. memcpy(to, from, n);
  372. return 0;
  373. }
  374. static int request_microcode_fw(int cpu, struct device *device)
  375. {
  376. char name[30];
  377. struct cpuinfo_x86 *c = &cpu_data(cpu);
  378. const struct firmware *firmware;
  379. int ret;
  380. /* We should bind the task to the CPU */
  381. BUG_ON(cpu != raw_smp_processor_id());
  382. sprintf(name, "intel-ucode/%02x-%02x-%02x",
  383. c->x86, c->x86_model, c->x86_mask);
  384. ret = request_firmware(&firmware, name, device);
  385. if (ret) {
  386. pr_debug("microcode: data file %s load failed\n", name);
  387. return ret;
  388. }
  389. ret = generic_load_microcode(cpu, (void*)firmware->data, firmware->size,
  390. &get_ucode_fw);
  391. release_firmware(firmware);
  392. return ret;
  393. }
  394. static int get_ucode_user(void *to, const void *from, size_t n)
  395. {
  396. return copy_from_user(to, from, n);
  397. }
  398. static int request_microcode_user(int cpu, const void __user *buf, size_t size)
  399. {
  400. /* We should bind the task to the CPU */
  401. BUG_ON(cpu != raw_smp_processor_id());
  402. return generic_load_microcode(cpu, (void*)buf, size, &get_ucode_user);
  403. }
  404. static void microcode_fini_cpu(int cpu)
  405. {
  406. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  407. vfree(uci->mc);
  408. uci->mc = NULL;
  409. }
  410. struct microcode_ops microcode_intel_ops = {
  411. .request_microcode_user = request_microcode_user,
  412. .request_microcode_fw = request_microcode_fw,
  413. .collect_cpu_info = collect_cpu_info,
  414. .apply_microcode = apply_microcode,
  415. .microcode_fini_cpu = microcode_fini_cpu,
  416. };
  417. struct microcode_ops * __init init_intel_microcode(void)
  418. {
  419. return &microcode_intel_ops;
  420. }