mmu.c 77 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "mmu.h"
  20. #include "kvm_cache_regs.h"
  21. #include <linux/kvm_host.h>
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <linux/swap.h>
  28. #include <linux/hugetlb.h>
  29. #include <linux/compiler.h>
  30. #include <asm/page.h>
  31. #include <asm/cmpxchg.h>
  32. #include <asm/io.h>
  33. #include <asm/vmx.h>
  34. /*
  35. * When setting this variable to true it enables Two-Dimensional-Paging
  36. * where the hardware walks 2 page tables:
  37. * 1. the guest-virtual to guest-physical
  38. * 2. while doing 1. it walks guest-physical to host-physical
  39. * If the hardware supports that we don't need to do shadow paging.
  40. */
  41. bool tdp_enabled = false;
  42. #undef MMU_DEBUG
  43. #undef AUDIT
  44. #ifdef AUDIT
  45. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  46. #else
  47. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  48. #endif
  49. #ifdef MMU_DEBUG
  50. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  51. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  52. #else
  53. #define pgprintk(x...) do { } while (0)
  54. #define rmap_printk(x...) do { } while (0)
  55. #endif
  56. #if defined(MMU_DEBUG) || defined(AUDIT)
  57. static int dbg = 0;
  58. module_param(dbg, bool, 0644);
  59. #endif
  60. static int oos_shadow = 1;
  61. module_param(oos_shadow, bool, 0644);
  62. #ifndef MMU_DEBUG
  63. #define ASSERT(x) do { } while (0)
  64. #else
  65. #define ASSERT(x) \
  66. if (!(x)) { \
  67. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  68. __FILE__, __LINE__, #x); \
  69. }
  70. #endif
  71. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  72. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  73. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  74. #define PT64_LEVEL_BITS 9
  75. #define PT64_LEVEL_SHIFT(level) \
  76. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  77. #define PT64_LEVEL_MASK(level) \
  78. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  79. #define PT64_INDEX(address, level)\
  80. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  81. #define PT32_LEVEL_BITS 10
  82. #define PT32_LEVEL_SHIFT(level) \
  83. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  84. #define PT32_LEVEL_MASK(level) \
  85. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  86. #define PT32_INDEX(address, level)\
  87. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  88. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  89. #define PT64_DIR_BASE_ADDR_MASK \
  90. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  91. #define PT32_BASE_ADDR_MASK PAGE_MASK
  92. #define PT32_DIR_BASE_ADDR_MASK \
  93. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  94. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  95. | PT64_NX_MASK)
  96. #define PFERR_PRESENT_MASK (1U << 0)
  97. #define PFERR_WRITE_MASK (1U << 1)
  98. #define PFERR_USER_MASK (1U << 2)
  99. #define PFERR_RSVD_MASK (1U << 3)
  100. #define PFERR_FETCH_MASK (1U << 4)
  101. #define PT_DIRECTORY_LEVEL 2
  102. #define PT_PAGE_TABLE_LEVEL 1
  103. #define RMAP_EXT 4
  104. #define ACC_EXEC_MASK 1
  105. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  106. #define ACC_USER_MASK PT_USER_MASK
  107. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  108. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  109. struct kvm_rmap_desc {
  110. u64 *sptes[RMAP_EXT];
  111. struct kvm_rmap_desc *more;
  112. };
  113. struct kvm_shadow_walk_iterator {
  114. u64 addr;
  115. hpa_t shadow_addr;
  116. int level;
  117. u64 *sptep;
  118. unsigned index;
  119. };
  120. #define for_each_shadow_entry(_vcpu, _addr, _walker) \
  121. for (shadow_walk_init(&(_walker), _vcpu, _addr); \
  122. shadow_walk_okay(&(_walker)); \
  123. shadow_walk_next(&(_walker)))
  124. struct kvm_unsync_walk {
  125. int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
  126. };
  127. typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
  128. static struct kmem_cache *pte_chain_cache;
  129. static struct kmem_cache *rmap_desc_cache;
  130. static struct kmem_cache *mmu_page_header_cache;
  131. static u64 __read_mostly shadow_trap_nonpresent_pte;
  132. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  133. static u64 __read_mostly shadow_base_present_pte;
  134. static u64 __read_mostly shadow_nx_mask;
  135. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  136. static u64 __read_mostly shadow_user_mask;
  137. static u64 __read_mostly shadow_accessed_mask;
  138. static u64 __read_mostly shadow_dirty_mask;
  139. static inline u64 rsvd_bits(int s, int e)
  140. {
  141. return ((1ULL << (e - s + 1)) - 1) << s;
  142. }
  143. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  144. {
  145. shadow_trap_nonpresent_pte = trap_pte;
  146. shadow_notrap_nonpresent_pte = notrap_pte;
  147. }
  148. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  149. void kvm_mmu_set_base_ptes(u64 base_pte)
  150. {
  151. shadow_base_present_pte = base_pte;
  152. }
  153. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  154. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  155. u64 dirty_mask, u64 nx_mask, u64 x_mask)
  156. {
  157. shadow_user_mask = user_mask;
  158. shadow_accessed_mask = accessed_mask;
  159. shadow_dirty_mask = dirty_mask;
  160. shadow_nx_mask = nx_mask;
  161. shadow_x_mask = x_mask;
  162. }
  163. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  164. static int is_write_protection(struct kvm_vcpu *vcpu)
  165. {
  166. return vcpu->arch.cr0 & X86_CR0_WP;
  167. }
  168. static int is_cpuid_PSE36(void)
  169. {
  170. return 1;
  171. }
  172. static int is_nx(struct kvm_vcpu *vcpu)
  173. {
  174. return vcpu->arch.shadow_efer & EFER_NX;
  175. }
  176. static int is_shadow_present_pte(u64 pte)
  177. {
  178. return pte != shadow_trap_nonpresent_pte
  179. && pte != shadow_notrap_nonpresent_pte;
  180. }
  181. static int is_large_pte(u64 pte)
  182. {
  183. return pte & PT_PAGE_SIZE_MASK;
  184. }
  185. static int is_writeble_pte(unsigned long pte)
  186. {
  187. return pte & PT_WRITABLE_MASK;
  188. }
  189. static int is_dirty_gpte(unsigned long pte)
  190. {
  191. return pte & PT_DIRTY_MASK;
  192. }
  193. static int is_rmap_spte(u64 pte)
  194. {
  195. return is_shadow_present_pte(pte);
  196. }
  197. static int is_last_spte(u64 pte, int level)
  198. {
  199. if (level == PT_PAGE_TABLE_LEVEL)
  200. return 1;
  201. if (level == PT_DIRECTORY_LEVEL && is_large_pte(pte))
  202. return 1;
  203. return 0;
  204. }
  205. static pfn_t spte_to_pfn(u64 pte)
  206. {
  207. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  208. }
  209. static gfn_t pse36_gfn_delta(u32 gpte)
  210. {
  211. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  212. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  213. }
  214. static void __set_spte(u64 *sptep, u64 spte)
  215. {
  216. #ifdef CONFIG_X86_64
  217. set_64bit((unsigned long *)sptep, spte);
  218. #else
  219. set_64bit((unsigned long long *)sptep, spte);
  220. #endif
  221. }
  222. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  223. struct kmem_cache *base_cache, int min)
  224. {
  225. void *obj;
  226. if (cache->nobjs >= min)
  227. return 0;
  228. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  229. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  230. if (!obj)
  231. return -ENOMEM;
  232. cache->objects[cache->nobjs++] = obj;
  233. }
  234. return 0;
  235. }
  236. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  237. {
  238. while (mc->nobjs)
  239. kfree(mc->objects[--mc->nobjs]);
  240. }
  241. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  242. int min)
  243. {
  244. struct page *page;
  245. if (cache->nobjs >= min)
  246. return 0;
  247. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  248. page = alloc_page(GFP_KERNEL);
  249. if (!page)
  250. return -ENOMEM;
  251. set_page_private(page, 0);
  252. cache->objects[cache->nobjs++] = page_address(page);
  253. }
  254. return 0;
  255. }
  256. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  257. {
  258. while (mc->nobjs)
  259. free_page((unsigned long)mc->objects[--mc->nobjs]);
  260. }
  261. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  262. {
  263. int r;
  264. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  265. pte_chain_cache, 4);
  266. if (r)
  267. goto out;
  268. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  269. rmap_desc_cache, 4);
  270. if (r)
  271. goto out;
  272. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  273. if (r)
  274. goto out;
  275. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  276. mmu_page_header_cache, 4);
  277. out:
  278. return r;
  279. }
  280. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  281. {
  282. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  283. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  284. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  285. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  286. }
  287. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  288. size_t size)
  289. {
  290. void *p;
  291. BUG_ON(!mc->nobjs);
  292. p = mc->objects[--mc->nobjs];
  293. return p;
  294. }
  295. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  296. {
  297. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  298. sizeof(struct kvm_pte_chain));
  299. }
  300. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  301. {
  302. kfree(pc);
  303. }
  304. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  305. {
  306. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  307. sizeof(struct kvm_rmap_desc));
  308. }
  309. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  310. {
  311. kfree(rd);
  312. }
  313. /*
  314. * Return the pointer to the largepage write count for a given
  315. * gfn, handling slots that are not large page aligned.
  316. */
  317. static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
  318. {
  319. unsigned long idx;
  320. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  321. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  322. return &slot->lpage_info[idx].write_count;
  323. }
  324. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  325. {
  326. int *write_count;
  327. gfn = unalias_gfn(kvm, gfn);
  328. write_count = slot_largepage_idx(gfn,
  329. gfn_to_memslot_unaliased(kvm, gfn));
  330. *write_count += 1;
  331. }
  332. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  333. {
  334. int *write_count;
  335. gfn = unalias_gfn(kvm, gfn);
  336. write_count = slot_largepage_idx(gfn,
  337. gfn_to_memslot_unaliased(kvm, gfn));
  338. *write_count -= 1;
  339. WARN_ON(*write_count < 0);
  340. }
  341. static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
  342. {
  343. struct kvm_memory_slot *slot;
  344. int *largepage_idx;
  345. gfn = unalias_gfn(kvm, gfn);
  346. slot = gfn_to_memslot_unaliased(kvm, gfn);
  347. if (slot) {
  348. largepage_idx = slot_largepage_idx(gfn, slot);
  349. return *largepage_idx;
  350. }
  351. return 1;
  352. }
  353. static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
  354. {
  355. struct vm_area_struct *vma;
  356. unsigned long addr;
  357. int ret = 0;
  358. addr = gfn_to_hva(kvm, gfn);
  359. if (kvm_is_error_hva(addr))
  360. return ret;
  361. down_read(&current->mm->mmap_sem);
  362. vma = find_vma(current->mm, addr);
  363. if (vma && is_vm_hugetlb_page(vma))
  364. ret = 1;
  365. up_read(&current->mm->mmap_sem);
  366. return ret;
  367. }
  368. static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  369. {
  370. struct kvm_memory_slot *slot;
  371. if (has_wrprotected_page(vcpu->kvm, large_gfn))
  372. return 0;
  373. if (!host_largepage_backed(vcpu->kvm, large_gfn))
  374. return 0;
  375. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  376. if (slot && slot->dirty_bitmap)
  377. return 0;
  378. return 1;
  379. }
  380. /*
  381. * Take gfn and return the reverse mapping to it.
  382. * Note: gfn must be unaliased before this function get called
  383. */
  384. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
  385. {
  386. struct kvm_memory_slot *slot;
  387. unsigned long idx;
  388. slot = gfn_to_memslot(kvm, gfn);
  389. if (!lpage)
  390. return &slot->rmap[gfn - slot->base_gfn];
  391. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  392. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  393. return &slot->lpage_info[idx].rmap_pde;
  394. }
  395. /*
  396. * Reverse mapping data structures:
  397. *
  398. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  399. * that points to page_address(page).
  400. *
  401. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  402. * containing more mappings.
  403. *
  404. * Returns the number of rmap entries before the spte was added or zero if
  405. * the spte was not added.
  406. *
  407. */
  408. static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
  409. {
  410. struct kvm_mmu_page *sp;
  411. struct kvm_rmap_desc *desc;
  412. unsigned long *rmapp;
  413. int i, count = 0;
  414. if (!is_rmap_spte(*spte))
  415. return count;
  416. gfn = unalias_gfn(vcpu->kvm, gfn);
  417. sp = page_header(__pa(spte));
  418. sp->gfns[spte - sp->spt] = gfn;
  419. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  420. if (!*rmapp) {
  421. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  422. *rmapp = (unsigned long)spte;
  423. } else if (!(*rmapp & 1)) {
  424. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  425. desc = mmu_alloc_rmap_desc(vcpu);
  426. desc->sptes[0] = (u64 *)*rmapp;
  427. desc->sptes[1] = spte;
  428. *rmapp = (unsigned long)desc | 1;
  429. } else {
  430. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  431. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  432. while (desc->sptes[RMAP_EXT-1] && desc->more) {
  433. desc = desc->more;
  434. count += RMAP_EXT;
  435. }
  436. if (desc->sptes[RMAP_EXT-1]) {
  437. desc->more = mmu_alloc_rmap_desc(vcpu);
  438. desc = desc->more;
  439. }
  440. for (i = 0; desc->sptes[i]; ++i)
  441. ;
  442. desc->sptes[i] = spte;
  443. }
  444. return count;
  445. }
  446. static void rmap_desc_remove_entry(unsigned long *rmapp,
  447. struct kvm_rmap_desc *desc,
  448. int i,
  449. struct kvm_rmap_desc *prev_desc)
  450. {
  451. int j;
  452. for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
  453. ;
  454. desc->sptes[i] = desc->sptes[j];
  455. desc->sptes[j] = NULL;
  456. if (j != 0)
  457. return;
  458. if (!prev_desc && !desc->more)
  459. *rmapp = (unsigned long)desc->sptes[0];
  460. else
  461. if (prev_desc)
  462. prev_desc->more = desc->more;
  463. else
  464. *rmapp = (unsigned long)desc->more | 1;
  465. mmu_free_rmap_desc(desc);
  466. }
  467. static void rmap_remove(struct kvm *kvm, u64 *spte)
  468. {
  469. struct kvm_rmap_desc *desc;
  470. struct kvm_rmap_desc *prev_desc;
  471. struct kvm_mmu_page *sp;
  472. pfn_t pfn;
  473. unsigned long *rmapp;
  474. int i;
  475. if (!is_rmap_spte(*spte))
  476. return;
  477. sp = page_header(__pa(spte));
  478. pfn = spte_to_pfn(*spte);
  479. if (*spte & shadow_accessed_mask)
  480. kvm_set_pfn_accessed(pfn);
  481. if (is_writeble_pte(*spte))
  482. kvm_release_pfn_dirty(pfn);
  483. else
  484. kvm_release_pfn_clean(pfn);
  485. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
  486. if (!*rmapp) {
  487. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  488. BUG();
  489. } else if (!(*rmapp & 1)) {
  490. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  491. if ((u64 *)*rmapp != spte) {
  492. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  493. spte, *spte);
  494. BUG();
  495. }
  496. *rmapp = 0;
  497. } else {
  498. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  499. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  500. prev_desc = NULL;
  501. while (desc) {
  502. for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
  503. if (desc->sptes[i] == spte) {
  504. rmap_desc_remove_entry(rmapp,
  505. desc, i,
  506. prev_desc);
  507. return;
  508. }
  509. prev_desc = desc;
  510. desc = desc->more;
  511. }
  512. BUG();
  513. }
  514. }
  515. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  516. {
  517. struct kvm_rmap_desc *desc;
  518. struct kvm_rmap_desc *prev_desc;
  519. u64 *prev_spte;
  520. int i;
  521. if (!*rmapp)
  522. return NULL;
  523. else if (!(*rmapp & 1)) {
  524. if (!spte)
  525. return (u64 *)*rmapp;
  526. return NULL;
  527. }
  528. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  529. prev_desc = NULL;
  530. prev_spte = NULL;
  531. while (desc) {
  532. for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
  533. if (prev_spte == spte)
  534. return desc->sptes[i];
  535. prev_spte = desc->sptes[i];
  536. }
  537. desc = desc->more;
  538. }
  539. return NULL;
  540. }
  541. static int rmap_write_protect(struct kvm *kvm, u64 gfn)
  542. {
  543. unsigned long *rmapp;
  544. u64 *spte;
  545. int write_protected = 0;
  546. gfn = unalias_gfn(kvm, gfn);
  547. rmapp = gfn_to_rmap(kvm, gfn, 0);
  548. spte = rmap_next(kvm, rmapp, NULL);
  549. while (spte) {
  550. BUG_ON(!spte);
  551. BUG_ON(!(*spte & PT_PRESENT_MASK));
  552. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  553. if (is_writeble_pte(*spte)) {
  554. __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
  555. write_protected = 1;
  556. }
  557. spte = rmap_next(kvm, rmapp, spte);
  558. }
  559. if (write_protected) {
  560. pfn_t pfn;
  561. spte = rmap_next(kvm, rmapp, NULL);
  562. pfn = spte_to_pfn(*spte);
  563. kvm_set_pfn_dirty(pfn);
  564. }
  565. /* check for huge page mappings */
  566. rmapp = gfn_to_rmap(kvm, gfn, 1);
  567. spte = rmap_next(kvm, rmapp, NULL);
  568. while (spte) {
  569. BUG_ON(!spte);
  570. BUG_ON(!(*spte & PT_PRESENT_MASK));
  571. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  572. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  573. if (is_writeble_pte(*spte)) {
  574. rmap_remove(kvm, spte);
  575. --kvm->stat.lpages;
  576. __set_spte(spte, shadow_trap_nonpresent_pte);
  577. spte = NULL;
  578. write_protected = 1;
  579. }
  580. spte = rmap_next(kvm, rmapp, spte);
  581. }
  582. return write_protected;
  583. }
  584. static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
  585. {
  586. u64 *spte;
  587. int need_tlb_flush = 0;
  588. while ((spte = rmap_next(kvm, rmapp, NULL))) {
  589. BUG_ON(!(*spte & PT_PRESENT_MASK));
  590. rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
  591. rmap_remove(kvm, spte);
  592. __set_spte(spte, shadow_trap_nonpresent_pte);
  593. need_tlb_flush = 1;
  594. }
  595. return need_tlb_flush;
  596. }
  597. static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
  598. int (*handler)(struct kvm *kvm, unsigned long *rmapp))
  599. {
  600. int i;
  601. int retval = 0;
  602. /*
  603. * If mmap_sem isn't taken, we can look the memslots with only
  604. * the mmu_lock by skipping over the slots with userspace_addr == 0.
  605. */
  606. for (i = 0; i < kvm->nmemslots; i++) {
  607. struct kvm_memory_slot *memslot = &kvm->memslots[i];
  608. unsigned long start = memslot->userspace_addr;
  609. unsigned long end;
  610. /* mmu_lock protects userspace_addr */
  611. if (!start)
  612. continue;
  613. end = start + (memslot->npages << PAGE_SHIFT);
  614. if (hva >= start && hva < end) {
  615. gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
  616. retval |= handler(kvm, &memslot->rmap[gfn_offset]);
  617. retval |= handler(kvm,
  618. &memslot->lpage_info[
  619. gfn_offset /
  620. KVM_PAGES_PER_HPAGE].rmap_pde);
  621. }
  622. }
  623. return retval;
  624. }
  625. int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
  626. {
  627. return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
  628. }
  629. static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
  630. {
  631. u64 *spte;
  632. int young = 0;
  633. /* always return old for EPT */
  634. if (!shadow_accessed_mask)
  635. return 0;
  636. spte = rmap_next(kvm, rmapp, NULL);
  637. while (spte) {
  638. int _young;
  639. u64 _spte = *spte;
  640. BUG_ON(!(_spte & PT_PRESENT_MASK));
  641. _young = _spte & PT_ACCESSED_MASK;
  642. if (_young) {
  643. young = 1;
  644. clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  645. }
  646. spte = rmap_next(kvm, rmapp, spte);
  647. }
  648. return young;
  649. }
  650. #define RMAP_RECYCLE_THRESHOLD 1000
  651. static void rmap_recycle(struct kvm_vcpu *vcpu, gfn_t gfn, int lpage)
  652. {
  653. unsigned long *rmapp;
  654. gfn = unalias_gfn(vcpu->kvm, gfn);
  655. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  656. kvm_unmap_rmapp(vcpu->kvm, rmapp);
  657. kvm_flush_remote_tlbs(vcpu->kvm);
  658. }
  659. int kvm_age_hva(struct kvm *kvm, unsigned long hva)
  660. {
  661. return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
  662. }
  663. #ifdef MMU_DEBUG
  664. static int is_empty_shadow_page(u64 *spt)
  665. {
  666. u64 *pos;
  667. u64 *end;
  668. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  669. if (is_shadow_present_pte(*pos)) {
  670. printk(KERN_ERR "%s: %p %llx\n", __func__,
  671. pos, *pos);
  672. return 0;
  673. }
  674. return 1;
  675. }
  676. #endif
  677. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  678. {
  679. ASSERT(is_empty_shadow_page(sp->spt));
  680. list_del(&sp->link);
  681. __free_page(virt_to_page(sp->spt));
  682. __free_page(virt_to_page(sp->gfns));
  683. kfree(sp);
  684. ++kvm->arch.n_free_mmu_pages;
  685. }
  686. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  687. {
  688. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  689. }
  690. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  691. u64 *parent_pte)
  692. {
  693. struct kvm_mmu_page *sp;
  694. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  695. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  696. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  697. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  698. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  699. INIT_LIST_HEAD(&sp->oos_link);
  700. bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
  701. sp->multimapped = 0;
  702. sp->parent_pte = parent_pte;
  703. --vcpu->kvm->arch.n_free_mmu_pages;
  704. return sp;
  705. }
  706. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  707. struct kvm_mmu_page *sp, u64 *parent_pte)
  708. {
  709. struct kvm_pte_chain *pte_chain;
  710. struct hlist_node *node;
  711. int i;
  712. if (!parent_pte)
  713. return;
  714. if (!sp->multimapped) {
  715. u64 *old = sp->parent_pte;
  716. if (!old) {
  717. sp->parent_pte = parent_pte;
  718. return;
  719. }
  720. sp->multimapped = 1;
  721. pte_chain = mmu_alloc_pte_chain(vcpu);
  722. INIT_HLIST_HEAD(&sp->parent_ptes);
  723. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  724. pte_chain->parent_ptes[0] = old;
  725. }
  726. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  727. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  728. continue;
  729. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  730. if (!pte_chain->parent_ptes[i]) {
  731. pte_chain->parent_ptes[i] = parent_pte;
  732. return;
  733. }
  734. }
  735. pte_chain = mmu_alloc_pte_chain(vcpu);
  736. BUG_ON(!pte_chain);
  737. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  738. pte_chain->parent_ptes[0] = parent_pte;
  739. }
  740. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  741. u64 *parent_pte)
  742. {
  743. struct kvm_pte_chain *pte_chain;
  744. struct hlist_node *node;
  745. int i;
  746. if (!sp->multimapped) {
  747. BUG_ON(sp->parent_pte != parent_pte);
  748. sp->parent_pte = NULL;
  749. return;
  750. }
  751. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  752. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  753. if (!pte_chain->parent_ptes[i])
  754. break;
  755. if (pte_chain->parent_ptes[i] != parent_pte)
  756. continue;
  757. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  758. && pte_chain->parent_ptes[i + 1]) {
  759. pte_chain->parent_ptes[i]
  760. = pte_chain->parent_ptes[i + 1];
  761. ++i;
  762. }
  763. pte_chain->parent_ptes[i] = NULL;
  764. if (i == 0) {
  765. hlist_del(&pte_chain->link);
  766. mmu_free_pte_chain(pte_chain);
  767. if (hlist_empty(&sp->parent_ptes)) {
  768. sp->multimapped = 0;
  769. sp->parent_pte = NULL;
  770. }
  771. }
  772. return;
  773. }
  774. BUG();
  775. }
  776. static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
  777. mmu_parent_walk_fn fn)
  778. {
  779. struct kvm_pte_chain *pte_chain;
  780. struct hlist_node *node;
  781. struct kvm_mmu_page *parent_sp;
  782. int i;
  783. if (!sp->multimapped && sp->parent_pte) {
  784. parent_sp = page_header(__pa(sp->parent_pte));
  785. fn(vcpu, parent_sp);
  786. mmu_parent_walk(vcpu, parent_sp, fn);
  787. return;
  788. }
  789. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  790. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  791. if (!pte_chain->parent_ptes[i])
  792. break;
  793. parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
  794. fn(vcpu, parent_sp);
  795. mmu_parent_walk(vcpu, parent_sp, fn);
  796. }
  797. }
  798. static void kvm_mmu_update_unsync_bitmap(u64 *spte)
  799. {
  800. unsigned int index;
  801. struct kvm_mmu_page *sp = page_header(__pa(spte));
  802. index = spte - sp->spt;
  803. if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
  804. sp->unsync_children++;
  805. WARN_ON(!sp->unsync_children);
  806. }
  807. static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
  808. {
  809. struct kvm_pte_chain *pte_chain;
  810. struct hlist_node *node;
  811. int i;
  812. if (!sp->parent_pte)
  813. return;
  814. if (!sp->multimapped) {
  815. kvm_mmu_update_unsync_bitmap(sp->parent_pte);
  816. return;
  817. }
  818. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  819. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  820. if (!pte_chain->parent_ptes[i])
  821. break;
  822. kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
  823. }
  824. }
  825. static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  826. {
  827. kvm_mmu_update_parents_unsync(sp);
  828. return 1;
  829. }
  830. static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
  831. struct kvm_mmu_page *sp)
  832. {
  833. mmu_parent_walk(vcpu, sp, unsync_walk_fn);
  834. kvm_mmu_update_parents_unsync(sp);
  835. }
  836. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  837. struct kvm_mmu_page *sp)
  838. {
  839. int i;
  840. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  841. sp->spt[i] = shadow_trap_nonpresent_pte;
  842. }
  843. static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
  844. struct kvm_mmu_page *sp)
  845. {
  846. return 1;
  847. }
  848. static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  849. {
  850. }
  851. #define KVM_PAGE_ARRAY_NR 16
  852. struct kvm_mmu_pages {
  853. struct mmu_page_and_offset {
  854. struct kvm_mmu_page *sp;
  855. unsigned int idx;
  856. } page[KVM_PAGE_ARRAY_NR];
  857. unsigned int nr;
  858. };
  859. #define for_each_unsync_children(bitmap, idx) \
  860. for (idx = find_first_bit(bitmap, 512); \
  861. idx < 512; \
  862. idx = find_next_bit(bitmap, 512, idx+1))
  863. static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
  864. int idx)
  865. {
  866. int i;
  867. if (sp->unsync)
  868. for (i=0; i < pvec->nr; i++)
  869. if (pvec->page[i].sp == sp)
  870. return 0;
  871. pvec->page[pvec->nr].sp = sp;
  872. pvec->page[pvec->nr].idx = idx;
  873. pvec->nr++;
  874. return (pvec->nr == KVM_PAGE_ARRAY_NR);
  875. }
  876. static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
  877. struct kvm_mmu_pages *pvec)
  878. {
  879. int i, ret, nr_unsync_leaf = 0;
  880. for_each_unsync_children(sp->unsync_child_bitmap, i) {
  881. u64 ent = sp->spt[i];
  882. if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
  883. struct kvm_mmu_page *child;
  884. child = page_header(ent & PT64_BASE_ADDR_MASK);
  885. if (child->unsync_children) {
  886. if (mmu_pages_add(pvec, child, i))
  887. return -ENOSPC;
  888. ret = __mmu_unsync_walk(child, pvec);
  889. if (!ret)
  890. __clear_bit(i, sp->unsync_child_bitmap);
  891. else if (ret > 0)
  892. nr_unsync_leaf += ret;
  893. else
  894. return ret;
  895. }
  896. if (child->unsync) {
  897. nr_unsync_leaf++;
  898. if (mmu_pages_add(pvec, child, i))
  899. return -ENOSPC;
  900. }
  901. }
  902. }
  903. if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
  904. sp->unsync_children = 0;
  905. return nr_unsync_leaf;
  906. }
  907. static int mmu_unsync_walk(struct kvm_mmu_page *sp,
  908. struct kvm_mmu_pages *pvec)
  909. {
  910. if (!sp->unsync_children)
  911. return 0;
  912. mmu_pages_add(pvec, sp, 0);
  913. return __mmu_unsync_walk(sp, pvec);
  914. }
  915. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  916. {
  917. unsigned index;
  918. struct hlist_head *bucket;
  919. struct kvm_mmu_page *sp;
  920. struct hlist_node *node;
  921. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  922. index = kvm_page_table_hashfn(gfn);
  923. bucket = &kvm->arch.mmu_page_hash[index];
  924. hlist_for_each_entry(sp, node, bucket, hash_link)
  925. if (sp->gfn == gfn && !sp->role.direct
  926. && !sp->role.invalid) {
  927. pgprintk("%s: found role %x\n",
  928. __func__, sp->role.word);
  929. return sp;
  930. }
  931. return NULL;
  932. }
  933. static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  934. {
  935. WARN_ON(!sp->unsync);
  936. sp->unsync = 0;
  937. --kvm->stat.mmu_unsync;
  938. }
  939. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
  940. static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  941. {
  942. if (sp->role.glevels != vcpu->arch.mmu.root_level) {
  943. kvm_mmu_zap_page(vcpu->kvm, sp);
  944. return 1;
  945. }
  946. if (rmap_write_protect(vcpu->kvm, sp->gfn))
  947. kvm_flush_remote_tlbs(vcpu->kvm);
  948. kvm_unlink_unsync_page(vcpu->kvm, sp);
  949. if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
  950. kvm_mmu_zap_page(vcpu->kvm, sp);
  951. return 1;
  952. }
  953. kvm_mmu_flush_tlb(vcpu);
  954. return 0;
  955. }
  956. struct mmu_page_path {
  957. struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
  958. unsigned int idx[PT64_ROOT_LEVEL-1];
  959. };
  960. #define for_each_sp(pvec, sp, parents, i) \
  961. for (i = mmu_pages_next(&pvec, &parents, -1), \
  962. sp = pvec.page[i].sp; \
  963. i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
  964. i = mmu_pages_next(&pvec, &parents, i))
  965. static int mmu_pages_next(struct kvm_mmu_pages *pvec,
  966. struct mmu_page_path *parents,
  967. int i)
  968. {
  969. int n;
  970. for (n = i+1; n < pvec->nr; n++) {
  971. struct kvm_mmu_page *sp = pvec->page[n].sp;
  972. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  973. parents->idx[0] = pvec->page[n].idx;
  974. return n;
  975. }
  976. parents->parent[sp->role.level-2] = sp;
  977. parents->idx[sp->role.level-1] = pvec->page[n].idx;
  978. }
  979. return n;
  980. }
  981. static void mmu_pages_clear_parents(struct mmu_page_path *parents)
  982. {
  983. struct kvm_mmu_page *sp;
  984. unsigned int level = 0;
  985. do {
  986. unsigned int idx = parents->idx[level];
  987. sp = parents->parent[level];
  988. if (!sp)
  989. return;
  990. --sp->unsync_children;
  991. WARN_ON((int)sp->unsync_children < 0);
  992. __clear_bit(idx, sp->unsync_child_bitmap);
  993. level++;
  994. } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
  995. }
  996. static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
  997. struct mmu_page_path *parents,
  998. struct kvm_mmu_pages *pvec)
  999. {
  1000. parents->parent[parent->role.level-1] = NULL;
  1001. pvec->nr = 0;
  1002. }
  1003. static void mmu_sync_children(struct kvm_vcpu *vcpu,
  1004. struct kvm_mmu_page *parent)
  1005. {
  1006. int i;
  1007. struct kvm_mmu_page *sp;
  1008. struct mmu_page_path parents;
  1009. struct kvm_mmu_pages pages;
  1010. kvm_mmu_pages_init(parent, &parents, &pages);
  1011. while (mmu_unsync_walk(parent, &pages)) {
  1012. int protected = 0;
  1013. for_each_sp(pages, sp, parents, i)
  1014. protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
  1015. if (protected)
  1016. kvm_flush_remote_tlbs(vcpu->kvm);
  1017. for_each_sp(pages, sp, parents, i) {
  1018. kvm_sync_page(vcpu, sp);
  1019. mmu_pages_clear_parents(&parents);
  1020. }
  1021. cond_resched_lock(&vcpu->kvm->mmu_lock);
  1022. kvm_mmu_pages_init(parent, &parents, &pages);
  1023. }
  1024. }
  1025. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  1026. gfn_t gfn,
  1027. gva_t gaddr,
  1028. unsigned level,
  1029. int direct,
  1030. unsigned access,
  1031. u64 *parent_pte)
  1032. {
  1033. union kvm_mmu_page_role role;
  1034. unsigned index;
  1035. unsigned quadrant;
  1036. struct hlist_head *bucket;
  1037. struct kvm_mmu_page *sp;
  1038. struct hlist_node *node, *tmp;
  1039. role = vcpu->arch.mmu.base_role;
  1040. role.level = level;
  1041. role.direct = direct;
  1042. role.access = access;
  1043. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  1044. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  1045. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  1046. role.quadrant = quadrant;
  1047. }
  1048. pgprintk("%s: looking gfn %lx role %x\n", __func__,
  1049. gfn, role.word);
  1050. index = kvm_page_table_hashfn(gfn);
  1051. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1052. hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
  1053. if (sp->gfn == gfn) {
  1054. if (sp->unsync)
  1055. if (kvm_sync_page(vcpu, sp))
  1056. continue;
  1057. if (sp->role.word != role.word)
  1058. continue;
  1059. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  1060. if (sp->unsync_children) {
  1061. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  1062. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1063. }
  1064. pgprintk("%s: found\n", __func__);
  1065. return sp;
  1066. }
  1067. ++vcpu->kvm->stat.mmu_cache_miss;
  1068. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  1069. if (!sp)
  1070. return sp;
  1071. pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
  1072. sp->gfn = gfn;
  1073. sp->role = role;
  1074. hlist_add_head(&sp->hash_link, bucket);
  1075. if (!direct) {
  1076. if (rmap_write_protect(vcpu->kvm, gfn))
  1077. kvm_flush_remote_tlbs(vcpu->kvm);
  1078. account_shadowed(vcpu->kvm, gfn);
  1079. }
  1080. if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
  1081. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  1082. else
  1083. nonpaging_prefetch_page(vcpu, sp);
  1084. return sp;
  1085. }
  1086. static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
  1087. struct kvm_vcpu *vcpu, u64 addr)
  1088. {
  1089. iterator->addr = addr;
  1090. iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
  1091. iterator->level = vcpu->arch.mmu.shadow_root_level;
  1092. if (iterator->level == PT32E_ROOT_LEVEL) {
  1093. iterator->shadow_addr
  1094. = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
  1095. iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
  1096. --iterator->level;
  1097. if (!iterator->shadow_addr)
  1098. iterator->level = 0;
  1099. }
  1100. }
  1101. static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
  1102. {
  1103. if (iterator->level < PT_PAGE_TABLE_LEVEL)
  1104. return false;
  1105. if (iterator->level == PT_PAGE_TABLE_LEVEL)
  1106. if (is_large_pte(*iterator->sptep))
  1107. return false;
  1108. iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
  1109. iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
  1110. return true;
  1111. }
  1112. static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
  1113. {
  1114. iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
  1115. --iterator->level;
  1116. }
  1117. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  1118. struct kvm_mmu_page *sp)
  1119. {
  1120. unsigned i;
  1121. u64 *pt;
  1122. u64 ent;
  1123. pt = sp->spt;
  1124. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1125. ent = pt[i];
  1126. if (is_shadow_present_pte(ent)) {
  1127. if (!is_last_spte(ent, sp->role.level)) {
  1128. ent &= PT64_BASE_ADDR_MASK;
  1129. mmu_page_remove_parent_pte(page_header(ent),
  1130. &pt[i]);
  1131. } else {
  1132. if (is_large_pte(ent))
  1133. --kvm->stat.lpages;
  1134. rmap_remove(kvm, &pt[i]);
  1135. }
  1136. }
  1137. pt[i] = shadow_trap_nonpresent_pte;
  1138. }
  1139. }
  1140. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  1141. {
  1142. mmu_page_remove_parent_pte(sp, parent_pte);
  1143. }
  1144. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  1145. {
  1146. int i;
  1147. struct kvm_vcpu *vcpu;
  1148. kvm_for_each_vcpu(i, vcpu, kvm)
  1149. vcpu->arch.last_pte_updated = NULL;
  1150. }
  1151. static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
  1152. {
  1153. u64 *parent_pte;
  1154. while (sp->multimapped || sp->parent_pte) {
  1155. if (!sp->multimapped)
  1156. parent_pte = sp->parent_pte;
  1157. else {
  1158. struct kvm_pte_chain *chain;
  1159. chain = container_of(sp->parent_ptes.first,
  1160. struct kvm_pte_chain, link);
  1161. parent_pte = chain->parent_ptes[0];
  1162. }
  1163. BUG_ON(!parent_pte);
  1164. kvm_mmu_put_page(sp, parent_pte);
  1165. __set_spte(parent_pte, shadow_trap_nonpresent_pte);
  1166. }
  1167. }
  1168. static int mmu_zap_unsync_children(struct kvm *kvm,
  1169. struct kvm_mmu_page *parent)
  1170. {
  1171. int i, zapped = 0;
  1172. struct mmu_page_path parents;
  1173. struct kvm_mmu_pages pages;
  1174. if (parent->role.level == PT_PAGE_TABLE_LEVEL)
  1175. return 0;
  1176. kvm_mmu_pages_init(parent, &parents, &pages);
  1177. while (mmu_unsync_walk(parent, &pages)) {
  1178. struct kvm_mmu_page *sp;
  1179. for_each_sp(pages, sp, parents, i) {
  1180. kvm_mmu_zap_page(kvm, sp);
  1181. mmu_pages_clear_parents(&parents);
  1182. }
  1183. zapped += pages.nr;
  1184. kvm_mmu_pages_init(parent, &parents, &pages);
  1185. }
  1186. return zapped;
  1187. }
  1188. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  1189. {
  1190. int ret;
  1191. ++kvm->stat.mmu_shadow_zapped;
  1192. ret = mmu_zap_unsync_children(kvm, sp);
  1193. kvm_mmu_page_unlink_children(kvm, sp);
  1194. kvm_mmu_unlink_parents(kvm, sp);
  1195. kvm_flush_remote_tlbs(kvm);
  1196. if (!sp->role.invalid && !sp->role.direct)
  1197. unaccount_shadowed(kvm, sp->gfn);
  1198. if (sp->unsync)
  1199. kvm_unlink_unsync_page(kvm, sp);
  1200. if (!sp->root_count) {
  1201. hlist_del(&sp->hash_link);
  1202. kvm_mmu_free_page(kvm, sp);
  1203. } else {
  1204. sp->role.invalid = 1;
  1205. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  1206. kvm_reload_remote_mmus(kvm);
  1207. }
  1208. kvm_mmu_reset_last_pte_updated(kvm);
  1209. return ret;
  1210. }
  1211. /*
  1212. * Changing the number of mmu pages allocated to the vm
  1213. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  1214. */
  1215. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  1216. {
  1217. int used_pages;
  1218. used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
  1219. used_pages = max(0, used_pages);
  1220. /*
  1221. * If we set the number of mmu pages to be smaller be than the
  1222. * number of actived pages , we must to free some mmu pages before we
  1223. * change the value
  1224. */
  1225. if (used_pages > kvm_nr_mmu_pages) {
  1226. while (used_pages > kvm_nr_mmu_pages) {
  1227. struct kvm_mmu_page *page;
  1228. page = container_of(kvm->arch.active_mmu_pages.prev,
  1229. struct kvm_mmu_page, link);
  1230. kvm_mmu_zap_page(kvm, page);
  1231. used_pages--;
  1232. }
  1233. kvm->arch.n_free_mmu_pages = 0;
  1234. }
  1235. else
  1236. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  1237. - kvm->arch.n_alloc_mmu_pages;
  1238. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  1239. }
  1240. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  1241. {
  1242. unsigned index;
  1243. struct hlist_head *bucket;
  1244. struct kvm_mmu_page *sp;
  1245. struct hlist_node *node, *n;
  1246. int r;
  1247. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  1248. r = 0;
  1249. index = kvm_page_table_hashfn(gfn);
  1250. bucket = &kvm->arch.mmu_page_hash[index];
  1251. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  1252. if (sp->gfn == gfn && !sp->role.direct) {
  1253. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  1254. sp->role.word);
  1255. r = 1;
  1256. if (kvm_mmu_zap_page(kvm, sp))
  1257. n = bucket->first;
  1258. }
  1259. return r;
  1260. }
  1261. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  1262. {
  1263. unsigned index;
  1264. struct hlist_head *bucket;
  1265. struct kvm_mmu_page *sp;
  1266. struct hlist_node *node, *nn;
  1267. index = kvm_page_table_hashfn(gfn);
  1268. bucket = &kvm->arch.mmu_page_hash[index];
  1269. hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
  1270. if (sp->gfn == gfn && !sp->role.direct
  1271. && !sp->role.invalid) {
  1272. pgprintk("%s: zap %lx %x\n",
  1273. __func__, gfn, sp->role.word);
  1274. kvm_mmu_zap_page(kvm, sp);
  1275. }
  1276. }
  1277. }
  1278. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  1279. {
  1280. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  1281. struct kvm_mmu_page *sp = page_header(__pa(pte));
  1282. __set_bit(slot, sp->slot_bitmap);
  1283. }
  1284. static void mmu_convert_notrap(struct kvm_mmu_page *sp)
  1285. {
  1286. int i;
  1287. u64 *pt = sp->spt;
  1288. if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
  1289. return;
  1290. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1291. if (pt[i] == shadow_notrap_nonpresent_pte)
  1292. __set_spte(&pt[i], shadow_trap_nonpresent_pte);
  1293. }
  1294. }
  1295. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  1296. {
  1297. struct page *page;
  1298. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1299. if (gpa == UNMAPPED_GVA)
  1300. return NULL;
  1301. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1302. return page;
  1303. }
  1304. /*
  1305. * The function is based on mtrr_type_lookup() in
  1306. * arch/x86/kernel/cpu/mtrr/generic.c
  1307. */
  1308. static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
  1309. u64 start, u64 end)
  1310. {
  1311. int i;
  1312. u64 base, mask;
  1313. u8 prev_match, curr_match;
  1314. int num_var_ranges = KVM_NR_VAR_MTRR;
  1315. if (!mtrr_state->enabled)
  1316. return 0xFF;
  1317. /* Make end inclusive end, instead of exclusive */
  1318. end--;
  1319. /* Look in fixed ranges. Just return the type as per start */
  1320. if (mtrr_state->have_fixed && (start < 0x100000)) {
  1321. int idx;
  1322. if (start < 0x80000) {
  1323. idx = 0;
  1324. idx += (start >> 16);
  1325. return mtrr_state->fixed_ranges[idx];
  1326. } else if (start < 0xC0000) {
  1327. idx = 1 * 8;
  1328. idx += ((start - 0x80000) >> 14);
  1329. return mtrr_state->fixed_ranges[idx];
  1330. } else if (start < 0x1000000) {
  1331. idx = 3 * 8;
  1332. idx += ((start - 0xC0000) >> 12);
  1333. return mtrr_state->fixed_ranges[idx];
  1334. }
  1335. }
  1336. /*
  1337. * Look in variable ranges
  1338. * Look of multiple ranges matching this address and pick type
  1339. * as per MTRR precedence
  1340. */
  1341. if (!(mtrr_state->enabled & 2))
  1342. return mtrr_state->def_type;
  1343. prev_match = 0xFF;
  1344. for (i = 0; i < num_var_ranges; ++i) {
  1345. unsigned short start_state, end_state;
  1346. if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
  1347. continue;
  1348. base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
  1349. (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
  1350. mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
  1351. (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
  1352. start_state = ((start & mask) == (base & mask));
  1353. end_state = ((end & mask) == (base & mask));
  1354. if (start_state != end_state)
  1355. return 0xFE;
  1356. if ((start & mask) != (base & mask))
  1357. continue;
  1358. curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
  1359. if (prev_match == 0xFF) {
  1360. prev_match = curr_match;
  1361. continue;
  1362. }
  1363. if (prev_match == MTRR_TYPE_UNCACHABLE ||
  1364. curr_match == MTRR_TYPE_UNCACHABLE)
  1365. return MTRR_TYPE_UNCACHABLE;
  1366. if ((prev_match == MTRR_TYPE_WRBACK &&
  1367. curr_match == MTRR_TYPE_WRTHROUGH) ||
  1368. (prev_match == MTRR_TYPE_WRTHROUGH &&
  1369. curr_match == MTRR_TYPE_WRBACK)) {
  1370. prev_match = MTRR_TYPE_WRTHROUGH;
  1371. curr_match = MTRR_TYPE_WRTHROUGH;
  1372. }
  1373. if (prev_match != curr_match)
  1374. return MTRR_TYPE_UNCACHABLE;
  1375. }
  1376. if (prev_match != 0xFF)
  1377. return prev_match;
  1378. return mtrr_state->def_type;
  1379. }
  1380. u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
  1381. {
  1382. u8 mtrr;
  1383. mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
  1384. (gfn << PAGE_SHIFT) + PAGE_SIZE);
  1385. if (mtrr == 0xfe || mtrr == 0xff)
  1386. mtrr = MTRR_TYPE_WRBACK;
  1387. return mtrr;
  1388. }
  1389. EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
  1390. static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1391. {
  1392. unsigned index;
  1393. struct hlist_head *bucket;
  1394. struct kvm_mmu_page *s;
  1395. struct hlist_node *node, *n;
  1396. index = kvm_page_table_hashfn(sp->gfn);
  1397. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1398. /* don't unsync if pagetable is shadowed with multiple roles */
  1399. hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
  1400. if (s->gfn != sp->gfn || s->role.direct)
  1401. continue;
  1402. if (s->role.word != sp->role.word)
  1403. return 1;
  1404. }
  1405. ++vcpu->kvm->stat.mmu_unsync;
  1406. sp->unsync = 1;
  1407. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1408. mmu_convert_notrap(sp);
  1409. return 0;
  1410. }
  1411. static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
  1412. bool can_unsync)
  1413. {
  1414. struct kvm_mmu_page *shadow;
  1415. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  1416. if (shadow) {
  1417. if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
  1418. return 1;
  1419. if (shadow->unsync)
  1420. return 0;
  1421. if (can_unsync && oos_shadow)
  1422. return kvm_unsync_page(vcpu, shadow);
  1423. return 1;
  1424. }
  1425. return 0;
  1426. }
  1427. static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
  1428. unsigned pte_access, int user_fault,
  1429. int write_fault, int dirty, int largepage,
  1430. gfn_t gfn, pfn_t pfn, bool speculative,
  1431. bool can_unsync)
  1432. {
  1433. u64 spte;
  1434. int ret = 0;
  1435. /*
  1436. * We don't set the accessed bit, since we sometimes want to see
  1437. * whether the guest actually used the pte (in order to detect
  1438. * demand paging).
  1439. */
  1440. spte = shadow_base_present_pte | shadow_dirty_mask;
  1441. if (!speculative)
  1442. spte |= shadow_accessed_mask;
  1443. if (!dirty)
  1444. pte_access &= ~ACC_WRITE_MASK;
  1445. if (pte_access & ACC_EXEC_MASK)
  1446. spte |= shadow_x_mask;
  1447. else
  1448. spte |= shadow_nx_mask;
  1449. if (pte_access & ACC_USER_MASK)
  1450. spte |= shadow_user_mask;
  1451. if (largepage)
  1452. spte |= PT_PAGE_SIZE_MASK;
  1453. if (tdp_enabled)
  1454. spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
  1455. kvm_is_mmio_pfn(pfn));
  1456. spte |= (u64)pfn << PAGE_SHIFT;
  1457. if ((pte_access & ACC_WRITE_MASK)
  1458. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  1459. if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
  1460. ret = 1;
  1461. spte = shadow_trap_nonpresent_pte;
  1462. goto set_pte;
  1463. }
  1464. spte |= PT_WRITABLE_MASK;
  1465. /*
  1466. * Optimization: for pte sync, if spte was writable the hash
  1467. * lookup is unnecessary (and expensive). Write protection
  1468. * is responsibility of mmu_get_page / kvm_sync_page.
  1469. * Same reasoning can be applied to dirty page accounting.
  1470. */
  1471. if (!can_unsync && is_writeble_pte(*sptep))
  1472. goto set_pte;
  1473. if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
  1474. pgprintk("%s: found shadow page for %lx, marking ro\n",
  1475. __func__, gfn);
  1476. ret = 1;
  1477. pte_access &= ~ACC_WRITE_MASK;
  1478. if (is_writeble_pte(spte))
  1479. spte &= ~PT_WRITABLE_MASK;
  1480. }
  1481. }
  1482. if (pte_access & ACC_WRITE_MASK)
  1483. mark_page_dirty(vcpu->kvm, gfn);
  1484. set_pte:
  1485. __set_spte(sptep, spte);
  1486. return ret;
  1487. }
  1488. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
  1489. unsigned pt_access, unsigned pte_access,
  1490. int user_fault, int write_fault, int dirty,
  1491. int *ptwrite, int largepage, gfn_t gfn,
  1492. pfn_t pfn, bool speculative)
  1493. {
  1494. int was_rmapped = 0;
  1495. int was_writeble = is_writeble_pte(*sptep);
  1496. int rmap_count;
  1497. pgprintk("%s: spte %llx access %x write_fault %d"
  1498. " user_fault %d gfn %lx\n",
  1499. __func__, *sptep, pt_access,
  1500. write_fault, user_fault, gfn);
  1501. if (is_rmap_spte(*sptep)) {
  1502. /*
  1503. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  1504. * the parent of the now unreachable PTE.
  1505. */
  1506. if (largepage && !is_large_pte(*sptep)) {
  1507. struct kvm_mmu_page *child;
  1508. u64 pte = *sptep;
  1509. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1510. mmu_page_remove_parent_pte(child, sptep);
  1511. } else if (pfn != spte_to_pfn(*sptep)) {
  1512. pgprintk("hfn old %lx new %lx\n",
  1513. spte_to_pfn(*sptep), pfn);
  1514. rmap_remove(vcpu->kvm, sptep);
  1515. } else
  1516. was_rmapped = 1;
  1517. }
  1518. if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
  1519. dirty, largepage, gfn, pfn, speculative, true)) {
  1520. if (write_fault)
  1521. *ptwrite = 1;
  1522. kvm_x86_ops->tlb_flush(vcpu);
  1523. }
  1524. pgprintk("%s: setting spte %llx\n", __func__, *sptep);
  1525. pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
  1526. is_large_pte(*sptep)? "2MB" : "4kB",
  1527. is_present_pte(*sptep)?"RW":"R", gfn,
  1528. *shadow_pte, sptep);
  1529. if (!was_rmapped && is_large_pte(*sptep))
  1530. ++vcpu->kvm->stat.lpages;
  1531. page_header_update_slot(vcpu->kvm, sptep, gfn);
  1532. if (!was_rmapped) {
  1533. rmap_count = rmap_add(vcpu, sptep, gfn, largepage);
  1534. if (!is_rmap_spte(*sptep))
  1535. kvm_release_pfn_clean(pfn);
  1536. if (rmap_count > RMAP_RECYCLE_THRESHOLD)
  1537. rmap_recycle(vcpu, gfn, largepage);
  1538. } else {
  1539. if (was_writeble)
  1540. kvm_release_pfn_dirty(pfn);
  1541. else
  1542. kvm_release_pfn_clean(pfn);
  1543. }
  1544. if (speculative) {
  1545. vcpu->arch.last_pte_updated = sptep;
  1546. vcpu->arch.last_pte_gfn = gfn;
  1547. }
  1548. }
  1549. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  1550. {
  1551. }
  1552. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  1553. int largepage, gfn_t gfn, pfn_t pfn)
  1554. {
  1555. struct kvm_shadow_walk_iterator iterator;
  1556. struct kvm_mmu_page *sp;
  1557. int pt_write = 0;
  1558. gfn_t pseudo_gfn;
  1559. for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
  1560. if (iterator.level == PT_PAGE_TABLE_LEVEL
  1561. || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
  1562. mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
  1563. 0, write, 1, &pt_write,
  1564. largepage, gfn, pfn, false);
  1565. ++vcpu->stat.pf_fixed;
  1566. break;
  1567. }
  1568. if (*iterator.sptep == shadow_trap_nonpresent_pte) {
  1569. pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1570. sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
  1571. iterator.level - 1,
  1572. 1, ACC_ALL, iterator.sptep);
  1573. if (!sp) {
  1574. pgprintk("nonpaging_map: ENOMEM\n");
  1575. kvm_release_pfn_clean(pfn);
  1576. return -ENOMEM;
  1577. }
  1578. __set_spte(iterator.sptep,
  1579. __pa(sp->spt)
  1580. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1581. | shadow_user_mask | shadow_x_mask);
  1582. }
  1583. }
  1584. return pt_write;
  1585. }
  1586. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1587. {
  1588. int r;
  1589. int largepage = 0;
  1590. pfn_t pfn;
  1591. unsigned long mmu_seq;
  1592. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1593. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1594. largepage = 1;
  1595. }
  1596. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1597. smp_rmb();
  1598. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1599. /* mmio */
  1600. if (is_error_pfn(pfn)) {
  1601. kvm_release_pfn_clean(pfn);
  1602. return 1;
  1603. }
  1604. spin_lock(&vcpu->kvm->mmu_lock);
  1605. if (mmu_notifier_retry(vcpu, mmu_seq))
  1606. goto out_unlock;
  1607. kvm_mmu_free_some_pages(vcpu);
  1608. r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
  1609. spin_unlock(&vcpu->kvm->mmu_lock);
  1610. return r;
  1611. out_unlock:
  1612. spin_unlock(&vcpu->kvm->mmu_lock);
  1613. kvm_release_pfn_clean(pfn);
  1614. return 0;
  1615. }
  1616. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1617. {
  1618. int i;
  1619. struct kvm_mmu_page *sp;
  1620. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1621. return;
  1622. spin_lock(&vcpu->kvm->mmu_lock);
  1623. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1624. hpa_t root = vcpu->arch.mmu.root_hpa;
  1625. sp = page_header(root);
  1626. --sp->root_count;
  1627. if (!sp->root_count && sp->role.invalid)
  1628. kvm_mmu_zap_page(vcpu->kvm, sp);
  1629. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1630. spin_unlock(&vcpu->kvm->mmu_lock);
  1631. return;
  1632. }
  1633. for (i = 0; i < 4; ++i) {
  1634. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1635. if (root) {
  1636. root &= PT64_BASE_ADDR_MASK;
  1637. sp = page_header(root);
  1638. --sp->root_count;
  1639. if (!sp->root_count && sp->role.invalid)
  1640. kvm_mmu_zap_page(vcpu->kvm, sp);
  1641. }
  1642. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1643. }
  1644. spin_unlock(&vcpu->kvm->mmu_lock);
  1645. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1646. }
  1647. static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
  1648. {
  1649. int ret = 0;
  1650. if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
  1651. set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
  1652. ret = 1;
  1653. }
  1654. return ret;
  1655. }
  1656. static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1657. {
  1658. int i;
  1659. gfn_t root_gfn;
  1660. struct kvm_mmu_page *sp;
  1661. int direct = 0;
  1662. u64 pdptr;
  1663. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1664. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1665. hpa_t root = vcpu->arch.mmu.root_hpa;
  1666. ASSERT(!VALID_PAGE(root));
  1667. if (tdp_enabled)
  1668. direct = 1;
  1669. if (mmu_check_root(vcpu, root_gfn))
  1670. return 1;
  1671. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1672. PT64_ROOT_LEVEL, direct,
  1673. ACC_ALL, NULL);
  1674. root = __pa(sp->spt);
  1675. ++sp->root_count;
  1676. vcpu->arch.mmu.root_hpa = root;
  1677. return 0;
  1678. }
  1679. direct = !is_paging(vcpu);
  1680. if (tdp_enabled)
  1681. direct = 1;
  1682. for (i = 0; i < 4; ++i) {
  1683. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1684. ASSERT(!VALID_PAGE(root));
  1685. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1686. pdptr = kvm_pdptr_read(vcpu, i);
  1687. if (!is_present_gpte(pdptr)) {
  1688. vcpu->arch.mmu.pae_root[i] = 0;
  1689. continue;
  1690. }
  1691. root_gfn = pdptr >> PAGE_SHIFT;
  1692. } else if (vcpu->arch.mmu.root_level == 0)
  1693. root_gfn = 0;
  1694. if (mmu_check_root(vcpu, root_gfn))
  1695. return 1;
  1696. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1697. PT32_ROOT_LEVEL, direct,
  1698. ACC_ALL, NULL);
  1699. root = __pa(sp->spt);
  1700. ++sp->root_count;
  1701. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1702. }
  1703. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1704. return 0;
  1705. }
  1706. static void mmu_sync_roots(struct kvm_vcpu *vcpu)
  1707. {
  1708. int i;
  1709. struct kvm_mmu_page *sp;
  1710. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1711. return;
  1712. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1713. hpa_t root = vcpu->arch.mmu.root_hpa;
  1714. sp = page_header(root);
  1715. mmu_sync_children(vcpu, sp);
  1716. return;
  1717. }
  1718. for (i = 0; i < 4; ++i) {
  1719. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1720. if (root && VALID_PAGE(root)) {
  1721. root &= PT64_BASE_ADDR_MASK;
  1722. sp = page_header(root);
  1723. mmu_sync_children(vcpu, sp);
  1724. }
  1725. }
  1726. }
  1727. void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
  1728. {
  1729. spin_lock(&vcpu->kvm->mmu_lock);
  1730. mmu_sync_roots(vcpu);
  1731. spin_unlock(&vcpu->kvm->mmu_lock);
  1732. }
  1733. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  1734. {
  1735. return vaddr;
  1736. }
  1737. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1738. u32 error_code)
  1739. {
  1740. gfn_t gfn;
  1741. int r;
  1742. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1743. r = mmu_topup_memory_caches(vcpu);
  1744. if (r)
  1745. return r;
  1746. ASSERT(vcpu);
  1747. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1748. gfn = gva >> PAGE_SHIFT;
  1749. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1750. error_code & PFERR_WRITE_MASK, gfn);
  1751. }
  1752. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1753. u32 error_code)
  1754. {
  1755. pfn_t pfn;
  1756. int r;
  1757. int largepage = 0;
  1758. gfn_t gfn = gpa >> PAGE_SHIFT;
  1759. unsigned long mmu_seq;
  1760. ASSERT(vcpu);
  1761. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1762. r = mmu_topup_memory_caches(vcpu);
  1763. if (r)
  1764. return r;
  1765. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1766. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1767. largepage = 1;
  1768. }
  1769. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1770. smp_rmb();
  1771. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1772. if (is_error_pfn(pfn)) {
  1773. kvm_release_pfn_clean(pfn);
  1774. return 1;
  1775. }
  1776. spin_lock(&vcpu->kvm->mmu_lock);
  1777. if (mmu_notifier_retry(vcpu, mmu_seq))
  1778. goto out_unlock;
  1779. kvm_mmu_free_some_pages(vcpu);
  1780. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1781. largepage, gfn, pfn);
  1782. spin_unlock(&vcpu->kvm->mmu_lock);
  1783. return r;
  1784. out_unlock:
  1785. spin_unlock(&vcpu->kvm->mmu_lock);
  1786. kvm_release_pfn_clean(pfn);
  1787. return 0;
  1788. }
  1789. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1790. {
  1791. mmu_free_roots(vcpu);
  1792. }
  1793. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1794. {
  1795. struct kvm_mmu *context = &vcpu->arch.mmu;
  1796. context->new_cr3 = nonpaging_new_cr3;
  1797. context->page_fault = nonpaging_page_fault;
  1798. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1799. context->free = nonpaging_free;
  1800. context->prefetch_page = nonpaging_prefetch_page;
  1801. context->sync_page = nonpaging_sync_page;
  1802. context->invlpg = nonpaging_invlpg;
  1803. context->root_level = 0;
  1804. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1805. context->root_hpa = INVALID_PAGE;
  1806. return 0;
  1807. }
  1808. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1809. {
  1810. ++vcpu->stat.tlb_flush;
  1811. kvm_x86_ops->tlb_flush(vcpu);
  1812. }
  1813. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1814. {
  1815. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1816. mmu_free_roots(vcpu);
  1817. }
  1818. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1819. u64 addr,
  1820. u32 err_code)
  1821. {
  1822. kvm_inject_page_fault(vcpu, addr, err_code);
  1823. }
  1824. static void paging_free(struct kvm_vcpu *vcpu)
  1825. {
  1826. nonpaging_free(vcpu);
  1827. }
  1828. static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
  1829. {
  1830. int bit7;
  1831. bit7 = (gpte >> 7) & 1;
  1832. return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
  1833. }
  1834. #define PTTYPE 64
  1835. #include "paging_tmpl.h"
  1836. #undef PTTYPE
  1837. #define PTTYPE 32
  1838. #include "paging_tmpl.h"
  1839. #undef PTTYPE
  1840. static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
  1841. {
  1842. struct kvm_mmu *context = &vcpu->arch.mmu;
  1843. int maxphyaddr = cpuid_maxphyaddr(vcpu);
  1844. u64 exb_bit_rsvd = 0;
  1845. if (!is_nx(vcpu))
  1846. exb_bit_rsvd = rsvd_bits(63, 63);
  1847. switch (level) {
  1848. case PT32_ROOT_LEVEL:
  1849. /* no rsvd bits for 2 level 4K page table entries */
  1850. context->rsvd_bits_mask[0][1] = 0;
  1851. context->rsvd_bits_mask[0][0] = 0;
  1852. if (is_cpuid_PSE36())
  1853. /* 36bits PSE 4MB page */
  1854. context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
  1855. else
  1856. /* 32 bits PSE 4MB page */
  1857. context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
  1858. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1859. break;
  1860. case PT32E_ROOT_LEVEL:
  1861. context->rsvd_bits_mask[0][2] =
  1862. rsvd_bits(maxphyaddr, 63) |
  1863. rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
  1864. context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
  1865. rsvd_bits(maxphyaddr, 62); /* PDE */
  1866. context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
  1867. rsvd_bits(maxphyaddr, 62); /* PTE */
  1868. context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
  1869. rsvd_bits(maxphyaddr, 62) |
  1870. rsvd_bits(13, 20); /* large page */
  1871. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1872. break;
  1873. case PT64_ROOT_LEVEL:
  1874. context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
  1875. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1876. context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
  1877. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1878. context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
  1879. rsvd_bits(maxphyaddr, 51);
  1880. context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
  1881. rsvd_bits(maxphyaddr, 51);
  1882. context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
  1883. context->rsvd_bits_mask[1][2] = context->rsvd_bits_mask[0][2];
  1884. context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
  1885. rsvd_bits(maxphyaddr, 51) |
  1886. rsvd_bits(13, 20); /* large page */
  1887. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1888. break;
  1889. }
  1890. }
  1891. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1892. {
  1893. struct kvm_mmu *context = &vcpu->arch.mmu;
  1894. ASSERT(is_pae(vcpu));
  1895. context->new_cr3 = paging_new_cr3;
  1896. context->page_fault = paging64_page_fault;
  1897. context->gva_to_gpa = paging64_gva_to_gpa;
  1898. context->prefetch_page = paging64_prefetch_page;
  1899. context->sync_page = paging64_sync_page;
  1900. context->invlpg = paging64_invlpg;
  1901. context->free = paging_free;
  1902. context->root_level = level;
  1903. context->shadow_root_level = level;
  1904. context->root_hpa = INVALID_PAGE;
  1905. return 0;
  1906. }
  1907. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1908. {
  1909. reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
  1910. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1911. }
  1912. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1913. {
  1914. struct kvm_mmu *context = &vcpu->arch.mmu;
  1915. reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
  1916. context->new_cr3 = paging_new_cr3;
  1917. context->page_fault = paging32_page_fault;
  1918. context->gva_to_gpa = paging32_gva_to_gpa;
  1919. context->free = paging_free;
  1920. context->prefetch_page = paging32_prefetch_page;
  1921. context->sync_page = paging32_sync_page;
  1922. context->invlpg = paging32_invlpg;
  1923. context->root_level = PT32_ROOT_LEVEL;
  1924. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1925. context->root_hpa = INVALID_PAGE;
  1926. return 0;
  1927. }
  1928. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1929. {
  1930. reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
  1931. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1932. }
  1933. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  1934. {
  1935. struct kvm_mmu *context = &vcpu->arch.mmu;
  1936. context->new_cr3 = nonpaging_new_cr3;
  1937. context->page_fault = tdp_page_fault;
  1938. context->free = nonpaging_free;
  1939. context->prefetch_page = nonpaging_prefetch_page;
  1940. context->sync_page = nonpaging_sync_page;
  1941. context->invlpg = nonpaging_invlpg;
  1942. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  1943. context->root_hpa = INVALID_PAGE;
  1944. if (!is_paging(vcpu)) {
  1945. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1946. context->root_level = 0;
  1947. } else if (is_long_mode(vcpu)) {
  1948. reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
  1949. context->gva_to_gpa = paging64_gva_to_gpa;
  1950. context->root_level = PT64_ROOT_LEVEL;
  1951. } else if (is_pae(vcpu)) {
  1952. reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
  1953. context->gva_to_gpa = paging64_gva_to_gpa;
  1954. context->root_level = PT32E_ROOT_LEVEL;
  1955. } else {
  1956. reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
  1957. context->gva_to_gpa = paging32_gva_to_gpa;
  1958. context->root_level = PT32_ROOT_LEVEL;
  1959. }
  1960. return 0;
  1961. }
  1962. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  1963. {
  1964. int r;
  1965. ASSERT(vcpu);
  1966. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1967. if (!is_paging(vcpu))
  1968. r = nonpaging_init_context(vcpu);
  1969. else if (is_long_mode(vcpu))
  1970. r = paging64_init_context(vcpu);
  1971. else if (is_pae(vcpu))
  1972. r = paging32E_init_context(vcpu);
  1973. else
  1974. r = paging32_init_context(vcpu);
  1975. vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
  1976. return r;
  1977. }
  1978. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1979. {
  1980. vcpu->arch.update_pte.pfn = bad_pfn;
  1981. if (tdp_enabled)
  1982. return init_kvm_tdp_mmu(vcpu);
  1983. else
  1984. return init_kvm_softmmu(vcpu);
  1985. }
  1986. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1987. {
  1988. ASSERT(vcpu);
  1989. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1990. vcpu->arch.mmu.free(vcpu);
  1991. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1992. }
  1993. }
  1994. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1995. {
  1996. destroy_kvm_mmu(vcpu);
  1997. return init_kvm_mmu(vcpu);
  1998. }
  1999. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  2000. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  2001. {
  2002. int r;
  2003. r = mmu_topup_memory_caches(vcpu);
  2004. if (r)
  2005. goto out;
  2006. spin_lock(&vcpu->kvm->mmu_lock);
  2007. kvm_mmu_free_some_pages(vcpu);
  2008. r = mmu_alloc_roots(vcpu);
  2009. mmu_sync_roots(vcpu);
  2010. spin_unlock(&vcpu->kvm->mmu_lock);
  2011. if (r)
  2012. goto out;
  2013. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  2014. kvm_mmu_flush_tlb(vcpu);
  2015. out:
  2016. return r;
  2017. }
  2018. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  2019. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  2020. {
  2021. mmu_free_roots(vcpu);
  2022. }
  2023. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  2024. struct kvm_mmu_page *sp,
  2025. u64 *spte)
  2026. {
  2027. u64 pte;
  2028. struct kvm_mmu_page *child;
  2029. pte = *spte;
  2030. if (is_shadow_present_pte(pte)) {
  2031. if (is_last_spte(pte, sp->role.level))
  2032. rmap_remove(vcpu->kvm, spte);
  2033. else {
  2034. child = page_header(pte & PT64_BASE_ADDR_MASK);
  2035. mmu_page_remove_parent_pte(child, spte);
  2036. }
  2037. }
  2038. __set_spte(spte, shadow_trap_nonpresent_pte);
  2039. if (is_large_pte(pte))
  2040. --vcpu->kvm->stat.lpages;
  2041. }
  2042. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  2043. struct kvm_mmu_page *sp,
  2044. u64 *spte,
  2045. const void *new)
  2046. {
  2047. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  2048. if (!vcpu->arch.update_pte.largepage ||
  2049. sp->role.glevels == PT32_ROOT_LEVEL) {
  2050. ++vcpu->kvm->stat.mmu_pde_zapped;
  2051. return;
  2052. }
  2053. }
  2054. ++vcpu->kvm->stat.mmu_pte_updated;
  2055. if (sp->role.glevels == PT32_ROOT_LEVEL)
  2056. paging32_update_pte(vcpu, sp, spte, new);
  2057. else
  2058. paging64_update_pte(vcpu, sp, spte, new);
  2059. }
  2060. static bool need_remote_flush(u64 old, u64 new)
  2061. {
  2062. if (!is_shadow_present_pte(old))
  2063. return false;
  2064. if (!is_shadow_present_pte(new))
  2065. return true;
  2066. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  2067. return true;
  2068. old ^= PT64_NX_MASK;
  2069. new ^= PT64_NX_MASK;
  2070. return (old & ~new & PT64_PERM_MASK) != 0;
  2071. }
  2072. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  2073. {
  2074. if (need_remote_flush(old, new))
  2075. kvm_flush_remote_tlbs(vcpu->kvm);
  2076. else
  2077. kvm_mmu_flush_tlb(vcpu);
  2078. }
  2079. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  2080. {
  2081. u64 *spte = vcpu->arch.last_pte_updated;
  2082. return !!(spte && (*spte & shadow_accessed_mask));
  2083. }
  2084. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2085. const u8 *new, int bytes)
  2086. {
  2087. gfn_t gfn;
  2088. int r;
  2089. u64 gpte = 0;
  2090. pfn_t pfn;
  2091. vcpu->arch.update_pte.largepage = 0;
  2092. if (bytes != 4 && bytes != 8)
  2093. return;
  2094. /*
  2095. * Assume that the pte write on a page table of the same type
  2096. * as the current vcpu paging mode. This is nearly always true
  2097. * (might be false while changing modes). Note it is verified later
  2098. * by update_pte().
  2099. */
  2100. if (is_pae(vcpu)) {
  2101. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  2102. if ((bytes == 4) && (gpa % 4 == 0)) {
  2103. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  2104. if (r)
  2105. return;
  2106. memcpy((void *)&gpte + (gpa % 8), new, 4);
  2107. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  2108. memcpy((void *)&gpte, new, 8);
  2109. }
  2110. } else {
  2111. if ((bytes == 4) && (gpa % 4 == 0))
  2112. memcpy((void *)&gpte, new, 4);
  2113. }
  2114. if (!is_present_gpte(gpte))
  2115. return;
  2116. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  2117. if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
  2118. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  2119. vcpu->arch.update_pte.largepage = 1;
  2120. }
  2121. vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
  2122. smp_rmb();
  2123. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2124. if (is_error_pfn(pfn)) {
  2125. kvm_release_pfn_clean(pfn);
  2126. return;
  2127. }
  2128. vcpu->arch.update_pte.gfn = gfn;
  2129. vcpu->arch.update_pte.pfn = pfn;
  2130. }
  2131. static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  2132. {
  2133. u64 *spte = vcpu->arch.last_pte_updated;
  2134. if (spte
  2135. && vcpu->arch.last_pte_gfn == gfn
  2136. && shadow_accessed_mask
  2137. && !(*spte & shadow_accessed_mask)
  2138. && is_shadow_present_pte(*spte))
  2139. set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  2140. }
  2141. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2142. const u8 *new, int bytes,
  2143. bool guest_initiated)
  2144. {
  2145. gfn_t gfn = gpa >> PAGE_SHIFT;
  2146. struct kvm_mmu_page *sp;
  2147. struct hlist_node *node, *n;
  2148. struct hlist_head *bucket;
  2149. unsigned index;
  2150. u64 entry, gentry;
  2151. u64 *spte;
  2152. unsigned offset = offset_in_page(gpa);
  2153. unsigned pte_size;
  2154. unsigned page_offset;
  2155. unsigned misaligned;
  2156. unsigned quadrant;
  2157. int level;
  2158. int flooded = 0;
  2159. int npte;
  2160. int r;
  2161. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  2162. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  2163. spin_lock(&vcpu->kvm->mmu_lock);
  2164. kvm_mmu_access_page(vcpu, gfn);
  2165. kvm_mmu_free_some_pages(vcpu);
  2166. ++vcpu->kvm->stat.mmu_pte_write;
  2167. kvm_mmu_audit(vcpu, "pre pte write");
  2168. if (guest_initiated) {
  2169. if (gfn == vcpu->arch.last_pt_write_gfn
  2170. && !last_updated_pte_accessed(vcpu)) {
  2171. ++vcpu->arch.last_pt_write_count;
  2172. if (vcpu->arch.last_pt_write_count >= 3)
  2173. flooded = 1;
  2174. } else {
  2175. vcpu->arch.last_pt_write_gfn = gfn;
  2176. vcpu->arch.last_pt_write_count = 1;
  2177. vcpu->arch.last_pte_updated = NULL;
  2178. }
  2179. }
  2180. index = kvm_page_table_hashfn(gfn);
  2181. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  2182. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  2183. if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
  2184. continue;
  2185. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  2186. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  2187. misaligned |= bytes < 4;
  2188. if (misaligned || flooded) {
  2189. /*
  2190. * Misaligned accesses are too much trouble to fix
  2191. * up; also, they usually indicate a page is not used
  2192. * as a page table.
  2193. *
  2194. * If we're seeing too many writes to a page,
  2195. * it may no longer be a page table, or we may be
  2196. * forking, in which case it is better to unmap the
  2197. * page.
  2198. */
  2199. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  2200. gpa, bytes, sp->role.word);
  2201. if (kvm_mmu_zap_page(vcpu->kvm, sp))
  2202. n = bucket->first;
  2203. ++vcpu->kvm->stat.mmu_flooded;
  2204. continue;
  2205. }
  2206. page_offset = offset;
  2207. level = sp->role.level;
  2208. npte = 1;
  2209. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  2210. page_offset <<= 1; /* 32->64 */
  2211. /*
  2212. * A 32-bit pde maps 4MB while the shadow pdes map
  2213. * only 2MB. So we need to double the offset again
  2214. * and zap two pdes instead of one.
  2215. */
  2216. if (level == PT32_ROOT_LEVEL) {
  2217. page_offset &= ~7; /* kill rounding error */
  2218. page_offset <<= 1;
  2219. npte = 2;
  2220. }
  2221. quadrant = page_offset >> PAGE_SHIFT;
  2222. page_offset &= ~PAGE_MASK;
  2223. if (quadrant != sp->role.quadrant)
  2224. continue;
  2225. }
  2226. spte = &sp->spt[page_offset / sizeof(*spte)];
  2227. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  2228. gentry = 0;
  2229. r = kvm_read_guest_atomic(vcpu->kvm,
  2230. gpa & ~(u64)(pte_size - 1),
  2231. &gentry, pte_size);
  2232. new = (const void *)&gentry;
  2233. if (r < 0)
  2234. new = NULL;
  2235. }
  2236. while (npte--) {
  2237. entry = *spte;
  2238. mmu_pte_write_zap_pte(vcpu, sp, spte);
  2239. if (new)
  2240. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  2241. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  2242. ++spte;
  2243. }
  2244. }
  2245. kvm_mmu_audit(vcpu, "post pte write");
  2246. spin_unlock(&vcpu->kvm->mmu_lock);
  2247. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  2248. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  2249. vcpu->arch.update_pte.pfn = bad_pfn;
  2250. }
  2251. }
  2252. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  2253. {
  2254. gpa_t gpa;
  2255. int r;
  2256. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  2257. spin_lock(&vcpu->kvm->mmu_lock);
  2258. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  2259. spin_unlock(&vcpu->kvm->mmu_lock);
  2260. return r;
  2261. }
  2262. EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
  2263. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  2264. {
  2265. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  2266. struct kvm_mmu_page *sp;
  2267. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  2268. struct kvm_mmu_page, link);
  2269. kvm_mmu_zap_page(vcpu->kvm, sp);
  2270. ++vcpu->kvm->stat.mmu_recycled;
  2271. }
  2272. }
  2273. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  2274. {
  2275. int r;
  2276. enum emulation_result er;
  2277. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  2278. if (r < 0)
  2279. goto out;
  2280. if (!r) {
  2281. r = 1;
  2282. goto out;
  2283. }
  2284. r = mmu_topup_memory_caches(vcpu);
  2285. if (r)
  2286. goto out;
  2287. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  2288. switch (er) {
  2289. case EMULATE_DONE:
  2290. return 1;
  2291. case EMULATE_DO_MMIO:
  2292. ++vcpu->stat.mmio_exits;
  2293. return 0;
  2294. case EMULATE_FAIL:
  2295. vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
  2296. vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
  2297. return 0;
  2298. default:
  2299. BUG();
  2300. }
  2301. out:
  2302. return r;
  2303. }
  2304. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  2305. void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  2306. {
  2307. vcpu->arch.mmu.invlpg(vcpu, gva);
  2308. kvm_mmu_flush_tlb(vcpu);
  2309. ++vcpu->stat.invlpg;
  2310. }
  2311. EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
  2312. void kvm_enable_tdp(void)
  2313. {
  2314. tdp_enabled = true;
  2315. }
  2316. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  2317. void kvm_disable_tdp(void)
  2318. {
  2319. tdp_enabled = false;
  2320. }
  2321. EXPORT_SYMBOL_GPL(kvm_disable_tdp);
  2322. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  2323. {
  2324. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  2325. }
  2326. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  2327. {
  2328. struct page *page;
  2329. int i;
  2330. ASSERT(vcpu);
  2331. if (vcpu->kvm->arch.n_requested_mmu_pages)
  2332. vcpu->kvm->arch.n_free_mmu_pages =
  2333. vcpu->kvm->arch.n_requested_mmu_pages;
  2334. else
  2335. vcpu->kvm->arch.n_free_mmu_pages =
  2336. vcpu->kvm->arch.n_alloc_mmu_pages;
  2337. /*
  2338. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  2339. * Therefore we need to allocate shadow page tables in the first
  2340. * 4GB of memory, which happens to fit the DMA32 zone.
  2341. */
  2342. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  2343. if (!page)
  2344. goto error_1;
  2345. vcpu->arch.mmu.pae_root = page_address(page);
  2346. for (i = 0; i < 4; ++i)
  2347. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  2348. return 0;
  2349. error_1:
  2350. free_mmu_pages(vcpu);
  2351. return -ENOMEM;
  2352. }
  2353. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  2354. {
  2355. ASSERT(vcpu);
  2356. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2357. return alloc_mmu_pages(vcpu);
  2358. }
  2359. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  2360. {
  2361. ASSERT(vcpu);
  2362. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2363. return init_kvm_mmu(vcpu);
  2364. }
  2365. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  2366. {
  2367. ASSERT(vcpu);
  2368. destroy_kvm_mmu(vcpu);
  2369. free_mmu_pages(vcpu);
  2370. mmu_free_memory_caches(vcpu);
  2371. }
  2372. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  2373. {
  2374. struct kvm_mmu_page *sp;
  2375. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  2376. int i;
  2377. u64 *pt;
  2378. if (!test_bit(slot, sp->slot_bitmap))
  2379. continue;
  2380. pt = sp->spt;
  2381. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  2382. /* avoid RMW */
  2383. if (pt[i] & PT_WRITABLE_MASK)
  2384. pt[i] &= ~PT_WRITABLE_MASK;
  2385. }
  2386. kvm_flush_remote_tlbs(kvm);
  2387. }
  2388. void kvm_mmu_zap_all(struct kvm *kvm)
  2389. {
  2390. struct kvm_mmu_page *sp, *node;
  2391. spin_lock(&kvm->mmu_lock);
  2392. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  2393. if (kvm_mmu_zap_page(kvm, sp))
  2394. node = container_of(kvm->arch.active_mmu_pages.next,
  2395. struct kvm_mmu_page, link);
  2396. spin_unlock(&kvm->mmu_lock);
  2397. kvm_flush_remote_tlbs(kvm);
  2398. }
  2399. static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  2400. {
  2401. struct kvm_mmu_page *page;
  2402. page = container_of(kvm->arch.active_mmu_pages.prev,
  2403. struct kvm_mmu_page, link);
  2404. kvm_mmu_zap_page(kvm, page);
  2405. }
  2406. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  2407. {
  2408. struct kvm *kvm;
  2409. struct kvm *kvm_freed = NULL;
  2410. int cache_count = 0;
  2411. spin_lock(&kvm_lock);
  2412. list_for_each_entry(kvm, &vm_list, vm_list) {
  2413. int npages;
  2414. if (!down_read_trylock(&kvm->slots_lock))
  2415. continue;
  2416. spin_lock(&kvm->mmu_lock);
  2417. npages = kvm->arch.n_alloc_mmu_pages -
  2418. kvm->arch.n_free_mmu_pages;
  2419. cache_count += npages;
  2420. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  2421. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  2422. cache_count--;
  2423. kvm_freed = kvm;
  2424. }
  2425. nr_to_scan--;
  2426. spin_unlock(&kvm->mmu_lock);
  2427. up_read(&kvm->slots_lock);
  2428. }
  2429. if (kvm_freed)
  2430. list_move_tail(&kvm_freed->vm_list, &vm_list);
  2431. spin_unlock(&kvm_lock);
  2432. return cache_count;
  2433. }
  2434. static struct shrinker mmu_shrinker = {
  2435. .shrink = mmu_shrink,
  2436. .seeks = DEFAULT_SEEKS * 10,
  2437. };
  2438. static void mmu_destroy_caches(void)
  2439. {
  2440. if (pte_chain_cache)
  2441. kmem_cache_destroy(pte_chain_cache);
  2442. if (rmap_desc_cache)
  2443. kmem_cache_destroy(rmap_desc_cache);
  2444. if (mmu_page_header_cache)
  2445. kmem_cache_destroy(mmu_page_header_cache);
  2446. }
  2447. void kvm_mmu_module_exit(void)
  2448. {
  2449. mmu_destroy_caches();
  2450. unregister_shrinker(&mmu_shrinker);
  2451. }
  2452. int kvm_mmu_module_init(void)
  2453. {
  2454. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  2455. sizeof(struct kvm_pte_chain),
  2456. 0, 0, NULL);
  2457. if (!pte_chain_cache)
  2458. goto nomem;
  2459. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  2460. sizeof(struct kvm_rmap_desc),
  2461. 0, 0, NULL);
  2462. if (!rmap_desc_cache)
  2463. goto nomem;
  2464. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  2465. sizeof(struct kvm_mmu_page),
  2466. 0, 0, NULL);
  2467. if (!mmu_page_header_cache)
  2468. goto nomem;
  2469. register_shrinker(&mmu_shrinker);
  2470. return 0;
  2471. nomem:
  2472. mmu_destroy_caches();
  2473. return -ENOMEM;
  2474. }
  2475. /*
  2476. * Caculate mmu pages needed for kvm.
  2477. */
  2478. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  2479. {
  2480. int i;
  2481. unsigned int nr_mmu_pages;
  2482. unsigned int nr_pages = 0;
  2483. for (i = 0; i < kvm->nmemslots; i++)
  2484. nr_pages += kvm->memslots[i].npages;
  2485. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  2486. nr_mmu_pages = max(nr_mmu_pages,
  2487. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  2488. return nr_mmu_pages;
  2489. }
  2490. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2491. unsigned len)
  2492. {
  2493. if (len > buffer->len)
  2494. return NULL;
  2495. return buffer->ptr;
  2496. }
  2497. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2498. unsigned len)
  2499. {
  2500. void *ret;
  2501. ret = pv_mmu_peek_buffer(buffer, len);
  2502. if (!ret)
  2503. return ret;
  2504. buffer->ptr += len;
  2505. buffer->len -= len;
  2506. buffer->processed += len;
  2507. return ret;
  2508. }
  2509. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  2510. gpa_t addr, gpa_t value)
  2511. {
  2512. int bytes = 8;
  2513. int r;
  2514. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  2515. bytes = 4;
  2516. r = mmu_topup_memory_caches(vcpu);
  2517. if (r)
  2518. return r;
  2519. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  2520. return -EFAULT;
  2521. return 1;
  2522. }
  2523. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  2524. {
  2525. kvm_set_cr3(vcpu, vcpu->arch.cr3);
  2526. return 1;
  2527. }
  2528. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  2529. {
  2530. spin_lock(&vcpu->kvm->mmu_lock);
  2531. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  2532. spin_unlock(&vcpu->kvm->mmu_lock);
  2533. return 1;
  2534. }
  2535. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  2536. struct kvm_pv_mmu_op_buffer *buffer)
  2537. {
  2538. struct kvm_mmu_op_header *header;
  2539. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  2540. if (!header)
  2541. return 0;
  2542. switch (header->op) {
  2543. case KVM_MMU_OP_WRITE_PTE: {
  2544. struct kvm_mmu_op_write_pte *wpte;
  2545. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  2546. if (!wpte)
  2547. return 0;
  2548. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  2549. wpte->pte_val);
  2550. }
  2551. case KVM_MMU_OP_FLUSH_TLB: {
  2552. struct kvm_mmu_op_flush_tlb *ftlb;
  2553. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  2554. if (!ftlb)
  2555. return 0;
  2556. return kvm_pv_mmu_flush_tlb(vcpu);
  2557. }
  2558. case KVM_MMU_OP_RELEASE_PT: {
  2559. struct kvm_mmu_op_release_pt *rpt;
  2560. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  2561. if (!rpt)
  2562. return 0;
  2563. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  2564. }
  2565. default: return 0;
  2566. }
  2567. }
  2568. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  2569. gpa_t addr, unsigned long *ret)
  2570. {
  2571. int r;
  2572. struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
  2573. buffer->ptr = buffer->buf;
  2574. buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
  2575. buffer->processed = 0;
  2576. r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
  2577. if (r)
  2578. goto out;
  2579. while (buffer->len) {
  2580. r = kvm_pv_mmu_op_one(vcpu, buffer);
  2581. if (r < 0)
  2582. goto out;
  2583. if (r == 0)
  2584. break;
  2585. }
  2586. r = 1;
  2587. out:
  2588. *ret = buffer->processed;
  2589. return r;
  2590. }
  2591. #ifdef AUDIT
  2592. static const char *audit_msg;
  2593. static gva_t canonicalize(gva_t gva)
  2594. {
  2595. #ifdef CONFIG_X86_64
  2596. gva = (long long)(gva << 16) >> 16;
  2597. #endif
  2598. return gva;
  2599. }
  2600. typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
  2601. u64 *sptep);
  2602. static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
  2603. inspect_spte_fn fn)
  2604. {
  2605. int i;
  2606. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2607. u64 ent = sp->spt[i];
  2608. if (is_shadow_present_pte(ent)) {
  2609. if (!is_last_spte(ent, sp->role.level)) {
  2610. struct kvm_mmu_page *child;
  2611. child = page_header(ent & PT64_BASE_ADDR_MASK);
  2612. __mmu_spte_walk(kvm, child, fn);
  2613. } else
  2614. fn(kvm, sp, &sp->spt[i]);
  2615. }
  2616. }
  2617. }
  2618. static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
  2619. {
  2620. int i;
  2621. struct kvm_mmu_page *sp;
  2622. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  2623. return;
  2624. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  2625. hpa_t root = vcpu->arch.mmu.root_hpa;
  2626. sp = page_header(root);
  2627. __mmu_spte_walk(vcpu->kvm, sp, fn);
  2628. return;
  2629. }
  2630. for (i = 0; i < 4; ++i) {
  2631. hpa_t root = vcpu->arch.mmu.pae_root[i];
  2632. if (root && VALID_PAGE(root)) {
  2633. root &= PT64_BASE_ADDR_MASK;
  2634. sp = page_header(root);
  2635. __mmu_spte_walk(vcpu->kvm, sp, fn);
  2636. }
  2637. }
  2638. return;
  2639. }
  2640. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  2641. gva_t va, int level)
  2642. {
  2643. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  2644. int i;
  2645. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  2646. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  2647. u64 ent = pt[i];
  2648. if (ent == shadow_trap_nonpresent_pte)
  2649. continue;
  2650. va = canonicalize(va);
  2651. if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
  2652. audit_mappings_page(vcpu, ent, va, level - 1);
  2653. else {
  2654. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  2655. gfn_t gfn = gpa >> PAGE_SHIFT;
  2656. pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2657. hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
  2658. if (is_error_pfn(pfn)) {
  2659. kvm_release_pfn_clean(pfn);
  2660. continue;
  2661. }
  2662. if (is_shadow_present_pte(ent)
  2663. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  2664. printk(KERN_ERR "xx audit error: (%s) levels %d"
  2665. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  2666. audit_msg, vcpu->arch.mmu.root_level,
  2667. va, gpa, hpa, ent,
  2668. is_shadow_present_pte(ent));
  2669. else if (ent == shadow_notrap_nonpresent_pte
  2670. && !is_error_hpa(hpa))
  2671. printk(KERN_ERR "audit: (%s) notrap shadow,"
  2672. " valid guest gva %lx\n", audit_msg, va);
  2673. kvm_release_pfn_clean(pfn);
  2674. }
  2675. }
  2676. }
  2677. static void audit_mappings(struct kvm_vcpu *vcpu)
  2678. {
  2679. unsigned i;
  2680. if (vcpu->arch.mmu.root_level == 4)
  2681. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  2682. else
  2683. for (i = 0; i < 4; ++i)
  2684. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  2685. audit_mappings_page(vcpu,
  2686. vcpu->arch.mmu.pae_root[i],
  2687. i << 30,
  2688. 2);
  2689. }
  2690. static int count_rmaps(struct kvm_vcpu *vcpu)
  2691. {
  2692. int nmaps = 0;
  2693. int i, j, k;
  2694. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  2695. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  2696. struct kvm_rmap_desc *d;
  2697. for (j = 0; j < m->npages; ++j) {
  2698. unsigned long *rmapp = &m->rmap[j];
  2699. if (!*rmapp)
  2700. continue;
  2701. if (!(*rmapp & 1)) {
  2702. ++nmaps;
  2703. continue;
  2704. }
  2705. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  2706. while (d) {
  2707. for (k = 0; k < RMAP_EXT; ++k)
  2708. if (d->sptes[k])
  2709. ++nmaps;
  2710. else
  2711. break;
  2712. d = d->more;
  2713. }
  2714. }
  2715. }
  2716. return nmaps;
  2717. }
  2718. void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
  2719. {
  2720. unsigned long *rmapp;
  2721. struct kvm_mmu_page *rev_sp;
  2722. gfn_t gfn;
  2723. if (*sptep & PT_WRITABLE_MASK) {
  2724. rev_sp = page_header(__pa(sptep));
  2725. gfn = rev_sp->gfns[sptep - rev_sp->spt];
  2726. if (!gfn_to_memslot(kvm, gfn)) {
  2727. if (!printk_ratelimit())
  2728. return;
  2729. printk(KERN_ERR "%s: no memslot for gfn %ld\n",
  2730. audit_msg, gfn);
  2731. printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
  2732. audit_msg, sptep - rev_sp->spt,
  2733. rev_sp->gfn);
  2734. dump_stack();
  2735. return;
  2736. }
  2737. rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
  2738. is_large_pte(*sptep));
  2739. if (!*rmapp) {
  2740. if (!printk_ratelimit())
  2741. return;
  2742. printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
  2743. audit_msg, *sptep);
  2744. dump_stack();
  2745. }
  2746. }
  2747. }
  2748. void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
  2749. {
  2750. mmu_spte_walk(vcpu, inspect_spte_has_rmap);
  2751. }
  2752. static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
  2753. {
  2754. struct kvm_mmu_page *sp;
  2755. int i;
  2756. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2757. u64 *pt = sp->spt;
  2758. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  2759. continue;
  2760. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2761. u64 ent = pt[i];
  2762. if (!(ent & PT_PRESENT_MASK))
  2763. continue;
  2764. if (!(ent & PT_WRITABLE_MASK))
  2765. continue;
  2766. inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
  2767. }
  2768. }
  2769. return;
  2770. }
  2771. static void audit_rmap(struct kvm_vcpu *vcpu)
  2772. {
  2773. check_writable_mappings_rmap(vcpu);
  2774. count_rmaps(vcpu);
  2775. }
  2776. static void audit_write_protection(struct kvm_vcpu *vcpu)
  2777. {
  2778. struct kvm_mmu_page *sp;
  2779. struct kvm_memory_slot *slot;
  2780. unsigned long *rmapp;
  2781. u64 *spte;
  2782. gfn_t gfn;
  2783. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2784. if (sp->role.direct)
  2785. continue;
  2786. if (sp->unsync)
  2787. continue;
  2788. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2789. slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
  2790. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2791. spte = rmap_next(vcpu->kvm, rmapp, NULL);
  2792. while (spte) {
  2793. if (*spte & PT_WRITABLE_MASK)
  2794. printk(KERN_ERR "%s: (%s) shadow page has "
  2795. "writable mappings: gfn %lx role %x\n",
  2796. __func__, audit_msg, sp->gfn,
  2797. sp->role.word);
  2798. spte = rmap_next(vcpu->kvm, rmapp, spte);
  2799. }
  2800. }
  2801. }
  2802. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2803. {
  2804. int olddbg = dbg;
  2805. dbg = 0;
  2806. audit_msg = msg;
  2807. audit_rmap(vcpu);
  2808. audit_write_protection(vcpu);
  2809. if (strcmp("pre pte write", audit_msg) != 0)
  2810. audit_mappings(vcpu);
  2811. audit_writable_sptes_have_rmaps(vcpu);
  2812. dbg = olddbg;
  2813. }
  2814. #endif