qla_init.c 107 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. #include <linux/vmalloc.h>
  10. #include "qla_devtbl.h"
  11. #ifdef CONFIG_SPARC
  12. #include <asm/prom.h>
  13. #endif
  14. /*
  15. * QLogic ISP2x00 Hardware Support Function Prototypes.
  16. */
  17. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  18. static void qla2x00_resize_request_q(scsi_qla_host_t *);
  19. static int qla2x00_setup_chip(scsi_qla_host_t *);
  20. static void qla2x00_init_response_q_entries(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *ha, fc_port_t *dev);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. /****************************************************************************/
  36. /* QLogic ISP2x00 Hardware Support Functions. */
  37. /****************************************************************************/
  38. /*
  39. * qla2x00_initialize_adapter
  40. * Initialize board.
  41. *
  42. * Input:
  43. * ha = adapter block pointer.
  44. *
  45. * Returns:
  46. * 0 = success
  47. */
  48. int
  49. qla2x00_initialize_adapter(scsi_qla_host_t *ha)
  50. {
  51. int rval;
  52. /* Clear adapter flags. */
  53. ha->flags.online = 0;
  54. ha->flags.reset_active = 0;
  55. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  56. atomic_set(&ha->loop_state, LOOP_DOWN);
  57. ha->device_flags = DFLG_NO_CABLE;
  58. ha->dpc_flags = 0;
  59. ha->flags.management_server_logged_in = 0;
  60. ha->marker_needed = 0;
  61. ha->mbx_flags = 0;
  62. ha->isp_abort_cnt = 0;
  63. ha->beacon_blink_led = 0;
  64. set_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags);
  65. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  66. rval = ha->isp_ops->pci_config(ha);
  67. if (rval) {
  68. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  69. ha->host_no));
  70. return (rval);
  71. }
  72. ha->isp_ops->reset_chip(ha);
  73. ha->isp_ops->get_flash_version(ha, ha->request_ring);
  74. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  75. ha->isp_ops->nvram_config(ha);
  76. if (ha->flags.disable_serdes) {
  77. /* Mask HBA via NVRAM settings? */
  78. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  79. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  80. ha->port_name[0], ha->port_name[1],
  81. ha->port_name[2], ha->port_name[3],
  82. ha->port_name[4], ha->port_name[5],
  83. ha->port_name[6], ha->port_name[7]);
  84. return QLA_FUNCTION_FAILED;
  85. }
  86. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  87. if (qla2x00_isp_firmware(ha) != QLA_SUCCESS) {
  88. rval = ha->isp_ops->chip_diag(ha);
  89. if (rval)
  90. return (rval);
  91. rval = qla2x00_setup_chip(ha);
  92. if (rval)
  93. return (rval);
  94. qla2xxx_get_flash_info(ha);
  95. }
  96. if (IS_QLA84XX(ha)) {
  97. ha->cs84xx = qla84xx_get_chip(ha);
  98. if (!ha->cs84xx) {
  99. qla_printk(KERN_ERR, ha,
  100. "Unable to configure ISP84XX.\n");
  101. return QLA_FUNCTION_FAILED;
  102. }
  103. }
  104. rval = qla2x00_init_rings(ha);
  105. return (rval);
  106. }
  107. /**
  108. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  109. * @ha: HA context
  110. *
  111. * Returns 0 on success.
  112. */
  113. int
  114. qla2100_pci_config(scsi_qla_host_t *ha)
  115. {
  116. uint16_t w;
  117. uint32_t d;
  118. unsigned long flags;
  119. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  120. pci_set_master(ha->pdev);
  121. pci_try_set_mwi(ha->pdev);
  122. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  123. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  124. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  125. /* Reset expansion ROM address decode enable */
  126. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  127. d &= ~PCI_ROM_ADDRESS_ENABLE;
  128. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  129. /* Get PCI bus information. */
  130. spin_lock_irqsave(&ha->hardware_lock, flags);
  131. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  132. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  133. return QLA_SUCCESS;
  134. }
  135. /**
  136. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  137. * @ha: HA context
  138. *
  139. * Returns 0 on success.
  140. */
  141. int
  142. qla2300_pci_config(scsi_qla_host_t *ha)
  143. {
  144. uint16_t w;
  145. uint32_t d;
  146. unsigned long flags = 0;
  147. uint32_t cnt;
  148. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  149. pci_set_master(ha->pdev);
  150. pci_try_set_mwi(ha->pdev);
  151. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  152. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  153. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  154. w &= ~PCI_COMMAND_INTX_DISABLE;
  155. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  156. /*
  157. * If this is a 2300 card and not 2312, reset the
  158. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  159. * the 2310 also reports itself as a 2300 so we need to get the
  160. * fb revision level -- a 6 indicates it really is a 2300 and
  161. * not a 2310.
  162. */
  163. if (IS_QLA2300(ha)) {
  164. spin_lock_irqsave(&ha->hardware_lock, flags);
  165. /* Pause RISC. */
  166. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  167. for (cnt = 0; cnt < 30000; cnt++) {
  168. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  169. break;
  170. udelay(10);
  171. }
  172. /* Select FPM registers. */
  173. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  174. RD_REG_WORD(&reg->ctrl_status);
  175. /* Get the fb rev level */
  176. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  177. if (ha->fb_rev == FPM_2300)
  178. pci_clear_mwi(ha->pdev);
  179. /* Deselect FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Release RISC module. */
  183. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  184. for (cnt = 0; cnt < 30000; cnt++) {
  185. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  186. break;
  187. udelay(10);
  188. }
  189. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  190. }
  191. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  192. /* Reset expansion ROM address decode enable */
  193. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  194. d &= ~PCI_ROM_ADDRESS_ENABLE;
  195. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  196. /* Get PCI bus information. */
  197. spin_lock_irqsave(&ha->hardware_lock, flags);
  198. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  199. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  200. return QLA_SUCCESS;
  201. }
  202. /**
  203. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  204. * @ha: HA context
  205. *
  206. * Returns 0 on success.
  207. */
  208. int
  209. qla24xx_pci_config(scsi_qla_host_t *ha)
  210. {
  211. uint16_t w;
  212. uint32_t d;
  213. unsigned long flags = 0;
  214. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  215. pci_set_master(ha->pdev);
  216. pci_try_set_mwi(ha->pdev);
  217. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  218. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  219. w &= ~PCI_COMMAND_INTX_DISABLE;
  220. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  221. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  222. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  223. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  224. pcix_set_mmrbc(ha->pdev, 2048);
  225. /* PCIe -- adjust Maximum Read Request Size (2048). */
  226. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  227. pcie_set_readrq(ha->pdev, 2048);
  228. /* Reset expansion ROM address decode enable */
  229. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  230. d &= ~PCI_ROM_ADDRESS_ENABLE;
  231. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  232. ha->chip_revision = ha->pdev->revision;
  233. /* Get PCI bus information. */
  234. spin_lock_irqsave(&ha->hardware_lock, flags);
  235. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  236. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  237. return QLA_SUCCESS;
  238. }
  239. /**
  240. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  241. * @ha: HA context
  242. *
  243. * Returns 0 on success.
  244. */
  245. int
  246. qla25xx_pci_config(scsi_qla_host_t *ha)
  247. {
  248. uint16_t w;
  249. uint32_t d;
  250. pci_set_master(ha->pdev);
  251. pci_try_set_mwi(ha->pdev);
  252. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  253. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  254. w &= ~PCI_COMMAND_INTX_DISABLE;
  255. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  256. /* PCIe -- adjust Maximum Read Request Size (2048). */
  257. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  258. pcie_set_readrq(ha->pdev, 2048);
  259. /* Reset expansion ROM address decode enable */
  260. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  261. d &= ~PCI_ROM_ADDRESS_ENABLE;
  262. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  263. ha->chip_revision = ha->pdev->revision;
  264. return QLA_SUCCESS;
  265. }
  266. /**
  267. * qla2x00_isp_firmware() - Choose firmware image.
  268. * @ha: HA context
  269. *
  270. * Returns 0 on success.
  271. */
  272. static int
  273. qla2x00_isp_firmware(scsi_qla_host_t *ha)
  274. {
  275. int rval;
  276. /* Assume loading risc code */
  277. rval = QLA_FUNCTION_FAILED;
  278. if (ha->flags.disable_risc_code_load) {
  279. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  280. ha->host_no));
  281. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  282. /* Verify checksum of loaded RISC code. */
  283. rval = qla2x00_verify_checksum(ha, ha->fw_srisc_address);
  284. }
  285. if (rval) {
  286. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  287. ha->host_no));
  288. }
  289. return (rval);
  290. }
  291. /**
  292. * qla2x00_reset_chip() - Reset ISP chip.
  293. * @ha: HA context
  294. *
  295. * Returns 0 on success.
  296. */
  297. void
  298. qla2x00_reset_chip(scsi_qla_host_t *ha)
  299. {
  300. unsigned long flags = 0;
  301. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  302. uint32_t cnt;
  303. uint16_t cmd;
  304. ha->isp_ops->disable_intrs(ha);
  305. spin_lock_irqsave(&ha->hardware_lock, flags);
  306. /* Turn off master enable */
  307. cmd = 0;
  308. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  309. cmd &= ~PCI_COMMAND_MASTER;
  310. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  311. if (!IS_QLA2100(ha)) {
  312. /* Pause RISC. */
  313. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  314. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  315. for (cnt = 0; cnt < 30000; cnt++) {
  316. if ((RD_REG_WORD(&reg->hccr) &
  317. HCCR_RISC_PAUSE) != 0)
  318. break;
  319. udelay(100);
  320. }
  321. } else {
  322. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  323. udelay(10);
  324. }
  325. /* Select FPM registers. */
  326. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  327. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  328. /* FPM Soft Reset. */
  329. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  330. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  331. /* Toggle Fpm Reset. */
  332. if (!IS_QLA2200(ha)) {
  333. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  334. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  335. }
  336. /* Select frame buffer registers. */
  337. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  338. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  339. /* Reset frame buffer FIFOs. */
  340. if (IS_QLA2200(ha)) {
  341. WRT_FB_CMD_REG(ha, reg, 0xa000);
  342. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  343. } else {
  344. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  345. /* Read back fb_cmd until zero or 3 seconds max */
  346. for (cnt = 0; cnt < 3000; cnt++) {
  347. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  348. break;
  349. udelay(100);
  350. }
  351. }
  352. /* Select RISC module registers. */
  353. WRT_REG_WORD(&reg->ctrl_status, 0);
  354. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  355. /* Reset RISC processor. */
  356. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  357. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  358. /* Release RISC processor. */
  359. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  360. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  361. }
  362. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  363. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  364. /* Reset ISP chip. */
  365. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  366. /* Wait for RISC to recover from reset. */
  367. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  368. /*
  369. * It is necessary to for a delay here since the card doesn't
  370. * respond to PCI reads during a reset. On some architectures
  371. * this will result in an MCA.
  372. */
  373. udelay(20);
  374. for (cnt = 30000; cnt; cnt--) {
  375. if ((RD_REG_WORD(&reg->ctrl_status) &
  376. CSR_ISP_SOFT_RESET) == 0)
  377. break;
  378. udelay(100);
  379. }
  380. } else
  381. udelay(10);
  382. /* Reset RISC processor. */
  383. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  384. WRT_REG_WORD(&reg->semaphore, 0);
  385. /* Release RISC processor. */
  386. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  387. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  388. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  389. for (cnt = 0; cnt < 30000; cnt++) {
  390. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  391. break;
  392. udelay(100);
  393. }
  394. } else
  395. udelay(100);
  396. /* Turn on master enable */
  397. cmd |= PCI_COMMAND_MASTER;
  398. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  399. /* Disable RISC pause on FPM parity error. */
  400. if (!IS_QLA2100(ha)) {
  401. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  402. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  403. }
  404. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  405. }
  406. /**
  407. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  408. * @ha: HA context
  409. *
  410. * Returns 0 on success.
  411. */
  412. static inline void
  413. qla24xx_reset_risc(scsi_qla_host_t *ha)
  414. {
  415. int hw_evt = 0;
  416. unsigned long flags = 0;
  417. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  418. uint32_t cnt, d2;
  419. uint16_t wd;
  420. spin_lock_irqsave(&ha->hardware_lock, flags);
  421. /* Reset RISC. */
  422. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  423. for (cnt = 0; cnt < 30000; cnt++) {
  424. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  425. break;
  426. udelay(10);
  427. }
  428. WRT_REG_DWORD(&reg->ctrl_status,
  429. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  430. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  431. udelay(100);
  432. /* Wait for firmware to complete NVRAM accesses. */
  433. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  434. for (cnt = 10000 ; cnt && d2; cnt--) {
  435. udelay(5);
  436. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  437. barrier();
  438. }
  439. if (cnt == 0)
  440. hw_evt = 1;
  441. /* Wait for soft-reset to complete. */
  442. d2 = RD_REG_DWORD(&reg->ctrl_status);
  443. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  444. udelay(5);
  445. d2 = RD_REG_DWORD(&reg->ctrl_status);
  446. barrier();
  447. }
  448. if (cnt == 0 || hw_evt)
  449. qla2xxx_hw_event_log(ha, HW_EVENT_RESET_ERR,
  450. RD_REG_WORD(&reg->mailbox1), RD_REG_WORD(&reg->mailbox2),
  451. RD_REG_WORD(&reg->mailbox3));
  452. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  453. RD_REG_DWORD(&reg->hccr);
  454. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  455. RD_REG_DWORD(&reg->hccr);
  456. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  457. RD_REG_DWORD(&reg->hccr);
  458. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  459. for (cnt = 6000000 ; cnt && d2; cnt--) {
  460. udelay(5);
  461. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  462. barrier();
  463. }
  464. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  465. }
  466. /**
  467. * qla24xx_reset_chip() - Reset ISP24xx chip.
  468. * @ha: HA context
  469. *
  470. * Returns 0 on success.
  471. */
  472. void
  473. qla24xx_reset_chip(scsi_qla_host_t *ha)
  474. {
  475. ha->isp_ops->disable_intrs(ha);
  476. /* Perform RISC reset. */
  477. qla24xx_reset_risc(ha);
  478. }
  479. /**
  480. * qla2x00_chip_diag() - Test chip for proper operation.
  481. * @ha: HA context
  482. *
  483. * Returns 0 on success.
  484. */
  485. int
  486. qla2x00_chip_diag(scsi_qla_host_t *ha)
  487. {
  488. int rval;
  489. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  490. unsigned long flags = 0;
  491. uint16_t data;
  492. uint32_t cnt;
  493. uint16_t mb[5];
  494. /* Assume a failed state */
  495. rval = QLA_FUNCTION_FAILED;
  496. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  497. ha->host_no, (u_long)&reg->flash_address));
  498. spin_lock_irqsave(&ha->hardware_lock, flags);
  499. /* Reset ISP chip. */
  500. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  501. /*
  502. * We need to have a delay here since the card will not respond while
  503. * in reset causing an MCA on some architectures.
  504. */
  505. udelay(20);
  506. data = qla2x00_debounce_register(&reg->ctrl_status);
  507. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  508. udelay(5);
  509. data = RD_REG_WORD(&reg->ctrl_status);
  510. barrier();
  511. }
  512. if (!cnt)
  513. goto chip_diag_failed;
  514. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  515. ha->host_no));
  516. /* Reset RISC processor. */
  517. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  518. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  519. /* Workaround for QLA2312 PCI parity error */
  520. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  521. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  522. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  523. udelay(5);
  524. data = RD_MAILBOX_REG(ha, reg, 0);
  525. barrier();
  526. }
  527. } else
  528. udelay(10);
  529. if (!cnt)
  530. goto chip_diag_failed;
  531. /* Check product ID of chip */
  532. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no));
  533. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  534. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  535. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  536. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  537. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  538. mb[3] != PROD_ID_3) {
  539. qla_printk(KERN_WARNING, ha,
  540. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  541. goto chip_diag_failed;
  542. }
  543. ha->product_id[0] = mb[1];
  544. ha->product_id[1] = mb[2];
  545. ha->product_id[2] = mb[3];
  546. ha->product_id[3] = mb[4];
  547. /* Adjust fw RISC transfer size */
  548. if (ha->request_q_length > 1024)
  549. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  550. else
  551. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  552. ha->request_q_length;
  553. if (IS_QLA2200(ha) &&
  554. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  555. /* Limit firmware transfer size with a 2200A */
  556. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  557. ha->host_no));
  558. ha->device_type |= DT_ISP2200A;
  559. ha->fw_transfer_size = 128;
  560. }
  561. /* Wrap Incoming Mailboxes Test. */
  562. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  563. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", ha->host_no));
  564. rval = qla2x00_mbx_reg_test(ha);
  565. if (rval) {
  566. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  567. ha->host_no));
  568. qla_printk(KERN_WARNING, ha,
  569. "Failed mailbox send register test\n");
  570. }
  571. else {
  572. /* Flag a successful rval */
  573. rval = QLA_SUCCESS;
  574. }
  575. spin_lock_irqsave(&ha->hardware_lock, flags);
  576. chip_diag_failed:
  577. if (rval)
  578. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  579. "****\n", ha->host_no));
  580. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  581. return (rval);
  582. }
  583. /**
  584. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  585. * @ha: HA context
  586. *
  587. * Returns 0 on success.
  588. */
  589. int
  590. qla24xx_chip_diag(scsi_qla_host_t *ha)
  591. {
  592. int rval;
  593. /* Perform RISC reset. */
  594. qla24xx_reset_risc(ha);
  595. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  596. rval = qla2x00_mbx_reg_test(ha);
  597. if (rval) {
  598. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  599. ha->host_no));
  600. qla_printk(KERN_WARNING, ha,
  601. "Failed mailbox send register test\n");
  602. } else {
  603. /* Flag a successful rval */
  604. rval = QLA_SUCCESS;
  605. }
  606. return rval;
  607. }
  608. void
  609. qla2x00_alloc_fw_dump(scsi_qla_host_t *ha)
  610. {
  611. int rval;
  612. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  613. eft_size, fce_size;
  614. dma_addr_t tc_dma;
  615. void *tc;
  616. if (ha->fw_dump) {
  617. qla_printk(KERN_WARNING, ha,
  618. "Firmware dump previously allocated.\n");
  619. return;
  620. }
  621. ha->fw_dumped = 0;
  622. fixed_size = mem_size = eft_size = fce_size = 0;
  623. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  624. fixed_size = sizeof(struct qla2100_fw_dump);
  625. } else if (IS_QLA23XX(ha)) {
  626. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  627. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  628. sizeof(uint16_t);
  629. } else if (IS_FWI2_CAPABLE(ha)) {
  630. fixed_size = IS_QLA25XX(ha) ?
  631. offsetof(struct qla25xx_fw_dump, ext_mem):
  632. offsetof(struct qla24xx_fw_dump, ext_mem);
  633. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  634. sizeof(uint32_t);
  635. /* Allocate memory for Extended Trace Buffer. */
  636. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  637. GFP_KERNEL);
  638. if (!tc) {
  639. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  640. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  641. goto cont_alloc;
  642. }
  643. memset(tc, 0, EFT_SIZE);
  644. rval = qla2x00_enable_eft_trace(ha, tc_dma, EFT_NUM_BUFFERS);
  645. if (rval) {
  646. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  647. "EFT (%d).\n", rval);
  648. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  649. tc_dma);
  650. goto cont_alloc;
  651. }
  652. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  653. EFT_SIZE / 1024);
  654. eft_size = EFT_SIZE;
  655. ha->eft_dma = tc_dma;
  656. ha->eft = tc;
  657. /* Allocate memory for Fibre Channel Event Buffer. */
  658. if (!IS_QLA25XX(ha))
  659. goto cont_alloc;
  660. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  661. GFP_KERNEL);
  662. if (!tc) {
  663. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  664. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  665. goto cont_alloc;
  666. }
  667. memset(tc, 0, FCE_SIZE);
  668. rval = qla2x00_enable_fce_trace(ha, tc_dma, FCE_NUM_BUFFERS,
  669. ha->fce_mb, &ha->fce_bufs);
  670. if (rval) {
  671. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  672. "FCE (%d).\n", rval);
  673. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  674. tc_dma);
  675. ha->flags.fce_enabled = 0;
  676. goto cont_alloc;
  677. }
  678. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  679. FCE_SIZE / 1024);
  680. fce_size = sizeof(struct qla2xxx_fce_chain) + EFT_SIZE;
  681. ha->flags.fce_enabled = 1;
  682. ha->fce_dma = tc_dma;
  683. ha->fce = tc;
  684. }
  685. cont_alloc:
  686. req_q_size = ha->request_q_length * sizeof(request_t);
  687. rsp_q_size = ha->response_q_length * sizeof(response_t);
  688. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  689. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size +
  690. eft_size + fce_size;
  691. ha->fw_dump = vmalloc(dump_size);
  692. if (!ha->fw_dump) {
  693. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  694. "firmware dump!!!\n", dump_size / 1024);
  695. if (ha->eft) {
  696. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  697. ha->eft_dma);
  698. ha->eft = NULL;
  699. ha->eft_dma = 0;
  700. }
  701. return;
  702. }
  703. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  704. dump_size / 1024);
  705. ha->fw_dump_len = dump_size;
  706. ha->fw_dump->signature[0] = 'Q';
  707. ha->fw_dump->signature[1] = 'L';
  708. ha->fw_dump->signature[2] = 'G';
  709. ha->fw_dump->signature[3] = 'C';
  710. ha->fw_dump->version = __constant_htonl(1);
  711. ha->fw_dump->fixed_size = htonl(fixed_size);
  712. ha->fw_dump->mem_size = htonl(mem_size);
  713. ha->fw_dump->req_q_size = htonl(req_q_size);
  714. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  715. ha->fw_dump->eft_size = htonl(eft_size);
  716. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  717. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  718. ha->fw_dump->header_size =
  719. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  720. }
  721. /**
  722. * qla2x00_resize_request_q() - Resize request queue given available ISP memory.
  723. * @ha: HA context
  724. *
  725. * Returns 0 on success.
  726. */
  727. static void
  728. qla2x00_resize_request_q(scsi_qla_host_t *ha)
  729. {
  730. int rval;
  731. uint16_t fw_iocb_cnt = 0;
  732. uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM;
  733. dma_addr_t request_dma;
  734. request_t *request_ring;
  735. /* Valid only on recent ISPs. */
  736. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  737. return;
  738. /* Retrieve IOCB counts available to the firmware. */
  739. rval = qla2x00_get_resource_cnts(ha, NULL, NULL, NULL, &fw_iocb_cnt,
  740. &ha->max_npiv_vports);
  741. if (rval)
  742. return;
  743. /* No point in continuing if current settings are sufficient. */
  744. if (fw_iocb_cnt < 1024)
  745. return;
  746. if (ha->request_q_length >= request_q_length)
  747. return;
  748. /* Attempt to claim larger area for request queue. */
  749. request_ring = dma_alloc_coherent(&ha->pdev->dev,
  750. (request_q_length + 1) * sizeof(request_t), &request_dma,
  751. GFP_KERNEL);
  752. if (request_ring == NULL)
  753. return;
  754. /* Resize successful, report extensions. */
  755. qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n",
  756. (ha->fw_memory_size + 1) / 1024);
  757. qla_printk(KERN_INFO, ha, "Resizing request queue depth "
  758. "(%d -> %d)...\n", ha->request_q_length, request_q_length);
  759. /* Clear old allocations. */
  760. dma_free_coherent(&ha->pdev->dev,
  761. (ha->request_q_length + 1) * sizeof(request_t), ha->request_ring,
  762. ha->request_dma);
  763. /* Begin using larger queue. */
  764. ha->request_q_length = request_q_length;
  765. ha->request_ring = request_ring;
  766. ha->request_dma = request_dma;
  767. }
  768. /**
  769. * qla2x00_setup_chip() - Load and start RISC firmware.
  770. * @ha: HA context
  771. *
  772. * Returns 0 on success.
  773. */
  774. static int
  775. qla2x00_setup_chip(scsi_qla_host_t *ha)
  776. {
  777. int rval;
  778. uint32_t srisc_address = 0;
  779. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  780. unsigned long flags;
  781. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  782. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  783. spin_lock_irqsave(&ha->hardware_lock, flags);
  784. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  785. RD_REG_WORD(&reg->hccr);
  786. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  787. }
  788. /* Load firmware sequences */
  789. rval = ha->isp_ops->load_risc(ha, &srisc_address);
  790. if (rval == QLA_SUCCESS) {
  791. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  792. "code.\n", ha->host_no));
  793. rval = qla2x00_verify_checksum(ha, srisc_address);
  794. if (rval == QLA_SUCCESS) {
  795. /* Start firmware execution. */
  796. DEBUG(printk("scsi(%ld): Checksum OK, start "
  797. "firmware.\n", ha->host_no));
  798. rval = qla2x00_execute_fw(ha, srisc_address);
  799. /* Retrieve firmware information. */
  800. if (rval == QLA_SUCCESS && ha->fw_major_version == 0) {
  801. qla2x00_get_fw_version(ha,
  802. &ha->fw_major_version,
  803. &ha->fw_minor_version,
  804. &ha->fw_subminor_version,
  805. &ha->fw_attributes, &ha->fw_memory_size);
  806. qla2x00_resize_request_q(ha);
  807. ha->flags.npiv_supported = 0;
  808. if ((IS_QLA24XX(ha) || IS_QLA25XX(ha)) &&
  809. (ha->fw_attributes & BIT_2)) {
  810. ha->flags.npiv_supported = 1;
  811. if ((!ha->max_npiv_vports) ||
  812. ((ha->max_npiv_vports + 1) %
  813. MIN_MULTI_ID_FABRIC))
  814. ha->max_npiv_vports =
  815. MIN_MULTI_ID_FABRIC - 1;
  816. }
  817. if (ql2xallocfwdump)
  818. qla2x00_alloc_fw_dump(ha);
  819. }
  820. } else {
  821. DEBUG2(printk(KERN_INFO
  822. "scsi(%ld): ISP Firmware failed checksum.\n",
  823. ha->host_no));
  824. }
  825. }
  826. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  827. /* Enable proper parity. */
  828. spin_lock_irqsave(&ha->hardware_lock, flags);
  829. if (IS_QLA2300(ha))
  830. /* SRAM parity */
  831. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  832. else
  833. /* SRAM, Instruction RAM and GP RAM parity */
  834. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  835. RD_REG_WORD(&reg->hccr);
  836. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  837. }
  838. if (rval) {
  839. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  840. ha->host_no));
  841. }
  842. return (rval);
  843. }
  844. /**
  845. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  846. * @ha: HA context
  847. *
  848. * Beginning of request ring has initialization control block already built
  849. * by nvram config routine.
  850. *
  851. * Returns 0 on success.
  852. */
  853. static void
  854. qla2x00_init_response_q_entries(scsi_qla_host_t *ha)
  855. {
  856. uint16_t cnt;
  857. response_t *pkt;
  858. pkt = ha->response_ring_ptr;
  859. for (cnt = 0; cnt < ha->response_q_length; cnt++) {
  860. pkt->signature = RESPONSE_PROCESSED;
  861. pkt++;
  862. }
  863. }
  864. /**
  865. * qla2x00_update_fw_options() - Read and process firmware options.
  866. * @ha: HA context
  867. *
  868. * Returns 0 on success.
  869. */
  870. void
  871. qla2x00_update_fw_options(scsi_qla_host_t *ha)
  872. {
  873. uint16_t swing, emphasis, tx_sens, rx_sens;
  874. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  875. qla2x00_get_fw_options(ha, ha->fw_options);
  876. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  877. return;
  878. /* Serial Link options. */
  879. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  880. ha->host_no));
  881. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  882. sizeof(ha->fw_seriallink_options)));
  883. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  884. if (ha->fw_seriallink_options[3] & BIT_2) {
  885. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  886. /* 1G settings */
  887. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  888. emphasis = (ha->fw_seriallink_options[2] &
  889. (BIT_4 | BIT_3)) >> 3;
  890. tx_sens = ha->fw_seriallink_options[0] &
  891. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  892. rx_sens = (ha->fw_seriallink_options[0] &
  893. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  894. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  895. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  896. if (rx_sens == 0x0)
  897. rx_sens = 0x3;
  898. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  899. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  900. ha->fw_options[10] |= BIT_5 |
  901. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  902. (tx_sens & (BIT_1 | BIT_0));
  903. /* 2G settings */
  904. swing = (ha->fw_seriallink_options[2] &
  905. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  906. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  907. tx_sens = ha->fw_seriallink_options[1] &
  908. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  909. rx_sens = (ha->fw_seriallink_options[1] &
  910. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  911. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  912. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  913. if (rx_sens == 0x0)
  914. rx_sens = 0x3;
  915. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  916. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  917. ha->fw_options[11] |= BIT_5 |
  918. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  919. (tx_sens & (BIT_1 | BIT_0));
  920. }
  921. /* FCP2 options. */
  922. /* Return command IOCBs without waiting for an ABTS to complete. */
  923. ha->fw_options[3] |= BIT_13;
  924. /* LED scheme. */
  925. if (ha->flags.enable_led_scheme)
  926. ha->fw_options[2] |= BIT_12;
  927. /* Detect ISP6312. */
  928. if (IS_QLA6312(ha))
  929. ha->fw_options[2] |= BIT_13;
  930. /* Update firmware options. */
  931. qla2x00_set_fw_options(ha, ha->fw_options);
  932. }
  933. void
  934. qla24xx_update_fw_options(scsi_qla_host_t *ha)
  935. {
  936. int rval;
  937. /* Update Serial Link options. */
  938. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  939. return;
  940. rval = qla2x00_set_serdes_params(ha,
  941. le16_to_cpu(ha->fw_seriallink_options24[1]),
  942. le16_to_cpu(ha->fw_seriallink_options24[2]),
  943. le16_to_cpu(ha->fw_seriallink_options24[3]));
  944. if (rval != QLA_SUCCESS) {
  945. qla_printk(KERN_WARNING, ha,
  946. "Unable to update Serial Link options (%x).\n", rval);
  947. }
  948. }
  949. void
  950. qla2x00_config_rings(struct scsi_qla_host *ha)
  951. {
  952. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  953. /* Setup ring parameters in initialization control block. */
  954. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  955. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  956. ha->init_cb->request_q_length = cpu_to_le16(ha->request_q_length);
  957. ha->init_cb->response_q_length = cpu_to_le16(ha->response_q_length);
  958. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  959. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  960. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  961. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  962. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  963. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  964. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  965. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  966. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  967. }
  968. void
  969. qla24xx_config_rings(struct scsi_qla_host *ha)
  970. {
  971. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  972. struct init_cb_24xx *icb;
  973. /* Setup ring parameters in initialization control block. */
  974. icb = (struct init_cb_24xx *)ha->init_cb;
  975. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  976. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  977. icb->request_q_length = cpu_to_le16(ha->request_q_length);
  978. icb->response_q_length = cpu_to_le16(ha->response_q_length);
  979. icb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  980. icb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  981. icb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  982. icb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  983. WRT_REG_DWORD(&reg->req_q_in, 0);
  984. WRT_REG_DWORD(&reg->req_q_out, 0);
  985. WRT_REG_DWORD(&reg->rsp_q_in, 0);
  986. WRT_REG_DWORD(&reg->rsp_q_out, 0);
  987. RD_REG_DWORD(&reg->rsp_q_out);
  988. }
  989. /**
  990. * qla2x00_init_rings() - Initializes firmware.
  991. * @ha: HA context
  992. *
  993. * Beginning of request ring has initialization control block already built
  994. * by nvram config routine.
  995. *
  996. * Returns 0 on success.
  997. */
  998. static int
  999. qla2x00_init_rings(scsi_qla_host_t *ha)
  1000. {
  1001. int rval;
  1002. unsigned long flags = 0;
  1003. int cnt;
  1004. struct mid_init_cb_24xx *mid_init_cb =
  1005. (struct mid_init_cb_24xx *) ha->init_cb;
  1006. spin_lock_irqsave(&ha->hardware_lock, flags);
  1007. /* Clear outstanding commands array. */
  1008. for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1009. ha->outstanding_cmds[cnt] = NULL;
  1010. ha->current_outstanding_cmd = 0;
  1011. /* Clear RSCN queue. */
  1012. ha->rscn_in_ptr = 0;
  1013. ha->rscn_out_ptr = 0;
  1014. /* Initialize firmware. */
  1015. ha->request_ring_ptr = ha->request_ring;
  1016. ha->req_ring_index = 0;
  1017. ha->req_q_cnt = ha->request_q_length;
  1018. ha->response_ring_ptr = ha->response_ring;
  1019. ha->rsp_ring_index = 0;
  1020. /* Initialize response queue entries */
  1021. qla2x00_init_response_q_entries(ha);
  1022. ha->isp_ops->config_rings(ha);
  1023. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1024. /* Update any ISP specific firmware options before initialization. */
  1025. ha->isp_ops->update_fw_options(ha);
  1026. DEBUG(printk("scsi(%ld): Issue init firmware.\n", ha->host_no));
  1027. if (ha->flags.npiv_supported)
  1028. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1029. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1030. rval = qla2x00_init_firmware(ha, ha->init_cb_size);
  1031. if (rval) {
  1032. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1033. ha->host_no));
  1034. } else {
  1035. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1036. ha->host_no));
  1037. }
  1038. return (rval);
  1039. }
  1040. /**
  1041. * qla2x00_fw_ready() - Waits for firmware ready.
  1042. * @ha: HA context
  1043. *
  1044. * Returns 0 on success.
  1045. */
  1046. static int
  1047. qla2x00_fw_ready(scsi_qla_host_t *ha)
  1048. {
  1049. int rval;
  1050. unsigned long wtime, mtime, cs84xx_time;
  1051. uint16_t min_wait; /* Minimum wait time if loop is down */
  1052. uint16_t wait_time; /* Wait time if loop is coming ready */
  1053. uint16_t state[3];
  1054. rval = QLA_SUCCESS;
  1055. /* 20 seconds for loop down. */
  1056. min_wait = 20;
  1057. /*
  1058. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1059. * our own processing.
  1060. */
  1061. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1062. wait_time = min_wait;
  1063. }
  1064. /* Min wait time if loop down */
  1065. mtime = jiffies + (min_wait * HZ);
  1066. /* wait time before firmware ready */
  1067. wtime = jiffies + (wait_time * HZ);
  1068. /* Wait for ISP to finish LIP */
  1069. if (!ha->flags.init_done)
  1070. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1071. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1072. ha->host_no));
  1073. do {
  1074. rval = qla2x00_get_firmware_state(ha, state);
  1075. if (rval == QLA_SUCCESS) {
  1076. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1077. ha->device_flags &= ~DFLG_NO_CABLE;
  1078. }
  1079. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1080. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1081. "84xx=%x.\n", ha->host_no, state[0],
  1082. state[2]));
  1083. if ((state[2] & FSTATE_LOGGED_IN) &&
  1084. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1085. DEBUG16(printk("scsi(%ld): Sending "
  1086. "verify iocb.\n", ha->host_no));
  1087. cs84xx_time = jiffies;
  1088. rval = qla84xx_init_chip(ha);
  1089. if (rval != QLA_SUCCESS)
  1090. break;
  1091. /* Add time taken to initialize. */
  1092. cs84xx_time = jiffies - cs84xx_time;
  1093. wtime += cs84xx_time;
  1094. mtime += cs84xx_time;
  1095. DEBUG16(printk("scsi(%ld): Increasing "
  1096. "wait time by %ld. New time %ld\n",
  1097. ha->host_no, cs84xx_time, wtime));
  1098. }
  1099. } else if (state[0] == FSTATE_READY) {
  1100. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1101. ha->host_no));
  1102. qla2x00_get_retry_cnt(ha, &ha->retry_count,
  1103. &ha->login_timeout, &ha->r_a_tov);
  1104. rval = QLA_SUCCESS;
  1105. break;
  1106. }
  1107. rval = QLA_FUNCTION_FAILED;
  1108. if (atomic_read(&ha->loop_down_timer) &&
  1109. state[0] != FSTATE_READY) {
  1110. /* Loop down. Timeout on min_wait for states
  1111. * other than Wait for Login.
  1112. */
  1113. if (time_after_eq(jiffies, mtime)) {
  1114. qla_printk(KERN_INFO, ha,
  1115. "Cable is unplugged...\n");
  1116. ha->device_flags |= DFLG_NO_CABLE;
  1117. break;
  1118. }
  1119. }
  1120. } else {
  1121. /* Mailbox cmd failed. Timeout on min_wait. */
  1122. if (time_after_eq(jiffies, mtime))
  1123. break;
  1124. }
  1125. if (time_after_eq(jiffies, wtime))
  1126. break;
  1127. /* Delay for a while */
  1128. msleep(500);
  1129. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1130. ha->host_no, state[0], jiffies));
  1131. } while (1);
  1132. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1133. ha->host_no, state[0], jiffies));
  1134. if (rval) {
  1135. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1136. ha->host_no));
  1137. }
  1138. return (rval);
  1139. }
  1140. /*
  1141. * qla2x00_configure_hba
  1142. * Setup adapter context.
  1143. *
  1144. * Input:
  1145. * ha = adapter state pointer.
  1146. *
  1147. * Returns:
  1148. * 0 = success
  1149. *
  1150. * Context:
  1151. * Kernel context.
  1152. */
  1153. static int
  1154. qla2x00_configure_hba(scsi_qla_host_t *ha)
  1155. {
  1156. int rval;
  1157. uint16_t loop_id;
  1158. uint16_t topo;
  1159. uint16_t sw_cap;
  1160. uint8_t al_pa;
  1161. uint8_t area;
  1162. uint8_t domain;
  1163. char connect_type[22];
  1164. /* Get host addresses. */
  1165. rval = qla2x00_get_adapter_id(ha,
  1166. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1167. if (rval != QLA_SUCCESS) {
  1168. if (LOOP_TRANSITION(ha) || atomic_read(&ha->loop_down_timer) ||
  1169. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1170. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1171. __func__, ha->host_no));
  1172. } else {
  1173. qla_printk(KERN_WARNING, ha,
  1174. "ERROR -- Unable to get host loop ID.\n");
  1175. set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  1176. }
  1177. return (rval);
  1178. }
  1179. if (topo == 4) {
  1180. qla_printk(KERN_INFO, ha,
  1181. "Cannot get topology - retrying.\n");
  1182. return (QLA_FUNCTION_FAILED);
  1183. }
  1184. ha->loop_id = loop_id;
  1185. /* initialize */
  1186. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1187. ha->operating_mode = LOOP;
  1188. ha->switch_cap = 0;
  1189. switch (topo) {
  1190. case 0:
  1191. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1192. ha->host_no));
  1193. ha->current_topology = ISP_CFG_NL;
  1194. strcpy(connect_type, "(Loop)");
  1195. break;
  1196. case 1:
  1197. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1198. ha->host_no));
  1199. ha->switch_cap = sw_cap;
  1200. ha->current_topology = ISP_CFG_FL;
  1201. strcpy(connect_type, "(FL_Port)");
  1202. break;
  1203. case 2:
  1204. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1205. ha->host_no));
  1206. ha->operating_mode = P2P;
  1207. ha->current_topology = ISP_CFG_N;
  1208. strcpy(connect_type, "(N_Port-to-N_Port)");
  1209. break;
  1210. case 3:
  1211. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1212. ha->host_no));
  1213. ha->switch_cap = sw_cap;
  1214. ha->operating_mode = P2P;
  1215. ha->current_topology = ISP_CFG_F;
  1216. strcpy(connect_type, "(F_Port)");
  1217. break;
  1218. default:
  1219. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1220. "Using NL.\n",
  1221. ha->host_no, topo));
  1222. ha->current_topology = ISP_CFG_NL;
  1223. strcpy(connect_type, "(Loop)");
  1224. break;
  1225. }
  1226. /* Save Host port and loop ID. */
  1227. /* byte order - Big Endian */
  1228. ha->d_id.b.domain = domain;
  1229. ha->d_id.b.area = area;
  1230. ha->d_id.b.al_pa = al_pa;
  1231. if (!ha->flags.init_done)
  1232. qla_printk(KERN_INFO, ha,
  1233. "Topology - %s, Host Loop address 0x%x\n",
  1234. connect_type, ha->loop_id);
  1235. if (rval) {
  1236. DEBUG2_3(printk("scsi(%ld): FAILED.\n", ha->host_no));
  1237. } else {
  1238. DEBUG3(printk("scsi(%ld): exiting normally.\n", ha->host_no));
  1239. }
  1240. return(rval);
  1241. }
  1242. static inline void
  1243. qla2x00_set_model_info(scsi_qla_host_t *ha, uint8_t *model, size_t len, char *def)
  1244. {
  1245. char *st, *en;
  1246. uint16_t index;
  1247. if (memcmp(model, BINZERO, len) != 0) {
  1248. strncpy(ha->model_number, model, len);
  1249. st = en = ha->model_number;
  1250. en += len - 1;
  1251. while (en > st) {
  1252. if (*en != 0x20 && *en != 0x00)
  1253. break;
  1254. *en-- = '\0';
  1255. }
  1256. index = (ha->pdev->subsystem_device & 0xff);
  1257. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1258. index < QLA_MODEL_NAMES)
  1259. ha->model_desc = qla2x00_model_name[index * 2 + 1];
  1260. } else {
  1261. index = (ha->pdev->subsystem_device & 0xff);
  1262. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1263. index < QLA_MODEL_NAMES) {
  1264. strcpy(ha->model_number,
  1265. qla2x00_model_name[index * 2]);
  1266. ha->model_desc = qla2x00_model_name[index * 2 + 1];
  1267. } else {
  1268. strcpy(ha->model_number, def);
  1269. }
  1270. }
  1271. }
  1272. /* On sparc systems, obtain port and node WWN from firmware
  1273. * properties.
  1274. */
  1275. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *ha, nvram_t *nv)
  1276. {
  1277. #ifdef CONFIG_SPARC
  1278. struct pci_dev *pdev = ha->pdev;
  1279. struct device_node *dp = pci_device_to_OF_node(pdev);
  1280. const u8 *val;
  1281. int len;
  1282. val = of_get_property(dp, "port-wwn", &len);
  1283. if (val && len >= WWN_SIZE)
  1284. memcpy(nv->port_name, val, WWN_SIZE);
  1285. val = of_get_property(dp, "node-wwn", &len);
  1286. if (val && len >= WWN_SIZE)
  1287. memcpy(nv->node_name, val, WWN_SIZE);
  1288. #endif
  1289. }
  1290. /*
  1291. * NVRAM configuration for ISP 2xxx
  1292. *
  1293. * Input:
  1294. * ha = adapter block pointer.
  1295. *
  1296. * Output:
  1297. * initialization control block in response_ring
  1298. * host adapters parameters in host adapter block
  1299. *
  1300. * Returns:
  1301. * 0 = success.
  1302. */
  1303. int
  1304. qla2x00_nvram_config(scsi_qla_host_t *ha)
  1305. {
  1306. int rval;
  1307. uint8_t chksum = 0;
  1308. uint16_t cnt;
  1309. uint8_t *dptr1, *dptr2;
  1310. init_cb_t *icb = ha->init_cb;
  1311. nvram_t *nv = ha->nvram;
  1312. uint8_t *ptr = ha->nvram;
  1313. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1314. rval = QLA_SUCCESS;
  1315. /* Determine NVRAM starting address. */
  1316. ha->nvram_size = sizeof(nvram_t);
  1317. ha->nvram_base = 0;
  1318. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1319. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1320. ha->nvram_base = 0x80;
  1321. /* Get NVRAM data and calculate checksum. */
  1322. ha->isp_ops->read_nvram(ha, ptr, ha->nvram_base, ha->nvram_size);
  1323. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1324. chksum += *ptr++;
  1325. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  1326. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1327. /* Bad NVRAM data, set defaults parameters. */
  1328. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1329. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1330. /* Reset NVRAM data. */
  1331. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1332. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1333. nv->nvram_version);
  1334. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1335. "invalid -- WWPN) defaults.\n");
  1336. if (chksum)
  1337. qla2xxx_hw_event_log(ha, HW_EVENT_NVRAM_CHKSUM_ERR, 0,
  1338. MSW(chksum), LSW(chksum));
  1339. /*
  1340. * Set default initialization control block.
  1341. */
  1342. memset(nv, 0, ha->nvram_size);
  1343. nv->parameter_block_version = ICB_VERSION;
  1344. if (IS_QLA23XX(ha)) {
  1345. nv->firmware_options[0] = BIT_2 | BIT_1;
  1346. nv->firmware_options[1] = BIT_7 | BIT_5;
  1347. nv->add_firmware_options[0] = BIT_5;
  1348. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1349. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1350. nv->special_options[1] = BIT_7;
  1351. } else if (IS_QLA2200(ha)) {
  1352. nv->firmware_options[0] = BIT_2 | BIT_1;
  1353. nv->firmware_options[1] = BIT_7 | BIT_5;
  1354. nv->add_firmware_options[0] = BIT_5;
  1355. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1356. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1357. } else if (IS_QLA2100(ha)) {
  1358. nv->firmware_options[0] = BIT_3 | BIT_1;
  1359. nv->firmware_options[1] = BIT_5;
  1360. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1361. }
  1362. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1363. nv->execution_throttle = __constant_cpu_to_le16(16);
  1364. nv->retry_count = 8;
  1365. nv->retry_delay = 1;
  1366. nv->port_name[0] = 33;
  1367. nv->port_name[3] = 224;
  1368. nv->port_name[4] = 139;
  1369. qla2xxx_nvram_wwn_from_ofw(ha, nv);
  1370. nv->login_timeout = 4;
  1371. /*
  1372. * Set default host adapter parameters
  1373. */
  1374. nv->host_p[1] = BIT_2;
  1375. nv->reset_delay = 5;
  1376. nv->port_down_retry_count = 8;
  1377. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1378. nv->link_down_timeout = 60;
  1379. rval = 1;
  1380. }
  1381. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1382. /*
  1383. * The SN2 does not provide BIOS emulation which means you can't change
  1384. * potentially bogus BIOS settings. Force the use of default settings
  1385. * for link rate and frame size. Hope that the rest of the settings
  1386. * are valid.
  1387. */
  1388. if (ia64_platform_is("sn2")) {
  1389. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1390. if (IS_QLA23XX(ha))
  1391. nv->special_options[1] = BIT_7;
  1392. }
  1393. #endif
  1394. /* Reset Initialization control block */
  1395. memset(icb, 0, ha->init_cb_size);
  1396. /*
  1397. * Setup driver NVRAM options.
  1398. */
  1399. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1400. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1401. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1402. nv->firmware_options[1] &= ~BIT_4;
  1403. if (IS_QLA23XX(ha)) {
  1404. nv->firmware_options[0] |= BIT_2;
  1405. nv->firmware_options[0] &= ~BIT_3;
  1406. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1407. if (IS_QLA2300(ha)) {
  1408. if (ha->fb_rev == FPM_2310) {
  1409. strcpy(ha->model_number, "QLA2310");
  1410. } else {
  1411. strcpy(ha->model_number, "QLA2300");
  1412. }
  1413. } else {
  1414. qla2x00_set_model_info(ha, nv->model_number,
  1415. sizeof(nv->model_number), "QLA23xx");
  1416. }
  1417. } else if (IS_QLA2200(ha)) {
  1418. nv->firmware_options[0] |= BIT_2;
  1419. /*
  1420. * 'Point-to-point preferred, else loop' is not a safe
  1421. * connection mode setting.
  1422. */
  1423. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1424. (BIT_5 | BIT_4)) {
  1425. /* Force 'loop preferred, else point-to-point'. */
  1426. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1427. nv->add_firmware_options[0] |= BIT_5;
  1428. }
  1429. strcpy(ha->model_number, "QLA22xx");
  1430. } else /*if (IS_QLA2100(ha))*/ {
  1431. strcpy(ha->model_number, "QLA2100");
  1432. }
  1433. /*
  1434. * Copy over NVRAM RISC parameter block to initialization control block.
  1435. */
  1436. dptr1 = (uint8_t *)icb;
  1437. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1438. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1439. while (cnt--)
  1440. *dptr1++ = *dptr2++;
  1441. /* Copy 2nd half. */
  1442. dptr1 = (uint8_t *)icb->add_firmware_options;
  1443. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1444. while (cnt--)
  1445. *dptr1++ = *dptr2++;
  1446. /* Use alternate WWN? */
  1447. if (nv->host_p[1] & BIT_7) {
  1448. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1449. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1450. }
  1451. /* Prepare nodename */
  1452. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1453. /*
  1454. * Firmware will apply the following mask if the nodename was
  1455. * not provided.
  1456. */
  1457. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1458. icb->node_name[0] &= 0xF0;
  1459. }
  1460. /*
  1461. * Set host adapter parameters.
  1462. */
  1463. if (nv->host_p[0] & BIT_7)
  1464. ql2xextended_error_logging = 1;
  1465. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1466. /* Always load RISC code on non ISP2[12]00 chips. */
  1467. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1468. ha->flags.disable_risc_code_load = 0;
  1469. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1470. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1471. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1472. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1473. ha->flags.disable_serdes = 0;
  1474. ha->operating_mode =
  1475. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1476. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1477. sizeof(ha->fw_seriallink_options));
  1478. /* save HBA serial number */
  1479. ha->serial0 = icb->port_name[5];
  1480. ha->serial1 = icb->port_name[6];
  1481. ha->serial2 = icb->port_name[7];
  1482. ha->node_name = icb->node_name;
  1483. ha->port_name = icb->port_name;
  1484. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1485. ha->retry_count = nv->retry_count;
  1486. /* Set minimum login_timeout to 4 seconds. */
  1487. if (nv->login_timeout < ql2xlogintimeout)
  1488. nv->login_timeout = ql2xlogintimeout;
  1489. if (nv->login_timeout < 4)
  1490. nv->login_timeout = 4;
  1491. ha->login_timeout = nv->login_timeout;
  1492. icb->login_timeout = nv->login_timeout;
  1493. /* Set minimum RATOV to 100 tenths of a second. */
  1494. ha->r_a_tov = 100;
  1495. ha->loop_reset_delay = nv->reset_delay;
  1496. /* Link Down Timeout = 0:
  1497. *
  1498. * When Port Down timer expires we will start returning
  1499. * I/O's to OS with "DID_NO_CONNECT".
  1500. *
  1501. * Link Down Timeout != 0:
  1502. *
  1503. * The driver waits for the link to come up after link down
  1504. * before returning I/Os to OS with "DID_NO_CONNECT".
  1505. */
  1506. if (nv->link_down_timeout == 0) {
  1507. ha->loop_down_abort_time =
  1508. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1509. } else {
  1510. ha->link_down_timeout = nv->link_down_timeout;
  1511. ha->loop_down_abort_time =
  1512. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1513. }
  1514. /*
  1515. * Need enough time to try and get the port back.
  1516. */
  1517. ha->port_down_retry_count = nv->port_down_retry_count;
  1518. if (qlport_down_retry)
  1519. ha->port_down_retry_count = qlport_down_retry;
  1520. /* Set login_retry_count */
  1521. ha->login_retry_count = nv->retry_count;
  1522. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1523. ha->port_down_retry_count > 3)
  1524. ha->login_retry_count = ha->port_down_retry_count;
  1525. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1526. ha->login_retry_count = ha->port_down_retry_count;
  1527. if (ql2xloginretrycount)
  1528. ha->login_retry_count = ql2xloginretrycount;
  1529. icb->lun_enables = __constant_cpu_to_le16(0);
  1530. icb->command_resource_count = 0;
  1531. icb->immediate_notify_resource_count = 0;
  1532. icb->timeout = __constant_cpu_to_le16(0);
  1533. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1534. /* Enable RIO */
  1535. icb->firmware_options[0] &= ~BIT_3;
  1536. icb->add_firmware_options[0] &=
  1537. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1538. icb->add_firmware_options[0] |= BIT_2;
  1539. icb->response_accumulation_timer = 3;
  1540. icb->interrupt_delay_timer = 5;
  1541. ha->flags.process_response_queue = 1;
  1542. } else {
  1543. /* Enable ZIO. */
  1544. if (!ha->flags.init_done) {
  1545. ha->zio_mode = icb->add_firmware_options[0] &
  1546. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1547. ha->zio_timer = icb->interrupt_delay_timer ?
  1548. icb->interrupt_delay_timer: 2;
  1549. }
  1550. icb->add_firmware_options[0] &=
  1551. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1552. ha->flags.process_response_queue = 0;
  1553. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1554. ha->zio_mode = QLA_ZIO_MODE_6;
  1555. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1556. "delay (%d us).\n", ha->host_no, ha->zio_mode,
  1557. ha->zio_timer * 100));
  1558. qla_printk(KERN_INFO, ha,
  1559. "ZIO mode %d enabled; timer delay (%d us).\n",
  1560. ha->zio_mode, ha->zio_timer * 100);
  1561. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1562. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1563. ha->flags.process_response_queue = 1;
  1564. }
  1565. }
  1566. if (rval) {
  1567. DEBUG2_3(printk(KERN_WARNING
  1568. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  1569. }
  1570. return (rval);
  1571. }
  1572. static void
  1573. qla2x00_rport_del(void *data)
  1574. {
  1575. fc_port_t *fcport = data;
  1576. struct fc_rport *rport;
  1577. unsigned long flags;
  1578. spin_lock_irqsave(&fcport->rport_lock, flags);
  1579. rport = fcport->drport;
  1580. fcport->drport = NULL;
  1581. spin_unlock_irqrestore(&fcport->rport_lock, flags);
  1582. if (rport)
  1583. fc_remote_port_delete(rport);
  1584. }
  1585. /**
  1586. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1587. * @ha: HA context
  1588. * @flags: allocation flags
  1589. *
  1590. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1591. */
  1592. static fc_port_t *
  1593. qla2x00_alloc_fcport(scsi_qla_host_t *ha, gfp_t flags)
  1594. {
  1595. fc_port_t *fcport;
  1596. fcport = kzalloc(sizeof(fc_port_t), flags);
  1597. if (!fcport)
  1598. return NULL;
  1599. /* Setup fcport template structure. */
  1600. fcport->ha = ha;
  1601. fcport->vp_idx = ha->vp_idx;
  1602. fcport->port_type = FCT_UNKNOWN;
  1603. fcport->loop_id = FC_NO_LOOP_ID;
  1604. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1605. fcport->flags = FCF_RLC_SUPPORT;
  1606. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1607. spin_lock_init(&fcport->rport_lock);
  1608. return fcport;
  1609. }
  1610. /*
  1611. * qla2x00_configure_loop
  1612. * Updates Fibre Channel Device Database with what is actually on loop.
  1613. *
  1614. * Input:
  1615. * ha = adapter block pointer.
  1616. *
  1617. * Returns:
  1618. * 0 = success.
  1619. * 1 = error.
  1620. * 2 = database was full and device was not configured.
  1621. */
  1622. static int
  1623. qla2x00_configure_loop(scsi_qla_host_t *ha)
  1624. {
  1625. int rval;
  1626. unsigned long flags, save_flags;
  1627. rval = QLA_SUCCESS;
  1628. /* Get Initiator ID */
  1629. if (test_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags)) {
  1630. rval = qla2x00_configure_hba(ha);
  1631. if (rval != QLA_SUCCESS) {
  1632. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1633. ha->host_no));
  1634. return (rval);
  1635. }
  1636. }
  1637. save_flags = flags = ha->dpc_flags;
  1638. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1639. ha->host_no, flags));
  1640. /*
  1641. * If we have both an RSCN and PORT UPDATE pending then handle them
  1642. * both at the same time.
  1643. */
  1644. clear_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1645. clear_bit(RSCN_UPDATE, &ha->dpc_flags);
  1646. /* Determine what we need to do */
  1647. if (ha->current_topology == ISP_CFG_FL &&
  1648. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1649. ha->flags.rscn_queue_overflow = 1;
  1650. set_bit(RSCN_UPDATE, &flags);
  1651. } else if (ha->current_topology == ISP_CFG_F &&
  1652. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1653. ha->flags.rscn_queue_overflow = 1;
  1654. set_bit(RSCN_UPDATE, &flags);
  1655. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1656. } else if (ha->current_topology == ISP_CFG_N) {
  1657. clear_bit(RSCN_UPDATE, &flags);
  1658. } else if (!ha->flags.online ||
  1659. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1660. ha->flags.rscn_queue_overflow = 1;
  1661. set_bit(RSCN_UPDATE, &flags);
  1662. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1663. }
  1664. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1665. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1666. rval = QLA_FUNCTION_FAILED;
  1667. } else {
  1668. rval = qla2x00_configure_local_loop(ha);
  1669. }
  1670. }
  1671. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1672. if (LOOP_TRANSITION(ha)) {
  1673. rval = QLA_FUNCTION_FAILED;
  1674. } else {
  1675. rval = qla2x00_configure_fabric(ha);
  1676. }
  1677. }
  1678. if (rval == QLA_SUCCESS) {
  1679. if (atomic_read(&ha->loop_down_timer) ||
  1680. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1681. rval = QLA_FUNCTION_FAILED;
  1682. } else {
  1683. atomic_set(&ha->loop_state, LOOP_READY);
  1684. DEBUG(printk("scsi(%ld): LOOP READY\n", ha->host_no));
  1685. }
  1686. }
  1687. if (rval) {
  1688. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1689. __func__, ha->host_no));
  1690. } else {
  1691. DEBUG3(printk("%s: exiting normally\n", __func__));
  1692. }
  1693. /* Restore state if a resync event occured during processing */
  1694. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1695. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1696. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1697. if (test_bit(RSCN_UPDATE, &save_flags))
  1698. set_bit(RSCN_UPDATE, &ha->dpc_flags);
  1699. }
  1700. return (rval);
  1701. }
  1702. /*
  1703. * qla2x00_configure_local_loop
  1704. * Updates Fibre Channel Device Database with local loop devices.
  1705. *
  1706. * Input:
  1707. * ha = adapter block pointer.
  1708. *
  1709. * Returns:
  1710. * 0 = success.
  1711. */
  1712. static int
  1713. qla2x00_configure_local_loop(scsi_qla_host_t *ha)
  1714. {
  1715. int rval, rval2;
  1716. int found_devs;
  1717. int found;
  1718. fc_port_t *fcport, *new_fcport;
  1719. uint16_t index;
  1720. uint16_t entries;
  1721. char *id_iter;
  1722. uint16_t loop_id;
  1723. uint8_t domain, area, al_pa;
  1724. scsi_qla_host_t *pha = to_qla_parent(ha);
  1725. found_devs = 0;
  1726. new_fcport = NULL;
  1727. entries = MAX_FIBRE_DEVICES;
  1728. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", ha->host_no));
  1729. DEBUG3(qla2x00_get_fcal_position_map(ha, NULL));
  1730. /* Get list of logged in devices. */
  1731. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1732. rval = qla2x00_get_id_list(ha, ha->gid_list, ha->gid_list_dma,
  1733. &entries);
  1734. if (rval != QLA_SUCCESS)
  1735. goto cleanup_allocation;
  1736. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1737. ha->host_no, entries));
  1738. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1739. entries * sizeof(struct gid_list_info)));
  1740. /* Allocate temporary fcport for any new fcports discovered. */
  1741. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1742. if (new_fcport == NULL) {
  1743. rval = QLA_MEMORY_ALLOC_FAILED;
  1744. goto cleanup_allocation;
  1745. }
  1746. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1747. /*
  1748. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1749. */
  1750. list_for_each_entry(fcport, &pha->fcports, list) {
  1751. if (fcport->vp_idx != ha->vp_idx)
  1752. continue;
  1753. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1754. fcport->port_type != FCT_BROADCAST &&
  1755. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1756. DEBUG(printk("scsi(%ld): Marking port lost, "
  1757. "loop_id=0x%04x\n",
  1758. ha->host_no, fcport->loop_id));
  1759. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1760. fcport->flags &= ~FCF_FARP_DONE;
  1761. }
  1762. }
  1763. /* Add devices to port list. */
  1764. id_iter = (char *)ha->gid_list;
  1765. for (index = 0; index < entries; index++) {
  1766. domain = ((struct gid_list_info *)id_iter)->domain;
  1767. area = ((struct gid_list_info *)id_iter)->area;
  1768. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1769. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1770. loop_id = (uint16_t)
  1771. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1772. else
  1773. loop_id = le16_to_cpu(
  1774. ((struct gid_list_info *)id_iter)->loop_id);
  1775. id_iter += ha->gid_list_info_size;
  1776. /* Bypass reserved domain fields. */
  1777. if ((domain & 0xf0) == 0xf0)
  1778. continue;
  1779. /* Bypass if not same domain and area of adapter. */
  1780. if (area && domain &&
  1781. (area != ha->d_id.b.area || domain != ha->d_id.b.domain))
  1782. continue;
  1783. /* Bypass invalid local loop ID. */
  1784. if (loop_id > LAST_LOCAL_LOOP_ID)
  1785. continue;
  1786. /* Fill in member data. */
  1787. new_fcport->d_id.b.domain = domain;
  1788. new_fcport->d_id.b.area = area;
  1789. new_fcport->d_id.b.al_pa = al_pa;
  1790. new_fcport->loop_id = loop_id;
  1791. new_fcport->vp_idx = ha->vp_idx;
  1792. rval2 = qla2x00_get_port_database(ha, new_fcport, 0);
  1793. if (rval2 != QLA_SUCCESS) {
  1794. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1795. "information -- get_port_database=%x, "
  1796. "loop_id=0x%04x\n",
  1797. ha->host_no, rval2, new_fcport->loop_id));
  1798. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1799. ha->host_no));
  1800. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  1801. continue;
  1802. }
  1803. /* Check for matching device in port list. */
  1804. found = 0;
  1805. fcport = NULL;
  1806. list_for_each_entry(fcport, &pha->fcports, list) {
  1807. if (fcport->vp_idx != ha->vp_idx)
  1808. continue;
  1809. if (memcmp(new_fcport->port_name, fcport->port_name,
  1810. WWN_SIZE))
  1811. continue;
  1812. fcport->flags &= ~(FCF_FABRIC_DEVICE |
  1813. FCF_PERSISTENT_BOUND);
  1814. fcport->loop_id = new_fcport->loop_id;
  1815. fcport->port_type = new_fcport->port_type;
  1816. fcport->d_id.b24 = new_fcport->d_id.b24;
  1817. memcpy(fcport->node_name, new_fcport->node_name,
  1818. WWN_SIZE);
  1819. found++;
  1820. break;
  1821. }
  1822. if (!found) {
  1823. /* New device, add to fcports list. */
  1824. new_fcport->flags &= ~FCF_PERSISTENT_BOUND;
  1825. if (ha->parent) {
  1826. new_fcport->ha = ha;
  1827. new_fcport->vp_idx = ha->vp_idx;
  1828. list_add_tail(&new_fcport->vp_fcport,
  1829. &ha->vp_fcports);
  1830. }
  1831. list_add_tail(&new_fcport->list, &pha->fcports);
  1832. /* Allocate a new replacement fcport. */
  1833. fcport = new_fcport;
  1834. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1835. if (new_fcport == NULL) {
  1836. rval = QLA_MEMORY_ALLOC_FAILED;
  1837. goto cleanup_allocation;
  1838. }
  1839. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1840. }
  1841. /* Base iIDMA settings on HBA port speed. */
  1842. fcport->fp_speed = ha->link_data_rate;
  1843. qla2x00_update_fcport(ha, fcport);
  1844. found_devs++;
  1845. }
  1846. cleanup_allocation:
  1847. kfree(new_fcport);
  1848. if (rval != QLA_SUCCESS) {
  1849. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1850. "rval=%x\n", ha->host_no, rval));
  1851. }
  1852. if (found_devs) {
  1853. ha->device_flags |= DFLG_LOCAL_DEVICES;
  1854. ha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES;
  1855. }
  1856. return (rval);
  1857. }
  1858. static void
  1859. qla2x00_iidma_fcport(scsi_qla_host_t *ha, fc_port_t *fcport)
  1860. {
  1861. #define LS_UNKNOWN 2
  1862. static char *link_speeds[5] = { "1", "2", "?", "4", "8" };
  1863. int rval;
  1864. uint16_t mb[6];
  1865. if (!IS_IIDMA_CAPABLE(ha))
  1866. return;
  1867. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1868. fcport->fp_speed > ha->link_data_rate)
  1869. return;
  1870. rval = qla2x00_set_idma_speed(ha, fcport->loop_id, fcport->fp_speed,
  1871. mb);
  1872. if (rval != QLA_SUCCESS) {
  1873. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1874. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1875. ha->host_no, fcport->port_name[0], fcport->port_name[1],
  1876. fcport->port_name[2], fcport->port_name[3],
  1877. fcport->port_name[4], fcport->port_name[5],
  1878. fcport->port_name[6], fcport->port_name[7], rval,
  1879. fcport->fp_speed, mb[0], mb[1]));
  1880. } else {
  1881. DEBUG2(qla_printk(KERN_INFO, ha,
  1882. "iIDMA adjusted to %s GB/s on "
  1883. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1884. link_speeds[fcport->fp_speed], fcport->port_name[0],
  1885. fcport->port_name[1], fcport->port_name[2],
  1886. fcport->port_name[3], fcport->port_name[4],
  1887. fcport->port_name[5], fcport->port_name[6],
  1888. fcport->port_name[7]));
  1889. }
  1890. }
  1891. static void
  1892. qla2x00_reg_remote_port(scsi_qla_host_t *ha, fc_port_t *fcport)
  1893. {
  1894. struct fc_rport_identifiers rport_ids;
  1895. struct fc_rport *rport;
  1896. unsigned long flags;
  1897. if (fcport->drport)
  1898. qla2x00_rport_del(fcport);
  1899. if (fcport->rport)
  1900. return;
  1901. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1902. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1903. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1904. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1905. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1906. rport = fc_remote_port_add(ha->host, 0, &rport_ids);
  1907. if (!rport) {
  1908. qla_printk(KERN_WARNING, ha,
  1909. "Unable to allocate fc remote port!\n");
  1910. return;
  1911. }
  1912. spin_lock_irqsave(&fcport->rport_lock, flags);
  1913. fcport->rport = rport;
  1914. *((fc_port_t **)rport->dd_data) = fcport;
  1915. spin_unlock_irqrestore(&fcport->rport_lock, flags);
  1916. rport->supported_classes = fcport->supported_classes;
  1917. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1918. if (fcport->port_type == FCT_INITIATOR)
  1919. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1920. if (fcport->port_type == FCT_TARGET)
  1921. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  1922. fc_remote_port_rolechg(rport, rport_ids.roles);
  1923. }
  1924. /*
  1925. * qla2x00_update_fcport
  1926. * Updates device on list.
  1927. *
  1928. * Input:
  1929. * ha = adapter block pointer.
  1930. * fcport = port structure pointer.
  1931. *
  1932. * Return:
  1933. * 0 - Success
  1934. * BIT_0 - error
  1935. *
  1936. * Context:
  1937. * Kernel context.
  1938. */
  1939. void
  1940. qla2x00_update_fcport(scsi_qla_host_t *ha, fc_port_t *fcport)
  1941. {
  1942. scsi_qla_host_t *pha = to_qla_parent(ha);
  1943. fcport->ha = ha;
  1944. fcport->login_retry = 0;
  1945. fcport->port_login_retry_count = pha->port_down_retry_count *
  1946. PORT_RETRY_TIME;
  1947. atomic_set(&fcport->port_down_timer, pha->port_down_retry_count *
  1948. PORT_RETRY_TIME);
  1949. fcport->flags &= ~FCF_LOGIN_NEEDED;
  1950. qla2x00_iidma_fcport(ha, fcport);
  1951. atomic_set(&fcport->state, FCS_ONLINE);
  1952. qla2x00_reg_remote_port(ha, fcport);
  1953. }
  1954. /*
  1955. * qla2x00_configure_fabric
  1956. * Setup SNS devices with loop ID's.
  1957. *
  1958. * Input:
  1959. * ha = adapter block pointer.
  1960. *
  1961. * Returns:
  1962. * 0 = success.
  1963. * BIT_0 = error
  1964. */
  1965. static int
  1966. qla2x00_configure_fabric(scsi_qla_host_t *ha)
  1967. {
  1968. int rval, rval2;
  1969. fc_port_t *fcport, *fcptemp;
  1970. uint16_t next_loopid;
  1971. uint16_t mb[MAILBOX_REGISTER_COUNT];
  1972. uint16_t loop_id;
  1973. LIST_HEAD(new_fcports);
  1974. scsi_qla_host_t *pha = to_qla_parent(ha);
  1975. /* If FL port exists, then SNS is present */
  1976. if (IS_FWI2_CAPABLE(ha))
  1977. loop_id = NPH_F_PORT;
  1978. else
  1979. loop_id = SNS_FL_PORT;
  1980. rval = qla2x00_get_port_name(ha, loop_id, ha->fabric_node_name, 1);
  1981. if (rval != QLA_SUCCESS) {
  1982. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  1983. "Port\n", ha->host_no));
  1984. ha->device_flags &= ~SWITCH_FOUND;
  1985. return (QLA_SUCCESS);
  1986. }
  1987. ha->device_flags |= SWITCH_FOUND;
  1988. /* Mark devices that need re-synchronization. */
  1989. rval2 = qla2x00_device_resync(ha);
  1990. if (rval2 == QLA_RSCNS_HANDLED) {
  1991. /* No point doing the scan, just continue. */
  1992. return (QLA_SUCCESS);
  1993. }
  1994. do {
  1995. /* FDMI support. */
  1996. if (ql2xfdmienable &&
  1997. test_and_clear_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags))
  1998. qla2x00_fdmi_register(ha);
  1999. /* Ensure we are logged into the SNS. */
  2000. if (IS_FWI2_CAPABLE(ha))
  2001. loop_id = NPH_SNS;
  2002. else
  2003. loop_id = SIMPLE_NAME_SERVER;
  2004. ha->isp_ops->fabric_login(ha, loop_id, 0xff, 0xff,
  2005. 0xfc, mb, BIT_1 | BIT_0);
  2006. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2007. DEBUG2(qla_printk(KERN_INFO, ha,
  2008. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2009. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2010. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2011. return (QLA_SUCCESS);
  2012. }
  2013. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags)) {
  2014. if (qla2x00_rft_id(ha)) {
  2015. /* EMPTY */
  2016. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2017. "TYPE failed.\n", ha->host_no));
  2018. }
  2019. if (qla2x00_rff_id(ha)) {
  2020. /* EMPTY */
  2021. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2022. "Features failed.\n", ha->host_no));
  2023. }
  2024. if (qla2x00_rnn_id(ha)) {
  2025. /* EMPTY */
  2026. DEBUG2(printk("scsi(%ld): Register Node Name "
  2027. "failed.\n", ha->host_no));
  2028. } else if (qla2x00_rsnn_nn(ha)) {
  2029. /* EMPTY */
  2030. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2031. "Node Name failed.\n", ha->host_no));
  2032. }
  2033. }
  2034. rval = qla2x00_find_all_fabric_devs(ha, &new_fcports);
  2035. if (rval != QLA_SUCCESS)
  2036. break;
  2037. /*
  2038. * Logout all previous fabric devices marked lost, except
  2039. * tape devices.
  2040. */
  2041. list_for_each_entry(fcport, &pha->fcports, list) {
  2042. if (fcport->vp_idx !=ha->vp_idx)
  2043. continue;
  2044. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2045. break;
  2046. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2047. continue;
  2048. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2049. qla2x00_mark_device_lost(ha, fcport,
  2050. ql2xplogiabsentdevice, 0);
  2051. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2052. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2053. fcport->port_type != FCT_INITIATOR &&
  2054. fcport->port_type != FCT_BROADCAST) {
  2055. ha->isp_ops->fabric_logout(ha,
  2056. fcport->loop_id,
  2057. fcport->d_id.b.domain,
  2058. fcport->d_id.b.area,
  2059. fcport->d_id.b.al_pa);
  2060. fcport->loop_id = FC_NO_LOOP_ID;
  2061. }
  2062. }
  2063. }
  2064. /* Starting free loop ID. */
  2065. next_loopid = pha->min_external_loopid;
  2066. /*
  2067. * Scan through our port list and login entries that need to be
  2068. * logged in.
  2069. */
  2070. list_for_each_entry(fcport, &pha->fcports, list) {
  2071. if (fcport->vp_idx != ha->vp_idx)
  2072. continue;
  2073. if (atomic_read(&ha->loop_down_timer) ||
  2074. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2075. break;
  2076. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2077. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2078. continue;
  2079. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2080. fcport->loop_id = next_loopid;
  2081. rval = qla2x00_find_new_loop_id(ha, fcport);
  2082. if (rval != QLA_SUCCESS) {
  2083. /* Ran out of IDs to use */
  2084. break;
  2085. }
  2086. }
  2087. /* Login and update database */
  2088. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  2089. }
  2090. /* Exit if out of loop IDs. */
  2091. if (rval != QLA_SUCCESS) {
  2092. break;
  2093. }
  2094. /*
  2095. * Login and add the new devices to our port list.
  2096. */
  2097. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2098. if (atomic_read(&ha->loop_down_timer) ||
  2099. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2100. break;
  2101. /* Find a new loop ID to use. */
  2102. fcport->loop_id = next_loopid;
  2103. rval = qla2x00_find_new_loop_id(ha, fcport);
  2104. if (rval != QLA_SUCCESS) {
  2105. /* Ran out of IDs to use */
  2106. break;
  2107. }
  2108. /* Login and update database */
  2109. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  2110. if (ha->parent) {
  2111. fcport->ha = ha;
  2112. fcport->vp_idx = ha->vp_idx;
  2113. list_add_tail(&fcport->vp_fcport,
  2114. &ha->vp_fcports);
  2115. list_move_tail(&fcport->list,
  2116. &ha->parent->fcports);
  2117. } else
  2118. list_move_tail(&fcport->list, &ha->fcports);
  2119. }
  2120. } while (0);
  2121. /* Free all new device structures not processed. */
  2122. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2123. list_del(&fcport->list);
  2124. kfree(fcport);
  2125. }
  2126. if (rval) {
  2127. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2128. "rval=%d\n", ha->host_no, rval));
  2129. }
  2130. return (rval);
  2131. }
  2132. /*
  2133. * qla2x00_find_all_fabric_devs
  2134. *
  2135. * Input:
  2136. * ha = adapter block pointer.
  2137. * dev = database device entry pointer.
  2138. *
  2139. * Returns:
  2140. * 0 = success.
  2141. *
  2142. * Context:
  2143. * Kernel context.
  2144. */
  2145. static int
  2146. qla2x00_find_all_fabric_devs(scsi_qla_host_t *ha, struct list_head *new_fcports)
  2147. {
  2148. int rval;
  2149. uint16_t loop_id;
  2150. fc_port_t *fcport, *new_fcport, *fcptemp;
  2151. int found;
  2152. sw_info_t *swl;
  2153. int swl_idx;
  2154. int first_dev, last_dev;
  2155. port_id_t wrap, nxt_d_id;
  2156. int vp_index;
  2157. int empty_vp_index;
  2158. int found_vp;
  2159. scsi_qla_host_t *vha;
  2160. scsi_qla_host_t *pha = to_qla_parent(ha);
  2161. rval = QLA_SUCCESS;
  2162. /* Try GID_PT to get device list, else GAN. */
  2163. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_ATOMIC);
  2164. if (!swl) {
  2165. /*EMPTY*/
  2166. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2167. "on GA_NXT\n", ha->host_no));
  2168. } else {
  2169. if (qla2x00_gid_pt(ha, swl) != QLA_SUCCESS) {
  2170. kfree(swl);
  2171. swl = NULL;
  2172. } else if (qla2x00_gpn_id(ha, swl) != QLA_SUCCESS) {
  2173. kfree(swl);
  2174. swl = NULL;
  2175. } else if (qla2x00_gnn_id(ha, swl) != QLA_SUCCESS) {
  2176. kfree(swl);
  2177. swl = NULL;
  2178. } else if (qla2x00_gfpn_id(ha, swl) == QLA_SUCCESS) {
  2179. qla2x00_gpsc(ha, swl);
  2180. }
  2181. }
  2182. swl_idx = 0;
  2183. /* Allocate temporary fcport for any new fcports discovered. */
  2184. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  2185. if (new_fcport == NULL) {
  2186. kfree(swl);
  2187. return (QLA_MEMORY_ALLOC_FAILED);
  2188. }
  2189. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2190. new_fcport->vp_idx = ha->vp_idx;
  2191. /* Set start port ID scan at adapter ID. */
  2192. first_dev = 1;
  2193. last_dev = 0;
  2194. /* Starting free loop ID. */
  2195. loop_id = pha->min_external_loopid;
  2196. for (; loop_id <= ha->last_loop_id; loop_id++) {
  2197. if (qla2x00_is_reserved_id(ha, loop_id))
  2198. continue;
  2199. if (atomic_read(&ha->loop_down_timer) || LOOP_TRANSITION(ha))
  2200. break;
  2201. if (swl != NULL) {
  2202. if (last_dev) {
  2203. wrap.b24 = new_fcport->d_id.b24;
  2204. } else {
  2205. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2206. memcpy(new_fcport->node_name,
  2207. swl[swl_idx].node_name, WWN_SIZE);
  2208. memcpy(new_fcport->port_name,
  2209. swl[swl_idx].port_name, WWN_SIZE);
  2210. memcpy(new_fcport->fabric_port_name,
  2211. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2212. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2213. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2214. last_dev = 1;
  2215. }
  2216. swl_idx++;
  2217. }
  2218. } else {
  2219. /* Send GA_NXT to the switch */
  2220. rval = qla2x00_ga_nxt(ha, new_fcport);
  2221. if (rval != QLA_SUCCESS) {
  2222. qla_printk(KERN_WARNING, ha,
  2223. "SNS scan failed -- assuming zero-entry "
  2224. "result...\n");
  2225. list_for_each_entry_safe(fcport, fcptemp,
  2226. new_fcports, list) {
  2227. list_del(&fcport->list);
  2228. kfree(fcport);
  2229. }
  2230. rval = QLA_SUCCESS;
  2231. break;
  2232. }
  2233. }
  2234. /* If wrap on switch device list, exit. */
  2235. if (first_dev) {
  2236. wrap.b24 = new_fcport->d_id.b24;
  2237. first_dev = 0;
  2238. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2239. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2240. ha->host_no, new_fcport->d_id.b.domain,
  2241. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2242. break;
  2243. }
  2244. /* Bypass if same physical adapter. */
  2245. if (new_fcport->d_id.b24 == pha->d_id.b24)
  2246. continue;
  2247. /* Bypass virtual ports of the same host. */
  2248. if (pha->num_vhosts) {
  2249. for_each_mapped_vp_idx(pha, vp_index) {
  2250. empty_vp_index = 1;
  2251. found_vp = 0;
  2252. list_for_each_entry(vha, &pha->vp_list,
  2253. vp_list) {
  2254. if (vp_index == vha->vp_idx) {
  2255. empty_vp_index = 0;
  2256. found_vp = 1;
  2257. break;
  2258. }
  2259. }
  2260. if (empty_vp_index)
  2261. continue;
  2262. if (found_vp &&
  2263. new_fcport->d_id.b24 == vha->d_id.b24)
  2264. break;
  2265. }
  2266. if (vp_index <= pha->max_npiv_vports)
  2267. continue;
  2268. }
  2269. /* Bypass if same domain and area of adapter. */
  2270. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2271. (ha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2272. ISP_CFG_FL)
  2273. continue;
  2274. /* Bypass reserved domain fields. */
  2275. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2276. continue;
  2277. /* Locate matching device in database. */
  2278. found = 0;
  2279. list_for_each_entry(fcport, &pha->fcports, list) {
  2280. if (new_fcport->vp_idx != fcport->vp_idx)
  2281. continue;
  2282. if (memcmp(new_fcport->port_name, fcport->port_name,
  2283. WWN_SIZE))
  2284. continue;
  2285. found++;
  2286. /* Update port state. */
  2287. memcpy(fcport->fabric_port_name,
  2288. new_fcport->fabric_port_name, WWN_SIZE);
  2289. fcport->fp_speed = new_fcport->fp_speed;
  2290. /*
  2291. * If address the same and state FCS_ONLINE, nothing
  2292. * changed.
  2293. */
  2294. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2295. atomic_read(&fcport->state) == FCS_ONLINE) {
  2296. break;
  2297. }
  2298. /*
  2299. * If device was not a fabric device before.
  2300. */
  2301. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2302. fcport->d_id.b24 = new_fcport->d_id.b24;
  2303. fcport->loop_id = FC_NO_LOOP_ID;
  2304. fcport->flags |= (FCF_FABRIC_DEVICE |
  2305. FCF_LOGIN_NEEDED);
  2306. fcport->flags &= ~FCF_PERSISTENT_BOUND;
  2307. break;
  2308. }
  2309. /*
  2310. * Port ID changed or device was marked to be updated;
  2311. * Log it out if still logged in and mark it for
  2312. * relogin later.
  2313. */
  2314. fcport->d_id.b24 = new_fcport->d_id.b24;
  2315. fcport->flags |= FCF_LOGIN_NEEDED;
  2316. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2317. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2318. fcport->port_type != FCT_INITIATOR &&
  2319. fcport->port_type != FCT_BROADCAST) {
  2320. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2321. fcport->d_id.b.domain, fcport->d_id.b.area,
  2322. fcport->d_id.b.al_pa);
  2323. fcport->loop_id = FC_NO_LOOP_ID;
  2324. }
  2325. break;
  2326. }
  2327. if (found)
  2328. continue;
  2329. /* If device was not in our fcports list, then add it. */
  2330. list_add_tail(&new_fcport->list, new_fcports);
  2331. /* Allocate a new replacement fcport. */
  2332. nxt_d_id.b24 = new_fcport->d_id.b24;
  2333. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  2334. if (new_fcport == NULL) {
  2335. kfree(swl);
  2336. return (QLA_MEMORY_ALLOC_FAILED);
  2337. }
  2338. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2339. new_fcport->d_id.b24 = nxt_d_id.b24;
  2340. new_fcport->vp_idx = ha->vp_idx;
  2341. }
  2342. kfree(swl);
  2343. kfree(new_fcport);
  2344. if (!list_empty(new_fcports))
  2345. ha->device_flags |= DFLG_FABRIC_DEVICES;
  2346. return (rval);
  2347. }
  2348. /*
  2349. * qla2x00_find_new_loop_id
  2350. * Scan through our port list and find a new usable loop ID.
  2351. *
  2352. * Input:
  2353. * ha: adapter state pointer.
  2354. * dev: port structure pointer.
  2355. *
  2356. * Returns:
  2357. * qla2x00 local function return status code.
  2358. *
  2359. * Context:
  2360. * Kernel context.
  2361. */
  2362. static int
  2363. qla2x00_find_new_loop_id(scsi_qla_host_t *ha, fc_port_t *dev)
  2364. {
  2365. int rval;
  2366. int found;
  2367. fc_port_t *fcport;
  2368. uint16_t first_loop_id;
  2369. scsi_qla_host_t *pha = to_qla_parent(ha);
  2370. rval = QLA_SUCCESS;
  2371. /* Save starting loop ID. */
  2372. first_loop_id = dev->loop_id;
  2373. for (;;) {
  2374. /* Skip loop ID if already used by adapter. */
  2375. if (dev->loop_id == ha->loop_id) {
  2376. dev->loop_id++;
  2377. }
  2378. /* Skip reserved loop IDs. */
  2379. while (qla2x00_is_reserved_id(ha, dev->loop_id)) {
  2380. dev->loop_id++;
  2381. }
  2382. /* Reset loop ID if passed the end. */
  2383. if (dev->loop_id > ha->last_loop_id) {
  2384. /* first loop ID. */
  2385. dev->loop_id = ha->min_external_loopid;
  2386. }
  2387. /* Check for loop ID being already in use. */
  2388. found = 0;
  2389. fcport = NULL;
  2390. list_for_each_entry(fcport, &pha->fcports, list) {
  2391. if (fcport->loop_id == dev->loop_id && fcport != dev) {
  2392. /* ID possibly in use */
  2393. found++;
  2394. break;
  2395. }
  2396. }
  2397. /* If not in use then it is free to use. */
  2398. if (!found) {
  2399. break;
  2400. }
  2401. /* ID in use. Try next value. */
  2402. dev->loop_id++;
  2403. /* If wrap around. No free ID to use. */
  2404. if (dev->loop_id == first_loop_id) {
  2405. dev->loop_id = FC_NO_LOOP_ID;
  2406. rval = QLA_FUNCTION_FAILED;
  2407. break;
  2408. }
  2409. }
  2410. return (rval);
  2411. }
  2412. /*
  2413. * qla2x00_device_resync
  2414. * Marks devices in the database that needs resynchronization.
  2415. *
  2416. * Input:
  2417. * ha = adapter block pointer.
  2418. *
  2419. * Context:
  2420. * Kernel context.
  2421. */
  2422. static int
  2423. qla2x00_device_resync(scsi_qla_host_t *ha)
  2424. {
  2425. int rval;
  2426. uint32_t mask;
  2427. fc_port_t *fcport;
  2428. uint32_t rscn_entry;
  2429. uint8_t rscn_out_iter;
  2430. uint8_t format;
  2431. port_id_t d_id;
  2432. scsi_qla_host_t *pha = to_qla_parent(ha);
  2433. rval = QLA_RSCNS_HANDLED;
  2434. while (ha->rscn_out_ptr != ha->rscn_in_ptr ||
  2435. ha->flags.rscn_queue_overflow) {
  2436. rscn_entry = ha->rscn_queue[ha->rscn_out_ptr];
  2437. format = MSB(MSW(rscn_entry));
  2438. d_id.b.domain = LSB(MSW(rscn_entry));
  2439. d_id.b.area = MSB(LSW(rscn_entry));
  2440. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2441. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2442. "[%02x/%02x%02x%02x].\n",
  2443. ha->host_no, ha->rscn_out_ptr, format, d_id.b.domain,
  2444. d_id.b.area, d_id.b.al_pa));
  2445. ha->rscn_out_ptr++;
  2446. if (ha->rscn_out_ptr == MAX_RSCN_COUNT)
  2447. ha->rscn_out_ptr = 0;
  2448. /* Skip duplicate entries. */
  2449. for (rscn_out_iter = ha->rscn_out_ptr;
  2450. !ha->flags.rscn_queue_overflow &&
  2451. rscn_out_iter != ha->rscn_in_ptr;
  2452. rscn_out_iter = (rscn_out_iter ==
  2453. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2454. if (rscn_entry != ha->rscn_queue[rscn_out_iter])
  2455. break;
  2456. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2457. "entry found at [%d].\n", ha->host_no,
  2458. rscn_out_iter));
  2459. ha->rscn_out_ptr = rscn_out_iter;
  2460. }
  2461. /* Queue overflow, set switch default case. */
  2462. if (ha->flags.rscn_queue_overflow) {
  2463. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2464. "overflow.\n", ha->host_no));
  2465. format = 3;
  2466. ha->flags.rscn_queue_overflow = 0;
  2467. }
  2468. switch (format) {
  2469. case 0:
  2470. mask = 0xffffff;
  2471. break;
  2472. case 1:
  2473. mask = 0xffff00;
  2474. break;
  2475. case 2:
  2476. mask = 0xff0000;
  2477. break;
  2478. default:
  2479. mask = 0x0;
  2480. d_id.b24 = 0;
  2481. ha->rscn_out_ptr = ha->rscn_in_ptr;
  2482. break;
  2483. }
  2484. rval = QLA_SUCCESS;
  2485. list_for_each_entry(fcport, &pha->fcports, list) {
  2486. if (fcport->vp_idx != ha->vp_idx)
  2487. continue;
  2488. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2489. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2490. fcport->port_type == FCT_BROADCAST)
  2491. continue;
  2492. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2493. if (format != 3 ||
  2494. fcport->port_type != FCT_INITIATOR) {
  2495. qla2x00_mark_device_lost(ha, fcport,
  2496. 0, 0);
  2497. }
  2498. }
  2499. fcport->flags &= ~FCF_FARP_DONE;
  2500. }
  2501. }
  2502. return (rval);
  2503. }
  2504. /*
  2505. * qla2x00_fabric_dev_login
  2506. * Login fabric target device and update FC port database.
  2507. *
  2508. * Input:
  2509. * ha: adapter state pointer.
  2510. * fcport: port structure list pointer.
  2511. * next_loopid: contains value of a new loop ID that can be used
  2512. * by the next login attempt.
  2513. *
  2514. * Returns:
  2515. * qla2x00 local function return status code.
  2516. *
  2517. * Context:
  2518. * Kernel context.
  2519. */
  2520. static int
  2521. qla2x00_fabric_dev_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2522. uint16_t *next_loopid)
  2523. {
  2524. int rval;
  2525. int retry;
  2526. uint8_t opts;
  2527. rval = QLA_SUCCESS;
  2528. retry = 0;
  2529. rval = qla2x00_fabric_login(ha, fcport, next_loopid);
  2530. if (rval == QLA_SUCCESS) {
  2531. /* Send an ADISC to tape devices.*/
  2532. opts = 0;
  2533. if (fcport->flags & FCF_TAPE_PRESENT)
  2534. opts |= BIT_1;
  2535. rval = qla2x00_get_port_database(ha, fcport, opts);
  2536. if (rval != QLA_SUCCESS) {
  2537. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2538. fcport->d_id.b.domain, fcport->d_id.b.area,
  2539. fcport->d_id.b.al_pa);
  2540. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2541. } else {
  2542. qla2x00_update_fcport(ha, fcport);
  2543. }
  2544. }
  2545. return (rval);
  2546. }
  2547. /*
  2548. * qla2x00_fabric_login
  2549. * Issue fabric login command.
  2550. *
  2551. * Input:
  2552. * ha = adapter block pointer.
  2553. * device = pointer to FC device type structure.
  2554. *
  2555. * Returns:
  2556. * 0 - Login successfully
  2557. * 1 - Login failed
  2558. * 2 - Initiator device
  2559. * 3 - Fatal error
  2560. */
  2561. int
  2562. qla2x00_fabric_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2563. uint16_t *next_loopid)
  2564. {
  2565. int rval;
  2566. int retry;
  2567. uint16_t tmp_loopid;
  2568. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2569. retry = 0;
  2570. tmp_loopid = 0;
  2571. for (;;) {
  2572. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2573. "for port %02x%02x%02x.\n",
  2574. ha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2575. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2576. /* Login fcport on switch. */
  2577. ha->isp_ops->fabric_login(ha, fcport->loop_id,
  2578. fcport->d_id.b.domain, fcport->d_id.b.area,
  2579. fcport->d_id.b.al_pa, mb, BIT_0);
  2580. if (mb[0] == MBS_PORT_ID_USED) {
  2581. /*
  2582. * Device has another loop ID. The firmware team
  2583. * recommends the driver perform an implicit login with
  2584. * the specified ID again. The ID we just used is save
  2585. * here so we return with an ID that can be tried by
  2586. * the next login.
  2587. */
  2588. retry++;
  2589. tmp_loopid = fcport->loop_id;
  2590. fcport->loop_id = mb[1];
  2591. DEBUG(printk("Fabric Login: port in use - next "
  2592. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2593. fcport->loop_id, fcport->d_id.b.domain,
  2594. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2595. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2596. /*
  2597. * Login succeeded.
  2598. */
  2599. if (retry) {
  2600. /* A retry occurred before. */
  2601. *next_loopid = tmp_loopid;
  2602. } else {
  2603. /*
  2604. * No retry occurred before. Just increment the
  2605. * ID value for next login.
  2606. */
  2607. *next_loopid = (fcport->loop_id + 1);
  2608. }
  2609. if (mb[1] & BIT_0) {
  2610. fcport->port_type = FCT_INITIATOR;
  2611. } else {
  2612. fcport->port_type = FCT_TARGET;
  2613. if (mb[1] & BIT_1) {
  2614. fcport->flags |= FCF_TAPE_PRESENT;
  2615. }
  2616. }
  2617. if (mb[10] & BIT_0)
  2618. fcport->supported_classes |= FC_COS_CLASS2;
  2619. if (mb[10] & BIT_1)
  2620. fcport->supported_classes |= FC_COS_CLASS3;
  2621. rval = QLA_SUCCESS;
  2622. break;
  2623. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2624. /*
  2625. * Loop ID already used, try next loop ID.
  2626. */
  2627. fcport->loop_id++;
  2628. rval = qla2x00_find_new_loop_id(ha, fcport);
  2629. if (rval != QLA_SUCCESS) {
  2630. /* Ran out of loop IDs to use */
  2631. break;
  2632. }
  2633. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2634. /*
  2635. * Firmware possibly timed out during login. If NO
  2636. * retries are left to do then the device is declared
  2637. * dead.
  2638. */
  2639. *next_loopid = fcport->loop_id;
  2640. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2641. fcport->d_id.b.domain, fcport->d_id.b.area,
  2642. fcport->d_id.b.al_pa);
  2643. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2644. rval = 1;
  2645. break;
  2646. } else {
  2647. /*
  2648. * unrecoverable / not handled error
  2649. */
  2650. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2651. "loop_id=%x jiffies=%lx.\n",
  2652. __func__, ha->host_no, mb[0],
  2653. fcport->d_id.b.domain, fcport->d_id.b.area,
  2654. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2655. *next_loopid = fcport->loop_id;
  2656. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2657. fcport->d_id.b.domain, fcport->d_id.b.area,
  2658. fcport->d_id.b.al_pa);
  2659. fcport->loop_id = FC_NO_LOOP_ID;
  2660. fcport->login_retry = 0;
  2661. rval = 3;
  2662. break;
  2663. }
  2664. }
  2665. return (rval);
  2666. }
  2667. /*
  2668. * qla2x00_local_device_login
  2669. * Issue local device login command.
  2670. *
  2671. * Input:
  2672. * ha = adapter block pointer.
  2673. * loop_id = loop id of device to login to.
  2674. *
  2675. * Returns (Where's the #define!!!!):
  2676. * 0 - Login successfully
  2677. * 1 - Login failed
  2678. * 3 - Fatal error
  2679. */
  2680. int
  2681. qla2x00_local_device_login(scsi_qla_host_t *ha, fc_port_t *fcport)
  2682. {
  2683. int rval;
  2684. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2685. memset(mb, 0, sizeof(mb));
  2686. rval = qla2x00_login_local_device(ha, fcport, mb, BIT_0);
  2687. if (rval == QLA_SUCCESS) {
  2688. /* Interrogate mailbox registers for any errors */
  2689. if (mb[0] == MBS_COMMAND_ERROR)
  2690. rval = 1;
  2691. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2692. /* device not in PCB table */
  2693. rval = 3;
  2694. }
  2695. return (rval);
  2696. }
  2697. /*
  2698. * qla2x00_loop_resync
  2699. * Resync with fibre channel devices.
  2700. *
  2701. * Input:
  2702. * ha = adapter block pointer.
  2703. *
  2704. * Returns:
  2705. * 0 = success
  2706. */
  2707. int
  2708. qla2x00_loop_resync(scsi_qla_host_t *ha)
  2709. {
  2710. int rval;
  2711. uint32_t wait_time;
  2712. rval = QLA_SUCCESS;
  2713. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2714. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2715. if (ha->flags.online) {
  2716. if (!(rval = qla2x00_fw_ready(ha))) {
  2717. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2718. wait_time = 256;
  2719. do {
  2720. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2721. /* Issue a marker after FW becomes ready. */
  2722. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2723. ha->marker_needed = 0;
  2724. /* Remap devices on Loop. */
  2725. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2726. qla2x00_configure_loop(ha);
  2727. wait_time--;
  2728. } while (!atomic_read(&ha->loop_down_timer) &&
  2729. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2730. wait_time &&
  2731. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2732. }
  2733. }
  2734. if (test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) {
  2735. return (QLA_FUNCTION_FAILED);
  2736. }
  2737. if (rval) {
  2738. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2739. }
  2740. return (rval);
  2741. }
  2742. void
  2743. qla2x00_update_fcports(scsi_qla_host_t *ha)
  2744. {
  2745. fc_port_t *fcport;
  2746. /* Go with deferred removal of rport references. */
  2747. list_for_each_entry(fcport, &ha->fcports, list)
  2748. if (fcport->drport)
  2749. qla2x00_rport_del(fcport);
  2750. }
  2751. /*
  2752. * qla2x00_abort_isp
  2753. * Resets ISP and aborts all outstanding commands.
  2754. *
  2755. * Input:
  2756. * ha = adapter block pointer.
  2757. *
  2758. * Returns:
  2759. * 0 = success
  2760. */
  2761. int
  2762. qla2x00_abort_isp(scsi_qla_host_t *ha)
  2763. {
  2764. int rval;
  2765. uint8_t status = 0;
  2766. if (ha->flags.online) {
  2767. ha->flags.online = 0;
  2768. clear_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  2769. qla_printk(KERN_INFO, ha,
  2770. "Performing ISP error recovery - ha= %p.\n", ha);
  2771. ha->isp_ops->reset_chip(ha);
  2772. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  2773. if (atomic_read(&ha->loop_state) != LOOP_DOWN) {
  2774. atomic_set(&ha->loop_state, LOOP_DOWN);
  2775. qla2x00_mark_all_devices_lost(ha, 0);
  2776. } else {
  2777. if (!atomic_read(&ha->loop_down_timer))
  2778. atomic_set(&ha->loop_down_timer,
  2779. LOOP_DOWN_TIME);
  2780. }
  2781. /* Requeue all commands in outstanding command list. */
  2782. qla2x00_abort_all_cmds(ha, DID_RESET << 16);
  2783. ha->isp_ops->get_flash_version(ha, ha->request_ring);
  2784. ha->isp_ops->nvram_config(ha);
  2785. if (!qla2x00_restart_isp(ha)) {
  2786. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2787. if (!atomic_read(&ha->loop_down_timer)) {
  2788. /*
  2789. * Issue marker command only when we are going
  2790. * to start the I/O .
  2791. */
  2792. ha->marker_needed = 1;
  2793. }
  2794. ha->flags.online = 1;
  2795. ha->isp_ops->enable_intrs(ha);
  2796. ha->isp_abort_cnt = 0;
  2797. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2798. if (ha->eft) {
  2799. memset(ha->eft, 0, EFT_SIZE);
  2800. rval = qla2x00_enable_eft_trace(ha,
  2801. ha->eft_dma, EFT_NUM_BUFFERS);
  2802. if (rval) {
  2803. qla_printk(KERN_WARNING, ha,
  2804. "Unable to reinitialize EFT "
  2805. "(%d).\n", rval);
  2806. }
  2807. }
  2808. if (ha->fce) {
  2809. ha->flags.fce_enabled = 1;
  2810. memset(ha->fce, 0,
  2811. fce_calc_size(ha->fce_bufs));
  2812. rval = qla2x00_enable_fce_trace(ha,
  2813. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2814. &ha->fce_bufs);
  2815. if (rval) {
  2816. qla_printk(KERN_WARNING, ha,
  2817. "Unable to reinitialize FCE "
  2818. "(%d).\n", rval);
  2819. ha->flags.fce_enabled = 0;
  2820. }
  2821. }
  2822. } else { /* failed the ISP abort */
  2823. ha->flags.online = 1;
  2824. if (test_bit(ISP_ABORT_RETRY, &ha->dpc_flags)) {
  2825. if (ha->isp_abort_cnt == 0) {
  2826. qla_printk(KERN_WARNING, ha,
  2827. "ISP error recovery failed - "
  2828. "board disabled\n");
  2829. /*
  2830. * The next call disables the board
  2831. * completely.
  2832. */
  2833. ha->isp_ops->reset_adapter(ha);
  2834. ha->flags.online = 0;
  2835. clear_bit(ISP_ABORT_RETRY,
  2836. &ha->dpc_flags);
  2837. status = 0;
  2838. } else { /* schedule another ISP abort */
  2839. ha->isp_abort_cnt--;
  2840. DEBUG(printk("qla%ld: ISP abort - "
  2841. "retry remaining %d\n",
  2842. ha->host_no, ha->isp_abort_cnt));
  2843. status = 1;
  2844. }
  2845. } else {
  2846. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2847. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2848. "- retrying (%d) more times\n",
  2849. ha->host_no, ha->isp_abort_cnt));
  2850. set_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2851. status = 1;
  2852. }
  2853. }
  2854. }
  2855. if (status) {
  2856. qla_printk(KERN_INFO, ha,
  2857. "qla2x00_abort_isp: **** FAILED ****\n");
  2858. } else {
  2859. DEBUG(printk(KERN_INFO
  2860. "qla2x00_abort_isp(%ld): exiting.\n",
  2861. ha->host_no));
  2862. }
  2863. return(status);
  2864. }
  2865. /*
  2866. * qla2x00_restart_isp
  2867. * restarts the ISP after a reset
  2868. *
  2869. * Input:
  2870. * ha = adapter block pointer.
  2871. *
  2872. * Returns:
  2873. * 0 = success
  2874. */
  2875. static int
  2876. qla2x00_restart_isp(scsi_qla_host_t *ha)
  2877. {
  2878. uint8_t status = 0;
  2879. uint32_t wait_time;
  2880. /* If firmware needs to be loaded */
  2881. if (qla2x00_isp_firmware(ha)) {
  2882. ha->flags.online = 0;
  2883. if (!(status = ha->isp_ops->chip_diag(ha)))
  2884. status = qla2x00_setup_chip(ha);
  2885. }
  2886. if (!status && !(status = qla2x00_init_rings(ha))) {
  2887. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2888. if (!(status = qla2x00_fw_ready(ha))) {
  2889. DEBUG(printk("%s(): Start configure loop, "
  2890. "status = %d\n", __func__, status));
  2891. /* Issue a marker after FW becomes ready. */
  2892. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2893. ha->flags.online = 1;
  2894. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2895. wait_time = 256;
  2896. do {
  2897. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2898. qla2x00_configure_loop(ha);
  2899. wait_time--;
  2900. } while (!atomic_read(&ha->loop_down_timer) &&
  2901. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2902. wait_time &&
  2903. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2904. }
  2905. /* if no cable then assume it's good */
  2906. if ((ha->device_flags & DFLG_NO_CABLE))
  2907. status = 0;
  2908. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2909. __func__,
  2910. status));
  2911. }
  2912. return (status);
  2913. }
  2914. /*
  2915. * qla2x00_reset_adapter
  2916. * Reset adapter.
  2917. *
  2918. * Input:
  2919. * ha = adapter block pointer.
  2920. */
  2921. void
  2922. qla2x00_reset_adapter(scsi_qla_host_t *ha)
  2923. {
  2924. unsigned long flags = 0;
  2925. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  2926. ha->flags.online = 0;
  2927. ha->isp_ops->disable_intrs(ha);
  2928. spin_lock_irqsave(&ha->hardware_lock, flags);
  2929. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  2930. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2931. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  2932. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2933. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2934. }
  2935. void
  2936. qla24xx_reset_adapter(scsi_qla_host_t *ha)
  2937. {
  2938. unsigned long flags = 0;
  2939. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  2940. ha->flags.online = 0;
  2941. ha->isp_ops->disable_intrs(ha);
  2942. spin_lock_irqsave(&ha->hardware_lock, flags);
  2943. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  2944. RD_REG_DWORD(&reg->hccr);
  2945. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  2946. RD_REG_DWORD(&reg->hccr);
  2947. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2948. }
  2949. /* On sparc systems, obtain port and node WWN from firmware
  2950. * properties.
  2951. */
  2952. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *ha, struct nvram_24xx *nv)
  2953. {
  2954. #ifdef CONFIG_SPARC
  2955. struct pci_dev *pdev = ha->pdev;
  2956. struct device_node *dp = pci_device_to_OF_node(pdev);
  2957. const u8 *val;
  2958. int len;
  2959. val = of_get_property(dp, "port-wwn", &len);
  2960. if (val && len >= WWN_SIZE)
  2961. memcpy(nv->port_name, val, WWN_SIZE);
  2962. val = of_get_property(dp, "node-wwn", &len);
  2963. if (val && len >= WWN_SIZE)
  2964. memcpy(nv->node_name, val, WWN_SIZE);
  2965. #endif
  2966. }
  2967. int
  2968. qla24xx_nvram_config(scsi_qla_host_t *ha)
  2969. {
  2970. int rval;
  2971. struct init_cb_24xx *icb;
  2972. struct nvram_24xx *nv;
  2973. uint32_t *dptr;
  2974. uint8_t *dptr1, *dptr2;
  2975. uint32_t chksum;
  2976. uint16_t cnt;
  2977. rval = QLA_SUCCESS;
  2978. icb = (struct init_cb_24xx *)ha->init_cb;
  2979. nv = ha->nvram;
  2980. /* Determine NVRAM starting address. */
  2981. ha->nvram_size = sizeof(struct nvram_24xx);
  2982. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  2983. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  2984. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  2985. if (PCI_FUNC(ha->pdev->devfn)) {
  2986. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  2987. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  2988. }
  2989. /* Get VPD data into cache */
  2990. ha->vpd = ha->nvram + VPD_OFFSET;
  2991. ha->isp_ops->read_nvram(ha, (uint8_t *)ha->vpd,
  2992. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  2993. /* Get NVRAM data into cache and calculate checksum. */
  2994. dptr = (uint32_t *)nv;
  2995. ha->isp_ops->read_nvram(ha, (uint8_t *)dptr, ha->nvram_base,
  2996. ha->nvram_size);
  2997. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  2998. chksum += le32_to_cpu(*dptr++);
  2999. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3000. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3001. /* Bad NVRAM data, set defaults parameters. */
  3002. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3003. || nv->id[3] != ' ' ||
  3004. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3005. /* Reset NVRAM data. */
  3006. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3007. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3008. le16_to_cpu(nv->nvram_version));
  3009. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3010. "invalid -- WWPN) defaults.\n");
  3011. /*
  3012. * Set default initialization control block.
  3013. */
  3014. memset(nv, 0, ha->nvram_size);
  3015. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3016. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3017. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3018. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3019. nv->exchange_count = __constant_cpu_to_le16(0);
  3020. nv->hard_address = __constant_cpu_to_le16(124);
  3021. nv->port_name[0] = 0x21;
  3022. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3023. nv->port_name[2] = 0x00;
  3024. nv->port_name[3] = 0xe0;
  3025. nv->port_name[4] = 0x8b;
  3026. nv->port_name[5] = 0x1c;
  3027. nv->port_name[6] = 0x55;
  3028. nv->port_name[7] = 0x86;
  3029. nv->node_name[0] = 0x20;
  3030. nv->node_name[1] = 0x00;
  3031. nv->node_name[2] = 0x00;
  3032. nv->node_name[3] = 0xe0;
  3033. nv->node_name[4] = 0x8b;
  3034. nv->node_name[5] = 0x1c;
  3035. nv->node_name[6] = 0x55;
  3036. nv->node_name[7] = 0x86;
  3037. qla24xx_nvram_wwn_from_ofw(ha, nv);
  3038. nv->login_retry_count = __constant_cpu_to_le16(8);
  3039. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3040. nv->login_timeout = __constant_cpu_to_le16(0);
  3041. nv->firmware_options_1 =
  3042. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3043. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3044. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3045. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3046. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3047. nv->efi_parameters = __constant_cpu_to_le32(0);
  3048. nv->reset_delay = 5;
  3049. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3050. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3051. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3052. rval = 1;
  3053. }
  3054. /* Reset Initialization control block */
  3055. memset(icb, 0, sizeof(struct init_cb_24xx));
  3056. /* Copy 1st segment. */
  3057. dptr1 = (uint8_t *)icb;
  3058. dptr2 = (uint8_t *)&nv->version;
  3059. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3060. while (cnt--)
  3061. *dptr1++ = *dptr2++;
  3062. icb->login_retry_count = nv->login_retry_count;
  3063. icb->link_down_on_nos = nv->link_down_on_nos;
  3064. /* Copy 2nd segment. */
  3065. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3066. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3067. cnt = (uint8_t *)&icb->reserved_3 -
  3068. (uint8_t *)&icb->interrupt_delay_timer;
  3069. while (cnt--)
  3070. *dptr1++ = *dptr2++;
  3071. /*
  3072. * Setup driver NVRAM options.
  3073. */
  3074. qla2x00_set_model_info(ha, nv->model_name, sizeof(nv->model_name),
  3075. "QLA2462");
  3076. /* Use alternate WWN? */
  3077. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3078. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3079. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3080. }
  3081. /* Prepare nodename */
  3082. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3083. /*
  3084. * Firmware will apply the following mask if the nodename was
  3085. * not provided.
  3086. */
  3087. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3088. icb->node_name[0] &= 0xF0;
  3089. }
  3090. /* Set host adapter parameters. */
  3091. ha->flags.disable_risc_code_load = 0;
  3092. ha->flags.enable_lip_reset = 0;
  3093. ha->flags.enable_lip_full_login =
  3094. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3095. ha->flags.enable_target_reset =
  3096. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3097. ha->flags.enable_led_scheme = 0;
  3098. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3099. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3100. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3101. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3102. sizeof(ha->fw_seriallink_options24));
  3103. /* save HBA serial number */
  3104. ha->serial0 = icb->port_name[5];
  3105. ha->serial1 = icb->port_name[6];
  3106. ha->serial2 = icb->port_name[7];
  3107. ha->node_name = icb->node_name;
  3108. ha->port_name = icb->port_name;
  3109. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3110. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3111. /* Set minimum login_timeout to 4 seconds. */
  3112. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3113. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3114. if (le16_to_cpu(nv->login_timeout) < 4)
  3115. nv->login_timeout = __constant_cpu_to_le16(4);
  3116. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3117. icb->login_timeout = cpu_to_le16(nv->login_timeout);
  3118. /* Set minimum RATOV to 100 tenths of a second. */
  3119. ha->r_a_tov = 100;
  3120. ha->loop_reset_delay = nv->reset_delay;
  3121. /* Link Down Timeout = 0:
  3122. *
  3123. * When Port Down timer expires we will start returning
  3124. * I/O's to OS with "DID_NO_CONNECT".
  3125. *
  3126. * Link Down Timeout != 0:
  3127. *
  3128. * The driver waits for the link to come up after link down
  3129. * before returning I/Os to OS with "DID_NO_CONNECT".
  3130. */
  3131. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3132. ha->loop_down_abort_time =
  3133. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3134. } else {
  3135. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3136. ha->loop_down_abort_time =
  3137. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3138. }
  3139. /* Need enough time to try and get the port back. */
  3140. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3141. if (qlport_down_retry)
  3142. ha->port_down_retry_count = qlport_down_retry;
  3143. /* Set login_retry_count */
  3144. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3145. if (ha->port_down_retry_count ==
  3146. le16_to_cpu(nv->port_down_retry_count) &&
  3147. ha->port_down_retry_count > 3)
  3148. ha->login_retry_count = ha->port_down_retry_count;
  3149. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3150. ha->login_retry_count = ha->port_down_retry_count;
  3151. if (ql2xloginretrycount)
  3152. ha->login_retry_count = ql2xloginretrycount;
  3153. /* Enable ZIO. */
  3154. if (!ha->flags.init_done) {
  3155. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3156. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3157. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3158. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3159. }
  3160. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3161. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3162. ha->flags.process_response_queue = 0;
  3163. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3164. ha->zio_mode = QLA_ZIO_MODE_6;
  3165. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3166. "(%d us).\n", ha->host_no, ha->zio_mode,
  3167. ha->zio_timer * 100));
  3168. qla_printk(KERN_INFO, ha,
  3169. "ZIO mode %d enabled; timer delay (%d us).\n",
  3170. ha->zio_mode, ha->zio_timer * 100);
  3171. icb->firmware_options_2 |= cpu_to_le32(
  3172. (uint32_t)ha->zio_mode);
  3173. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3174. ha->flags.process_response_queue = 1;
  3175. }
  3176. if (rval) {
  3177. DEBUG2_3(printk(KERN_WARNING
  3178. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  3179. }
  3180. return (rval);
  3181. }
  3182. static int
  3183. qla24xx_load_risc_flash(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3184. {
  3185. int rval;
  3186. int segments, fragment;
  3187. uint32_t faddr;
  3188. uint32_t *dcode, dlen;
  3189. uint32_t risc_addr;
  3190. uint32_t risc_size;
  3191. uint32_t i;
  3192. rval = QLA_SUCCESS;
  3193. segments = FA_RISC_CODE_SEGMENTS;
  3194. faddr = FA_RISC_CODE_ADDR;
  3195. dcode = (uint32_t *)ha->request_ring;
  3196. *srisc_addr = 0;
  3197. /* Validate firmware image by checking version. */
  3198. qla24xx_read_flash_data(ha, dcode, faddr + 4, 4);
  3199. for (i = 0; i < 4; i++)
  3200. dcode[i] = be32_to_cpu(dcode[i]);
  3201. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3202. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3203. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3204. dcode[3] == 0)) {
  3205. qla_printk(KERN_WARNING, ha,
  3206. "Unable to verify integrity of flash firmware image!\n");
  3207. qla_printk(KERN_WARNING, ha,
  3208. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3209. dcode[1], dcode[2], dcode[3]);
  3210. return QLA_FUNCTION_FAILED;
  3211. }
  3212. while (segments && rval == QLA_SUCCESS) {
  3213. /* Read segment's load information. */
  3214. qla24xx_read_flash_data(ha, dcode, faddr, 4);
  3215. risc_addr = be32_to_cpu(dcode[2]);
  3216. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3217. risc_size = be32_to_cpu(dcode[3]);
  3218. fragment = 0;
  3219. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3220. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3221. if (dlen > risc_size)
  3222. dlen = risc_size;
  3223. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3224. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3225. ha->host_no, risc_addr, dlen, faddr));
  3226. qla24xx_read_flash_data(ha, dcode, faddr, dlen);
  3227. for (i = 0; i < dlen; i++)
  3228. dcode[i] = swab32(dcode[i]);
  3229. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3230. dlen);
  3231. if (rval) {
  3232. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3233. "segment %d of firmware\n", ha->host_no,
  3234. fragment));
  3235. qla_printk(KERN_WARNING, ha,
  3236. "[ERROR] Failed to load segment %d of "
  3237. "firmware\n", fragment);
  3238. break;
  3239. }
  3240. faddr += dlen;
  3241. risc_addr += dlen;
  3242. risc_size -= dlen;
  3243. fragment++;
  3244. }
  3245. /* Next segment. */
  3246. segments--;
  3247. }
  3248. return rval;
  3249. }
  3250. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3251. int
  3252. qla2x00_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3253. {
  3254. int rval;
  3255. int i, fragment;
  3256. uint16_t *wcode, *fwcode;
  3257. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3258. struct fw_blob *blob;
  3259. /* Load firmware blob. */
  3260. blob = qla2x00_request_firmware(ha);
  3261. if (!blob) {
  3262. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3263. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3264. "from: " QLA_FW_URL ".\n");
  3265. return QLA_FUNCTION_FAILED;
  3266. }
  3267. rval = QLA_SUCCESS;
  3268. wcode = (uint16_t *)ha->request_ring;
  3269. *srisc_addr = 0;
  3270. fwcode = (uint16_t *)blob->fw->data;
  3271. fwclen = 0;
  3272. /* Validate firmware image by checking version. */
  3273. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3274. qla_printk(KERN_WARNING, ha,
  3275. "Unable to verify integrity of firmware image (%Zd)!\n",
  3276. blob->fw->size);
  3277. goto fail_fw_integrity;
  3278. }
  3279. for (i = 0; i < 4; i++)
  3280. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3281. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3282. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3283. wcode[2] == 0 && wcode[3] == 0)) {
  3284. qla_printk(KERN_WARNING, ha,
  3285. "Unable to verify integrity of firmware image!\n");
  3286. qla_printk(KERN_WARNING, ha,
  3287. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3288. wcode[1], wcode[2], wcode[3]);
  3289. goto fail_fw_integrity;
  3290. }
  3291. seg = blob->segs;
  3292. while (*seg && rval == QLA_SUCCESS) {
  3293. risc_addr = *seg;
  3294. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3295. risc_size = be16_to_cpu(fwcode[3]);
  3296. /* Validate firmware image size. */
  3297. fwclen += risc_size * sizeof(uint16_t);
  3298. if (blob->fw->size < fwclen) {
  3299. qla_printk(KERN_WARNING, ha,
  3300. "Unable to verify integrity of firmware image "
  3301. "(%Zd)!\n", blob->fw->size);
  3302. goto fail_fw_integrity;
  3303. }
  3304. fragment = 0;
  3305. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3306. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3307. if (wlen > risc_size)
  3308. wlen = risc_size;
  3309. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3310. "addr %x, number of words 0x%x.\n", ha->host_no,
  3311. risc_addr, wlen));
  3312. for (i = 0; i < wlen; i++)
  3313. wcode[i] = swab16(fwcode[i]);
  3314. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3315. wlen);
  3316. if (rval) {
  3317. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3318. "segment %d of firmware\n", ha->host_no,
  3319. fragment));
  3320. qla_printk(KERN_WARNING, ha,
  3321. "[ERROR] Failed to load segment %d of "
  3322. "firmware\n", fragment);
  3323. break;
  3324. }
  3325. fwcode += wlen;
  3326. risc_addr += wlen;
  3327. risc_size -= wlen;
  3328. fragment++;
  3329. }
  3330. /* Next segment. */
  3331. seg++;
  3332. }
  3333. return rval;
  3334. fail_fw_integrity:
  3335. return QLA_FUNCTION_FAILED;
  3336. }
  3337. int
  3338. qla24xx_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3339. {
  3340. int rval;
  3341. int segments, fragment;
  3342. uint32_t *dcode, dlen;
  3343. uint32_t risc_addr;
  3344. uint32_t risc_size;
  3345. uint32_t i;
  3346. struct fw_blob *blob;
  3347. uint32_t *fwcode, fwclen;
  3348. /* Load firmware blob. */
  3349. blob = qla2x00_request_firmware(ha);
  3350. if (!blob) {
  3351. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3352. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3353. "from: " QLA_FW_URL ".\n");
  3354. /* Try to load RISC code from flash. */
  3355. qla_printk(KERN_ERR, ha, "Attempting to load (potentially "
  3356. "outdated) firmware from flash.\n");
  3357. return qla24xx_load_risc_flash(ha, srisc_addr);
  3358. }
  3359. rval = QLA_SUCCESS;
  3360. segments = FA_RISC_CODE_SEGMENTS;
  3361. dcode = (uint32_t *)ha->request_ring;
  3362. *srisc_addr = 0;
  3363. fwcode = (uint32_t *)blob->fw->data;
  3364. fwclen = 0;
  3365. /* Validate firmware image by checking version. */
  3366. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3367. qla_printk(KERN_WARNING, ha,
  3368. "Unable to verify integrity of firmware image (%Zd)!\n",
  3369. blob->fw->size);
  3370. goto fail_fw_integrity;
  3371. }
  3372. for (i = 0; i < 4; i++)
  3373. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3374. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3375. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3376. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3377. dcode[3] == 0)) {
  3378. qla_printk(KERN_WARNING, ha,
  3379. "Unable to verify integrity of firmware image!\n");
  3380. qla_printk(KERN_WARNING, ha,
  3381. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3382. dcode[1], dcode[2], dcode[3]);
  3383. goto fail_fw_integrity;
  3384. }
  3385. while (segments && rval == QLA_SUCCESS) {
  3386. risc_addr = be32_to_cpu(fwcode[2]);
  3387. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3388. risc_size = be32_to_cpu(fwcode[3]);
  3389. /* Validate firmware image size. */
  3390. fwclen += risc_size * sizeof(uint32_t);
  3391. if (blob->fw->size < fwclen) {
  3392. qla_printk(KERN_WARNING, ha,
  3393. "Unable to verify integrity of firmware image "
  3394. "(%Zd)!\n", blob->fw->size);
  3395. goto fail_fw_integrity;
  3396. }
  3397. fragment = 0;
  3398. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3399. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3400. if (dlen > risc_size)
  3401. dlen = risc_size;
  3402. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3403. "addr %x, number of dwords 0x%x.\n", ha->host_no,
  3404. risc_addr, dlen));
  3405. for (i = 0; i < dlen; i++)
  3406. dcode[i] = swab32(fwcode[i]);
  3407. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3408. dlen);
  3409. if (rval) {
  3410. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3411. "segment %d of firmware\n", ha->host_no,
  3412. fragment));
  3413. qla_printk(KERN_WARNING, ha,
  3414. "[ERROR] Failed to load segment %d of "
  3415. "firmware\n", fragment);
  3416. break;
  3417. }
  3418. fwcode += dlen;
  3419. risc_addr += dlen;
  3420. risc_size -= dlen;
  3421. fragment++;
  3422. }
  3423. /* Next segment. */
  3424. segments--;
  3425. }
  3426. return rval;
  3427. fail_fw_integrity:
  3428. return QLA_FUNCTION_FAILED;
  3429. }
  3430. void
  3431. qla2x00_try_to_stop_firmware(scsi_qla_host_t *ha)
  3432. {
  3433. int ret, retries;
  3434. if (!IS_FWI2_CAPABLE(ha))
  3435. return;
  3436. if (!ha->fw_major_version)
  3437. return;
  3438. ret = qla2x00_stop_firmware(ha);
  3439. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3440. retries ; retries--) {
  3441. qla2x00_reset_chip(ha);
  3442. if (qla2x00_chip_diag(ha) != QLA_SUCCESS)
  3443. continue;
  3444. if (qla2x00_setup_chip(ha) != QLA_SUCCESS)
  3445. continue;
  3446. qla_printk(KERN_INFO, ha,
  3447. "Attempting retry of stop-firmware command...\n");
  3448. ret = qla2x00_stop_firmware(ha);
  3449. }
  3450. }
  3451. int
  3452. qla24xx_configure_vhba(scsi_qla_host_t *ha)
  3453. {
  3454. int rval = QLA_SUCCESS;
  3455. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3456. if (!ha->parent)
  3457. return -EINVAL;
  3458. rval = qla2x00_fw_ready(ha);
  3459. if (rval == QLA_SUCCESS) {
  3460. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  3461. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  3462. }
  3463. ha->flags.management_server_logged_in = 0;
  3464. /* Login to SNS first */
  3465. qla24xx_login_fabric(ha, NPH_SNS, 0xff, 0xff, 0xfc,
  3466. mb, BIT_1);
  3467. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3468. DEBUG15(qla_printk(KERN_INFO, ha,
  3469. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3470. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3471. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3472. return (QLA_FUNCTION_FAILED);
  3473. }
  3474. atomic_set(&ha->loop_down_timer, 0);
  3475. atomic_set(&ha->loop_state, LOOP_UP);
  3476. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  3477. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  3478. rval = qla2x00_loop_resync(ha);
  3479. return rval;
  3480. }
  3481. /* 84XX Support **************************************************************/
  3482. static LIST_HEAD(qla_cs84xx_list);
  3483. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3484. static struct qla_chip_state_84xx *
  3485. qla84xx_get_chip(struct scsi_qla_host *ha)
  3486. {
  3487. struct qla_chip_state_84xx *cs84xx;
  3488. mutex_lock(&qla_cs84xx_mutex);
  3489. /* Find any shared 84xx chip. */
  3490. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3491. if (cs84xx->bus == ha->pdev->bus) {
  3492. kref_get(&cs84xx->kref);
  3493. goto done;
  3494. }
  3495. }
  3496. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3497. if (!cs84xx)
  3498. goto done;
  3499. kref_init(&cs84xx->kref);
  3500. spin_lock_init(&cs84xx->access_lock);
  3501. mutex_init(&cs84xx->fw_update_mutex);
  3502. cs84xx->bus = ha->pdev->bus;
  3503. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3504. done:
  3505. mutex_unlock(&qla_cs84xx_mutex);
  3506. return cs84xx;
  3507. }
  3508. static void
  3509. __qla84xx_chip_release(struct kref *kref)
  3510. {
  3511. struct qla_chip_state_84xx *cs84xx =
  3512. container_of(kref, struct qla_chip_state_84xx, kref);
  3513. mutex_lock(&qla_cs84xx_mutex);
  3514. list_del(&cs84xx->list);
  3515. mutex_unlock(&qla_cs84xx_mutex);
  3516. kfree(cs84xx);
  3517. }
  3518. void
  3519. qla84xx_put_chip(struct scsi_qla_host *ha)
  3520. {
  3521. if (ha->cs84xx)
  3522. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3523. }
  3524. static int
  3525. qla84xx_init_chip(scsi_qla_host_t *ha)
  3526. {
  3527. int rval;
  3528. uint16_t status[2];
  3529. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3530. rval = qla84xx_verify_chip(ha, status);
  3531. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3532. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3533. QLA_SUCCESS;
  3534. }