spu_base.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752
  1. /*
  2. * Low-level SPU handling
  3. *
  4. * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
  5. *
  6. * Author: Arnd Bergmann <arndb@de.ibm.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2, or (at your option)
  11. * any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #undef DEBUG
  23. #include <linux/interrupt.h>
  24. #include <linux/list.h>
  25. #include <linux/module.h>
  26. #include <linux/ptrace.h>
  27. #include <linux/slab.h>
  28. #include <linux/wait.h>
  29. #include <linux/mm.h>
  30. #include <linux/io.h>
  31. #include <linux/mutex.h>
  32. #include <linux/linux_logo.h>
  33. #include <asm/spu.h>
  34. #include <asm/spu_priv1.h>
  35. #include <asm/spu_csa.h>
  36. #include <asm/xmon.h>
  37. #include <asm/prom.h>
  38. const struct spu_management_ops *spu_management_ops;
  39. EXPORT_SYMBOL_GPL(spu_management_ops);
  40. const struct spu_priv1_ops *spu_priv1_ops;
  41. EXPORT_SYMBOL_GPL(spu_priv1_ops);
  42. struct cbe_spu_info cbe_spu_info[MAX_NUMNODES];
  43. EXPORT_SYMBOL_GPL(cbe_spu_info);
  44. /*
  45. * The spufs fault-handling code needs to call force_sig_info to raise signals
  46. * on DMA errors. Export it here to avoid general kernel-wide access to this
  47. * function
  48. */
  49. EXPORT_SYMBOL_GPL(force_sig_info);
  50. /*
  51. * Protects cbe_spu_info and spu->number.
  52. */
  53. static DEFINE_SPINLOCK(spu_lock);
  54. /*
  55. * List of all spus in the system.
  56. *
  57. * This list is iterated by callers from irq context and callers that
  58. * want to sleep. Thus modifications need to be done with both
  59. * spu_full_list_lock and spu_full_list_mutex held, while iterating
  60. * through it requires either of these locks.
  61. *
  62. * In addition spu_full_list_lock protects all assignmens to
  63. * spu->mm.
  64. */
  65. static LIST_HEAD(spu_full_list);
  66. static DEFINE_SPINLOCK(spu_full_list_lock);
  67. static DEFINE_MUTEX(spu_full_list_mutex);
  68. struct spu_slb {
  69. u64 esid, vsid;
  70. };
  71. void spu_invalidate_slbs(struct spu *spu)
  72. {
  73. struct spu_priv2 __iomem *priv2 = spu->priv2;
  74. if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
  75. out_be64(&priv2->slb_invalidate_all_W, 0UL);
  76. }
  77. EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
  78. /* This is called by the MM core when a segment size is changed, to
  79. * request a flush of all the SPEs using a given mm
  80. */
  81. void spu_flush_all_slbs(struct mm_struct *mm)
  82. {
  83. struct spu *spu;
  84. unsigned long flags;
  85. spin_lock_irqsave(&spu_full_list_lock, flags);
  86. list_for_each_entry(spu, &spu_full_list, full_list) {
  87. if (spu->mm == mm)
  88. spu_invalidate_slbs(spu);
  89. }
  90. spin_unlock_irqrestore(&spu_full_list_lock, flags);
  91. }
  92. /* The hack below stinks... try to do something better one of
  93. * these days... Does it even work properly with NR_CPUS == 1 ?
  94. */
  95. static inline void mm_needs_global_tlbie(struct mm_struct *mm)
  96. {
  97. int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
  98. /* Global TLBIE broadcast required with SPEs. */
  99. __cpus_setall(&mm->cpu_vm_mask, nr);
  100. }
  101. void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
  102. {
  103. unsigned long flags;
  104. spin_lock_irqsave(&spu_full_list_lock, flags);
  105. spu->mm = mm;
  106. spin_unlock_irqrestore(&spu_full_list_lock, flags);
  107. if (mm)
  108. mm_needs_global_tlbie(mm);
  109. }
  110. EXPORT_SYMBOL_GPL(spu_associate_mm);
  111. static int __spu_trap_invalid_dma(struct spu *spu)
  112. {
  113. pr_debug("%s\n", __FUNCTION__);
  114. spu->dma_callback(spu, SPE_EVENT_INVALID_DMA);
  115. return 0;
  116. }
  117. static int __spu_trap_dma_align(struct spu *spu)
  118. {
  119. pr_debug("%s\n", __FUNCTION__);
  120. spu->dma_callback(spu, SPE_EVENT_DMA_ALIGNMENT);
  121. return 0;
  122. }
  123. static int __spu_trap_error(struct spu *spu)
  124. {
  125. pr_debug("%s\n", __FUNCTION__);
  126. spu->dma_callback(spu, SPE_EVENT_SPE_ERROR);
  127. return 0;
  128. }
  129. static void spu_restart_dma(struct spu *spu)
  130. {
  131. struct spu_priv2 __iomem *priv2 = spu->priv2;
  132. if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
  133. out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
  134. }
  135. static inline void spu_load_slb(struct spu *spu, int slbe, struct spu_slb *slb)
  136. {
  137. struct spu_priv2 __iomem *priv2 = spu->priv2;
  138. pr_debug("%s: adding SLB[%d] 0x%016lx 0x%016lx\n",
  139. __func__, slbe, slb->vsid, slb->esid);
  140. out_be64(&priv2->slb_index_W, slbe);
  141. out_be64(&priv2->slb_vsid_RW, slb->vsid);
  142. out_be64(&priv2->slb_esid_RW, slb->esid);
  143. }
  144. static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
  145. {
  146. struct mm_struct *mm = spu->mm;
  147. struct spu_slb slb;
  148. int psize;
  149. pr_debug("%s\n", __FUNCTION__);
  150. if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
  151. /* SLBs are pre-loaded for context switch, so
  152. * we should never get here!
  153. */
  154. printk("%s: invalid access during switch!\n", __func__);
  155. return 1;
  156. }
  157. slb.esid = (ea & ESID_MASK) | SLB_ESID_V;
  158. switch(REGION_ID(ea)) {
  159. case USER_REGION_ID:
  160. #ifdef CONFIG_PPC_MM_SLICES
  161. psize = get_slice_psize(mm, ea);
  162. #else
  163. psize = mm->context.user_psize;
  164. #endif
  165. slb.vsid = (get_vsid(mm->context.id, ea, MMU_SEGSIZE_256M)
  166. << SLB_VSID_SHIFT) | SLB_VSID_USER;
  167. break;
  168. case VMALLOC_REGION_ID:
  169. if (ea < VMALLOC_END)
  170. psize = mmu_vmalloc_psize;
  171. else
  172. psize = mmu_io_psize;
  173. slb.vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M)
  174. << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
  175. break;
  176. case KERNEL_REGION_ID:
  177. psize = mmu_linear_psize;
  178. slb.vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M)
  179. << SLB_VSID_SHIFT) | SLB_VSID_KERNEL;
  180. break;
  181. default:
  182. /* Future: support kernel segments so that drivers
  183. * can use SPUs.
  184. */
  185. pr_debug("invalid region access at %016lx\n", ea);
  186. return 1;
  187. }
  188. slb.vsid |= mmu_psize_defs[psize].sllp;
  189. spu_load_slb(spu, spu->slb_replace, &slb);
  190. spu->slb_replace++;
  191. if (spu->slb_replace >= 8)
  192. spu->slb_replace = 0;
  193. spu_restart_dma(spu);
  194. spu->stats.slb_flt++;
  195. return 0;
  196. }
  197. extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
  198. static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
  199. {
  200. pr_debug("%s, %lx, %lx\n", __FUNCTION__, dsisr, ea);
  201. /* Handle kernel space hash faults immediately.
  202. User hash faults need to be deferred to process context. */
  203. if ((dsisr & MFC_DSISR_PTE_NOT_FOUND)
  204. && REGION_ID(ea) != USER_REGION_ID
  205. && hash_page(ea, _PAGE_PRESENT, 0x300) == 0) {
  206. spu_restart_dma(spu);
  207. return 0;
  208. }
  209. if (test_bit(SPU_CONTEXT_SWITCH_ACTIVE, &spu->flags)) {
  210. printk("%s: invalid access during switch!\n", __func__);
  211. return 1;
  212. }
  213. spu->dar = ea;
  214. spu->dsisr = dsisr;
  215. mb();
  216. spu->stop_callback(spu);
  217. return 0;
  218. }
  219. static void __spu_kernel_slb(void *addr, struct spu_slb *slb)
  220. {
  221. unsigned long ea = (unsigned long)addr;
  222. u64 llp;
  223. if (REGION_ID(ea) == KERNEL_REGION_ID)
  224. llp = mmu_psize_defs[mmu_linear_psize].sllp;
  225. else
  226. llp = mmu_psize_defs[mmu_virtual_psize].sllp;
  227. slb->vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
  228. SLB_VSID_KERNEL | llp;
  229. slb->esid = (ea & ESID_MASK) | SLB_ESID_V;
  230. }
  231. /**
  232. * Setup the SPU kernel SLBs, in preparation for a context save/restore. We
  233. * need to map both the context save area, and the save/restore code.
  234. */
  235. void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa, void *code)
  236. {
  237. struct spu_slb code_slb, lscsa_slb;
  238. __spu_kernel_slb(lscsa, &lscsa_slb);
  239. __spu_kernel_slb(code, &code_slb);
  240. spu_load_slb(spu, 0, &lscsa_slb);
  241. if (lscsa_slb.esid != code_slb.esid)
  242. spu_load_slb(spu, 1, &code_slb);
  243. }
  244. EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs);
  245. static irqreturn_t
  246. spu_irq_class_0(int irq, void *data)
  247. {
  248. struct spu *spu;
  249. unsigned long stat, mask;
  250. spu = data;
  251. mask = spu_int_mask_get(spu, 0);
  252. stat = spu_int_stat_get(spu, 0);
  253. stat &= mask;
  254. spin_lock(&spu->register_lock);
  255. spu->class_0_pending |= stat;
  256. spin_unlock(&spu->register_lock);
  257. spu->stop_callback(spu);
  258. spu_int_stat_clear(spu, 0, stat);
  259. return IRQ_HANDLED;
  260. }
  261. int
  262. spu_irq_class_0_bottom(struct spu *spu)
  263. {
  264. unsigned long flags;
  265. unsigned long stat;
  266. spin_lock_irqsave(&spu->register_lock, flags);
  267. stat = spu->class_0_pending;
  268. spu->class_0_pending = 0;
  269. if (stat & 1) /* invalid DMA alignment */
  270. __spu_trap_dma_align(spu);
  271. if (stat & 2) /* invalid MFC DMA */
  272. __spu_trap_invalid_dma(spu);
  273. if (stat & 4) /* error on SPU */
  274. __spu_trap_error(spu);
  275. spin_unlock_irqrestore(&spu->register_lock, flags);
  276. return (stat & 0x7) ? -EIO : 0;
  277. }
  278. EXPORT_SYMBOL_GPL(spu_irq_class_0_bottom);
  279. static irqreturn_t
  280. spu_irq_class_1(int irq, void *data)
  281. {
  282. struct spu *spu;
  283. unsigned long stat, mask, dar, dsisr;
  284. spu = data;
  285. /* atomically read & clear class1 status. */
  286. spin_lock(&spu->register_lock);
  287. mask = spu_int_mask_get(spu, 1);
  288. stat = spu_int_stat_get(spu, 1) & mask;
  289. dar = spu_mfc_dar_get(spu);
  290. dsisr = spu_mfc_dsisr_get(spu);
  291. if (stat & 2) /* mapping fault */
  292. spu_mfc_dsisr_set(spu, 0ul);
  293. spu_int_stat_clear(spu, 1, stat);
  294. spin_unlock(&spu->register_lock);
  295. pr_debug("%s: %lx %lx %lx %lx\n", __FUNCTION__, mask, stat,
  296. dar, dsisr);
  297. if (stat & 1) /* segment fault */
  298. __spu_trap_data_seg(spu, dar);
  299. if (stat & 2) { /* mapping fault */
  300. __spu_trap_data_map(spu, dar, dsisr);
  301. }
  302. if (stat & 4) /* ls compare & suspend on get */
  303. ;
  304. if (stat & 8) /* ls compare & suspend on put */
  305. ;
  306. return stat ? IRQ_HANDLED : IRQ_NONE;
  307. }
  308. static irqreturn_t
  309. spu_irq_class_2(int irq, void *data)
  310. {
  311. struct spu *spu;
  312. unsigned long stat;
  313. unsigned long mask;
  314. spu = data;
  315. spin_lock(&spu->register_lock);
  316. stat = spu_int_stat_get(spu, 2);
  317. mask = spu_int_mask_get(spu, 2);
  318. /* ignore interrupts we're not waiting for */
  319. stat &= mask;
  320. /*
  321. * mailbox interrupts (0x1 and 0x10) are level triggered.
  322. * mask them now before acknowledging.
  323. */
  324. if (stat & 0x11)
  325. spu_int_mask_and(spu, 2, ~(stat & 0x11));
  326. /* acknowledge all interrupts before the callbacks */
  327. spu_int_stat_clear(spu, 2, stat);
  328. spin_unlock(&spu->register_lock);
  329. pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
  330. if (stat & 1) /* PPC core mailbox */
  331. spu->ibox_callback(spu);
  332. if (stat & 2) /* SPU stop-and-signal */
  333. spu->stop_callback(spu);
  334. if (stat & 4) /* SPU halted */
  335. spu->stop_callback(spu);
  336. if (stat & 8) /* DMA tag group complete */
  337. spu->mfc_callback(spu);
  338. if (stat & 0x10) /* SPU mailbox threshold */
  339. spu->wbox_callback(spu);
  340. spu->stats.class2_intr++;
  341. return stat ? IRQ_HANDLED : IRQ_NONE;
  342. }
  343. static int spu_request_irqs(struct spu *spu)
  344. {
  345. int ret = 0;
  346. if (spu->irqs[0] != NO_IRQ) {
  347. snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
  348. spu->number);
  349. ret = request_irq(spu->irqs[0], spu_irq_class_0,
  350. IRQF_DISABLED,
  351. spu->irq_c0, spu);
  352. if (ret)
  353. goto bail0;
  354. }
  355. if (spu->irqs[1] != NO_IRQ) {
  356. snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
  357. spu->number);
  358. ret = request_irq(spu->irqs[1], spu_irq_class_1,
  359. IRQF_DISABLED,
  360. spu->irq_c1, spu);
  361. if (ret)
  362. goto bail1;
  363. }
  364. if (spu->irqs[2] != NO_IRQ) {
  365. snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
  366. spu->number);
  367. ret = request_irq(spu->irqs[2], spu_irq_class_2,
  368. IRQF_DISABLED,
  369. spu->irq_c2, spu);
  370. if (ret)
  371. goto bail2;
  372. }
  373. return 0;
  374. bail2:
  375. if (spu->irqs[1] != NO_IRQ)
  376. free_irq(spu->irqs[1], spu);
  377. bail1:
  378. if (spu->irqs[0] != NO_IRQ)
  379. free_irq(spu->irqs[0], spu);
  380. bail0:
  381. return ret;
  382. }
  383. static void spu_free_irqs(struct spu *spu)
  384. {
  385. if (spu->irqs[0] != NO_IRQ)
  386. free_irq(spu->irqs[0], spu);
  387. if (spu->irqs[1] != NO_IRQ)
  388. free_irq(spu->irqs[1], spu);
  389. if (spu->irqs[2] != NO_IRQ)
  390. free_irq(spu->irqs[2], spu);
  391. }
  392. void spu_init_channels(struct spu *spu)
  393. {
  394. static const struct {
  395. unsigned channel;
  396. unsigned count;
  397. } zero_list[] = {
  398. { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
  399. { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
  400. }, count_list[] = {
  401. { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
  402. { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
  403. { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
  404. };
  405. struct spu_priv2 __iomem *priv2;
  406. int i;
  407. priv2 = spu->priv2;
  408. /* initialize all channel data to zero */
  409. for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
  410. int count;
  411. out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
  412. for (count = 0; count < zero_list[i].count; count++)
  413. out_be64(&priv2->spu_chnldata_RW, 0);
  414. }
  415. /* initialize channel counts to meaningful values */
  416. for (i = 0; i < ARRAY_SIZE(count_list); i++) {
  417. out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
  418. out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
  419. }
  420. }
  421. EXPORT_SYMBOL_GPL(spu_init_channels);
  422. static int spu_shutdown(struct sys_device *sysdev)
  423. {
  424. struct spu *spu = container_of(sysdev, struct spu, sysdev);
  425. spu_free_irqs(spu);
  426. spu_destroy_spu(spu);
  427. return 0;
  428. }
  429. static struct sysdev_class spu_sysdev_class = {
  430. set_kset_name("spu"),
  431. .shutdown = spu_shutdown,
  432. };
  433. int spu_add_sysdev_attr(struct sysdev_attribute *attr)
  434. {
  435. struct spu *spu;
  436. mutex_lock(&spu_full_list_mutex);
  437. list_for_each_entry(spu, &spu_full_list, full_list)
  438. sysdev_create_file(&spu->sysdev, attr);
  439. mutex_unlock(&spu_full_list_mutex);
  440. return 0;
  441. }
  442. EXPORT_SYMBOL_GPL(spu_add_sysdev_attr);
  443. int spu_add_sysdev_attr_group(struct attribute_group *attrs)
  444. {
  445. struct spu *spu;
  446. mutex_lock(&spu_full_list_mutex);
  447. list_for_each_entry(spu, &spu_full_list, full_list)
  448. sysfs_create_group(&spu->sysdev.kobj, attrs);
  449. mutex_unlock(&spu_full_list_mutex);
  450. return 0;
  451. }
  452. EXPORT_SYMBOL_GPL(spu_add_sysdev_attr_group);
  453. void spu_remove_sysdev_attr(struct sysdev_attribute *attr)
  454. {
  455. struct spu *spu;
  456. mutex_lock(&spu_full_list_mutex);
  457. list_for_each_entry(spu, &spu_full_list, full_list)
  458. sysdev_remove_file(&spu->sysdev, attr);
  459. mutex_unlock(&spu_full_list_mutex);
  460. }
  461. EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr);
  462. void spu_remove_sysdev_attr_group(struct attribute_group *attrs)
  463. {
  464. struct spu *spu;
  465. mutex_lock(&spu_full_list_mutex);
  466. list_for_each_entry(spu, &spu_full_list, full_list)
  467. sysfs_remove_group(&spu->sysdev.kobj, attrs);
  468. mutex_unlock(&spu_full_list_mutex);
  469. }
  470. EXPORT_SYMBOL_GPL(spu_remove_sysdev_attr_group);
  471. static int spu_create_sysdev(struct spu *spu)
  472. {
  473. int ret;
  474. spu->sysdev.id = spu->number;
  475. spu->sysdev.cls = &spu_sysdev_class;
  476. ret = sysdev_register(&spu->sysdev);
  477. if (ret) {
  478. printk(KERN_ERR "Can't register SPU %d with sysfs\n",
  479. spu->number);
  480. return ret;
  481. }
  482. sysfs_add_device_to_node(&spu->sysdev, spu->node);
  483. return 0;
  484. }
  485. static int __init create_spu(void *data)
  486. {
  487. struct spu *spu;
  488. int ret;
  489. static int number;
  490. unsigned long flags;
  491. struct timespec ts;
  492. ret = -ENOMEM;
  493. spu = kzalloc(sizeof (*spu), GFP_KERNEL);
  494. if (!spu)
  495. goto out;
  496. spu->alloc_state = SPU_FREE;
  497. spin_lock_init(&spu->register_lock);
  498. spin_lock(&spu_lock);
  499. spu->number = number++;
  500. spin_unlock(&spu_lock);
  501. ret = spu_create_spu(spu, data);
  502. if (ret)
  503. goto out_free;
  504. spu_mfc_sdr_setup(spu);
  505. spu_mfc_sr1_set(spu, 0x33);
  506. ret = spu_request_irqs(spu);
  507. if (ret)
  508. goto out_destroy;
  509. ret = spu_create_sysdev(spu);
  510. if (ret)
  511. goto out_free_irqs;
  512. mutex_lock(&cbe_spu_info[spu->node].list_mutex);
  513. list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus);
  514. cbe_spu_info[spu->node].n_spus++;
  515. mutex_unlock(&cbe_spu_info[spu->node].list_mutex);
  516. mutex_lock(&spu_full_list_mutex);
  517. spin_lock_irqsave(&spu_full_list_lock, flags);
  518. list_add(&spu->full_list, &spu_full_list);
  519. spin_unlock_irqrestore(&spu_full_list_lock, flags);
  520. mutex_unlock(&spu_full_list_mutex);
  521. spu->stats.util_state = SPU_UTIL_IDLE_LOADED;
  522. ktime_get_ts(&ts);
  523. spu->stats.tstamp = timespec_to_ns(&ts);
  524. INIT_LIST_HEAD(&spu->aff_list);
  525. goto out;
  526. out_free_irqs:
  527. spu_free_irqs(spu);
  528. out_destroy:
  529. spu_destroy_spu(spu);
  530. out_free:
  531. kfree(spu);
  532. out:
  533. return ret;
  534. }
  535. static const char *spu_state_names[] = {
  536. "user", "system", "iowait", "idle"
  537. };
  538. static unsigned long long spu_acct_time(struct spu *spu,
  539. enum spu_utilization_state state)
  540. {
  541. struct timespec ts;
  542. unsigned long long time = spu->stats.times[state];
  543. /*
  544. * If the spu is idle or the context is stopped, utilization
  545. * statistics are not updated. Apply the time delta from the
  546. * last recorded state of the spu.
  547. */
  548. if (spu->stats.util_state == state) {
  549. ktime_get_ts(&ts);
  550. time += timespec_to_ns(&ts) - spu->stats.tstamp;
  551. }
  552. return time / NSEC_PER_MSEC;
  553. }
  554. static ssize_t spu_stat_show(struct sys_device *sysdev, char *buf)
  555. {
  556. struct spu *spu = container_of(sysdev, struct spu, sysdev);
  557. return sprintf(buf, "%s %llu %llu %llu %llu "
  558. "%llu %llu %llu %llu %llu %llu %llu %llu\n",
  559. spu_state_names[spu->stats.util_state],
  560. spu_acct_time(spu, SPU_UTIL_USER),
  561. spu_acct_time(spu, SPU_UTIL_SYSTEM),
  562. spu_acct_time(spu, SPU_UTIL_IOWAIT),
  563. spu_acct_time(spu, SPU_UTIL_IDLE_LOADED),
  564. spu->stats.vol_ctx_switch,
  565. spu->stats.invol_ctx_switch,
  566. spu->stats.slb_flt,
  567. spu->stats.hash_flt,
  568. spu->stats.min_flt,
  569. spu->stats.maj_flt,
  570. spu->stats.class2_intr,
  571. spu->stats.libassist);
  572. }
  573. static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL);
  574. static int __init init_spu_base(void)
  575. {
  576. int i, ret = 0;
  577. for (i = 0; i < MAX_NUMNODES; i++) {
  578. mutex_init(&cbe_spu_info[i].list_mutex);
  579. INIT_LIST_HEAD(&cbe_spu_info[i].spus);
  580. }
  581. if (!spu_management_ops)
  582. goto out;
  583. /* create sysdev class for spus */
  584. ret = sysdev_class_register(&spu_sysdev_class);
  585. if (ret)
  586. goto out;
  587. ret = spu_enumerate_spus(create_spu);
  588. if (ret < 0) {
  589. printk(KERN_WARNING "%s: Error initializing spus\n",
  590. __FUNCTION__);
  591. goto out_unregister_sysdev_class;
  592. }
  593. if (ret > 0) {
  594. /*
  595. * We cannot put the forward declaration in
  596. * <linux/linux_logo.h> because of conflicting session type
  597. * conflicts for const and __initdata with different compiler
  598. * versions
  599. */
  600. extern const struct linux_logo logo_spe_clut224;
  601. fb_append_extra_logo(&logo_spe_clut224, ret);
  602. }
  603. mutex_lock(&spu_full_list_mutex);
  604. xmon_register_spus(&spu_full_list);
  605. crash_register_spus(&spu_full_list);
  606. mutex_unlock(&spu_full_list_mutex);
  607. spu_add_sysdev_attr(&attr_stat);
  608. spu_init_affinity();
  609. return 0;
  610. out_unregister_sysdev_class:
  611. sysdev_class_unregister(&spu_sysdev_class);
  612. out:
  613. return ret;
  614. }
  615. module_init(init_spu_base);
  616. MODULE_LICENSE("GPL");
  617. MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");