regmap.h 14 KB

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  1. #ifndef __LINUX_REGMAP_H
  2. #define __LINUX_REGMAP_H
  3. /*
  4. * Register map access API
  5. *
  6. * Copyright 2011 Wolfson Microelectronics plc
  7. *
  8. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/list.h>
  15. #include <linux/rbtree.h>
  16. struct module;
  17. struct device;
  18. struct i2c_client;
  19. struct irq_domain;
  20. struct spi_device;
  21. struct regmap;
  22. struct regmap_range_cfg;
  23. /* An enum of all the supported cache types */
  24. enum regcache_type {
  25. REGCACHE_NONE,
  26. REGCACHE_RBTREE,
  27. REGCACHE_COMPRESSED
  28. };
  29. /**
  30. * Default value for a register. We use an array of structs rather
  31. * than a simple array as many modern devices have very sparse
  32. * register maps.
  33. *
  34. * @reg: Register address.
  35. * @def: Register default value.
  36. */
  37. struct reg_default {
  38. unsigned int reg;
  39. unsigned int def;
  40. };
  41. #ifdef CONFIG_REGMAP
  42. enum regmap_endian {
  43. /* Unspecified -> 0 -> Backwards compatible default */
  44. REGMAP_ENDIAN_DEFAULT = 0,
  45. REGMAP_ENDIAN_BIG,
  46. REGMAP_ENDIAN_LITTLE,
  47. REGMAP_ENDIAN_NATIVE,
  48. };
  49. /**
  50. * Configuration for the register map of a device.
  51. *
  52. * @name: Optional name of the regmap. Useful when a device has multiple
  53. * register regions.
  54. *
  55. * @reg_bits: Number of bits in a register address, mandatory.
  56. * @reg_stride: The register address stride. Valid register addresses are a
  57. * multiple of this value. If set to 0, a value of 1 will be
  58. * used.
  59. * @pad_bits: Number of bits of padding between register and value.
  60. * @val_bits: Number of bits in a register value, mandatory.
  61. *
  62. * @writeable_reg: Optional callback returning true if the register
  63. * can be written to.
  64. * @readable_reg: Optional callback returning true if the register
  65. * can be read from.
  66. * @volatile_reg: Optional callback returning true if the register
  67. * value can't be cached.
  68. * @precious_reg: Optional callback returning true if the rgister
  69. * should not be read outside of a call from the driver
  70. * (eg, a clear on read interrupt status register).
  71. *
  72. * @max_register: Optional, specifies the maximum valid register index.
  73. * @reg_defaults: Power on reset values for registers (for use with
  74. * register cache support).
  75. * @num_reg_defaults: Number of elements in reg_defaults.
  76. *
  77. * @read_flag_mask: Mask to be set in the top byte of the register when doing
  78. * a read.
  79. * @write_flag_mask: Mask to be set in the top byte of the register when doing
  80. * a write. If both read_flag_mask and write_flag_mask are
  81. * empty the regmap_bus default masks are used.
  82. * @use_single_rw: If set, converts the bulk read and write operations into
  83. * a series of single read and write operations. This is useful
  84. * for device that does not support bulk read and write.
  85. *
  86. * @cache_type: The actual cache type.
  87. * @reg_defaults_raw: Power on reset values for registers (for use with
  88. * register cache support).
  89. * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
  90. * @reg_format_endian: Endianness for formatted register addresses. If this is
  91. * DEFAULT, the @reg_format_endian_default value from the
  92. * regmap bus is used.
  93. * @val_format_endian: Endianness for formatted register values. If this is
  94. * DEFAULT, the @reg_format_endian_default value from the
  95. * regmap bus is used.
  96. *
  97. * @ranges: Array of configuration entries for virtual address ranges.
  98. * @num_ranges: Number of range configuration entries.
  99. */
  100. struct regmap_config {
  101. const char *name;
  102. int reg_bits;
  103. int reg_stride;
  104. int pad_bits;
  105. int val_bits;
  106. bool (*writeable_reg)(struct device *dev, unsigned int reg);
  107. bool (*readable_reg)(struct device *dev, unsigned int reg);
  108. bool (*volatile_reg)(struct device *dev, unsigned int reg);
  109. bool (*precious_reg)(struct device *dev, unsigned int reg);
  110. unsigned int max_register;
  111. const struct reg_default *reg_defaults;
  112. unsigned int num_reg_defaults;
  113. enum regcache_type cache_type;
  114. const void *reg_defaults_raw;
  115. unsigned int num_reg_defaults_raw;
  116. u8 read_flag_mask;
  117. u8 write_flag_mask;
  118. bool use_single_rw;
  119. enum regmap_endian reg_format_endian;
  120. enum regmap_endian val_format_endian;
  121. const struct regmap_range_cfg *ranges;
  122. unsigned int num_ranges;
  123. };
  124. /**
  125. * Configuration for indirectly accessed or paged registers.
  126. * Registers, mapped to this virtual range, are accessed in two steps:
  127. * 1. page selector register update;
  128. * 2. access through data window registers.
  129. *
  130. * @name: Descriptive name for diagnostics
  131. *
  132. * @range_min: Address of the lowest register address in virtual range.
  133. * @range_max: Address of the highest register in virtual range.
  134. *
  135. * @page_sel_reg: Register with selector field.
  136. * @page_sel_mask: Bit shift for selector value.
  137. * @page_sel_shift: Bit mask for selector value.
  138. *
  139. * @window_start: Address of first (lowest) register in data window.
  140. * @window_len: Number of registers in data window.
  141. */
  142. struct regmap_range_cfg {
  143. const char *name;
  144. /* Registers of virtual address range */
  145. unsigned int range_min;
  146. unsigned int range_max;
  147. /* Page selector for indirect addressing */
  148. unsigned int selector_reg;
  149. unsigned int selector_mask;
  150. int selector_shift;
  151. /* Data window (per each page) */
  152. unsigned int window_start;
  153. unsigned int window_len;
  154. };
  155. typedef int (*regmap_hw_write)(void *context, const void *data,
  156. size_t count);
  157. typedef int (*regmap_hw_gather_write)(void *context,
  158. const void *reg, size_t reg_len,
  159. const void *val, size_t val_len);
  160. typedef int (*regmap_hw_read)(void *context,
  161. const void *reg_buf, size_t reg_size,
  162. void *val_buf, size_t val_size);
  163. typedef void (*regmap_hw_free_context)(void *context);
  164. /**
  165. * Description of a hardware bus for the register map infrastructure.
  166. *
  167. * @fast_io: Register IO is fast. Use a spinlock instead of a mutex
  168. * to perform locking.
  169. * @write: Write operation.
  170. * @gather_write: Write operation with split register/value, return -ENOTSUPP
  171. * if not implemented on a given device.
  172. * @read: Read operation. Data is returned in the buffer used to transmit
  173. * data.
  174. * @read_flag_mask: Mask to be set in the top byte of the register when doing
  175. * a read.
  176. * @reg_format_endian_default: Default endianness for formatted register
  177. * addresses. Used when the regmap_config specifies DEFAULT. If this is
  178. * DEFAULT, BIG is assumed.
  179. * @val_format_endian_default: Default endianness for formatted register
  180. * values. Used when the regmap_config specifies DEFAULT. If this is
  181. * DEFAULT, BIG is assumed.
  182. */
  183. struct regmap_bus {
  184. bool fast_io;
  185. regmap_hw_write write;
  186. regmap_hw_gather_write gather_write;
  187. regmap_hw_read read;
  188. regmap_hw_free_context free_context;
  189. u8 read_flag_mask;
  190. enum regmap_endian reg_format_endian_default;
  191. enum regmap_endian val_format_endian_default;
  192. };
  193. struct regmap *regmap_init(struct device *dev,
  194. const struct regmap_bus *bus,
  195. void *bus_context,
  196. const struct regmap_config *config);
  197. struct regmap *regmap_init_i2c(struct i2c_client *i2c,
  198. const struct regmap_config *config);
  199. struct regmap *regmap_init_spi(struct spi_device *dev,
  200. const struct regmap_config *config);
  201. struct regmap *regmap_init_mmio(struct device *dev,
  202. void __iomem *regs,
  203. const struct regmap_config *config);
  204. struct regmap *devm_regmap_init(struct device *dev,
  205. const struct regmap_bus *bus,
  206. void *bus_context,
  207. const struct regmap_config *config);
  208. struct regmap *devm_regmap_init_i2c(struct i2c_client *i2c,
  209. const struct regmap_config *config);
  210. struct regmap *devm_regmap_init_spi(struct spi_device *dev,
  211. const struct regmap_config *config);
  212. struct regmap *devm_regmap_init_mmio(struct device *dev,
  213. void __iomem *regs,
  214. const struct regmap_config *config);
  215. void regmap_exit(struct regmap *map);
  216. int regmap_reinit_cache(struct regmap *map,
  217. const struct regmap_config *config);
  218. struct regmap *dev_get_regmap(struct device *dev, const char *name);
  219. int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
  220. int regmap_raw_write(struct regmap *map, unsigned int reg,
  221. const void *val, size_t val_len);
  222. int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
  223. size_t val_count);
  224. int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
  225. int regmap_raw_read(struct regmap *map, unsigned int reg,
  226. void *val, size_t val_len);
  227. int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
  228. size_t val_count);
  229. int regmap_update_bits(struct regmap *map, unsigned int reg,
  230. unsigned int mask, unsigned int val);
  231. int regmap_update_bits_check(struct regmap *map, unsigned int reg,
  232. unsigned int mask, unsigned int val,
  233. bool *change);
  234. int regmap_get_val_bytes(struct regmap *map);
  235. int regcache_sync(struct regmap *map);
  236. int regcache_sync_region(struct regmap *map, unsigned int min,
  237. unsigned int max);
  238. void regcache_cache_only(struct regmap *map, bool enable);
  239. void regcache_cache_bypass(struct regmap *map, bool enable);
  240. void regcache_mark_dirty(struct regmap *map);
  241. int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
  242. int num_regs);
  243. /**
  244. * Description of an IRQ for the generic regmap irq_chip.
  245. *
  246. * @reg_offset: Offset of the status/mask register within the bank
  247. * @mask: Mask used to flag/control the register.
  248. */
  249. struct regmap_irq {
  250. unsigned int reg_offset;
  251. unsigned int mask;
  252. };
  253. /**
  254. * Description of a generic regmap irq_chip. This is not intended to
  255. * handle every possible interrupt controller, but it should handle a
  256. * substantial proportion of those that are found in the wild.
  257. *
  258. * @name: Descriptive name for IRQ controller.
  259. *
  260. * @status_base: Base status register address.
  261. * @mask_base: Base mask register address.
  262. * @ack_base: Base ack address. If zero then the chip is clear on read.
  263. * @wake_base: Base address for wake enables. If zero unsupported.
  264. * @irq_reg_stride: Stride to use for chips where registers are not contiguous.
  265. * @runtime_pm: Hold a runtime PM lock on the device when accessing it.
  266. *
  267. * @num_regs: Number of registers in each control bank.
  268. * @irqs: Descriptors for individual IRQs. Interrupt numbers are
  269. * assigned based on the index in the array of the interrupt.
  270. * @num_irqs: Number of descriptors.
  271. */
  272. struct regmap_irq_chip {
  273. const char *name;
  274. unsigned int status_base;
  275. unsigned int mask_base;
  276. unsigned int ack_base;
  277. unsigned int wake_base;
  278. unsigned int irq_reg_stride;
  279. unsigned int mask_invert;
  280. bool runtime_pm;
  281. int num_regs;
  282. const struct regmap_irq *irqs;
  283. int num_irqs;
  284. };
  285. struct regmap_irq_chip_data;
  286. int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
  287. int irq_base, const struct regmap_irq_chip *chip,
  288. struct regmap_irq_chip_data **data);
  289. void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
  290. int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data);
  291. int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq);
  292. struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data);
  293. #else
  294. /*
  295. * These stubs should only ever be called by generic code which has
  296. * regmap based facilities, if they ever get called at runtime
  297. * something is going wrong and something probably needs to select
  298. * REGMAP.
  299. */
  300. static inline int regmap_write(struct regmap *map, unsigned int reg,
  301. unsigned int val)
  302. {
  303. WARN_ONCE(1, "regmap API is disabled");
  304. return -EINVAL;
  305. }
  306. static inline int regmap_raw_write(struct regmap *map, unsigned int reg,
  307. const void *val, size_t val_len)
  308. {
  309. WARN_ONCE(1, "regmap API is disabled");
  310. return -EINVAL;
  311. }
  312. static inline int regmap_bulk_write(struct regmap *map, unsigned int reg,
  313. const void *val, size_t val_count)
  314. {
  315. WARN_ONCE(1, "regmap API is disabled");
  316. return -EINVAL;
  317. }
  318. static inline int regmap_read(struct regmap *map, unsigned int reg,
  319. unsigned int *val)
  320. {
  321. WARN_ONCE(1, "regmap API is disabled");
  322. return -EINVAL;
  323. }
  324. static inline int regmap_raw_read(struct regmap *map, unsigned int reg,
  325. void *val, size_t val_len)
  326. {
  327. WARN_ONCE(1, "regmap API is disabled");
  328. return -EINVAL;
  329. }
  330. static inline int regmap_bulk_read(struct regmap *map, unsigned int reg,
  331. void *val, size_t val_count)
  332. {
  333. WARN_ONCE(1, "regmap API is disabled");
  334. return -EINVAL;
  335. }
  336. static inline int regmap_update_bits(struct regmap *map, unsigned int reg,
  337. unsigned int mask, unsigned int val)
  338. {
  339. WARN_ONCE(1, "regmap API is disabled");
  340. return -EINVAL;
  341. }
  342. static inline int regmap_update_bits_check(struct regmap *map,
  343. unsigned int reg,
  344. unsigned int mask, unsigned int val,
  345. bool *change)
  346. {
  347. WARN_ONCE(1, "regmap API is disabled");
  348. return -EINVAL;
  349. }
  350. static inline int regmap_get_val_bytes(struct regmap *map)
  351. {
  352. WARN_ONCE(1, "regmap API is disabled");
  353. return -EINVAL;
  354. }
  355. static inline int regcache_sync(struct regmap *map)
  356. {
  357. WARN_ONCE(1, "regmap API is disabled");
  358. return -EINVAL;
  359. }
  360. static inline int regcache_sync_region(struct regmap *map, unsigned int min,
  361. unsigned int max)
  362. {
  363. WARN_ONCE(1, "regmap API is disabled");
  364. return -EINVAL;
  365. }
  366. static inline void regcache_cache_only(struct regmap *map, bool enable)
  367. {
  368. WARN_ONCE(1, "regmap API is disabled");
  369. }
  370. static inline void regcache_cache_bypass(struct regmap *map, bool enable)
  371. {
  372. WARN_ONCE(1, "regmap API is disabled");
  373. }
  374. static inline void regcache_mark_dirty(struct regmap *map)
  375. {
  376. WARN_ONCE(1, "regmap API is disabled");
  377. }
  378. static inline int regmap_register_patch(struct regmap *map,
  379. const struct reg_default *regs,
  380. int num_regs)
  381. {
  382. WARN_ONCE(1, "regmap API is disabled");
  383. return -EINVAL;
  384. }
  385. static inline struct regmap *dev_get_regmap(struct device *dev,
  386. const char *name)
  387. {
  388. return NULL;
  389. }
  390. #endif
  391. #endif