cx88-dvb.c 38 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-simple.h"
  46. #include "tda9887.h"
  47. #include "s5h1411.h"
  48. #include "stv0299.h"
  49. #include "z0194a.h"
  50. #include "stv0288.h"
  51. #include "stb6000.h"
  52. #include "cx24116.h"
  53. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  54. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  55. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  56. MODULE_LICENSE("GPL");
  57. static unsigned int debug;
  58. module_param(debug, int, 0644);
  59. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  60. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  61. #define dprintk(level,fmt, arg...) if (debug >= level) \
  62. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  63. /* ------------------------------------------------------------------ */
  64. static int dvb_buf_setup(struct videobuf_queue *q,
  65. unsigned int *count, unsigned int *size)
  66. {
  67. struct cx8802_dev *dev = q->priv_data;
  68. dev->ts_packet_size = 188 * 4;
  69. dev->ts_packet_count = 32;
  70. *size = dev->ts_packet_size * dev->ts_packet_count;
  71. *count = 32;
  72. return 0;
  73. }
  74. static int dvb_buf_prepare(struct videobuf_queue *q,
  75. struct videobuf_buffer *vb, enum v4l2_field field)
  76. {
  77. struct cx8802_dev *dev = q->priv_data;
  78. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  79. }
  80. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  81. {
  82. struct cx8802_dev *dev = q->priv_data;
  83. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  84. }
  85. static void dvb_buf_release(struct videobuf_queue *q,
  86. struct videobuf_buffer *vb)
  87. {
  88. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  89. }
  90. static struct videobuf_queue_ops dvb_qops = {
  91. .buf_setup = dvb_buf_setup,
  92. .buf_prepare = dvb_buf_prepare,
  93. .buf_queue = dvb_buf_queue,
  94. .buf_release = dvb_buf_release,
  95. };
  96. /* ------------------------------------------------------------------ */
  97. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  98. {
  99. struct cx8802_dev *dev= fe->dvb->priv;
  100. struct cx8802_driver *drv = NULL;
  101. int ret = 0;
  102. int fe_id;
  103. fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
  104. if (!fe_id) {
  105. printk(KERN_ERR "%s() No frontend found\n", __func__);
  106. return -EINVAL;
  107. }
  108. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  109. if (drv) {
  110. if (acquire){
  111. dev->frontends.active_fe_id = fe_id;
  112. ret = drv->request_acquire(drv);
  113. } else {
  114. ret = drv->request_release(drv);
  115. dev->frontends.active_fe_id = 0;
  116. }
  117. }
  118. return ret;
  119. }
  120. static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open)
  121. {
  122. struct videobuf_dvb_frontends *f;
  123. struct videobuf_dvb_frontend *fe;
  124. if (!core->dvbdev)
  125. return;
  126. f = &core->dvbdev->frontends;
  127. if (!f)
  128. return;
  129. if (f->gate <= 1) /* undefined or fe0 */
  130. fe = videobuf_dvb_get_frontend(f, 1);
  131. else
  132. fe = videobuf_dvb_get_frontend(f, f->gate);
  133. if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
  134. fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
  135. }
  136. /* ------------------------------------------------------------------ */
  137. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  138. {
  139. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  140. static u8 reset [] = { RESET, 0x80 };
  141. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  142. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  143. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  144. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  145. mt352_write(fe, clock_config, sizeof(clock_config));
  146. udelay(200);
  147. mt352_write(fe, reset, sizeof(reset));
  148. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  149. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  150. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  151. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  152. return 0;
  153. }
  154. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  155. {
  156. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  157. static u8 reset [] = { RESET, 0x80 };
  158. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  159. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  160. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  161. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  162. mt352_write(fe, clock_config, sizeof(clock_config));
  163. udelay(200);
  164. mt352_write(fe, reset, sizeof(reset));
  165. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  166. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  167. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  168. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  169. return 0;
  170. }
  171. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  172. {
  173. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  174. static u8 reset [] = { 0x50, 0x80 };
  175. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  176. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  177. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  178. static u8 dntv_extra[] = { 0xB5, 0x7A };
  179. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  180. mt352_write(fe, clock_config, sizeof(clock_config));
  181. udelay(2000);
  182. mt352_write(fe, reset, sizeof(reset));
  183. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  184. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  185. udelay(2000);
  186. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  187. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  188. return 0;
  189. }
  190. static struct mt352_config dvico_fusionhdtv = {
  191. .demod_address = 0x0f,
  192. .demod_init = dvico_fusionhdtv_demod_init,
  193. };
  194. static struct mt352_config dntv_live_dvbt_config = {
  195. .demod_address = 0x0f,
  196. .demod_init = dntv_live_dvbt_demod_init,
  197. };
  198. static struct mt352_config dvico_fusionhdtv_dual = {
  199. .demod_address = 0x0f,
  200. .demod_init = dvico_dual_demod_init,
  201. };
  202. static struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = {
  203. .demod_address = (0x1e >> 1),
  204. .no_tuner = 1,
  205. .if2 = 45600,
  206. };
  207. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  208. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  209. {
  210. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  211. static u8 reset [] = { 0x50, 0x80 };
  212. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  213. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  214. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  215. static u8 dntv_extra[] = { 0xB5, 0x7A };
  216. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  217. mt352_write(fe, clock_config, sizeof(clock_config));
  218. udelay(2000);
  219. mt352_write(fe, reset, sizeof(reset));
  220. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  221. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  222. udelay(2000);
  223. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  224. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  225. return 0;
  226. }
  227. static struct mt352_config dntv_live_dvbt_pro_config = {
  228. .demod_address = 0x0f,
  229. .no_tuner = 1,
  230. .demod_init = dntv_live_dvbt_pro_demod_init,
  231. };
  232. #endif
  233. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  234. .demod_address = 0x0f,
  235. .no_tuner = 1,
  236. };
  237. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  238. .demod_address = 0x0f,
  239. .if2 = 45600,
  240. .no_tuner = 1,
  241. };
  242. static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  243. .demod_address = 0x0f,
  244. .if2 = 4560,
  245. .no_tuner = 1,
  246. .demod_init = dvico_fusionhdtv_demod_init,
  247. };
  248. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  249. .demod_address = 0x0f,
  250. };
  251. static struct cx22702_config connexant_refboard_config = {
  252. .demod_address = 0x43,
  253. .output_mode = CX22702_SERIAL_OUTPUT,
  254. };
  255. static struct cx22702_config hauppauge_hvr_config = {
  256. .demod_address = 0x63,
  257. .output_mode = CX22702_SERIAL_OUTPUT,
  258. };
  259. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  260. {
  261. struct cx8802_dev *dev= fe->dvb->priv;
  262. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  263. return 0;
  264. }
  265. static struct or51132_config pchdtv_hd3000 = {
  266. .demod_address = 0x15,
  267. .set_ts_params = or51132_set_ts_param,
  268. };
  269. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  270. {
  271. struct cx8802_dev *dev= fe->dvb->priv;
  272. struct cx88_core *core = dev->core;
  273. dprintk(1, "%s: index = %d\n", __func__, index);
  274. if (index == 0)
  275. cx_clear(MO_GP0_IO, 8);
  276. else
  277. cx_set(MO_GP0_IO, 8);
  278. return 0;
  279. }
  280. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  281. {
  282. struct cx8802_dev *dev= fe->dvb->priv;
  283. if (is_punctured)
  284. dev->ts_gen_cntrl |= 0x04;
  285. else
  286. dev->ts_gen_cntrl &= ~0x04;
  287. return 0;
  288. }
  289. static struct lgdt330x_config fusionhdtv_3_gold = {
  290. .demod_address = 0x0e,
  291. .demod_chip = LGDT3302,
  292. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  293. .set_ts_params = lgdt330x_set_ts_param,
  294. };
  295. static struct lgdt330x_config fusionhdtv_5_gold = {
  296. .demod_address = 0x0e,
  297. .demod_chip = LGDT3303,
  298. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  299. .set_ts_params = lgdt330x_set_ts_param,
  300. };
  301. static struct lgdt330x_config pchdtv_hd5500 = {
  302. .demod_address = 0x59,
  303. .demod_chip = LGDT3303,
  304. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  305. .set_ts_params = lgdt330x_set_ts_param,
  306. };
  307. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  308. {
  309. struct cx8802_dev *dev= fe->dvb->priv;
  310. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  311. return 0;
  312. }
  313. static struct nxt200x_config ati_hdtvwonder = {
  314. .demod_address = 0x0a,
  315. .set_ts_params = nxt200x_set_ts_param,
  316. };
  317. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  318. int is_punctured)
  319. {
  320. struct cx8802_dev *dev= fe->dvb->priv;
  321. dev->ts_gen_cntrl = 0x02;
  322. return 0;
  323. }
  324. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  325. fe_sec_voltage_t voltage)
  326. {
  327. struct cx8802_dev *dev= fe->dvb->priv;
  328. struct cx88_core *core = dev->core;
  329. if (voltage == SEC_VOLTAGE_OFF)
  330. cx_write(MO_GP0_IO, 0x000006fb);
  331. else
  332. cx_write(MO_GP0_IO, 0x000006f9);
  333. if (core->prev_set_voltage)
  334. return core->prev_set_voltage(fe, voltage);
  335. return 0;
  336. }
  337. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  338. fe_sec_voltage_t voltage)
  339. {
  340. struct cx8802_dev *dev= fe->dvb->priv;
  341. struct cx88_core *core = dev->core;
  342. if (voltage == SEC_VOLTAGE_OFF) {
  343. dprintk(1,"LNB Voltage OFF\n");
  344. cx_write(MO_GP0_IO, 0x0000efff);
  345. }
  346. if (core->prev_set_voltage)
  347. return core->prev_set_voltage(fe, voltage);
  348. return 0;
  349. }
  350. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  351. fe_sec_voltage_t voltage)
  352. {
  353. struct cx8802_dev *dev= fe->dvb->priv;
  354. struct cx88_core *core = dev->core;
  355. switch (voltage) {
  356. case SEC_VOLTAGE_13:
  357. printk("LNB Voltage SEC_VOLTAGE_13\n");
  358. cx_write(MO_GP0_IO, 0x00006040);
  359. break;
  360. case SEC_VOLTAGE_18:
  361. printk("LNB Voltage SEC_VOLTAGE_18\n");
  362. cx_write(MO_GP0_IO, 0x00006060);
  363. break;
  364. case SEC_VOLTAGE_OFF:
  365. printk("LNB Voltage SEC_VOLTAGE_off\n");
  366. break;
  367. }
  368. if (core->prev_set_voltage)
  369. return core->prev_set_voltage(fe, voltage);
  370. return 0;
  371. }
  372. static struct cx24123_config geniatech_dvbs_config = {
  373. .demod_address = 0x55,
  374. .set_ts_params = cx24123_set_ts_param,
  375. };
  376. static struct cx24123_config hauppauge_novas_config = {
  377. .demod_address = 0x55,
  378. .set_ts_params = cx24123_set_ts_param,
  379. };
  380. static struct cx24123_config kworld_dvbs_100_config = {
  381. .demod_address = 0x15,
  382. .set_ts_params = cx24123_set_ts_param,
  383. .lnb_polarity = 1,
  384. };
  385. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  386. .demod_address = 0x32 >> 1,
  387. .output_mode = S5H1409_PARALLEL_OUTPUT,
  388. .gpio = S5H1409_GPIO_ON,
  389. .qam_if = 44000,
  390. .inversion = S5H1409_INVERSION_OFF,
  391. .status_mode = S5H1409_DEMODLOCKING,
  392. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  393. };
  394. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  395. .demod_address = 0x32 >> 1,
  396. .output_mode = S5H1409_SERIAL_OUTPUT,
  397. .gpio = S5H1409_GPIO_OFF,
  398. .inversion = S5H1409_INVERSION_OFF,
  399. .status_mode = S5H1409_DEMODLOCKING,
  400. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  401. };
  402. static struct s5h1409_config kworld_atsc_120_config = {
  403. .demod_address = 0x32 >> 1,
  404. .output_mode = S5H1409_SERIAL_OUTPUT,
  405. .gpio = S5H1409_GPIO_OFF,
  406. .inversion = S5H1409_INVERSION_OFF,
  407. .status_mode = S5H1409_DEMODLOCKING,
  408. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  409. };
  410. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  411. .i2c_address = 0x64,
  412. .if_khz = 5380,
  413. };
  414. static struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  415. .demod_address = (0x1e >> 1),
  416. .no_tuner = 1,
  417. .if2 = 45600,
  418. };
  419. static struct zl10353_config cx88_geniatech_x8000_mt = {
  420. .demod_address = (0x1e >> 1),
  421. .no_tuner = 1,
  422. .disable_i2c_gate_ctrl = 1,
  423. };
  424. static struct s5h1411_config dvico_fusionhdtv7_config = {
  425. .output_mode = S5H1411_SERIAL_OUTPUT,
  426. .gpio = S5H1411_GPIO_ON,
  427. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  428. .qam_if = S5H1411_IF_44000,
  429. .vsb_if = S5H1411_IF_44000,
  430. .inversion = S5H1411_INVERSION_OFF,
  431. .status_mode = S5H1411_DEMODLOCKING
  432. };
  433. static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  434. .i2c_address = 0xc2 >> 1,
  435. .if_khz = 5380,
  436. };
  437. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  438. {
  439. struct dvb_frontend *fe;
  440. struct videobuf_dvb_frontend *fe0 = NULL;
  441. struct xc2028_ctrl ctl;
  442. struct xc2028_config cfg = {
  443. .i2c_adap = &dev->core->i2c_adap,
  444. .i2c_addr = addr,
  445. .ctrl = &ctl,
  446. };
  447. /* Get the first frontend */
  448. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  449. if (!fe0)
  450. return -EINVAL;
  451. if (!fe0->dvb.frontend) {
  452. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  453. "Can't attach xc3028\n",
  454. dev->core->name);
  455. return -EINVAL;
  456. }
  457. /*
  458. * Some xc3028 devices may be hidden by an I2C gate. This is known
  459. * to happen with some s5h1409-based devices.
  460. * Now that I2C gate is open, sets up xc3028 configuration
  461. */
  462. cx88_setup_xc3028(dev->core, &ctl);
  463. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  464. if (!fe) {
  465. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  466. dev->core->name);
  467. dvb_frontend_detach(fe0->dvb.frontend);
  468. dvb_unregister_frontend(fe0->dvb.frontend);
  469. fe0->dvb.frontend = NULL;
  470. return -EINVAL;
  471. }
  472. printk(KERN_INFO "%s/2: xc3028 attached\n",
  473. dev->core->name);
  474. return 0;
  475. }
  476. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  477. int is_punctured)
  478. {
  479. struct cx8802_dev *dev = fe->dvb->priv;
  480. dev->ts_gen_cntrl = 0x2;
  481. return 0;
  482. }
  483. static int cx24116_reset_device(struct dvb_frontend *fe)
  484. {
  485. struct cx8802_dev *dev = fe->dvb->priv;
  486. struct cx88_core *core = dev->core;
  487. /* Reset the part */
  488. /* Put the cx24116 into reset */
  489. cx_write(MO_SRST_IO, 0);
  490. msleep(10);
  491. /* Take the cx24116 out of reset */
  492. cx_write(MO_SRST_IO, 1);
  493. msleep(10);
  494. return 0;
  495. }
  496. static struct cx24116_config hauppauge_hvr4000_config = {
  497. .demod_address = 0x05,
  498. .set_ts_params = cx24116_set_ts_param,
  499. .reset_device = cx24116_reset_device,
  500. };
  501. static struct cx24116_config tevii_s460_config = {
  502. .demod_address = 0x55,
  503. .set_ts_params = cx24116_set_ts_param,
  504. .reset_device = cx24116_reset_device,
  505. };
  506. static struct stv0299_config tevii_tuner_sharp_config = {
  507. .demod_address = 0x68,
  508. .inittab = sharp_z0194a_inittab,
  509. .mclk = 88000000UL,
  510. .invert = 1,
  511. .skip_reinit = 0,
  512. .lock_output = 1,
  513. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  514. .min_delay_ms = 100,
  515. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  516. .set_ts_params = cx24116_set_ts_param,
  517. };
  518. static struct stv0288_config tevii_tuner_earda_config = {
  519. .demod_address = 0x68,
  520. .min_delay_ms = 100,
  521. .set_ts_params = cx24116_set_ts_param,
  522. };
  523. static int cx8802_alloc_frontends(struct cx8802_dev *dev)
  524. {
  525. struct cx88_core *core = dev->core;
  526. struct videobuf_dvb_frontend *fe = NULL;
  527. int i;
  528. mutex_init(&dev->frontends.lock);
  529. INIT_LIST_HEAD(&dev->frontends.felist);
  530. if (!core->board.num_frontends)
  531. return -ENODEV;
  532. printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
  533. core->board.num_frontends);
  534. for (i = 1; i <= core->board.num_frontends; i++) {
  535. fe = videobuf_dvb_alloc_frontend(&dev->frontends, i);
  536. if (!fe) {
  537. printk(KERN_ERR "%s() failed to alloc\n", __func__);
  538. videobuf_dvb_dealloc_frontends(&dev->frontends);
  539. return -ENOMEM;
  540. }
  541. }
  542. return 0;
  543. }
  544. static int dvb_register(struct cx8802_dev *dev)
  545. {
  546. struct cx88_core *core = dev->core;
  547. struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
  548. int mfe_shared = 0; /* bus not shared by default */
  549. if (0 != core->i2c_rc) {
  550. printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name);
  551. goto frontend_detach;
  552. }
  553. /* Get the first frontend */
  554. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  555. if (!fe0)
  556. goto frontend_detach;
  557. /* multi-frontend gate control is undefined or defaults to fe0 */
  558. dev->frontends.gate = 0;
  559. /* Sets the gate control callback to be used by i2c command calls */
  560. core->gate_ctrl = cx88_dvb_gate_ctrl;
  561. /* init frontend(s) */
  562. switch (core->boardnr) {
  563. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  564. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  565. &connexant_refboard_config,
  566. &core->i2c_adap);
  567. if (fe0->dvb.frontend != NULL) {
  568. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  569. 0x61, &core->i2c_adap,
  570. DVB_PLL_THOMSON_DTT759X))
  571. goto frontend_detach;
  572. }
  573. break;
  574. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  575. case CX88_BOARD_CONEXANT_DVB_T1:
  576. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  577. case CX88_BOARD_WINFAST_DTV1000:
  578. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  579. &connexant_refboard_config,
  580. &core->i2c_adap);
  581. if (fe0->dvb.frontend != NULL) {
  582. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  583. 0x60, &core->i2c_adap,
  584. DVB_PLL_THOMSON_DTT7579))
  585. goto frontend_detach;
  586. }
  587. break;
  588. case CX88_BOARD_WINFAST_DTV2000H:
  589. case CX88_BOARD_WINFAST_DTV2000H_J:
  590. case CX88_BOARD_HAUPPAUGE_HVR1100:
  591. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  592. case CX88_BOARD_HAUPPAUGE_HVR1300:
  593. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  594. &hauppauge_hvr_config,
  595. &core->i2c_adap);
  596. if (fe0->dvb.frontend != NULL) {
  597. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  598. &core->i2c_adap, 0x61,
  599. TUNER_PHILIPS_FMD1216ME_MK3))
  600. goto frontend_detach;
  601. }
  602. break;
  603. case CX88_BOARD_HAUPPAUGE_HVR3000:
  604. /* MFE frontend 1 */
  605. mfe_shared = 1;
  606. dev->frontends.gate = 2;
  607. /* DVB-S init */
  608. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  609. &hauppauge_novas_config,
  610. &dev->core->i2c_adap);
  611. if (fe0->dvb.frontend) {
  612. if (!dvb_attach(isl6421_attach,
  613. fe0->dvb.frontend,
  614. &dev->core->i2c_adap,
  615. 0x08, ISL6421_DCL, 0x00))
  616. goto frontend_detach;
  617. }
  618. /* MFE frontend 2 */
  619. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  620. if (!fe1)
  621. goto frontend_detach;
  622. /* DVB-T init */
  623. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  624. &hauppauge_hvr_config,
  625. &dev->core->i2c_adap);
  626. if (fe1->dvb.frontend) {
  627. fe1->dvb.frontend->id = 1;
  628. if (!dvb_attach(simple_tuner_attach,
  629. fe1->dvb.frontend,
  630. &dev->core->i2c_adap,
  631. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  632. goto frontend_detach;
  633. }
  634. break;
  635. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  636. fe0->dvb.frontend = dvb_attach(mt352_attach,
  637. &dvico_fusionhdtv,
  638. &core->i2c_adap);
  639. if (fe0->dvb.frontend != NULL) {
  640. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  641. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  642. goto frontend_detach;
  643. break;
  644. }
  645. /* ZL10353 replaces MT352 on later cards */
  646. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  647. &dvico_fusionhdtv_plus_v1_1,
  648. &core->i2c_adap);
  649. if (fe0->dvb.frontend != NULL) {
  650. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  651. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  652. goto frontend_detach;
  653. }
  654. break;
  655. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  656. /* The tin box says DEE1601, but it seems to be DTT7579
  657. * compatible, with a slightly different MT352 AGC gain. */
  658. fe0->dvb.frontend = dvb_attach(mt352_attach,
  659. &dvico_fusionhdtv_dual,
  660. &core->i2c_adap);
  661. if (fe0->dvb.frontend != NULL) {
  662. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  663. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  664. goto frontend_detach;
  665. break;
  666. }
  667. /* ZL10353 replaces MT352 on later cards */
  668. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  669. &dvico_fusionhdtv_plus_v1_1,
  670. &core->i2c_adap);
  671. if (fe0->dvb.frontend != NULL) {
  672. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  673. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  674. goto frontend_detach;
  675. }
  676. break;
  677. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  678. fe0->dvb.frontend = dvb_attach(mt352_attach,
  679. &dvico_fusionhdtv,
  680. &core->i2c_adap);
  681. if (fe0->dvb.frontend != NULL) {
  682. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  683. 0x61, NULL, DVB_PLL_LG_Z201))
  684. goto frontend_detach;
  685. }
  686. break;
  687. case CX88_BOARD_KWORLD_DVB_T:
  688. case CX88_BOARD_DNTV_LIVE_DVB_T:
  689. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  690. fe0->dvb.frontend = dvb_attach(mt352_attach,
  691. &dntv_live_dvbt_config,
  692. &core->i2c_adap);
  693. if (fe0->dvb.frontend != NULL) {
  694. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  695. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  696. goto frontend_detach;
  697. }
  698. break;
  699. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  700. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  701. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  702. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  703. &dev->vp3054->adap);
  704. if (fe0->dvb.frontend != NULL) {
  705. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  706. &core->i2c_adap, 0x61,
  707. TUNER_PHILIPS_FMD1216ME_MK3))
  708. goto frontend_detach;
  709. }
  710. #else
  711. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  712. core->name);
  713. #endif
  714. break;
  715. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  716. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  717. &dvico_fusionhdtv_hybrid,
  718. &core->i2c_adap);
  719. if (fe0->dvb.frontend != NULL) {
  720. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  721. &core->i2c_adap, 0x61,
  722. TUNER_THOMSON_FE6600))
  723. goto frontend_detach;
  724. }
  725. break;
  726. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  727. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  728. &dvico_fusionhdtv_xc3028,
  729. &core->i2c_adap);
  730. if (fe0->dvb.frontend == NULL)
  731. fe0->dvb.frontend = dvb_attach(mt352_attach,
  732. &dvico_fusionhdtv_mt352_xc3028,
  733. &core->i2c_adap);
  734. /*
  735. * On this board, the demod provides the I2C bus pullup.
  736. * We must not permit gate_ctrl to be performed, or
  737. * the xc3028 cannot communicate on the bus.
  738. */
  739. if (fe0->dvb.frontend)
  740. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  741. if (attach_xc3028(0x61, dev) < 0)
  742. goto frontend_detach;
  743. break;
  744. case CX88_BOARD_PCHDTV_HD3000:
  745. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  746. &core->i2c_adap);
  747. if (fe0->dvb.frontend != NULL) {
  748. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  749. &core->i2c_adap, 0x61,
  750. TUNER_THOMSON_DTT761X))
  751. goto frontend_detach;
  752. }
  753. break;
  754. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  755. dev->ts_gen_cntrl = 0x08;
  756. /* Do a hardware reset of chip before using it. */
  757. cx_clear(MO_GP0_IO, 1);
  758. mdelay(100);
  759. cx_set(MO_GP0_IO, 1);
  760. mdelay(200);
  761. /* Select RF connector callback */
  762. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  763. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  764. &fusionhdtv_3_gold,
  765. &core->i2c_adap);
  766. if (fe0->dvb.frontend != NULL) {
  767. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  768. &core->i2c_adap, 0x61,
  769. TUNER_MICROTUNE_4042FI5))
  770. goto frontend_detach;
  771. }
  772. break;
  773. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  774. dev->ts_gen_cntrl = 0x08;
  775. /* Do a hardware reset of chip before using it. */
  776. cx_clear(MO_GP0_IO, 1);
  777. mdelay(100);
  778. cx_set(MO_GP0_IO, 9);
  779. mdelay(200);
  780. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  781. &fusionhdtv_3_gold,
  782. &core->i2c_adap);
  783. if (fe0->dvb.frontend != NULL) {
  784. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  785. &core->i2c_adap, 0x61,
  786. TUNER_THOMSON_DTT761X))
  787. goto frontend_detach;
  788. }
  789. break;
  790. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  791. dev->ts_gen_cntrl = 0x08;
  792. /* Do a hardware reset of chip before using it. */
  793. cx_clear(MO_GP0_IO, 1);
  794. mdelay(100);
  795. cx_set(MO_GP0_IO, 1);
  796. mdelay(200);
  797. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  798. &fusionhdtv_5_gold,
  799. &core->i2c_adap);
  800. if (fe0->dvb.frontend != NULL) {
  801. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  802. &core->i2c_adap, 0x61,
  803. TUNER_LG_TDVS_H06XF))
  804. goto frontend_detach;
  805. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  806. &core->i2c_adap, 0x43))
  807. goto frontend_detach;
  808. }
  809. break;
  810. case CX88_BOARD_PCHDTV_HD5500:
  811. dev->ts_gen_cntrl = 0x08;
  812. /* Do a hardware reset of chip before using it. */
  813. cx_clear(MO_GP0_IO, 1);
  814. mdelay(100);
  815. cx_set(MO_GP0_IO, 1);
  816. mdelay(200);
  817. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  818. &pchdtv_hd5500,
  819. &core->i2c_adap);
  820. if (fe0->dvb.frontend != NULL) {
  821. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  822. &core->i2c_adap, 0x61,
  823. TUNER_LG_TDVS_H06XF))
  824. goto frontend_detach;
  825. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  826. &core->i2c_adap, 0x43))
  827. goto frontend_detach;
  828. }
  829. break;
  830. case CX88_BOARD_ATI_HDTVWONDER:
  831. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  832. &ati_hdtvwonder,
  833. &core->i2c_adap);
  834. if (fe0->dvb.frontend != NULL) {
  835. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  836. &core->i2c_adap, 0x61,
  837. TUNER_PHILIPS_TUV1236D))
  838. goto frontend_detach;
  839. }
  840. break;
  841. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  842. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  843. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  844. &hauppauge_novas_config,
  845. &core->i2c_adap);
  846. if (fe0->dvb.frontend) {
  847. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  848. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
  849. goto frontend_detach;
  850. }
  851. break;
  852. case CX88_BOARD_KWORLD_DVBS_100:
  853. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  854. &kworld_dvbs_100_config,
  855. &core->i2c_adap);
  856. if (fe0->dvb.frontend) {
  857. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  858. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  859. }
  860. break;
  861. case CX88_BOARD_GENIATECH_DVBS:
  862. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  863. &geniatech_dvbs_config,
  864. &core->i2c_adap);
  865. if (fe0->dvb.frontend) {
  866. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  867. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  868. }
  869. break;
  870. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  871. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  872. &pinnacle_pctv_hd_800i_config,
  873. &core->i2c_adap);
  874. if (fe0->dvb.frontend != NULL) {
  875. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  876. &core->i2c_adap,
  877. &pinnacle_pctv_hd_800i_tuner_config))
  878. goto frontend_detach;
  879. }
  880. break;
  881. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  882. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  883. &dvico_hdtv5_pci_nano_config,
  884. &core->i2c_adap);
  885. if (fe0->dvb.frontend != NULL) {
  886. struct dvb_frontend *fe;
  887. struct xc2028_config cfg = {
  888. .i2c_adap = &core->i2c_adap,
  889. .i2c_addr = 0x61,
  890. };
  891. static struct xc2028_ctrl ctl = {
  892. .fname = XC2028_DEFAULT_FIRMWARE,
  893. .max_len = 64,
  894. .scode_table = XC3028_FE_OREN538,
  895. };
  896. fe = dvb_attach(xc2028_attach,
  897. fe0->dvb.frontend, &cfg);
  898. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  899. fe->ops.tuner_ops.set_config(fe, &ctl);
  900. }
  901. break;
  902. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  903. case CX88_BOARD_WINFAST_DTV1800H:
  904. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  905. &cx88_pinnacle_hybrid_pctv,
  906. &core->i2c_adap);
  907. if (fe0->dvb.frontend) {
  908. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  909. if (attach_xc3028(0x61, dev) < 0)
  910. goto frontend_detach;
  911. }
  912. break;
  913. case CX88_BOARD_GENIATECH_X8000_MT:
  914. dev->ts_gen_cntrl = 0x00;
  915. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  916. &cx88_geniatech_x8000_mt,
  917. &core->i2c_adap);
  918. if (attach_xc3028(0x61, dev) < 0)
  919. goto frontend_detach;
  920. break;
  921. case CX88_BOARD_KWORLD_ATSC_120:
  922. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  923. &kworld_atsc_120_config,
  924. &core->i2c_adap);
  925. if (attach_xc3028(0x61, dev) < 0)
  926. goto frontend_detach;
  927. break;
  928. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  929. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  930. &dvico_fusionhdtv7_config,
  931. &core->i2c_adap);
  932. if (fe0->dvb.frontend != NULL) {
  933. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  934. &core->i2c_adap,
  935. &dvico_fusionhdtv7_tuner_config))
  936. goto frontend_detach;
  937. }
  938. break;
  939. case CX88_BOARD_HAUPPAUGE_HVR4000:
  940. /* MFE frontend 1 */
  941. mfe_shared = 1;
  942. dev->frontends.gate = 2;
  943. /* DVB-S/S2 Init */
  944. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  945. &hauppauge_hvr4000_config,
  946. &dev->core->i2c_adap);
  947. if (fe0->dvb.frontend) {
  948. if (!dvb_attach(isl6421_attach,
  949. fe0->dvb.frontend,
  950. &dev->core->i2c_adap,
  951. 0x08, ISL6421_DCL, 0x00))
  952. goto frontend_detach;
  953. }
  954. /* MFE frontend 2 */
  955. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  956. if (!fe1)
  957. goto frontend_detach;
  958. /* DVB-T Init */
  959. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  960. &hauppauge_hvr_config,
  961. &dev->core->i2c_adap);
  962. if (fe1->dvb.frontend) {
  963. fe1->dvb.frontend->id = 1;
  964. if (!dvb_attach(simple_tuner_attach,
  965. fe1->dvb.frontend,
  966. &dev->core->i2c_adap,
  967. 0x61, TUNER_PHILIPS_FMD1216ME_MK3))
  968. goto frontend_detach;
  969. }
  970. break;
  971. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  972. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  973. &hauppauge_hvr4000_config,
  974. &dev->core->i2c_adap);
  975. if (fe0->dvb.frontend) {
  976. if (!dvb_attach(isl6421_attach,
  977. fe0->dvb.frontend,
  978. &dev->core->i2c_adap,
  979. 0x08, ISL6421_DCL, 0x00))
  980. goto frontend_detach;
  981. }
  982. break;
  983. case CX88_BOARD_PROF_6200:
  984. case CX88_BOARD_TBS_8910:
  985. case CX88_BOARD_TEVII_S420:
  986. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  987. &tevii_tuner_sharp_config,
  988. &core->i2c_adap);
  989. if (fe0->dvb.frontend != NULL) {
  990. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  991. &core->i2c_adap, DVB_PLL_OPERA1))
  992. goto frontend_detach;
  993. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  994. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  995. } else {
  996. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  997. &tevii_tuner_earda_config,
  998. &core->i2c_adap);
  999. if (fe0->dvb.frontend != NULL) {
  1000. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  1001. &core->i2c_adap))
  1002. goto frontend_detach;
  1003. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  1004. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1005. }
  1006. }
  1007. break;
  1008. case CX88_BOARD_TEVII_S460:
  1009. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1010. &tevii_s460_config,
  1011. &core->i2c_adap);
  1012. if (fe0->dvb.frontend != NULL)
  1013. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1014. break;
  1015. case CX88_BOARD_OMICOM_SS4_PCI:
  1016. case CX88_BOARD_TBS_8920:
  1017. case CX88_BOARD_PROF_7300:
  1018. case CX88_BOARD_SATTRADE_ST4200:
  1019. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  1020. &hauppauge_hvr4000_config,
  1021. &core->i2c_adap);
  1022. if (fe0->dvb.frontend != NULL)
  1023. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  1024. break;
  1025. case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII:
  1026. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  1027. &cx88_terratec_cinergy_ht_pci_mkii_config,
  1028. &core->i2c_adap);
  1029. if (fe0->dvb.frontend) {
  1030. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  1031. if (attach_xc3028(0x61, dev) < 0)
  1032. goto frontend_detach;
  1033. }
  1034. break;
  1035. default:
  1036. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  1037. core->name);
  1038. break;
  1039. }
  1040. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  1041. printk(KERN_ERR
  1042. "%s/2: frontend initialization failed\n",
  1043. core->name);
  1044. goto frontend_detach;
  1045. }
  1046. /* define general-purpose callback pointer */
  1047. fe0->dvb.frontend->callback = cx88_tuner_callback;
  1048. /* Ensure all frontends negotiate bus access */
  1049. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1050. if (fe1)
  1051. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  1052. /* Put the analog decoder in standby to keep it quiet */
  1053. call_all(core, tuner, s_standby);
  1054. /* register everything */
  1055. return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1056. &dev->pci->dev, adapter_nr, mfe_shared);
  1057. frontend_detach:
  1058. core->gate_ctrl = NULL;
  1059. videobuf_dvb_dealloc_frontends(&dev->frontends);
  1060. return -EINVAL;
  1061. }
  1062. /* ----------------------------------------------------------- */
  1063. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1064. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1065. {
  1066. struct cx88_core *core = drv->core;
  1067. int err = 0;
  1068. dprintk( 1, "%s\n", __func__);
  1069. switch (core->boardnr) {
  1070. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1071. /* We arrive here with either the cx23416 or the cx22702
  1072. * on the bus. Take the bus from the cx23416 and enable the
  1073. * cx22702 demod
  1074. */
  1075. /* Toggle reset on cx22702 leaving i2c active */
  1076. cx_set(MO_GP0_IO, 0x00000080);
  1077. udelay(1000);
  1078. cx_clear(MO_GP0_IO, 0x00000080);
  1079. udelay(50);
  1080. cx_set(MO_GP0_IO, 0x00000080);
  1081. udelay(1000);
  1082. /* enable the cx22702 pins */
  1083. cx_clear(MO_GP0_IO, 0x00000004);
  1084. udelay(1000);
  1085. break;
  1086. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1087. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1088. /* Toggle reset on cx22702 leaving i2c active */
  1089. cx_set(MO_GP0_IO, 0x00000080);
  1090. udelay(1000);
  1091. cx_clear(MO_GP0_IO, 0x00000080);
  1092. udelay(50);
  1093. cx_set(MO_GP0_IO, 0x00000080);
  1094. udelay(1000);
  1095. switch (core->dvbdev->frontends.active_fe_id) {
  1096. case 1: /* DVB-S/S2 Enabled */
  1097. /* tri-state the cx22702 pins */
  1098. cx_set(MO_GP0_IO, 0x00000004);
  1099. /* Take the cx24116/cx24123 out of reset */
  1100. cx_write(MO_SRST_IO, 1);
  1101. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1102. break;
  1103. case 2: /* DVB-T Enabled */
  1104. /* Put the cx24116/cx24123 into reset */
  1105. cx_write(MO_SRST_IO, 0);
  1106. /* enable the cx22702 pins */
  1107. cx_clear(MO_GP0_IO, 0x00000004);
  1108. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1109. break;
  1110. }
  1111. udelay(1000);
  1112. break;
  1113. default:
  1114. err = -ENODEV;
  1115. }
  1116. return err;
  1117. }
  1118. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1119. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1120. {
  1121. struct cx88_core *core = drv->core;
  1122. int err = 0;
  1123. dprintk( 1, "%s\n", __func__);
  1124. switch (core->boardnr) {
  1125. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1126. /* Do Nothing, leave the cx22702 on the bus. */
  1127. break;
  1128. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1129. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1130. break;
  1131. default:
  1132. err = -ENODEV;
  1133. }
  1134. return err;
  1135. }
  1136. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1137. {
  1138. struct cx88_core *core = drv->core;
  1139. struct cx8802_dev *dev = drv->core->dvbdev;
  1140. int err;
  1141. struct videobuf_dvb_frontend *fe;
  1142. int i;
  1143. dprintk( 1, "%s\n", __func__);
  1144. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1145. core->boardnr,
  1146. core->name,
  1147. core->pci_bus,
  1148. core->pci_slot);
  1149. err = -ENODEV;
  1150. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1151. goto fail_core;
  1152. /* If vp3054 isn't enabled, a stub will just return 0 */
  1153. err = vp3054_i2c_probe(dev);
  1154. if (0 != err)
  1155. goto fail_core;
  1156. /* dvb stuff */
  1157. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1158. dev->ts_gen_cntrl = 0x0c;
  1159. err = cx8802_alloc_frontends(dev);
  1160. if (err)
  1161. goto fail_core;
  1162. err = -ENODEV;
  1163. for (i = 1; i <= core->board.num_frontends; i++) {
  1164. fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
  1165. if (fe == NULL) {
  1166. printk(KERN_ERR "%s() failed to get frontend(%d)\n",
  1167. __func__, i);
  1168. goto fail_probe;
  1169. }
  1170. videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
  1171. &dev->pci->dev, &dev->slock,
  1172. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  1173. V4L2_FIELD_TOP,
  1174. sizeof(struct cx88_buffer),
  1175. dev);
  1176. /* init struct videobuf_dvb */
  1177. fe->dvb.name = dev->core->name;
  1178. }
  1179. err = dvb_register(dev);
  1180. if (err)
  1181. /* frontends/adapter de-allocated in dvb_register */
  1182. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1183. core->name, err);
  1184. return err;
  1185. fail_probe:
  1186. videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends);
  1187. fail_core:
  1188. return err;
  1189. }
  1190. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1191. {
  1192. struct cx88_core *core = drv->core;
  1193. struct cx8802_dev *dev = drv->core->dvbdev;
  1194. dprintk( 1, "%s\n", __func__);
  1195. videobuf_dvb_unregister_bus(&dev->frontends);
  1196. vp3054_i2c_remove(dev);
  1197. core->gate_ctrl = NULL;
  1198. return 0;
  1199. }
  1200. static struct cx8802_driver cx8802_dvb_driver = {
  1201. .type_id = CX88_MPEG_DVB,
  1202. .hw_access = CX8802_DRVCTL_SHARED,
  1203. .probe = cx8802_dvb_probe,
  1204. .remove = cx8802_dvb_remove,
  1205. .advise_acquire = cx8802_dvb_advise_acquire,
  1206. .advise_release = cx8802_dvb_advise_release,
  1207. };
  1208. static int dvb_init(void)
  1209. {
  1210. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  1211. (CX88_VERSION_CODE >> 16) & 0xff,
  1212. (CX88_VERSION_CODE >> 8) & 0xff,
  1213. CX88_VERSION_CODE & 0xff);
  1214. #ifdef SNAPSHOT
  1215. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  1216. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  1217. #endif
  1218. return cx8802_register_driver(&cx8802_dvb_driver);
  1219. }
  1220. static void dvb_fini(void)
  1221. {
  1222. cx8802_unregister_driver(&cx8802_dvb_driver);
  1223. }
  1224. module_init(dvb_init);
  1225. module_exit(dvb_fini);
  1226. /*
  1227. * Local variables:
  1228. * c-basic-offset: 8
  1229. * compile-command: "make DVB=1"
  1230. * End:
  1231. */