rtc-s3c.c 13 KB

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  1. /* drivers/rtc/rtc-s3c.c
  2. *
  3. * Copyright (c) 2004,2006 Simtec Electronics
  4. * Ben Dooks, <ben@simtec.co.uk>
  5. * http://armlinux.simtec.co.uk/
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. *
  11. * S3C2410/S3C2440/S3C24XX Internal RTC Driver
  12. */
  13. #include <linux/module.h>
  14. #include <linux/fs.h>
  15. #include <linux/string.h>
  16. #include <linux/init.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/clk.h>
  22. #include <linux/log2.h>
  23. #include <asm/hardware.h>
  24. #include <asm/uaccess.h>
  25. #include <asm/io.h>
  26. #include <asm/irq.h>
  27. #include <asm/plat-s3c/regs-rtc.h>
  28. /* I have yet to find an S3C implementation with more than one
  29. * of these rtc blocks in */
  30. static struct resource *s3c_rtc_mem;
  31. static void __iomem *s3c_rtc_base;
  32. static int s3c_rtc_alarmno = NO_IRQ;
  33. static int s3c_rtc_tickno = NO_IRQ;
  34. static int s3c_rtc_freq = 1;
  35. static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
  36. static unsigned int tick_count;
  37. /* IRQ Handlers */
  38. static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
  39. {
  40. struct rtc_device *rdev = id;
  41. rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
  42. return IRQ_HANDLED;
  43. }
  44. static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
  45. {
  46. struct rtc_device *rdev = id;
  47. rtc_update_irq(rdev, tick_count++, RTC_PF | RTC_IRQF);
  48. return IRQ_HANDLED;
  49. }
  50. /* Update control registers */
  51. static void s3c_rtc_setaie(int to)
  52. {
  53. unsigned int tmp;
  54. pr_debug("%s: aie=%d\n", __func__, to);
  55. tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
  56. if (to)
  57. tmp |= S3C2410_RTCALM_ALMEN;
  58. writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
  59. }
  60. static void s3c_rtc_setpie(int to)
  61. {
  62. unsigned int tmp;
  63. pr_debug("%s: pie=%d\n", __func__, to);
  64. spin_lock_irq(&s3c_rtc_pie_lock);
  65. tmp = readb(s3c_rtc_base + S3C2410_TICNT) & ~S3C2410_TICNT_ENABLE;
  66. if (to)
  67. tmp |= S3C2410_TICNT_ENABLE;
  68. writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
  69. spin_unlock_irq(&s3c_rtc_pie_lock);
  70. }
  71. static void s3c_rtc_setfreq(int freq)
  72. {
  73. unsigned int tmp;
  74. spin_lock_irq(&s3c_rtc_pie_lock);
  75. tmp = readb(s3c_rtc_base + S3C2410_TICNT) & S3C2410_TICNT_ENABLE;
  76. s3c_rtc_freq = freq;
  77. tmp |= (128 / freq)-1;
  78. writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
  79. spin_unlock_irq(&s3c_rtc_pie_lock);
  80. }
  81. /* Time read/write */
  82. static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  83. {
  84. unsigned int have_retried = 0;
  85. void __iomem *base = s3c_rtc_base;
  86. retry_get_time:
  87. rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
  88. rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
  89. rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
  90. rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
  91. rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
  92. rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
  93. /* the only way to work out wether the system was mid-update
  94. * when we read it is to check the second counter, and if it
  95. * is zero, then we re-try the entire read
  96. */
  97. if (rtc_tm->tm_sec == 0 && !have_retried) {
  98. have_retried = 1;
  99. goto retry_get_time;
  100. }
  101. pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n",
  102. rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
  103. rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
  104. BCD_TO_BIN(rtc_tm->tm_sec);
  105. BCD_TO_BIN(rtc_tm->tm_min);
  106. BCD_TO_BIN(rtc_tm->tm_hour);
  107. BCD_TO_BIN(rtc_tm->tm_mday);
  108. BCD_TO_BIN(rtc_tm->tm_mon);
  109. BCD_TO_BIN(rtc_tm->tm_year);
  110. rtc_tm->tm_year += 100;
  111. rtc_tm->tm_mon -= 1;
  112. return 0;
  113. }
  114. static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
  115. {
  116. void __iomem *base = s3c_rtc_base;
  117. int year = tm->tm_year - 100;
  118. pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n",
  119. tm->tm_year, tm->tm_mon, tm->tm_mday,
  120. tm->tm_hour, tm->tm_min, tm->tm_sec);
  121. /* we get around y2k by simply not supporting it */
  122. if (year < 0 || year >= 100) {
  123. dev_err(dev, "rtc only supports 100 years\n");
  124. return -EINVAL;
  125. }
  126. writeb(BIN2BCD(tm->tm_sec), base + S3C2410_RTCSEC);
  127. writeb(BIN2BCD(tm->tm_min), base + S3C2410_RTCMIN);
  128. writeb(BIN2BCD(tm->tm_hour), base + S3C2410_RTCHOUR);
  129. writeb(BIN2BCD(tm->tm_mday), base + S3C2410_RTCDATE);
  130. writeb(BIN2BCD(tm->tm_mon + 1), base + S3C2410_RTCMON);
  131. writeb(BIN2BCD(year), base + S3C2410_RTCYEAR);
  132. return 0;
  133. }
  134. static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
  135. {
  136. struct rtc_time *alm_tm = &alrm->time;
  137. void __iomem *base = s3c_rtc_base;
  138. unsigned int alm_en;
  139. alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
  140. alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
  141. alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
  142. alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
  143. alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
  144. alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
  145. alm_en = readb(base + S3C2410_RTCALM);
  146. alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
  147. pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n",
  148. alm_en,
  149. alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
  150. alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
  151. /* decode the alarm enable field */
  152. if (alm_en & S3C2410_RTCALM_SECEN)
  153. BCD_TO_BIN(alm_tm->tm_sec);
  154. else
  155. alm_tm->tm_sec = 0xff;
  156. if (alm_en & S3C2410_RTCALM_MINEN)
  157. BCD_TO_BIN(alm_tm->tm_min);
  158. else
  159. alm_tm->tm_min = 0xff;
  160. if (alm_en & S3C2410_RTCALM_HOUREN)
  161. BCD_TO_BIN(alm_tm->tm_hour);
  162. else
  163. alm_tm->tm_hour = 0xff;
  164. if (alm_en & S3C2410_RTCALM_DAYEN)
  165. BCD_TO_BIN(alm_tm->tm_mday);
  166. else
  167. alm_tm->tm_mday = 0xff;
  168. if (alm_en & S3C2410_RTCALM_MONEN) {
  169. BCD_TO_BIN(alm_tm->tm_mon);
  170. alm_tm->tm_mon -= 1;
  171. } else {
  172. alm_tm->tm_mon = 0xff;
  173. }
  174. if (alm_en & S3C2410_RTCALM_YEAREN)
  175. BCD_TO_BIN(alm_tm->tm_year);
  176. else
  177. alm_tm->tm_year = 0xffff;
  178. return 0;
  179. }
  180. static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  181. {
  182. struct rtc_time *tm = &alrm->time;
  183. void __iomem *base = s3c_rtc_base;
  184. unsigned int alrm_en;
  185. pr_debug("s3c_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n",
  186. alrm->enabled,
  187. tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff,
  188. tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec);
  189. alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
  190. writeb(0x00, base + S3C2410_RTCALM);
  191. if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
  192. alrm_en |= S3C2410_RTCALM_SECEN;
  193. writeb(BIN2BCD(tm->tm_sec), base + S3C2410_ALMSEC);
  194. }
  195. if (tm->tm_min < 60 && tm->tm_min >= 0) {
  196. alrm_en |= S3C2410_RTCALM_MINEN;
  197. writeb(BIN2BCD(tm->tm_min), base + S3C2410_ALMMIN);
  198. }
  199. if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
  200. alrm_en |= S3C2410_RTCALM_HOUREN;
  201. writeb(BIN2BCD(tm->tm_hour), base + S3C2410_ALMHOUR);
  202. }
  203. pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
  204. writeb(alrm_en, base + S3C2410_RTCALM);
  205. if (0) {
  206. alrm_en = readb(base + S3C2410_RTCALM);
  207. alrm_en &= ~S3C2410_RTCALM_ALMEN;
  208. writeb(alrm_en, base + S3C2410_RTCALM);
  209. disable_irq_wake(s3c_rtc_alarmno);
  210. }
  211. if (alrm->enabled)
  212. enable_irq_wake(s3c_rtc_alarmno);
  213. else
  214. disable_irq_wake(s3c_rtc_alarmno);
  215. return 0;
  216. }
  217. static int s3c_rtc_ioctl(struct device *dev,
  218. unsigned int cmd, unsigned long arg)
  219. {
  220. unsigned int ret = -ENOIOCTLCMD;
  221. switch (cmd) {
  222. case RTC_AIE_OFF:
  223. case RTC_AIE_ON:
  224. s3c_rtc_setaie((cmd == RTC_AIE_ON) ? 1 : 0);
  225. ret = 0;
  226. break;
  227. case RTC_PIE_OFF:
  228. case RTC_PIE_ON:
  229. tick_count = 0;
  230. s3c_rtc_setpie((cmd == RTC_PIE_ON) ? 1 : 0);
  231. ret = 0;
  232. break;
  233. case RTC_IRQP_READ:
  234. ret = put_user(s3c_rtc_freq, (unsigned long __user *)arg);
  235. break;
  236. case RTC_IRQP_SET:
  237. if (!is_power_of_2(arg)) {
  238. ret = -EINVAL;
  239. goto exit;
  240. }
  241. pr_debug("s3c2410_rtc: setting frequency %ld\n", arg);
  242. s3c_rtc_setfreq(arg);
  243. ret = 0;
  244. break;
  245. case RTC_UIE_ON:
  246. case RTC_UIE_OFF:
  247. ret = -EINVAL;
  248. }
  249. exit:
  250. return ret;
  251. }
  252. static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
  253. {
  254. unsigned int ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
  255. seq_printf(seq, "periodic_IRQ\t: %s\n",
  256. (ticnt & S3C2410_TICNT_ENABLE) ? "yes" : "no" );
  257. seq_printf(seq, "periodic_freq\t: %d\n", s3c_rtc_freq);
  258. return 0;
  259. }
  260. static int s3c_rtc_open(struct device *dev)
  261. {
  262. struct platform_device *pdev = to_platform_device(dev);
  263. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  264. int ret;
  265. ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
  266. IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev);
  267. if (ret) {
  268. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
  269. return ret;
  270. }
  271. ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
  272. IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev);
  273. if (ret) {
  274. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
  275. goto tick_err;
  276. }
  277. return ret;
  278. tick_err:
  279. free_irq(s3c_rtc_alarmno, rtc_dev);
  280. return ret;
  281. }
  282. static void s3c_rtc_release(struct device *dev)
  283. {
  284. struct platform_device *pdev = to_platform_device(dev);
  285. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  286. /* do not clear AIE here, it may be needed for wake */
  287. s3c_rtc_setpie(0);
  288. free_irq(s3c_rtc_alarmno, rtc_dev);
  289. free_irq(s3c_rtc_tickno, rtc_dev);
  290. }
  291. static const struct rtc_class_ops s3c_rtcops = {
  292. .open = s3c_rtc_open,
  293. .release = s3c_rtc_release,
  294. .ioctl = s3c_rtc_ioctl,
  295. .read_time = s3c_rtc_gettime,
  296. .set_time = s3c_rtc_settime,
  297. .read_alarm = s3c_rtc_getalarm,
  298. .set_alarm = s3c_rtc_setalarm,
  299. .proc = s3c_rtc_proc,
  300. };
  301. static void s3c_rtc_enable(struct platform_device *pdev, int en)
  302. {
  303. void __iomem *base = s3c_rtc_base;
  304. unsigned int tmp;
  305. if (s3c_rtc_base == NULL)
  306. return;
  307. if (!en) {
  308. tmp = readb(base + S3C2410_RTCCON);
  309. writeb(tmp & ~S3C2410_RTCCON_RTCEN, base + S3C2410_RTCCON);
  310. tmp = readb(base + S3C2410_TICNT);
  311. writeb(tmp & ~S3C2410_TICNT_ENABLE, base + S3C2410_TICNT);
  312. } else {
  313. /* re-enable the device, and check it is ok */
  314. if ((readb(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0){
  315. dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
  316. tmp = readb(base + S3C2410_RTCCON);
  317. writeb(tmp|S3C2410_RTCCON_RTCEN, base+S3C2410_RTCCON);
  318. }
  319. if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)){
  320. dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
  321. tmp = readb(base + S3C2410_RTCCON);
  322. writeb(tmp& ~S3C2410_RTCCON_CNTSEL, base+S3C2410_RTCCON);
  323. }
  324. if ((readb(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)){
  325. dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
  326. tmp = readb(base + S3C2410_RTCCON);
  327. writeb(tmp & ~S3C2410_RTCCON_CLKRST, base+S3C2410_RTCCON);
  328. }
  329. }
  330. }
  331. static int __devexit s3c_rtc_remove(struct platform_device *dev)
  332. {
  333. struct rtc_device *rtc = platform_get_drvdata(dev);
  334. platform_set_drvdata(dev, NULL);
  335. rtc_device_unregister(rtc);
  336. s3c_rtc_setpie(0);
  337. s3c_rtc_setaie(0);
  338. iounmap(s3c_rtc_base);
  339. release_resource(s3c_rtc_mem);
  340. kfree(s3c_rtc_mem);
  341. return 0;
  342. }
  343. static int __devinit s3c_rtc_probe(struct platform_device *pdev)
  344. {
  345. struct rtc_device *rtc;
  346. struct resource *res;
  347. int ret;
  348. pr_debug("%s: probe=%p\n", __func__, pdev);
  349. /* find the IRQs */
  350. s3c_rtc_tickno = platform_get_irq(pdev, 1);
  351. if (s3c_rtc_tickno < 0) {
  352. dev_err(&pdev->dev, "no irq for rtc tick\n");
  353. return -ENOENT;
  354. }
  355. s3c_rtc_alarmno = platform_get_irq(pdev, 0);
  356. if (s3c_rtc_alarmno < 0) {
  357. dev_err(&pdev->dev, "no irq for alarm\n");
  358. return -ENOENT;
  359. }
  360. pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
  361. s3c_rtc_tickno, s3c_rtc_alarmno);
  362. /* get the memory region */
  363. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  364. if (res == NULL) {
  365. dev_err(&pdev->dev, "failed to get memory region resource\n");
  366. return -ENOENT;
  367. }
  368. s3c_rtc_mem = request_mem_region(res->start,
  369. res->end-res->start+1,
  370. pdev->name);
  371. if (s3c_rtc_mem == NULL) {
  372. dev_err(&pdev->dev, "failed to reserve memory region\n");
  373. ret = -ENOENT;
  374. goto err_nores;
  375. }
  376. s3c_rtc_base = ioremap(res->start, res->end - res->start + 1);
  377. if (s3c_rtc_base == NULL) {
  378. dev_err(&pdev->dev, "failed ioremap()\n");
  379. ret = -EINVAL;
  380. goto err_nomap;
  381. }
  382. /* check to see if everything is setup correctly */
  383. s3c_rtc_enable(pdev, 1);
  384. pr_debug("s3c2410_rtc: RTCCON=%02x\n",
  385. readb(s3c_rtc_base + S3C2410_RTCCON));
  386. s3c_rtc_setfreq(s3c_rtc_freq);
  387. /* register RTC and exit */
  388. rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
  389. THIS_MODULE);
  390. if (IS_ERR(rtc)) {
  391. dev_err(&pdev->dev, "cannot attach rtc\n");
  392. ret = PTR_ERR(rtc);
  393. goto err_nortc;
  394. }
  395. rtc->max_user_freq = 128;
  396. platform_set_drvdata(pdev, rtc);
  397. return 0;
  398. err_nortc:
  399. s3c_rtc_enable(pdev, 0);
  400. iounmap(s3c_rtc_base);
  401. err_nomap:
  402. release_resource(s3c_rtc_mem);
  403. err_nores:
  404. return ret;
  405. }
  406. #ifdef CONFIG_PM
  407. /* RTC Power management control */
  408. static int ticnt_save;
  409. static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  410. {
  411. /* save TICNT for anyone using periodic interrupts */
  412. ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
  413. s3c_rtc_enable(pdev, 0);
  414. return 0;
  415. }
  416. static int s3c_rtc_resume(struct platform_device *pdev)
  417. {
  418. s3c_rtc_enable(pdev, 1);
  419. writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
  420. return 0;
  421. }
  422. #else
  423. #define s3c_rtc_suspend NULL
  424. #define s3c_rtc_resume NULL
  425. #endif
  426. static struct platform_driver s3c2410_rtcdrv = {
  427. .probe = s3c_rtc_probe,
  428. .remove = __devexit_p(s3c_rtc_remove),
  429. .suspend = s3c_rtc_suspend,
  430. .resume = s3c_rtc_resume,
  431. .driver = {
  432. .name = "s3c2410-rtc",
  433. .owner = THIS_MODULE,
  434. },
  435. };
  436. static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
  437. static int __init s3c_rtc_init(void)
  438. {
  439. printk(banner);
  440. return platform_driver_register(&s3c2410_rtcdrv);
  441. }
  442. static void __exit s3c_rtc_exit(void)
  443. {
  444. platform_driver_unregister(&s3c2410_rtcdrv);
  445. }
  446. module_init(s3c_rtc_init);
  447. module_exit(s3c_rtc_exit);
  448. MODULE_DESCRIPTION("Samsung S3C RTC Driver");
  449. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
  450. MODULE_LICENSE("GPL");
  451. MODULE_ALIAS("platform:s3c2410-rtc");