lpfc_sli.c 73 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Enterprise Fibre Channel Host Bus Adapters. *
  4. * Refer to the README file included with this package for *
  5. * driver version and adapter support. *
  6. * Copyright (C) 2004 Emulex Corporation. *
  7. * www.emulex.com *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of the GNU General Public License *
  11. * as published by the Free Software Foundation; either version 2 *
  12. * of the License, or (at your option) any later version. *
  13. * *
  14. * This program is distributed in the hope that it will be useful, *
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of *
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
  17. * GNU General Public License for more details, a copy of which *
  18. * can be found in the file COPYING included with this package. *
  19. *******************************************************************/
  20. /*
  21. * $Id: lpfc_sli.c 1.232 2005/04/13 11:59:16EDT sf_support Exp $
  22. */
  23. #include <linux/blkdev.h>
  24. #include <linux/pci.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/delay.h>
  27. #include <scsi/scsi_cmnd.h>
  28. #include <scsi/scsi_device.h>
  29. #include <scsi/scsi_host.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. /*
  39. * Define macro to log: Mailbox command x%x cannot issue Data
  40. * This allows multiple uses of lpfc_msgBlk0311
  41. * w/o perturbing log msg utility.
  42. */
  43. #define LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag) \
  44. lpfc_printf_log(phba, \
  45. KERN_INFO, \
  46. LOG_MBOX | LOG_SLI, \
  47. "%d:0311 Mailbox command x%x cannot issue " \
  48. "Data: x%x x%x x%x\n", \
  49. phba->brd_no, \
  50. mb->mbxCommand, \
  51. phba->hba_state, \
  52. psli->sli_flag, \
  53. flag);
  54. /* There are only four IOCB completion types. */
  55. typedef enum _lpfc_iocb_type {
  56. LPFC_UNKNOWN_IOCB,
  57. LPFC_UNSOL_IOCB,
  58. LPFC_SOL_IOCB,
  59. LPFC_ABORT_IOCB
  60. } lpfc_iocb_type;
  61. /*
  62. * Translate the iocb command to an iocb command type used to decide the final
  63. * disposition of each completed IOCB.
  64. */
  65. static lpfc_iocb_type
  66. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  67. {
  68. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  69. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  70. return 0;
  71. switch (iocb_cmnd) {
  72. case CMD_XMIT_SEQUENCE_CR:
  73. case CMD_XMIT_SEQUENCE_CX:
  74. case CMD_XMIT_BCAST_CN:
  75. case CMD_XMIT_BCAST_CX:
  76. case CMD_ELS_REQUEST_CR:
  77. case CMD_ELS_REQUEST_CX:
  78. case CMD_CREATE_XRI_CR:
  79. case CMD_CREATE_XRI_CX:
  80. case CMD_GET_RPI_CN:
  81. case CMD_XMIT_ELS_RSP_CX:
  82. case CMD_GET_RPI_CR:
  83. case CMD_FCP_IWRITE_CR:
  84. case CMD_FCP_IWRITE_CX:
  85. case CMD_FCP_IREAD_CR:
  86. case CMD_FCP_IREAD_CX:
  87. case CMD_FCP_ICMND_CR:
  88. case CMD_FCP_ICMND_CX:
  89. case CMD_ADAPTER_MSG:
  90. case CMD_ADAPTER_DUMP:
  91. case CMD_XMIT_SEQUENCE64_CR:
  92. case CMD_XMIT_SEQUENCE64_CX:
  93. case CMD_XMIT_BCAST64_CN:
  94. case CMD_XMIT_BCAST64_CX:
  95. case CMD_ELS_REQUEST64_CR:
  96. case CMD_ELS_REQUEST64_CX:
  97. case CMD_FCP_IWRITE64_CR:
  98. case CMD_FCP_IWRITE64_CX:
  99. case CMD_FCP_IREAD64_CR:
  100. case CMD_FCP_IREAD64_CX:
  101. case CMD_FCP_ICMND64_CR:
  102. case CMD_FCP_ICMND64_CX:
  103. case CMD_GEN_REQUEST64_CR:
  104. case CMD_GEN_REQUEST64_CX:
  105. case CMD_XMIT_ELS_RSP64_CX:
  106. type = LPFC_SOL_IOCB;
  107. break;
  108. case CMD_ABORT_XRI_CN:
  109. case CMD_ABORT_XRI_CX:
  110. case CMD_CLOSE_XRI_CN:
  111. case CMD_CLOSE_XRI_CX:
  112. case CMD_XRI_ABORTED_CX:
  113. case CMD_ABORT_MXRI64_CN:
  114. type = LPFC_ABORT_IOCB;
  115. break;
  116. case CMD_RCV_SEQUENCE_CX:
  117. case CMD_RCV_ELS_REQ_CX:
  118. case CMD_RCV_SEQUENCE64_CX:
  119. case CMD_RCV_ELS_REQ64_CX:
  120. type = LPFC_UNSOL_IOCB;
  121. break;
  122. default:
  123. type = LPFC_UNKNOWN_IOCB;
  124. break;
  125. }
  126. return type;
  127. }
  128. static int
  129. lpfc_sli_ring_map(struct lpfc_hba * phba, LPFC_MBOXQ_t *pmb)
  130. {
  131. struct lpfc_sli *psli = &phba->sli;
  132. MAILBOX_t *pmbox = &pmb->mb;
  133. int i, rc;
  134. for (i = 0; i < psli->num_rings; i++) {
  135. phba->hba_state = LPFC_INIT_MBX_CMDS;
  136. lpfc_config_ring(phba, i, pmb);
  137. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  138. if (rc != MBX_SUCCESS) {
  139. lpfc_printf_log(phba,
  140. KERN_ERR,
  141. LOG_INIT,
  142. "%d:0446 Adapter failed to init, "
  143. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  144. "ring %d\n",
  145. phba->brd_no,
  146. pmbox->mbxCommand,
  147. pmbox->mbxStatus,
  148. i);
  149. phba->hba_state = LPFC_HBA_ERROR;
  150. return -ENXIO;
  151. }
  152. }
  153. return 0;
  154. }
  155. static int
  156. lpfc_sli_ringtxcmpl_put(struct lpfc_hba * phba,
  157. struct lpfc_sli_ring * pring, struct lpfc_iocbq * piocb)
  158. {
  159. uint16_t iotag;
  160. list_add_tail(&piocb->list, &pring->txcmplq);
  161. pring->txcmplq_cnt++;
  162. if (unlikely(pring->ringno == LPFC_ELS_RING))
  163. mod_timer(&phba->els_tmofunc,
  164. jiffies + HZ * (phba->fc_ratov << 1));
  165. if (pring->fast_lookup) {
  166. /* Setup fast lookup based on iotag for completion */
  167. iotag = piocb->iocb.ulpIoTag;
  168. if (iotag && (iotag < pring->fast_iotag))
  169. *(pring->fast_lookup + iotag) = piocb;
  170. else {
  171. /* Cmd ring <ringno> put: iotag <iotag> greater then
  172. configured max <fast_iotag> wd0 <icmd> */
  173. lpfc_printf_log(phba,
  174. KERN_ERR,
  175. LOG_SLI,
  176. "%d:0316 Cmd ring %d put: iotag x%x "
  177. "greater then configured max x%x "
  178. "wd0 x%x\n",
  179. phba->brd_no,
  180. pring->ringno, iotag,
  181. pring->fast_iotag,
  182. *(((uint32_t *)(&piocb->iocb)) + 7));
  183. }
  184. }
  185. return (0);
  186. }
  187. static struct lpfc_iocbq *
  188. lpfc_sli_ringtx_get(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  189. {
  190. struct list_head *dlp;
  191. struct lpfc_iocbq *cmd_iocb;
  192. dlp = &pring->txq;
  193. cmd_iocb = NULL;
  194. list_remove_head((&pring->txq), cmd_iocb,
  195. struct lpfc_iocbq,
  196. list);
  197. if (cmd_iocb) {
  198. /* If the first ptr is not equal to the list header,
  199. * deque the IOCBQ_t and return it.
  200. */
  201. pring->txq_cnt--;
  202. }
  203. return (cmd_iocb);
  204. }
  205. static IOCB_t *
  206. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  207. {
  208. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  209. uint32_t max_cmd_idx = pring->numCiocb;
  210. IOCB_t *iocb = NULL;
  211. if ((pring->next_cmdidx == pring->cmdidx) &&
  212. (++pring->next_cmdidx >= max_cmd_idx))
  213. pring->next_cmdidx = 0;
  214. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  215. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  216. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  217. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  218. "%d:0315 Ring %d issue: portCmdGet %d "
  219. "is bigger then cmd ring %d\n",
  220. phba->brd_no, pring->ringno,
  221. pring->local_getidx, max_cmd_idx);
  222. phba->hba_state = LPFC_HBA_ERROR;
  223. /*
  224. * All error attention handlers are posted to
  225. * worker thread
  226. */
  227. phba->work_ha |= HA_ERATT;
  228. phba->work_hs = HS_FFER3;
  229. if (phba->work_wait)
  230. wake_up(phba->work_wait);
  231. return NULL;
  232. }
  233. if (pring->local_getidx == pring->next_cmdidx)
  234. return NULL;
  235. }
  236. iocb = IOCB_ENTRY(pring->cmdringaddr, pring->cmdidx);
  237. return iocb;
  238. }
  239. static uint32_t
  240. lpfc_sli_next_iotag(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  241. {
  242. uint32_t search_start;
  243. if (pring->fast_lookup == NULL) {
  244. pring->iotag_ctr++;
  245. if (pring->iotag_ctr >= pring->iotag_max)
  246. pring->iotag_ctr = 1;
  247. return pring->iotag_ctr;
  248. }
  249. search_start = pring->iotag_ctr;
  250. do {
  251. pring->iotag_ctr++;
  252. if (pring->iotag_ctr >= pring->fast_iotag)
  253. pring->iotag_ctr = 1;
  254. if (*(pring->fast_lookup + pring->iotag_ctr) == NULL)
  255. return pring->iotag_ctr;
  256. } while (pring->iotag_ctr != search_start);
  257. /*
  258. * Outstanding I/O count for ring <ringno> is at max <fast_iotag>
  259. */
  260. lpfc_printf_log(phba,
  261. KERN_ERR,
  262. LOG_SLI,
  263. "%d:0318 Outstanding I/O count for ring %d is at max x%x\n",
  264. phba->brd_no,
  265. pring->ringno,
  266. pring->fast_iotag);
  267. return (0);
  268. }
  269. static void
  270. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  271. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  272. {
  273. /*
  274. * Allocate and set up an iotag
  275. */
  276. nextiocb->iocb.ulpIoTag =
  277. lpfc_sli_next_iotag(phba, &phba->sli.ring[phba->sli.fcp_ring]);
  278. /*
  279. * Issue iocb command to adapter
  280. */
  281. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, sizeof (IOCB_t));
  282. wmb();
  283. pring->stats.iocb_cmd++;
  284. /*
  285. * If there is no completion routine to call, we can release the
  286. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  287. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  288. */
  289. if (nextiocb->iocb_cmpl)
  290. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  291. else {
  292. list_add_tail(&nextiocb->list, &phba->lpfc_iocb_list);
  293. }
  294. /*
  295. * Let the HBA know what IOCB slot will be the next one the
  296. * driver will put a command into.
  297. */
  298. pring->cmdidx = pring->next_cmdidx;
  299. writeb(pring->cmdidx, phba->MBslimaddr
  300. + (SLIMOFF + (pring->ringno * 2)) * 4);
  301. }
  302. static void
  303. lpfc_sli_update_full_ring(struct lpfc_hba * phba,
  304. struct lpfc_sli_ring *pring)
  305. {
  306. int ringno = pring->ringno;
  307. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  308. wmb();
  309. /*
  310. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  311. * The HBA will tell us when an IOCB entry is available.
  312. */
  313. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  314. readl(phba->CAregaddr); /* flush */
  315. pring->stats.iocb_cmd_full++;
  316. }
  317. static void
  318. lpfc_sli_update_ring(struct lpfc_hba * phba,
  319. struct lpfc_sli_ring *pring)
  320. {
  321. int ringno = pring->ringno;
  322. /*
  323. * Tell the HBA that there is work to do in this ring.
  324. */
  325. wmb();
  326. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  327. readl(phba->CAregaddr); /* flush */
  328. }
  329. static void
  330. lpfc_sli_resume_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring)
  331. {
  332. IOCB_t *iocb;
  333. struct lpfc_iocbq *nextiocb;
  334. /*
  335. * Check to see if:
  336. * (a) there is anything on the txq to send
  337. * (b) link is up
  338. * (c) link attention events can be processed (fcp ring only)
  339. * (d) IOCB processing is not blocked by the outstanding mbox command.
  340. */
  341. if (pring->txq_cnt &&
  342. (phba->hba_state > LPFC_LINK_DOWN) &&
  343. (pring->ringno != phba->sli.fcp_ring ||
  344. phba->sli.sli_flag & LPFC_PROCESS_LA) &&
  345. !(pring->flag & LPFC_STOP_IOCB_MBX)) {
  346. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  347. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  348. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  349. if (iocb)
  350. lpfc_sli_update_ring(phba, pring);
  351. else
  352. lpfc_sli_update_full_ring(phba, pring);
  353. }
  354. return;
  355. }
  356. /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
  357. static void
  358. lpfc_sli_turn_on_ring(struct lpfc_hba * phba, int ringno)
  359. {
  360. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[ringno];
  361. /* If the ring is active, flag it */
  362. if (phba->sli.ring[ringno].cmdringaddr) {
  363. if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
  364. phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
  365. /*
  366. * Force update of the local copy of cmdGetInx
  367. */
  368. phba->sli.ring[ringno].local_getidx
  369. = le32_to_cpu(pgp->cmdGetInx);
  370. spin_lock_irq(phba->host->host_lock);
  371. lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
  372. spin_unlock_irq(phba->host->host_lock);
  373. }
  374. }
  375. }
  376. static int
  377. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  378. {
  379. uint8_t ret;
  380. switch (mbxCommand) {
  381. case MBX_LOAD_SM:
  382. case MBX_READ_NV:
  383. case MBX_WRITE_NV:
  384. case MBX_RUN_BIU_DIAG:
  385. case MBX_INIT_LINK:
  386. case MBX_DOWN_LINK:
  387. case MBX_CONFIG_LINK:
  388. case MBX_CONFIG_RING:
  389. case MBX_RESET_RING:
  390. case MBX_READ_CONFIG:
  391. case MBX_READ_RCONFIG:
  392. case MBX_READ_SPARM:
  393. case MBX_READ_STATUS:
  394. case MBX_READ_RPI:
  395. case MBX_READ_XRI:
  396. case MBX_READ_REV:
  397. case MBX_READ_LNK_STAT:
  398. case MBX_REG_LOGIN:
  399. case MBX_UNREG_LOGIN:
  400. case MBX_READ_LA:
  401. case MBX_CLEAR_LA:
  402. case MBX_DUMP_MEMORY:
  403. case MBX_DUMP_CONTEXT:
  404. case MBX_RUN_DIAGS:
  405. case MBX_RESTART:
  406. case MBX_UPDATE_CFG:
  407. case MBX_DOWN_LOAD:
  408. case MBX_DEL_LD_ENTRY:
  409. case MBX_RUN_PROGRAM:
  410. case MBX_SET_MASK:
  411. case MBX_SET_SLIM:
  412. case MBX_UNREG_D_ID:
  413. case MBX_CONFIG_FARP:
  414. case MBX_LOAD_AREA:
  415. case MBX_RUN_BIU_DIAG64:
  416. case MBX_CONFIG_PORT:
  417. case MBX_READ_SPARM64:
  418. case MBX_READ_RPI64:
  419. case MBX_REG_LOGIN64:
  420. case MBX_READ_LA64:
  421. case MBX_FLASH_WR_ULA:
  422. case MBX_SET_DEBUG:
  423. case MBX_LOAD_EXP_ROM:
  424. ret = mbxCommand;
  425. break;
  426. default:
  427. ret = MBX_SHUTDOWN;
  428. break;
  429. }
  430. return (ret);
  431. }
  432. static void
  433. lpfc_sli_wake_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq)
  434. {
  435. wait_queue_head_t *pdone_q;
  436. /*
  437. * If pdone_q is empty, the driver thread gave up waiting and
  438. * continued running.
  439. */
  440. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  441. if (pdone_q)
  442. wake_up_interruptible(pdone_q);
  443. return;
  444. }
  445. void
  446. lpfc_sli_def_mbox_cmpl(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmb)
  447. {
  448. struct lpfc_dmabuf *mp;
  449. mp = (struct lpfc_dmabuf *) (pmb->context1);
  450. if (mp) {
  451. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  452. kfree(mp);
  453. }
  454. mempool_free( pmb, phba->mbox_mem_pool);
  455. return;
  456. }
  457. int
  458. lpfc_sli_handle_mb_event(struct lpfc_hba * phba)
  459. {
  460. MAILBOX_t *mbox;
  461. MAILBOX_t *pmbox;
  462. LPFC_MBOXQ_t *pmb;
  463. struct lpfc_sli *psli;
  464. int i, rc;
  465. uint32_t process_next;
  466. psli = &phba->sli;
  467. /* We should only get here if we are in SLI2 mode */
  468. if (!(phba->sli.sli_flag & LPFC_SLI2_ACTIVE)) {
  469. return (1);
  470. }
  471. phba->sli.slistat.mbox_event++;
  472. /* Get a Mailbox buffer to setup mailbox commands for callback */
  473. if ((pmb = phba->sli.mbox_active)) {
  474. pmbox = &pmb->mb;
  475. mbox = &phba->slim2p->mbx;
  476. /* First check out the status word */
  477. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof (uint32_t));
  478. /* Sanity check to ensure the host owns the mailbox */
  479. if (pmbox->mbxOwner != OWN_HOST) {
  480. /* Lets try for a while */
  481. for (i = 0; i < 10240; i++) {
  482. /* First copy command data */
  483. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  484. sizeof (uint32_t));
  485. if (pmbox->mbxOwner == OWN_HOST)
  486. goto mbout;
  487. }
  488. /* Stray Mailbox Interrupt, mbxCommand <cmd> mbxStatus
  489. <status> */
  490. lpfc_printf_log(phba,
  491. KERN_ERR,
  492. LOG_MBOX | LOG_SLI,
  493. "%d:0304 Stray Mailbox Interrupt "
  494. "mbxCommand x%x mbxStatus x%x\n",
  495. phba->brd_no,
  496. pmbox->mbxCommand,
  497. pmbox->mbxStatus);
  498. spin_lock_irq(phba->host->host_lock);
  499. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  500. spin_unlock_irq(phba->host->host_lock);
  501. return (1);
  502. }
  503. mbout:
  504. del_timer_sync(&phba->sli.mbox_tmo);
  505. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  506. /*
  507. * It is a fatal error if unknown mbox command completion.
  508. */
  509. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  510. MBX_SHUTDOWN) {
  511. /* Unknow mailbox command compl */
  512. lpfc_printf_log(phba,
  513. KERN_ERR,
  514. LOG_MBOX | LOG_SLI,
  515. "%d:0323 Unknown Mailbox command %x Cmpl\n",
  516. phba->brd_no,
  517. pmbox->mbxCommand);
  518. phba->hba_state = LPFC_HBA_ERROR;
  519. phba->work_hs = HS_FFER3;
  520. lpfc_handle_eratt(phba);
  521. return (0);
  522. }
  523. phba->sli.mbox_active = NULL;
  524. if (pmbox->mbxStatus) {
  525. phba->sli.slistat.mbox_stat_err++;
  526. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  527. /* Mbox cmd cmpl error - RETRYing */
  528. lpfc_printf_log(phba,
  529. KERN_INFO,
  530. LOG_MBOX | LOG_SLI,
  531. "%d:0305 Mbox cmd cmpl error - "
  532. "RETRYing Data: x%x x%x x%x x%x\n",
  533. phba->brd_no,
  534. pmbox->mbxCommand,
  535. pmbox->mbxStatus,
  536. pmbox->un.varWords[0],
  537. phba->hba_state);
  538. pmbox->mbxStatus = 0;
  539. pmbox->mbxOwner = OWN_HOST;
  540. spin_lock_irq(phba->host->host_lock);
  541. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  542. spin_unlock_irq(phba->host->host_lock);
  543. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  544. if (rc == MBX_SUCCESS)
  545. return (0);
  546. }
  547. }
  548. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  549. lpfc_printf_log(phba,
  550. KERN_INFO,
  551. LOG_MBOX | LOG_SLI,
  552. "%d:0307 Mailbox cmd x%x Cmpl x%p "
  553. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  554. phba->brd_no,
  555. pmbox->mbxCommand,
  556. pmb->mbox_cmpl,
  557. *((uint32_t *) pmbox),
  558. pmbox->un.varWords[0],
  559. pmbox->un.varWords[1],
  560. pmbox->un.varWords[2],
  561. pmbox->un.varWords[3],
  562. pmbox->un.varWords[4],
  563. pmbox->un.varWords[5],
  564. pmbox->un.varWords[6],
  565. pmbox->un.varWords[7]);
  566. if (pmb->mbox_cmpl) {
  567. lpfc_sli_pcimem_bcopy(mbox, pmbox, MAILBOX_CMD_SIZE);
  568. pmb->mbox_cmpl(phba,pmb);
  569. }
  570. }
  571. do {
  572. process_next = 0; /* by default don't loop */
  573. spin_lock_irq(phba->host->host_lock);
  574. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  575. /* Process next mailbox command if there is one */
  576. if ((pmb = lpfc_mbox_get(phba))) {
  577. spin_unlock_irq(phba->host->host_lock);
  578. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  579. if (rc == MBX_NOT_FINISHED) {
  580. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  581. pmb->mbox_cmpl(phba,pmb);
  582. process_next = 1;
  583. continue; /* loop back */
  584. }
  585. } else {
  586. spin_unlock_irq(phba->host->host_lock);
  587. /* Turn on IOCB processing */
  588. for (i = 0; i < phba->sli.num_rings; i++) {
  589. lpfc_sli_turn_on_ring(phba, i);
  590. }
  591. /* Free any lpfc_dmabuf's waiting for mbox cmd cmpls */
  592. while (!list_empty(&phba->freebufList)) {
  593. struct lpfc_dmabuf *mp;
  594. mp = NULL;
  595. list_remove_head((&phba->freebufList),
  596. mp,
  597. struct lpfc_dmabuf,
  598. list);
  599. if (mp) {
  600. lpfc_mbuf_free(phba, mp->virt,
  601. mp->phys);
  602. kfree(mp);
  603. }
  604. }
  605. }
  606. } while (process_next);
  607. return (0);
  608. }
  609. static int
  610. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  611. struct lpfc_iocbq *saveq)
  612. {
  613. IOCB_t * irsp;
  614. WORD5 * w5p;
  615. uint32_t Rctl, Type;
  616. uint32_t match, i;
  617. match = 0;
  618. irsp = &(saveq->iocb);
  619. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  620. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)) {
  621. Rctl = FC_ELS_REQ;
  622. Type = FC_ELS_DATA;
  623. } else {
  624. w5p =
  625. (WORD5 *) & (saveq->iocb.un.
  626. ulpWord[5]);
  627. Rctl = w5p->hcsw.Rctl;
  628. Type = w5p->hcsw.Type;
  629. /* Firmware Workaround */
  630. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  631. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX)) {
  632. Rctl = FC_ELS_REQ;
  633. Type = FC_ELS_DATA;
  634. w5p->hcsw.Rctl = Rctl;
  635. w5p->hcsw.Type = Type;
  636. }
  637. }
  638. /* unSolicited Responses */
  639. if (pring->prt[0].profile) {
  640. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring, saveq);
  641. match = 1;
  642. } else {
  643. /* We must search, based on rctl / type
  644. for the right routine */
  645. for (i = 0; i < pring->num_mask;
  646. i++) {
  647. if ((pring->prt[i].rctl ==
  648. Rctl)
  649. && (pring->prt[i].
  650. type == Type)) {
  651. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  652. (phba, pring, saveq);
  653. match = 1;
  654. break;
  655. }
  656. }
  657. }
  658. if (match == 0) {
  659. /* Unexpected Rctl / Type received */
  660. /* Ring <ringno> handler: unexpected
  661. Rctl <Rctl> Type <Type> received */
  662. lpfc_printf_log(phba,
  663. KERN_WARNING,
  664. LOG_SLI,
  665. "%d:0313 Ring %d handler: unexpected Rctl x%x "
  666. "Type x%x received \n",
  667. phba->brd_no,
  668. pring->ringno,
  669. Rctl,
  670. Type);
  671. }
  672. return(1);
  673. }
  674. static struct lpfc_iocbq *
  675. lpfc_sli_txcmpl_ring_search_slow(struct lpfc_sli_ring * pring,
  676. struct lpfc_iocbq * prspiocb)
  677. {
  678. IOCB_t *icmd = NULL;
  679. IOCB_t *irsp = NULL;
  680. struct lpfc_iocbq *cmd_iocb;
  681. struct lpfc_iocbq *iocb, *next_iocb;
  682. uint16_t iotag;
  683. irsp = &prspiocb->iocb;
  684. iotag = irsp->ulpIoTag;
  685. cmd_iocb = NULL;
  686. /* Search through txcmpl from the begining */
  687. list_for_each_entry_safe(iocb, next_iocb, &(pring->txcmplq), list) {
  688. icmd = &iocb->iocb;
  689. if (iotag == icmd->ulpIoTag) {
  690. /* Found a match. */
  691. cmd_iocb = iocb;
  692. list_del(&iocb->list);
  693. pring->txcmplq_cnt--;
  694. break;
  695. }
  696. }
  697. return (cmd_iocb);
  698. }
  699. static struct lpfc_iocbq *
  700. lpfc_sli_txcmpl_ring_iotag_lookup(struct lpfc_hba * phba,
  701. struct lpfc_sli_ring * pring,
  702. struct lpfc_iocbq * prspiocb)
  703. {
  704. IOCB_t *irsp = NULL;
  705. struct lpfc_iocbq *cmd_iocb = NULL;
  706. uint16_t iotag;
  707. if (unlikely(pring->fast_lookup == NULL))
  708. return NULL;
  709. /* Use fast lookup based on iotag for completion */
  710. irsp = &prspiocb->iocb;
  711. iotag = irsp->ulpIoTag;
  712. if (iotag < pring->fast_iotag) {
  713. cmd_iocb = *(pring->fast_lookup + iotag);
  714. *(pring->fast_lookup + iotag) = NULL;
  715. if (cmd_iocb) {
  716. list_del(&cmd_iocb->list);
  717. pring->txcmplq_cnt--;
  718. return cmd_iocb;
  719. } else {
  720. /*
  721. * This is clearly an error. A ring that uses iotags
  722. * should never have a interrupt for a completion that
  723. * is not on the ring. Return NULL and log a error.
  724. */
  725. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  726. "%d:0327 Rsp ring %d error - command "
  727. "completion for iotag x%x not found\n",
  728. phba->brd_no, pring->ringno, iotag);
  729. return NULL;
  730. }
  731. }
  732. /*
  733. * Rsp ring <ringno> get: iotag <iotag> greater then
  734. * configured max <fast_iotag> wd0 <irsp>. This is an
  735. * error. Just return NULL.
  736. */
  737. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  738. "%d:0317 Rsp ring %d get: iotag x%x greater then "
  739. "configured max x%x wd0 x%x\n",
  740. phba->brd_no, pring->ringno, iotag, pring->fast_iotag,
  741. *(((uint32_t *) irsp) + 7));
  742. return NULL;
  743. }
  744. static int
  745. lpfc_sli_process_sol_iocb(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  746. struct lpfc_iocbq *saveq)
  747. {
  748. struct lpfc_iocbq * cmdiocbp;
  749. int rc = 1;
  750. unsigned long iflag;
  751. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  752. spin_lock_irqsave(phba->host->host_lock, iflag);
  753. cmdiocbp = lpfc_sli_txcmpl_ring_search_slow(pring, saveq);
  754. if (cmdiocbp) {
  755. if (cmdiocbp->iocb_cmpl) {
  756. /*
  757. * Post all ELS completions to the worker thread.
  758. * All other are passed to the completion callback.
  759. */
  760. if (pring->ringno == LPFC_ELS_RING) {
  761. spin_unlock_irqrestore(phba->host->host_lock,
  762. iflag);
  763. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  764. spin_lock_irqsave(phba->host->host_lock, iflag);
  765. }
  766. else {
  767. if (cmdiocbp->iocb_flag & LPFC_IO_POLL)
  768. rc = 0;
  769. spin_unlock_irqrestore(phba->host->host_lock,
  770. iflag);
  771. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  772. spin_lock_irqsave(phba->host->host_lock, iflag);
  773. }
  774. } else {
  775. list_add_tail(&cmdiocbp->list, &phba->lpfc_iocb_list);
  776. }
  777. } else {
  778. /*
  779. * Unknown initiating command based on the response iotag.
  780. * This could be the case on the ELS ring because of
  781. * lpfc_els_abort().
  782. */
  783. if (pring->ringno != LPFC_ELS_RING) {
  784. /*
  785. * Ring <ringno> handler: unexpected completion IoTag
  786. * <IoTag>
  787. */
  788. lpfc_printf_log(phba,
  789. KERN_WARNING,
  790. LOG_SLI,
  791. "%d:0322 Ring %d handler: unexpected "
  792. "completion IoTag x%x Data: x%x x%x x%x x%x\n",
  793. phba->brd_no,
  794. pring->ringno,
  795. saveq->iocb.ulpIoTag,
  796. saveq->iocb.ulpStatus,
  797. saveq->iocb.un.ulpWord[4],
  798. saveq->iocb.ulpCommand,
  799. saveq->iocb.ulpContext);
  800. }
  801. }
  802. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  803. return rc;
  804. }
  805. /*
  806. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  807. * to check it explicitly.
  808. */
  809. static int
  810. lpfc_sli_handle_fast_ring_event(struct lpfc_hba * phba,
  811. struct lpfc_sli_ring * pring, uint32_t mask)
  812. {
  813. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  814. IOCB_t *irsp = NULL;
  815. struct lpfc_iocbq *cmdiocbq = NULL;
  816. struct lpfc_iocbq rspiocbq;
  817. uint32_t status;
  818. uint32_t portRspPut, portRspMax;
  819. int rc = 1;
  820. lpfc_iocb_type type;
  821. unsigned long iflag;
  822. uint32_t rsp_cmpl = 0;
  823. void __iomem *to_slim;
  824. spin_lock_irqsave(phba->host->host_lock, iflag);
  825. pring->stats.iocb_event++;
  826. /*
  827. * The next available response entry should never exceed the maximum
  828. * entries. If it does, treat it as an adapter hardware error.
  829. */
  830. portRspMax = pring->numRiocb;
  831. portRspPut = le32_to_cpu(pgp->rspPutInx);
  832. if (unlikely(portRspPut >= portRspMax)) {
  833. /*
  834. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  835. * rsp ring <portRspMax>
  836. */
  837. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  838. "%d:0312 Ring %d handler: portRspPut %d "
  839. "is bigger then rsp ring %d\n",
  840. phba->brd_no, pring->ringno, portRspPut,
  841. portRspMax);
  842. phba->hba_state = LPFC_HBA_ERROR;
  843. /* All error attention handlers are posted to worker thread */
  844. phba->work_ha |= HA_ERATT;
  845. phba->work_hs = HS_FFER3;
  846. if (phba->work_wait)
  847. wake_up(phba->work_wait);
  848. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  849. return 1;
  850. }
  851. rmb();
  852. while (pring->rspidx != portRspPut) {
  853. irsp = (IOCB_t *) IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  854. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  855. pring->stats.iocb_rsp++;
  856. rsp_cmpl++;
  857. if (unlikely(irsp->ulpStatus)) {
  858. /* Rsp ring <ringno> error: IOCB */
  859. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  860. "%d:0326 Rsp Ring %d error: IOCB Data: "
  861. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  862. phba->brd_no, pring->ringno,
  863. irsp->un.ulpWord[0], irsp->un.ulpWord[1],
  864. irsp->un.ulpWord[2], irsp->un.ulpWord[3],
  865. irsp->un.ulpWord[4], irsp->un.ulpWord[5],
  866. *(((uint32_t *) irsp) + 6),
  867. *(((uint32_t *) irsp) + 7));
  868. }
  869. switch (type) {
  870. case LPFC_ABORT_IOCB:
  871. case LPFC_SOL_IOCB:
  872. /*
  873. * Idle exchange closed via ABTS from port. No iocb
  874. * resources need to be recovered.
  875. */
  876. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  877. printk(KERN_INFO "%s: IOCB cmd 0x%x processed. "
  878. "Skipping completion\n", __FUNCTION__,
  879. irsp->ulpCommand);
  880. break;
  881. }
  882. rspiocbq.iocb.un.ulpWord[4] = irsp->un.ulpWord[4];
  883. rspiocbq.iocb.ulpStatus = irsp->ulpStatus;
  884. rspiocbq.iocb.ulpContext = irsp->ulpContext;
  885. rspiocbq.iocb.ulpIoTag = irsp->ulpIoTag;
  886. cmdiocbq = lpfc_sli_txcmpl_ring_iotag_lookup(phba,
  887. pring,
  888. &rspiocbq);
  889. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  890. spin_unlock_irqrestore(
  891. phba->host->host_lock, iflag);
  892. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  893. &rspiocbq);
  894. spin_lock_irqsave(phba->host->host_lock,
  895. iflag);
  896. }
  897. break;
  898. default:
  899. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  900. char adaptermsg[LPFC_MAX_ADPTMSG];
  901. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  902. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  903. MAX_MSG_DATA);
  904. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  905. phba->brd_no, adaptermsg);
  906. } else {
  907. /* Unknown IOCB command */
  908. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  909. "%d:0321 Unknown IOCB command "
  910. "Data: x%x, x%x x%x x%x x%x\n",
  911. phba->brd_no, type, irsp->ulpCommand,
  912. irsp->ulpStatus, irsp->ulpIoTag,
  913. irsp->ulpContext);
  914. }
  915. break;
  916. }
  917. /*
  918. * The response IOCB has been processed. Update the ring
  919. * pointer in SLIM. If the port response put pointer has not
  920. * been updated, sync the pgp->rspPutInx and fetch the new port
  921. * response put pointer.
  922. */
  923. if (++pring->rspidx >= portRspMax)
  924. pring->rspidx = 0;
  925. to_slim = phba->MBslimaddr +
  926. (SLIMOFF + (pring->ringno * 2) + 1) * 4;
  927. writeb(pring->rspidx, to_slim);
  928. if (pring->rspidx == portRspPut)
  929. portRspPut = le32_to_cpu(pgp->rspPutInx);
  930. }
  931. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  932. pring->stats.iocb_rsp_full++;
  933. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  934. writel(status, phba->CAregaddr);
  935. readl(phba->CAregaddr);
  936. }
  937. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  938. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  939. pring->stats.iocb_cmd_empty++;
  940. /* Force update of the local copy of cmdGetInx */
  941. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  942. lpfc_sli_resume_iocb(phba, pring);
  943. if ((pring->lpfc_sli_cmd_available))
  944. (pring->lpfc_sli_cmd_available) (phba, pring);
  945. }
  946. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  947. return rc;
  948. }
  949. int
  950. lpfc_sli_handle_slow_ring_event(struct lpfc_hba * phba,
  951. struct lpfc_sli_ring * pring, uint32_t mask)
  952. {
  953. IOCB_t *entry;
  954. IOCB_t *irsp = NULL;
  955. struct lpfc_iocbq *rspiocbp = NULL;
  956. struct lpfc_iocbq *next_iocb;
  957. struct lpfc_iocbq *cmdiocbp;
  958. struct lpfc_iocbq *saveq;
  959. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  960. struct lpfc_pgp *pgp = &phba->slim2p->mbx.us.s2.port[pring->ringno];
  961. uint8_t iocb_cmd_type;
  962. lpfc_iocb_type type;
  963. uint32_t status, free_saveq;
  964. uint32_t portRspPut, portRspMax;
  965. int rc = 1;
  966. unsigned long iflag;
  967. void __iomem *to_slim;
  968. spin_lock_irqsave(phba->host->host_lock, iflag);
  969. pring->stats.iocb_event++;
  970. /*
  971. * The next available response entry should never exceed the maximum
  972. * entries. If it does, treat it as an adapter hardware error.
  973. */
  974. portRspMax = pring->numRiocb;
  975. portRspPut = le32_to_cpu(pgp->rspPutInx);
  976. if (portRspPut >= portRspMax) {
  977. /*
  978. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  979. * rsp ring <portRspMax>
  980. */
  981. lpfc_printf_log(phba,
  982. KERN_ERR,
  983. LOG_SLI,
  984. "%d:0312 Ring %d handler: portRspPut %d "
  985. "is bigger then rsp ring %d\n",
  986. phba->brd_no,
  987. pring->ringno, portRspPut, portRspMax);
  988. phba->hba_state = LPFC_HBA_ERROR;
  989. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  990. phba->work_hs = HS_FFER3;
  991. lpfc_handle_eratt(phba);
  992. return 1;
  993. }
  994. rmb();
  995. lpfc_iocb_list = &phba->lpfc_iocb_list;
  996. while (pring->rspidx != portRspPut) {
  997. /*
  998. * Build a completion list and call the appropriate handler.
  999. * The process is to get the next available response iocb, get
  1000. * a free iocb from the list, copy the response data into the
  1001. * free iocb, insert to the continuation list, and update the
  1002. * next response index to slim. This process makes response
  1003. * iocb's in the ring available to DMA as fast as possible but
  1004. * pays a penalty for a copy operation. Since the iocb is
  1005. * only 32 bytes, this penalty is considered small relative to
  1006. * the PCI reads for register values and a slim write. When
  1007. * the ulpLe field is set, the entire Command has been
  1008. * received.
  1009. */
  1010. entry = IOCB_ENTRY(pring->rspringaddr, pring->rspidx);
  1011. list_remove_head(lpfc_iocb_list, rspiocbp, struct lpfc_iocbq,
  1012. list);
  1013. if (rspiocbp == NULL) {
  1014. printk(KERN_ERR "%s: out of buffers! Failing "
  1015. "completion.\n", __FUNCTION__);
  1016. break;
  1017. }
  1018. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb, sizeof (IOCB_t));
  1019. irsp = &rspiocbp->iocb;
  1020. if (++pring->rspidx >= portRspMax)
  1021. pring->rspidx = 0;
  1022. to_slim = phba->MBslimaddr + (SLIMOFF + (pring->ringno * 2)
  1023. + 1) * 4;
  1024. writeb(pring->rspidx, to_slim);
  1025. if (list_empty(&(pring->iocb_continueq))) {
  1026. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1027. } else {
  1028. list_add_tail(&rspiocbp->list,
  1029. &(pring->iocb_continueq));
  1030. }
  1031. pring->iocb_continueq_cnt++;
  1032. if (irsp->ulpLe) {
  1033. /*
  1034. * By default, the driver expects to free all resources
  1035. * associated with this iocb completion.
  1036. */
  1037. free_saveq = 1;
  1038. saveq = list_get_first(&pring->iocb_continueq,
  1039. struct lpfc_iocbq, list);
  1040. irsp = &(saveq->iocb);
  1041. list_del_init(&pring->iocb_continueq);
  1042. pring->iocb_continueq_cnt = 0;
  1043. pring->stats.iocb_rsp++;
  1044. if (irsp->ulpStatus) {
  1045. /* Rsp ring <ringno> error: IOCB */
  1046. lpfc_printf_log(phba,
  1047. KERN_WARNING,
  1048. LOG_SLI,
  1049. "%d:0328 Rsp Ring %d error: IOCB Data: "
  1050. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1051. phba->brd_no,
  1052. pring->ringno,
  1053. irsp->un.ulpWord[0],
  1054. irsp->un.ulpWord[1],
  1055. irsp->un.ulpWord[2],
  1056. irsp->un.ulpWord[3],
  1057. irsp->un.ulpWord[4],
  1058. irsp->un.ulpWord[5],
  1059. *(((uint32_t *) irsp) + 6),
  1060. *(((uint32_t *) irsp) + 7));
  1061. }
  1062. /*
  1063. * Fetch the IOCB command type and call the correct
  1064. * completion routine. Solicited and Unsolicited
  1065. * IOCBs on the ELS ring get freed back to the
  1066. * lpfc_iocb_list by the discovery kernel thread.
  1067. */
  1068. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1069. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1070. if (type == LPFC_SOL_IOCB) {
  1071. spin_unlock_irqrestore(phba->host->host_lock,
  1072. iflag);
  1073. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1074. saveq);
  1075. spin_lock_irqsave(phba->host->host_lock, iflag);
  1076. } else if (type == LPFC_UNSOL_IOCB) {
  1077. spin_unlock_irqrestore(phba->host->host_lock,
  1078. iflag);
  1079. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1080. saveq);
  1081. spin_lock_irqsave(phba->host->host_lock, iflag);
  1082. } else if (type == LPFC_ABORT_IOCB) {
  1083. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1084. ((cmdiocbp =
  1085. lpfc_sli_txcmpl_ring_search_slow(pring,
  1086. saveq)))) {
  1087. /* Call the specified completion
  1088. routine */
  1089. if (cmdiocbp->iocb_cmpl) {
  1090. spin_unlock_irqrestore(
  1091. phba->host->host_lock,
  1092. iflag);
  1093. (cmdiocbp->iocb_cmpl) (phba,
  1094. cmdiocbp, saveq);
  1095. spin_lock_irqsave(
  1096. phba->host->host_lock,
  1097. iflag);
  1098. } else {
  1099. list_add_tail(&cmdiocbp->list,
  1100. lpfc_iocb_list);
  1101. }
  1102. }
  1103. } else if (type == LPFC_UNKNOWN_IOCB) {
  1104. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1105. char adaptermsg[LPFC_MAX_ADPTMSG];
  1106. memset(adaptermsg, 0,
  1107. LPFC_MAX_ADPTMSG);
  1108. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1109. MAX_MSG_DATA);
  1110. dev_warn(&((phba->pcidev)->dev),
  1111. "lpfc%d: %s",
  1112. phba->brd_no, adaptermsg);
  1113. } else {
  1114. /* Unknown IOCB command */
  1115. lpfc_printf_log(phba,
  1116. KERN_ERR,
  1117. LOG_SLI,
  1118. "%d:0321 Unknown IOCB command "
  1119. "Data: x%x x%x x%x x%x\n",
  1120. phba->brd_no,
  1121. irsp->ulpCommand,
  1122. irsp->ulpStatus,
  1123. irsp->ulpIoTag,
  1124. irsp->ulpContext);
  1125. }
  1126. }
  1127. if (free_saveq) {
  1128. if (!list_empty(&saveq->list)) {
  1129. list_for_each_entry_safe(rspiocbp,
  1130. next_iocb,
  1131. &saveq->list,
  1132. list) {
  1133. list_add_tail(&rspiocbp->list,
  1134. lpfc_iocb_list);
  1135. }
  1136. }
  1137. list_add_tail(&saveq->list, lpfc_iocb_list);
  1138. }
  1139. }
  1140. /*
  1141. * If the port response put pointer has not been updated, sync
  1142. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1143. * response put pointer.
  1144. */
  1145. if (pring->rspidx == portRspPut) {
  1146. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1147. }
  1148. } /* while (pring->rspidx != portRspPut) */
  1149. if ((rspiocbp != 0) && (mask & HA_R0RE_REQ)) {
  1150. /* At least one response entry has been freed */
  1151. pring->stats.iocb_rsp_full++;
  1152. /* SET RxRE_RSP in Chip Att register */
  1153. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1154. writel(status, phba->CAregaddr);
  1155. readl(phba->CAregaddr); /* flush */
  1156. }
  1157. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1158. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1159. pring->stats.iocb_cmd_empty++;
  1160. /* Force update of the local copy of cmdGetInx */
  1161. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1162. lpfc_sli_resume_iocb(phba, pring);
  1163. if ((pring->lpfc_sli_cmd_available))
  1164. (pring->lpfc_sli_cmd_available) (phba, pring);
  1165. }
  1166. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1167. return rc;
  1168. }
  1169. int
  1170. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1171. {
  1172. struct lpfc_iocbq *iocb, *next_iocb;
  1173. IOCB_t *icmd = NULL, *cmd = NULL;
  1174. int errcnt;
  1175. uint16_t iotag;
  1176. errcnt = 0;
  1177. /* Error everything on txq and txcmplq
  1178. * First do the txq.
  1179. */
  1180. spin_lock_irq(phba->host->host_lock);
  1181. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  1182. list_del_init(&iocb->list);
  1183. if (iocb->iocb_cmpl) {
  1184. icmd = &iocb->iocb;
  1185. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1186. icmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1187. spin_unlock_irq(phba->host->host_lock);
  1188. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1189. spin_lock_irq(phba->host->host_lock);
  1190. } else {
  1191. list_add_tail(&iocb->list, &phba->lpfc_iocb_list);
  1192. }
  1193. }
  1194. pring->txq_cnt = 0;
  1195. INIT_LIST_HEAD(&(pring->txq));
  1196. /* Next issue ABTS for everything on the txcmplq */
  1197. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  1198. cmd = &iocb->iocb;
  1199. /*
  1200. * Imediate abort of IOCB, clear fast_lookup entry,
  1201. * if any, deque and call compl
  1202. */
  1203. iotag = cmd->ulpIoTag;
  1204. if (iotag && pring->fast_lookup &&
  1205. (iotag < pring->fast_iotag))
  1206. pring->fast_lookup[iotag] = NULL;
  1207. list_del_init(&iocb->list);
  1208. pring->txcmplq_cnt--;
  1209. if (iocb->iocb_cmpl) {
  1210. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1211. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1212. spin_unlock_irq(phba->host->host_lock);
  1213. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1214. spin_lock_irq(phba->host->host_lock);
  1215. } else {
  1216. list_add_tail(&iocb->list, &phba->lpfc_iocb_list);
  1217. }
  1218. }
  1219. INIT_LIST_HEAD(&pring->txcmplq);
  1220. pring->txcmplq_cnt = 0;
  1221. spin_unlock_irq(phba->host->host_lock);
  1222. return errcnt;
  1223. }
  1224. /******************************************************************************
  1225. * lpfc_sli_send_reset
  1226. *
  1227. * Note: After returning from this function, the HBA cannot be accessed for
  1228. * 1 ms. Since we do not wish to delay in interrupt context, it is the
  1229. * responsibility of the caller to perform the mdelay(1) and flush via readl().
  1230. ******************************************************************************/
  1231. static int
  1232. lpfc_sli_send_reset(struct lpfc_hba * phba, uint16_t skip_post)
  1233. {
  1234. MAILBOX_t *swpmb;
  1235. volatile uint32_t word0;
  1236. void __iomem *to_slim;
  1237. unsigned long flags = 0;
  1238. spin_lock_irqsave(phba->host->host_lock, flags);
  1239. /* A board reset must use REAL SLIM. */
  1240. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  1241. word0 = 0;
  1242. swpmb = (MAILBOX_t *) & word0;
  1243. swpmb->mbxCommand = MBX_RESTART;
  1244. swpmb->mbxHc = 1;
  1245. to_slim = phba->MBslimaddr;
  1246. writel(*(uint32_t *) swpmb, to_slim);
  1247. readl(to_slim); /* flush */
  1248. /* Only skip post after fc_ffinit is completed */
  1249. if (skip_post) {
  1250. word0 = 1; /* This is really setting up word1 */
  1251. } else {
  1252. word0 = 0; /* This is really setting up word1 */
  1253. }
  1254. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1255. writel(*(uint32_t *) swpmb, to_slim);
  1256. readl(to_slim); /* flush */
  1257. /* Turn off parity checking and serr during the physical reset */
  1258. pci_read_config_word(phba->pcidev, PCI_COMMAND, &phba->pci_cfg_value);
  1259. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1260. (phba->pci_cfg_value &
  1261. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1262. writel(HC_INITFF, phba->HCregaddr);
  1263. phba->hba_state = LPFC_INIT_START;
  1264. spin_unlock_irqrestore(phba->host->host_lock, flags);
  1265. return 0;
  1266. }
  1267. static int
  1268. lpfc_sli_brdreset(struct lpfc_hba * phba, uint16_t skip_post)
  1269. {
  1270. struct lpfc_sli_ring *pring;
  1271. int i;
  1272. struct lpfc_dmabuf *mp, *next_mp;
  1273. unsigned long flags = 0;
  1274. lpfc_sli_send_reset(phba, skip_post);
  1275. mdelay(1);
  1276. spin_lock_irqsave(phba->host->host_lock, flags);
  1277. /* Risk the write on flush case ie no delay after the readl */
  1278. readl(phba->HCregaddr); /* flush */
  1279. /* Now toggle INITFF bit set by lpfc_sli_send_reset */
  1280. writel(0, phba->HCregaddr);
  1281. readl(phba->HCregaddr); /* flush */
  1282. /* Restore PCI cmd register */
  1283. pci_write_config_word(phba->pcidev, PCI_COMMAND, phba->pci_cfg_value);
  1284. /* perform board reset */
  1285. phba->fc_eventTag = 0;
  1286. phba->fc_myDID = 0;
  1287. phba->fc_prevDID = Mask_DID;
  1288. /* Reset HBA */
  1289. lpfc_printf_log(phba,
  1290. KERN_INFO,
  1291. LOG_SLI,
  1292. "%d:0325 Reset HBA Data: x%x x%x x%x\n",
  1293. phba->brd_no,
  1294. phba->hba_state,
  1295. phba->sli.sli_flag,
  1296. skip_post);
  1297. /* Initialize relevant SLI info */
  1298. for (i = 0; i < phba->sli.num_rings; i++) {
  1299. pring = &phba->sli.ring[i];
  1300. pring->flag = 0;
  1301. pring->rspidx = 0;
  1302. pring->next_cmdidx = 0;
  1303. pring->local_getidx = 0;
  1304. pring->cmdidx = 0;
  1305. pring->missbufcnt = 0;
  1306. }
  1307. spin_unlock_irqrestore(phba->host->host_lock, flags);
  1308. if (skip_post) {
  1309. mdelay(100);
  1310. } else {
  1311. mdelay(2000);
  1312. }
  1313. spin_lock_irqsave(phba->host->host_lock, flags);
  1314. /* Cleanup preposted buffers on the ELS ring */
  1315. pring = &phba->sli.ring[LPFC_ELS_RING];
  1316. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  1317. list_del(&mp->list);
  1318. pring->postbufq_cnt--;
  1319. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  1320. kfree(mp);
  1321. }
  1322. spin_unlock_irqrestore(phba->host->host_lock, flags);
  1323. for (i = 0; i < phba->sli.num_rings; i++)
  1324. lpfc_sli_abort_iocb_ring(phba, &phba->sli.ring[i]);
  1325. return 0;
  1326. }
  1327. static int
  1328. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1329. {
  1330. uint32_t status, i = 0;
  1331. /* Read the HBA Host Status Register */
  1332. status = readl(phba->HSregaddr);
  1333. /* Check status register to see what current state is */
  1334. i = 0;
  1335. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1336. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1337. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1338. * 4.
  1339. */
  1340. if (i++ >= 20) {
  1341. /* Adapter failed to init, timeout, status reg
  1342. <status> */
  1343. lpfc_printf_log(phba,
  1344. KERN_ERR,
  1345. LOG_INIT,
  1346. "%d:0436 Adapter failed to init, "
  1347. "timeout, status reg x%x\n",
  1348. phba->brd_no,
  1349. status);
  1350. phba->hba_state = LPFC_HBA_ERROR;
  1351. return -ETIMEDOUT;
  1352. }
  1353. /* Check to see if any errors occurred during init */
  1354. if (status & HS_FFERM) {
  1355. /* ERROR: During chipset initialization */
  1356. /* Adapter failed to init, chipset, status reg
  1357. <status> */
  1358. lpfc_printf_log(phba,
  1359. KERN_ERR,
  1360. LOG_INIT,
  1361. "%d:0437 Adapter failed to init, "
  1362. "chipset, status reg x%x\n",
  1363. phba->brd_no,
  1364. status);
  1365. phba->hba_state = LPFC_HBA_ERROR;
  1366. return -EIO;
  1367. }
  1368. if (i <= 5) {
  1369. msleep(10);
  1370. } else if (i <= 10) {
  1371. msleep(500);
  1372. } else {
  1373. msleep(2500);
  1374. }
  1375. if (i == 15) {
  1376. lpfc_sli_brdreset(phba, 0);
  1377. }
  1378. /* Read the HBA Host Status Register */
  1379. status = readl(phba->HSregaddr);
  1380. }
  1381. /* Check to see if any errors occurred during init */
  1382. if (status & HS_FFERM) {
  1383. /* ERROR: During chipset initialization */
  1384. /* Adapter failed to init, chipset, status reg <status> */
  1385. lpfc_printf_log(phba,
  1386. KERN_ERR,
  1387. LOG_INIT,
  1388. "%d:0438 Adapter failed to init, chipset, "
  1389. "status reg x%x\n",
  1390. phba->brd_no,
  1391. status);
  1392. phba->hba_state = LPFC_HBA_ERROR;
  1393. return -EIO;
  1394. }
  1395. /* Clear all interrupt enable conditions */
  1396. writel(0, phba->HCregaddr);
  1397. readl(phba->HCregaddr); /* flush */
  1398. /* setup host attn register */
  1399. writel(0xffffffff, phba->HAregaddr);
  1400. readl(phba->HAregaddr); /* flush */
  1401. return 0;
  1402. }
  1403. int
  1404. lpfc_sli_hba_setup(struct lpfc_hba * phba)
  1405. {
  1406. LPFC_MBOXQ_t *pmb;
  1407. uint32_t resetcount = 0, rc = 0, done = 0;
  1408. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1409. if (!pmb) {
  1410. phba->hba_state = LPFC_HBA_ERROR;
  1411. return -ENOMEM;
  1412. }
  1413. while (resetcount < 2 && !done) {
  1414. phba->hba_state = 0;
  1415. lpfc_sli_brdreset(phba, 0);
  1416. msleep(2500);
  1417. rc = lpfc_sli_chipset_init(phba);
  1418. if (rc)
  1419. break;
  1420. resetcount++;
  1421. /* Call pre CONFIG_PORT mailbox command initialization. A value of 0
  1422. * means the call was successful. Any other nonzero value is a failure,
  1423. * but if ERESTART is returned, the driver may reset the HBA and try
  1424. * again.
  1425. */
  1426. rc = lpfc_config_port_prep(phba);
  1427. if (rc == -ERESTART) {
  1428. phba->hba_state = 0;
  1429. continue;
  1430. } else if (rc) {
  1431. break;
  1432. }
  1433. phba->hba_state = LPFC_INIT_MBX_CMDS;
  1434. lpfc_config_port(phba, pmb);
  1435. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  1436. if (rc == MBX_SUCCESS)
  1437. done = 1;
  1438. else {
  1439. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1440. "%d:0442 Adapter failed to init, mbxCmd x%x "
  1441. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  1442. phba->brd_no, pmb->mb.mbxCommand,
  1443. pmb->mb.mbxStatus, 0);
  1444. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  1445. }
  1446. }
  1447. if (!done)
  1448. goto lpfc_sli_hba_setup_error;
  1449. rc = lpfc_sli_ring_map(phba, pmb);
  1450. if (rc)
  1451. goto lpfc_sli_hba_setup_error;
  1452. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  1453. rc = lpfc_config_port_post(phba);
  1454. if (rc)
  1455. goto lpfc_sli_hba_setup_error;
  1456. goto lpfc_sli_hba_setup_exit;
  1457. lpfc_sli_hba_setup_error:
  1458. phba->hba_state = LPFC_HBA_ERROR;
  1459. lpfc_sli_hba_setup_exit:
  1460. mempool_free(pmb, phba->mbox_mem_pool);
  1461. return rc;
  1462. }
  1463. static void
  1464. lpfc_mbox_abort(struct lpfc_hba * phba)
  1465. {
  1466. LPFC_MBOXQ_t *pmbox;
  1467. MAILBOX_t *mb;
  1468. if (phba->sli.mbox_active) {
  1469. del_timer_sync(&phba->sli.mbox_tmo);
  1470. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  1471. pmbox = phba->sli.mbox_active;
  1472. mb = &pmbox->mb;
  1473. phba->sli.mbox_active = NULL;
  1474. if (pmbox->mbox_cmpl) {
  1475. mb->mbxStatus = MBX_NOT_FINISHED;
  1476. (pmbox->mbox_cmpl) (phba, pmbox);
  1477. }
  1478. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1479. }
  1480. /* Abort all the non active mailbox commands. */
  1481. spin_lock_irq(phba->host->host_lock);
  1482. pmbox = lpfc_mbox_get(phba);
  1483. while (pmbox) {
  1484. mb = &pmbox->mb;
  1485. if (pmbox->mbox_cmpl) {
  1486. mb->mbxStatus = MBX_NOT_FINISHED;
  1487. spin_unlock_irq(phba->host->host_lock);
  1488. (pmbox->mbox_cmpl) (phba, pmbox);
  1489. spin_lock_irq(phba->host->host_lock);
  1490. }
  1491. pmbox = lpfc_mbox_get(phba);
  1492. }
  1493. spin_unlock_irq(phba->host->host_lock);
  1494. return;
  1495. }
  1496. /*! lpfc_mbox_timeout
  1497. *
  1498. * \pre
  1499. * \post
  1500. * \param hba Pointer to per struct lpfc_hba structure
  1501. * \param l1 Pointer to the driver's mailbox queue.
  1502. * \return
  1503. * void
  1504. *
  1505. * \b Description:
  1506. *
  1507. * This routine handles mailbox timeout events at timer interrupt context.
  1508. */
  1509. void
  1510. lpfc_mbox_timeout(unsigned long ptr)
  1511. {
  1512. struct lpfc_hba *phba;
  1513. unsigned long iflag;
  1514. phba = (struct lpfc_hba *)ptr;
  1515. spin_lock_irqsave(phba->host->host_lock, iflag);
  1516. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1517. phba->work_hba_events |= WORKER_MBOX_TMO;
  1518. if (phba->work_wait)
  1519. wake_up(phba->work_wait);
  1520. }
  1521. spin_unlock_irqrestore(phba->host->host_lock, iflag);
  1522. }
  1523. void
  1524. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  1525. {
  1526. LPFC_MBOXQ_t *pmbox;
  1527. MAILBOX_t *mb;
  1528. spin_lock_irq(phba->host->host_lock);
  1529. if (!(phba->work_hba_events & WORKER_MBOX_TMO)) {
  1530. spin_unlock_irq(phba->host->host_lock);
  1531. return;
  1532. }
  1533. pmbox = phba->sli.mbox_active;
  1534. mb = &pmbox->mb;
  1535. /* Mbox cmd <mbxCommand> timeout */
  1536. lpfc_printf_log(phba,
  1537. KERN_ERR,
  1538. LOG_MBOX | LOG_SLI,
  1539. "%d:0310 Mailbox command x%x timeout Data: x%x x%x x%p\n",
  1540. phba->brd_no,
  1541. mb->mbxCommand,
  1542. phba->hba_state,
  1543. phba->sli.sli_flag,
  1544. phba->sli.mbox_active);
  1545. if (phba->sli.mbox_active == pmbox) {
  1546. phba->sli.mbox_active = NULL;
  1547. if (pmbox->mbox_cmpl) {
  1548. mb->mbxStatus = MBX_NOT_FINISHED;
  1549. spin_unlock_irq(phba->host->host_lock);
  1550. (pmbox->mbox_cmpl) (phba, pmbox);
  1551. spin_lock_irq(phba->host->host_lock);
  1552. }
  1553. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1554. }
  1555. spin_unlock_irq(phba->host->host_lock);
  1556. lpfc_mbox_abort(phba);
  1557. return;
  1558. }
  1559. int
  1560. lpfc_sli_issue_mbox(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmbox, uint32_t flag)
  1561. {
  1562. MAILBOX_t *mb;
  1563. struct lpfc_sli *psli;
  1564. uint32_t status, evtctr;
  1565. uint32_t ha_copy;
  1566. int i;
  1567. unsigned long drvr_flag = 0;
  1568. volatile uint32_t word0, ldata;
  1569. void __iomem *to_slim;
  1570. psli = &phba->sli;
  1571. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1572. mb = &pmbox->mb;
  1573. status = MBX_SUCCESS;
  1574. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  1575. /* Polling for a mbox command when another one is already active
  1576. * is not allowed in SLI. Also, the driver must have established
  1577. * SLI2 mode to queue and process multiple mbox commands.
  1578. */
  1579. if (flag & MBX_POLL) {
  1580. spin_unlock_irqrestore(phba->host->host_lock,
  1581. drvr_flag);
  1582. /* Mbox command <mbxCommand> cannot issue */
  1583. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1584. return (MBX_NOT_FINISHED);
  1585. }
  1586. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  1587. spin_unlock_irqrestore(phba->host->host_lock,
  1588. drvr_flag);
  1589. /* Mbox command <mbxCommand> cannot issue */
  1590. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag)
  1591. return (MBX_NOT_FINISHED);
  1592. }
  1593. /* Handle STOP IOCB processing flag. This is only meaningful
  1594. * if we are not polling for mbox completion.
  1595. */
  1596. if (flag & MBX_STOP_IOCB) {
  1597. flag &= ~MBX_STOP_IOCB;
  1598. /* Now flag each ring */
  1599. for (i = 0; i < psli->num_rings; i++) {
  1600. /* If the ring is active, flag it */
  1601. if (psli->ring[i].cmdringaddr) {
  1602. psli->ring[i].flag |=
  1603. LPFC_STOP_IOCB_MBX;
  1604. }
  1605. }
  1606. }
  1607. /* Another mailbox command is still being processed, queue this
  1608. * command to be processed later.
  1609. */
  1610. lpfc_mbox_put(phba, pmbox);
  1611. /* Mbox cmd issue - BUSY */
  1612. lpfc_printf_log(phba,
  1613. KERN_INFO,
  1614. LOG_MBOX | LOG_SLI,
  1615. "%d:0308 Mbox cmd issue - BUSY Data: x%x x%x x%x x%x\n",
  1616. phba->brd_no,
  1617. mb->mbxCommand,
  1618. phba->hba_state,
  1619. psli->sli_flag,
  1620. flag);
  1621. psli->slistat.mbox_busy++;
  1622. spin_unlock_irqrestore(phba->host->host_lock,
  1623. drvr_flag);
  1624. return (MBX_BUSY);
  1625. }
  1626. /* Handle STOP IOCB processing flag. This is only meaningful
  1627. * if we are not polling for mbox completion.
  1628. */
  1629. if (flag & MBX_STOP_IOCB) {
  1630. flag &= ~MBX_STOP_IOCB;
  1631. if (flag == MBX_NOWAIT) {
  1632. /* Now flag each ring */
  1633. for (i = 0; i < psli->num_rings; i++) {
  1634. /* If the ring is active, flag it */
  1635. if (psli->ring[i].cmdringaddr) {
  1636. psli->ring[i].flag |=
  1637. LPFC_STOP_IOCB_MBX;
  1638. }
  1639. }
  1640. }
  1641. }
  1642. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1643. /* If we are not polling, we MUST be in SLI2 mode */
  1644. if (flag != MBX_POLL) {
  1645. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  1646. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1647. spin_unlock_irqrestore(phba->host->host_lock,
  1648. drvr_flag);
  1649. /* Mbox command <mbxCommand> cannot issue */
  1650. LOG_MBOX_CANNOT_ISSUE_DATA( phba, mb, psli, flag);
  1651. return (MBX_NOT_FINISHED);
  1652. }
  1653. /* timeout active mbox command */
  1654. mod_timer(&psli->mbox_tmo, jiffies + HZ * LPFC_MBOX_TMO);
  1655. }
  1656. /* Mailbox cmd <cmd> issue */
  1657. lpfc_printf_log(phba,
  1658. KERN_INFO,
  1659. LOG_MBOX | LOG_SLI,
  1660. "%d:0309 Mailbox cmd x%x issue Data: x%x x%x x%x\n",
  1661. phba->brd_no,
  1662. mb->mbxCommand,
  1663. phba->hba_state,
  1664. psli->sli_flag,
  1665. flag);
  1666. psli->slistat.mbox_cmd++;
  1667. evtctr = psli->slistat.mbox_event;
  1668. /* next set own bit for the adapter and copy over command word */
  1669. mb->mbxOwner = OWN_CHIP;
  1670. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1671. /* First copy command data to host SLIM area */
  1672. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  1673. } else {
  1674. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1675. /* copy command data into host mbox for cmpl */
  1676. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  1677. MAILBOX_CMD_SIZE);
  1678. }
  1679. /* First copy mbox command data to HBA SLIM, skip past first
  1680. word */
  1681. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1682. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  1683. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  1684. /* Next copy over first word, with mbxOwner set */
  1685. ldata = *((volatile uint32_t *)mb);
  1686. to_slim = phba->MBslimaddr;
  1687. writel(ldata, to_slim);
  1688. readl(to_slim); /* flush */
  1689. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1690. /* switch over to host mailbox */
  1691. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  1692. }
  1693. }
  1694. wmb();
  1695. /* interrupt board to doit right away */
  1696. writel(CA_MBATT, phba->CAregaddr);
  1697. readl(phba->CAregaddr); /* flush */
  1698. switch (flag) {
  1699. case MBX_NOWAIT:
  1700. /* Don't wait for it to finish, just return */
  1701. psli->mbox_active = pmbox;
  1702. break;
  1703. case MBX_POLL:
  1704. i = 0;
  1705. psli->mbox_active = NULL;
  1706. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1707. /* First read mbox status word */
  1708. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  1709. word0 = le32_to_cpu(word0);
  1710. } else {
  1711. /* First read mbox status word */
  1712. word0 = readl(phba->MBslimaddr);
  1713. }
  1714. /* Read the HBA Host Attention Register */
  1715. ha_copy = readl(phba->HAregaddr);
  1716. /* Wait for command to complete */
  1717. while (((word0 & OWN_CHIP) == OWN_CHIP)
  1718. || !(ha_copy & HA_MBATT)) {
  1719. if (i++ >= 100) {
  1720. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1721. spin_unlock_irqrestore(phba->host->host_lock,
  1722. drvr_flag);
  1723. return (MBX_NOT_FINISHED);
  1724. }
  1725. /* Check if we took a mbox interrupt while we were
  1726. polling */
  1727. if (((word0 & OWN_CHIP) != OWN_CHIP)
  1728. && (evtctr != psli->slistat.mbox_event))
  1729. break;
  1730. spin_unlock_irqrestore(phba->host->host_lock,
  1731. drvr_flag);
  1732. /* Can be in interrupt context, do not sleep */
  1733. /* (or might be called with interrupts disabled) */
  1734. mdelay(i);
  1735. spin_lock_irqsave(phba->host->host_lock, drvr_flag);
  1736. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1737. /* First copy command data */
  1738. word0 = *((volatile uint32_t *)
  1739. &phba->slim2p->mbx);
  1740. word0 = le32_to_cpu(word0);
  1741. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  1742. MAILBOX_t *slimmb;
  1743. volatile uint32_t slimword0;
  1744. /* Check real SLIM for any errors */
  1745. slimword0 = readl(phba->MBslimaddr);
  1746. slimmb = (MAILBOX_t *) & slimword0;
  1747. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  1748. && slimmb->mbxStatus) {
  1749. psli->sli_flag &=
  1750. ~LPFC_SLI2_ACTIVE;
  1751. word0 = slimword0;
  1752. }
  1753. }
  1754. } else {
  1755. /* First copy command data */
  1756. word0 = readl(phba->MBslimaddr);
  1757. }
  1758. /* Read the HBA Host Attention Register */
  1759. ha_copy = readl(phba->HAregaddr);
  1760. }
  1761. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  1762. /* copy results back to user */
  1763. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  1764. MAILBOX_CMD_SIZE);
  1765. } else {
  1766. /* First copy command data */
  1767. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  1768. MAILBOX_CMD_SIZE);
  1769. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  1770. pmbox->context2) {
  1771. lpfc_memcpy_from_slim((void *)pmbox->context2,
  1772. phba->MBslimaddr + DMP_RSP_OFFSET,
  1773. mb->un.varDmp.word_cnt);
  1774. }
  1775. }
  1776. writel(HA_MBATT, phba->HAregaddr);
  1777. readl(phba->HAregaddr); /* flush */
  1778. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1779. status = mb->mbxStatus;
  1780. }
  1781. spin_unlock_irqrestore(phba->host->host_lock, drvr_flag);
  1782. return (status);
  1783. }
  1784. static int
  1785. lpfc_sli_ringtx_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  1786. struct lpfc_iocbq * piocb)
  1787. {
  1788. /* Insert the caller's iocb in the txq tail for later processing. */
  1789. list_add_tail(&piocb->list, &pring->txq);
  1790. pring->txq_cnt++;
  1791. return (0);
  1792. }
  1793. static struct lpfc_iocbq *
  1794. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  1795. struct lpfc_iocbq ** piocb)
  1796. {
  1797. struct lpfc_iocbq * nextiocb;
  1798. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  1799. if (!nextiocb) {
  1800. nextiocb = *piocb;
  1801. *piocb = NULL;
  1802. }
  1803. return nextiocb;
  1804. }
  1805. int
  1806. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  1807. struct lpfc_iocbq *piocb, uint32_t flag)
  1808. {
  1809. struct lpfc_iocbq *nextiocb;
  1810. IOCB_t *iocb;
  1811. /*
  1812. * We should never get an IOCB if we are in a < LINK_DOWN state
  1813. */
  1814. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  1815. return IOCB_ERROR;
  1816. /*
  1817. * Check to see if we are blocking IOCB processing because of a
  1818. * outstanding mbox command.
  1819. */
  1820. if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
  1821. goto iocb_busy;
  1822. if (unlikely(phba->hba_state == LPFC_LINK_DOWN)) {
  1823. /*
  1824. * Only CREATE_XRI, CLOSE_XRI, ABORT_XRI, and QUE_RING_BUF
  1825. * can be issued if the link is not up.
  1826. */
  1827. switch (piocb->iocb.ulpCommand) {
  1828. case CMD_QUE_RING_BUF_CN:
  1829. case CMD_QUE_RING_BUF64_CN:
  1830. case CMD_CLOSE_XRI_CN:
  1831. case CMD_ABORT_XRI_CN:
  1832. /*
  1833. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  1834. * completion, iocb_cmpl MUST be 0.
  1835. */
  1836. if (piocb->iocb_cmpl)
  1837. piocb->iocb_cmpl = NULL;
  1838. /*FALLTHROUGH*/
  1839. case CMD_CREATE_XRI_CR:
  1840. break;
  1841. default:
  1842. goto iocb_busy;
  1843. }
  1844. /*
  1845. * For FCP commands, we must be in a state where we can process link
  1846. * attention events.
  1847. */
  1848. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  1849. !(phba->sli.sli_flag & LPFC_PROCESS_LA)))
  1850. goto iocb_busy;
  1851. /*
  1852. * Check to see if this is a high priority command.
  1853. * If so bypass tx queue processing.
  1854. */
  1855. if (unlikely((flag & SLI_IOCB_HIGH_PRIORITY) &&
  1856. (iocb = lpfc_sli_next_iocb_slot(phba, pring)))) {
  1857. lpfc_sli_submit_iocb(phba, pring, iocb, piocb);
  1858. piocb = NULL;
  1859. }
  1860. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  1861. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  1862. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  1863. if (iocb)
  1864. lpfc_sli_update_ring(phba, pring);
  1865. else
  1866. lpfc_sli_update_full_ring(phba, pring);
  1867. if (!piocb)
  1868. return IOCB_SUCCESS;
  1869. goto out_busy;
  1870. iocb_busy:
  1871. pring->stats.iocb_cmd_delay++;
  1872. out_busy:
  1873. if (!(flag & SLI_IOCB_RET_IOCB)) {
  1874. lpfc_sli_ringtx_put(phba, pring, piocb);
  1875. return IOCB_SUCCESS;
  1876. }
  1877. return IOCB_BUSY;
  1878. }
  1879. int
  1880. lpfc_sli_setup(struct lpfc_hba *phba)
  1881. {
  1882. int i, totiocb = 0;
  1883. struct lpfc_sli *psli = &phba->sli;
  1884. struct lpfc_sli_ring *pring;
  1885. psli->num_rings = MAX_CONFIGURED_RINGS;
  1886. psli->sli_flag = 0;
  1887. psli->fcp_ring = LPFC_FCP_RING;
  1888. psli->next_ring = LPFC_FCP_NEXT_RING;
  1889. psli->ip_ring = LPFC_IP_RING;
  1890. for (i = 0; i < psli->num_rings; i++) {
  1891. pring = &psli->ring[i];
  1892. switch (i) {
  1893. case LPFC_FCP_RING: /* ring 0 - FCP */
  1894. /* numCiocb and numRiocb are used in config_port */
  1895. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  1896. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  1897. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  1898. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  1899. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  1900. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  1901. pring->iotag_ctr = 0;
  1902. pring->iotag_max =
  1903. (phba->cfg_hba_queue_depth * 2);
  1904. pring->fast_iotag = pring->iotag_max;
  1905. pring->num_mask = 0;
  1906. break;
  1907. case LPFC_IP_RING: /* ring 1 - IP */
  1908. /* numCiocb and numRiocb are used in config_port */
  1909. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  1910. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  1911. pring->num_mask = 0;
  1912. break;
  1913. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  1914. /* numCiocb and numRiocb are used in config_port */
  1915. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  1916. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  1917. pring->fast_iotag = 0;
  1918. pring->iotag_ctr = 0;
  1919. pring->iotag_max = 4096;
  1920. pring->num_mask = 4;
  1921. pring->prt[0].profile = 0; /* Mask 0 */
  1922. pring->prt[0].rctl = FC_ELS_REQ;
  1923. pring->prt[0].type = FC_ELS_DATA;
  1924. pring->prt[0].lpfc_sli_rcv_unsol_event =
  1925. lpfc_els_unsol_event;
  1926. pring->prt[1].profile = 0; /* Mask 1 */
  1927. pring->prt[1].rctl = FC_ELS_RSP;
  1928. pring->prt[1].type = FC_ELS_DATA;
  1929. pring->prt[1].lpfc_sli_rcv_unsol_event =
  1930. lpfc_els_unsol_event;
  1931. pring->prt[2].profile = 0; /* Mask 2 */
  1932. /* NameServer Inquiry */
  1933. pring->prt[2].rctl = FC_UNSOL_CTL;
  1934. /* NameServer */
  1935. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  1936. pring->prt[2].lpfc_sli_rcv_unsol_event =
  1937. lpfc_ct_unsol_event;
  1938. pring->prt[3].profile = 0; /* Mask 3 */
  1939. /* NameServer response */
  1940. pring->prt[3].rctl = FC_SOL_CTL;
  1941. /* NameServer */
  1942. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  1943. pring->prt[3].lpfc_sli_rcv_unsol_event =
  1944. lpfc_ct_unsol_event;
  1945. break;
  1946. }
  1947. totiocb += (pring->numCiocb + pring->numRiocb);
  1948. }
  1949. if (totiocb > MAX_SLI2_IOCB) {
  1950. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  1951. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1952. "%d:0462 Too many cmd / rsp ring entries in "
  1953. "SLI2 SLIM Data: x%x x%x\n",
  1954. phba->brd_no, totiocb, MAX_SLI2_IOCB);
  1955. }
  1956. return 0;
  1957. }
  1958. int
  1959. lpfc_sli_queue_setup(struct lpfc_hba * phba)
  1960. {
  1961. struct lpfc_sli *psli;
  1962. struct lpfc_sli_ring *pring;
  1963. int i, cnt;
  1964. psli = &phba->sli;
  1965. spin_lock_irq(phba->host->host_lock);
  1966. INIT_LIST_HEAD(&psli->mboxq);
  1967. /* Initialize list headers for txq and txcmplq as double linked lists */
  1968. for (i = 0; i < psli->num_rings; i++) {
  1969. pring = &psli->ring[i];
  1970. pring->ringno = i;
  1971. pring->next_cmdidx = 0;
  1972. pring->local_getidx = 0;
  1973. pring->cmdidx = 0;
  1974. INIT_LIST_HEAD(&pring->txq);
  1975. INIT_LIST_HEAD(&pring->txcmplq);
  1976. INIT_LIST_HEAD(&pring->iocb_continueq);
  1977. INIT_LIST_HEAD(&pring->postbufq);
  1978. cnt = pring->fast_iotag;
  1979. spin_unlock_irq(phba->host->host_lock);
  1980. if (cnt) {
  1981. pring->fast_lookup =
  1982. kmalloc(cnt * sizeof (struct lpfc_iocbq *),
  1983. GFP_KERNEL);
  1984. if (pring->fast_lookup == 0) {
  1985. return (0);
  1986. }
  1987. memset((char *)pring->fast_lookup, 0,
  1988. cnt * sizeof (struct lpfc_iocbq *));
  1989. }
  1990. spin_lock_irq(phba->host->host_lock);
  1991. }
  1992. spin_unlock_irq(phba->host->host_lock);
  1993. return (1);
  1994. }
  1995. int
  1996. lpfc_sli_hba_down(struct lpfc_hba * phba)
  1997. {
  1998. struct lpfc_sli *psli;
  1999. struct lpfc_sli_ring *pring;
  2000. LPFC_MBOXQ_t *pmb;
  2001. struct lpfc_iocbq *iocb, *next_iocb;
  2002. IOCB_t *icmd = NULL;
  2003. int i;
  2004. unsigned long flags = 0;
  2005. psli = &phba->sli;
  2006. lpfc_hba_down_prep(phba);
  2007. spin_lock_irqsave(phba->host->host_lock, flags);
  2008. for (i = 0; i < psli->num_rings; i++) {
  2009. pring = &psli->ring[i];
  2010. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2011. /*
  2012. * Error everything on the txq since these iocbs have not been
  2013. * given to the FW yet.
  2014. */
  2015. pring->txq_cnt = 0;
  2016. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  2017. list_del_init(&iocb->list);
  2018. if (iocb->iocb_cmpl) {
  2019. icmd = &iocb->iocb;
  2020. icmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2021. icmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2022. spin_unlock_irqrestore(phba->host->host_lock,
  2023. flags);
  2024. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2025. spin_lock_irqsave(phba->host->host_lock, flags);
  2026. } else {
  2027. list_add_tail(&iocb->list,
  2028. &phba->lpfc_iocb_list);
  2029. }
  2030. }
  2031. INIT_LIST_HEAD(&(pring->txq));
  2032. if (pring->fast_lookup) {
  2033. kfree(pring->fast_lookup);
  2034. pring->fast_lookup = NULL;
  2035. }
  2036. }
  2037. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2038. /* Return any active mbox cmds */
  2039. del_timer_sync(&psli->mbox_tmo);
  2040. spin_lock_irqsave(phba->host->host_lock, flags);
  2041. phba->work_hba_events &= ~WORKER_MBOX_TMO;
  2042. if (psli->mbox_active) {
  2043. pmb = psli->mbox_active;
  2044. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2045. if (pmb->mbox_cmpl) {
  2046. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2047. pmb->mbox_cmpl(phba,pmb);
  2048. spin_lock_irqsave(phba->host->host_lock, flags);
  2049. }
  2050. }
  2051. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2052. psli->mbox_active = NULL;
  2053. /* Return any pending mbox cmds */
  2054. while ((pmb = lpfc_mbox_get(phba)) != NULL) {
  2055. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2056. if (pmb->mbox_cmpl) {
  2057. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2058. pmb->mbox_cmpl(phba,pmb);
  2059. spin_lock_irqsave(phba->host->host_lock, flags);
  2060. }
  2061. }
  2062. INIT_LIST_HEAD(&psli->mboxq);
  2063. spin_unlock_irqrestore(phba->host->host_lock, flags);
  2064. /*
  2065. * Provided the hba is not in an error state, reset it. It is not
  2066. * capable of IO anymore.
  2067. */
  2068. if (phba->hba_state != LPFC_HBA_ERROR) {
  2069. phba->hba_state = LPFC_INIT_START;
  2070. lpfc_sli_brdreset(phba, 1);
  2071. }
  2072. return 1;
  2073. }
  2074. void
  2075. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2076. {
  2077. uint32_t *src = srcp;
  2078. uint32_t *dest = destp;
  2079. uint32_t ldata;
  2080. int i;
  2081. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2082. ldata = *src;
  2083. ldata = le32_to_cpu(ldata);
  2084. *dest = ldata;
  2085. src++;
  2086. dest++;
  2087. }
  2088. }
  2089. int
  2090. lpfc_sli_ringpostbuf_put(struct lpfc_hba * phba, struct lpfc_sli_ring * pring,
  2091. struct lpfc_dmabuf * mp)
  2092. {
  2093. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2094. later */
  2095. list_add_tail(&mp->list, &pring->postbufq);
  2096. pring->postbufq_cnt++;
  2097. return 0;
  2098. }
  2099. struct lpfc_dmabuf *
  2100. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2101. dma_addr_t phys)
  2102. {
  2103. struct lpfc_dmabuf *mp, *next_mp;
  2104. struct list_head *slp = &pring->postbufq;
  2105. /* Search postbufq, from the begining, looking for a match on phys */
  2106. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2107. if (mp->phys == phys) {
  2108. list_del_init(&mp->list);
  2109. pring->postbufq_cnt--;
  2110. return mp;
  2111. }
  2112. }
  2113. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2114. "%d:0410 Cannot find virtual addr for mapped buf on "
  2115. "ring %d Data x%llx x%p x%p x%x\n",
  2116. phba->brd_no, pring->ringno, (unsigned long long)phys,
  2117. slp->next, slp->prev, pring->postbufq_cnt);
  2118. return NULL;
  2119. }
  2120. static void
  2121. lpfc_sli_abort_elsreq_cmpl(struct lpfc_hba * phba, struct lpfc_iocbq * cmdiocb,
  2122. struct lpfc_iocbq * rspiocb)
  2123. {
  2124. struct lpfc_dmabuf *buf_ptr, *buf_ptr1;
  2125. /* Free the resources associated with the ELS_REQUEST64 IOCB the driver
  2126. * just aborted.
  2127. * In this case, context2 = cmd, context2->next = rsp, context3 = bpl
  2128. */
  2129. if (cmdiocb->context2) {
  2130. buf_ptr1 = (struct lpfc_dmabuf *) cmdiocb->context2;
  2131. /* Free the response IOCB before completing the abort
  2132. command. */
  2133. buf_ptr = NULL;
  2134. list_remove_head((&buf_ptr1->list), buf_ptr,
  2135. struct lpfc_dmabuf, list);
  2136. if (buf_ptr) {
  2137. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2138. kfree(buf_ptr);
  2139. }
  2140. lpfc_mbuf_free(phba, buf_ptr1->virt, buf_ptr1->phys);
  2141. kfree(buf_ptr1);
  2142. }
  2143. if (cmdiocb->context3) {
  2144. buf_ptr = (struct lpfc_dmabuf *) cmdiocb->context3;
  2145. lpfc_mbuf_free(phba, buf_ptr->virt, buf_ptr->phys);
  2146. kfree(buf_ptr);
  2147. }
  2148. list_add_tail(&cmdiocb->list, &phba->lpfc_iocb_list);
  2149. return;
  2150. }
  2151. int
  2152. lpfc_sli_issue_abort_iotag32(struct lpfc_hba * phba,
  2153. struct lpfc_sli_ring * pring,
  2154. struct lpfc_iocbq * cmdiocb)
  2155. {
  2156. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  2157. struct lpfc_iocbq *abtsiocbp = NULL;
  2158. IOCB_t *icmd = NULL;
  2159. IOCB_t *iabt = NULL;
  2160. /* issue ABTS for this IOCB based on iotag */
  2161. list_remove_head(lpfc_iocb_list, abtsiocbp, struct lpfc_iocbq, list);
  2162. if (abtsiocbp == NULL)
  2163. return 0;
  2164. memset(abtsiocbp, 0, sizeof (struct lpfc_iocbq));
  2165. iabt = &abtsiocbp->iocb;
  2166. icmd = &cmdiocb->iocb;
  2167. switch (icmd->ulpCommand) {
  2168. case CMD_ELS_REQUEST64_CR:
  2169. /* Even though we abort the ELS command, the firmware may access
  2170. * the BPL or other resources before it processes our
  2171. * ABORT_MXRI64. Thus we must delay reusing the cmdiocb
  2172. * resources till the actual abort request completes.
  2173. */
  2174. abtsiocbp->context1 = (void *)((unsigned long)icmd->ulpCommand);
  2175. abtsiocbp->context2 = cmdiocb->context2;
  2176. abtsiocbp->context3 = cmdiocb->context3;
  2177. cmdiocb->context2 = NULL;
  2178. cmdiocb->context3 = NULL;
  2179. abtsiocbp->iocb_cmpl = lpfc_sli_abort_elsreq_cmpl;
  2180. break;
  2181. default:
  2182. list_add_tail(&abtsiocbp->list, lpfc_iocb_list);
  2183. return 0;
  2184. }
  2185. iabt->un.amxri.abortType = ABORT_TYPE_ABTS;
  2186. iabt->un.amxri.iotag32 = icmd->un.elsreq64.bdl.ulpIoTag32;
  2187. iabt->ulpLe = 1;
  2188. iabt->ulpClass = CLASS3;
  2189. iabt->ulpCommand = CMD_ABORT_MXRI64_CN;
  2190. if (lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0) == IOCB_ERROR) {
  2191. list_add_tail(&abtsiocbp->list, lpfc_iocb_list);
  2192. return 0;
  2193. }
  2194. return 1;
  2195. }
  2196. static int
  2197. lpfc_sli_validate_iocb_cmd(struct lpfc_scsi_buf *lpfc_cmd, uint16_t tgt_id,
  2198. uint64_t lun_id, struct lpfc_iocbq *iocb,
  2199. uint32_t ctx, lpfc_ctx_cmd ctx_cmd)
  2200. {
  2201. int rc = 1;
  2202. if (lpfc_cmd == NULL)
  2203. return rc;
  2204. switch (ctx_cmd) {
  2205. case LPFC_CTX_LUN:
  2206. if ((lpfc_cmd->pCmd->device->id == tgt_id) &&
  2207. (lpfc_cmd->pCmd->device->lun == lun_id))
  2208. rc = 0;
  2209. break;
  2210. case LPFC_CTX_TGT:
  2211. if (lpfc_cmd->pCmd->device->id == tgt_id)
  2212. rc = 0;
  2213. break;
  2214. case LPFC_CTX_CTX:
  2215. if (iocb->iocb.ulpContext == ctx)
  2216. rc = 0;
  2217. case LPFC_CTX_HOST:
  2218. rc = 0;
  2219. break;
  2220. default:
  2221. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  2222. __FUNCTION__, ctx_cmd);
  2223. break;
  2224. }
  2225. return rc;
  2226. }
  2227. int
  2228. lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2229. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
  2230. {
  2231. struct lpfc_iocbq *iocb, *next_iocb;
  2232. IOCB_t *cmd = NULL;
  2233. struct lpfc_scsi_buf *lpfc_cmd;
  2234. int sum = 0, ret_val = 0;
  2235. /* Next check the txcmplq */
  2236. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  2237. cmd = &iocb->iocb;
  2238. /* Must be a FCP command */
  2239. if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
  2240. (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
  2241. (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
  2242. continue;
  2243. }
  2244. /* context1 MUST be a struct lpfc_scsi_buf */
  2245. lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
  2246. ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
  2247. NULL, 0, ctx_cmd);
  2248. if (ret_val != 0)
  2249. continue;
  2250. sum++;
  2251. }
  2252. return sum;
  2253. }
  2254. int
  2255. lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2256. uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
  2257. lpfc_ctx_cmd abort_cmd)
  2258. {
  2259. struct lpfc_iocbq *iocb, *next_iocb;
  2260. struct lpfc_iocbq *abtsiocb = NULL;
  2261. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  2262. IOCB_t *cmd = NULL;
  2263. struct lpfc_scsi_buf *lpfc_cmd;
  2264. int errcnt = 0, ret_val = 0;
  2265. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list) {
  2266. cmd = &iocb->iocb;
  2267. /* Must be a FCP command */
  2268. if ((cmd->ulpCommand != CMD_FCP_ICMND64_CR) &&
  2269. (cmd->ulpCommand != CMD_FCP_IWRITE64_CR) &&
  2270. (cmd->ulpCommand != CMD_FCP_IREAD64_CR)) {
  2271. continue;
  2272. }
  2273. /* context1 MUST be a struct lpfc_scsi_buf */
  2274. lpfc_cmd = (struct lpfc_scsi_buf *) (iocb->context1);
  2275. ret_val = lpfc_sli_validate_iocb_cmd(lpfc_cmd, tgt_id, lun_id,
  2276. iocb, ctx, abort_cmd);
  2277. if (ret_val != 0)
  2278. continue;
  2279. /* issue ABTS for this IOCB based on iotag */
  2280. list_remove_head(lpfc_iocb_list, abtsiocb, struct lpfc_iocbq,
  2281. list);
  2282. if (abtsiocb == NULL) {
  2283. errcnt++;
  2284. continue;
  2285. }
  2286. memset(abtsiocb, 0, sizeof (struct lpfc_iocbq));
  2287. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  2288. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  2289. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  2290. abtsiocb->iocb.ulpLe = 1;
  2291. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  2292. if (phba->hba_state >= LPFC_LINK_UP)
  2293. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  2294. else
  2295. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  2296. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  2297. if (ret_val == IOCB_ERROR) {
  2298. list_add_tail(&abtsiocb->list, lpfc_iocb_list);
  2299. errcnt++;
  2300. continue;
  2301. }
  2302. }
  2303. return errcnt;
  2304. }
  2305. void
  2306. lpfc_sli_wake_iocb_high_priority(struct lpfc_hba * phba,
  2307. struct lpfc_iocbq * queue1,
  2308. struct lpfc_iocbq * queue2)
  2309. {
  2310. if (queue1->context2 && queue2)
  2311. memcpy(queue1->context2, queue2, sizeof (struct lpfc_iocbq));
  2312. /* The waiter is looking for LPFC_IO_HIPRI bit to be set
  2313. as a signal to wake up */
  2314. queue1->iocb_flag |= LPFC_IO_HIPRI;
  2315. return;
  2316. }
  2317. int
  2318. lpfc_sli_issue_iocb_wait_high_priority(struct lpfc_hba * phba,
  2319. struct lpfc_sli_ring * pring,
  2320. struct lpfc_iocbq * piocb,
  2321. uint32_t flag,
  2322. struct lpfc_iocbq * prspiocbq,
  2323. uint32_t timeout)
  2324. {
  2325. int j, delay_time, retval = IOCB_ERROR;
  2326. /* The caller must left context1 empty. */
  2327. if (piocb->context_un.hipri_wait_queue != 0) {
  2328. return IOCB_ERROR;
  2329. }
  2330. /*
  2331. * If the caller has provided a response iocbq buffer, context2 must
  2332. * be NULL or its an error.
  2333. */
  2334. if (prspiocbq && piocb->context2) {
  2335. return IOCB_ERROR;
  2336. }
  2337. piocb->context2 = prspiocbq;
  2338. /* Setup callback routine and issue the command. */
  2339. piocb->iocb_cmpl = lpfc_sli_wake_iocb_high_priority;
  2340. retval = lpfc_sli_issue_iocb(phba, pring, piocb,
  2341. flag | SLI_IOCB_HIGH_PRIORITY);
  2342. if (retval != IOCB_SUCCESS) {
  2343. piocb->context2 = NULL;
  2344. return IOCB_ERROR;
  2345. }
  2346. /*
  2347. * This high-priority iocb was sent out-of-band. Poll for its
  2348. * completion rather than wait for a signal. Note that the host_lock
  2349. * is held by the midlayer and must be released here to allow the
  2350. * interrupt handlers to complete the IO and signal this routine via
  2351. * the iocb_flag.
  2352. * Also, the delay_time is computed to be one second longer than
  2353. * the scsi command timeout to give the FW time to abort on
  2354. * timeout rather than the driver just giving up. Typically,
  2355. * the midlayer does not specify a time for this command so the
  2356. * driver is free to enforce its own timeout.
  2357. */
  2358. delay_time = ((timeout + 1) * 1000) >> 6;
  2359. retval = IOCB_ERROR;
  2360. spin_unlock_irq(phba->host->host_lock);
  2361. for (j = 0; j < 64; j++) {
  2362. msleep(delay_time);
  2363. if (piocb->iocb_flag & LPFC_IO_HIPRI) {
  2364. piocb->iocb_flag &= ~LPFC_IO_HIPRI;
  2365. retval = IOCB_SUCCESS;
  2366. break;
  2367. }
  2368. }
  2369. spin_lock_irq(phba->host->host_lock);
  2370. piocb->context2 = NULL;
  2371. return retval;
  2372. }
  2373. int
  2374. lpfc_sli_issue_mbox_wait(struct lpfc_hba * phba, LPFC_MBOXQ_t * pmboxq,
  2375. uint32_t timeout)
  2376. {
  2377. DECLARE_WAIT_QUEUE_HEAD(done_q);
  2378. DECLARE_WAITQUEUE(wq_entry, current);
  2379. uint32_t timeleft = 0;
  2380. int retval;
  2381. /* The caller must leave context1 empty. */
  2382. if (pmboxq->context1 != 0) {
  2383. return (MBX_NOT_FINISHED);
  2384. }
  2385. /* setup wake call as IOCB callback */
  2386. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  2387. /* setup context field to pass wait_queue pointer to wake function */
  2388. pmboxq->context1 = &done_q;
  2389. /* start to sleep before we wait, to avoid races */
  2390. set_current_state(TASK_INTERRUPTIBLE);
  2391. add_wait_queue(&done_q, &wq_entry);
  2392. /* now issue the command */
  2393. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  2394. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  2395. timeleft = schedule_timeout(timeout * HZ);
  2396. pmboxq->context1 = NULL;
  2397. /* if schedule_timeout returns 0, we timed out and were not
  2398. woken up */
  2399. if (timeleft == 0) {
  2400. retval = MBX_TIMEOUT;
  2401. } else {
  2402. retval = MBX_SUCCESS;
  2403. }
  2404. }
  2405. set_current_state(TASK_RUNNING);
  2406. remove_wait_queue(&done_q, &wq_entry);
  2407. return retval;
  2408. }
  2409. irqreturn_t
  2410. lpfc_intr_handler(int irq, void *dev_id, struct pt_regs * regs)
  2411. {
  2412. struct lpfc_hba *phba;
  2413. uint32_t ha_copy;
  2414. uint32_t work_ha_copy;
  2415. unsigned long status;
  2416. int i;
  2417. uint32_t control;
  2418. /*
  2419. * Get the driver's phba structure from the dev_id and
  2420. * assume the HBA is not interrupting.
  2421. */
  2422. phba = (struct lpfc_hba *) dev_id;
  2423. if (unlikely(!phba))
  2424. return IRQ_NONE;
  2425. phba->sli.slistat.sli_intr++;
  2426. /*
  2427. * Call the HBA to see if it is interrupting. If not, don't claim
  2428. * the interrupt
  2429. */
  2430. /* Ignore all interrupts during initialization. */
  2431. if (unlikely(phba->hba_state < LPFC_LINK_DOWN))
  2432. return IRQ_NONE;
  2433. /*
  2434. * Read host attention register to determine interrupt source
  2435. * Clear Attention Sources, except Error Attention (to
  2436. * preserve status) and Link Attention
  2437. */
  2438. spin_lock(phba->host->host_lock);
  2439. ha_copy = readl(phba->HAregaddr);
  2440. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  2441. readl(phba->HAregaddr); /* flush */
  2442. spin_unlock(phba->host->host_lock);
  2443. if (unlikely(!ha_copy))
  2444. return IRQ_NONE;
  2445. work_ha_copy = ha_copy & phba->work_ha_mask;
  2446. if (unlikely(work_ha_copy)) {
  2447. if (work_ha_copy & HA_LATT) {
  2448. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  2449. /*
  2450. * Turn off Link Attention interrupts
  2451. * until CLEAR_LA done
  2452. */
  2453. spin_lock(phba->host->host_lock);
  2454. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  2455. control = readl(phba->HCregaddr);
  2456. control &= ~HC_LAINT_ENA;
  2457. writel(control, phba->HCregaddr);
  2458. readl(phba->HCregaddr); /* flush */
  2459. spin_unlock(phba->host->host_lock);
  2460. }
  2461. else
  2462. work_ha_copy &= ~HA_LATT;
  2463. }
  2464. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  2465. for (i = 0; i < phba->sli.num_rings; i++) {
  2466. if (work_ha_copy & (HA_RXATT << (4*i))) {
  2467. /*
  2468. * Turn off Slow Rings interrupts
  2469. */
  2470. spin_lock(phba->host->host_lock);
  2471. control = readl(phba->HCregaddr);
  2472. control &= ~(HC_R0INT_ENA << i);
  2473. writel(control, phba->HCregaddr);
  2474. readl(phba->HCregaddr); /* flush */
  2475. spin_unlock(phba->host->host_lock);
  2476. }
  2477. }
  2478. }
  2479. if (work_ha_copy & HA_ERATT) {
  2480. phba->hba_state = LPFC_HBA_ERROR;
  2481. /*
  2482. * There was a link/board error. Read the
  2483. * status register to retrieve the error event
  2484. * and process it.
  2485. */
  2486. phba->sli.slistat.err_attn_event++;
  2487. /* Save status info */
  2488. phba->work_hs = readl(phba->HSregaddr);
  2489. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  2490. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  2491. /* Clear Chip error bit */
  2492. writel(HA_ERATT, phba->HAregaddr);
  2493. readl(phba->HAregaddr); /* flush */
  2494. /*
  2495. * Reseting the HBA is the only reliable way
  2496. * to shutdown interrupt when there is a
  2497. * ERROR.
  2498. */
  2499. lpfc_sli_send_reset(phba, phba->hba_state);
  2500. }
  2501. spin_lock(phba->host->host_lock);
  2502. phba->work_ha |= work_ha_copy;
  2503. if (phba->work_wait)
  2504. wake_up(phba->work_wait);
  2505. spin_unlock(phba->host->host_lock);
  2506. }
  2507. ha_copy &= ~(phba->work_ha_mask);
  2508. /*
  2509. * Process all events on FCP ring. Take the optimized path for
  2510. * FCP IO. Any other IO is slow path and is handled by
  2511. * the worker thread.
  2512. */
  2513. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  2514. status >>= (4*LPFC_FCP_RING);
  2515. if (status & HA_RXATT)
  2516. lpfc_sli_handle_fast_ring_event(phba,
  2517. &phba->sli.ring[LPFC_FCP_RING],
  2518. status);
  2519. return IRQ_HANDLED;
  2520. } /* lpfc_intr_handler */