esp_scsi.c 64 KB

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  1. /* esp_scsi.c: ESP SCSI driver.
  2. *
  3. * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/types.h>
  7. #include <linux/slab.h>
  8. #include <linux/delay.h>
  9. #include <linux/list.h>
  10. #include <linux/completion.h>
  11. #include <linux/kallsyms.h>
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/init.h>
  15. #include <linux/irqreturn.h>
  16. #include <asm/irq.h>
  17. #include <asm/io.h>
  18. #include <asm/dma.h>
  19. #include <scsi/scsi.h>
  20. #include <scsi/scsi_host.h>
  21. #include <scsi/scsi_cmnd.h>
  22. #include <scsi/scsi_device.h>
  23. #include <scsi/scsi_tcq.h>
  24. #include <scsi/scsi_dbg.h>
  25. #include <scsi/scsi_transport_spi.h>
  26. #include "esp_scsi.h"
  27. #define DRV_MODULE_NAME "esp"
  28. #define PFX DRV_MODULE_NAME ": "
  29. #define DRV_VERSION "2.000"
  30. #define DRV_MODULE_RELDATE "April 19, 2007"
  31. /* SCSI bus reset settle time in seconds. */
  32. static int esp_bus_reset_settle = 3;
  33. static u32 esp_debug;
  34. #define ESP_DEBUG_INTR 0x00000001
  35. #define ESP_DEBUG_SCSICMD 0x00000002
  36. #define ESP_DEBUG_RESET 0x00000004
  37. #define ESP_DEBUG_MSGIN 0x00000008
  38. #define ESP_DEBUG_MSGOUT 0x00000010
  39. #define ESP_DEBUG_CMDDONE 0x00000020
  40. #define ESP_DEBUG_DISCONNECT 0x00000040
  41. #define ESP_DEBUG_DATASTART 0x00000080
  42. #define ESP_DEBUG_DATADONE 0x00000100
  43. #define ESP_DEBUG_RECONNECT 0x00000200
  44. #define ESP_DEBUG_AUTOSENSE 0x00000400
  45. #define esp_log_intr(f, a...) \
  46. do { if (esp_debug & ESP_DEBUG_INTR) \
  47. printk(f, ## a); \
  48. } while (0)
  49. #define esp_log_reset(f, a...) \
  50. do { if (esp_debug & ESP_DEBUG_RESET) \
  51. printk(f, ## a); \
  52. } while (0)
  53. #define esp_log_msgin(f, a...) \
  54. do { if (esp_debug & ESP_DEBUG_MSGIN) \
  55. printk(f, ## a); \
  56. } while (0)
  57. #define esp_log_msgout(f, a...) \
  58. do { if (esp_debug & ESP_DEBUG_MSGOUT) \
  59. printk(f, ## a); \
  60. } while (0)
  61. #define esp_log_cmddone(f, a...) \
  62. do { if (esp_debug & ESP_DEBUG_CMDDONE) \
  63. printk(f, ## a); \
  64. } while (0)
  65. #define esp_log_disconnect(f, a...) \
  66. do { if (esp_debug & ESP_DEBUG_DISCONNECT) \
  67. printk(f, ## a); \
  68. } while (0)
  69. #define esp_log_datastart(f, a...) \
  70. do { if (esp_debug & ESP_DEBUG_DATASTART) \
  71. printk(f, ## a); \
  72. } while (0)
  73. #define esp_log_datadone(f, a...) \
  74. do { if (esp_debug & ESP_DEBUG_DATADONE) \
  75. printk(f, ## a); \
  76. } while (0)
  77. #define esp_log_reconnect(f, a...) \
  78. do { if (esp_debug & ESP_DEBUG_RECONNECT) \
  79. printk(f, ## a); \
  80. } while (0)
  81. #define esp_log_autosense(f, a...) \
  82. do { if (esp_debug & ESP_DEBUG_AUTOSENSE) \
  83. printk(f, ## a); \
  84. } while (0)
  85. #define esp_read8(REG) esp->ops->esp_read8(esp, REG)
  86. #define esp_write8(VAL,REG) esp->ops->esp_write8(esp, VAL, REG)
  87. static void esp_log_fill_regs(struct esp *esp,
  88. struct esp_event_ent *p)
  89. {
  90. p->sreg = esp->sreg;
  91. p->seqreg = esp->seqreg;
  92. p->sreg2 = esp->sreg2;
  93. p->ireg = esp->ireg;
  94. p->select_state = esp->select_state;
  95. p->event = esp->event;
  96. }
  97. void scsi_esp_cmd(struct esp *esp, u8 val)
  98. {
  99. struct esp_event_ent *p;
  100. int idx = esp->esp_event_cur;
  101. p = &esp->esp_event_log[idx];
  102. p->type = ESP_EVENT_TYPE_CMD;
  103. p->val = val;
  104. esp_log_fill_regs(esp, p);
  105. esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  106. esp_write8(val, ESP_CMD);
  107. }
  108. EXPORT_SYMBOL(scsi_esp_cmd);
  109. static void esp_event(struct esp *esp, u8 val)
  110. {
  111. struct esp_event_ent *p;
  112. int idx = esp->esp_event_cur;
  113. p = &esp->esp_event_log[idx];
  114. p->type = ESP_EVENT_TYPE_EVENT;
  115. p->val = val;
  116. esp_log_fill_regs(esp, p);
  117. esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  118. esp->event = val;
  119. }
  120. static void esp_dump_cmd_log(struct esp *esp)
  121. {
  122. int idx = esp->esp_event_cur;
  123. int stop = idx;
  124. printk(KERN_INFO PFX "esp%d: Dumping command log\n",
  125. esp->host->unique_id);
  126. do {
  127. struct esp_event_ent *p = &esp->esp_event_log[idx];
  128. printk(KERN_INFO PFX "esp%d: ent[%d] %s ",
  129. esp->host->unique_id, idx,
  130. p->type == ESP_EVENT_TYPE_CMD ? "CMD" : "EVENT");
  131. printk("val[%02x] sreg[%02x] seqreg[%02x] "
  132. "sreg2[%02x] ireg[%02x] ss[%02x] event[%02x]\n",
  133. p->val, p->sreg, p->seqreg,
  134. p->sreg2, p->ireg, p->select_state, p->event);
  135. idx = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  136. } while (idx != stop);
  137. }
  138. static void esp_flush_fifo(struct esp *esp)
  139. {
  140. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  141. if (esp->rev == ESP236) {
  142. int lim = 1000;
  143. while (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES) {
  144. if (--lim == 0) {
  145. printk(KERN_ALERT PFX "esp%d: ESP_FF_BYTES "
  146. "will not clear!\n",
  147. esp->host->unique_id);
  148. break;
  149. }
  150. udelay(1);
  151. }
  152. }
  153. }
  154. static void hme_read_fifo(struct esp *esp)
  155. {
  156. int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  157. int idx = 0;
  158. while (fcnt--) {
  159. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  160. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  161. }
  162. if (esp->sreg2 & ESP_STAT2_F1BYTE) {
  163. esp_write8(0, ESP_FDATA);
  164. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  165. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  166. }
  167. esp->fifo_cnt = idx;
  168. }
  169. static void esp_set_all_config3(struct esp *esp, u8 val)
  170. {
  171. int i;
  172. for (i = 0; i < ESP_MAX_TARGET; i++)
  173. esp->target[i].esp_config3 = val;
  174. }
  175. /* Reset the ESP chip, _not_ the SCSI bus. */
  176. static void esp_reset_esp(struct esp *esp)
  177. {
  178. u8 family_code, version;
  179. /* Now reset the ESP chip */
  180. scsi_esp_cmd(esp, ESP_CMD_RC);
  181. scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  182. scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  183. /* Reload the configuration registers */
  184. esp_write8(esp->cfact, ESP_CFACT);
  185. esp->prev_stp = 0;
  186. esp_write8(esp->prev_stp, ESP_STP);
  187. esp->prev_soff = 0;
  188. esp_write8(esp->prev_soff, ESP_SOFF);
  189. esp_write8(esp->neg_defp, ESP_TIMEO);
  190. /* This is the only point at which it is reliable to read
  191. * the ID-code for a fast ESP chip variants.
  192. */
  193. esp->max_period = ((35 * esp->ccycle) / 1000);
  194. if (esp->rev == FAST) {
  195. version = esp_read8(ESP_UID);
  196. family_code = (version & 0xf8) >> 3;
  197. if (family_code == 0x02)
  198. esp->rev = FAS236;
  199. else if (family_code == 0x0a)
  200. esp->rev = FASHME; /* Version is usually '5'. */
  201. else
  202. esp->rev = FAS100A;
  203. esp->min_period = ((4 * esp->ccycle) / 1000);
  204. } else {
  205. esp->min_period = ((5 * esp->ccycle) / 1000);
  206. }
  207. esp->max_period = (esp->max_period + 3)>>2;
  208. esp->min_period = (esp->min_period + 3)>>2;
  209. esp_write8(esp->config1, ESP_CFG1);
  210. switch (esp->rev) {
  211. case ESP100:
  212. /* nothing to do */
  213. break;
  214. case ESP100A:
  215. esp_write8(esp->config2, ESP_CFG2);
  216. break;
  217. case ESP236:
  218. /* Slow 236 */
  219. esp_write8(esp->config2, ESP_CFG2);
  220. esp->prev_cfg3 = esp->target[0].esp_config3;
  221. esp_write8(esp->prev_cfg3, ESP_CFG3);
  222. break;
  223. case FASHME:
  224. esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
  225. /* fallthrough... */
  226. case FAS236:
  227. /* Fast 236 or HME */
  228. esp_write8(esp->config2, ESP_CFG2);
  229. if (esp->rev == FASHME) {
  230. u8 cfg3 = esp->target[0].esp_config3;
  231. cfg3 |= ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
  232. if (esp->scsi_id >= 8)
  233. cfg3 |= ESP_CONFIG3_IDBIT3;
  234. esp_set_all_config3(esp, cfg3);
  235. } else {
  236. u32 cfg3 = esp->target[0].esp_config3;
  237. cfg3 |= ESP_CONFIG3_FCLK;
  238. esp_set_all_config3(esp, cfg3);
  239. }
  240. esp->prev_cfg3 = esp->target[0].esp_config3;
  241. esp_write8(esp->prev_cfg3, ESP_CFG3);
  242. if (esp->rev == FASHME) {
  243. esp->radelay = 80;
  244. } else {
  245. if (esp->flags & ESP_FLAG_DIFFERENTIAL)
  246. esp->radelay = 0;
  247. else
  248. esp->radelay = 96;
  249. }
  250. break;
  251. case FAS100A:
  252. /* Fast 100a */
  253. esp_write8(esp->config2, ESP_CFG2);
  254. esp_set_all_config3(esp,
  255. (esp->target[0].esp_config3 |
  256. ESP_CONFIG3_FCLOCK));
  257. esp->prev_cfg3 = esp->target[0].esp_config3;
  258. esp_write8(esp->prev_cfg3, ESP_CFG3);
  259. esp->radelay = 32;
  260. break;
  261. default:
  262. break;
  263. }
  264. /* Eat any bitrot in the chip */
  265. esp_read8(ESP_INTRPT);
  266. udelay(100);
  267. }
  268. static void esp_map_dma(struct esp *esp, struct scsi_cmnd *cmd)
  269. {
  270. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  271. struct scatterlist *sg = cmd->request_buffer;
  272. int dir = cmd->sc_data_direction;
  273. int total, i;
  274. if (dir == DMA_NONE)
  275. return;
  276. BUG_ON(cmd->use_sg == 0);
  277. spriv->u.num_sg = esp->ops->map_sg(esp, sg,
  278. cmd->use_sg, dir);
  279. spriv->cur_residue = sg_dma_len(sg);
  280. spriv->cur_sg = sg;
  281. total = 0;
  282. for (i = 0; i < spriv->u.num_sg; i++)
  283. total += sg_dma_len(&sg[i]);
  284. spriv->tot_residue = total;
  285. }
  286. static dma_addr_t esp_cur_dma_addr(struct esp_cmd_entry *ent,
  287. struct scsi_cmnd *cmd)
  288. {
  289. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  290. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  291. return ent->sense_dma +
  292. (ent->sense_ptr - cmd->sense_buffer);
  293. }
  294. return sg_dma_address(p->cur_sg) +
  295. (sg_dma_len(p->cur_sg) -
  296. p->cur_residue);
  297. }
  298. static unsigned int esp_cur_dma_len(struct esp_cmd_entry *ent,
  299. struct scsi_cmnd *cmd)
  300. {
  301. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  302. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  303. return SCSI_SENSE_BUFFERSIZE -
  304. (ent->sense_ptr - cmd->sense_buffer);
  305. }
  306. return p->cur_residue;
  307. }
  308. static void esp_advance_dma(struct esp *esp, struct esp_cmd_entry *ent,
  309. struct scsi_cmnd *cmd, unsigned int len)
  310. {
  311. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  312. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  313. ent->sense_ptr += len;
  314. return;
  315. }
  316. p->cur_residue -= len;
  317. p->tot_residue -= len;
  318. if (p->cur_residue < 0 || p->tot_residue < 0) {
  319. printk(KERN_ERR PFX "esp%d: Data transfer overflow.\n",
  320. esp->host->unique_id);
  321. printk(KERN_ERR PFX "esp%d: cur_residue[%d] tot_residue[%d] "
  322. "len[%u]\n",
  323. esp->host->unique_id,
  324. p->cur_residue, p->tot_residue, len);
  325. p->cur_residue = 0;
  326. p->tot_residue = 0;
  327. }
  328. if (!p->cur_residue && p->tot_residue) {
  329. p->cur_sg++;
  330. p->cur_residue = sg_dma_len(p->cur_sg);
  331. }
  332. }
  333. static void esp_unmap_dma(struct esp *esp, struct scsi_cmnd *cmd)
  334. {
  335. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  336. int dir = cmd->sc_data_direction;
  337. if (dir == DMA_NONE)
  338. return;
  339. esp->ops->unmap_sg(esp, cmd->request_buffer,
  340. spriv->u.num_sg, dir);
  341. }
  342. static void esp_save_pointers(struct esp *esp, struct esp_cmd_entry *ent)
  343. {
  344. struct scsi_cmnd *cmd = ent->cmd;
  345. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  346. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  347. ent->saved_sense_ptr = ent->sense_ptr;
  348. return;
  349. }
  350. ent->saved_cur_residue = spriv->cur_residue;
  351. ent->saved_cur_sg = spriv->cur_sg;
  352. ent->saved_tot_residue = spriv->tot_residue;
  353. }
  354. static void esp_restore_pointers(struct esp *esp, struct esp_cmd_entry *ent)
  355. {
  356. struct scsi_cmnd *cmd = ent->cmd;
  357. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  358. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  359. ent->sense_ptr = ent->saved_sense_ptr;
  360. return;
  361. }
  362. spriv->cur_residue = ent->saved_cur_residue;
  363. spriv->cur_sg = ent->saved_cur_sg;
  364. spriv->tot_residue = ent->saved_tot_residue;
  365. }
  366. static void esp_check_command_len(struct esp *esp, struct scsi_cmnd *cmd)
  367. {
  368. if (cmd->cmd_len == 6 ||
  369. cmd->cmd_len == 10 ||
  370. cmd->cmd_len == 12) {
  371. esp->flags &= ~ESP_FLAG_DOING_SLOWCMD;
  372. } else {
  373. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  374. }
  375. }
  376. static void esp_write_tgt_config3(struct esp *esp, int tgt)
  377. {
  378. if (esp->rev > ESP100A) {
  379. u8 val = esp->target[tgt].esp_config3;
  380. if (val != esp->prev_cfg3) {
  381. esp->prev_cfg3 = val;
  382. esp_write8(val, ESP_CFG3);
  383. }
  384. }
  385. }
  386. static void esp_write_tgt_sync(struct esp *esp, int tgt)
  387. {
  388. u8 off = esp->target[tgt].esp_offset;
  389. u8 per = esp->target[tgt].esp_period;
  390. if (off != esp->prev_soff) {
  391. esp->prev_soff = off;
  392. esp_write8(off, ESP_SOFF);
  393. }
  394. if (per != esp->prev_stp) {
  395. esp->prev_stp = per;
  396. esp_write8(per, ESP_STP);
  397. }
  398. }
  399. static u32 esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
  400. {
  401. if (esp->rev == FASHME) {
  402. /* Arbitrary segment boundaries, 24-bit counts. */
  403. if (dma_len > (1U << 24))
  404. dma_len = (1U << 24);
  405. } else {
  406. u32 base, end;
  407. /* ESP chip limits other variants by 16-bits of transfer
  408. * count. Actually on FAS100A and FAS236 we could get
  409. * 24-bits of transfer count by enabling ESP_CONFIG2_FENAB
  410. * in the ESP_CFG2 register but that causes other unwanted
  411. * changes so we don't use it currently.
  412. */
  413. if (dma_len > (1U << 16))
  414. dma_len = (1U << 16);
  415. /* All of the DMA variants hooked up to these chips
  416. * cannot handle crossing a 24-bit address boundary.
  417. */
  418. base = dma_addr & ((1U << 24) - 1U);
  419. end = base + dma_len;
  420. if (end > (1U << 24))
  421. end = (1U <<24);
  422. dma_len = end - base;
  423. }
  424. return dma_len;
  425. }
  426. static int esp_need_to_nego_wide(struct esp_target_data *tp)
  427. {
  428. struct scsi_target *target = tp->starget;
  429. return spi_width(target) != tp->nego_goal_width;
  430. }
  431. static int esp_need_to_nego_sync(struct esp_target_data *tp)
  432. {
  433. struct scsi_target *target = tp->starget;
  434. /* When offset is zero, period is "don't care". */
  435. if (!spi_offset(target) && !tp->nego_goal_offset)
  436. return 0;
  437. if (spi_offset(target) == tp->nego_goal_offset &&
  438. spi_period(target) == tp->nego_goal_period)
  439. return 0;
  440. return 1;
  441. }
  442. static int esp_alloc_lun_tag(struct esp_cmd_entry *ent,
  443. struct esp_lun_data *lp)
  444. {
  445. if (!ent->tag[0]) {
  446. /* Non-tagged, slot already taken? */
  447. if (lp->non_tagged_cmd)
  448. return -EBUSY;
  449. if (lp->hold) {
  450. /* We are being held by active tagged
  451. * commands.
  452. */
  453. if (lp->num_tagged)
  454. return -EBUSY;
  455. /* Tagged commands completed, we can unplug
  456. * the queue and run this untagged command.
  457. */
  458. lp->hold = 0;
  459. } else if (lp->num_tagged) {
  460. /* Plug the queue until num_tagged decreases
  461. * to zero in esp_free_lun_tag.
  462. */
  463. lp->hold = 1;
  464. return -EBUSY;
  465. }
  466. lp->non_tagged_cmd = ent;
  467. return 0;
  468. } else {
  469. /* Tagged command, see if blocked by a
  470. * non-tagged one.
  471. */
  472. if (lp->non_tagged_cmd || lp->hold)
  473. return -EBUSY;
  474. }
  475. BUG_ON(lp->tagged_cmds[ent->tag[1]]);
  476. lp->tagged_cmds[ent->tag[1]] = ent;
  477. lp->num_tagged++;
  478. return 0;
  479. }
  480. static void esp_free_lun_tag(struct esp_cmd_entry *ent,
  481. struct esp_lun_data *lp)
  482. {
  483. if (ent->tag[0]) {
  484. BUG_ON(lp->tagged_cmds[ent->tag[1]] != ent);
  485. lp->tagged_cmds[ent->tag[1]] = NULL;
  486. lp->num_tagged--;
  487. } else {
  488. BUG_ON(lp->non_tagged_cmd != ent);
  489. lp->non_tagged_cmd = NULL;
  490. }
  491. }
  492. /* When a contingent allegiance conditon is created, we force feed a
  493. * REQUEST_SENSE command to the device to fetch the sense data. I
  494. * tried many other schemes, relying on the scsi error handling layer
  495. * to send out the REQUEST_SENSE automatically, but this was difficult
  496. * to get right especially in the presence of applications like smartd
  497. * which use SG_IO to send out their own REQUEST_SENSE commands.
  498. */
  499. static void esp_autosense(struct esp *esp, struct esp_cmd_entry *ent)
  500. {
  501. struct scsi_cmnd *cmd = ent->cmd;
  502. struct scsi_device *dev = cmd->device;
  503. int tgt, lun;
  504. u8 *p, val;
  505. tgt = dev->id;
  506. lun = dev->lun;
  507. if (!ent->sense_ptr) {
  508. esp_log_autosense("esp%d: Doing auto-sense for "
  509. "tgt[%d] lun[%d]\n",
  510. esp->host->unique_id, tgt, lun);
  511. ent->sense_ptr = cmd->sense_buffer;
  512. ent->sense_dma = esp->ops->map_single(esp,
  513. ent->sense_ptr,
  514. SCSI_SENSE_BUFFERSIZE,
  515. DMA_FROM_DEVICE);
  516. }
  517. ent->saved_sense_ptr = ent->sense_ptr;
  518. esp->active_cmd = ent;
  519. p = esp->command_block;
  520. esp->msg_out_len = 0;
  521. *p++ = IDENTIFY(0, lun);
  522. *p++ = REQUEST_SENSE;
  523. *p++ = ((dev->scsi_level <= SCSI_2) ?
  524. (lun << 5) : 0);
  525. *p++ = 0;
  526. *p++ = 0;
  527. *p++ = SCSI_SENSE_BUFFERSIZE;
  528. *p++ = 0;
  529. esp->select_state = ESP_SELECT_BASIC;
  530. val = tgt;
  531. if (esp->rev == FASHME)
  532. val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
  533. esp_write8(val, ESP_BUSID);
  534. esp_write_tgt_sync(esp, tgt);
  535. esp_write_tgt_config3(esp, tgt);
  536. val = (p - esp->command_block);
  537. if (esp->rev == FASHME)
  538. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  539. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  540. val, 16, 0, ESP_CMD_DMA | ESP_CMD_SELA);
  541. }
  542. static struct esp_cmd_entry *find_and_prep_issuable_command(struct esp *esp)
  543. {
  544. struct esp_cmd_entry *ent;
  545. list_for_each_entry(ent, &esp->queued_cmds, list) {
  546. struct scsi_cmnd *cmd = ent->cmd;
  547. struct scsi_device *dev = cmd->device;
  548. struct esp_lun_data *lp = dev->hostdata;
  549. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  550. ent->tag[0] = 0;
  551. ent->tag[1] = 0;
  552. return ent;
  553. }
  554. if (!scsi_populate_tag_msg(cmd, &ent->tag[0])) {
  555. ent->tag[0] = 0;
  556. ent->tag[1] = 0;
  557. }
  558. if (esp_alloc_lun_tag(ent, lp) < 0)
  559. continue;
  560. return ent;
  561. }
  562. return NULL;
  563. }
  564. static void esp_maybe_execute_command(struct esp *esp)
  565. {
  566. struct esp_target_data *tp;
  567. struct esp_lun_data *lp;
  568. struct scsi_device *dev;
  569. struct scsi_cmnd *cmd;
  570. struct esp_cmd_entry *ent;
  571. int tgt, lun, i;
  572. u32 val, start_cmd;
  573. u8 *p;
  574. if (esp->active_cmd ||
  575. (esp->flags & ESP_FLAG_RESETTING))
  576. return;
  577. ent = find_and_prep_issuable_command(esp);
  578. if (!ent)
  579. return;
  580. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  581. esp_autosense(esp, ent);
  582. return;
  583. }
  584. cmd = ent->cmd;
  585. dev = cmd->device;
  586. tgt = dev->id;
  587. lun = dev->lun;
  588. tp = &esp->target[tgt];
  589. lp = dev->hostdata;
  590. list_del(&ent->list);
  591. list_add(&ent->list, &esp->active_cmds);
  592. esp->active_cmd = ent;
  593. esp_map_dma(esp, cmd);
  594. esp_save_pointers(esp, ent);
  595. esp_check_command_len(esp, cmd);
  596. p = esp->command_block;
  597. esp->msg_out_len = 0;
  598. if (tp->flags & ESP_TGT_CHECK_NEGO) {
  599. /* Need to negotiate. If the target is broken
  600. * go for synchronous transfers and non-wide.
  601. */
  602. if (tp->flags & ESP_TGT_BROKEN) {
  603. tp->flags &= ~ESP_TGT_DISCONNECT;
  604. tp->nego_goal_period = 0;
  605. tp->nego_goal_offset = 0;
  606. tp->nego_goal_width = 0;
  607. tp->nego_goal_tags = 0;
  608. }
  609. /* If the settings are not changing, skip this. */
  610. if (spi_width(tp->starget) == tp->nego_goal_width &&
  611. spi_period(tp->starget) == tp->nego_goal_period &&
  612. spi_offset(tp->starget) == tp->nego_goal_offset) {
  613. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  614. goto build_identify;
  615. }
  616. if (esp->rev == FASHME && esp_need_to_nego_wide(tp)) {
  617. esp->msg_out_len =
  618. spi_populate_width_msg(&esp->msg_out[0],
  619. (tp->nego_goal_width ?
  620. 1 : 0));
  621. tp->flags |= ESP_TGT_NEGO_WIDE;
  622. } else if (esp_need_to_nego_sync(tp)) {
  623. esp->msg_out_len =
  624. spi_populate_sync_msg(&esp->msg_out[0],
  625. tp->nego_goal_period,
  626. tp->nego_goal_offset);
  627. tp->flags |= ESP_TGT_NEGO_SYNC;
  628. } else {
  629. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  630. }
  631. /* Process it like a slow command. */
  632. if (tp->flags & (ESP_TGT_NEGO_WIDE | ESP_TGT_NEGO_SYNC))
  633. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  634. }
  635. build_identify:
  636. /* If we don't have a lun-data struct yet, we're probing
  637. * so do not disconnect. Also, do not disconnect unless
  638. * we have a tag on this command.
  639. */
  640. if (lp && (tp->flags & ESP_TGT_DISCONNECT) && ent->tag[0])
  641. *p++ = IDENTIFY(1, lun);
  642. else
  643. *p++ = IDENTIFY(0, lun);
  644. if (ent->tag[0] && esp->rev == ESP100) {
  645. /* ESP100 lacks select w/atn3 command, use select
  646. * and stop instead.
  647. */
  648. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  649. }
  650. if (!(esp->flags & ESP_FLAG_DOING_SLOWCMD)) {
  651. start_cmd = ESP_CMD_DMA | ESP_CMD_SELA;
  652. if (ent->tag[0]) {
  653. *p++ = ent->tag[0];
  654. *p++ = ent->tag[1];
  655. start_cmd = ESP_CMD_DMA | ESP_CMD_SA3;
  656. }
  657. for (i = 0; i < cmd->cmd_len; i++)
  658. *p++ = cmd->cmnd[i];
  659. esp->select_state = ESP_SELECT_BASIC;
  660. } else {
  661. esp->cmd_bytes_left = cmd->cmd_len;
  662. esp->cmd_bytes_ptr = &cmd->cmnd[0];
  663. if (ent->tag[0]) {
  664. for (i = esp->msg_out_len - 1;
  665. i >= 0; i--)
  666. esp->msg_out[i + 2] = esp->msg_out[i];
  667. esp->msg_out[0] = ent->tag[0];
  668. esp->msg_out[1] = ent->tag[1];
  669. esp->msg_out_len += 2;
  670. }
  671. start_cmd = ESP_CMD_DMA | ESP_CMD_SELAS;
  672. esp->select_state = ESP_SELECT_MSGOUT;
  673. }
  674. val = tgt;
  675. if (esp->rev == FASHME)
  676. val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
  677. esp_write8(val, ESP_BUSID);
  678. esp_write_tgt_sync(esp, tgt);
  679. esp_write_tgt_config3(esp, tgt);
  680. val = (p - esp->command_block);
  681. if (esp_debug & ESP_DEBUG_SCSICMD) {
  682. printk("ESP: tgt[%d] lun[%d] scsi_cmd [ ", tgt, lun);
  683. for (i = 0; i < cmd->cmd_len; i++)
  684. printk("%02x ", cmd->cmnd[i]);
  685. printk("]\n");
  686. }
  687. if (esp->rev == FASHME)
  688. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  689. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  690. val, 16, 0, start_cmd);
  691. }
  692. static struct esp_cmd_entry *esp_get_ent(struct esp *esp)
  693. {
  694. struct list_head *head = &esp->esp_cmd_pool;
  695. struct esp_cmd_entry *ret;
  696. if (list_empty(head)) {
  697. ret = kzalloc(sizeof(struct esp_cmd_entry), GFP_ATOMIC);
  698. } else {
  699. ret = list_entry(head->next, struct esp_cmd_entry, list);
  700. list_del(&ret->list);
  701. memset(ret, 0, sizeof(*ret));
  702. }
  703. return ret;
  704. }
  705. static void esp_put_ent(struct esp *esp, struct esp_cmd_entry *ent)
  706. {
  707. list_add(&ent->list, &esp->esp_cmd_pool);
  708. }
  709. static void esp_cmd_is_done(struct esp *esp, struct esp_cmd_entry *ent,
  710. struct scsi_cmnd *cmd, unsigned int result)
  711. {
  712. struct scsi_device *dev = cmd->device;
  713. int tgt = dev->id;
  714. int lun = dev->lun;
  715. esp->active_cmd = NULL;
  716. esp_unmap_dma(esp, cmd);
  717. esp_free_lun_tag(ent, dev->hostdata);
  718. cmd->result = result;
  719. if (ent->eh_done) {
  720. complete(ent->eh_done);
  721. ent->eh_done = NULL;
  722. }
  723. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  724. esp->ops->unmap_single(esp, ent->sense_dma,
  725. SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
  726. ent->sense_ptr = NULL;
  727. /* Restore the message/status bytes to what we actually
  728. * saw originally. Also, report that we are providing
  729. * the sense data.
  730. */
  731. cmd->result = ((DRIVER_SENSE << 24) |
  732. (DID_OK << 16) |
  733. (COMMAND_COMPLETE << 8) |
  734. (SAM_STAT_CHECK_CONDITION << 0));
  735. ent->flags &= ~ESP_CMD_FLAG_AUTOSENSE;
  736. if (esp_debug & ESP_DEBUG_AUTOSENSE) {
  737. int i;
  738. printk("esp%d: tgt[%d] lun[%d] AUTO SENSE[ ",
  739. esp->host->unique_id, tgt, lun);
  740. for (i = 0; i < 18; i++)
  741. printk("%02x ", cmd->sense_buffer[i]);
  742. printk("]\n");
  743. }
  744. }
  745. cmd->scsi_done(cmd);
  746. list_del(&ent->list);
  747. esp_put_ent(esp, ent);
  748. esp_maybe_execute_command(esp);
  749. }
  750. static unsigned int compose_result(unsigned int status, unsigned int message,
  751. unsigned int driver_code)
  752. {
  753. return (status | (message << 8) | (driver_code << 16));
  754. }
  755. static void esp_event_queue_full(struct esp *esp, struct esp_cmd_entry *ent)
  756. {
  757. struct scsi_device *dev = ent->cmd->device;
  758. struct esp_lun_data *lp = dev->hostdata;
  759. scsi_track_queue_full(dev, lp->num_tagged - 1);
  760. }
  761. static int esp_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  762. {
  763. struct scsi_device *dev = cmd->device;
  764. struct esp *esp = host_to_esp(dev->host);
  765. struct esp_cmd_priv *spriv;
  766. struct esp_cmd_entry *ent;
  767. ent = esp_get_ent(esp);
  768. if (!ent)
  769. return SCSI_MLQUEUE_HOST_BUSY;
  770. ent->cmd = cmd;
  771. cmd->scsi_done = done;
  772. spriv = ESP_CMD_PRIV(cmd);
  773. spriv->u.dma_addr = ~(dma_addr_t)0x0;
  774. list_add_tail(&ent->list, &esp->queued_cmds);
  775. esp_maybe_execute_command(esp);
  776. return 0;
  777. }
  778. static int esp_check_gross_error(struct esp *esp)
  779. {
  780. if (esp->sreg & ESP_STAT_SPAM) {
  781. /* Gross Error, could be one of:
  782. * - top of fifo overwritten
  783. * - top of command register overwritten
  784. * - DMA programmed with wrong direction
  785. * - improper phase change
  786. */
  787. printk(KERN_ERR PFX "esp%d: Gross error sreg[%02x]\n",
  788. esp->host->unique_id, esp->sreg);
  789. /* XXX Reset the chip. XXX */
  790. return 1;
  791. }
  792. return 0;
  793. }
  794. static int esp_check_spur_intr(struct esp *esp)
  795. {
  796. switch (esp->rev) {
  797. case ESP100:
  798. case ESP100A:
  799. /* The interrupt pending bit of the status register cannot
  800. * be trusted on these revisions.
  801. */
  802. esp->sreg &= ~ESP_STAT_INTR;
  803. break;
  804. default:
  805. if (!(esp->sreg & ESP_STAT_INTR)) {
  806. esp->ireg = esp_read8(ESP_INTRPT);
  807. if (esp->ireg & ESP_INTR_SR)
  808. return 1;
  809. /* If the DMA is indicating interrupt pending and the
  810. * ESP is not, the only possibility is a DMA error.
  811. */
  812. if (!esp->ops->dma_error(esp)) {
  813. printk(KERN_ERR PFX "esp%d: Spurious irq, "
  814. "sreg=%x.\n",
  815. esp->host->unique_id, esp->sreg);
  816. return -1;
  817. }
  818. printk(KERN_ERR PFX "esp%d: DMA error\n",
  819. esp->host->unique_id);
  820. /* XXX Reset the chip. XXX */
  821. return -1;
  822. }
  823. break;
  824. }
  825. return 0;
  826. }
  827. static void esp_schedule_reset(struct esp *esp)
  828. {
  829. esp_log_reset("ESP: esp_schedule_reset() from %p\n",
  830. __builtin_return_address(0));
  831. esp->flags |= ESP_FLAG_RESETTING;
  832. esp_event(esp, ESP_EVENT_RESET);
  833. }
  834. /* In order to avoid having to add a special half-reconnected state
  835. * into the driver we just sit here and poll through the rest of
  836. * the reselection process to get the tag message bytes.
  837. */
  838. static struct esp_cmd_entry *esp_reconnect_with_tag(struct esp *esp,
  839. struct esp_lun_data *lp)
  840. {
  841. struct esp_cmd_entry *ent;
  842. int i;
  843. if (!lp->num_tagged) {
  844. printk(KERN_ERR PFX "esp%d: Reconnect w/num_tagged==0\n",
  845. esp->host->unique_id);
  846. return NULL;
  847. }
  848. esp_log_reconnect("ESP: reconnect tag, ");
  849. for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
  850. if (esp->ops->irq_pending(esp))
  851. break;
  852. }
  853. if (i == ESP_QUICKIRQ_LIMIT) {
  854. printk(KERN_ERR PFX "esp%d: Reconnect IRQ1 timeout\n",
  855. esp->host->unique_id);
  856. return NULL;
  857. }
  858. esp->sreg = esp_read8(ESP_STATUS);
  859. esp->ireg = esp_read8(ESP_INTRPT);
  860. esp_log_reconnect("IRQ(%d:%x:%x), ",
  861. i, esp->ireg, esp->sreg);
  862. if (esp->ireg & ESP_INTR_DC) {
  863. printk(KERN_ERR PFX "esp%d: Reconnect, got disconnect.\n",
  864. esp->host->unique_id);
  865. return NULL;
  866. }
  867. if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP) {
  868. printk(KERN_ERR PFX "esp%d: Reconnect, not MIP sreg[%02x].\n",
  869. esp->host->unique_id, esp->sreg);
  870. return NULL;
  871. }
  872. /* DMA in the tag bytes... */
  873. esp->command_block[0] = 0xff;
  874. esp->command_block[1] = 0xff;
  875. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  876. 2, 2, 1, ESP_CMD_DMA | ESP_CMD_TI);
  877. /* ACK the msssage. */
  878. scsi_esp_cmd(esp, ESP_CMD_MOK);
  879. for (i = 0; i < ESP_RESELECT_TAG_LIMIT; i++) {
  880. if (esp->ops->irq_pending(esp)) {
  881. esp->sreg = esp_read8(ESP_STATUS);
  882. esp->ireg = esp_read8(ESP_INTRPT);
  883. if (esp->ireg & ESP_INTR_FDONE)
  884. break;
  885. }
  886. udelay(1);
  887. }
  888. if (i == ESP_RESELECT_TAG_LIMIT) {
  889. printk(KERN_ERR PFX "esp%d: Reconnect IRQ2 timeout\n",
  890. esp->host->unique_id);
  891. return NULL;
  892. }
  893. esp->ops->dma_drain(esp);
  894. esp->ops->dma_invalidate(esp);
  895. esp_log_reconnect("IRQ2(%d:%x:%x) tag[%x:%x]\n",
  896. i, esp->ireg, esp->sreg,
  897. esp->command_block[0],
  898. esp->command_block[1]);
  899. if (esp->command_block[0] < SIMPLE_QUEUE_TAG ||
  900. esp->command_block[0] > ORDERED_QUEUE_TAG) {
  901. printk(KERN_ERR PFX "esp%d: Reconnect, bad tag "
  902. "type %02x.\n",
  903. esp->host->unique_id, esp->command_block[0]);
  904. return NULL;
  905. }
  906. ent = lp->tagged_cmds[esp->command_block[1]];
  907. if (!ent) {
  908. printk(KERN_ERR PFX "esp%d: Reconnect, no entry for "
  909. "tag %02x.\n",
  910. esp->host->unique_id, esp->command_block[1]);
  911. return NULL;
  912. }
  913. return ent;
  914. }
  915. static int esp_reconnect(struct esp *esp)
  916. {
  917. struct esp_cmd_entry *ent;
  918. struct esp_target_data *tp;
  919. struct esp_lun_data *lp;
  920. struct scsi_device *dev;
  921. int target, lun;
  922. BUG_ON(esp->active_cmd);
  923. if (esp->rev == FASHME) {
  924. /* FASHME puts the target and lun numbers directly
  925. * into the fifo.
  926. */
  927. target = esp->fifo[0];
  928. lun = esp->fifo[1] & 0x7;
  929. } else {
  930. u8 bits = esp_read8(ESP_FDATA);
  931. /* Older chips put the lun directly into the fifo, but
  932. * the target is given as a sample of the arbitration
  933. * lines on the bus at reselection time. So we should
  934. * see the ID of the ESP and the one reconnecting target
  935. * set in the bitmap.
  936. */
  937. if (!(bits & esp->scsi_id_mask))
  938. goto do_reset;
  939. bits &= ~esp->scsi_id_mask;
  940. if (!bits || (bits & (bits - 1)))
  941. goto do_reset;
  942. target = ffs(bits) - 1;
  943. lun = (esp_read8(ESP_FDATA) & 0x7);
  944. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  945. if (esp->rev == ESP100) {
  946. u8 ireg = esp_read8(ESP_INTRPT);
  947. /* This chip has a bug during reselection that can
  948. * cause a spurious illegal-command interrupt, which
  949. * we simply ACK here. Another possibility is a bus
  950. * reset so we must check for that.
  951. */
  952. if (ireg & ESP_INTR_SR)
  953. goto do_reset;
  954. }
  955. scsi_esp_cmd(esp, ESP_CMD_NULL);
  956. }
  957. esp_write_tgt_sync(esp, target);
  958. esp_write_tgt_config3(esp, target);
  959. scsi_esp_cmd(esp, ESP_CMD_MOK);
  960. if (esp->rev == FASHME)
  961. esp_write8(target | ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT,
  962. ESP_BUSID);
  963. tp = &esp->target[target];
  964. dev = __scsi_device_lookup_by_target(tp->starget, lun);
  965. if (!dev) {
  966. printk(KERN_ERR PFX "esp%d: Reconnect, no lp "
  967. "tgt[%u] lun[%u]\n",
  968. esp->host->unique_id, target, lun);
  969. goto do_reset;
  970. }
  971. lp = dev->hostdata;
  972. ent = lp->non_tagged_cmd;
  973. if (!ent) {
  974. ent = esp_reconnect_with_tag(esp, lp);
  975. if (!ent)
  976. goto do_reset;
  977. }
  978. esp->active_cmd = ent;
  979. if (ent->flags & ESP_CMD_FLAG_ABORT) {
  980. esp->msg_out[0] = ABORT_TASK_SET;
  981. esp->msg_out_len = 1;
  982. scsi_esp_cmd(esp, ESP_CMD_SATN);
  983. }
  984. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  985. esp_restore_pointers(esp, ent);
  986. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  987. return 1;
  988. do_reset:
  989. esp_schedule_reset(esp);
  990. return 0;
  991. }
  992. static int esp_finish_select(struct esp *esp)
  993. {
  994. struct esp_cmd_entry *ent;
  995. struct scsi_cmnd *cmd;
  996. u8 orig_select_state;
  997. orig_select_state = esp->select_state;
  998. /* No longer selecting. */
  999. esp->select_state = ESP_SELECT_NONE;
  1000. esp->seqreg = esp_read8(ESP_SSTEP) & ESP_STEP_VBITS;
  1001. ent = esp->active_cmd;
  1002. cmd = ent->cmd;
  1003. if (esp->ops->dma_error(esp)) {
  1004. /* If we see a DMA error during or as a result of selection,
  1005. * all bets are off.
  1006. */
  1007. esp_schedule_reset(esp);
  1008. esp_cmd_is_done(esp, ent, cmd, (DID_ERROR << 16));
  1009. return 0;
  1010. }
  1011. esp->ops->dma_invalidate(esp);
  1012. if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
  1013. struct esp_target_data *tp = &esp->target[cmd->device->id];
  1014. /* Carefully back out of the selection attempt. Release
  1015. * resources (such as DMA mapping & TAG) and reset state (such
  1016. * as message out and command delivery variables).
  1017. */
  1018. if (!(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
  1019. esp_unmap_dma(esp, cmd);
  1020. esp_free_lun_tag(ent, cmd->device->hostdata);
  1021. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_NEGO_WIDE);
  1022. esp->flags &= ~ESP_FLAG_DOING_SLOWCMD;
  1023. esp->cmd_bytes_ptr = NULL;
  1024. esp->cmd_bytes_left = 0;
  1025. } else {
  1026. esp->ops->unmap_single(esp, ent->sense_dma,
  1027. SCSI_SENSE_BUFFERSIZE,
  1028. DMA_FROM_DEVICE);
  1029. ent->sense_ptr = NULL;
  1030. }
  1031. /* Now that the state is unwound properly, put back onto
  1032. * the issue queue. This command is no longer active.
  1033. */
  1034. list_del(&ent->list);
  1035. list_add(&ent->list, &esp->queued_cmds);
  1036. esp->active_cmd = NULL;
  1037. /* Return value ignored by caller, it directly invokes
  1038. * esp_reconnect().
  1039. */
  1040. return 0;
  1041. }
  1042. if (esp->ireg == ESP_INTR_DC) {
  1043. struct scsi_device *dev = cmd->device;
  1044. /* Disconnect. Make sure we re-negotiate sync and
  1045. * wide parameters if this target starts responding
  1046. * again in the future.
  1047. */
  1048. esp->target[dev->id].flags |= ESP_TGT_CHECK_NEGO;
  1049. scsi_esp_cmd(esp, ESP_CMD_ESEL);
  1050. esp_cmd_is_done(esp, ent, cmd, (DID_BAD_TARGET << 16));
  1051. return 1;
  1052. }
  1053. if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
  1054. /* Selection successful. On pre-FAST chips we have
  1055. * to do a NOP and possibly clean out the FIFO.
  1056. */
  1057. if (esp->rev <= ESP236) {
  1058. int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  1059. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1060. if (!fcnt &&
  1061. (!esp->prev_soff ||
  1062. ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
  1063. esp_flush_fifo(esp);
  1064. }
  1065. /* If we are doing a slow command, negotiation, etc.
  1066. * we'll do the right thing as we transition to the
  1067. * next phase.
  1068. */
  1069. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1070. return 0;
  1071. }
  1072. printk("ESP: Unexpected selection completion ireg[%x].\n",
  1073. esp->ireg);
  1074. esp_schedule_reset(esp);
  1075. return 0;
  1076. }
  1077. static int esp_data_bytes_sent(struct esp *esp, struct esp_cmd_entry *ent,
  1078. struct scsi_cmnd *cmd)
  1079. {
  1080. int fifo_cnt, ecount, bytes_sent, flush_fifo;
  1081. fifo_cnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  1082. if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
  1083. fifo_cnt <<= 1;
  1084. ecount = 0;
  1085. if (!(esp->sreg & ESP_STAT_TCNT)) {
  1086. ecount = ((unsigned int)esp_read8(ESP_TCLOW) |
  1087. (((unsigned int)esp_read8(ESP_TCMED)) << 8));
  1088. if (esp->rev == FASHME)
  1089. ecount |= ((unsigned int)esp_read8(FAS_RLO)) << 16;
  1090. }
  1091. bytes_sent = esp->data_dma_len;
  1092. bytes_sent -= ecount;
  1093. if (!(ent->flags & ESP_CMD_FLAG_WRITE))
  1094. bytes_sent -= fifo_cnt;
  1095. flush_fifo = 0;
  1096. if (!esp->prev_soff) {
  1097. /* Synchronous data transfer, always flush fifo. */
  1098. flush_fifo = 1;
  1099. } else {
  1100. if (esp->rev == ESP100) {
  1101. u32 fflags, phase;
  1102. /* ESP100 has a chip bug where in the synchronous data
  1103. * phase it can mistake a final long REQ pulse from the
  1104. * target as an extra data byte. Fun.
  1105. *
  1106. * To detect this case we resample the status register
  1107. * and fifo flags. If we're still in a data phase and
  1108. * we see spurious chunks in the fifo, we return error
  1109. * to the caller which should reset and set things up
  1110. * such that we only try future transfers to this
  1111. * target in synchronous mode.
  1112. */
  1113. esp->sreg = esp_read8(ESP_STATUS);
  1114. phase = esp->sreg & ESP_STAT_PMASK;
  1115. fflags = esp_read8(ESP_FFLAGS);
  1116. if ((phase == ESP_DOP &&
  1117. (fflags & ESP_FF_ONOTZERO)) ||
  1118. (phase == ESP_DIP &&
  1119. (fflags & ESP_FF_FBYTES)))
  1120. return -1;
  1121. }
  1122. if (!(ent->flags & ESP_CMD_FLAG_WRITE))
  1123. flush_fifo = 1;
  1124. }
  1125. if (flush_fifo)
  1126. esp_flush_fifo(esp);
  1127. return bytes_sent;
  1128. }
  1129. static void esp_setsync(struct esp *esp, struct esp_target_data *tp,
  1130. u8 scsi_period, u8 scsi_offset,
  1131. u8 esp_stp, u8 esp_soff)
  1132. {
  1133. spi_period(tp->starget) = scsi_period;
  1134. spi_offset(tp->starget) = scsi_offset;
  1135. spi_width(tp->starget) = (tp->flags & ESP_TGT_WIDE) ? 1 : 0;
  1136. if (esp_soff) {
  1137. esp_stp &= 0x1f;
  1138. esp_soff |= esp->radelay;
  1139. if (esp->rev >= FAS236) {
  1140. u8 bit = ESP_CONFIG3_FSCSI;
  1141. if (esp->rev >= FAS100A)
  1142. bit = ESP_CONFIG3_FAST;
  1143. if (scsi_period < 50) {
  1144. if (esp->rev == FASHME)
  1145. esp_soff &= ~esp->radelay;
  1146. tp->esp_config3 |= bit;
  1147. } else {
  1148. tp->esp_config3 &= ~bit;
  1149. }
  1150. esp->prev_cfg3 = tp->esp_config3;
  1151. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1152. }
  1153. }
  1154. tp->esp_period = esp->prev_stp = esp_stp;
  1155. tp->esp_offset = esp->prev_soff = esp_soff;
  1156. esp_write8(esp_soff, ESP_SOFF);
  1157. esp_write8(esp_stp, ESP_STP);
  1158. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
  1159. spi_display_xfer_agreement(tp->starget);
  1160. }
  1161. static void esp_msgin_reject(struct esp *esp)
  1162. {
  1163. struct esp_cmd_entry *ent = esp->active_cmd;
  1164. struct scsi_cmnd *cmd = ent->cmd;
  1165. struct esp_target_data *tp;
  1166. int tgt;
  1167. tgt = cmd->device->id;
  1168. tp = &esp->target[tgt];
  1169. if (tp->flags & ESP_TGT_NEGO_WIDE) {
  1170. tp->flags &= ~(ESP_TGT_NEGO_WIDE | ESP_TGT_WIDE);
  1171. if (!esp_need_to_nego_sync(tp)) {
  1172. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  1173. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1174. } else {
  1175. esp->msg_out_len =
  1176. spi_populate_sync_msg(&esp->msg_out[0],
  1177. tp->nego_goal_period,
  1178. tp->nego_goal_offset);
  1179. tp->flags |= ESP_TGT_NEGO_SYNC;
  1180. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1181. }
  1182. return;
  1183. }
  1184. if (tp->flags & ESP_TGT_NEGO_SYNC) {
  1185. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
  1186. tp->esp_period = 0;
  1187. tp->esp_offset = 0;
  1188. esp_setsync(esp, tp, 0, 0, 0, 0);
  1189. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1190. return;
  1191. }
  1192. esp->msg_out[0] = ABORT_TASK_SET;
  1193. esp->msg_out_len = 1;
  1194. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1195. }
  1196. static void esp_msgin_sdtr(struct esp *esp, struct esp_target_data *tp)
  1197. {
  1198. u8 period = esp->msg_in[3];
  1199. u8 offset = esp->msg_in[4];
  1200. u8 stp;
  1201. if (!(tp->flags & ESP_TGT_NEGO_SYNC))
  1202. goto do_reject;
  1203. if (offset > 15)
  1204. goto do_reject;
  1205. if (offset) {
  1206. int rounded_up, one_clock;
  1207. if (period > esp->max_period) {
  1208. period = offset = 0;
  1209. goto do_sdtr;
  1210. }
  1211. if (period < esp->min_period)
  1212. goto do_reject;
  1213. one_clock = esp->ccycle / 1000;
  1214. rounded_up = (period << 2);
  1215. rounded_up = (rounded_up + one_clock - 1) / one_clock;
  1216. stp = rounded_up;
  1217. if (stp && esp->rev >= FAS236) {
  1218. if (stp >= 50)
  1219. stp--;
  1220. }
  1221. } else {
  1222. stp = 0;
  1223. }
  1224. esp_setsync(esp, tp, period, offset, stp, offset);
  1225. return;
  1226. do_reject:
  1227. esp->msg_out[0] = MESSAGE_REJECT;
  1228. esp->msg_out_len = 1;
  1229. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1230. return;
  1231. do_sdtr:
  1232. tp->nego_goal_period = period;
  1233. tp->nego_goal_offset = offset;
  1234. esp->msg_out_len =
  1235. spi_populate_sync_msg(&esp->msg_out[0],
  1236. tp->nego_goal_period,
  1237. tp->nego_goal_offset);
  1238. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1239. }
  1240. static void esp_msgin_wdtr(struct esp *esp, struct esp_target_data *tp)
  1241. {
  1242. int size = 8 << esp->msg_in[3];
  1243. u8 cfg3;
  1244. if (esp->rev != FASHME)
  1245. goto do_reject;
  1246. if (size != 8 && size != 16)
  1247. goto do_reject;
  1248. if (!(tp->flags & ESP_TGT_NEGO_WIDE))
  1249. goto do_reject;
  1250. cfg3 = tp->esp_config3;
  1251. if (size == 16) {
  1252. tp->flags |= ESP_TGT_WIDE;
  1253. cfg3 |= ESP_CONFIG3_EWIDE;
  1254. } else {
  1255. tp->flags &= ~ESP_TGT_WIDE;
  1256. cfg3 &= ~ESP_CONFIG3_EWIDE;
  1257. }
  1258. tp->esp_config3 = cfg3;
  1259. esp->prev_cfg3 = cfg3;
  1260. esp_write8(cfg3, ESP_CFG3);
  1261. tp->flags &= ~ESP_TGT_NEGO_WIDE;
  1262. spi_period(tp->starget) = 0;
  1263. spi_offset(tp->starget) = 0;
  1264. if (!esp_need_to_nego_sync(tp)) {
  1265. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  1266. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1267. } else {
  1268. esp->msg_out_len =
  1269. spi_populate_sync_msg(&esp->msg_out[0],
  1270. tp->nego_goal_period,
  1271. tp->nego_goal_offset);
  1272. tp->flags |= ESP_TGT_NEGO_SYNC;
  1273. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1274. }
  1275. return;
  1276. do_reject:
  1277. esp->msg_out[0] = MESSAGE_REJECT;
  1278. esp->msg_out_len = 1;
  1279. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1280. }
  1281. static void esp_msgin_extended(struct esp *esp)
  1282. {
  1283. struct esp_cmd_entry *ent = esp->active_cmd;
  1284. struct scsi_cmnd *cmd = ent->cmd;
  1285. struct esp_target_data *tp;
  1286. int tgt = cmd->device->id;
  1287. tp = &esp->target[tgt];
  1288. if (esp->msg_in[2] == EXTENDED_SDTR) {
  1289. esp_msgin_sdtr(esp, tp);
  1290. return;
  1291. }
  1292. if (esp->msg_in[2] == EXTENDED_WDTR) {
  1293. esp_msgin_wdtr(esp, tp);
  1294. return;
  1295. }
  1296. printk("ESP: Unexpected extended msg type %x\n",
  1297. esp->msg_in[2]);
  1298. esp->msg_out[0] = ABORT_TASK_SET;
  1299. esp->msg_out_len = 1;
  1300. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1301. }
  1302. /* Analyze msgin bytes received from target so far. Return non-zero
  1303. * if there are more bytes needed to complete the message.
  1304. */
  1305. static int esp_msgin_process(struct esp *esp)
  1306. {
  1307. u8 msg0 = esp->msg_in[0];
  1308. int len = esp->msg_in_len;
  1309. if (msg0 & 0x80) {
  1310. /* Identify */
  1311. printk("ESP: Unexpected msgin identify\n");
  1312. return 0;
  1313. }
  1314. switch (msg0) {
  1315. case EXTENDED_MESSAGE:
  1316. if (len == 1)
  1317. return 1;
  1318. if (len < esp->msg_in[1] + 2)
  1319. return 1;
  1320. esp_msgin_extended(esp);
  1321. return 0;
  1322. case IGNORE_WIDE_RESIDUE: {
  1323. struct esp_cmd_entry *ent;
  1324. struct esp_cmd_priv *spriv;
  1325. if (len == 1)
  1326. return 1;
  1327. if (esp->msg_in[1] != 1)
  1328. goto do_reject;
  1329. ent = esp->active_cmd;
  1330. spriv = ESP_CMD_PRIV(ent->cmd);
  1331. if (spriv->cur_residue == sg_dma_len(spriv->cur_sg)) {
  1332. spriv->cur_sg--;
  1333. spriv->cur_residue = 1;
  1334. } else
  1335. spriv->cur_residue++;
  1336. spriv->tot_residue++;
  1337. return 0;
  1338. }
  1339. case NOP:
  1340. return 0;
  1341. case RESTORE_POINTERS:
  1342. esp_restore_pointers(esp, esp->active_cmd);
  1343. return 0;
  1344. case SAVE_POINTERS:
  1345. esp_save_pointers(esp, esp->active_cmd);
  1346. return 0;
  1347. case COMMAND_COMPLETE:
  1348. case DISCONNECT: {
  1349. struct esp_cmd_entry *ent = esp->active_cmd;
  1350. ent->message = msg0;
  1351. esp_event(esp, ESP_EVENT_FREE_BUS);
  1352. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1353. return 0;
  1354. }
  1355. case MESSAGE_REJECT:
  1356. esp_msgin_reject(esp);
  1357. return 0;
  1358. default:
  1359. do_reject:
  1360. esp->msg_out[0] = MESSAGE_REJECT;
  1361. esp->msg_out_len = 1;
  1362. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1363. return 0;
  1364. }
  1365. }
  1366. static int esp_process_event(struct esp *esp)
  1367. {
  1368. int write;
  1369. again:
  1370. write = 0;
  1371. switch (esp->event) {
  1372. case ESP_EVENT_CHECK_PHASE:
  1373. switch (esp->sreg & ESP_STAT_PMASK) {
  1374. case ESP_DOP:
  1375. esp_event(esp, ESP_EVENT_DATA_OUT);
  1376. break;
  1377. case ESP_DIP:
  1378. esp_event(esp, ESP_EVENT_DATA_IN);
  1379. break;
  1380. case ESP_STATP:
  1381. esp_flush_fifo(esp);
  1382. scsi_esp_cmd(esp, ESP_CMD_ICCSEQ);
  1383. esp_event(esp, ESP_EVENT_STATUS);
  1384. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1385. return 1;
  1386. case ESP_MOP:
  1387. esp_event(esp, ESP_EVENT_MSGOUT);
  1388. break;
  1389. case ESP_MIP:
  1390. esp_event(esp, ESP_EVENT_MSGIN);
  1391. break;
  1392. case ESP_CMDP:
  1393. esp_event(esp, ESP_EVENT_CMD_START);
  1394. break;
  1395. default:
  1396. printk("ESP: Unexpected phase, sreg=%02x\n",
  1397. esp->sreg);
  1398. esp_schedule_reset(esp);
  1399. return 0;
  1400. }
  1401. goto again;
  1402. break;
  1403. case ESP_EVENT_DATA_IN:
  1404. write = 1;
  1405. /* fallthru */
  1406. case ESP_EVENT_DATA_OUT: {
  1407. struct esp_cmd_entry *ent = esp->active_cmd;
  1408. struct scsi_cmnd *cmd = ent->cmd;
  1409. dma_addr_t dma_addr = esp_cur_dma_addr(ent, cmd);
  1410. unsigned int dma_len = esp_cur_dma_len(ent, cmd);
  1411. if (esp->rev == ESP100)
  1412. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1413. if (write)
  1414. ent->flags |= ESP_CMD_FLAG_WRITE;
  1415. else
  1416. ent->flags &= ~ESP_CMD_FLAG_WRITE;
  1417. dma_len = esp_dma_length_limit(esp, dma_addr, dma_len);
  1418. esp->data_dma_len = dma_len;
  1419. if (!dma_len) {
  1420. printk(KERN_ERR PFX "esp%d: DMA length is zero!\n",
  1421. esp->host->unique_id);
  1422. printk(KERN_ERR PFX "esp%d: cur adr[%08llx] len[%08x]\n",
  1423. esp->host->unique_id,
  1424. (unsigned long long)esp_cur_dma_addr(ent, cmd),
  1425. esp_cur_dma_len(ent, cmd));
  1426. esp_schedule_reset(esp);
  1427. return 0;
  1428. }
  1429. esp_log_datastart("ESP: start data addr[%08llx] len[%u] "
  1430. "write(%d)\n",
  1431. (unsigned long long)dma_addr, dma_len, write);
  1432. esp->ops->send_dma_cmd(esp, dma_addr, dma_len, dma_len,
  1433. write, ESP_CMD_DMA | ESP_CMD_TI);
  1434. esp_event(esp, ESP_EVENT_DATA_DONE);
  1435. break;
  1436. }
  1437. case ESP_EVENT_DATA_DONE: {
  1438. struct esp_cmd_entry *ent = esp->active_cmd;
  1439. struct scsi_cmnd *cmd = ent->cmd;
  1440. int bytes_sent;
  1441. if (esp->ops->dma_error(esp)) {
  1442. printk("ESP: data done, DMA error, resetting\n");
  1443. esp_schedule_reset(esp);
  1444. return 0;
  1445. }
  1446. if (ent->flags & ESP_CMD_FLAG_WRITE) {
  1447. /* XXX parity errors, etc. XXX */
  1448. esp->ops->dma_drain(esp);
  1449. }
  1450. esp->ops->dma_invalidate(esp);
  1451. if (esp->ireg != ESP_INTR_BSERV) {
  1452. /* We should always see exactly a bus-service
  1453. * interrupt at the end of a successful transfer.
  1454. */
  1455. printk("ESP: data done, not BSERV, resetting\n");
  1456. esp_schedule_reset(esp);
  1457. return 0;
  1458. }
  1459. bytes_sent = esp_data_bytes_sent(esp, ent, cmd);
  1460. esp_log_datadone("ESP: data done flgs[%x] sent[%d]\n",
  1461. ent->flags, bytes_sent);
  1462. if (bytes_sent < 0) {
  1463. /* XXX force sync mode for this target XXX */
  1464. esp_schedule_reset(esp);
  1465. return 0;
  1466. }
  1467. esp_advance_dma(esp, ent, cmd, bytes_sent);
  1468. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1469. goto again;
  1470. break;
  1471. }
  1472. case ESP_EVENT_STATUS: {
  1473. struct esp_cmd_entry *ent = esp->active_cmd;
  1474. if (esp->ireg & ESP_INTR_FDONE) {
  1475. ent->status = esp_read8(ESP_FDATA);
  1476. ent->message = esp_read8(ESP_FDATA);
  1477. scsi_esp_cmd(esp, ESP_CMD_MOK);
  1478. } else if (esp->ireg == ESP_INTR_BSERV) {
  1479. ent->status = esp_read8(ESP_FDATA);
  1480. ent->message = 0xff;
  1481. esp_event(esp, ESP_EVENT_MSGIN);
  1482. return 0;
  1483. }
  1484. if (ent->message != COMMAND_COMPLETE) {
  1485. printk("ESP: Unexpected message %x in status\n",
  1486. ent->message);
  1487. esp_schedule_reset(esp);
  1488. return 0;
  1489. }
  1490. esp_event(esp, ESP_EVENT_FREE_BUS);
  1491. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1492. break;
  1493. }
  1494. case ESP_EVENT_FREE_BUS: {
  1495. struct esp_cmd_entry *ent = esp->active_cmd;
  1496. struct scsi_cmnd *cmd = ent->cmd;
  1497. if (ent->message == COMMAND_COMPLETE ||
  1498. ent->message == DISCONNECT)
  1499. scsi_esp_cmd(esp, ESP_CMD_ESEL);
  1500. if (ent->message == COMMAND_COMPLETE) {
  1501. esp_log_cmddone("ESP: Command done status[%x] "
  1502. "message[%x]\n",
  1503. ent->status, ent->message);
  1504. if (ent->status == SAM_STAT_TASK_SET_FULL)
  1505. esp_event_queue_full(esp, ent);
  1506. if (ent->status == SAM_STAT_CHECK_CONDITION &&
  1507. !(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
  1508. ent->flags |= ESP_CMD_FLAG_AUTOSENSE;
  1509. esp_autosense(esp, ent);
  1510. } else {
  1511. esp_cmd_is_done(esp, ent, cmd,
  1512. compose_result(ent->status,
  1513. ent->message,
  1514. DID_OK));
  1515. }
  1516. } else if (ent->message == DISCONNECT) {
  1517. esp_log_disconnect("ESP: Disconnecting tgt[%d] "
  1518. "tag[%x:%x]\n",
  1519. cmd->device->id,
  1520. ent->tag[0], ent->tag[1]);
  1521. esp->active_cmd = NULL;
  1522. esp_maybe_execute_command(esp);
  1523. } else {
  1524. printk("ESP: Unexpected message %x in freebus\n",
  1525. ent->message);
  1526. esp_schedule_reset(esp);
  1527. return 0;
  1528. }
  1529. if (esp->active_cmd)
  1530. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1531. break;
  1532. }
  1533. case ESP_EVENT_MSGOUT: {
  1534. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1535. if (esp_debug & ESP_DEBUG_MSGOUT) {
  1536. int i;
  1537. printk("ESP: Sending message [ ");
  1538. for (i = 0; i < esp->msg_out_len; i++)
  1539. printk("%02x ", esp->msg_out[i]);
  1540. printk("]\n");
  1541. }
  1542. if (esp->rev == FASHME) {
  1543. int i;
  1544. /* Always use the fifo. */
  1545. for (i = 0; i < esp->msg_out_len; i++) {
  1546. esp_write8(esp->msg_out[i], ESP_FDATA);
  1547. esp_write8(0, ESP_FDATA);
  1548. }
  1549. scsi_esp_cmd(esp, ESP_CMD_TI);
  1550. } else {
  1551. if (esp->msg_out_len == 1) {
  1552. esp_write8(esp->msg_out[0], ESP_FDATA);
  1553. scsi_esp_cmd(esp, ESP_CMD_TI);
  1554. } else {
  1555. /* Use DMA. */
  1556. memcpy(esp->command_block,
  1557. esp->msg_out,
  1558. esp->msg_out_len);
  1559. esp->ops->send_dma_cmd(esp,
  1560. esp->command_block_dma,
  1561. esp->msg_out_len,
  1562. esp->msg_out_len,
  1563. 0,
  1564. ESP_CMD_DMA|ESP_CMD_TI);
  1565. }
  1566. }
  1567. esp_event(esp, ESP_EVENT_MSGOUT_DONE);
  1568. break;
  1569. }
  1570. case ESP_EVENT_MSGOUT_DONE:
  1571. if (esp->rev == FASHME) {
  1572. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1573. } else {
  1574. if (esp->msg_out_len > 1)
  1575. esp->ops->dma_invalidate(esp);
  1576. }
  1577. if (!(esp->ireg & ESP_INTR_DC)) {
  1578. if (esp->rev != FASHME)
  1579. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1580. }
  1581. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1582. goto again;
  1583. case ESP_EVENT_MSGIN:
  1584. if (esp->ireg & ESP_INTR_BSERV) {
  1585. if (esp->rev == FASHME) {
  1586. if (!(esp_read8(ESP_STATUS2) &
  1587. ESP_STAT2_FEMPTY))
  1588. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1589. } else {
  1590. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1591. if (esp->rev == ESP100)
  1592. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1593. }
  1594. scsi_esp_cmd(esp, ESP_CMD_TI);
  1595. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1596. return 1;
  1597. }
  1598. if (esp->ireg & ESP_INTR_FDONE) {
  1599. u8 val;
  1600. if (esp->rev == FASHME)
  1601. val = esp->fifo[0];
  1602. else
  1603. val = esp_read8(ESP_FDATA);
  1604. esp->msg_in[esp->msg_in_len++] = val;
  1605. esp_log_msgin("ESP: Got msgin byte %x\n", val);
  1606. if (!esp_msgin_process(esp))
  1607. esp->msg_in_len = 0;
  1608. if (esp->rev == FASHME)
  1609. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1610. scsi_esp_cmd(esp, ESP_CMD_MOK);
  1611. if (esp->event != ESP_EVENT_FREE_BUS)
  1612. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1613. } else {
  1614. printk("ESP: MSGIN neither BSERV not FDON, resetting");
  1615. esp_schedule_reset(esp);
  1616. return 0;
  1617. }
  1618. break;
  1619. case ESP_EVENT_CMD_START:
  1620. memcpy(esp->command_block, esp->cmd_bytes_ptr,
  1621. esp->cmd_bytes_left);
  1622. if (esp->rev == FASHME)
  1623. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1624. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  1625. esp->cmd_bytes_left, 16, 0,
  1626. ESP_CMD_DMA | ESP_CMD_TI);
  1627. esp_event(esp, ESP_EVENT_CMD_DONE);
  1628. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1629. break;
  1630. case ESP_EVENT_CMD_DONE:
  1631. esp->ops->dma_invalidate(esp);
  1632. if (esp->ireg & ESP_INTR_BSERV) {
  1633. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1634. goto again;
  1635. }
  1636. esp_schedule_reset(esp);
  1637. return 0;
  1638. break;
  1639. case ESP_EVENT_RESET:
  1640. scsi_esp_cmd(esp, ESP_CMD_RS);
  1641. break;
  1642. default:
  1643. printk("ESP: Unexpected event %x, resetting\n",
  1644. esp->event);
  1645. esp_schedule_reset(esp);
  1646. return 0;
  1647. break;
  1648. }
  1649. return 1;
  1650. }
  1651. static void esp_reset_cleanup_one(struct esp *esp, struct esp_cmd_entry *ent)
  1652. {
  1653. struct scsi_cmnd *cmd = ent->cmd;
  1654. esp_unmap_dma(esp, cmd);
  1655. esp_free_lun_tag(ent, cmd->device->hostdata);
  1656. cmd->result = DID_RESET << 16;
  1657. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  1658. esp->ops->unmap_single(esp, ent->sense_dma,
  1659. SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
  1660. ent->sense_ptr = NULL;
  1661. }
  1662. cmd->scsi_done(cmd);
  1663. list_del(&ent->list);
  1664. esp_put_ent(esp, ent);
  1665. }
  1666. static void esp_clear_hold(struct scsi_device *dev, void *data)
  1667. {
  1668. struct esp_lun_data *lp = dev->hostdata;
  1669. BUG_ON(lp->num_tagged);
  1670. lp->hold = 0;
  1671. }
  1672. static void esp_reset_cleanup(struct esp *esp)
  1673. {
  1674. struct esp_cmd_entry *ent, *tmp;
  1675. int i;
  1676. list_for_each_entry_safe(ent, tmp, &esp->queued_cmds, list) {
  1677. struct scsi_cmnd *cmd = ent->cmd;
  1678. list_del(&ent->list);
  1679. cmd->result = DID_RESET << 16;
  1680. cmd->scsi_done(cmd);
  1681. esp_put_ent(esp, ent);
  1682. }
  1683. list_for_each_entry_safe(ent, tmp, &esp->active_cmds, list) {
  1684. if (ent == esp->active_cmd)
  1685. esp->active_cmd = NULL;
  1686. esp_reset_cleanup_one(esp, ent);
  1687. }
  1688. BUG_ON(esp->active_cmd != NULL);
  1689. /* Force renegotiation of sync/wide transfers. */
  1690. for (i = 0; i < ESP_MAX_TARGET; i++) {
  1691. struct esp_target_data *tp = &esp->target[i];
  1692. tp->esp_period = 0;
  1693. tp->esp_offset = 0;
  1694. tp->esp_config3 &= ~(ESP_CONFIG3_EWIDE |
  1695. ESP_CONFIG3_FSCSI |
  1696. ESP_CONFIG3_FAST);
  1697. tp->flags &= ~ESP_TGT_WIDE;
  1698. tp->flags |= ESP_TGT_CHECK_NEGO;
  1699. if (tp->starget)
  1700. starget_for_each_device(tp->starget, NULL,
  1701. esp_clear_hold);
  1702. }
  1703. esp->flags &= ~ESP_FLAG_RESETTING;
  1704. }
  1705. /* Runs under host->lock */
  1706. static void __esp_interrupt(struct esp *esp)
  1707. {
  1708. int finish_reset, intr_done;
  1709. u8 phase;
  1710. esp->sreg = esp_read8(ESP_STATUS);
  1711. if (esp->flags & ESP_FLAG_RESETTING) {
  1712. finish_reset = 1;
  1713. } else {
  1714. if (esp_check_gross_error(esp))
  1715. return;
  1716. finish_reset = esp_check_spur_intr(esp);
  1717. if (finish_reset < 0)
  1718. return;
  1719. }
  1720. esp->ireg = esp_read8(ESP_INTRPT);
  1721. if (esp->ireg & ESP_INTR_SR)
  1722. finish_reset = 1;
  1723. if (finish_reset) {
  1724. esp_reset_cleanup(esp);
  1725. if (esp->eh_reset) {
  1726. complete(esp->eh_reset);
  1727. esp->eh_reset = NULL;
  1728. }
  1729. return;
  1730. }
  1731. phase = (esp->sreg & ESP_STAT_PMASK);
  1732. if (esp->rev == FASHME) {
  1733. if (((phase != ESP_DIP && phase != ESP_DOP) &&
  1734. esp->select_state == ESP_SELECT_NONE &&
  1735. esp->event != ESP_EVENT_STATUS &&
  1736. esp->event != ESP_EVENT_DATA_DONE) ||
  1737. (esp->ireg & ESP_INTR_RSEL)) {
  1738. esp->sreg2 = esp_read8(ESP_STATUS2);
  1739. if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
  1740. (esp->sreg2 & ESP_STAT2_F1BYTE))
  1741. hme_read_fifo(esp);
  1742. }
  1743. }
  1744. esp_log_intr("ESP: intr sreg[%02x] seqreg[%02x] "
  1745. "sreg2[%02x] ireg[%02x]\n",
  1746. esp->sreg, esp->seqreg, esp->sreg2, esp->ireg);
  1747. intr_done = 0;
  1748. if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN | ESP_INTR_IC)) {
  1749. printk("ESP: unexpected IREG %02x\n", esp->ireg);
  1750. if (esp->ireg & ESP_INTR_IC)
  1751. esp_dump_cmd_log(esp);
  1752. esp_schedule_reset(esp);
  1753. } else {
  1754. if (!(esp->ireg & ESP_INTR_RSEL)) {
  1755. /* Some combination of FDONE, BSERV, DC. */
  1756. if (esp->select_state != ESP_SELECT_NONE)
  1757. intr_done = esp_finish_select(esp);
  1758. } else if (esp->ireg & ESP_INTR_RSEL) {
  1759. if (esp->active_cmd)
  1760. (void) esp_finish_select(esp);
  1761. intr_done = esp_reconnect(esp);
  1762. }
  1763. }
  1764. while (!intr_done)
  1765. intr_done = esp_process_event(esp);
  1766. }
  1767. irqreturn_t scsi_esp_intr(int irq, void *dev_id)
  1768. {
  1769. struct esp *esp = dev_id;
  1770. unsigned long flags;
  1771. irqreturn_t ret;
  1772. spin_lock_irqsave(esp->host->host_lock, flags);
  1773. ret = IRQ_NONE;
  1774. if (esp->ops->irq_pending(esp)) {
  1775. ret = IRQ_HANDLED;
  1776. for (;;) {
  1777. int i;
  1778. __esp_interrupt(esp);
  1779. if (!(esp->flags & ESP_FLAG_QUICKIRQ_CHECK))
  1780. break;
  1781. esp->flags &= ~ESP_FLAG_QUICKIRQ_CHECK;
  1782. for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
  1783. if (esp->ops->irq_pending(esp))
  1784. break;
  1785. }
  1786. if (i == ESP_QUICKIRQ_LIMIT)
  1787. break;
  1788. }
  1789. }
  1790. spin_unlock_irqrestore(esp->host->host_lock, flags);
  1791. return ret;
  1792. }
  1793. EXPORT_SYMBOL(scsi_esp_intr);
  1794. static void __devinit esp_get_revision(struct esp *esp)
  1795. {
  1796. u8 val;
  1797. esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
  1798. esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
  1799. esp_write8(esp->config2, ESP_CFG2);
  1800. val = esp_read8(ESP_CFG2);
  1801. val &= ~ESP_CONFIG2_MAGIC;
  1802. if (val != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
  1803. /* If what we write to cfg2 does not come back, cfg2 is not
  1804. * implemented, therefore this must be a plain esp100.
  1805. */
  1806. esp->rev = ESP100;
  1807. } else {
  1808. esp->config2 = 0;
  1809. esp_set_all_config3(esp, 5);
  1810. esp->prev_cfg3 = 5;
  1811. esp_write8(esp->config2, ESP_CFG2);
  1812. esp_write8(0, ESP_CFG3);
  1813. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1814. val = esp_read8(ESP_CFG3);
  1815. if (val != 5) {
  1816. /* The cfg2 register is implemented, however
  1817. * cfg3 is not, must be esp100a.
  1818. */
  1819. esp->rev = ESP100A;
  1820. } else {
  1821. esp_set_all_config3(esp, 0);
  1822. esp->prev_cfg3 = 0;
  1823. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1824. /* All of cfg{1,2,3} implemented, must be one of
  1825. * the fas variants, figure out which one.
  1826. */
  1827. if (esp->cfact == 0 || esp->cfact > ESP_CCF_F5) {
  1828. esp->rev = FAST;
  1829. esp->sync_defp = SYNC_DEFP_FAST;
  1830. } else {
  1831. esp->rev = ESP236;
  1832. }
  1833. esp->config2 = 0;
  1834. esp_write8(esp->config2, ESP_CFG2);
  1835. }
  1836. }
  1837. }
  1838. static void __devinit esp_init_swstate(struct esp *esp)
  1839. {
  1840. int i;
  1841. INIT_LIST_HEAD(&esp->queued_cmds);
  1842. INIT_LIST_HEAD(&esp->active_cmds);
  1843. INIT_LIST_HEAD(&esp->esp_cmd_pool);
  1844. /* Start with a clear state, domain validation (via ->slave_configure,
  1845. * spi_dv_device()) will attempt to enable SYNC, WIDE, and tagged
  1846. * commands.
  1847. */
  1848. for (i = 0 ; i < ESP_MAX_TARGET; i++) {
  1849. esp->target[i].flags = 0;
  1850. esp->target[i].nego_goal_period = 0;
  1851. esp->target[i].nego_goal_offset = 0;
  1852. esp->target[i].nego_goal_width = 0;
  1853. esp->target[i].nego_goal_tags = 0;
  1854. }
  1855. }
  1856. /* This places the ESP into a known state at boot time. */
  1857. static void esp_bootup_reset(struct esp *esp)
  1858. {
  1859. u8 val;
  1860. /* Reset the DMA */
  1861. esp->ops->reset_dma(esp);
  1862. /* Reset the ESP */
  1863. esp_reset_esp(esp);
  1864. /* Reset the SCSI bus, but tell ESP not to generate an irq */
  1865. val = esp_read8(ESP_CFG1);
  1866. val |= ESP_CONFIG1_SRRDISAB;
  1867. esp_write8(val, ESP_CFG1);
  1868. scsi_esp_cmd(esp, ESP_CMD_RS);
  1869. udelay(400);
  1870. esp_write8(esp->config1, ESP_CFG1);
  1871. /* Eat any bitrot in the chip and we are done... */
  1872. esp_read8(ESP_INTRPT);
  1873. }
  1874. static void __devinit esp_set_clock_params(struct esp *esp)
  1875. {
  1876. int fmhz;
  1877. u8 ccf;
  1878. /* This is getting messy but it has to be done correctly or else
  1879. * you get weird behavior all over the place. We are trying to
  1880. * basically figure out three pieces of information.
  1881. *
  1882. * a) Clock Conversion Factor
  1883. *
  1884. * This is a representation of the input crystal clock frequency
  1885. * going into the ESP on this machine. Any operation whose timing
  1886. * is longer than 400ns depends on this value being correct. For
  1887. * example, you'll get blips for arbitration/selection during high
  1888. * load or with multiple targets if this is not set correctly.
  1889. *
  1890. * b) Selection Time-Out
  1891. *
  1892. * The ESP isn't very bright and will arbitrate for the bus and try
  1893. * to select a target forever if you let it. This value tells the
  1894. * ESP when it has taken too long to negotiate and that it should
  1895. * interrupt the CPU so we can see what happened. The value is
  1896. * computed as follows (from NCR/Symbios chip docs).
  1897. *
  1898. * (Time Out Period) * (Input Clock)
  1899. * STO = ----------------------------------
  1900. * (8192) * (Clock Conversion Factor)
  1901. *
  1902. * We use a time out period of 250ms (ESP_BUS_TIMEOUT).
  1903. *
  1904. * c) Imperical constants for synchronous offset and transfer period
  1905. * register values
  1906. *
  1907. * This entails the smallest and largest sync period we could ever
  1908. * handle on this ESP.
  1909. */
  1910. fmhz = esp->cfreq;
  1911. ccf = ((fmhz / 1000000) + 4) / 5;
  1912. if (ccf == 1)
  1913. ccf = 2;
  1914. /* If we can't find anything reasonable, just assume 20MHZ.
  1915. * This is the clock frequency of the older sun4c's where I've
  1916. * been unable to find the clock-frequency PROM property. All
  1917. * other machines provide useful values it seems.
  1918. */
  1919. if (fmhz <= 5000000 || ccf < 1 || ccf > 8) {
  1920. fmhz = 20000000;
  1921. ccf = 4;
  1922. }
  1923. esp->cfact = (ccf == 8 ? 0 : ccf);
  1924. esp->cfreq = fmhz;
  1925. esp->ccycle = ESP_MHZ_TO_CYCLE(fmhz);
  1926. esp->ctick = ESP_TICK(ccf, esp->ccycle);
  1927. esp->neg_defp = ESP_NEG_DEFP(fmhz, ccf);
  1928. esp->sync_defp = SYNC_DEFP_SLOW;
  1929. }
  1930. static const char *esp_chip_names[] = {
  1931. "ESP100",
  1932. "ESP100A",
  1933. "ESP236",
  1934. "FAS236",
  1935. "FAS100A",
  1936. "FAST",
  1937. "FASHME",
  1938. };
  1939. static struct scsi_transport_template *esp_transport_template;
  1940. int __devinit scsi_esp_register(struct esp *esp, struct device *dev)
  1941. {
  1942. static int instance;
  1943. int err;
  1944. esp->host->transportt = esp_transport_template;
  1945. esp->host->max_lun = ESP_MAX_LUN;
  1946. esp->host->cmd_per_lun = 2;
  1947. esp_set_clock_params(esp);
  1948. esp_get_revision(esp);
  1949. esp_init_swstate(esp);
  1950. esp_bootup_reset(esp);
  1951. printk(KERN_INFO PFX "esp%u, regs[%1p:%1p] irq[%u]\n",
  1952. esp->host->unique_id, esp->regs, esp->dma_regs,
  1953. esp->host->irq);
  1954. printk(KERN_INFO PFX "esp%u is a %s, %u MHz (ccf=%u), SCSI ID %u\n",
  1955. esp->host->unique_id, esp_chip_names[esp->rev],
  1956. esp->cfreq / 1000000, esp->cfact, esp->scsi_id);
  1957. /* Let the SCSI bus reset settle. */
  1958. ssleep(esp_bus_reset_settle);
  1959. err = scsi_add_host(esp->host, dev);
  1960. if (err)
  1961. return err;
  1962. esp->host->unique_id = instance++;
  1963. scsi_scan_host(esp->host);
  1964. return 0;
  1965. }
  1966. EXPORT_SYMBOL(scsi_esp_register);
  1967. void __devexit scsi_esp_unregister(struct esp *esp)
  1968. {
  1969. scsi_remove_host(esp->host);
  1970. }
  1971. EXPORT_SYMBOL(scsi_esp_unregister);
  1972. static int esp_slave_alloc(struct scsi_device *dev)
  1973. {
  1974. struct esp *esp = host_to_esp(dev->host);
  1975. struct esp_target_data *tp = &esp->target[dev->id];
  1976. struct esp_lun_data *lp;
  1977. lp = kzalloc(sizeof(*lp), GFP_KERNEL);
  1978. if (!lp)
  1979. return -ENOMEM;
  1980. dev->hostdata = lp;
  1981. tp->starget = dev->sdev_target;
  1982. spi_min_period(tp->starget) = esp->min_period;
  1983. spi_max_offset(tp->starget) = 15;
  1984. if (esp->flags & ESP_FLAG_WIDE_CAPABLE)
  1985. spi_max_width(tp->starget) = 1;
  1986. else
  1987. spi_max_width(tp->starget) = 0;
  1988. return 0;
  1989. }
  1990. static int esp_slave_configure(struct scsi_device *dev)
  1991. {
  1992. struct esp *esp = host_to_esp(dev->host);
  1993. struct esp_target_data *tp = &esp->target[dev->id];
  1994. int goal_tags, queue_depth;
  1995. goal_tags = 0;
  1996. if (dev->tagged_supported) {
  1997. /* XXX make this configurable somehow XXX */
  1998. goal_tags = ESP_DEFAULT_TAGS;
  1999. if (goal_tags > ESP_MAX_TAG)
  2000. goal_tags = ESP_MAX_TAG;
  2001. }
  2002. queue_depth = goal_tags;
  2003. if (queue_depth < dev->host->cmd_per_lun)
  2004. queue_depth = dev->host->cmd_per_lun;
  2005. if (goal_tags) {
  2006. scsi_set_tag_type(dev, MSG_ORDERED_TAG);
  2007. scsi_activate_tcq(dev, queue_depth);
  2008. } else {
  2009. scsi_deactivate_tcq(dev, queue_depth);
  2010. }
  2011. tp->flags |= ESP_TGT_DISCONNECT;
  2012. if (!spi_initial_dv(dev->sdev_target))
  2013. spi_dv_device(dev);
  2014. return 0;
  2015. }
  2016. static void esp_slave_destroy(struct scsi_device *dev)
  2017. {
  2018. struct esp_lun_data *lp = dev->hostdata;
  2019. kfree(lp);
  2020. dev->hostdata = NULL;
  2021. }
  2022. static int esp_eh_abort_handler(struct scsi_cmnd *cmd)
  2023. {
  2024. struct esp *esp = host_to_esp(cmd->device->host);
  2025. struct esp_cmd_entry *ent, *tmp;
  2026. struct completion eh_done;
  2027. unsigned long flags;
  2028. /* XXX This helps a lot with debugging but might be a bit
  2029. * XXX much for the final driver.
  2030. */
  2031. spin_lock_irqsave(esp->host->host_lock, flags);
  2032. printk(KERN_ERR PFX "esp%d: Aborting command [%p:%02x]\n",
  2033. esp->host->unique_id, cmd, cmd->cmnd[0]);
  2034. ent = esp->active_cmd;
  2035. if (ent)
  2036. printk(KERN_ERR PFX "esp%d: Current command [%p:%02x]\n",
  2037. esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
  2038. list_for_each_entry(ent, &esp->queued_cmds, list) {
  2039. printk(KERN_ERR PFX "esp%d: Queued command [%p:%02x]\n",
  2040. esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
  2041. }
  2042. list_for_each_entry(ent, &esp->active_cmds, list) {
  2043. printk(KERN_ERR PFX "esp%d: Active command [%p:%02x]\n",
  2044. esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
  2045. }
  2046. esp_dump_cmd_log(esp);
  2047. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2048. spin_lock_irqsave(esp->host->host_lock, flags);
  2049. ent = NULL;
  2050. list_for_each_entry(tmp, &esp->queued_cmds, list) {
  2051. if (tmp->cmd == cmd) {
  2052. ent = tmp;
  2053. break;
  2054. }
  2055. }
  2056. if (ent) {
  2057. /* Easiest case, we didn't even issue the command
  2058. * yet so it is trivial to abort.
  2059. */
  2060. list_del(&ent->list);
  2061. cmd->result = DID_ABORT << 16;
  2062. cmd->scsi_done(cmd);
  2063. esp_put_ent(esp, ent);
  2064. goto out_success;
  2065. }
  2066. init_completion(&eh_done);
  2067. ent = esp->active_cmd;
  2068. if (ent && ent->cmd == cmd) {
  2069. /* Command is the currently active command on
  2070. * the bus. If we already have an output message
  2071. * pending, no dice.
  2072. */
  2073. if (esp->msg_out_len)
  2074. goto out_failure;
  2075. /* Send out an abort, encouraging the target to
  2076. * go to MSGOUT phase by asserting ATN.
  2077. */
  2078. esp->msg_out[0] = ABORT_TASK_SET;
  2079. esp->msg_out_len = 1;
  2080. ent->eh_done = &eh_done;
  2081. scsi_esp_cmd(esp, ESP_CMD_SATN);
  2082. } else {
  2083. /* The command is disconnected. This is not easy to
  2084. * abort. For now we fail and let the scsi error
  2085. * handling layer go try a scsi bus reset or host
  2086. * reset.
  2087. *
  2088. * What we could do is put together a scsi command
  2089. * solely for the purpose of sending an abort message
  2090. * to the target. Coming up with all the code to
  2091. * cook up scsi commands, special case them everywhere,
  2092. * etc. is for questionable gain and it would be better
  2093. * if the generic scsi error handling layer could do at
  2094. * least some of that for us.
  2095. *
  2096. * Anyways this is an area for potential future improvement
  2097. * in this driver.
  2098. */
  2099. goto out_failure;
  2100. }
  2101. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2102. if (!wait_for_completion_timeout(&eh_done, 5 * HZ)) {
  2103. spin_lock_irqsave(esp->host->host_lock, flags);
  2104. ent->eh_done = NULL;
  2105. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2106. return FAILED;
  2107. }
  2108. return SUCCESS;
  2109. out_success:
  2110. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2111. return SUCCESS;
  2112. out_failure:
  2113. /* XXX This might be a good location to set ESP_TGT_BROKEN
  2114. * XXX since we know which target/lun in particular is
  2115. * XXX causing trouble.
  2116. */
  2117. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2118. return FAILED;
  2119. }
  2120. static int esp_eh_bus_reset_handler(struct scsi_cmnd *cmd)
  2121. {
  2122. struct esp *esp = host_to_esp(cmd->device->host);
  2123. struct completion eh_reset;
  2124. unsigned long flags;
  2125. init_completion(&eh_reset);
  2126. spin_lock_irqsave(esp->host->host_lock, flags);
  2127. esp->eh_reset = &eh_reset;
  2128. /* XXX This is too simple... We should add lots of
  2129. * XXX checks here so that if we find that the chip is
  2130. * XXX very wedged we return failure immediately so
  2131. * XXX that we can perform a full chip reset.
  2132. */
  2133. esp->flags |= ESP_FLAG_RESETTING;
  2134. scsi_esp_cmd(esp, ESP_CMD_RS);
  2135. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2136. ssleep(esp_bus_reset_settle);
  2137. if (!wait_for_completion_timeout(&eh_reset, 5 * HZ)) {
  2138. spin_lock_irqsave(esp->host->host_lock, flags);
  2139. esp->eh_reset = NULL;
  2140. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2141. return FAILED;
  2142. }
  2143. return SUCCESS;
  2144. }
  2145. /* All bets are off, reset the entire device. */
  2146. static int esp_eh_host_reset_handler(struct scsi_cmnd *cmd)
  2147. {
  2148. struct esp *esp = host_to_esp(cmd->device->host);
  2149. unsigned long flags;
  2150. spin_lock_irqsave(esp->host->host_lock, flags);
  2151. esp_bootup_reset(esp);
  2152. esp_reset_cleanup(esp);
  2153. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2154. ssleep(esp_bus_reset_settle);
  2155. return SUCCESS;
  2156. }
  2157. static const char *esp_info(struct Scsi_Host *host)
  2158. {
  2159. return "esp";
  2160. }
  2161. struct scsi_host_template scsi_esp_template = {
  2162. .module = THIS_MODULE,
  2163. .name = "esp",
  2164. .info = esp_info,
  2165. .queuecommand = esp_queuecommand,
  2166. .slave_alloc = esp_slave_alloc,
  2167. .slave_configure = esp_slave_configure,
  2168. .slave_destroy = esp_slave_destroy,
  2169. .eh_abort_handler = esp_eh_abort_handler,
  2170. .eh_bus_reset_handler = esp_eh_bus_reset_handler,
  2171. .eh_host_reset_handler = esp_eh_host_reset_handler,
  2172. .can_queue = 7,
  2173. .this_id = 7,
  2174. .sg_tablesize = SG_ALL,
  2175. .use_clustering = ENABLE_CLUSTERING,
  2176. .max_sectors = 0xffff,
  2177. .skip_settle_delay = 1,
  2178. };
  2179. EXPORT_SYMBOL(scsi_esp_template);
  2180. static void esp_get_signalling(struct Scsi_Host *host)
  2181. {
  2182. struct esp *esp = host_to_esp(host);
  2183. enum spi_signal_type type;
  2184. if (esp->flags & ESP_FLAG_DIFFERENTIAL)
  2185. type = SPI_SIGNAL_HVD;
  2186. else
  2187. type = SPI_SIGNAL_SE;
  2188. spi_signalling(host) = type;
  2189. }
  2190. static void esp_set_offset(struct scsi_target *target, int offset)
  2191. {
  2192. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2193. struct esp *esp = host_to_esp(host);
  2194. struct esp_target_data *tp = &esp->target[target->id];
  2195. tp->nego_goal_offset = offset;
  2196. tp->flags |= ESP_TGT_CHECK_NEGO;
  2197. }
  2198. static void esp_set_period(struct scsi_target *target, int period)
  2199. {
  2200. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2201. struct esp *esp = host_to_esp(host);
  2202. struct esp_target_data *tp = &esp->target[target->id];
  2203. tp->nego_goal_period = period;
  2204. tp->flags |= ESP_TGT_CHECK_NEGO;
  2205. }
  2206. static void esp_set_width(struct scsi_target *target, int width)
  2207. {
  2208. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2209. struct esp *esp = host_to_esp(host);
  2210. struct esp_target_data *tp = &esp->target[target->id];
  2211. tp->nego_goal_width = (width ? 1 : 0);
  2212. tp->flags |= ESP_TGT_CHECK_NEGO;
  2213. }
  2214. static struct spi_function_template esp_transport_ops = {
  2215. .set_offset = esp_set_offset,
  2216. .show_offset = 1,
  2217. .set_period = esp_set_period,
  2218. .show_period = 1,
  2219. .set_width = esp_set_width,
  2220. .show_width = 1,
  2221. .get_signalling = esp_get_signalling,
  2222. };
  2223. static int __init esp_init(void)
  2224. {
  2225. BUILD_BUG_ON(sizeof(struct scsi_pointer) <
  2226. sizeof(struct esp_cmd_priv));
  2227. esp_transport_template = spi_attach_transport(&esp_transport_ops);
  2228. if (!esp_transport_template)
  2229. return -ENODEV;
  2230. return 0;
  2231. }
  2232. static void __exit esp_exit(void)
  2233. {
  2234. spi_release_transport(esp_transport_template);
  2235. }
  2236. MODULE_DESCRIPTION("ESP SCSI driver core");
  2237. MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
  2238. MODULE_LICENSE("GPL");
  2239. MODULE_VERSION(DRV_VERSION);
  2240. module_param(esp_bus_reset_settle, int, 0);
  2241. MODULE_PARM_DESC(esp_bus_reset_settle,
  2242. "ESP scsi bus reset delay in seconds");
  2243. module_param(esp_debug, int, 0);
  2244. MODULE_PARM_DESC(esp_debug,
  2245. "ESP bitmapped debugging message enable value:\n"
  2246. " 0x00000001 Log interrupt events\n"
  2247. " 0x00000002 Log scsi commands\n"
  2248. " 0x00000004 Log resets\n"
  2249. " 0x00000008 Log message in events\n"
  2250. " 0x00000010 Log message out events\n"
  2251. " 0x00000020 Log command completion\n"
  2252. " 0x00000040 Log disconnects\n"
  2253. " 0x00000080 Log data start\n"
  2254. " 0x00000100 Log data done\n"
  2255. " 0x00000200 Log reconnects\n"
  2256. " 0x00000400 Log auto-sense data\n"
  2257. );
  2258. module_init(esp_init);
  2259. module_exit(esp_exit);