regmap.h 6.3 KB

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  1. #ifndef __LINUX_REGMAP_H
  2. #define __LINUX_REGMAP_H
  3. /*
  4. * Register map access API
  5. *
  6. * Copyright 2011 Wolfson Microelectronics plc
  7. *
  8. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/device.h>
  15. #include <linux/list.h>
  16. struct module;
  17. struct i2c_client;
  18. struct spi_device;
  19. /* An enum of all the supported cache types */
  20. enum regcache_type {
  21. REGCACHE_NONE,
  22. REGCACHE_RBTREE,
  23. REGCACHE_COMPRESSED
  24. };
  25. /**
  26. * Default value for a register. We use an array of structs rather
  27. * than a simple array as many modern devices have very sparse
  28. * register maps.
  29. *
  30. * @reg: Register address.
  31. * @def: Register default value.
  32. */
  33. struct reg_default {
  34. unsigned int reg;
  35. unsigned int def;
  36. };
  37. /**
  38. * Configuration for the register map of a device.
  39. *
  40. * @reg_bits: Number of bits in a register address, mandatory.
  41. * @val_bits: Number of bits in a register value, mandatory.
  42. *
  43. * @writeable_reg: Optional callback returning true if the register
  44. * can be written to.
  45. * @readable_reg: Optional callback returning true if the register
  46. * can be read from.
  47. * @volatile_reg: Optional callback returning true if the register
  48. * value can't be cached.
  49. * @precious_reg: Optional callback returning true if the rgister
  50. * should not be read outside of a call from the driver
  51. * (eg, a clear on read interrupt status register).
  52. *
  53. * @max_register: Optional, specifies the maximum valid register index.
  54. * @reg_defaults: Power on reset values for registers (for use with
  55. * register cache support).
  56. * @num_reg_defaults: Number of elements in reg_defaults.
  57. *
  58. * @read_flag_mask: Mask to be set in the top byte of the register when doing
  59. * a read.
  60. * @write_flag_mask: Mask to be set in the top byte of the register when doing
  61. * a write. If both read_flag_mask and write_flag_mask are
  62. * empty the regmap_bus default masks are used.
  63. *
  64. * @cache_type: The actual cache type.
  65. * @reg_defaults_raw: Power on reset values for registers (for use with
  66. * register cache support).
  67. * @num_reg_defaults_raw: Number of elements in reg_defaults_raw.
  68. */
  69. struct regmap_config {
  70. int reg_bits;
  71. int val_bits;
  72. bool (*writeable_reg)(struct device *dev, unsigned int reg);
  73. bool (*readable_reg)(struct device *dev, unsigned int reg);
  74. bool (*volatile_reg)(struct device *dev, unsigned int reg);
  75. bool (*precious_reg)(struct device *dev, unsigned int reg);
  76. unsigned int max_register;
  77. const struct reg_default *reg_defaults;
  78. unsigned int num_reg_defaults;
  79. enum regcache_type cache_type;
  80. const void *reg_defaults_raw;
  81. unsigned int num_reg_defaults_raw;
  82. u8 read_flag_mask;
  83. u8 write_flag_mask;
  84. };
  85. typedef int (*regmap_hw_write)(struct device *dev, const void *data,
  86. size_t count);
  87. typedef int (*regmap_hw_gather_write)(struct device *dev,
  88. const void *reg, size_t reg_len,
  89. const void *val, size_t val_len);
  90. typedef int (*regmap_hw_read)(struct device *dev,
  91. const void *reg_buf, size_t reg_size,
  92. void *val_buf, size_t val_size);
  93. /**
  94. * Description of a hardware bus for the register map infrastructure.
  95. *
  96. * @write: Write operation.
  97. * @gather_write: Write operation with split register/value, return -ENOTSUPP
  98. * if not implemented on a given device.
  99. * @read: Read operation. Data is returned in the buffer used to transmit
  100. * data.
  101. * @read_flag_mask: Mask to be set in the top byte of the register when doing
  102. * a read.
  103. */
  104. struct regmap_bus {
  105. regmap_hw_write write;
  106. regmap_hw_gather_write gather_write;
  107. regmap_hw_read read;
  108. u8 read_flag_mask;
  109. };
  110. struct regmap *regmap_init(struct device *dev,
  111. const struct regmap_bus *bus,
  112. const struct regmap_config *config);
  113. struct regmap *regmap_init_i2c(struct i2c_client *i2c,
  114. const struct regmap_config *config);
  115. struct regmap *regmap_init_spi(struct spi_device *dev,
  116. const struct regmap_config *config);
  117. void regmap_exit(struct regmap *map);
  118. int regmap_write(struct regmap *map, unsigned int reg, unsigned int val);
  119. int regmap_raw_write(struct regmap *map, unsigned int reg,
  120. const void *val, size_t val_len);
  121. int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val);
  122. int regmap_raw_read(struct regmap *map, unsigned int reg,
  123. void *val, size_t val_len);
  124. int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
  125. size_t val_count);
  126. int regmap_update_bits(struct regmap *map, unsigned int reg,
  127. unsigned int mask, unsigned int val);
  128. int regcache_sync(struct regmap *map);
  129. void regcache_cache_only(struct regmap *map, bool enable);
  130. void regcache_cache_bypass(struct regmap *map, bool enable);
  131. void regcache_mark_dirty(struct regmap *map);
  132. /**
  133. * Description of an IRQ for the generic regmap irq_chip.
  134. *
  135. * @reg_offset: Offset of the status/mask register within the bank
  136. * @mask: Mask used to flag/control the register.
  137. */
  138. struct regmap_irq {
  139. unsigned int reg_offset;
  140. unsigned int mask;
  141. };
  142. /**
  143. * Description of a generic regmap irq_chip. This is not intended to
  144. * handle every possible interrupt controller, but it should handle a
  145. * substantial proportion of those that are found in the wild.
  146. *
  147. * @name: Descriptive name for IRQ controller.
  148. *
  149. * @status_base: Base status register address.
  150. * @mask_base: Base mask register address.
  151. * @ack_base: Base ack address. If zero then the chip is clear on read.
  152. *
  153. * @num_regs: Number of registers in each control bank.
  154. * @irqs: Descriptors for individual IRQs. Interrupt numbers are
  155. * assigned based on the index in the array of the interrupt.
  156. * @num_irqs: Number of descriptors.
  157. */
  158. struct regmap_irq_chip {
  159. const char *name;
  160. unsigned int status_base;
  161. unsigned int mask_base;
  162. unsigned int ack_base;
  163. int num_regs;
  164. const struct regmap_irq *irqs;
  165. int num_irqs;
  166. };
  167. struct regmap_irq_chip_data;
  168. int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
  169. int irq_base, struct regmap_irq_chip *chip,
  170. struct regmap_irq_chip_data **data);
  171. void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data);
  172. #endif