iwl3945-base.c 120 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/slab.h>
  35. #include <linux/dma-mapping.h>
  36. #include <linux/delay.h>
  37. #include <linux/sched.h>
  38. #include <linux/skbuff.h>
  39. #include <linux/netdevice.h>
  40. #include <linux/wireless.h>
  41. #include <linux/firmware.h>
  42. #include <linux/etherdevice.h>
  43. #include <linux/if_arp.h>
  44. #include <net/ieee80211_radiotap.h>
  45. #include <net/mac80211.h>
  46. #include <asm/div64.h>
  47. #define DRV_NAME "iwl3945"
  48. #include "iwl-fh.h"
  49. #include "iwl-3945-fh.h"
  50. #include "iwl-commands.h"
  51. #include "iwl-sta.h"
  52. #include "iwl-3945.h"
  53. #include "iwl-core.h"
  54. #include "iwl-helpers.h"
  55. #include "iwl-dev.h"
  56. #include "iwl-spectrum.h"
  57. /*
  58. * module name, copyright, version, etc.
  59. */
  60. #define DRV_DESCRIPTION \
  61. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  62. #ifdef CONFIG_IWLWIFI_DEBUG
  63. #define VD "d"
  64. #else
  65. #define VD
  66. #endif
  67. /*
  68. * add "s" to indicate spectrum measurement included.
  69. * we add it here to be consistent with previous releases in which
  70. * this was configurable.
  71. */
  72. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  73. #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation"
  74. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  75. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  76. MODULE_VERSION(DRV_VERSION);
  77. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  78. MODULE_LICENSE("GPL");
  79. /* module parameters */
  80. struct iwl_mod_params iwl3945_mod_params = {
  81. .sw_crypto = 1,
  82. .restart_fw = 1,
  83. /* the rest are 0 by default */
  84. };
  85. /**
  86. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  87. * @priv: eeprom and antenna fields are used to determine antenna flags
  88. *
  89. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  90. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  91. *
  92. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  93. * IWL_ANTENNA_MAIN - Force MAIN antenna
  94. * IWL_ANTENNA_AUX - Force AUX antenna
  95. */
  96. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  97. {
  98. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  99. switch (iwl3945_mod_params.antenna) {
  100. case IWL_ANTENNA_DIVERSITY:
  101. return 0;
  102. case IWL_ANTENNA_MAIN:
  103. if (eeprom->antenna_switch_type)
  104. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  106. case IWL_ANTENNA_AUX:
  107. if (eeprom->antenna_switch_type)
  108. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  109. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  110. }
  111. /* bad antenna selector value */
  112. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  113. iwl3945_mod_params.antenna);
  114. return 0; /* "diversity" is default if error */
  115. }
  116. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  117. struct ieee80211_key_conf *keyconf,
  118. u8 sta_id)
  119. {
  120. unsigned long flags;
  121. __le16 key_flags = 0;
  122. int ret;
  123. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  124. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  125. if (sta_id == priv->hw_params.bcast_sta_id)
  126. key_flags |= STA_KEY_MULTICAST_MSK;
  127. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  128. keyconf->hw_key_idx = keyconf->keyidx;
  129. key_flags &= ~STA_KEY_FLG_INVALID;
  130. spin_lock_irqsave(&priv->sta_lock, flags);
  131. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  132. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  133. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  134. keyconf->keylen);
  135. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  136. keyconf->keylen);
  137. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  138. == STA_KEY_FLG_NO_ENC)
  139. priv->stations[sta_id].sta.key.key_offset =
  140. iwl_get_free_ucode_key_index(priv);
  141. /* else, we are overriding an existing key => no need to allocated room
  142. * in uCode. */
  143. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  144. "no space for a new key");
  145. priv->stations[sta_id].sta.key.key_flags = key_flags;
  146. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  147. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  148. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  149. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  150. spin_unlock_irqrestore(&priv->sta_lock, flags);
  151. return ret;
  152. }
  153. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  154. struct ieee80211_key_conf *keyconf,
  155. u8 sta_id)
  156. {
  157. return -EOPNOTSUPP;
  158. }
  159. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  160. struct ieee80211_key_conf *keyconf,
  161. u8 sta_id)
  162. {
  163. return -EOPNOTSUPP;
  164. }
  165. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  166. {
  167. unsigned long flags;
  168. struct iwl_addsta_cmd sta_cmd;
  169. spin_lock_irqsave(&priv->sta_lock, flags);
  170. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  171. memset(&priv->stations[sta_id].sta.key, 0,
  172. sizeof(struct iwl4965_keyinfo));
  173. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  174. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  175. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  176. memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_addsta_cmd));
  177. spin_unlock_irqrestore(&priv->sta_lock, flags);
  178. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  179. return iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC);
  180. }
  181. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  182. struct ieee80211_key_conf *keyconf, u8 sta_id)
  183. {
  184. int ret = 0;
  185. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  186. switch (keyconf->alg) {
  187. case ALG_CCMP:
  188. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  189. break;
  190. case ALG_TKIP:
  191. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  192. break;
  193. case ALG_WEP:
  194. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  195. break;
  196. default:
  197. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  198. ret = -EINVAL;
  199. }
  200. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  201. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  202. sta_id, ret);
  203. return ret;
  204. }
  205. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  206. {
  207. int ret = -EOPNOTSUPP;
  208. return ret;
  209. }
  210. static int iwl3945_set_static_key(struct iwl_priv *priv,
  211. struct ieee80211_key_conf *key)
  212. {
  213. if (key->alg == ALG_WEP)
  214. return -EOPNOTSUPP;
  215. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  216. return -EINVAL;
  217. }
  218. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  219. {
  220. struct list_head *element;
  221. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  222. priv->frames_count);
  223. while (!list_empty(&priv->free_frames)) {
  224. element = priv->free_frames.next;
  225. list_del(element);
  226. kfree(list_entry(element, struct iwl3945_frame, list));
  227. priv->frames_count--;
  228. }
  229. if (priv->frames_count) {
  230. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  231. priv->frames_count);
  232. priv->frames_count = 0;
  233. }
  234. }
  235. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  236. {
  237. struct iwl3945_frame *frame;
  238. struct list_head *element;
  239. if (list_empty(&priv->free_frames)) {
  240. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  241. if (!frame) {
  242. IWL_ERR(priv, "Could not allocate frame!\n");
  243. return NULL;
  244. }
  245. priv->frames_count++;
  246. return frame;
  247. }
  248. element = priv->free_frames.next;
  249. list_del(element);
  250. return list_entry(element, struct iwl3945_frame, list);
  251. }
  252. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  253. {
  254. memset(frame, 0, sizeof(*frame));
  255. list_add(&frame->list, &priv->free_frames);
  256. }
  257. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  258. struct ieee80211_hdr *hdr,
  259. int left)
  260. {
  261. if (!iwl_is_associated(priv) || !priv->ibss_beacon)
  262. return 0;
  263. if (priv->ibss_beacon->len > left)
  264. return 0;
  265. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  266. return priv->ibss_beacon->len;
  267. }
  268. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  269. {
  270. struct iwl3945_frame *frame;
  271. unsigned int frame_size;
  272. int rc;
  273. u8 rate;
  274. frame = iwl3945_get_free_frame(priv);
  275. if (!frame) {
  276. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  277. "command.\n");
  278. return -ENOMEM;
  279. }
  280. rate = iwl_rate_get_lowest_plcp(priv);
  281. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  282. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  283. &frame->u.cmd[0]);
  284. iwl3945_free_frame(priv, frame);
  285. return rc;
  286. }
  287. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  288. {
  289. if (priv->_3945.shared_virt)
  290. dma_free_coherent(&priv->pci_dev->dev,
  291. sizeof(struct iwl3945_shared),
  292. priv->_3945.shared_virt,
  293. priv->_3945.shared_phys);
  294. }
  295. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  296. struct ieee80211_tx_info *info,
  297. struct iwl_device_cmd *cmd,
  298. struct sk_buff *skb_frag,
  299. int sta_id)
  300. {
  301. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  302. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  303. switch (keyinfo->alg) {
  304. case ALG_CCMP:
  305. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  306. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  307. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  308. break;
  309. case ALG_TKIP:
  310. break;
  311. case ALG_WEP:
  312. tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
  313. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  314. if (keyinfo->keylen == 13)
  315. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  316. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  317. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  318. "with key %d\n", info->control.hw_key->hw_key_idx);
  319. break;
  320. default:
  321. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  322. break;
  323. }
  324. }
  325. /*
  326. * handle build REPLY_TX command notification.
  327. */
  328. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  329. struct iwl_device_cmd *cmd,
  330. struct ieee80211_tx_info *info,
  331. struct ieee80211_hdr *hdr, u8 std_id)
  332. {
  333. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  334. __le32 tx_flags = tx_cmd->tx_flags;
  335. __le16 fc = hdr->frame_control;
  336. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  337. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  338. tx_flags |= TX_CMD_FLG_ACK_MSK;
  339. if (ieee80211_is_mgmt(fc))
  340. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  341. if (ieee80211_is_probe_resp(fc) &&
  342. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  343. tx_flags |= TX_CMD_FLG_TSF_MSK;
  344. } else {
  345. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  346. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  347. }
  348. tx_cmd->sta_id = std_id;
  349. if (ieee80211_has_morefrags(fc))
  350. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  351. if (ieee80211_is_data_qos(fc)) {
  352. u8 *qc = ieee80211_get_qos_ctl(hdr);
  353. tx_cmd->tid_tspec = qc[0] & 0xf;
  354. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  355. } else {
  356. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  357. }
  358. priv->cfg->ops->utils->tx_cmd_protection(priv, info, fc, &tx_flags);
  359. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  360. if (ieee80211_is_mgmt(fc)) {
  361. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  362. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  363. else
  364. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  365. } else {
  366. tx_cmd->timeout.pm_frame_timeout = 0;
  367. }
  368. tx_cmd->driver_txop = 0;
  369. tx_cmd->tx_flags = tx_flags;
  370. tx_cmd->next_frame_len = 0;
  371. }
  372. /*
  373. * start REPLY_TX command process
  374. */
  375. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  376. {
  377. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  378. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  379. struct iwl3945_tx_cmd *tx_cmd;
  380. struct iwl_tx_queue *txq = NULL;
  381. struct iwl_queue *q = NULL;
  382. struct iwl_device_cmd *out_cmd;
  383. struct iwl_cmd_meta *out_meta;
  384. dma_addr_t phys_addr;
  385. dma_addr_t txcmd_phys;
  386. int txq_id = skb_get_queue_mapping(skb);
  387. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  388. u8 id;
  389. u8 unicast;
  390. u8 sta_id;
  391. u8 tid = 0;
  392. __le16 fc;
  393. u8 wait_write_ptr = 0;
  394. unsigned long flags;
  395. spin_lock_irqsave(&priv->lock, flags);
  396. if (iwl_is_rfkill(priv)) {
  397. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  398. goto drop_unlock;
  399. }
  400. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  401. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  402. goto drop_unlock;
  403. }
  404. unicast = !is_multicast_ether_addr(hdr->addr1);
  405. id = 0;
  406. fc = hdr->frame_control;
  407. #ifdef CONFIG_IWLWIFI_DEBUG
  408. if (ieee80211_is_auth(fc))
  409. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  410. else if (ieee80211_is_assoc_req(fc))
  411. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  412. else if (ieee80211_is_reassoc_req(fc))
  413. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  414. #endif
  415. spin_unlock_irqrestore(&priv->lock, flags);
  416. hdr_len = ieee80211_hdrlen(fc);
  417. /* Find index into station table for destination station */
  418. sta_id = iwl_sta_id_or_broadcast(priv, info->control.sta);
  419. if (sta_id == IWL_INVALID_STATION) {
  420. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  421. hdr->addr1);
  422. goto drop;
  423. }
  424. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  425. if (ieee80211_is_data_qos(fc)) {
  426. u8 *qc = ieee80211_get_qos_ctl(hdr);
  427. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  428. if (unlikely(tid >= MAX_TID_COUNT))
  429. goto drop;
  430. }
  431. /* Descriptor for chosen Tx queue */
  432. txq = &priv->txq[txq_id];
  433. q = &txq->q;
  434. if ((iwl_queue_space(q) < q->high_mark))
  435. goto drop;
  436. spin_lock_irqsave(&priv->lock, flags);
  437. idx = get_cmd_index(q, q->write_ptr, 0);
  438. /* Set up driver data for this TFD */
  439. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  440. txq->txb[q->write_ptr].skb = skb;
  441. /* Init first empty entry in queue's array of Tx/cmd buffers */
  442. out_cmd = txq->cmd[idx];
  443. out_meta = &txq->meta[idx];
  444. tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  445. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  446. memset(tx_cmd, 0, sizeof(*tx_cmd));
  447. /*
  448. * Set up the Tx-command (not MAC!) header.
  449. * Store the chosen Tx queue and TFD index within the sequence field;
  450. * after Tx, uCode's Tx response will return this value so driver can
  451. * locate the frame within the tx queue and do post-tx processing.
  452. */
  453. out_cmd->hdr.cmd = REPLY_TX;
  454. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  455. INDEX_TO_SEQ(q->write_ptr)));
  456. /* Copy MAC header from skb into command buffer */
  457. memcpy(tx_cmd->hdr, hdr, hdr_len);
  458. if (info->control.hw_key)
  459. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  460. /* TODO need this for burst mode later on */
  461. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  462. /* set is_hcca to 0; it probably will never be implemented */
  463. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  464. /* Total # bytes to be transmitted */
  465. len = (u16)skb->len;
  466. tx_cmd->len = cpu_to_le16(len);
  467. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  468. iwl_update_stats(priv, true, fc, len);
  469. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  470. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  471. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  472. txq->need_update = 1;
  473. } else {
  474. wait_write_ptr = 1;
  475. txq->need_update = 0;
  476. }
  477. IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
  478. le16_to_cpu(out_cmd->hdr.sequence));
  479. IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  480. iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  481. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
  482. ieee80211_hdrlen(fc));
  483. /*
  484. * Use the first empty entry in this queue's command buffer array
  485. * to contain the Tx command and MAC header concatenated together
  486. * (payload data will be in another buffer).
  487. * Size of this varies, due to varying MAC header length.
  488. * If end is not dword aligned, we'll have 2 extra bytes at the end
  489. * of the MAC header (device reads on dword boundaries).
  490. * We'll tell device about this padding later.
  491. */
  492. len = sizeof(struct iwl3945_tx_cmd) +
  493. sizeof(struct iwl_cmd_header) + hdr_len;
  494. len_org = len;
  495. len = (len + 3) & ~3;
  496. if (len_org != len)
  497. len_org = 1;
  498. else
  499. len_org = 0;
  500. /* Physical address of this Tx command's header (not MAC header!),
  501. * within command buffer array. */
  502. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  503. len, PCI_DMA_TODEVICE);
  504. /* we do not map meta data ... so we can safely access address to
  505. * provide to unmap command*/
  506. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  507. dma_unmap_len_set(out_meta, len, len);
  508. /* Add buffer containing Tx command and MAC(!) header to TFD's
  509. * first entry */
  510. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  511. txcmd_phys, len, 1, 0);
  512. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  513. * if any (802.11 null frames have no payload). */
  514. len = skb->len - hdr_len;
  515. if (len) {
  516. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  517. len, PCI_DMA_TODEVICE);
  518. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  519. phys_addr, len,
  520. 0, U32_PAD(len));
  521. }
  522. /* Tell device the write index *just past* this latest filled TFD */
  523. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  524. iwl_txq_update_write_ptr(priv, txq);
  525. spin_unlock_irqrestore(&priv->lock, flags);
  526. if ((iwl_queue_space(q) < q->high_mark)
  527. && priv->mac80211_registered) {
  528. if (wait_write_ptr) {
  529. spin_lock_irqsave(&priv->lock, flags);
  530. txq->need_update = 1;
  531. iwl_txq_update_write_ptr(priv, txq);
  532. spin_unlock_irqrestore(&priv->lock, flags);
  533. }
  534. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  535. }
  536. return 0;
  537. drop_unlock:
  538. spin_unlock_irqrestore(&priv->lock, flags);
  539. drop:
  540. return -1;
  541. }
  542. static int iwl3945_get_measurement(struct iwl_priv *priv,
  543. struct ieee80211_measurement_params *params,
  544. u8 type)
  545. {
  546. struct iwl_spectrum_cmd spectrum;
  547. struct iwl_rx_packet *pkt;
  548. struct iwl_host_cmd cmd = {
  549. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  550. .data = (void *)&spectrum,
  551. .flags = CMD_WANT_SKB,
  552. };
  553. u32 add_time = le64_to_cpu(params->start_time);
  554. int rc;
  555. int spectrum_resp_status;
  556. int duration = le16_to_cpu(params->duration);
  557. if (iwl_is_associated(priv))
  558. add_time = iwl_usecs_to_beacons(priv,
  559. le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
  560. le16_to_cpu(priv->rxon_timing.beacon_interval));
  561. memset(&spectrum, 0, sizeof(spectrum));
  562. spectrum.channel_count = cpu_to_le16(1);
  563. spectrum.flags =
  564. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  565. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  566. cmd.len = sizeof(spectrum);
  567. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  568. if (iwl_is_associated(priv))
  569. spectrum.start_time =
  570. iwl_add_beacon_time(priv,
  571. priv->_3945.last_beacon_time, add_time,
  572. le16_to_cpu(priv->rxon_timing.beacon_interval));
  573. else
  574. spectrum.start_time = 0;
  575. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  576. spectrum.channels[0].channel = params->channel;
  577. spectrum.channels[0].type = type;
  578. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  579. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  580. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  581. rc = iwl_send_cmd_sync(priv, &cmd);
  582. if (rc)
  583. return rc;
  584. pkt = (struct iwl_rx_packet *)cmd.reply_page;
  585. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  586. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  587. rc = -EIO;
  588. }
  589. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  590. switch (spectrum_resp_status) {
  591. case 0: /* Command will be handled */
  592. if (pkt->u.spectrum.id != 0xff) {
  593. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  594. pkt->u.spectrum.id);
  595. priv->measurement_status &= ~MEASUREMENT_READY;
  596. }
  597. priv->measurement_status |= MEASUREMENT_ACTIVE;
  598. rc = 0;
  599. break;
  600. case 1: /* Command will not be handled */
  601. rc = -EAGAIN;
  602. break;
  603. }
  604. iwl_free_pages(priv, cmd.reply_page);
  605. return rc;
  606. }
  607. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  608. struct iwl_rx_mem_buffer *rxb)
  609. {
  610. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  611. struct iwl_alive_resp *palive;
  612. struct delayed_work *pwork;
  613. palive = &pkt->u.alive_frame;
  614. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  615. "0x%01X 0x%01X\n",
  616. palive->is_valid, palive->ver_type,
  617. palive->ver_subtype);
  618. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  619. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  620. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  621. sizeof(struct iwl_alive_resp));
  622. pwork = &priv->init_alive_start;
  623. } else {
  624. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  625. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  626. sizeof(struct iwl_alive_resp));
  627. pwork = &priv->alive_start;
  628. iwl3945_disable_events(priv);
  629. }
  630. /* We delay the ALIVE response by 5ms to
  631. * give the HW RF Kill time to activate... */
  632. if (palive->is_valid == UCODE_VALID_OK)
  633. queue_delayed_work(priv->workqueue, pwork,
  634. msecs_to_jiffies(5));
  635. else
  636. IWL_WARN(priv, "uCode did not respond OK.\n");
  637. }
  638. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  639. struct iwl_rx_mem_buffer *rxb)
  640. {
  641. #ifdef CONFIG_IWLWIFI_DEBUG
  642. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  643. #endif
  644. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  645. }
  646. static void iwl3945_bg_beacon_update(struct work_struct *work)
  647. {
  648. struct iwl_priv *priv =
  649. container_of(work, struct iwl_priv, beacon_update);
  650. struct sk_buff *beacon;
  651. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  652. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  653. if (!beacon) {
  654. IWL_ERR(priv, "update beacon failed\n");
  655. return;
  656. }
  657. mutex_lock(&priv->mutex);
  658. /* new beacon skb is allocated every time; dispose previous.*/
  659. if (priv->ibss_beacon)
  660. dev_kfree_skb(priv->ibss_beacon);
  661. priv->ibss_beacon = beacon;
  662. mutex_unlock(&priv->mutex);
  663. iwl3945_send_beacon_cmd(priv);
  664. }
  665. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  666. struct iwl_rx_mem_buffer *rxb)
  667. {
  668. #ifdef CONFIG_IWLWIFI_DEBUG
  669. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  670. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  671. u8 rate = beacon->beacon_notify_hdr.rate;
  672. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  673. "tsf %d %d rate %d\n",
  674. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  675. beacon->beacon_notify_hdr.failure_frame,
  676. le32_to_cpu(beacon->ibss_mgr_status),
  677. le32_to_cpu(beacon->high_tsf),
  678. le32_to_cpu(beacon->low_tsf), rate);
  679. #endif
  680. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  681. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  682. queue_work(priv->workqueue, &priv->beacon_update);
  683. }
  684. /* Handle notification from uCode that card's power state is changing
  685. * due to software, hardware, or critical temperature RFKILL */
  686. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  687. struct iwl_rx_mem_buffer *rxb)
  688. {
  689. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  690. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  691. unsigned long status = priv->status;
  692. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  693. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  694. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  695. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  696. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  697. if (flags & HW_CARD_DISABLED)
  698. set_bit(STATUS_RF_KILL_HW, &priv->status);
  699. else
  700. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  701. iwl_scan_cancel(priv);
  702. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  703. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  704. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  705. test_bit(STATUS_RF_KILL_HW, &priv->status));
  706. else
  707. wake_up_interruptible(&priv->wait_command_queue);
  708. }
  709. /**
  710. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  711. *
  712. * Setup the RX handlers for each of the reply types sent from the uCode
  713. * to the host.
  714. *
  715. * This function chains into the hardware specific files for them to setup
  716. * any hardware specific handlers as well.
  717. */
  718. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  719. {
  720. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  721. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  722. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  723. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  724. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  725. iwl_rx_spectrum_measure_notif;
  726. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  727. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  728. iwl_rx_pm_debug_statistics_notif;
  729. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  730. /*
  731. * The same handler is used for both the REPLY to a discrete
  732. * statistics request from the host as well as for the periodic
  733. * statistics notifications (after received beacons) from the uCode.
  734. */
  735. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics;
  736. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  737. iwl_setup_rx_scan_handlers(priv);
  738. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  739. /* Set up hardware specific Rx handlers */
  740. iwl3945_hw_rx_handler_setup(priv);
  741. }
  742. /************************** RX-FUNCTIONS ****************************/
  743. /*
  744. * Rx theory of operation
  745. *
  746. * The host allocates 32 DMA target addresses and passes the host address
  747. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  748. * 0 to 31
  749. *
  750. * Rx Queue Indexes
  751. * The host/firmware share two index registers for managing the Rx buffers.
  752. *
  753. * The READ index maps to the first position that the firmware may be writing
  754. * to -- the driver can read up to (but not including) this position and get
  755. * good data.
  756. * The READ index is managed by the firmware once the card is enabled.
  757. *
  758. * The WRITE index maps to the last position the driver has read from -- the
  759. * position preceding WRITE is the last slot the firmware can place a packet.
  760. *
  761. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  762. * WRITE = READ.
  763. *
  764. * During initialization, the host sets up the READ queue position to the first
  765. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  766. *
  767. * When the firmware places a packet in a buffer, it will advance the READ index
  768. * and fire the RX interrupt. The driver can then query the READ index and
  769. * process as many packets as possible, moving the WRITE index forward as it
  770. * resets the Rx queue buffers with new memory.
  771. *
  772. * The management in the driver is as follows:
  773. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  774. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  775. * to replenish the iwl->rxq->rx_free.
  776. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  777. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  778. * 'processed' and 'read' driver indexes as well)
  779. * + A received packet is processed and handed to the kernel network stack,
  780. * detached from the iwl->rxq. The driver 'processed' index is updated.
  781. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  782. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  783. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  784. * were enough free buffers and RX_STALLED is set it is cleared.
  785. *
  786. *
  787. * Driver sequence:
  788. *
  789. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  790. * iwl3945_rx_queue_restock
  791. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  792. * queue, updates firmware pointers, and updates
  793. * the WRITE index. If insufficient rx_free buffers
  794. * are available, schedules iwl3945_rx_replenish
  795. *
  796. * -- enable interrupts --
  797. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  798. * READ INDEX, detaching the SKB from the pool.
  799. * Moves the packet buffer from queue to rx_used.
  800. * Calls iwl3945_rx_queue_restock to refill any empty
  801. * slots.
  802. * ...
  803. *
  804. */
  805. /**
  806. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  807. */
  808. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  809. dma_addr_t dma_addr)
  810. {
  811. return cpu_to_le32((u32)dma_addr);
  812. }
  813. /**
  814. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  815. *
  816. * If there are slots in the RX queue that need to be restocked,
  817. * and we have free pre-allocated buffers, fill the ranks as much
  818. * as we can, pulling from rx_free.
  819. *
  820. * This moves the 'write' index forward to catch up with 'processed', and
  821. * also updates the memory address in the firmware to reference the new
  822. * target buffer.
  823. */
  824. static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
  825. {
  826. struct iwl_rx_queue *rxq = &priv->rxq;
  827. struct list_head *element;
  828. struct iwl_rx_mem_buffer *rxb;
  829. unsigned long flags;
  830. int write;
  831. spin_lock_irqsave(&rxq->lock, flags);
  832. write = rxq->write & ~0x7;
  833. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  834. /* Get next free Rx buffer, remove from free list */
  835. element = rxq->rx_free.next;
  836. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  837. list_del(element);
  838. /* Point to Rx buffer via next RBD in circular buffer */
  839. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
  840. rxq->queue[rxq->write] = rxb;
  841. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  842. rxq->free_count--;
  843. }
  844. spin_unlock_irqrestore(&rxq->lock, flags);
  845. /* If the pre-allocated buffer pool is dropping low, schedule to
  846. * refill it */
  847. if (rxq->free_count <= RX_LOW_WATERMARK)
  848. queue_work(priv->workqueue, &priv->rx_replenish);
  849. /* If we've added more space for the firmware to place data, tell it.
  850. * Increment device's write pointer in multiples of 8. */
  851. if ((rxq->write_actual != (rxq->write & ~0x7))
  852. || (abs(rxq->write - rxq->read) > 7)) {
  853. spin_lock_irqsave(&rxq->lock, flags);
  854. rxq->need_update = 1;
  855. spin_unlock_irqrestore(&rxq->lock, flags);
  856. iwl_rx_queue_update_write_ptr(priv, rxq);
  857. }
  858. }
  859. /**
  860. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  861. *
  862. * When moving to rx_free an SKB is allocated for the slot.
  863. *
  864. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  865. * This is called as a scheduled work item (except for during initialization)
  866. */
  867. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  868. {
  869. struct iwl_rx_queue *rxq = &priv->rxq;
  870. struct list_head *element;
  871. struct iwl_rx_mem_buffer *rxb;
  872. struct page *page;
  873. unsigned long flags;
  874. gfp_t gfp_mask = priority;
  875. while (1) {
  876. spin_lock_irqsave(&rxq->lock, flags);
  877. if (list_empty(&rxq->rx_used)) {
  878. spin_unlock_irqrestore(&rxq->lock, flags);
  879. return;
  880. }
  881. spin_unlock_irqrestore(&rxq->lock, flags);
  882. if (rxq->free_count > RX_LOW_WATERMARK)
  883. gfp_mask |= __GFP_NOWARN;
  884. if (priv->hw_params.rx_page_order > 0)
  885. gfp_mask |= __GFP_COMP;
  886. /* Alloc a new receive buffer */
  887. page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
  888. if (!page) {
  889. if (net_ratelimit())
  890. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  891. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  892. net_ratelimit())
  893. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  894. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  895. rxq->free_count);
  896. /* We don't reschedule replenish work here -- we will
  897. * call the restock method and if it still needs
  898. * more buffers it will schedule replenish */
  899. break;
  900. }
  901. spin_lock_irqsave(&rxq->lock, flags);
  902. if (list_empty(&rxq->rx_used)) {
  903. spin_unlock_irqrestore(&rxq->lock, flags);
  904. __free_pages(page, priv->hw_params.rx_page_order);
  905. return;
  906. }
  907. element = rxq->rx_used.next;
  908. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  909. list_del(element);
  910. spin_unlock_irqrestore(&rxq->lock, flags);
  911. rxb->page = page;
  912. /* Get physical address of RB/SKB */
  913. rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
  914. PAGE_SIZE << priv->hw_params.rx_page_order,
  915. PCI_DMA_FROMDEVICE);
  916. spin_lock_irqsave(&rxq->lock, flags);
  917. list_add_tail(&rxb->list, &rxq->rx_free);
  918. rxq->free_count++;
  919. priv->alloc_rxb_page++;
  920. spin_unlock_irqrestore(&rxq->lock, flags);
  921. }
  922. }
  923. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  924. {
  925. unsigned long flags;
  926. int i;
  927. spin_lock_irqsave(&rxq->lock, flags);
  928. INIT_LIST_HEAD(&rxq->rx_free);
  929. INIT_LIST_HEAD(&rxq->rx_used);
  930. /* Fill the rx_used queue with _all_ of the Rx buffers */
  931. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  932. /* In the reset function, these buffers may have been allocated
  933. * to an SKB, so we need to unmap and free potential storage */
  934. if (rxq->pool[i].page != NULL) {
  935. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  936. PAGE_SIZE << priv->hw_params.rx_page_order,
  937. PCI_DMA_FROMDEVICE);
  938. __iwl_free_pages(priv, rxq->pool[i].page);
  939. rxq->pool[i].page = NULL;
  940. }
  941. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  942. }
  943. /* Set us so that we have processed and used all buffers, but have
  944. * not restocked the Rx queue with fresh buffers */
  945. rxq->read = rxq->write = 0;
  946. rxq->write_actual = 0;
  947. rxq->free_count = 0;
  948. spin_unlock_irqrestore(&rxq->lock, flags);
  949. }
  950. void iwl3945_rx_replenish(void *data)
  951. {
  952. struct iwl_priv *priv = data;
  953. unsigned long flags;
  954. iwl3945_rx_allocate(priv, GFP_KERNEL);
  955. spin_lock_irqsave(&priv->lock, flags);
  956. iwl3945_rx_queue_restock(priv);
  957. spin_unlock_irqrestore(&priv->lock, flags);
  958. }
  959. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  960. {
  961. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  962. iwl3945_rx_queue_restock(priv);
  963. }
  964. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  965. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  966. * This free routine walks the list of POOL entries and if SKB is set to
  967. * non NULL it is unmapped and freed
  968. */
  969. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  970. {
  971. int i;
  972. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  973. if (rxq->pool[i].page != NULL) {
  974. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  975. PAGE_SIZE << priv->hw_params.rx_page_order,
  976. PCI_DMA_FROMDEVICE);
  977. __iwl_free_pages(priv, rxq->pool[i].page);
  978. rxq->pool[i].page = NULL;
  979. }
  980. }
  981. dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  982. rxq->bd_dma);
  983. dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
  984. rxq->rb_stts, rxq->rb_stts_dma);
  985. rxq->bd = NULL;
  986. rxq->rb_stts = NULL;
  987. }
  988. /* Convert linear signal-to-noise ratio into dB */
  989. static u8 ratio2dB[100] = {
  990. /* 0 1 2 3 4 5 6 7 8 9 */
  991. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  992. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  993. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  994. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  995. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  996. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  997. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  998. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  999. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1000. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1001. };
  1002. /* Calculates a relative dB value from a ratio of linear
  1003. * (i.e. not dB) signal levels.
  1004. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1005. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1006. {
  1007. /* 1000:1 or higher just report as 60 dB */
  1008. if (sig_ratio >= 1000)
  1009. return 60;
  1010. /* 100:1 or higher, divide by 10 and use table,
  1011. * add 20 dB to make up for divide by 10 */
  1012. if (sig_ratio >= 100)
  1013. return 20 + (int)ratio2dB[sig_ratio/10];
  1014. /* We shouldn't see this */
  1015. if (sig_ratio < 1)
  1016. return 0;
  1017. /* Use table for ratios 1:1 - 99:1 */
  1018. return (int)ratio2dB[sig_ratio];
  1019. }
  1020. /**
  1021. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1022. *
  1023. * Uses the priv->rx_handlers callback function array to invoke
  1024. * the appropriate handlers, including command responses,
  1025. * frame-received notifications, and other notifications.
  1026. */
  1027. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1028. {
  1029. struct iwl_rx_mem_buffer *rxb;
  1030. struct iwl_rx_packet *pkt;
  1031. struct iwl_rx_queue *rxq = &priv->rxq;
  1032. u32 r, i;
  1033. int reclaim;
  1034. unsigned long flags;
  1035. u8 fill_rx = 0;
  1036. u32 count = 8;
  1037. int total_empty = 0;
  1038. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1039. * buffer that the driver may process (last buffer filled by ucode). */
  1040. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1041. i = rxq->read;
  1042. /* calculate total frames need to be restock after handling RX */
  1043. total_empty = r - rxq->write_actual;
  1044. if (total_empty < 0)
  1045. total_empty += RX_QUEUE_SIZE;
  1046. if (total_empty > (RX_QUEUE_SIZE / 2))
  1047. fill_rx = 1;
  1048. /* Rx interrupt, but nothing sent from uCode */
  1049. if (i == r)
  1050. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1051. while (i != r) {
  1052. int len;
  1053. rxb = rxq->queue[i];
  1054. /* If an RXB doesn't have a Rx queue slot associated with it,
  1055. * then a bug has been introduced in the queue refilling
  1056. * routines -- catch it here */
  1057. BUG_ON(rxb == NULL);
  1058. rxq->queue[i] = NULL;
  1059. pci_unmap_page(priv->pci_dev, rxb->page_dma,
  1060. PAGE_SIZE << priv->hw_params.rx_page_order,
  1061. PCI_DMA_FROMDEVICE);
  1062. pkt = rxb_addr(rxb);
  1063. len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1064. len += sizeof(u32); /* account for status word */
  1065. trace_iwlwifi_dev_rx(priv, pkt, len);
  1066. /* Reclaim a command buffer only if this packet is a response
  1067. * to a (driver-originated) command.
  1068. * If the packet (e.g. Rx frame) originated from uCode,
  1069. * there is no command buffer to reclaim.
  1070. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1071. * but apparently a few don't get set; catch them here. */
  1072. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1073. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1074. (pkt->hdr.cmd != REPLY_TX);
  1075. /* Based on type of command response or notification,
  1076. * handle those that need handling via function in
  1077. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1078. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1079. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1080. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1081. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1082. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1083. } else {
  1084. /* No handling needed */
  1085. IWL_DEBUG_RX(priv,
  1086. "r %d i %d No handler needed for %s, 0x%02x\n",
  1087. r, i, get_cmd_string(pkt->hdr.cmd),
  1088. pkt->hdr.cmd);
  1089. }
  1090. /*
  1091. * XXX: After here, we should always check rxb->page
  1092. * against NULL before touching it or its virtual
  1093. * memory (pkt). Because some rx_handler might have
  1094. * already taken or freed the pages.
  1095. */
  1096. if (reclaim) {
  1097. /* Invoke any callbacks, transfer the buffer to caller,
  1098. * and fire off the (possibly) blocking iwl_send_cmd()
  1099. * as we reclaim the driver command queue */
  1100. if (rxb->page)
  1101. iwl_tx_cmd_complete(priv, rxb);
  1102. else
  1103. IWL_WARN(priv, "Claim null rxb?\n");
  1104. }
  1105. /* Reuse the page if possible. For notification packets and
  1106. * SKBs that fail to Rx correctly, add them back into the
  1107. * rx_free list for reuse later. */
  1108. spin_lock_irqsave(&rxq->lock, flags);
  1109. if (rxb->page != NULL) {
  1110. rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
  1111. 0, PAGE_SIZE << priv->hw_params.rx_page_order,
  1112. PCI_DMA_FROMDEVICE);
  1113. list_add_tail(&rxb->list, &rxq->rx_free);
  1114. rxq->free_count++;
  1115. } else
  1116. list_add_tail(&rxb->list, &rxq->rx_used);
  1117. spin_unlock_irqrestore(&rxq->lock, flags);
  1118. i = (i + 1) & RX_QUEUE_MASK;
  1119. /* If there are a lot of unused frames,
  1120. * restock the Rx queue so ucode won't assert. */
  1121. if (fill_rx) {
  1122. count++;
  1123. if (count >= 8) {
  1124. rxq->read = i;
  1125. iwl3945_rx_replenish_now(priv);
  1126. count = 0;
  1127. }
  1128. }
  1129. }
  1130. /* Backtrack one entry */
  1131. rxq->read = i;
  1132. if (fill_rx)
  1133. iwl3945_rx_replenish_now(priv);
  1134. else
  1135. iwl3945_rx_queue_restock(priv);
  1136. }
  1137. /* call this function to flush any scheduled tasklet */
  1138. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1139. {
  1140. /* wait to make sure we flush pending tasklet*/
  1141. synchronize_irq(priv->pci_dev->irq);
  1142. tasklet_kill(&priv->irq_tasklet);
  1143. }
  1144. static const char *desc_lookup(int i)
  1145. {
  1146. switch (i) {
  1147. case 1:
  1148. return "FAIL";
  1149. case 2:
  1150. return "BAD_PARAM";
  1151. case 3:
  1152. return "BAD_CHECKSUM";
  1153. case 4:
  1154. return "NMI_INTERRUPT";
  1155. case 5:
  1156. return "SYSASSERT";
  1157. case 6:
  1158. return "FATAL_ERROR";
  1159. }
  1160. return "UNKNOWN";
  1161. }
  1162. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1163. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1164. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1165. {
  1166. u32 i;
  1167. u32 desc, time, count, base, data1;
  1168. u32 blink1, blink2, ilink1, ilink2;
  1169. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1170. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1171. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1172. return;
  1173. }
  1174. count = iwl_read_targ_mem(priv, base);
  1175. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1176. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1177. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1178. priv->status, count);
  1179. }
  1180. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1181. "ilink1 nmiPC Line\n");
  1182. for (i = ERROR_START_OFFSET;
  1183. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1184. i += ERROR_ELEM_SIZE) {
  1185. desc = iwl_read_targ_mem(priv, base + i);
  1186. time =
  1187. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1188. blink1 =
  1189. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1190. blink2 =
  1191. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1192. ilink1 =
  1193. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1194. ilink2 =
  1195. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1196. data1 =
  1197. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1198. IWL_ERR(priv,
  1199. "%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1200. desc_lookup(desc), desc, time, blink1, blink2,
  1201. ilink1, ilink2, data1);
  1202. trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
  1203. 0, blink1, blink2, ilink1, ilink2);
  1204. }
  1205. }
  1206. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1207. /**
  1208. * iwl3945_print_event_log - Dump error event log to syslog
  1209. *
  1210. */
  1211. static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1212. u32 num_events, u32 mode,
  1213. int pos, char **buf, size_t bufsz)
  1214. {
  1215. u32 i;
  1216. u32 base; /* SRAM byte address of event log header */
  1217. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1218. u32 ptr; /* SRAM byte address of log data */
  1219. u32 ev, time, data; /* event log data */
  1220. unsigned long reg_flags;
  1221. if (num_events == 0)
  1222. return pos;
  1223. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1224. if (mode == 0)
  1225. event_size = 2 * sizeof(u32);
  1226. else
  1227. event_size = 3 * sizeof(u32);
  1228. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1229. /* Make sure device is powered up for SRAM reads */
  1230. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  1231. iwl_grab_nic_access(priv);
  1232. /* Set starting address; reads will auto-increment */
  1233. _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
  1234. rmb();
  1235. /* "time" is actually "data" for mode 0 (no timestamp).
  1236. * place event id # at far right for easier visual parsing. */
  1237. for (i = 0; i < num_events; i++) {
  1238. ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1239. time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1240. if (mode == 0) {
  1241. /* data, ev */
  1242. if (bufsz) {
  1243. pos += scnprintf(*buf + pos, bufsz - pos,
  1244. "0x%08x:%04u\n",
  1245. time, ev);
  1246. } else {
  1247. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1248. trace_iwlwifi_dev_ucode_event(priv, 0,
  1249. time, ev);
  1250. }
  1251. } else {
  1252. data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1253. if (bufsz) {
  1254. pos += scnprintf(*buf + pos, bufsz - pos,
  1255. "%010u:0x%08x:%04u\n",
  1256. time, data, ev);
  1257. } else {
  1258. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n",
  1259. time, data, ev);
  1260. trace_iwlwifi_dev_ucode_event(priv, time,
  1261. data, ev);
  1262. }
  1263. }
  1264. }
  1265. /* Allow device to power down */
  1266. iwl_release_nic_access(priv);
  1267. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  1268. return pos;
  1269. }
  1270. /**
  1271. * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
  1272. */
  1273. static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
  1274. u32 num_wraps, u32 next_entry,
  1275. u32 size, u32 mode,
  1276. int pos, char **buf, size_t bufsz)
  1277. {
  1278. /*
  1279. * display the newest DEFAULT_LOG_ENTRIES entries
  1280. * i.e the entries just before the next ont that uCode would fill.
  1281. */
  1282. if (num_wraps) {
  1283. if (next_entry < size) {
  1284. pos = iwl3945_print_event_log(priv,
  1285. capacity - (size - next_entry),
  1286. size - next_entry, mode,
  1287. pos, buf, bufsz);
  1288. pos = iwl3945_print_event_log(priv, 0,
  1289. next_entry, mode,
  1290. pos, buf, bufsz);
  1291. } else
  1292. pos = iwl3945_print_event_log(priv, next_entry - size,
  1293. size, mode,
  1294. pos, buf, bufsz);
  1295. } else {
  1296. if (next_entry < size)
  1297. pos = iwl3945_print_event_log(priv, 0,
  1298. next_entry, mode,
  1299. pos, buf, bufsz);
  1300. else
  1301. pos = iwl3945_print_event_log(priv, next_entry - size,
  1302. size, mode,
  1303. pos, buf, bufsz);
  1304. }
  1305. return pos;
  1306. }
  1307. #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
  1308. int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
  1309. char **buf, bool display)
  1310. {
  1311. u32 base; /* SRAM byte address of event log header */
  1312. u32 capacity; /* event log capacity in # entries */
  1313. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1314. u32 num_wraps; /* # times uCode wrapped to top of log */
  1315. u32 next_entry; /* index of next entry to be written by uCode */
  1316. u32 size; /* # entries that we'll print */
  1317. int pos = 0;
  1318. size_t bufsz = 0;
  1319. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1320. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1321. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1322. return -EINVAL;
  1323. }
  1324. /* event log header */
  1325. capacity = iwl_read_targ_mem(priv, base);
  1326. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1327. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1328. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1329. if (capacity > priv->cfg->max_event_log_size) {
  1330. IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
  1331. capacity, priv->cfg->max_event_log_size);
  1332. capacity = priv->cfg->max_event_log_size;
  1333. }
  1334. if (next_entry > priv->cfg->max_event_log_size) {
  1335. IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
  1336. next_entry, priv->cfg->max_event_log_size);
  1337. next_entry = priv->cfg->max_event_log_size;
  1338. }
  1339. size = num_wraps ? capacity : next_entry;
  1340. /* bail out if nothing in log */
  1341. if (size == 0) {
  1342. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1343. return pos;
  1344. }
  1345. #ifdef CONFIG_IWLWIFI_DEBUG
  1346. if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
  1347. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1348. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1349. #else
  1350. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1351. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1352. #endif
  1353. IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
  1354. size);
  1355. #ifdef CONFIG_IWLWIFI_DEBUG
  1356. if (display) {
  1357. if (full_log)
  1358. bufsz = capacity * 48;
  1359. else
  1360. bufsz = size * 48;
  1361. *buf = kmalloc(bufsz, GFP_KERNEL);
  1362. if (!*buf)
  1363. return -ENOMEM;
  1364. }
  1365. if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
  1366. /* if uCode has wrapped back to top of log,
  1367. * start at the oldest entry,
  1368. * i.e the next one that uCode would fill.
  1369. */
  1370. if (num_wraps)
  1371. pos = iwl3945_print_event_log(priv, next_entry,
  1372. capacity - next_entry, mode,
  1373. pos, buf, bufsz);
  1374. /* (then/else) start at top of log */
  1375. pos = iwl3945_print_event_log(priv, 0, next_entry, mode,
  1376. pos, buf, bufsz);
  1377. } else
  1378. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1379. next_entry, size, mode,
  1380. pos, buf, bufsz);
  1381. #else
  1382. pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1383. next_entry, size, mode,
  1384. pos, buf, bufsz);
  1385. #endif
  1386. return pos;
  1387. }
  1388. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1389. {
  1390. u32 inta, handled = 0;
  1391. u32 inta_fh;
  1392. unsigned long flags;
  1393. #ifdef CONFIG_IWLWIFI_DEBUG
  1394. u32 inta_mask;
  1395. #endif
  1396. spin_lock_irqsave(&priv->lock, flags);
  1397. /* Ack/clear/reset pending uCode interrupts.
  1398. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1399. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1400. inta = iwl_read32(priv, CSR_INT);
  1401. iwl_write32(priv, CSR_INT, inta);
  1402. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1403. * Any new interrupts that happen after this, either while we're
  1404. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1405. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1406. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1407. #ifdef CONFIG_IWLWIFI_DEBUG
  1408. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1409. /* just for debug */
  1410. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1411. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1412. inta, inta_mask, inta_fh);
  1413. }
  1414. #endif
  1415. spin_unlock_irqrestore(&priv->lock, flags);
  1416. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1417. * atomic, make sure that inta covers all the interrupts that
  1418. * we've discovered, even if FH interrupt came in just after
  1419. * reading CSR_INT. */
  1420. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1421. inta |= CSR_INT_BIT_FH_RX;
  1422. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1423. inta |= CSR_INT_BIT_FH_TX;
  1424. /* Now service all interrupt bits discovered above. */
  1425. if (inta & CSR_INT_BIT_HW_ERR) {
  1426. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1427. /* Tell the device to stop sending interrupts */
  1428. iwl_disable_interrupts(priv);
  1429. priv->isr_stats.hw++;
  1430. iwl_irq_handle_error(priv);
  1431. handled |= CSR_INT_BIT_HW_ERR;
  1432. return;
  1433. }
  1434. #ifdef CONFIG_IWLWIFI_DEBUG
  1435. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1436. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1437. if (inta & CSR_INT_BIT_SCD) {
  1438. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1439. "the frame/frames.\n");
  1440. priv->isr_stats.sch++;
  1441. }
  1442. /* Alive notification via Rx interrupt will do the real work */
  1443. if (inta & CSR_INT_BIT_ALIVE) {
  1444. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1445. priv->isr_stats.alive++;
  1446. }
  1447. }
  1448. #endif
  1449. /* Safely ignore these bits for debug checks below */
  1450. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1451. /* Error detected by uCode */
  1452. if (inta & CSR_INT_BIT_SW_ERR) {
  1453. IWL_ERR(priv, "Microcode SW error detected. "
  1454. "Restarting 0x%X.\n", inta);
  1455. priv->isr_stats.sw++;
  1456. priv->isr_stats.sw_err = inta;
  1457. iwl_irq_handle_error(priv);
  1458. handled |= CSR_INT_BIT_SW_ERR;
  1459. }
  1460. /* uCode wakes up after power-down sleep */
  1461. if (inta & CSR_INT_BIT_WAKEUP) {
  1462. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1463. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1464. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1465. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1466. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1467. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1468. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1469. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1470. priv->isr_stats.wakeup++;
  1471. handled |= CSR_INT_BIT_WAKEUP;
  1472. }
  1473. /* All uCode command responses, including Tx command responses,
  1474. * Rx "responses" (frame-received notification), and other
  1475. * notifications from uCode come through here*/
  1476. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1477. iwl3945_rx_handle(priv);
  1478. priv->isr_stats.rx++;
  1479. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1480. }
  1481. if (inta & CSR_INT_BIT_FH_TX) {
  1482. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1483. priv->isr_stats.tx++;
  1484. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1485. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1486. (FH39_SRVC_CHNL), 0x0);
  1487. handled |= CSR_INT_BIT_FH_TX;
  1488. }
  1489. if (inta & ~handled) {
  1490. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1491. priv->isr_stats.unhandled++;
  1492. }
  1493. if (inta & ~priv->inta_mask) {
  1494. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1495. inta & ~priv->inta_mask);
  1496. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1497. }
  1498. /* Re-enable all interrupts */
  1499. /* only Re-enable if disabled by irq */
  1500. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1501. iwl_enable_interrupts(priv);
  1502. #ifdef CONFIG_IWLWIFI_DEBUG
  1503. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1504. inta = iwl_read32(priv, CSR_INT);
  1505. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1506. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1507. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1508. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1509. }
  1510. #endif
  1511. }
  1512. static int iwl3945_get_single_channel_for_scan(struct iwl_priv *priv,
  1513. struct ieee80211_vif *vif,
  1514. enum ieee80211_band band,
  1515. struct iwl3945_scan_channel *scan_ch)
  1516. {
  1517. const struct ieee80211_supported_band *sband;
  1518. u16 passive_dwell = 0;
  1519. u16 active_dwell = 0;
  1520. int added = 0;
  1521. u8 channel = 0;
  1522. sband = iwl_get_hw_mode(priv, band);
  1523. if (!sband) {
  1524. IWL_ERR(priv, "invalid band\n");
  1525. return added;
  1526. }
  1527. active_dwell = iwl_get_active_dwell_time(priv, band, 0);
  1528. passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
  1529. if (passive_dwell <= active_dwell)
  1530. passive_dwell = active_dwell + 1;
  1531. channel = iwl_get_single_channel_number(priv, band);
  1532. if (channel) {
  1533. scan_ch->channel = channel;
  1534. scan_ch->type = 0; /* passive */
  1535. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1536. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1537. /* Set txpower levels to defaults */
  1538. scan_ch->tpc.dsp_atten = 110;
  1539. if (band == IEEE80211_BAND_5GHZ)
  1540. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1541. else
  1542. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1543. added++;
  1544. } else
  1545. IWL_ERR(priv, "no valid channel found\n");
  1546. return added;
  1547. }
  1548. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1549. enum ieee80211_band band,
  1550. u8 is_active, u8 n_probes,
  1551. struct iwl3945_scan_channel *scan_ch,
  1552. struct ieee80211_vif *vif)
  1553. {
  1554. struct ieee80211_channel *chan;
  1555. const struct ieee80211_supported_band *sband;
  1556. const struct iwl_channel_info *ch_info;
  1557. u16 passive_dwell = 0;
  1558. u16 active_dwell = 0;
  1559. int added, i;
  1560. sband = iwl_get_hw_mode(priv, band);
  1561. if (!sband)
  1562. return 0;
  1563. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1564. passive_dwell = iwl_get_passive_dwell_time(priv, band, vif);
  1565. if (passive_dwell <= active_dwell)
  1566. passive_dwell = active_dwell + 1;
  1567. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1568. chan = priv->scan_request->channels[i];
  1569. if (chan->band != band)
  1570. continue;
  1571. scan_ch->channel = chan->hw_value;
  1572. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1573. if (!is_channel_valid(ch_info)) {
  1574. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1575. scan_ch->channel);
  1576. continue;
  1577. }
  1578. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1579. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1580. /* If passive , set up for auto-switch
  1581. * and use long active_dwell time.
  1582. */
  1583. if (!is_active || is_channel_passive(ch_info) ||
  1584. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1585. scan_ch->type = 0; /* passive */
  1586. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1587. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1588. } else {
  1589. scan_ch->type = 1; /* active */
  1590. }
  1591. /* Set direct probe bits. These may be used both for active
  1592. * scan channels (probes gets sent right away),
  1593. * or for passive channels (probes get se sent only after
  1594. * hearing clear Rx packet).*/
  1595. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1596. if (n_probes)
  1597. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1598. } else {
  1599. /* uCode v1 does not allow setting direct probe bits on
  1600. * passive channel. */
  1601. if ((scan_ch->type & 1) && n_probes)
  1602. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1603. }
  1604. /* Set txpower levels to defaults */
  1605. scan_ch->tpc.dsp_atten = 110;
  1606. /* scan_pwr_info->tpc.dsp_atten; */
  1607. /*scan_pwr_info->tpc.tx_gain; */
  1608. if (band == IEEE80211_BAND_5GHZ)
  1609. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1610. else {
  1611. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1612. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1613. * power level:
  1614. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1615. */
  1616. }
  1617. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1618. scan_ch->channel,
  1619. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1620. (scan_ch->type & 1) ?
  1621. active_dwell : passive_dwell);
  1622. scan_ch++;
  1623. added++;
  1624. }
  1625. IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
  1626. return added;
  1627. }
  1628. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1629. struct ieee80211_rate *rates)
  1630. {
  1631. int i;
  1632. for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
  1633. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1634. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1635. rates[i].hw_value_short = i;
  1636. rates[i].flags = 0;
  1637. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1638. /*
  1639. * If CCK != 1M then set short preamble rate flag.
  1640. */
  1641. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1642. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1643. }
  1644. }
  1645. }
  1646. /******************************************************************************
  1647. *
  1648. * uCode download functions
  1649. *
  1650. ******************************************************************************/
  1651. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1652. {
  1653. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1654. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1655. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1656. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1657. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1658. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1659. }
  1660. /**
  1661. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1662. * looking at all data.
  1663. */
  1664. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1665. {
  1666. u32 val;
  1667. u32 save_len = len;
  1668. int rc = 0;
  1669. u32 errcnt;
  1670. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1671. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1672. IWL39_RTC_INST_LOWER_BOUND);
  1673. errcnt = 0;
  1674. for (; len > 0; len -= sizeof(u32), image++) {
  1675. /* read data comes through single port, auto-incr addr */
  1676. /* NOTE: Use the debugless read so we don't flood kernel log
  1677. * if IWL_DL_IO is set */
  1678. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1679. if (val != le32_to_cpu(*image)) {
  1680. IWL_ERR(priv, "uCode INST section is invalid at "
  1681. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1682. save_len - len, val, le32_to_cpu(*image));
  1683. rc = -EIO;
  1684. errcnt++;
  1685. if (errcnt >= 20)
  1686. break;
  1687. }
  1688. }
  1689. if (!errcnt)
  1690. IWL_DEBUG_INFO(priv,
  1691. "ucode image in INSTRUCTION memory is good\n");
  1692. return rc;
  1693. }
  1694. /**
  1695. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1696. * using sample data 100 bytes apart. If these sample points are good,
  1697. * it's a pretty good bet that everything between them is good, too.
  1698. */
  1699. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1700. {
  1701. u32 val;
  1702. int rc = 0;
  1703. u32 errcnt = 0;
  1704. u32 i;
  1705. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1706. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1707. /* read data comes through single port, auto-incr addr */
  1708. /* NOTE: Use the debugless read so we don't flood kernel log
  1709. * if IWL_DL_IO is set */
  1710. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1711. i + IWL39_RTC_INST_LOWER_BOUND);
  1712. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1713. if (val != le32_to_cpu(*image)) {
  1714. #if 0 /* Enable this if you want to see details */
  1715. IWL_ERR(priv, "uCode INST section is invalid at "
  1716. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1717. i, val, *image);
  1718. #endif
  1719. rc = -EIO;
  1720. errcnt++;
  1721. if (errcnt >= 3)
  1722. break;
  1723. }
  1724. }
  1725. return rc;
  1726. }
  1727. /**
  1728. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1729. * and verify its contents
  1730. */
  1731. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1732. {
  1733. __le32 *image;
  1734. u32 len;
  1735. int rc = 0;
  1736. /* Try bootstrap */
  1737. image = (__le32 *)priv->ucode_boot.v_addr;
  1738. len = priv->ucode_boot.len;
  1739. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1740. if (rc == 0) {
  1741. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1742. return 0;
  1743. }
  1744. /* Try initialize */
  1745. image = (__le32 *)priv->ucode_init.v_addr;
  1746. len = priv->ucode_init.len;
  1747. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1748. if (rc == 0) {
  1749. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1750. return 0;
  1751. }
  1752. /* Try runtime/protocol */
  1753. image = (__le32 *)priv->ucode_code.v_addr;
  1754. len = priv->ucode_code.len;
  1755. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1756. if (rc == 0) {
  1757. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1758. return 0;
  1759. }
  1760. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1761. /* Since nothing seems to match, show first several data entries in
  1762. * instruction SRAM, so maybe visual inspection will give a clue.
  1763. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1764. image = (__le32 *)priv->ucode_boot.v_addr;
  1765. len = priv->ucode_boot.len;
  1766. rc = iwl3945_verify_inst_full(priv, image, len);
  1767. return rc;
  1768. }
  1769. static void iwl3945_nic_start(struct iwl_priv *priv)
  1770. {
  1771. /* Remove all resets to allow NIC to operate */
  1772. iwl_write32(priv, CSR_RESET, 0);
  1773. }
  1774. #define IWL3945_UCODE_GET(item) \
  1775. static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode)\
  1776. { \
  1777. return le32_to_cpu(ucode->u.v1.item); \
  1778. }
  1779. static u32 iwl3945_ucode_get_header_size(u32 api_ver)
  1780. {
  1781. return 24;
  1782. }
  1783. static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode)
  1784. {
  1785. return (u8 *) ucode->u.v1.data;
  1786. }
  1787. IWL3945_UCODE_GET(inst_size);
  1788. IWL3945_UCODE_GET(data_size);
  1789. IWL3945_UCODE_GET(init_size);
  1790. IWL3945_UCODE_GET(init_data_size);
  1791. IWL3945_UCODE_GET(boot_size);
  1792. /**
  1793. * iwl3945_read_ucode - Read uCode images from disk file.
  1794. *
  1795. * Copy into buffers for card to fetch via bus-mastering
  1796. */
  1797. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1798. {
  1799. const struct iwl_ucode_header *ucode;
  1800. int ret = -EINVAL, index;
  1801. const struct firmware *ucode_raw;
  1802. /* firmware file name contains uCode/driver compatibility version */
  1803. const char *name_pre = priv->cfg->fw_name_pre;
  1804. const unsigned int api_max = priv->cfg->ucode_api_max;
  1805. const unsigned int api_min = priv->cfg->ucode_api_min;
  1806. char buf[25];
  1807. u8 *src;
  1808. size_t len;
  1809. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1810. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1811. * request_firmware() is synchronous, file is in memory on return. */
  1812. for (index = api_max; index >= api_min; index--) {
  1813. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1814. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1815. if (ret < 0) {
  1816. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1817. buf, ret);
  1818. if (ret == -ENOENT)
  1819. continue;
  1820. else
  1821. goto error;
  1822. } else {
  1823. if (index < api_max)
  1824. IWL_ERR(priv, "Loaded firmware %s, "
  1825. "which is deprecated. "
  1826. " Please use API v%u instead.\n",
  1827. buf, api_max);
  1828. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1829. "(%zd bytes) from disk\n",
  1830. buf, ucode_raw->size);
  1831. break;
  1832. }
  1833. }
  1834. if (ret < 0)
  1835. goto error;
  1836. /* Make sure that we got at least our header! */
  1837. if (ucode_raw->size < iwl3945_ucode_get_header_size(1)) {
  1838. IWL_ERR(priv, "File size way too small!\n");
  1839. ret = -EINVAL;
  1840. goto err_release;
  1841. }
  1842. /* Data from ucode file: header followed by uCode images */
  1843. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1844. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1845. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1846. inst_size = iwl3945_ucode_get_inst_size(ucode);
  1847. data_size = iwl3945_ucode_get_data_size(ucode);
  1848. init_size = iwl3945_ucode_get_init_size(ucode);
  1849. init_data_size = iwl3945_ucode_get_init_data_size(ucode);
  1850. boot_size = iwl3945_ucode_get_boot_size(ucode);
  1851. src = iwl3945_ucode_get_data(ucode);
  1852. /* api_ver should match the api version forming part of the
  1853. * firmware filename ... but we don't check for that and only rely
  1854. * on the API version read from firmware header from here on forward */
  1855. if (api_ver < api_min || api_ver > api_max) {
  1856. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1857. "Driver supports v%u, firmware is v%u.\n",
  1858. api_max, api_ver);
  1859. priv->ucode_ver = 0;
  1860. ret = -EINVAL;
  1861. goto err_release;
  1862. }
  1863. if (api_ver != api_max)
  1864. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1865. "got %u. New firmware can be obtained "
  1866. "from http://www.intellinuxwireless.org.\n",
  1867. api_max, api_ver);
  1868. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1869. IWL_UCODE_MAJOR(priv->ucode_ver),
  1870. IWL_UCODE_MINOR(priv->ucode_ver),
  1871. IWL_UCODE_API(priv->ucode_ver),
  1872. IWL_UCODE_SERIAL(priv->ucode_ver));
  1873. snprintf(priv->hw->wiphy->fw_version,
  1874. sizeof(priv->hw->wiphy->fw_version),
  1875. "%u.%u.%u.%u",
  1876. IWL_UCODE_MAJOR(priv->ucode_ver),
  1877. IWL_UCODE_MINOR(priv->ucode_ver),
  1878. IWL_UCODE_API(priv->ucode_ver),
  1879. IWL_UCODE_SERIAL(priv->ucode_ver));
  1880. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1881. priv->ucode_ver);
  1882. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1883. inst_size);
  1884. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1885. data_size);
  1886. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1887. init_size);
  1888. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1889. init_data_size);
  1890. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1891. boot_size);
  1892. /* Verify size of file vs. image size info in file's header */
  1893. if (ucode_raw->size != iwl3945_ucode_get_header_size(api_ver) +
  1894. inst_size + data_size + init_size +
  1895. init_data_size + boot_size) {
  1896. IWL_DEBUG_INFO(priv,
  1897. "uCode file size %zd does not match expected size\n",
  1898. ucode_raw->size);
  1899. ret = -EINVAL;
  1900. goto err_release;
  1901. }
  1902. /* Verify that uCode images will fit in card's SRAM */
  1903. if (inst_size > IWL39_MAX_INST_SIZE) {
  1904. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1905. inst_size);
  1906. ret = -EINVAL;
  1907. goto err_release;
  1908. }
  1909. if (data_size > IWL39_MAX_DATA_SIZE) {
  1910. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1911. data_size);
  1912. ret = -EINVAL;
  1913. goto err_release;
  1914. }
  1915. if (init_size > IWL39_MAX_INST_SIZE) {
  1916. IWL_DEBUG_INFO(priv,
  1917. "uCode init instr len %d too large to fit in\n",
  1918. init_size);
  1919. ret = -EINVAL;
  1920. goto err_release;
  1921. }
  1922. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1923. IWL_DEBUG_INFO(priv,
  1924. "uCode init data len %d too large to fit in\n",
  1925. init_data_size);
  1926. ret = -EINVAL;
  1927. goto err_release;
  1928. }
  1929. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1930. IWL_DEBUG_INFO(priv,
  1931. "uCode boot instr len %d too large to fit in\n",
  1932. boot_size);
  1933. ret = -EINVAL;
  1934. goto err_release;
  1935. }
  1936. /* Allocate ucode buffers for card's bus-master loading ... */
  1937. /* Runtime instructions and 2 copies of data:
  1938. * 1) unmodified from disk
  1939. * 2) backup cache for save/restore during power-downs */
  1940. priv->ucode_code.len = inst_size;
  1941. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1942. priv->ucode_data.len = data_size;
  1943. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1944. priv->ucode_data_backup.len = data_size;
  1945. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1946. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1947. !priv->ucode_data_backup.v_addr)
  1948. goto err_pci_alloc;
  1949. /* Initialization instructions and data */
  1950. if (init_size && init_data_size) {
  1951. priv->ucode_init.len = init_size;
  1952. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1953. priv->ucode_init_data.len = init_data_size;
  1954. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1955. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1956. goto err_pci_alloc;
  1957. }
  1958. /* Bootstrap (instructions only, no data) */
  1959. if (boot_size) {
  1960. priv->ucode_boot.len = boot_size;
  1961. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1962. if (!priv->ucode_boot.v_addr)
  1963. goto err_pci_alloc;
  1964. }
  1965. /* Copy images into buffers for card's bus-master reads ... */
  1966. /* Runtime instructions (first block of data in file) */
  1967. len = inst_size;
  1968. IWL_DEBUG_INFO(priv,
  1969. "Copying (but not loading) uCode instr len %zd\n", len);
  1970. memcpy(priv->ucode_code.v_addr, src, len);
  1971. src += len;
  1972. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1973. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1974. /* Runtime data (2nd block)
  1975. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1976. len = data_size;
  1977. IWL_DEBUG_INFO(priv,
  1978. "Copying (but not loading) uCode data len %zd\n", len);
  1979. memcpy(priv->ucode_data.v_addr, src, len);
  1980. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1981. src += len;
  1982. /* Initialization instructions (3rd block) */
  1983. if (init_size) {
  1984. len = init_size;
  1985. IWL_DEBUG_INFO(priv,
  1986. "Copying (but not loading) init instr len %zd\n", len);
  1987. memcpy(priv->ucode_init.v_addr, src, len);
  1988. src += len;
  1989. }
  1990. /* Initialization data (4th block) */
  1991. if (init_data_size) {
  1992. len = init_data_size;
  1993. IWL_DEBUG_INFO(priv,
  1994. "Copying (but not loading) init data len %zd\n", len);
  1995. memcpy(priv->ucode_init_data.v_addr, src, len);
  1996. src += len;
  1997. }
  1998. /* Bootstrap instructions (5th block) */
  1999. len = boot_size;
  2000. IWL_DEBUG_INFO(priv,
  2001. "Copying (but not loading) boot instr len %zd\n", len);
  2002. memcpy(priv->ucode_boot.v_addr, src, len);
  2003. /* We have our copies now, allow OS release its copies */
  2004. release_firmware(ucode_raw);
  2005. return 0;
  2006. err_pci_alloc:
  2007. IWL_ERR(priv, "failed to allocate pci memory\n");
  2008. ret = -ENOMEM;
  2009. iwl3945_dealloc_ucode_pci(priv);
  2010. err_release:
  2011. release_firmware(ucode_raw);
  2012. error:
  2013. return ret;
  2014. }
  2015. /**
  2016. * iwl3945_set_ucode_ptrs - Set uCode address location
  2017. *
  2018. * Tell initialization uCode where to find runtime uCode.
  2019. *
  2020. * BSM registers initially contain pointers to initialization uCode.
  2021. * We need to replace them to load runtime uCode inst and data,
  2022. * and to save runtime data when powering down.
  2023. */
  2024. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  2025. {
  2026. dma_addr_t pinst;
  2027. dma_addr_t pdata;
  2028. /* bits 31:0 for 3945 */
  2029. pinst = priv->ucode_code.p_addr;
  2030. pdata = priv->ucode_data_backup.p_addr;
  2031. /* Tell bootstrap uCode where to find image to load */
  2032. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2033. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2034. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2035. priv->ucode_data.len);
  2036. /* Inst byte count must be last to set up, bit 31 signals uCode
  2037. * that all new ptr/size info is in place */
  2038. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2039. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2040. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2041. return 0;
  2042. }
  2043. /**
  2044. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2045. *
  2046. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2047. *
  2048. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2049. */
  2050. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2051. {
  2052. /* Check alive response for "valid" sign from uCode */
  2053. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2054. /* We had an error bringing up the hardware, so take it
  2055. * all the way back down so we can try again */
  2056. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2057. goto restart;
  2058. }
  2059. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2060. * This is a paranoid check, because we would not have gotten the
  2061. * "initialize" alive if code weren't properly loaded. */
  2062. if (iwl3945_verify_ucode(priv)) {
  2063. /* Runtime instruction load was bad;
  2064. * take it all the way back down so we can try again */
  2065. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2066. goto restart;
  2067. }
  2068. /* Send pointers to protocol/runtime uCode image ... init code will
  2069. * load and launch runtime uCode, which will send us another "Alive"
  2070. * notification. */
  2071. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2072. if (iwl3945_set_ucode_ptrs(priv)) {
  2073. /* Runtime instruction load won't happen;
  2074. * take it all the way back down so we can try again */
  2075. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2076. goto restart;
  2077. }
  2078. return;
  2079. restart:
  2080. queue_work(priv->workqueue, &priv->restart);
  2081. }
  2082. /**
  2083. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2084. * from protocol/runtime uCode (initialization uCode's
  2085. * Alive gets handled by iwl3945_init_alive_start()).
  2086. */
  2087. static void iwl3945_alive_start(struct iwl_priv *priv)
  2088. {
  2089. int thermal_spin = 0;
  2090. u32 rfkill;
  2091. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2092. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2093. /* We had an error bringing up the hardware, so take it
  2094. * all the way back down so we can try again */
  2095. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2096. goto restart;
  2097. }
  2098. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2099. * This is a paranoid check, because we would not have gotten the
  2100. * "runtime" alive if code weren't properly loaded. */
  2101. if (iwl3945_verify_ucode(priv)) {
  2102. /* Runtime instruction load was bad;
  2103. * take it all the way back down so we can try again */
  2104. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2105. goto restart;
  2106. }
  2107. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2108. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2109. if (rfkill & 0x1) {
  2110. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2111. /* if RFKILL is not on, then wait for thermal
  2112. * sensor in adapter to kick in */
  2113. while (iwl3945_hw_get_temperature(priv) == 0) {
  2114. thermal_spin++;
  2115. udelay(10);
  2116. }
  2117. if (thermal_spin)
  2118. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2119. thermal_spin * 10);
  2120. } else
  2121. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2122. /* After the ALIVE response, we can send commands to 3945 uCode */
  2123. set_bit(STATUS_ALIVE, &priv->status);
  2124. if (priv->cfg->ops->lib->recover_from_tx_stall) {
  2125. /* Enable timer to monitor the driver queues */
  2126. mod_timer(&priv->monitor_recover,
  2127. jiffies +
  2128. msecs_to_jiffies(priv->cfg->monitor_recover_period));
  2129. }
  2130. if (iwl_is_rfkill(priv))
  2131. return;
  2132. ieee80211_wake_queues(priv->hw);
  2133. priv->active_rate = IWL_RATES_MASK;
  2134. iwl_power_update_mode(priv, true);
  2135. if (iwl_is_associated(priv)) {
  2136. struct iwl3945_rxon_cmd *active_rxon =
  2137. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2138. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2139. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2140. } else {
  2141. /* Initialize our rx_config data */
  2142. iwl_connection_init_rx_config(priv, NULL);
  2143. }
  2144. /* Configure Bluetooth device coexistence support */
  2145. priv->cfg->ops->hcmd->send_bt_config(priv);
  2146. /* Configure the adapter for unassociated operation */
  2147. iwlcore_commit_rxon(priv);
  2148. iwl3945_reg_txpower_periodic(priv);
  2149. iwl_leds_init(priv);
  2150. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2151. set_bit(STATUS_READY, &priv->status);
  2152. wake_up_interruptible(&priv->wait_command_queue);
  2153. return;
  2154. restart:
  2155. queue_work(priv->workqueue, &priv->restart);
  2156. }
  2157. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2158. static void __iwl3945_down(struct iwl_priv *priv)
  2159. {
  2160. unsigned long flags;
  2161. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2162. struct ieee80211_conf *conf = NULL;
  2163. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2164. conf = ieee80211_get_hw_conf(priv->hw);
  2165. if (!exit_pending)
  2166. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2167. /* Station information will now be cleared in device */
  2168. iwl_clear_ucode_stations(priv);
  2169. iwl_dealloc_bcast_station(priv);
  2170. iwl_clear_driver_stations(priv);
  2171. /* Unblock any waiting calls */
  2172. wake_up_interruptible_all(&priv->wait_command_queue);
  2173. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2174. * exiting the module */
  2175. if (!exit_pending)
  2176. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2177. /* stop and reset the on-board processor */
  2178. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2179. /* tell the device to stop sending interrupts */
  2180. spin_lock_irqsave(&priv->lock, flags);
  2181. iwl_disable_interrupts(priv);
  2182. spin_unlock_irqrestore(&priv->lock, flags);
  2183. iwl_synchronize_irq(priv);
  2184. if (priv->mac80211_registered)
  2185. ieee80211_stop_queues(priv->hw);
  2186. /* If we have not previously called iwl3945_init() then
  2187. * clear all bits but the RF Kill bits and return */
  2188. if (!iwl_is_init(priv)) {
  2189. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2190. STATUS_RF_KILL_HW |
  2191. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2192. STATUS_GEO_CONFIGURED |
  2193. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2194. STATUS_EXIT_PENDING;
  2195. goto exit;
  2196. }
  2197. /* ...otherwise clear out all the status bits but the RF Kill
  2198. * bit and continue taking the NIC down. */
  2199. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2200. STATUS_RF_KILL_HW |
  2201. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2202. STATUS_GEO_CONFIGURED |
  2203. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2204. STATUS_FW_ERROR |
  2205. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2206. STATUS_EXIT_PENDING;
  2207. iwl3945_hw_txq_ctx_stop(priv);
  2208. iwl3945_hw_rxq_stop(priv);
  2209. /* Power-down device's busmaster DMA clocks */
  2210. iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  2211. udelay(5);
  2212. /* Stop the device, and put it in low power state */
  2213. priv->cfg->ops->lib->apm_ops.stop(priv);
  2214. exit:
  2215. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2216. if (priv->ibss_beacon)
  2217. dev_kfree_skb(priv->ibss_beacon);
  2218. priv->ibss_beacon = NULL;
  2219. /* clear out any free frames */
  2220. iwl3945_clear_free_frames(priv);
  2221. }
  2222. static void iwl3945_down(struct iwl_priv *priv)
  2223. {
  2224. mutex_lock(&priv->mutex);
  2225. __iwl3945_down(priv);
  2226. mutex_unlock(&priv->mutex);
  2227. iwl3945_cancel_deferred_work(priv);
  2228. }
  2229. #define MAX_HW_RESTARTS 5
  2230. static int __iwl3945_up(struct iwl_priv *priv)
  2231. {
  2232. int rc, i;
  2233. rc = iwl_alloc_bcast_station(priv, false);
  2234. if (rc)
  2235. return rc;
  2236. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2237. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2238. return -EIO;
  2239. }
  2240. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2241. IWL_ERR(priv, "ucode not available for device bring up\n");
  2242. return -EIO;
  2243. }
  2244. /* If platform's RF_KILL switch is NOT set to KILL */
  2245. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2246. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2247. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2248. else {
  2249. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2250. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2251. return -ENODEV;
  2252. }
  2253. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2254. rc = iwl3945_hw_nic_init(priv);
  2255. if (rc) {
  2256. IWL_ERR(priv, "Unable to int nic\n");
  2257. return rc;
  2258. }
  2259. /* make sure rfkill handshake bits are cleared */
  2260. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2261. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2262. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2263. /* clear (again), then enable host interrupts */
  2264. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2265. iwl_enable_interrupts(priv);
  2266. /* really make sure rfkill handshake bits are cleared */
  2267. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2268. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2269. /* Copy original ucode data image from disk into backup cache.
  2270. * This will be used to initialize the on-board processor's
  2271. * data SRAM for a clean start when the runtime program first loads. */
  2272. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2273. priv->ucode_data.len);
  2274. /* We return success when we resume from suspend and rf_kill is on. */
  2275. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2276. return 0;
  2277. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2278. /* load bootstrap state machine,
  2279. * load bootstrap program into processor's memory,
  2280. * prepare to load the "initialize" uCode */
  2281. rc = priv->cfg->ops->lib->load_ucode(priv);
  2282. if (rc) {
  2283. IWL_ERR(priv,
  2284. "Unable to set up bootstrap uCode: %d\n", rc);
  2285. continue;
  2286. }
  2287. /* start card; "initialize" will load runtime ucode */
  2288. iwl3945_nic_start(priv);
  2289. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2290. return 0;
  2291. }
  2292. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2293. __iwl3945_down(priv);
  2294. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2295. /* tried to restart and config the device for as long as our
  2296. * patience could withstand */
  2297. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2298. return -EIO;
  2299. }
  2300. /*****************************************************************************
  2301. *
  2302. * Workqueue callbacks
  2303. *
  2304. *****************************************************************************/
  2305. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2306. {
  2307. struct iwl_priv *priv =
  2308. container_of(data, struct iwl_priv, init_alive_start.work);
  2309. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2310. return;
  2311. mutex_lock(&priv->mutex);
  2312. iwl3945_init_alive_start(priv);
  2313. mutex_unlock(&priv->mutex);
  2314. }
  2315. static void iwl3945_bg_alive_start(struct work_struct *data)
  2316. {
  2317. struct iwl_priv *priv =
  2318. container_of(data, struct iwl_priv, alive_start.work);
  2319. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2320. return;
  2321. mutex_lock(&priv->mutex);
  2322. iwl3945_alive_start(priv);
  2323. mutex_unlock(&priv->mutex);
  2324. }
  2325. /*
  2326. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2327. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2328. * *is* readable even when device has been SW_RESET into low power mode
  2329. * (e.g. during RF KILL).
  2330. */
  2331. static void iwl3945_rfkill_poll(struct work_struct *data)
  2332. {
  2333. struct iwl_priv *priv =
  2334. container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
  2335. bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
  2336. bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
  2337. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2338. if (new_rfkill != old_rfkill) {
  2339. if (new_rfkill)
  2340. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2341. else
  2342. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2343. wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
  2344. IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
  2345. new_rfkill ? "disable radio" : "enable radio");
  2346. }
  2347. /* Keep this running, even if radio now enabled. This will be
  2348. * cancelled in mac_start() if system decides to start again */
  2349. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  2350. round_jiffies_relative(2 * HZ));
  2351. }
  2352. void iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
  2353. {
  2354. struct iwl_host_cmd cmd = {
  2355. .id = REPLY_SCAN_CMD,
  2356. .len = sizeof(struct iwl3945_scan_cmd),
  2357. .flags = CMD_SIZE_HUGE,
  2358. };
  2359. struct iwl3945_scan_cmd *scan;
  2360. struct ieee80211_conf *conf = NULL;
  2361. u8 n_probes = 0;
  2362. enum ieee80211_band band;
  2363. bool is_active = false;
  2364. conf = ieee80211_get_hw_conf(priv->hw);
  2365. cancel_delayed_work(&priv->scan_check);
  2366. if (!iwl_is_ready(priv)) {
  2367. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2368. goto done;
  2369. }
  2370. /* Make sure the scan wasn't canceled before this queued work
  2371. * was given the chance to run... */
  2372. if (!test_bit(STATUS_SCANNING, &priv->status))
  2373. goto done;
  2374. /* This should never be called or scheduled if there is currently
  2375. * a scan active in the hardware. */
  2376. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2377. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2378. "Ignoring second request.\n");
  2379. goto done;
  2380. }
  2381. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2382. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2383. goto done;
  2384. }
  2385. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2386. IWL_DEBUG_HC(priv,
  2387. "Scan request while abort pending. Queuing.\n");
  2388. goto done;
  2389. }
  2390. if (iwl_is_rfkill(priv)) {
  2391. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2392. goto done;
  2393. }
  2394. if (!test_bit(STATUS_READY, &priv->status)) {
  2395. IWL_DEBUG_HC(priv,
  2396. "Scan request while uninitialized. Queuing.\n");
  2397. goto done;
  2398. }
  2399. if (!priv->scan_cmd) {
  2400. priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2401. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2402. if (!priv->scan_cmd) {
  2403. IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
  2404. goto done;
  2405. }
  2406. }
  2407. scan = priv->scan_cmd;
  2408. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2409. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2410. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2411. if (iwl_is_associated(priv)) {
  2412. u16 interval = 0;
  2413. u32 extra;
  2414. u32 suspend_time = 100;
  2415. u32 scan_suspend_time = 100;
  2416. unsigned long flags;
  2417. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2418. spin_lock_irqsave(&priv->lock, flags);
  2419. if (priv->is_internal_short_scan)
  2420. interval = 0;
  2421. else
  2422. interval = vif->bss_conf.beacon_int;
  2423. spin_unlock_irqrestore(&priv->lock, flags);
  2424. scan->suspend_time = 0;
  2425. scan->max_out_time = cpu_to_le32(200 * 1024);
  2426. if (!interval)
  2427. interval = suspend_time;
  2428. /*
  2429. * suspend time format:
  2430. * 0-19: beacon interval in usec (time before exec.)
  2431. * 20-23: 0
  2432. * 24-31: number of beacons (suspend between channels)
  2433. */
  2434. extra = (suspend_time / interval) << 24;
  2435. scan_suspend_time = 0xFF0FFFFF &
  2436. (extra | ((suspend_time % interval) * 1024));
  2437. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2438. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2439. scan_suspend_time, interval);
  2440. }
  2441. if (priv->is_internal_short_scan) {
  2442. IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n");
  2443. } else if (priv->scan_request->n_ssids) {
  2444. int i, p = 0;
  2445. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2446. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2447. /* always does wildcard anyway */
  2448. if (!priv->scan_request->ssids[i].ssid_len)
  2449. continue;
  2450. scan->direct_scan[p].id = WLAN_EID_SSID;
  2451. scan->direct_scan[p].len =
  2452. priv->scan_request->ssids[i].ssid_len;
  2453. memcpy(scan->direct_scan[p].ssid,
  2454. priv->scan_request->ssids[i].ssid,
  2455. priv->scan_request->ssids[i].ssid_len);
  2456. n_probes++;
  2457. p++;
  2458. }
  2459. is_active = true;
  2460. } else
  2461. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2462. /* We don't build a direct scan probe request; the uCode will do
  2463. * that based on the direct_mask added to each channel entry */
  2464. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2465. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2466. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2467. /* flags + rate selection */
  2468. switch (priv->scan_band) {
  2469. case IEEE80211_BAND_2GHZ:
  2470. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2471. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2472. scan->good_CRC_th = 0;
  2473. band = IEEE80211_BAND_2GHZ;
  2474. break;
  2475. case IEEE80211_BAND_5GHZ:
  2476. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2477. /*
  2478. * If active scaning is requested but a certain channel
  2479. * is marked passive, we can do active scanning if we
  2480. * detect transmissions.
  2481. */
  2482. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
  2483. IWL_GOOD_CRC_TH_DISABLED;
  2484. band = IEEE80211_BAND_5GHZ;
  2485. break;
  2486. default:
  2487. IWL_WARN(priv, "Invalid scan band\n");
  2488. goto done;
  2489. }
  2490. if (!priv->is_internal_short_scan) {
  2491. scan->tx_cmd.len = cpu_to_le16(
  2492. iwl_fill_probe_req(priv,
  2493. (struct ieee80211_mgmt *)scan->data,
  2494. vif->addr,
  2495. priv->scan_request->ie,
  2496. priv->scan_request->ie_len,
  2497. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2498. } else {
  2499. /* use bcast addr, will not be transmitted but must be valid */
  2500. scan->tx_cmd.len = cpu_to_le16(
  2501. iwl_fill_probe_req(priv,
  2502. (struct ieee80211_mgmt *)scan->data,
  2503. iwl_bcast_addr, NULL, 0,
  2504. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2505. }
  2506. /* select Rx antennas */
  2507. scan->flags |= iwl3945_get_antenna_flags(priv);
  2508. if (priv->is_internal_short_scan) {
  2509. scan->channel_count =
  2510. iwl3945_get_single_channel_for_scan(priv, vif, band,
  2511. (void *)&scan->data[le16_to_cpu(
  2512. scan->tx_cmd.len)]);
  2513. } else {
  2514. scan->channel_count =
  2515. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2516. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)], vif);
  2517. }
  2518. if (scan->channel_count == 0) {
  2519. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2520. goto done;
  2521. }
  2522. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2523. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2524. cmd.data = scan;
  2525. scan->len = cpu_to_le16(cmd.len);
  2526. set_bit(STATUS_SCAN_HW, &priv->status);
  2527. if (iwl_send_cmd_sync(priv, &cmd))
  2528. goto done;
  2529. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2530. IWL_SCAN_CHECK_WATCHDOG);
  2531. return;
  2532. done:
  2533. /* can not perform scan make sure we clear scanning
  2534. * bits from status so next scan request can be performed.
  2535. * if we dont clear scanning status bit here all next scan
  2536. * will fail
  2537. */
  2538. clear_bit(STATUS_SCAN_HW, &priv->status);
  2539. clear_bit(STATUS_SCANNING, &priv->status);
  2540. /* inform mac80211 scan aborted */
  2541. queue_work(priv->workqueue, &priv->scan_completed);
  2542. }
  2543. static void iwl3945_bg_restart(struct work_struct *data)
  2544. {
  2545. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2546. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2547. return;
  2548. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2549. mutex_lock(&priv->mutex);
  2550. priv->vif = NULL;
  2551. priv->is_open = 0;
  2552. mutex_unlock(&priv->mutex);
  2553. iwl3945_down(priv);
  2554. ieee80211_restart_hw(priv->hw);
  2555. } else {
  2556. iwl3945_down(priv);
  2557. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2558. return;
  2559. mutex_lock(&priv->mutex);
  2560. __iwl3945_up(priv);
  2561. mutex_unlock(&priv->mutex);
  2562. }
  2563. }
  2564. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2565. {
  2566. struct iwl_priv *priv =
  2567. container_of(data, struct iwl_priv, rx_replenish);
  2568. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2569. return;
  2570. mutex_lock(&priv->mutex);
  2571. iwl3945_rx_replenish(priv);
  2572. mutex_unlock(&priv->mutex);
  2573. }
  2574. void iwl3945_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
  2575. {
  2576. int rc = 0;
  2577. struct ieee80211_conf *conf = NULL;
  2578. if (!vif || !priv->is_open)
  2579. return;
  2580. if (vif->type == NL80211_IFTYPE_AP) {
  2581. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2582. return;
  2583. }
  2584. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2585. vif->bss_conf.aid, priv->active_rxon.bssid_addr);
  2586. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2587. return;
  2588. iwl_scan_cancel_timeout(priv, 200);
  2589. conf = ieee80211_get_hw_conf(priv->hw);
  2590. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2591. iwlcore_commit_rxon(priv);
  2592. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2593. iwl_setup_rxon_timing(priv, vif);
  2594. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2595. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2596. if (rc)
  2597. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2598. "Attempting to continue.\n");
  2599. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2600. priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid);
  2601. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2602. vif->bss_conf.aid, vif->bss_conf.beacon_int);
  2603. if (vif->bss_conf.use_short_preamble)
  2604. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2605. else
  2606. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2607. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2608. if (vif->bss_conf.use_short_slot)
  2609. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2610. else
  2611. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2612. }
  2613. iwlcore_commit_rxon(priv);
  2614. switch (vif->type) {
  2615. case NL80211_IFTYPE_STATION:
  2616. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2617. break;
  2618. case NL80211_IFTYPE_ADHOC:
  2619. iwl3945_send_beacon_cmd(priv);
  2620. break;
  2621. default:
  2622. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2623. __func__, vif->type);
  2624. break;
  2625. }
  2626. }
  2627. /*****************************************************************************
  2628. *
  2629. * mac80211 entry point functions
  2630. *
  2631. *****************************************************************************/
  2632. #define UCODE_READY_TIMEOUT (2 * HZ)
  2633. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2634. {
  2635. struct iwl_priv *priv = hw->priv;
  2636. int ret;
  2637. IWL_DEBUG_MAC80211(priv, "enter\n");
  2638. /* we should be verifying the device is ready to be opened */
  2639. mutex_lock(&priv->mutex);
  2640. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2641. * ucode filename and max sizes are card-specific. */
  2642. if (!priv->ucode_code.len) {
  2643. ret = iwl3945_read_ucode(priv);
  2644. if (ret) {
  2645. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2646. mutex_unlock(&priv->mutex);
  2647. goto out_release_irq;
  2648. }
  2649. }
  2650. ret = __iwl3945_up(priv);
  2651. mutex_unlock(&priv->mutex);
  2652. if (ret)
  2653. goto out_release_irq;
  2654. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2655. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2656. * mac80211 will not be run successfully. */
  2657. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2658. test_bit(STATUS_READY, &priv->status),
  2659. UCODE_READY_TIMEOUT);
  2660. if (!ret) {
  2661. if (!test_bit(STATUS_READY, &priv->status)) {
  2662. IWL_ERR(priv,
  2663. "Wait for START_ALIVE timeout after %dms.\n",
  2664. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2665. ret = -ETIMEDOUT;
  2666. goto out_release_irq;
  2667. }
  2668. }
  2669. /* ucode is running and will send rfkill notifications,
  2670. * no need to poll the killswitch state anymore */
  2671. cancel_delayed_work(&priv->_3945.rfkill_poll);
  2672. iwl_led_start(priv);
  2673. priv->is_open = 1;
  2674. IWL_DEBUG_MAC80211(priv, "leave\n");
  2675. return 0;
  2676. out_release_irq:
  2677. priv->is_open = 0;
  2678. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2679. return ret;
  2680. }
  2681. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2682. {
  2683. struct iwl_priv *priv = hw->priv;
  2684. IWL_DEBUG_MAC80211(priv, "enter\n");
  2685. if (!priv->is_open) {
  2686. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2687. return;
  2688. }
  2689. priv->is_open = 0;
  2690. if (iwl_is_ready_rf(priv)) {
  2691. /* stop mac, cancel any scan request and clear
  2692. * RXON_FILTER_ASSOC_MSK BIT
  2693. */
  2694. mutex_lock(&priv->mutex);
  2695. iwl_scan_cancel_timeout(priv, 100);
  2696. mutex_unlock(&priv->mutex);
  2697. }
  2698. iwl3945_down(priv);
  2699. flush_workqueue(priv->workqueue);
  2700. /* start polling the killswitch state again */
  2701. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  2702. round_jiffies_relative(2 * HZ));
  2703. IWL_DEBUG_MAC80211(priv, "leave\n");
  2704. }
  2705. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2706. {
  2707. struct iwl_priv *priv = hw->priv;
  2708. IWL_DEBUG_MAC80211(priv, "enter\n");
  2709. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2710. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2711. if (iwl3945_tx_skb(priv, skb))
  2712. dev_kfree_skb_any(skb);
  2713. IWL_DEBUG_MAC80211(priv, "leave\n");
  2714. return NETDEV_TX_OK;
  2715. }
  2716. void iwl3945_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
  2717. {
  2718. int rc = 0;
  2719. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2720. return;
  2721. /* The following should be done only at AP bring up */
  2722. if (!(iwl_is_associated(priv))) {
  2723. /* RXON - unassoc (to set timing command) */
  2724. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2725. iwlcore_commit_rxon(priv);
  2726. /* RXON Timing */
  2727. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2728. iwl_setup_rxon_timing(priv, vif);
  2729. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2730. sizeof(priv->rxon_timing),
  2731. &priv->rxon_timing);
  2732. if (rc)
  2733. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2734. "Attempting to continue.\n");
  2735. priv->staging_rxon.assoc_id = 0;
  2736. if (vif->bss_conf.use_short_preamble)
  2737. priv->staging_rxon.flags |=
  2738. RXON_FLG_SHORT_PREAMBLE_MSK;
  2739. else
  2740. priv->staging_rxon.flags &=
  2741. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2742. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2743. if (vif->bss_conf.use_short_slot)
  2744. priv->staging_rxon.flags |=
  2745. RXON_FLG_SHORT_SLOT_MSK;
  2746. else
  2747. priv->staging_rxon.flags &=
  2748. ~RXON_FLG_SHORT_SLOT_MSK;
  2749. }
  2750. /* restore RXON assoc */
  2751. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2752. iwlcore_commit_rxon(priv);
  2753. }
  2754. iwl3945_send_beacon_cmd(priv);
  2755. /* FIXME - we need to add code here to detect a totally new
  2756. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2757. * clear sta table, add BCAST sta... */
  2758. }
  2759. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2760. struct ieee80211_vif *vif,
  2761. struct ieee80211_sta *sta,
  2762. struct ieee80211_key_conf *key)
  2763. {
  2764. struct iwl_priv *priv = hw->priv;
  2765. int ret = 0;
  2766. u8 sta_id = IWL_INVALID_STATION;
  2767. u8 static_key;
  2768. IWL_DEBUG_MAC80211(priv, "enter\n");
  2769. if (iwl3945_mod_params.sw_crypto) {
  2770. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2771. return -EOPNOTSUPP;
  2772. }
  2773. static_key = !iwl_is_associated(priv);
  2774. if (!static_key) {
  2775. sta_id = iwl_sta_id_or_broadcast(priv, sta);
  2776. if (sta_id == IWL_INVALID_STATION)
  2777. return -EINVAL;
  2778. }
  2779. mutex_lock(&priv->mutex);
  2780. iwl_scan_cancel_timeout(priv, 100);
  2781. switch (cmd) {
  2782. case SET_KEY:
  2783. if (static_key)
  2784. ret = iwl3945_set_static_key(priv, key);
  2785. else
  2786. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2787. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2788. break;
  2789. case DISABLE_KEY:
  2790. if (static_key)
  2791. ret = iwl3945_remove_static_key(priv);
  2792. else
  2793. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2794. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2795. break;
  2796. default:
  2797. ret = -EINVAL;
  2798. }
  2799. mutex_unlock(&priv->mutex);
  2800. IWL_DEBUG_MAC80211(priv, "leave\n");
  2801. return ret;
  2802. }
  2803. static int iwl3945_mac_sta_add(struct ieee80211_hw *hw,
  2804. struct ieee80211_vif *vif,
  2805. struct ieee80211_sta *sta)
  2806. {
  2807. struct iwl_priv *priv = hw->priv;
  2808. struct iwl3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2809. int ret;
  2810. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2811. u8 sta_id;
  2812. IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
  2813. sta->addr);
  2814. mutex_lock(&priv->mutex);
  2815. IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
  2816. sta->addr);
  2817. sta_priv->common.sta_id = IWL_INVALID_STATION;
  2818. ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap,
  2819. &sta_id);
  2820. if (ret) {
  2821. IWL_ERR(priv, "Unable to add station %pM (%d)\n",
  2822. sta->addr, ret);
  2823. /* Should we return success if return code is EEXIST ? */
  2824. mutex_unlock(&priv->mutex);
  2825. return ret;
  2826. }
  2827. sta_priv->common.sta_id = sta_id;
  2828. /* Initialize rate scaling */
  2829. IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
  2830. sta->addr);
  2831. iwl3945_rs_rate_init(priv, sta, sta_id);
  2832. mutex_unlock(&priv->mutex);
  2833. return 0;
  2834. }
  2835. /*****************************************************************************
  2836. *
  2837. * sysfs attributes
  2838. *
  2839. *****************************************************************************/
  2840. #ifdef CONFIG_IWLWIFI_DEBUG
  2841. /*
  2842. * The following adds a new attribute to the sysfs representation
  2843. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2844. * used for controlling the debug level.
  2845. *
  2846. * See the level definitions in iwl for details.
  2847. *
  2848. * The debug_level being managed using sysfs below is a per device debug
  2849. * level that is used instead of the global debug level if it (the per
  2850. * device debug level) is set.
  2851. */
  2852. static ssize_t show_debug_level(struct device *d,
  2853. struct device_attribute *attr, char *buf)
  2854. {
  2855. struct iwl_priv *priv = dev_get_drvdata(d);
  2856. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2857. }
  2858. static ssize_t store_debug_level(struct device *d,
  2859. struct device_attribute *attr,
  2860. const char *buf, size_t count)
  2861. {
  2862. struct iwl_priv *priv = dev_get_drvdata(d);
  2863. unsigned long val;
  2864. int ret;
  2865. ret = strict_strtoul(buf, 0, &val);
  2866. if (ret)
  2867. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2868. else {
  2869. priv->debug_level = val;
  2870. if (iwl_alloc_traffic_mem(priv))
  2871. IWL_ERR(priv,
  2872. "Not enough memory to generate traffic log\n");
  2873. }
  2874. return strnlen(buf, count);
  2875. }
  2876. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2877. show_debug_level, store_debug_level);
  2878. #endif /* CONFIG_IWLWIFI_DEBUG */
  2879. static ssize_t show_temperature(struct device *d,
  2880. struct device_attribute *attr, char *buf)
  2881. {
  2882. struct iwl_priv *priv = dev_get_drvdata(d);
  2883. if (!iwl_is_alive(priv))
  2884. return -EAGAIN;
  2885. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2886. }
  2887. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2888. static ssize_t show_tx_power(struct device *d,
  2889. struct device_attribute *attr, char *buf)
  2890. {
  2891. struct iwl_priv *priv = dev_get_drvdata(d);
  2892. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2893. }
  2894. static ssize_t store_tx_power(struct device *d,
  2895. struct device_attribute *attr,
  2896. const char *buf, size_t count)
  2897. {
  2898. struct iwl_priv *priv = dev_get_drvdata(d);
  2899. char *p = (char *)buf;
  2900. u32 val;
  2901. val = simple_strtoul(p, &p, 10);
  2902. if (p == buf)
  2903. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2904. else
  2905. iwl3945_hw_reg_set_txpower(priv, val);
  2906. return count;
  2907. }
  2908. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2909. static ssize_t show_flags(struct device *d,
  2910. struct device_attribute *attr, char *buf)
  2911. {
  2912. struct iwl_priv *priv = dev_get_drvdata(d);
  2913. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2914. }
  2915. static ssize_t store_flags(struct device *d,
  2916. struct device_attribute *attr,
  2917. const char *buf, size_t count)
  2918. {
  2919. struct iwl_priv *priv = dev_get_drvdata(d);
  2920. u32 flags = simple_strtoul(buf, NULL, 0);
  2921. mutex_lock(&priv->mutex);
  2922. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2923. /* Cancel any currently running scans... */
  2924. if (iwl_scan_cancel_timeout(priv, 100))
  2925. IWL_WARN(priv, "Could not cancel scan.\n");
  2926. else {
  2927. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2928. flags);
  2929. priv->staging_rxon.flags = cpu_to_le32(flags);
  2930. iwlcore_commit_rxon(priv);
  2931. }
  2932. }
  2933. mutex_unlock(&priv->mutex);
  2934. return count;
  2935. }
  2936. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2937. static ssize_t show_filter_flags(struct device *d,
  2938. struct device_attribute *attr, char *buf)
  2939. {
  2940. struct iwl_priv *priv = dev_get_drvdata(d);
  2941. return sprintf(buf, "0x%04X\n",
  2942. le32_to_cpu(priv->active_rxon.filter_flags));
  2943. }
  2944. static ssize_t store_filter_flags(struct device *d,
  2945. struct device_attribute *attr,
  2946. const char *buf, size_t count)
  2947. {
  2948. struct iwl_priv *priv = dev_get_drvdata(d);
  2949. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2950. mutex_lock(&priv->mutex);
  2951. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2952. /* Cancel any currently running scans... */
  2953. if (iwl_scan_cancel_timeout(priv, 100))
  2954. IWL_WARN(priv, "Could not cancel scan.\n");
  2955. else {
  2956. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2957. "0x%04X\n", filter_flags);
  2958. priv->staging_rxon.filter_flags =
  2959. cpu_to_le32(filter_flags);
  2960. iwlcore_commit_rxon(priv);
  2961. }
  2962. }
  2963. mutex_unlock(&priv->mutex);
  2964. return count;
  2965. }
  2966. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2967. store_filter_flags);
  2968. static ssize_t show_measurement(struct device *d,
  2969. struct device_attribute *attr, char *buf)
  2970. {
  2971. struct iwl_priv *priv = dev_get_drvdata(d);
  2972. struct iwl_spectrum_notification measure_report;
  2973. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2974. u8 *data = (u8 *)&measure_report;
  2975. unsigned long flags;
  2976. spin_lock_irqsave(&priv->lock, flags);
  2977. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2978. spin_unlock_irqrestore(&priv->lock, flags);
  2979. return 0;
  2980. }
  2981. memcpy(&measure_report, &priv->measure_report, size);
  2982. priv->measurement_status = 0;
  2983. spin_unlock_irqrestore(&priv->lock, flags);
  2984. while (size && (PAGE_SIZE - len)) {
  2985. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2986. PAGE_SIZE - len, 1);
  2987. len = strlen(buf);
  2988. if (PAGE_SIZE - len)
  2989. buf[len++] = '\n';
  2990. ofs += 16;
  2991. size -= min(size, 16U);
  2992. }
  2993. return len;
  2994. }
  2995. static ssize_t store_measurement(struct device *d,
  2996. struct device_attribute *attr,
  2997. const char *buf, size_t count)
  2998. {
  2999. struct iwl_priv *priv = dev_get_drvdata(d);
  3000. struct ieee80211_measurement_params params = {
  3001. .channel = le16_to_cpu(priv->active_rxon.channel),
  3002. .start_time = cpu_to_le64(priv->_3945.last_tsf),
  3003. .duration = cpu_to_le16(1),
  3004. };
  3005. u8 type = IWL_MEASURE_BASIC;
  3006. u8 buffer[32];
  3007. u8 channel;
  3008. if (count) {
  3009. char *p = buffer;
  3010. strncpy(buffer, buf, min(sizeof(buffer), count));
  3011. channel = simple_strtoul(p, NULL, 0);
  3012. if (channel)
  3013. params.channel = channel;
  3014. p = buffer;
  3015. while (*p && *p != ' ')
  3016. p++;
  3017. if (*p)
  3018. type = simple_strtoul(p + 1, NULL, 0);
  3019. }
  3020. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  3021. "channel %d (for '%s')\n", type, params.channel, buf);
  3022. iwl3945_get_measurement(priv, &params, type);
  3023. return count;
  3024. }
  3025. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  3026. show_measurement, store_measurement);
  3027. static ssize_t store_retry_rate(struct device *d,
  3028. struct device_attribute *attr,
  3029. const char *buf, size_t count)
  3030. {
  3031. struct iwl_priv *priv = dev_get_drvdata(d);
  3032. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  3033. if (priv->retry_rate <= 0)
  3034. priv->retry_rate = 1;
  3035. return count;
  3036. }
  3037. static ssize_t show_retry_rate(struct device *d,
  3038. struct device_attribute *attr, char *buf)
  3039. {
  3040. struct iwl_priv *priv = dev_get_drvdata(d);
  3041. return sprintf(buf, "%d", priv->retry_rate);
  3042. }
  3043. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3044. store_retry_rate);
  3045. static ssize_t show_channels(struct device *d,
  3046. struct device_attribute *attr, char *buf)
  3047. {
  3048. /* all this shit doesn't belong into sysfs anyway */
  3049. return 0;
  3050. }
  3051. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3052. static ssize_t show_antenna(struct device *d,
  3053. struct device_attribute *attr, char *buf)
  3054. {
  3055. struct iwl_priv *priv = dev_get_drvdata(d);
  3056. if (!iwl_is_alive(priv))
  3057. return -EAGAIN;
  3058. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3059. }
  3060. static ssize_t store_antenna(struct device *d,
  3061. struct device_attribute *attr,
  3062. const char *buf, size_t count)
  3063. {
  3064. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3065. int ant;
  3066. if (count == 0)
  3067. return 0;
  3068. if (sscanf(buf, "%1i", &ant) != 1) {
  3069. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3070. return count;
  3071. }
  3072. if ((ant >= 0) && (ant <= 2)) {
  3073. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3074. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3075. } else
  3076. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3077. return count;
  3078. }
  3079. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3080. static ssize_t show_status(struct device *d,
  3081. struct device_attribute *attr, char *buf)
  3082. {
  3083. struct iwl_priv *priv = dev_get_drvdata(d);
  3084. if (!iwl_is_alive(priv))
  3085. return -EAGAIN;
  3086. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3087. }
  3088. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3089. static ssize_t dump_error_log(struct device *d,
  3090. struct device_attribute *attr,
  3091. const char *buf, size_t count)
  3092. {
  3093. struct iwl_priv *priv = dev_get_drvdata(d);
  3094. char *p = (char *)buf;
  3095. if (p[0] == '1')
  3096. iwl3945_dump_nic_error_log(priv);
  3097. return strnlen(buf, count);
  3098. }
  3099. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3100. /*****************************************************************************
  3101. *
  3102. * driver setup and tear down
  3103. *
  3104. *****************************************************************************/
  3105. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3106. {
  3107. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3108. init_waitqueue_head(&priv->wait_command_queue);
  3109. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3110. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3111. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3112. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3113. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3114. INIT_DELAYED_WORK(&priv->_3945.rfkill_poll, iwl3945_rfkill_poll);
  3115. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3116. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3117. INIT_WORK(&priv->start_internal_scan, iwl_bg_start_internal_scan);
  3118. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3119. iwl3945_hw_setup_deferred_work(priv);
  3120. if (priv->cfg->ops->lib->recover_from_tx_stall) {
  3121. init_timer(&priv->monitor_recover);
  3122. priv->monitor_recover.data = (unsigned long)priv;
  3123. priv->monitor_recover.function =
  3124. priv->cfg->ops->lib->recover_from_tx_stall;
  3125. }
  3126. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3127. iwl3945_irq_tasklet, (unsigned long)priv);
  3128. }
  3129. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3130. {
  3131. iwl3945_hw_cancel_deferred_work(priv);
  3132. cancel_delayed_work_sync(&priv->init_alive_start);
  3133. cancel_delayed_work(&priv->scan_check);
  3134. cancel_delayed_work(&priv->alive_start);
  3135. cancel_work_sync(&priv->start_internal_scan);
  3136. cancel_work_sync(&priv->beacon_update);
  3137. if (priv->cfg->ops->lib->recover_from_tx_stall)
  3138. del_timer_sync(&priv->monitor_recover);
  3139. }
  3140. static struct attribute *iwl3945_sysfs_entries[] = {
  3141. &dev_attr_antenna.attr,
  3142. &dev_attr_channels.attr,
  3143. &dev_attr_dump_errors.attr,
  3144. &dev_attr_flags.attr,
  3145. &dev_attr_filter_flags.attr,
  3146. &dev_attr_measurement.attr,
  3147. &dev_attr_retry_rate.attr,
  3148. &dev_attr_status.attr,
  3149. &dev_attr_temperature.attr,
  3150. &dev_attr_tx_power.attr,
  3151. #ifdef CONFIG_IWLWIFI_DEBUG
  3152. &dev_attr_debug_level.attr,
  3153. #endif
  3154. NULL
  3155. };
  3156. static struct attribute_group iwl3945_attribute_group = {
  3157. .name = NULL, /* put in device directory */
  3158. .attrs = iwl3945_sysfs_entries,
  3159. };
  3160. static struct ieee80211_ops iwl3945_hw_ops = {
  3161. .tx = iwl3945_mac_tx,
  3162. .start = iwl3945_mac_start,
  3163. .stop = iwl3945_mac_stop,
  3164. .add_interface = iwl_mac_add_interface,
  3165. .remove_interface = iwl_mac_remove_interface,
  3166. .config = iwl_mac_config,
  3167. .configure_filter = iwl_configure_filter,
  3168. .set_key = iwl3945_mac_set_key,
  3169. .conf_tx = iwl_mac_conf_tx,
  3170. .reset_tsf = iwl_mac_reset_tsf,
  3171. .bss_info_changed = iwl_bss_info_changed,
  3172. .hw_scan = iwl_mac_hw_scan,
  3173. .sta_add = iwl3945_mac_sta_add,
  3174. .sta_remove = iwl_mac_sta_remove,
  3175. };
  3176. static int iwl3945_init_drv(struct iwl_priv *priv)
  3177. {
  3178. int ret;
  3179. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3180. priv->retry_rate = 1;
  3181. priv->ibss_beacon = NULL;
  3182. spin_lock_init(&priv->sta_lock);
  3183. spin_lock_init(&priv->hcmd_lock);
  3184. INIT_LIST_HEAD(&priv->free_frames);
  3185. mutex_init(&priv->mutex);
  3186. mutex_init(&priv->sync_cmd_mutex);
  3187. priv->ieee_channels = NULL;
  3188. priv->ieee_rates = NULL;
  3189. priv->band = IEEE80211_BAND_2GHZ;
  3190. priv->iw_mode = NL80211_IFTYPE_STATION;
  3191. priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
  3192. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3193. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3194. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3195. eeprom->version);
  3196. ret = -EINVAL;
  3197. goto err;
  3198. }
  3199. ret = iwl_init_channel_map(priv);
  3200. if (ret) {
  3201. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3202. goto err;
  3203. }
  3204. /* Set up txpower settings in driver for all channels */
  3205. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3206. ret = -EIO;
  3207. goto err_free_channel_map;
  3208. }
  3209. ret = iwlcore_init_geos(priv);
  3210. if (ret) {
  3211. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3212. goto err_free_channel_map;
  3213. }
  3214. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3215. return 0;
  3216. err_free_channel_map:
  3217. iwl_free_channel_map(priv);
  3218. err:
  3219. return ret;
  3220. }
  3221. #define IWL3945_MAX_PROBE_REQUEST 200
  3222. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3223. {
  3224. int ret;
  3225. struct ieee80211_hw *hw = priv->hw;
  3226. hw->rate_control_algorithm = "iwl-3945-rs";
  3227. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3228. hw->vif_data_size = sizeof(struct iwl_vif_priv);
  3229. /* Tell mac80211 our characteristics */
  3230. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3231. IEEE80211_HW_SPECTRUM_MGMT;
  3232. if (!priv->cfg->broken_powersave)
  3233. hw->flags |= IEEE80211_HW_SUPPORTS_PS |
  3234. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3235. hw->wiphy->interface_modes =
  3236. BIT(NL80211_IFTYPE_STATION) |
  3237. BIT(NL80211_IFTYPE_ADHOC);
  3238. hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
  3239. WIPHY_FLAG_DISABLE_BEACON_HINTS;
  3240. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3241. /* we create the 802.11 header and a zero-length SSID element */
  3242. hw->wiphy->max_scan_ie_len = IWL3945_MAX_PROBE_REQUEST - 24 - 2;
  3243. /* Default value; 4 EDCA QOS priorities */
  3244. hw->queues = 4;
  3245. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3246. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3247. &priv->bands[IEEE80211_BAND_2GHZ];
  3248. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3249. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3250. &priv->bands[IEEE80211_BAND_5GHZ];
  3251. ret = ieee80211_register_hw(priv->hw);
  3252. if (ret) {
  3253. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3254. return ret;
  3255. }
  3256. priv->mac80211_registered = 1;
  3257. return 0;
  3258. }
  3259. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3260. {
  3261. int err = 0;
  3262. struct iwl_priv *priv;
  3263. struct ieee80211_hw *hw;
  3264. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3265. struct iwl3945_eeprom *eeprom;
  3266. unsigned long flags;
  3267. /***********************
  3268. * 1. Allocating HW data
  3269. * ********************/
  3270. /* mac80211 allocates memory for this device instance, including
  3271. * space for this driver's private structure */
  3272. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3273. if (hw == NULL) {
  3274. pr_err("Can not allocate network device\n");
  3275. err = -ENOMEM;
  3276. goto out;
  3277. }
  3278. priv = hw->priv;
  3279. SET_IEEE80211_DEV(hw, &pdev->dev);
  3280. /*
  3281. * Disabling hardware scan means that mac80211 will perform scans
  3282. * "the hard way", rather than using device's scan.
  3283. */
  3284. if (iwl3945_mod_params.disable_hw_scan) {
  3285. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3286. iwl3945_hw_ops.hw_scan = NULL;
  3287. }
  3288. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3289. priv->cfg = cfg;
  3290. priv->pci_dev = pdev;
  3291. priv->inta_mask = CSR_INI_SET_MASK;
  3292. if (iwl_alloc_traffic_mem(priv))
  3293. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3294. /***************************
  3295. * 2. Initializing PCI bus
  3296. * *************************/
  3297. if (pci_enable_device(pdev)) {
  3298. err = -ENODEV;
  3299. goto out_ieee80211_free_hw;
  3300. }
  3301. pci_set_master(pdev);
  3302. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3303. if (!err)
  3304. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3305. if (err) {
  3306. IWL_WARN(priv, "No suitable DMA available.\n");
  3307. goto out_pci_disable_device;
  3308. }
  3309. pci_set_drvdata(pdev, priv);
  3310. err = pci_request_regions(pdev, DRV_NAME);
  3311. if (err)
  3312. goto out_pci_disable_device;
  3313. /***********************
  3314. * 3. Read REV Register
  3315. * ********************/
  3316. priv->hw_base = pci_iomap(pdev, 0, 0);
  3317. if (!priv->hw_base) {
  3318. err = -ENODEV;
  3319. goto out_pci_release_regions;
  3320. }
  3321. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3322. (unsigned long long) pci_resource_len(pdev, 0));
  3323. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3324. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3325. * PCI Tx retries from interfering with C3 CPU state */
  3326. pci_write_config_byte(pdev, 0x41, 0x00);
  3327. /* these spin locks will be used in apm_ops.init and EEPROM access
  3328. * we should init now
  3329. */
  3330. spin_lock_init(&priv->reg_lock);
  3331. spin_lock_init(&priv->lock);
  3332. /*
  3333. * stop and reset the on-board processor just in case it is in a
  3334. * strange state ... like being left stranded by a primary kernel
  3335. * and this is now the kdump kernel trying to start up
  3336. */
  3337. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3338. /***********************
  3339. * 4. Read EEPROM
  3340. * ********************/
  3341. /* Read the EEPROM */
  3342. err = iwl_eeprom_init(priv);
  3343. if (err) {
  3344. IWL_ERR(priv, "Unable to init EEPROM\n");
  3345. goto out_iounmap;
  3346. }
  3347. /* MAC Address location in EEPROM same for 3945/4965 */
  3348. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3349. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", eeprom->mac_address);
  3350. SET_IEEE80211_PERM_ADDR(priv->hw, eeprom->mac_address);
  3351. /***********************
  3352. * 5. Setup HW Constants
  3353. * ********************/
  3354. /* Device-specific setup */
  3355. if (iwl3945_hw_set_hw_params(priv)) {
  3356. IWL_ERR(priv, "failed to set hw settings\n");
  3357. goto out_eeprom_free;
  3358. }
  3359. /***********************
  3360. * 6. Setup priv
  3361. * ********************/
  3362. err = iwl3945_init_drv(priv);
  3363. if (err) {
  3364. IWL_ERR(priv, "initializing driver failed\n");
  3365. goto out_unset_hw_params;
  3366. }
  3367. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3368. priv->cfg->name);
  3369. /***********************
  3370. * 7. Setup Services
  3371. * ********************/
  3372. spin_lock_irqsave(&priv->lock, flags);
  3373. iwl_disable_interrupts(priv);
  3374. spin_unlock_irqrestore(&priv->lock, flags);
  3375. pci_enable_msi(priv->pci_dev);
  3376. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3377. IRQF_SHARED, DRV_NAME, priv);
  3378. if (err) {
  3379. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3380. goto out_disable_msi;
  3381. }
  3382. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3383. if (err) {
  3384. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3385. goto out_release_irq;
  3386. }
  3387. iwl_set_rxon_channel(priv,
  3388. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3389. iwl3945_setup_deferred_work(priv);
  3390. iwl3945_setup_rx_handlers(priv);
  3391. iwl_power_initialize(priv);
  3392. /*********************************
  3393. * 8. Setup and Register mac80211
  3394. * *******************************/
  3395. iwl_enable_interrupts(priv);
  3396. err = iwl3945_setup_mac(priv);
  3397. if (err)
  3398. goto out_remove_sysfs;
  3399. err = iwl_dbgfs_register(priv, DRV_NAME);
  3400. if (err)
  3401. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3402. /* Start monitoring the killswitch */
  3403. queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
  3404. 2 * HZ);
  3405. return 0;
  3406. out_remove_sysfs:
  3407. destroy_workqueue(priv->workqueue);
  3408. priv->workqueue = NULL;
  3409. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3410. out_release_irq:
  3411. free_irq(priv->pci_dev->irq, priv);
  3412. out_disable_msi:
  3413. pci_disable_msi(priv->pci_dev);
  3414. iwlcore_free_geos(priv);
  3415. iwl_free_channel_map(priv);
  3416. out_unset_hw_params:
  3417. iwl3945_unset_hw_params(priv);
  3418. out_eeprom_free:
  3419. iwl_eeprom_free(priv);
  3420. out_iounmap:
  3421. pci_iounmap(pdev, priv->hw_base);
  3422. out_pci_release_regions:
  3423. pci_release_regions(pdev);
  3424. out_pci_disable_device:
  3425. pci_set_drvdata(pdev, NULL);
  3426. pci_disable_device(pdev);
  3427. out_ieee80211_free_hw:
  3428. iwl_free_traffic_mem(priv);
  3429. ieee80211_free_hw(priv->hw);
  3430. out:
  3431. return err;
  3432. }
  3433. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3434. {
  3435. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3436. unsigned long flags;
  3437. if (!priv)
  3438. return;
  3439. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3440. iwl_dbgfs_unregister(priv);
  3441. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3442. if (priv->mac80211_registered) {
  3443. ieee80211_unregister_hw(priv->hw);
  3444. priv->mac80211_registered = 0;
  3445. } else {
  3446. iwl3945_down(priv);
  3447. }
  3448. /*
  3449. * Make sure device is reset to low power before unloading driver.
  3450. * This may be redundant with iwl_down(), but there are paths to
  3451. * run iwl_down() without calling apm_ops.stop(), and there are
  3452. * paths to avoid running iwl_down() at all before leaving driver.
  3453. * This (inexpensive) call *makes sure* device is reset.
  3454. */
  3455. priv->cfg->ops->lib->apm_ops.stop(priv);
  3456. /* make sure we flush any pending irq or
  3457. * tasklet for the driver
  3458. */
  3459. spin_lock_irqsave(&priv->lock, flags);
  3460. iwl_disable_interrupts(priv);
  3461. spin_unlock_irqrestore(&priv->lock, flags);
  3462. iwl_synchronize_irq(priv);
  3463. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3464. cancel_delayed_work_sync(&priv->_3945.rfkill_poll);
  3465. iwl3945_dealloc_ucode_pci(priv);
  3466. if (priv->rxq.bd)
  3467. iwl3945_rx_queue_free(priv, &priv->rxq);
  3468. iwl3945_hw_txq_ctx_free(priv);
  3469. iwl3945_unset_hw_params(priv);
  3470. /*netif_stop_queue(dev); */
  3471. flush_workqueue(priv->workqueue);
  3472. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3473. * priv->workqueue... so we can't take down the workqueue
  3474. * until now... */
  3475. destroy_workqueue(priv->workqueue);
  3476. priv->workqueue = NULL;
  3477. iwl_free_traffic_mem(priv);
  3478. free_irq(pdev->irq, priv);
  3479. pci_disable_msi(pdev);
  3480. pci_iounmap(pdev, priv->hw_base);
  3481. pci_release_regions(pdev);
  3482. pci_disable_device(pdev);
  3483. pci_set_drvdata(pdev, NULL);
  3484. iwl_free_channel_map(priv);
  3485. iwlcore_free_geos(priv);
  3486. kfree(priv->scan_cmd);
  3487. if (priv->ibss_beacon)
  3488. dev_kfree_skb(priv->ibss_beacon);
  3489. ieee80211_free_hw(priv->hw);
  3490. }
  3491. /*****************************************************************************
  3492. *
  3493. * driver and module entry point
  3494. *
  3495. *****************************************************************************/
  3496. static struct pci_driver iwl3945_driver = {
  3497. .name = DRV_NAME,
  3498. .id_table = iwl3945_hw_card_ids,
  3499. .probe = iwl3945_pci_probe,
  3500. .remove = __devexit_p(iwl3945_pci_remove),
  3501. #ifdef CONFIG_PM
  3502. .suspend = iwl_pci_suspend,
  3503. .resume = iwl_pci_resume,
  3504. #endif
  3505. };
  3506. static int __init iwl3945_init(void)
  3507. {
  3508. int ret;
  3509. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3510. pr_info(DRV_COPYRIGHT "\n");
  3511. ret = iwl3945_rate_control_register();
  3512. if (ret) {
  3513. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3514. return ret;
  3515. }
  3516. ret = pci_register_driver(&iwl3945_driver);
  3517. if (ret) {
  3518. pr_err("Unable to initialize PCI module\n");
  3519. goto error_register;
  3520. }
  3521. return ret;
  3522. error_register:
  3523. iwl3945_rate_control_unregister();
  3524. return ret;
  3525. }
  3526. static void __exit iwl3945_exit(void)
  3527. {
  3528. pci_unregister_driver(&iwl3945_driver);
  3529. iwl3945_rate_control_unregister();
  3530. }
  3531. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3532. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3533. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3534. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3535. MODULE_PARM_DESC(swcrypto,
  3536. "using software crypto (default 1 [software])\n");
  3537. #ifdef CONFIG_IWLWIFI_DEBUG
  3538. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3539. MODULE_PARM_DESC(debug, "debug output mask");
  3540. #endif
  3541. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3542. int, S_IRUGO);
  3543. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3544. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3545. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3546. module_exit(iwl3945_exit);
  3547. module_init(iwl3945_init);