pci-new.c 6.0 KB

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  1. /*
  2. * New-style PCI core.
  3. *
  4. * Copyright (c) 2002 M. R. Brown
  5. * Copyright (c) 2004 - 2009 Paul Mundt
  6. *
  7. * This file is subject to the terms and conditions of the GNU General Public
  8. * License. See the file "COPYING" in the main directory of this archive
  9. * for more details.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/pci.h>
  13. #include <linux/init.h>
  14. #include <linux/dma-debug.h>
  15. #include <linux/io.h>
  16. static int __init pcibios_init(void)
  17. {
  18. struct pci_channel *p;
  19. struct pci_bus *bus;
  20. int busno;
  21. /* init channels */
  22. busno = 0;
  23. for (p = board_pci_channels; p->init; p++) {
  24. if (p->init(p) == 0)
  25. p->enabled = 1;
  26. else
  27. pr_err("Unable to init pci channel %d\n", busno);
  28. busno++;
  29. }
  30. /* scan the buses */
  31. busno = 0;
  32. for (p = board_pci_channels; p->init; p++) {
  33. if (p->enabled) {
  34. bus = pci_scan_bus(busno, p->pci_ops, p);
  35. busno = bus->subordinate + 1;
  36. pci_bus_size_bridges(bus);
  37. pci_bus_assign_resources(bus);
  38. pci_enable_bridges(bus);
  39. }
  40. }
  41. pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
  42. dma_debug_add_bus(&pci_bus_type);
  43. return 0;
  44. }
  45. subsys_initcall(pcibios_init);
  46. static void pcibios_fixup_device_resources(struct pci_dev *dev,
  47. struct pci_bus *bus)
  48. {
  49. /* Update device resources. */
  50. struct pci_channel *chan = bus->sysdata;
  51. unsigned long offset = 0;
  52. int i;
  53. for (i = 0; i < PCI_NUM_RESOURCES; i++) {
  54. if (!dev->resource[i].start)
  55. continue;
  56. if (dev->resource[i].flags & IORESOURCE_PCI_FIXED)
  57. continue;
  58. if (dev->resource[i].flags & IORESOURCE_IO)
  59. offset = chan->io_base;
  60. else if (dev->resource[i].flags & IORESOURCE_MEM)
  61. offset = 0;
  62. dev->resource[i].start += offset;
  63. dev->resource[i].end += offset;
  64. }
  65. }
  66. /*
  67. * Called after each bus is probed, but before its children
  68. * are examined.
  69. */
  70. void __devinit __weak pcibios_fixup_bus(struct pci_bus *bus)
  71. {
  72. struct pci_dev *dev = bus->self;
  73. struct list_head *ln;
  74. struct pci_channel *chan = bus->sysdata;
  75. if (!dev) {
  76. bus->resource[0] = chan->io_resource;
  77. bus->resource[1] = chan->mem_resource;
  78. }
  79. for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
  80. dev = pci_dev_b(ln);
  81. if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
  82. pcibios_fixup_device_resources(dev, bus);
  83. }
  84. }
  85. void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
  86. struct resource *res)
  87. {
  88. struct pci_channel *chan = dev->sysdata;
  89. unsigned long offset = 0;
  90. if (res->flags & IORESOURCE_IO)
  91. offset = chan->io_base;
  92. else if (res->flags & IORESOURCE_MEM)
  93. offset = 0;
  94. region->start = res->start - offset;
  95. region->end = res->end - offset;
  96. }
  97. void __devinit
  98. pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
  99. struct pci_bus_region *region)
  100. {
  101. struct pci_channel *chan = dev->sysdata;
  102. unsigned long offset = 0;
  103. if (res->flags & IORESOURCE_IO)
  104. offset = chan->io_base;
  105. else if (res->flags & IORESOURCE_MEM)
  106. offset = 0;
  107. res->start = region->start + offset;
  108. res->end = region->end + offset;
  109. }
  110. void pcibios_align_resource(void *data, struct resource *res,
  111. resource_size_t size, resource_size_t align)
  112. __attribute__ ((weak));
  113. /*
  114. * We need to avoid collisions with `mirrored' VGA ports
  115. * and other strange ISA hardware, so we always want the
  116. * addresses to be allocated in the 0x000-0x0ff region
  117. * modulo 0x400.
  118. */
  119. void pcibios_align_resource(void *data, struct resource *res,
  120. resource_size_t size, resource_size_t align)
  121. {
  122. if (res->flags & IORESOURCE_IO) {
  123. resource_size_t start = res->start;
  124. if (start & 0x300) {
  125. start = (start + 0x3ff) & ~0x3ff;
  126. res->start = start;
  127. }
  128. }
  129. }
  130. int pcibios_enable_device(struct pci_dev *dev, int mask)
  131. {
  132. u16 cmd, old_cmd;
  133. int idx;
  134. struct resource *r;
  135. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  136. old_cmd = cmd;
  137. for(idx=0; idx<6; idx++) {
  138. if (!(mask & (1 << idx)))
  139. continue;
  140. r = &dev->resource[idx];
  141. if (!r->start && r->end) {
  142. printk(KERN_ERR "PCI: Device %s not available because "
  143. "of resource collisions\n", pci_name(dev));
  144. return -EINVAL;
  145. }
  146. if (r->flags & IORESOURCE_IO)
  147. cmd |= PCI_COMMAND_IO;
  148. if (r->flags & IORESOURCE_MEM)
  149. cmd |= PCI_COMMAND_MEMORY;
  150. }
  151. if (dev->resource[PCI_ROM_RESOURCE].start)
  152. cmd |= PCI_COMMAND_MEMORY;
  153. if (cmd != old_cmd) {
  154. printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n",
  155. pci_name(dev), old_cmd, cmd);
  156. pci_write_config_word(dev, PCI_COMMAND, cmd);
  157. }
  158. return 0;
  159. }
  160. /*
  161. * If we set up a device for bus mastering, we need to check and set
  162. * the latency timer as it may not be properly set.
  163. */
  164. static unsigned int pcibios_max_latency = 255;
  165. void pcibios_set_master(struct pci_dev *dev)
  166. {
  167. u8 lat;
  168. pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
  169. if (lat < 16)
  170. lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
  171. else if (lat > pcibios_max_latency)
  172. lat = pcibios_max_latency;
  173. else
  174. return;
  175. printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n",
  176. pci_name(dev), lat);
  177. pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
  178. }
  179. void __init pcibios_update_irq(struct pci_dev *dev, int irq)
  180. {
  181. pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
  182. }
  183. void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
  184. {
  185. resource_size_t start = pci_resource_start(dev, bar);
  186. resource_size_t len = pci_resource_len(dev, bar);
  187. unsigned long flags = pci_resource_flags(dev, bar);
  188. if (unlikely(!len || !start))
  189. return NULL;
  190. if (maxlen && len > maxlen)
  191. len = maxlen;
  192. /*
  193. * Presently the IORESOURCE_MEM case is a bit special, most
  194. * SH7751 style PCI controllers have PCI memory at a fixed
  195. * location in the address space where no remapping is desired.
  196. * With the IORESOURCE_MEM case more care has to be taken
  197. * to inhibit page table mapping for legacy cores, but this is
  198. * punted off to __ioremap().
  199. * -- PFM.
  200. */
  201. if (flags & IORESOURCE_IO)
  202. return ioport_map(start, len);
  203. if (flags & IORESOURCE_MEM)
  204. return ioremap(start, len);
  205. return NULL;
  206. }
  207. EXPORT_SYMBOL(pci_iomap);
  208. void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
  209. {
  210. iounmap(addr);
  211. }
  212. EXPORT_SYMBOL(pci_iounmap);
  213. EXPORT_SYMBOL(board_pci_channels);