bfin_5xx.c 31 KB

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  1. /*
  2. * File: drivers/serial/bfin_5xx.c
  3. * Based on: Based on drivers/serial/sa1100.c
  4. * Author: Aubrey Li <aubrey.li@analog.com>
  5. *
  6. * Created:
  7. * Description: Driver for blackfin 5xx serial ports
  8. *
  9. * Modified:
  10. * Copyright 2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/module.h>
  33. #include <linux/ioport.h>
  34. #include <linux/init.h>
  35. #include <linux/console.h>
  36. #include <linux/sysrq.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/tty.h>
  39. #include <linux/tty_flip.h>
  40. #include <linux/serial_core.h>
  41. #ifdef CONFIG_KGDB_UART
  42. #include <linux/kgdb.h>
  43. #include <asm/irq_regs.h>
  44. #endif
  45. #include <asm/gpio.h>
  46. #include <asm/mach/bfin_serial_5xx.h>
  47. #ifdef CONFIG_SERIAL_BFIN_DMA
  48. #include <linux/dma-mapping.h>
  49. #include <asm/io.h>
  50. #include <asm/irq.h>
  51. #include <asm/cacheflush.h>
  52. #endif
  53. /* UART name and device definitions */
  54. #define BFIN_SERIAL_NAME "ttyBF"
  55. #define BFIN_SERIAL_MAJOR 204
  56. #define BFIN_SERIAL_MINOR 64
  57. /*
  58. * Setup for console. Argument comes from the menuconfig
  59. */
  60. #define DMA_RX_XCOUNT 512
  61. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  62. #define DMA_RX_FLUSH_JIFFIES 5
  63. #ifdef CONFIG_SERIAL_BFIN_DMA
  64. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  65. #else
  66. static void bfin_serial_do_work(struct work_struct *work);
  67. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  68. #endif
  69. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
  70. /*
  71. * interrupts are disabled on entry
  72. */
  73. static void bfin_serial_stop_tx(struct uart_port *port)
  74. {
  75. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  76. #if !defined(CONFIG_BF54x) && !defined(CONFIG_SERIAL_BFIN_DMA)
  77. unsigned short ier;
  78. #endif
  79. while (!(UART_GET_LSR(uart) & TEMT))
  80. continue;
  81. #ifdef CONFIG_SERIAL_BFIN_DMA
  82. disable_dma(uart->tx_dma_channel);
  83. #else
  84. #ifdef CONFIG_BF54x
  85. /* Clear TFI bit */
  86. UART_PUT_LSR(uart, TFI);
  87. UART_CLEAR_IER(uart, ETBEI);
  88. #else
  89. ier = UART_GET_IER(uart);
  90. ier &= ~ETBEI;
  91. UART_PUT_IER(uart, ier);
  92. #endif
  93. #endif
  94. }
  95. /*
  96. * port is locked and interrupts are disabled
  97. */
  98. static void bfin_serial_start_tx(struct uart_port *port)
  99. {
  100. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  101. #ifdef CONFIG_SERIAL_BFIN_DMA
  102. bfin_serial_dma_tx_chars(uart);
  103. #else
  104. #ifdef CONFIG_BF54x
  105. UART_SET_IER(uart, ETBEI);
  106. #else
  107. unsigned short ier;
  108. ier = UART_GET_IER(uart);
  109. ier |= ETBEI;
  110. UART_PUT_IER(uart, ier);
  111. #endif
  112. bfin_serial_tx_chars(uart);
  113. #endif
  114. }
  115. /*
  116. * Interrupts are enabled
  117. */
  118. static void bfin_serial_stop_rx(struct uart_port *port)
  119. {
  120. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  121. #ifdef CONFIG_KGDB_UART
  122. if (uart->port.line != CONFIG_KGDB_UART_PORT) {
  123. #endif
  124. #ifdef CONFIG_BF54x
  125. UART_CLEAR_IER(uart, ERBFI);
  126. #else
  127. unsigned short ier;
  128. ier = UART_GET_IER(uart);
  129. ier &= ~ERBFI;
  130. UART_PUT_IER(uart, ier);
  131. #endif
  132. #ifdef CONFIG_KGDB_UART
  133. }
  134. #endif
  135. }
  136. /*
  137. * Set the modem control timer to fire immediately.
  138. */
  139. static void bfin_serial_enable_ms(struct uart_port *port)
  140. {
  141. }
  142. #ifdef CONFIG_KGDB_UART
  143. static int kgdb_entry_state;
  144. void kgdb_put_debug_char(int chr)
  145. {
  146. struct bfin_serial_port *uart;
  147. if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
  148. uart = &bfin_serial_ports[0];
  149. else
  150. uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  151. while (!(UART_GET_LSR(uart) & THRE)) {
  152. SSYNC();
  153. }
  154. #ifndef CONFIG_BF54x
  155. UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
  156. SSYNC();
  157. #endif
  158. UART_PUT_CHAR(uart, (unsigned char)chr);
  159. SSYNC();
  160. }
  161. int kgdb_get_debug_char(void)
  162. {
  163. struct bfin_serial_port *uart;
  164. unsigned char chr;
  165. if (CONFIG_KGDB_UART_PORT<0 || CONFIG_KGDB_UART_PORT>=NR_PORTS)
  166. uart = &bfin_serial_ports[0];
  167. else
  168. uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  169. while(!(UART_GET_LSR(uart) & DR)) {
  170. SSYNC();
  171. }
  172. #ifndef CONFIG_BF54x
  173. UART_PUT_LCR(uart, UART_GET_LCR(uart)&(~DLAB));
  174. SSYNC();
  175. #endif
  176. chr = UART_GET_CHAR(uart);
  177. SSYNC();
  178. return chr;
  179. }
  180. #endif
  181. #ifdef CONFIG_SERIAL_BFIN_PIO
  182. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  183. {
  184. struct tty_struct *tty = uart->port.info->tty;
  185. unsigned int status, ch, flg;
  186. static int in_break = 0;
  187. #ifdef CONFIG_KGDB_UART
  188. struct pt_regs *regs = get_irq_regs();
  189. #endif
  190. ch = UART_GET_CHAR(uart);
  191. status = UART_GET_LSR(uart);
  192. uart->port.icount.rx++;
  193. #ifdef CONFIG_KGDB_UART
  194. if (uart->port.line == CONFIG_KGDB_UART_PORT) {
  195. if (uart->port.cons->index == CONFIG_KGDB_UART_PORT && ch == 0x1) { /* Ctrl + A */
  196. kgdb_breakkey_pressed(regs);
  197. return;
  198. } else if (kgdb_entry_state == 0 && ch == '$') {/* connection from KGDB */
  199. kgdb_entry_state = 1;
  200. } else if (kgdb_entry_state == 1 && ch == 'q') {
  201. kgdb_entry_state = 0;
  202. kgdb_breakkey_pressed(regs);
  203. return;
  204. } else if (ch == 0x3) {/* Ctrl + C */
  205. kgdb_entry_state = 0;
  206. kgdb_breakkey_pressed(regs);
  207. return;
  208. } else {
  209. kgdb_entry_state = 0;
  210. }
  211. }
  212. #endif
  213. if (ANOMALY_05000230) {
  214. /* The BF533 family of processors have a nice misbehavior where
  215. * they continuously generate characters for a "single" break.
  216. * We have to basically ignore this flood until the "next" valid
  217. * character comes across. All other Blackfin families operate
  218. * properly though.
  219. * Note: While Anomaly 05000230 does not directly address this,
  220. * the changes that went in for it also fixed this issue.
  221. */
  222. if (in_break) {
  223. if (ch != 0) {
  224. in_break = 0;
  225. ch = UART_GET_CHAR(uart);
  226. if (bfin_revid() < 5)
  227. return;
  228. } else
  229. return;
  230. }
  231. }
  232. if (status & BI) {
  233. if (ANOMALY_05000230)
  234. in_break = 1;
  235. uart->port.icount.brk++;
  236. if (uart_handle_break(&uart->port))
  237. goto ignore_char;
  238. status &= ~(PE | FE);
  239. }
  240. if (status & PE)
  241. uart->port.icount.parity++;
  242. if (status & OE)
  243. uart->port.icount.overrun++;
  244. if (status & FE)
  245. uart->port.icount.frame++;
  246. status &= uart->port.read_status_mask;
  247. if (status & BI)
  248. flg = TTY_BREAK;
  249. else if (status & PE)
  250. flg = TTY_PARITY;
  251. else if (status & FE)
  252. flg = TTY_FRAME;
  253. else
  254. flg = TTY_NORMAL;
  255. if (uart_handle_sysrq_char(&uart->port, ch))
  256. goto ignore_char;
  257. uart_insert_char(&uart->port, status, OE, ch, flg);
  258. ignore_char:
  259. tty_flip_buffer_push(tty);
  260. }
  261. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  262. {
  263. struct circ_buf *xmit = &uart->port.info->xmit;
  264. if (uart->port.x_char) {
  265. UART_PUT_CHAR(uart, uart->port.x_char);
  266. uart->port.icount.tx++;
  267. uart->port.x_char = 0;
  268. }
  269. /*
  270. * Check the modem control lines before
  271. * transmitting anything.
  272. */
  273. bfin_serial_mctrl_check(uart);
  274. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  275. bfin_serial_stop_tx(&uart->port);
  276. return;
  277. }
  278. while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
  279. UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
  280. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  281. uart->port.icount.tx++;
  282. SSYNC();
  283. }
  284. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  285. uart_write_wakeup(&uart->port);
  286. if (uart_circ_empty(xmit))
  287. bfin_serial_stop_tx(&uart->port);
  288. }
  289. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  290. {
  291. struct bfin_serial_port *uart = dev_id;
  292. spin_lock(&uart->port.lock);
  293. while ((UART_GET_IER(uart) & ERBFI) && (UART_GET_LSR(uart) & DR))
  294. bfin_serial_rx_chars(uart);
  295. spin_unlock(&uart->port.lock);
  296. return IRQ_HANDLED;
  297. }
  298. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  299. {
  300. struct bfin_serial_port *uart = dev_id;
  301. spin_lock(&uart->port.lock);
  302. if ((UART_GET_IER(uart) & ETBEI) && (UART_GET_LSR(uart) & THRE))
  303. bfin_serial_tx_chars(uart);
  304. spin_unlock(&uart->port.lock);
  305. return IRQ_HANDLED;
  306. }
  307. static void bfin_serial_do_work(struct work_struct *work)
  308. {
  309. struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
  310. bfin_serial_mctrl_check(uart);
  311. }
  312. #endif
  313. #ifdef CONFIG_SERIAL_BFIN_DMA
  314. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  315. {
  316. struct circ_buf *xmit = &uart->port.info->xmit;
  317. unsigned short ier;
  318. int flags = 0;
  319. if (!uart->tx_done)
  320. return;
  321. uart->tx_done = 0;
  322. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  323. bfin_serial_stop_tx(&uart->port);
  324. uart->tx_done = 1;
  325. return;
  326. }
  327. if (uart->port.x_char) {
  328. UART_PUT_CHAR(uart, uart->port.x_char);
  329. uart->port.icount.tx++;
  330. uart->port.x_char = 0;
  331. }
  332. /*
  333. * Check the modem control lines before
  334. * transmitting anything.
  335. */
  336. bfin_serial_mctrl_check(uart);
  337. spin_lock_irqsave(&uart->port.lock, flags);
  338. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  339. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  340. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  341. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  342. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  343. set_dma_config(uart->tx_dma_channel,
  344. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  345. INTR_ON_BUF,
  346. DIMENSION_LINEAR,
  347. DATA_SIZE_8,
  348. DMA_SYNC_RESTART));
  349. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  350. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  351. set_dma_x_modify(uart->tx_dma_channel, 1);
  352. enable_dma(uart->tx_dma_channel);
  353. xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
  354. uart->port.icount.tx += uart->tx_count;
  355. #ifdef CONFIG_BF54x
  356. UART_SET_IER(uart, ETBEI);
  357. #else
  358. ier = UART_GET_IER(uart);
  359. ier |= ETBEI;
  360. UART_PUT_IER(uart, ier);
  361. #endif
  362. spin_unlock_irqrestore(&uart->port.lock, flags);
  363. }
  364. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  365. {
  366. struct tty_struct *tty = uart->port.info->tty;
  367. int i, flg, status;
  368. status = UART_GET_LSR(uart);
  369. uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
  370. if (status & BI) {
  371. uart->port.icount.brk++;
  372. if (uart_handle_break(&uart->port))
  373. goto dma_ignore_char;
  374. status &= ~(PE | FE);
  375. }
  376. if (status & PE)
  377. uart->port.icount.parity++;
  378. if (status & OE)
  379. uart->port.icount.overrun++;
  380. if (status & FE)
  381. uart->port.icount.frame++;
  382. status &= uart->port.read_status_mask;
  383. if (status & BI)
  384. flg = TTY_BREAK;
  385. else if (status & PE)
  386. flg = TTY_PARITY;
  387. else if (status & FE)
  388. flg = TTY_FRAME;
  389. else
  390. flg = TTY_NORMAL;
  391. for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
  392. if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  393. goto dma_ignore_char;
  394. uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
  395. }
  396. dma_ignore_char:
  397. tty_flip_buffer_push(tty);
  398. }
  399. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  400. {
  401. int x_pos, pos;
  402. int flags = 0;
  403. spin_lock_irqsave(&uart->port.lock, flags);
  404. x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
  405. if (x_pos == DMA_RX_XCOUNT)
  406. x_pos = 0;
  407. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  408. if (pos>uart->rx_dma_buf.tail) {
  409. uart->rx_dma_buf.tail = pos;
  410. bfin_serial_dma_rx_chars(uart);
  411. uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
  412. }
  413. spin_unlock_irqrestore(&uart->port.lock, flags);
  414. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  415. add_timer(&(uart->rx_dma_timer));
  416. }
  417. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  418. {
  419. struct bfin_serial_port *uart = dev_id;
  420. struct circ_buf *xmit = &uart->port.info->xmit;
  421. unsigned short ier;
  422. spin_lock(&uart->port.lock);
  423. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  424. clear_dma_irqstat(uart->tx_dma_channel);
  425. disable_dma(uart->tx_dma_channel);
  426. #ifdef CONFIG_BF54x
  427. UART_CLEAR_IER(uart, ETBEI);
  428. #else
  429. ier = UART_GET_IER(uart);
  430. ier &= ~ETBEI;
  431. UART_PUT_IER(uart, ier);
  432. #endif
  433. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  434. uart_write_wakeup(&uart->port);
  435. uart->tx_done = 1;
  436. bfin_serial_dma_tx_chars(uart);
  437. }
  438. spin_unlock(&uart->port.lock);
  439. return IRQ_HANDLED;
  440. }
  441. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  442. {
  443. struct bfin_serial_port *uart = dev_id;
  444. unsigned short irqstat;
  445. uart->rx_dma_nrows++;
  446. if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
  447. uart->rx_dma_nrows = 0;
  448. uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
  449. bfin_serial_dma_rx_chars(uart);
  450. uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
  451. }
  452. spin_lock(&uart->port.lock);
  453. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  454. clear_dma_irqstat(uart->rx_dma_channel);
  455. spin_unlock(&uart->port.lock);
  456. return IRQ_HANDLED;
  457. }
  458. #endif
  459. /*
  460. * Return TIOCSER_TEMT when transmitter is not busy.
  461. */
  462. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  463. {
  464. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  465. unsigned short lsr;
  466. lsr = UART_GET_LSR(uart);
  467. if (lsr & TEMT)
  468. return TIOCSER_TEMT;
  469. else
  470. return 0;
  471. }
  472. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  473. {
  474. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  475. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  476. if (uart->cts_pin < 0)
  477. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  478. if (gpio_get_value(uart->cts_pin))
  479. return TIOCM_DSR | TIOCM_CAR;
  480. else
  481. #endif
  482. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  483. }
  484. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  485. {
  486. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  487. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  488. if (uart->rts_pin < 0)
  489. return;
  490. if (mctrl & TIOCM_RTS)
  491. gpio_set_value(uart->rts_pin, 0);
  492. else
  493. gpio_set_value(uart->rts_pin, 1);
  494. #endif
  495. }
  496. /*
  497. * Handle any change of modem status signal since we were last called.
  498. */
  499. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
  500. {
  501. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  502. unsigned int status;
  503. # ifdef CONFIG_SERIAL_BFIN_DMA
  504. struct uart_info *info = uart->port.info;
  505. struct tty_struct *tty = info->tty;
  506. status = bfin_serial_get_mctrl(&uart->port);
  507. if (!(status & TIOCM_CTS)) {
  508. tty->hw_stopped = 1;
  509. } else {
  510. tty->hw_stopped = 0;
  511. }
  512. # else
  513. status = bfin_serial_get_mctrl(&uart->port);
  514. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  515. if (!(status & TIOCM_CTS))
  516. schedule_work(&uart->cts_workqueue);
  517. # endif
  518. #endif
  519. }
  520. /*
  521. * Interrupts are always disabled.
  522. */
  523. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  524. {
  525. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  526. u16 lcr = UART_GET_LCR(uart);
  527. if (break_state)
  528. lcr |= SB;
  529. else
  530. lcr &= ~SB;
  531. UART_PUT_LCR(uart, lcr);
  532. SSYNC();
  533. }
  534. static int bfin_serial_startup(struct uart_port *port)
  535. {
  536. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  537. #ifdef CONFIG_SERIAL_BFIN_DMA
  538. dma_addr_t dma_handle;
  539. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  540. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  541. return -EBUSY;
  542. }
  543. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  544. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  545. free_dma(uart->rx_dma_channel);
  546. return -EBUSY;
  547. }
  548. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  549. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  550. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  551. uart->rx_dma_buf.head = 0;
  552. uart->rx_dma_buf.tail = 0;
  553. uart->rx_dma_nrows = 0;
  554. set_dma_config(uart->rx_dma_channel,
  555. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  556. INTR_ON_ROW, DIMENSION_2D,
  557. DATA_SIZE_8,
  558. DMA_SYNC_RESTART));
  559. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  560. set_dma_x_modify(uart->rx_dma_channel, 1);
  561. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  562. set_dma_y_modify(uart->rx_dma_channel, 1);
  563. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  564. enable_dma(uart->rx_dma_channel);
  565. uart->rx_dma_timer.data = (unsigned long)(uart);
  566. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  567. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  568. add_timer(&(uart->rx_dma_timer));
  569. #else
  570. if (request_irq(uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
  571. "BFIN_UART_RX", uart)) {
  572. # ifdef CONFIG_KGDB_UART
  573. if (uart->port.line != CONFIG_KGDB_UART_PORT) {
  574. # endif
  575. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  576. return -EBUSY;
  577. # ifdef CONFIG_KGDB_UART
  578. }
  579. # endif
  580. }
  581. if (request_irq
  582. (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
  583. "BFIN_UART_TX", uart)) {
  584. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  585. free_irq(uart->port.irq, uart);
  586. return -EBUSY;
  587. }
  588. #endif
  589. #ifdef CONFIG_BF54x
  590. UART_SET_IER(uart, ERBFI);
  591. #else
  592. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  593. #endif
  594. return 0;
  595. }
  596. static void bfin_serial_shutdown(struct uart_port *port)
  597. {
  598. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  599. #ifdef CONFIG_SERIAL_BFIN_DMA
  600. disable_dma(uart->tx_dma_channel);
  601. free_dma(uart->tx_dma_channel);
  602. disable_dma(uart->rx_dma_channel);
  603. free_dma(uart->rx_dma_channel);
  604. del_timer(&(uart->rx_dma_timer));
  605. dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
  606. #else
  607. #ifdef CONFIG_KGDB_UART
  608. if (uart->port.line != CONFIG_KGDB_UART_PORT)
  609. #endif
  610. free_irq(uart->port.irq, uart);
  611. free_irq(uart->port.irq+1, uart);
  612. #endif
  613. }
  614. static void
  615. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  616. struct ktermios *old)
  617. {
  618. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  619. unsigned long flags;
  620. unsigned int baud, quot;
  621. unsigned short val, ier, lsr, lcr = 0;
  622. switch (termios->c_cflag & CSIZE) {
  623. case CS8:
  624. lcr = WLS(8);
  625. break;
  626. case CS7:
  627. lcr = WLS(7);
  628. break;
  629. case CS6:
  630. lcr = WLS(6);
  631. break;
  632. case CS5:
  633. lcr = WLS(5);
  634. break;
  635. default:
  636. printk(KERN_ERR "%s: word lengh not supported\n",
  637. __FUNCTION__);
  638. }
  639. if (termios->c_cflag & CSTOPB)
  640. lcr |= STB;
  641. if (termios->c_cflag & PARENB)
  642. lcr |= PEN;
  643. if (!(termios->c_cflag & PARODD))
  644. lcr |= EPS;
  645. if (termios->c_cflag & CMSPAR)
  646. lcr |= STP;
  647. port->read_status_mask = OE;
  648. if (termios->c_iflag & INPCK)
  649. port->read_status_mask |= (FE | PE);
  650. if (termios->c_iflag & (BRKINT | PARMRK))
  651. port->read_status_mask |= BI;
  652. /*
  653. * Characters to ignore
  654. */
  655. port->ignore_status_mask = 0;
  656. if (termios->c_iflag & IGNPAR)
  657. port->ignore_status_mask |= FE | PE;
  658. if (termios->c_iflag & IGNBRK) {
  659. port->ignore_status_mask |= BI;
  660. /*
  661. * If we're ignoring parity and break indicators,
  662. * ignore overruns too (for real raw support).
  663. */
  664. if (termios->c_iflag & IGNPAR)
  665. port->ignore_status_mask |= OE;
  666. }
  667. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  668. quot = uart_get_divisor(port, baud);
  669. spin_lock_irqsave(&uart->port.lock, flags);
  670. do {
  671. lsr = UART_GET_LSR(uart);
  672. } while (!(lsr & TEMT));
  673. /* Disable UART */
  674. ier = UART_GET_IER(uart);
  675. #ifdef CONFIG_BF54x
  676. UART_CLEAR_IER(uart, 0xF);
  677. #else
  678. UART_PUT_IER(uart, 0);
  679. #endif
  680. #ifndef CONFIG_BF54x
  681. /* Set DLAB in LCR to Access DLL and DLH */
  682. val = UART_GET_LCR(uart);
  683. val |= DLAB;
  684. UART_PUT_LCR(uart, val);
  685. SSYNC();
  686. #endif
  687. UART_PUT_DLL(uart, quot & 0xFF);
  688. SSYNC();
  689. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  690. SSYNC();
  691. #ifndef CONFIG_BF54x
  692. /* Clear DLAB in LCR to Access THR RBR IER */
  693. val = UART_GET_LCR(uart);
  694. val &= ~DLAB;
  695. UART_PUT_LCR(uart, val);
  696. SSYNC();
  697. #endif
  698. UART_PUT_LCR(uart, lcr);
  699. /* Enable UART */
  700. #ifdef CONFIG_BF54x
  701. UART_SET_IER(uart, ier);
  702. #else
  703. UART_PUT_IER(uart, ier);
  704. #endif
  705. val = UART_GET_GCTL(uart);
  706. val |= UCEN;
  707. UART_PUT_GCTL(uart, val);
  708. spin_unlock_irqrestore(&uart->port.lock, flags);
  709. }
  710. static const char *bfin_serial_type(struct uart_port *port)
  711. {
  712. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  713. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  714. }
  715. /*
  716. * Release the memory region(s) being used by 'port'.
  717. */
  718. static void bfin_serial_release_port(struct uart_port *port)
  719. {
  720. }
  721. /*
  722. * Request the memory region(s) being used by 'port'.
  723. */
  724. static int bfin_serial_request_port(struct uart_port *port)
  725. {
  726. return 0;
  727. }
  728. /*
  729. * Configure/autoconfigure the port.
  730. */
  731. static void bfin_serial_config_port(struct uart_port *port, int flags)
  732. {
  733. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  734. if (flags & UART_CONFIG_TYPE &&
  735. bfin_serial_request_port(&uart->port) == 0)
  736. uart->port.type = PORT_BFIN;
  737. }
  738. /*
  739. * Verify the new serial_struct (for TIOCSSERIAL).
  740. * The only change we allow are to the flags and type, and
  741. * even then only between PORT_BFIN and PORT_UNKNOWN
  742. */
  743. static int
  744. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  745. {
  746. return 0;
  747. }
  748. static struct uart_ops bfin_serial_pops = {
  749. .tx_empty = bfin_serial_tx_empty,
  750. .set_mctrl = bfin_serial_set_mctrl,
  751. .get_mctrl = bfin_serial_get_mctrl,
  752. .stop_tx = bfin_serial_stop_tx,
  753. .start_tx = bfin_serial_start_tx,
  754. .stop_rx = bfin_serial_stop_rx,
  755. .enable_ms = bfin_serial_enable_ms,
  756. .break_ctl = bfin_serial_break_ctl,
  757. .startup = bfin_serial_startup,
  758. .shutdown = bfin_serial_shutdown,
  759. .set_termios = bfin_serial_set_termios,
  760. .type = bfin_serial_type,
  761. .release_port = bfin_serial_release_port,
  762. .request_port = bfin_serial_request_port,
  763. .config_port = bfin_serial_config_port,
  764. .verify_port = bfin_serial_verify_port,
  765. };
  766. static void __init bfin_serial_init_ports(void)
  767. {
  768. static int first = 1;
  769. int i;
  770. if (!first)
  771. return;
  772. first = 0;
  773. for (i = 0; i < nr_ports; i++) {
  774. bfin_serial_ports[i].port.uartclk = get_sclk();
  775. bfin_serial_ports[i].port.ops = &bfin_serial_pops;
  776. bfin_serial_ports[i].port.line = i;
  777. bfin_serial_ports[i].port.iotype = UPIO_MEM;
  778. bfin_serial_ports[i].port.membase =
  779. (void __iomem *)bfin_serial_resource[i].uart_base_addr;
  780. bfin_serial_ports[i].port.mapbase =
  781. bfin_serial_resource[i].uart_base_addr;
  782. bfin_serial_ports[i].port.irq =
  783. bfin_serial_resource[i].uart_irq;
  784. bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
  785. #ifdef CONFIG_SERIAL_BFIN_DMA
  786. bfin_serial_ports[i].tx_done = 1;
  787. bfin_serial_ports[i].tx_count = 0;
  788. bfin_serial_ports[i].tx_dma_channel =
  789. bfin_serial_resource[i].uart_tx_dma_channel;
  790. bfin_serial_ports[i].rx_dma_channel =
  791. bfin_serial_resource[i].uart_rx_dma_channel;
  792. init_timer(&(bfin_serial_ports[i].rx_dma_timer));
  793. #else
  794. INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
  795. #endif
  796. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  797. bfin_serial_ports[i].cts_pin =
  798. bfin_serial_resource[i].uart_cts_pin;
  799. bfin_serial_ports[i].rts_pin =
  800. bfin_serial_resource[i].uart_rts_pin;
  801. #endif
  802. bfin_serial_hw_init(&bfin_serial_ports[i]);
  803. }
  804. }
  805. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  806. /*
  807. * If the port was already initialised (eg, by a boot loader),
  808. * try to determine the current setup.
  809. */
  810. static void __init
  811. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  812. int *parity, int *bits)
  813. {
  814. unsigned short status;
  815. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  816. if (status == (ERBFI | ETBEI)) {
  817. /* ok, the port was enabled */
  818. unsigned short lcr, val;
  819. unsigned short dlh, dll;
  820. lcr = UART_GET_LCR(uart);
  821. *parity = 'n';
  822. if (lcr & PEN) {
  823. if (lcr & EPS)
  824. *parity = 'e';
  825. else
  826. *parity = 'o';
  827. }
  828. switch (lcr & 0x03) {
  829. case 0: *bits = 5; break;
  830. case 1: *bits = 6; break;
  831. case 2: *bits = 7; break;
  832. case 3: *bits = 8; break;
  833. }
  834. #ifndef CONFIG_BF54x
  835. /* Set DLAB in LCR to Access DLL and DLH */
  836. val = UART_GET_LCR(uart);
  837. val |= DLAB;
  838. UART_PUT_LCR(uart, val);
  839. #endif
  840. dll = UART_GET_DLL(uart);
  841. dlh = UART_GET_DLH(uart);
  842. #ifndef CONFIG_BF54x
  843. /* Clear DLAB in LCR to Access THR RBR IER */
  844. val = UART_GET_LCR(uart);
  845. val &= ~DLAB;
  846. UART_PUT_LCR(uart, val);
  847. #endif
  848. *baud = get_sclk() / (16*(dll | dlh << 8));
  849. }
  850. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
  851. }
  852. #endif
  853. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
  854. static struct uart_driver bfin_serial_reg;
  855. static int __init
  856. bfin_serial_console_setup(struct console *co, char *options)
  857. {
  858. struct bfin_serial_port *uart;
  859. # ifdef CONFIG_SERIAL_BFIN_CONSOLE
  860. int baud = 57600;
  861. int bits = 8;
  862. int parity = 'n';
  863. # ifdef CONFIG_SERIAL_BFIN_CTSRTS
  864. int flow = 'r';
  865. # else
  866. int flow = 'n';
  867. # endif
  868. # endif
  869. /*
  870. * Check whether an invalid uart number has been specified, and
  871. * if so, search for the first available port that does have
  872. * console support.
  873. */
  874. if (co->index == -1 || co->index >= nr_ports)
  875. co->index = 0;
  876. uart = &bfin_serial_ports[co->index];
  877. # ifdef CONFIG_SERIAL_BFIN_CONSOLE
  878. if (options)
  879. uart_parse_options(options, &baud, &parity, &bits, &flow);
  880. else
  881. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  882. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  883. # else
  884. return 0;
  885. # endif
  886. }
  887. #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
  888. defined (CONFIG_EARLY_PRINTK) */
  889. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  890. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  891. {
  892. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  893. while (!(UART_GET_LSR(uart) & THRE))
  894. barrier();
  895. UART_PUT_CHAR(uart, ch);
  896. SSYNC();
  897. }
  898. /*
  899. * Interrupts are disabled on entering
  900. */
  901. static void
  902. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  903. {
  904. struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
  905. int flags = 0;
  906. spin_lock_irqsave(&uart->port.lock, flags);
  907. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  908. spin_unlock_irqrestore(&uart->port.lock, flags);
  909. }
  910. static struct console bfin_serial_console = {
  911. .name = BFIN_SERIAL_NAME,
  912. .write = bfin_serial_console_write,
  913. .device = uart_console_device,
  914. .setup = bfin_serial_console_setup,
  915. .flags = CON_PRINTBUFFER,
  916. .index = -1,
  917. .data = &bfin_serial_reg,
  918. };
  919. static int __init bfin_serial_rs_console_init(void)
  920. {
  921. bfin_serial_init_ports();
  922. register_console(&bfin_serial_console);
  923. #ifdef CONFIG_KGDB_UART
  924. kgdb_entry_state = 0;
  925. init_kgdb_uart();
  926. #endif
  927. return 0;
  928. }
  929. console_initcall(bfin_serial_rs_console_init);
  930. #define BFIN_SERIAL_CONSOLE &bfin_serial_console
  931. #else
  932. #define BFIN_SERIAL_CONSOLE NULL
  933. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  934. #ifdef CONFIG_EARLY_PRINTK
  935. static __init void early_serial_putc(struct uart_port *port, int ch)
  936. {
  937. unsigned timeout = 0xffff;
  938. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  939. while ((!(UART_GET_LSR(uart) & THRE)) && --timeout)
  940. cpu_relax();
  941. UART_PUT_CHAR(uart, ch);
  942. }
  943. static __init void early_serial_write(struct console *con, const char *s,
  944. unsigned int n)
  945. {
  946. struct bfin_serial_port *uart = &bfin_serial_ports[con->index];
  947. unsigned int i;
  948. for (i = 0; i < n; i++, s++) {
  949. if (*s == '\n')
  950. early_serial_putc(&uart->port, '\r');
  951. early_serial_putc(&uart->port, *s);
  952. }
  953. }
  954. static struct __init console bfin_early_serial_console = {
  955. .name = "early_BFuart",
  956. .write = early_serial_write,
  957. .device = uart_console_device,
  958. .flags = CON_PRINTBUFFER,
  959. .setup = bfin_serial_console_setup,
  960. .index = -1,
  961. .data = &bfin_serial_reg,
  962. };
  963. struct console __init *bfin_earlyserial_init(unsigned int port,
  964. unsigned int cflag)
  965. {
  966. struct bfin_serial_port *uart;
  967. struct ktermios t;
  968. if (port == -1 || port >= nr_ports)
  969. port = 0;
  970. bfin_serial_init_ports();
  971. bfin_early_serial_console.index = port;
  972. uart = &bfin_serial_ports[port];
  973. t.c_cflag = cflag;
  974. t.c_iflag = 0;
  975. t.c_oflag = 0;
  976. t.c_lflag = ICANON;
  977. t.c_line = port;
  978. bfin_serial_set_termios(&uart->port, &t, &t);
  979. return &bfin_early_serial_console;
  980. }
  981. #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
  982. static struct uart_driver bfin_serial_reg = {
  983. .owner = THIS_MODULE,
  984. .driver_name = "bfin-uart",
  985. .dev_name = BFIN_SERIAL_NAME,
  986. .major = BFIN_SERIAL_MAJOR,
  987. .minor = BFIN_SERIAL_MINOR,
  988. .nr = NR_PORTS,
  989. .cons = BFIN_SERIAL_CONSOLE,
  990. };
  991. static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
  992. {
  993. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  994. if (uart)
  995. uart_suspend_port(&bfin_serial_reg, &uart->port);
  996. return 0;
  997. }
  998. static int bfin_serial_resume(struct platform_device *dev)
  999. {
  1000. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  1001. if (uart)
  1002. uart_resume_port(&bfin_serial_reg, &uart->port);
  1003. return 0;
  1004. }
  1005. static int bfin_serial_probe(struct platform_device *dev)
  1006. {
  1007. struct resource *res = dev->resource;
  1008. int i;
  1009. for (i = 0; i < dev->num_resources; i++, res++)
  1010. if (res->flags & IORESOURCE_MEM)
  1011. break;
  1012. if (i < dev->num_resources) {
  1013. for (i = 0; i < nr_ports; i++, res++) {
  1014. if (bfin_serial_ports[i].port.mapbase != res->start)
  1015. continue;
  1016. bfin_serial_ports[i].port.dev = &dev->dev;
  1017. uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  1018. platform_set_drvdata(dev, &bfin_serial_ports[i]);
  1019. }
  1020. }
  1021. return 0;
  1022. }
  1023. static int bfin_serial_remove(struct platform_device *pdev)
  1024. {
  1025. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  1026. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  1027. gpio_free(uart->cts_pin);
  1028. gpio_free(uart->rts_pin);
  1029. #endif
  1030. platform_set_drvdata(pdev, NULL);
  1031. if (uart)
  1032. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  1033. return 0;
  1034. }
  1035. static struct platform_driver bfin_serial_driver = {
  1036. .probe = bfin_serial_probe,
  1037. .remove = bfin_serial_remove,
  1038. .suspend = bfin_serial_suspend,
  1039. .resume = bfin_serial_resume,
  1040. .driver = {
  1041. .name = "bfin-uart",
  1042. },
  1043. };
  1044. static int __init bfin_serial_init(void)
  1045. {
  1046. int ret;
  1047. #ifdef CONFIG_KGDB_UART
  1048. struct bfin_serial_port *uart = &bfin_serial_ports[CONFIG_KGDB_UART_PORT];
  1049. struct ktermios t;
  1050. #endif
  1051. pr_info("Serial: Blackfin serial driver\n");
  1052. bfin_serial_init_ports();
  1053. ret = uart_register_driver(&bfin_serial_reg);
  1054. if (ret == 0) {
  1055. ret = platform_driver_register(&bfin_serial_driver);
  1056. if (ret) {
  1057. pr_debug("uart register failed\n");
  1058. uart_unregister_driver(&bfin_serial_reg);
  1059. }
  1060. }
  1061. #ifdef CONFIG_KGDB_UART
  1062. if (uart->port.cons->index != CONFIG_KGDB_UART_PORT) {
  1063. request_irq(uart->port.irq, bfin_serial_rx_int,
  1064. IRQF_DISABLED, "BFIN_UART_RX", uart);
  1065. pr_info("Request irq for kgdb uart port\n");
  1066. #ifdef CONFIG_BF54x
  1067. UART_SET_IER(uart, ERBFI);
  1068. #else
  1069. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  1070. #endif
  1071. SSYNC();
  1072. t.c_cflag = CS8|B57600;
  1073. t.c_iflag = 0;
  1074. t.c_oflag = 0;
  1075. t.c_lflag = ICANON;
  1076. t.c_line = CONFIG_KGDB_UART_PORT;
  1077. bfin_serial_set_termios(&uart->port, &t, &t);
  1078. }
  1079. #endif
  1080. return ret;
  1081. }
  1082. static void __exit bfin_serial_exit(void)
  1083. {
  1084. platform_driver_unregister(&bfin_serial_driver);
  1085. uart_unregister_driver(&bfin_serial_reg);
  1086. }
  1087. module_init(bfin_serial_init);
  1088. module_exit(bfin_serial_exit);
  1089. MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
  1090. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  1091. MODULE_LICENSE("GPL");
  1092. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);