iwl4965-base.c 253 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-core.h"
  45. #include "iwl-4965.h"
  46. #include "iwl-helpers.h"
  47. #ifdef CONFIG_IWL4965_DEBUG
  48. u32 iwl4965_debug_level;
  49. #endif
  50. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  51. struct iwl4965_tx_queue *txq);
  52. /******************************************************************************
  53. *
  54. * module boiler plate
  55. *
  56. ******************************************************************************/
  57. /* module parameters */
  58. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  59. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  60. static int iwl4965_param_disable; /* def: enable radio */
  61. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  62. int iwl4965_param_hwcrypto; /* def: using software encryption */
  63. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  64. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  65. int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
  66. /*
  67. * module name, copyright, version, etc.
  68. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  69. */
  70. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  71. #ifdef CONFIG_IWL4965_DEBUG
  72. #define VD "d"
  73. #else
  74. #define VD
  75. #endif
  76. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  77. #define VS "s"
  78. #else
  79. #define VS
  80. #endif
  81. #define IWLWIFI_VERSION "1.2.26k" VD VS
  82. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  83. #define DRV_VERSION IWLWIFI_VERSION
  84. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  85. MODULE_VERSION(DRV_VERSION);
  86. MODULE_AUTHOR(DRV_COPYRIGHT);
  87. MODULE_LICENSE("GPL");
  88. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  89. {
  90. u16 fc = le16_to_cpu(hdr->frame_control);
  91. int hdr_len = ieee80211_get_hdrlen(fc);
  92. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  93. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  94. return NULL;
  95. }
  96. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  97. struct iwl4965_priv *priv, enum ieee80211_band band)
  98. {
  99. return priv->hw->wiphy->bands[band];
  100. }
  101. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  102. {
  103. /* Single white space is for Linksys APs */
  104. if (essid_len == 1 && essid[0] == ' ')
  105. return 1;
  106. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  107. while (essid_len) {
  108. essid_len--;
  109. if (essid[essid_len] != '\0')
  110. return 0;
  111. }
  112. return 1;
  113. }
  114. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  115. {
  116. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  117. const char *s = essid;
  118. char *d = escaped;
  119. if (iwl4965_is_empty_essid(essid, essid_len)) {
  120. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  121. return escaped;
  122. }
  123. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  124. while (essid_len--) {
  125. if (*s == '\0') {
  126. *d++ = '\\';
  127. *d++ = '0';
  128. s++;
  129. } else
  130. *d++ = *s++;
  131. }
  132. *d = '\0';
  133. return escaped;
  134. }
  135. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  136. * DMA services
  137. *
  138. * Theory of operation
  139. *
  140. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  141. * of buffer descriptors, each of which points to one or more data buffers for
  142. * the device to read from or fill. Driver and device exchange status of each
  143. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  144. * entries in each circular buffer, to protect against confusing empty and full
  145. * queue states.
  146. *
  147. * The device reads or writes the data in the queues via the device's several
  148. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  149. *
  150. * For Tx queue, there are low mark and high mark limits. If, after queuing
  151. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  152. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  153. * Tx queue resumed.
  154. *
  155. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  156. * queue (#4) for sending commands to the device firmware, and 15 other
  157. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  158. *
  159. * See more detailed info in iwl-4965-hw.h.
  160. ***************************************************/
  161. int iwl4965_queue_space(const struct iwl4965_queue *q)
  162. {
  163. int s = q->read_ptr - q->write_ptr;
  164. if (q->read_ptr > q->write_ptr)
  165. s -= q->n_bd;
  166. if (s <= 0)
  167. s += q->n_window;
  168. /* keep some reserve to not confuse empty and full situations */
  169. s -= 2;
  170. if (s < 0)
  171. s = 0;
  172. return s;
  173. }
  174. /**
  175. * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
  176. * @index -- current index
  177. * @n_bd -- total number of entries in queue (must be power of 2)
  178. */
  179. static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
  180. {
  181. return ++index & (n_bd - 1);
  182. }
  183. /**
  184. * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
  185. * @index -- current index
  186. * @n_bd -- total number of entries in queue (must be power of 2)
  187. */
  188. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  189. {
  190. return --index & (n_bd - 1);
  191. }
  192. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  193. {
  194. return q->write_ptr > q->read_ptr ?
  195. (i >= q->read_ptr && i < q->write_ptr) :
  196. !(i < q->read_ptr && i >= q->write_ptr);
  197. }
  198. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  199. {
  200. /* This is for scan command, the big buffer at end of command array */
  201. if (is_huge)
  202. return q->n_window; /* must be power of 2 */
  203. /* Otherwise, use normal size buffers */
  204. return index & (q->n_window - 1);
  205. }
  206. /**
  207. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  208. */
  209. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  210. int count, int slots_num, u32 id)
  211. {
  212. q->n_bd = count;
  213. q->n_window = slots_num;
  214. q->id = id;
  215. /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
  216. * and iwl4965_queue_dec_wrap are broken. */
  217. BUG_ON(!is_power_of_2(count));
  218. /* slots_num must be power-of-two size, otherwise
  219. * get_cmd_index is broken. */
  220. BUG_ON(!is_power_of_2(slots_num));
  221. q->low_mark = q->n_window / 4;
  222. if (q->low_mark < 4)
  223. q->low_mark = 4;
  224. q->high_mark = q->n_window / 8;
  225. if (q->high_mark < 2)
  226. q->high_mark = 2;
  227. q->write_ptr = q->read_ptr = 0;
  228. return 0;
  229. }
  230. /**
  231. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  232. */
  233. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  234. struct iwl4965_tx_queue *txq, u32 id)
  235. {
  236. struct pci_dev *dev = priv->pci_dev;
  237. /* Driver private data, only for Tx (not command) queues,
  238. * not shared with device. */
  239. if (id != IWL_CMD_QUEUE_NUM) {
  240. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  241. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  242. if (!txq->txb) {
  243. IWL_ERROR("kmalloc for auxiliary BD "
  244. "structures failed\n");
  245. goto error;
  246. }
  247. } else
  248. txq->txb = NULL;
  249. /* Circular buffer of transmit frame descriptors (TFDs),
  250. * shared with device */
  251. txq->bd = pci_alloc_consistent(dev,
  252. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  253. &txq->q.dma_addr);
  254. if (!txq->bd) {
  255. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  256. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  257. goto error;
  258. }
  259. txq->q.id = id;
  260. return 0;
  261. error:
  262. if (txq->txb) {
  263. kfree(txq->txb);
  264. txq->txb = NULL;
  265. }
  266. return -ENOMEM;
  267. }
  268. /**
  269. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  270. */
  271. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  272. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  273. {
  274. struct pci_dev *dev = priv->pci_dev;
  275. int len;
  276. int rc = 0;
  277. /*
  278. * Alloc buffer array for commands (Tx or other types of commands).
  279. * For the command queue (#4), allocate command space + one big
  280. * command for scan, since scan command is very huge; the system will
  281. * not have two scans at the same time, so only one is needed.
  282. * For normal Tx queues (all other queues), no super-size command
  283. * space is needed.
  284. */
  285. len = sizeof(struct iwl4965_cmd) * slots_num;
  286. if (txq_id == IWL_CMD_QUEUE_NUM)
  287. len += IWL_MAX_SCAN_SIZE;
  288. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  289. if (!txq->cmd)
  290. return -ENOMEM;
  291. /* Alloc driver data array and TFD circular buffer */
  292. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  293. if (rc) {
  294. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  295. return -ENOMEM;
  296. }
  297. txq->need_update = 0;
  298. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  299. * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
  300. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  301. /* Initialize queue's high/low-water marks, and head/tail indexes */
  302. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  303. /* Tell device where to find queue */
  304. iwl4965_hw_tx_queue_init(priv, txq);
  305. return 0;
  306. }
  307. /**
  308. * iwl4965_tx_queue_free - Deallocate DMA queue.
  309. * @txq: Transmit queue to deallocate.
  310. *
  311. * Empty queue by removing and destroying all BD's.
  312. * Free all buffers.
  313. * 0-fill, but do not free "txq" descriptor structure.
  314. */
  315. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  316. {
  317. struct iwl4965_queue *q = &txq->q;
  318. struct pci_dev *dev = priv->pci_dev;
  319. int len;
  320. if (q->n_bd == 0)
  321. return;
  322. /* first, empty all BD's */
  323. for (; q->write_ptr != q->read_ptr;
  324. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
  325. iwl4965_hw_txq_free_tfd(priv, txq);
  326. len = sizeof(struct iwl4965_cmd) * q->n_window;
  327. if (q->id == IWL_CMD_QUEUE_NUM)
  328. len += IWL_MAX_SCAN_SIZE;
  329. /* De-alloc array of command/tx buffers */
  330. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  331. /* De-alloc circular buffer of TFDs */
  332. if (txq->q.n_bd)
  333. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  334. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  335. /* De-alloc array of per-TFD driver data */
  336. if (txq->txb) {
  337. kfree(txq->txb);
  338. txq->txb = NULL;
  339. }
  340. /* 0-fill queue descriptor structure */
  341. memset(txq, 0, sizeof(*txq));
  342. }
  343. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  344. /*************** STATION TABLE MANAGEMENT ****
  345. * mac80211 should be examined to determine if sta_info is duplicating
  346. * the functionality provided here
  347. */
  348. /**************************************************************/
  349. #if 0 /* temporary disable till we add real remove station */
  350. /**
  351. * iwl4965_remove_station - Remove driver's knowledge of station.
  352. *
  353. * NOTE: This does not remove station from device's station table.
  354. */
  355. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  356. {
  357. int index = IWL_INVALID_STATION;
  358. int i;
  359. unsigned long flags;
  360. spin_lock_irqsave(&priv->sta_lock, flags);
  361. if (is_ap)
  362. index = IWL_AP_ID;
  363. else if (is_broadcast_ether_addr(addr))
  364. index = priv->hw_setting.bcast_sta_id;
  365. else
  366. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  367. if (priv->stations[i].used &&
  368. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  369. addr)) {
  370. index = i;
  371. break;
  372. }
  373. if (unlikely(index == IWL_INVALID_STATION))
  374. goto out;
  375. if (priv->stations[index].used) {
  376. priv->stations[index].used = 0;
  377. priv->num_stations--;
  378. }
  379. BUG_ON(priv->num_stations < 0);
  380. out:
  381. spin_unlock_irqrestore(&priv->sta_lock, flags);
  382. return 0;
  383. }
  384. #endif
  385. /**
  386. * iwl4965_clear_stations_table - Clear the driver's station table
  387. *
  388. * NOTE: This does not clear or otherwise alter the device's station table.
  389. */
  390. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  391. {
  392. unsigned long flags;
  393. spin_lock_irqsave(&priv->sta_lock, flags);
  394. priv->num_stations = 0;
  395. memset(priv->stations, 0, sizeof(priv->stations));
  396. spin_unlock_irqrestore(&priv->sta_lock, flags);
  397. }
  398. /**
  399. * iwl4965_add_station_flags - Add station to tables in driver and device
  400. */
  401. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
  402. int is_ap, u8 flags, void *ht_data)
  403. {
  404. int i;
  405. int index = IWL_INVALID_STATION;
  406. struct iwl4965_station_entry *station;
  407. unsigned long flags_spin;
  408. DECLARE_MAC_BUF(mac);
  409. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  410. if (is_ap)
  411. index = IWL_AP_ID;
  412. else if (is_broadcast_ether_addr(addr))
  413. index = priv->hw_setting.bcast_sta_id;
  414. else
  415. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  416. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  417. addr)) {
  418. index = i;
  419. break;
  420. }
  421. if (!priv->stations[i].used &&
  422. index == IWL_INVALID_STATION)
  423. index = i;
  424. }
  425. /* These two conditions have the same outcome, but keep them separate
  426. since they have different meanings */
  427. if (unlikely(index == IWL_INVALID_STATION)) {
  428. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  429. return index;
  430. }
  431. if (priv->stations[index].used &&
  432. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  433. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  434. return index;
  435. }
  436. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  437. station = &priv->stations[index];
  438. station->used = 1;
  439. priv->num_stations++;
  440. /* Set up the REPLY_ADD_STA command to send to device */
  441. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  442. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  443. station->sta.mode = 0;
  444. station->sta.sta.sta_id = index;
  445. station->sta.station_flags = 0;
  446. #ifdef CONFIG_IWL4965_HT
  447. /* BCAST station and IBSS stations do not work in HT mode */
  448. if (index != priv->hw_setting.bcast_sta_id &&
  449. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  450. iwl4965_set_ht_add_station(priv, index,
  451. (struct ieee80211_ht_info *) ht_data);
  452. #endif /*CONFIG_IWL4965_HT*/
  453. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  454. /* Add station to device's station table */
  455. iwl4965_send_add_station(priv, &station->sta, flags);
  456. return index;
  457. }
  458. /*************** DRIVER STATUS FUNCTIONS *****/
  459. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  460. {
  461. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  462. * set but EXIT_PENDING is not */
  463. return test_bit(STATUS_READY, &priv->status) &&
  464. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  465. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  466. }
  467. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  468. {
  469. return test_bit(STATUS_ALIVE, &priv->status);
  470. }
  471. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  472. {
  473. return test_bit(STATUS_INIT, &priv->status);
  474. }
  475. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  476. {
  477. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  478. test_bit(STATUS_RF_KILL_SW, &priv->status);
  479. }
  480. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  481. {
  482. if (iwl4965_is_rfkill(priv))
  483. return 0;
  484. return iwl4965_is_ready(priv);
  485. }
  486. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  487. #define IWL_CMD(x) case x : return #x
  488. static const char *get_cmd_string(u8 cmd)
  489. {
  490. switch (cmd) {
  491. IWL_CMD(REPLY_ALIVE);
  492. IWL_CMD(REPLY_ERROR);
  493. IWL_CMD(REPLY_RXON);
  494. IWL_CMD(REPLY_RXON_ASSOC);
  495. IWL_CMD(REPLY_QOS_PARAM);
  496. IWL_CMD(REPLY_RXON_TIMING);
  497. IWL_CMD(REPLY_ADD_STA);
  498. IWL_CMD(REPLY_REMOVE_STA);
  499. IWL_CMD(REPLY_REMOVE_ALL_STA);
  500. IWL_CMD(REPLY_TX);
  501. IWL_CMD(REPLY_RATE_SCALE);
  502. IWL_CMD(REPLY_LEDS_CMD);
  503. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  504. IWL_CMD(RADAR_NOTIFICATION);
  505. IWL_CMD(REPLY_QUIET_CMD);
  506. IWL_CMD(REPLY_CHANNEL_SWITCH);
  507. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  508. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  509. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  510. IWL_CMD(POWER_TABLE_CMD);
  511. IWL_CMD(PM_SLEEP_NOTIFICATION);
  512. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  513. IWL_CMD(REPLY_SCAN_CMD);
  514. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  515. IWL_CMD(SCAN_START_NOTIFICATION);
  516. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  517. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  518. IWL_CMD(BEACON_NOTIFICATION);
  519. IWL_CMD(REPLY_TX_BEACON);
  520. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  521. IWL_CMD(QUIET_NOTIFICATION);
  522. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  523. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  524. IWL_CMD(REPLY_BT_CONFIG);
  525. IWL_CMD(REPLY_STATISTICS_CMD);
  526. IWL_CMD(STATISTICS_NOTIFICATION);
  527. IWL_CMD(REPLY_CARD_STATE_CMD);
  528. IWL_CMD(CARD_STATE_NOTIFICATION);
  529. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  530. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  531. IWL_CMD(SENSITIVITY_CMD);
  532. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  533. IWL_CMD(REPLY_RX_PHY_CMD);
  534. IWL_CMD(REPLY_RX_MPDU_CMD);
  535. IWL_CMD(REPLY_4965_RX);
  536. IWL_CMD(REPLY_COMPRESSED_BA);
  537. default:
  538. return "UNKNOWN";
  539. }
  540. }
  541. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  542. /**
  543. * iwl4965_enqueue_hcmd - enqueue a uCode command
  544. * @priv: device private data point
  545. * @cmd: a point to the ucode command structure
  546. *
  547. * The function returns < 0 values to indicate the operation is
  548. * failed. On success, it turns the index (> 0) of command in the
  549. * command queue.
  550. */
  551. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  552. {
  553. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  554. struct iwl4965_queue *q = &txq->q;
  555. struct iwl4965_tfd_frame *tfd;
  556. u32 *control_flags;
  557. struct iwl4965_cmd *out_cmd;
  558. u32 idx;
  559. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  560. dma_addr_t phys_addr;
  561. int ret;
  562. unsigned long flags;
  563. /* If any of the command structures end up being larger than
  564. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  565. * we will need to increase the size of the TFD entries */
  566. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  567. !(cmd->meta.flags & CMD_SIZE_HUGE));
  568. if (iwl4965_is_rfkill(priv)) {
  569. IWL_DEBUG_INFO("Not sending command - RF KILL");
  570. return -EIO;
  571. }
  572. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  573. IWL_ERROR("No space for Tx\n");
  574. return -ENOSPC;
  575. }
  576. spin_lock_irqsave(&priv->hcmd_lock, flags);
  577. tfd = &txq->bd[q->write_ptr];
  578. memset(tfd, 0, sizeof(*tfd));
  579. control_flags = (u32 *) tfd;
  580. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  581. out_cmd = &txq->cmd[idx];
  582. out_cmd->hdr.cmd = cmd->id;
  583. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  584. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  585. /* At this point, the out_cmd now has all of the incoming cmd
  586. * information */
  587. out_cmd->hdr.flags = 0;
  588. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  589. INDEX_TO_SEQ(q->write_ptr));
  590. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  591. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  592. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  593. offsetof(struct iwl4965_cmd, hdr);
  594. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  595. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  596. "%d bytes at %d[%d]:%d\n",
  597. get_cmd_string(out_cmd->hdr.cmd),
  598. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  599. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  600. txq->need_update = 1;
  601. /* Set up entry in queue's byte count circular buffer */
  602. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  603. /* Increment and update queue's write index */
  604. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  605. iwl4965_tx_queue_update_write_ptr(priv, txq);
  606. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  607. return ret ? ret : idx;
  608. }
  609. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  610. {
  611. int ret;
  612. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  613. /* An asynchronous command can not expect an SKB to be set. */
  614. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  615. /* An asynchronous command MUST have a callback. */
  616. BUG_ON(!cmd->meta.u.callback);
  617. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  618. return -EBUSY;
  619. ret = iwl4965_enqueue_hcmd(priv, cmd);
  620. if (ret < 0) {
  621. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  622. get_cmd_string(cmd->id), ret);
  623. return ret;
  624. }
  625. return 0;
  626. }
  627. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  628. {
  629. int cmd_idx;
  630. int ret;
  631. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  632. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  633. /* A synchronous command can not have a callback set. */
  634. BUG_ON(cmd->meta.u.callback != NULL);
  635. if (atomic_xchg(&entry, 1)) {
  636. IWL_ERROR("Error sending %s: Already sending a host command\n",
  637. get_cmd_string(cmd->id));
  638. return -EBUSY;
  639. }
  640. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  641. if (cmd->meta.flags & CMD_WANT_SKB)
  642. cmd->meta.source = &cmd->meta;
  643. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  644. if (cmd_idx < 0) {
  645. ret = cmd_idx;
  646. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  647. get_cmd_string(cmd->id), ret);
  648. goto out;
  649. }
  650. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  651. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  652. HOST_COMPLETE_TIMEOUT);
  653. if (!ret) {
  654. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  655. IWL_ERROR("Error sending %s: time out after %dms.\n",
  656. get_cmd_string(cmd->id),
  657. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  658. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  659. ret = -ETIMEDOUT;
  660. goto cancel;
  661. }
  662. }
  663. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  664. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  665. get_cmd_string(cmd->id));
  666. ret = -ECANCELED;
  667. goto fail;
  668. }
  669. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  670. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  671. get_cmd_string(cmd->id));
  672. ret = -EIO;
  673. goto fail;
  674. }
  675. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  676. IWL_ERROR("Error: Response NULL in '%s'\n",
  677. get_cmd_string(cmd->id));
  678. ret = -EIO;
  679. goto out;
  680. }
  681. ret = 0;
  682. goto out;
  683. cancel:
  684. if (cmd->meta.flags & CMD_WANT_SKB) {
  685. struct iwl4965_cmd *qcmd;
  686. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  687. * TX cmd queue. Otherwise in case the cmd comes
  688. * in later, it will possibly set an invalid
  689. * address (cmd->meta.source). */
  690. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  691. qcmd->meta.flags &= ~CMD_WANT_SKB;
  692. }
  693. fail:
  694. if (cmd->meta.u.skb) {
  695. dev_kfree_skb_any(cmd->meta.u.skb);
  696. cmd->meta.u.skb = NULL;
  697. }
  698. out:
  699. atomic_set(&entry, 0);
  700. return ret;
  701. }
  702. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  703. {
  704. if (cmd->meta.flags & CMD_ASYNC)
  705. return iwl4965_send_cmd_async(priv, cmd);
  706. return iwl4965_send_cmd_sync(priv, cmd);
  707. }
  708. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  709. {
  710. struct iwl4965_host_cmd cmd = {
  711. .id = id,
  712. .len = len,
  713. .data = data,
  714. };
  715. return iwl4965_send_cmd_sync(priv, &cmd);
  716. }
  717. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  718. {
  719. struct iwl4965_host_cmd cmd = {
  720. .id = id,
  721. .len = sizeof(val),
  722. .data = &val,
  723. };
  724. return iwl4965_send_cmd_sync(priv, &cmd);
  725. }
  726. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  727. {
  728. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  729. }
  730. /**
  731. * iwl4965_rxon_add_station - add station into station table.
  732. *
  733. * there is only one AP station with id= IWL_AP_ID
  734. * NOTE: mutex must be held before calling this fnction
  735. */
  736. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  737. const u8 *addr, int is_ap)
  738. {
  739. u8 sta_id;
  740. /* Add station to device's station table */
  741. #ifdef CONFIG_IWL4965_HT
  742. struct ieee80211_conf *conf = &priv->hw->conf;
  743. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  744. if ((is_ap) &&
  745. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  746. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  747. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  748. 0, cur_ht_config);
  749. else
  750. #endif /* CONFIG_IWL4965_HT */
  751. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  752. 0, NULL);
  753. /* Set up default rate scaling table in device's station table */
  754. iwl4965_add_station(priv, addr, is_ap);
  755. return sta_id;
  756. }
  757. /**
  758. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  759. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  760. * @channel: Any channel valid for the requested phymode
  761. * In addition to setting the staging RXON, priv->phymode is also set.
  762. *
  763. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  764. * in the staging RXON flag structure based on the phymode
  765. */
  766. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv,
  767. enum ieee80211_band band,
  768. u16 channel)
  769. {
  770. if (!iwl4965_get_channel_info(priv, band, channel)) {
  771. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  772. channel, band);
  773. return -EINVAL;
  774. }
  775. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  776. (priv->band == band))
  777. return 0;
  778. priv->staging_rxon.channel = cpu_to_le16(channel);
  779. if (band == IEEE80211_BAND_5GHZ)
  780. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  781. else
  782. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  783. priv->band = band;
  784. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  785. return 0;
  786. }
  787. /**
  788. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  789. *
  790. * NOTE: This is really only useful during development and can eventually
  791. * be #ifdef'd out once the driver is stable and folks aren't actively
  792. * making changes
  793. */
  794. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  795. {
  796. int error = 0;
  797. int counter = 1;
  798. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  799. error |= le32_to_cpu(rxon->flags &
  800. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  801. RXON_FLG_RADAR_DETECT_MSK));
  802. if (error)
  803. IWL_WARNING("check 24G fields %d | %d\n",
  804. counter++, error);
  805. } else {
  806. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  807. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  808. if (error)
  809. IWL_WARNING("check 52 fields %d | %d\n",
  810. counter++, error);
  811. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  812. if (error)
  813. IWL_WARNING("check 52 CCK %d | %d\n",
  814. counter++, error);
  815. }
  816. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  817. if (error)
  818. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  819. /* make sure basic rates 6Mbps and 1Mbps are supported */
  820. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  821. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  822. if (error)
  823. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  824. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  825. if (error)
  826. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  827. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  828. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  829. if (error)
  830. IWL_WARNING("check CCK and short slot %d | %d\n",
  831. counter++, error);
  832. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  833. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  834. if (error)
  835. IWL_WARNING("check CCK & auto detect %d | %d\n",
  836. counter++, error);
  837. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  838. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  839. if (error)
  840. IWL_WARNING("check TGG and auto detect %d | %d\n",
  841. counter++, error);
  842. if (error)
  843. IWL_WARNING("Tuning to channel %d\n",
  844. le16_to_cpu(rxon->channel));
  845. if (error) {
  846. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  847. return -1;
  848. }
  849. return 0;
  850. }
  851. /**
  852. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  853. * @priv: staging_rxon is compared to active_rxon
  854. *
  855. * If the RXON structure is changing enough to require a new tune,
  856. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  857. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  858. */
  859. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  860. {
  861. /* These items are only settable from the full RXON command */
  862. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  863. compare_ether_addr(priv->staging_rxon.bssid_addr,
  864. priv->active_rxon.bssid_addr) ||
  865. compare_ether_addr(priv->staging_rxon.node_addr,
  866. priv->active_rxon.node_addr) ||
  867. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  868. priv->active_rxon.wlap_bssid_addr) ||
  869. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  870. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  871. (priv->staging_rxon.air_propagation !=
  872. priv->active_rxon.air_propagation) ||
  873. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  874. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  875. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  876. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  877. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  878. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  879. return 1;
  880. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  881. * be updated with the RXON_ASSOC command -- however only some
  882. * flag transitions are allowed using RXON_ASSOC */
  883. /* Check if we are not switching bands */
  884. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  885. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  886. return 1;
  887. /* Check if we are switching association toggle */
  888. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  889. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  890. return 1;
  891. return 0;
  892. }
  893. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  894. {
  895. int rc = 0;
  896. struct iwl4965_rx_packet *res = NULL;
  897. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  898. struct iwl4965_host_cmd cmd = {
  899. .id = REPLY_RXON_ASSOC,
  900. .len = sizeof(rxon_assoc),
  901. .meta.flags = CMD_WANT_SKB,
  902. .data = &rxon_assoc,
  903. };
  904. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  905. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  906. if ((rxon1->flags == rxon2->flags) &&
  907. (rxon1->filter_flags == rxon2->filter_flags) &&
  908. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  909. (rxon1->ofdm_ht_single_stream_basic_rates ==
  910. rxon2->ofdm_ht_single_stream_basic_rates) &&
  911. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  912. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  913. (rxon1->rx_chain == rxon2->rx_chain) &&
  914. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  915. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  916. return 0;
  917. }
  918. rxon_assoc.flags = priv->staging_rxon.flags;
  919. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  920. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  921. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  922. rxon_assoc.reserved = 0;
  923. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  924. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  925. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  926. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  927. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  928. rc = iwl4965_send_cmd_sync(priv, &cmd);
  929. if (rc)
  930. return rc;
  931. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  932. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  933. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  934. rc = -EIO;
  935. }
  936. priv->alloc_rxb_skb--;
  937. dev_kfree_skb_any(cmd.meta.u.skb);
  938. return rc;
  939. }
  940. /**
  941. * iwl4965_commit_rxon - commit staging_rxon to hardware
  942. *
  943. * The RXON command in staging_rxon is committed to the hardware and
  944. * the active_rxon structure is updated with the new data. This
  945. * function correctly transitions out of the RXON_ASSOC_MSK state if
  946. * a HW tune is required based on the RXON structure changes.
  947. */
  948. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  949. {
  950. /* cast away the const for active_rxon in this function */
  951. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  952. DECLARE_MAC_BUF(mac);
  953. int rc = 0;
  954. if (!iwl4965_is_alive(priv))
  955. return -1;
  956. /* always get timestamp with Rx frame */
  957. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  958. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  959. if (rc) {
  960. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  961. return -EINVAL;
  962. }
  963. /* If we don't need to send a full RXON, we can use
  964. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  965. * and other flags for the current radio configuration. */
  966. if (!iwl4965_full_rxon_required(priv)) {
  967. rc = iwl4965_send_rxon_assoc(priv);
  968. if (rc) {
  969. IWL_ERROR("Error setting RXON_ASSOC "
  970. "configuration (%d).\n", rc);
  971. return rc;
  972. }
  973. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  974. return 0;
  975. }
  976. /* station table will be cleared */
  977. priv->assoc_station_added = 0;
  978. #ifdef CONFIG_IWL4965_SENSITIVITY
  979. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  980. if (!priv->error_recovering)
  981. priv->start_calib = 0;
  982. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  983. #endif /* CONFIG_IWL4965_SENSITIVITY */
  984. /* If we are currently associated and the new config requires
  985. * an RXON_ASSOC and the new config wants the associated mask enabled,
  986. * we must clear the associated from the active configuration
  987. * before we apply the new config */
  988. if (iwl4965_is_associated(priv) &&
  989. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  990. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  991. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  992. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  993. sizeof(struct iwl4965_rxon_cmd),
  994. &priv->active_rxon);
  995. /* If the mask clearing failed then we set
  996. * active_rxon back to what it was previously */
  997. if (rc) {
  998. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  999. IWL_ERROR("Error clearing ASSOC_MSK on current "
  1000. "configuration (%d).\n", rc);
  1001. return rc;
  1002. }
  1003. }
  1004. IWL_DEBUG_INFO("Sending RXON\n"
  1005. "* with%s RXON_FILTER_ASSOC_MSK\n"
  1006. "* channel = %d\n"
  1007. "* bssid = %s\n",
  1008. ((priv->staging_rxon.filter_flags &
  1009. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  1010. le16_to_cpu(priv->staging_rxon.channel),
  1011. print_mac(mac, priv->staging_rxon.bssid_addr));
  1012. /* Apply the new configuration */
  1013. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1014. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  1015. if (rc) {
  1016. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  1017. return rc;
  1018. }
  1019. iwl4965_clear_stations_table(priv);
  1020. #ifdef CONFIG_IWL4965_SENSITIVITY
  1021. if (!priv->error_recovering)
  1022. priv->start_calib = 0;
  1023. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1024. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1025. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1026. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1027. /* If we issue a new RXON command which required a tune then we must
  1028. * send a new TXPOWER command or we won't be able to Tx any frames */
  1029. rc = iwl4965_hw_reg_send_txpower(priv);
  1030. if (rc) {
  1031. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1032. return rc;
  1033. }
  1034. /* Add the broadcast address so we can send broadcast frames */
  1035. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1036. IWL_INVALID_STATION) {
  1037. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1038. return -EIO;
  1039. }
  1040. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1041. * add the IWL_AP_ID to the station rate table */
  1042. if (iwl4965_is_associated(priv) &&
  1043. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1044. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1045. == IWL_INVALID_STATION) {
  1046. IWL_ERROR("Error adding AP address for transmit.\n");
  1047. return -EIO;
  1048. }
  1049. priv->assoc_station_added = 1;
  1050. }
  1051. return 0;
  1052. }
  1053. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1054. {
  1055. struct iwl4965_bt_cmd bt_cmd = {
  1056. .flags = 3,
  1057. .lead_time = 0xAA,
  1058. .max_kill = 1,
  1059. .kill_ack_mask = 0,
  1060. .kill_cts_mask = 0,
  1061. };
  1062. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1063. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1064. }
  1065. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1066. {
  1067. int rc = 0;
  1068. struct iwl4965_rx_packet *res;
  1069. struct iwl4965_host_cmd cmd = {
  1070. .id = REPLY_SCAN_ABORT_CMD,
  1071. .meta.flags = CMD_WANT_SKB,
  1072. };
  1073. /* If there isn't a scan actively going on in the hardware
  1074. * then we are in between scan bands and not actually
  1075. * actively scanning, so don't send the abort command */
  1076. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1077. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1078. return 0;
  1079. }
  1080. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1081. if (rc) {
  1082. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1083. return rc;
  1084. }
  1085. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1086. if (res->u.status != CAN_ABORT_STATUS) {
  1087. /* The scan abort will return 1 for success or
  1088. * 2 for "failure". A failure condition can be
  1089. * due to simply not being in an active scan which
  1090. * can occur if we send the scan abort before we
  1091. * the microcode has notified us that a scan is
  1092. * completed. */
  1093. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1094. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1095. clear_bit(STATUS_SCAN_HW, &priv->status);
  1096. }
  1097. dev_kfree_skb_any(cmd.meta.u.skb);
  1098. return rc;
  1099. }
  1100. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1101. struct iwl4965_cmd *cmd,
  1102. struct sk_buff *skb)
  1103. {
  1104. return 1;
  1105. }
  1106. /*
  1107. * CARD_STATE_CMD
  1108. *
  1109. * Use: Sets the device's internal card state to enable, disable, or halt
  1110. *
  1111. * When in the 'enable' state the card operates as normal.
  1112. * When in the 'disable' state, the card enters into a low power mode.
  1113. * When in the 'halt' state, the card is shut down and must be fully
  1114. * restarted to come back on.
  1115. */
  1116. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1117. {
  1118. struct iwl4965_host_cmd cmd = {
  1119. .id = REPLY_CARD_STATE_CMD,
  1120. .len = sizeof(u32),
  1121. .data = &flags,
  1122. .meta.flags = meta_flag,
  1123. };
  1124. if (meta_flag & CMD_ASYNC)
  1125. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1126. return iwl4965_send_cmd(priv, &cmd);
  1127. }
  1128. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1129. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1130. {
  1131. struct iwl4965_rx_packet *res = NULL;
  1132. if (!skb) {
  1133. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1134. return 1;
  1135. }
  1136. res = (struct iwl4965_rx_packet *)skb->data;
  1137. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1138. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1139. res->hdr.flags);
  1140. return 1;
  1141. }
  1142. switch (res->u.add_sta.status) {
  1143. case ADD_STA_SUCCESS_MSK:
  1144. break;
  1145. default:
  1146. break;
  1147. }
  1148. /* We didn't cache the SKB; let the caller free it */
  1149. return 1;
  1150. }
  1151. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1152. struct iwl4965_addsta_cmd *sta, u8 flags)
  1153. {
  1154. struct iwl4965_rx_packet *res = NULL;
  1155. int rc = 0;
  1156. struct iwl4965_host_cmd cmd = {
  1157. .id = REPLY_ADD_STA,
  1158. .len = sizeof(struct iwl4965_addsta_cmd),
  1159. .meta.flags = flags,
  1160. .data = sta,
  1161. };
  1162. if (flags & CMD_ASYNC)
  1163. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1164. else
  1165. cmd.meta.flags |= CMD_WANT_SKB;
  1166. rc = iwl4965_send_cmd(priv, &cmd);
  1167. if (rc || (flags & CMD_ASYNC))
  1168. return rc;
  1169. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1170. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1171. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1172. res->hdr.flags);
  1173. rc = -EIO;
  1174. }
  1175. if (rc == 0) {
  1176. switch (res->u.add_sta.status) {
  1177. case ADD_STA_SUCCESS_MSK:
  1178. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1179. break;
  1180. default:
  1181. rc = -EIO;
  1182. IWL_WARNING("REPLY_ADD_STA failed\n");
  1183. break;
  1184. }
  1185. }
  1186. priv->alloc_rxb_skb--;
  1187. dev_kfree_skb_any(cmd.meta.u.skb);
  1188. return rc;
  1189. }
  1190. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1191. struct ieee80211_key_conf *keyconf,
  1192. u8 sta_id)
  1193. {
  1194. unsigned long flags;
  1195. __le16 key_flags = 0;
  1196. switch (keyconf->alg) {
  1197. case ALG_CCMP:
  1198. key_flags |= STA_KEY_FLG_CCMP;
  1199. key_flags |= cpu_to_le16(
  1200. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1201. key_flags &= ~STA_KEY_FLG_INVALID;
  1202. break;
  1203. case ALG_TKIP:
  1204. case ALG_WEP:
  1205. default:
  1206. return -EINVAL;
  1207. }
  1208. spin_lock_irqsave(&priv->sta_lock, flags);
  1209. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1210. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1211. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1212. keyconf->keylen);
  1213. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1214. keyconf->keylen);
  1215. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1216. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1217. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1218. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1219. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1220. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1221. return 0;
  1222. }
  1223. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1224. {
  1225. unsigned long flags;
  1226. spin_lock_irqsave(&priv->sta_lock, flags);
  1227. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1228. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1229. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1230. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1231. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1232. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1233. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1234. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1235. return 0;
  1236. }
  1237. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1238. {
  1239. struct list_head *element;
  1240. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1241. priv->frames_count);
  1242. while (!list_empty(&priv->free_frames)) {
  1243. element = priv->free_frames.next;
  1244. list_del(element);
  1245. kfree(list_entry(element, struct iwl4965_frame, list));
  1246. priv->frames_count--;
  1247. }
  1248. if (priv->frames_count) {
  1249. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1250. priv->frames_count);
  1251. priv->frames_count = 0;
  1252. }
  1253. }
  1254. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1255. {
  1256. struct iwl4965_frame *frame;
  1257. struct list_head *element;
  1258. if (list_empty(&priv->free_frames)) {
  1259. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1260. if (!frame) {
  1261. IWL_ERROR("Could not allocate frame!\n");
  1262. return NULL;
  1263. }
  1264. priv->frames_count++;
  1265. return frame;
  1266. }
  1267. element = priv->free_frames.next;
  1268. list_del(element);
  1269. return list_entry(element, struct iwl4965_frame, list);
  1270. }
  1271. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1272. {
  1273. memset(frame, 0, sizeof(*frame));
  1274. list_add(&frame->list, &priv->free_frames);
  1275. }
  1276. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1277. struct ieee80211_hdr *hdr,
  1278. const u8 *dest, int left)
  1279. {
  1280. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1281. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1282. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1283. return 0;
  1284. if (priv->ibss_beacon->len > left)
  1285. return 0;
  1286. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1287. return priv->ibss_beacon->len;
  1288. }
  1289. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1290. {
  1291. u8 i;
  1292. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1293. i = iwl4965_rates[i].next_ieee) {
  1294. if (rate_mask & (1 << i))
  1295. return iwl4965_rates[i].plcp;
  1296. }
  1297. return IWL_RATE_INVALID;
  1298. }
  1299. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1300. {
  1301. struct iwl4965_frame *frame;
  1302. unsigned int frame_size;
  1303. int rc;
  1304. u8 rate;
  1305. frame = iwl4965_get_free_frame(priv);
  1306. if (!frame) {
  1307. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1308. "command.\n");
  1309. return -ENOMEM;
  1310. }
  1311. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1312. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1313. 0xFF0);
  1314. if (rate == IWL_INVALID_RATE)
  1315. rate = IWL_RATE_6M_PLCP;
  1316. } else {
  1317. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1318. if (rate == IWL_INVALID_RATE)
  1319. rate = IWL_RATE_1M_PLCP;
  1320. }
  1321. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1322. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1323. &frame->u.cmd[0]);
  1324. iwl4965_free_frame(priv, frame);
  1325. return rc;
  1326. }
  1327. /******************************************************************************
  1328. *
  1329. * EEPROM related functions
  1330. *
  1331. ******************************************************************************/
  1332. static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
  1333. {
  1334. memcpy(mac, priv->eeprom.mac_address, 6);
  1335. }
  1336. static inline void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv)
  1337. {
  1338. iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
  1339. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
  1340. }
  1341. /**
  1342. * iwl4965_eeprom_init - read EEPROM contents
  1343. *
  1344. * Load the EEPROM contents from adapter into priv->eeprom
  1345. *
  1346. * NOTE: This routine uses the non-debug IO access functions.
  1347. */
  1348. int iwl4965_eeprom_init(struct iwl4965_priv *priv)
  1349. {
  1350. u16 *e = (u16 *)&priv->eeprom;
  1351. u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
  1352. u32 r;
  1353. int sz = sizeof(priv->eeprom);
  1354. int rc;
  1355. int i;
  1356. u16 addr;
  1357. /* The EEPROM structure has several padding buffers within it
  1358. * and when adding new EEPROM maps is subject to programmer errors
  1359. * which may be very difficult to identify without explicitly
  1360. * checking the resulting size of the eeprom map. */
  1361. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1362. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1363. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1364. return -ENOENT;
  1365. }
  1366. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1367. rc = iwl4965_eeprom_acquire_semaphore(priv);
  1368. if (rc < 0) {
  1369. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1370. return -ENOENT;
  1371. }
  1372. /* eeprom is an array of 16bit values */
  1373. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1374. _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
  1375. _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1376. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1377. i += IWL_EEPROM_ACCESS_DELAY) {
  1378. r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
  1379. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1380. break;
  1381. udelay(IWL_EEPROM_ACCESS_DELAY);
  1382. }
  1383. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1384. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1385. rc = -ETIMEDOUT;
  1386. goto done;
  1387. }
  1388. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  1389. }
  1390. rc = 0;
  1391. done:
  1392. iwl4965_eeprom_release_semaphore(priv);
  1393. return rc;
  1394. }
  1395. /******************************************************************************
  1396. *
  1397. * Misc. internal state and helper functions
  1398. *
  1399. ******************************************************************************/
  1400. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1401. {
  1402. if (priv->hw_setting.shared_virt)
  1403. pci_free_consistent(priv->pci_dev,
  1404. sizeof(struct iwl4965_shared),
  1405. priv->hw_setting.shared_virt,
  1406. priv->hw_setting.shared_phys);
  1407. }
  1408. /**
  1409. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1410. *
  1411. * return : set the bit for each supported rate insert in ie
  1412. */
  1413. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1414. u16 basic_rate, int *left)
  1415. {
  1416. u16 ret_rates = 0, bit;
  1417. int i;
  1418. u8 *cnt = ie;
  1419. u8 *rates = ie + 1;
  1420. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1421. if (bit & supported_rate) {
  1422. ret_rates |= bit;
  1423. rates[*cnt] = iwl4965_rates[i].ieee |
  1424. ((bit & basic_rate) ? 0x80 : 0x00);
  1425. (*cnt)++;
  1426. (*left)--;
  1427. if ((*left <= 0) ||
  1428. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1429. break;
  1430. }
  1431. }
  1432. return ret_rates;
  1433. }
  1434. /**
  1435. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1436. */
  1437. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1438. enum ieee80211_band band,
  1439. struct ieee80211_mgmt *frame,
  1440. int left, int is_direct)
  1441. {
  1442. int len = 0;
  1443. u8 *pos = NULL;
  1444. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1445. #ifdef CONFIG_IWL4965_HT
  1446. const struct ieee80211_supported_band *sband =
  1447. iwl4965_get_hw_mode(priv, band);
  1448. #endif /* CONFIG_IWL4965_HT */
  1449. /* Make sure there is enough space for the probe request,
  1450. * two mandatory IEs and the data */
  1451. left -= 24;
  1452. if (left < 0)
  1453. return 0;
  1454. len += 24;
  1455. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1456. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1457. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1458. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1459. frame->seq_ctrl = 0;
  1460. /* fill in our indirect SSID IE */
  1461. /* ...next IE... */
  1462. left -= 2;
  1463. if (left < 0)
  1464. return 0;
  1465. len += 2;
  1466. pos = &(frame->u.probe_req.variable[0]);
  1467. *pos++ = WLAN_EID_SSID;
  1468. *pos++ = 0;
  1469. /* fill in our direct SSID IE... */
  1470. if (is_direct) {
  1471. /* ...next IE... */
  1472. left -= 2 + priv->essid_len;
  1473. if (left < 0)
  1474. return 0;
  1475. /* ... fill it in... */
  1476. *pos++ = WLAN_EID_SSID;
  1477. *pos++ = priv->essid_len;
  1478. memcpy(pos, priv->essid, priv->essid_len);
  1479. pos += priv->essid_len;
  1480. len += 2 + priv->essid_len;
  1481. }
  1482. /* fill in supported rate */
  1483. /* ...next IE... */
  1484. left -= 2;
  1485. if (left < 0)
  1486. return 0;
  1487. /* ... fill it in... */
  1488. *pos++ = WLAN_EID_SUPP_RATES;
  1489. *pos = 0;
  1490. /* exclude 60M rate */
  1491. active_rates = priv->rates_mask;
  1492. active_rates &= ~IWL_RATE_60M_MASK;
  1493. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1494. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1495. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1496. active_rate_basic, &left);
  1497. active_rates &= ~ret_rates;
  1498. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1499. active_rate_basic, &left);
  1500. active_rates &= ~ret_rates;
  1501. len += 2 + *pos;
  1502. pos += (*pos) + 1;
  1503. if (active_rates == 0)
  1504. goto fill_end;
  1505. /* fill in supported extended rate */
  1506. /* ...next IE... */
  1507. left -= 2;
  1508. if (left < 0)
  1509. return 0;
  1510. /* ... fill it in... */
  1511. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1512. *pos = 0;
  1513. iwl4965_supported_rate_to_ie(pos, active_rates,
  1514. active_rate_basic, &left);
  1515. if (*pos > 0)
  1516. len += 2 + *pos;
  1517. #ifdef CONFIG_IWL4965_HT
  1518. if (sband && sband->ht_info.ht_supported) {
  1519. struct ieee80211_ht_cap *ht_cap;
  1520. pos += (*pos) + 1;
  1521. *pos++ = WLAN_EID_HT_CAPABILITY;
  1522. *pos++ = sizeof(struct ieee80211_ht_cap);
  1523. ht_cap = (struct ieee80211_ht_cap *)pos;
  1524. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1525. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1526. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1527. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1528. ((sband->ht_info.ampdu_density << 2) &
  1529. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1530. len += 2 + sizeof(struct ieee80211_ht_cap);
  1531. }
  1532. #endif /*CONFIG_IWL4965_HT */
  1533. fill_end:
  1534. return (u16)len;
  1535. }
  1536. /*
  1537. * QoS support
  1538. */
  1539. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1540. struct iwl4965_qosparam_cmd *qos)
  1541. {
  1542. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1543. sizeof(struct iwl4965_qosparam_cmd), qos);
  1544. }
  1545. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1546. {
  1547. u16 cw_min = 15;
  1548. u16 cw_max = 1023;
  1549. u8 aifs = 2;
  1550. u8 is_legacy = 0;
  1551. unsigned long flags;
  1552. int i;
  1553. spin_lock_irqsave(&priv->lock, flags);
  1554. priv->qos_data.qos_active = 0;
  1555. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1556. if (priv->qos_data.qos_enable)
  1557. priv->qos_data.qos_active = 1;
  1558. if (!(priv->active_rate & 0xfff0)) {
  1559. cw_min = 31;
  1560. is_legacy = 1;
  1561. }
  1562. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1563. if (priv->qos_data.qos_enable)
  1564. priv->qos_data.qos_active = 1;
  1565. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1566. cw_min = 31;
  1567. is_legacy = 1;
  1568. }
  1569. if (priv->qos_data.qos_active)
  1570. aifs = 3;
  1571. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1572. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1573. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1574. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1575. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1576. if (priv->qos_data.qos_active) {
  1577. i = 1;
  1578. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1579. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1580. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1581. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1582. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1583. i = 2;
  1584. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1585. cpu_to_le16((cw_min + 1) / 2 - 1);
  1586. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1587. cpu_to_le16(cw_max);
  1588. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1589. if (is_legacy)
  1590. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1591. cpu_to_le16(6016);
  1592. else
  1593. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1594. cpu_to_le16(3008);
  1595. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1596. i = 3;
  1597. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1598. cpu_to_le16((cw_min + 1) / 4 - 1);
  1599. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1600. cpu_to_le16((cw_max + 1) / 2 - 1);
  1601. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1602. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1603. if (is_legacy)
  1604. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1605. cpu_to_le16(3264);
  1606. else
  1607. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1608. cpu_to_le16(1504);
  1609. } else {
  1610. for (i = 1; i < 4; i++) {
  1611. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1612. cpu_to_le16(cw_min);
  1613. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1614. cpu_to_le16(cw_max);
  1615. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1616. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1617. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1618. }
  1619. }
  1620. IWL_DEBUG_QOS("set QoS to default \n");
  1621. spin_unlock_irqrestore(&priv->lock, flags);
  1622. }
  1623. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1624. {
  1625. unsigned long flags;
  1626. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1627. return;
  1628. if (!priv->qos_data.qos_enable)
  1629. return;
  1630. spin_lock_irqsave(&priv->lock, flags);
  1631. priv->qos_data.def_qos_parm.qos_flags = 0;
  1632. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1633. !priv->qos_data.qos_cap.q_AP.txop_request)
  1634. priv->qos_data.def_qos_parm.qos_flags |=
  1635. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1636. if (priv->qos_data.qos_active)
  1637. priv->qos_data.def_qos_parm.qos_flags |=
  1638. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1639. #ifdef CONFIG_IWL4965_HT
  1640. if (priv->current_ht_config.is_ht)
  1641. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1642. #endif /* CONFIG_IWL4965_HT */
  1643. spin_unlock_irqrestore(&priv->lock, flags);
  1644. if (force || iwl4965_is_associated(priv)) {
  1645. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1646. priv->qos_data.qos_active,
  1647. priv->qos_data.def_qos_parm.qos_flags);
  1648. iwl4965_send_qos_params_command(priv,
  1649. &(priv->qos_data.def_qos_parm));
  1650. }
  1651. }
  1652. /*
  1653. * Power management (not Tx power!) functions
  1654. */
  1655. #define MSEC_TO_USEC 1024
  1656. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1657. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1658. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1659. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1660. __constant_cpu_to_le32(X1), \
  1661. __constant_cpu_to_le32(X2), \
  1662. __constant_cpu_to_le32(X3), \
  1663. __constant_cpu_to_le32(X4)}
  1664. /* default power management (not Tx power) table values */
  1665. /* for tim 0-10 */
  1666. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1667. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1668. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1669. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1670. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1671. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1672. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1673. };
  1674. /* for tim > 10 */
  1675. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1676. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1677. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1678. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1679. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1680. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1681. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1682. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1683. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1684. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1685. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1686. };
  1687. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1688. {
  1689. int rc = 0, i;
  1690. struct iwl4965_power_mgr *pow_data;
  1691. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1692. u16 pci_pm;
  1693. IWL_DEBUG_POWER("Initialize power \n");
  1694. pow_data = &(priv->power_data);
  1695. memset(pow_data, 0, sizeof(*pow_data));
  1696. pow_data->active_index = IWL_POWER_RANGE_0;
  1697. pow_data->dtim_val = 0xffff;
  1698. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1699. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1700. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1701. if (rc != 0)
  1702. return 0;
  1703. else {
  1704. struct iwl4965_powertable_cmd *cmd;
  1705. IWL_DEBUG_POWER("adjust power command flags\n");
  1706. for (i = 0; i < IWL_POWER_AC; i++) {
  1707. cmd = &pow_data->pwr_range_0[i].cmd;
  1708. if (pci_pm & 0x1)
  1709. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1710. else
  1711. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1712. }
  1713. }
  1714. return rc;
  1715. }
  1716. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1717. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1718. {
  1719. int rc = 0, i;
  1720. u8 skip;
  1721. u32 max_sleep = 0;
  1722. struct iwl4965_power_vec_entry *range;
  1723. u8 period = 0;
  1724. struct iwl4965_power_mgr *pow_data;
  1725. if (mode > IWL_POWER_INDEX_5) {
  1726. IWL_DEBUG_POWER("Error invalid power mode \n");
  1727. return -1;
  1728. }
  1729. pow_data = &(priv->power_data);
  1730. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1731. range = &pow_data->pwr_range_0[0];
  1732. else
  1733. range = &pow_data->pwr_range_1[1];
  1734. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1735. #ifdef IWL_MAC80211_DISABLE
  1736. if (priv->assoc_network != NULL) {
  1737. unsigned long flags;
  1738. period = priv->assoc_network->tim.tim_period;
  1739. }
  1740. #endif /*IWL_MAC80211_DISABLE */
  1741. skip = range[mode].no_dtim;
  1742. if (period == 0) {
  1743. period = 1;
  1744. skip = 0;
  1745. }
  1746. if (skip == 0) {
  1747. max_sleep = period;
  1748. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1749. } else {
  1750. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1751. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1752. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1753. }
  1754. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1755. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1756. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1757. }
  1758. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1759. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1760. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1761. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1762. le32_to_cpu(cmd->sleep_interval[0]),
  1763. le32_to_cpu(cmd->sleep_interval[1]),
  1764. le32_to_cpu(cmd->sleep_interval[2]),
  1765. le32_to_cpu(cmd->sleep_interval[3]),
  1766. le32_to_cpu(cmd->sleep_interval[4]));
  1767. return rc;
  1768. }
  1769. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1770. {
  1771. u32 uninitialized_var(final_mode);
  1772. int rc;
  1773. struct iwl4965_powertable_cmd cmd;
  1774. /* If on battery, set to 3,
  1775. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1776. * else user level */
  1777. switch (mode) {
  1778. case IWL_POWER_BATTERY:
  1779. final_mode = IWL_POWER_INDEX_3;
  1780. break;
  1781. case IWL_POWER_AC:
  1782. final_mode = IWL_POWER_MODE_CAM;
  1783. break;
  1784. default:
  1785. final_mode = mode;
  1786. break;
  1787. }
  1788. cmd.keep_alive_beacons = 0;
  1789. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1790. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1791. if (final_mode == IWL_POWER_MODE_CAM)
  1792. clear_bit(STATUS_POWER_PMI, &priv->status);
  1793. else
  1794. set_bit(STATUS_POWER_PMI, &priv->status);
  1795. return rc;
  1796. }
  1797. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1798. {
  1799. /* Filter incoming packets to determine if they are targeted toward
  1800. * this network, discarding packets coming from ourselves */
  1801. switch (priv->iw_mode) {
  1802. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1803. /* packets from our adapter are dropped (echo) */
  1804. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1805. return 0;
  1806. /* {broad,multi}cast packets to our IBSS go through */
  1807. if (is_multicast_ether_addr(header->addr1))
  1808. return !compare_ether_addr(header->addr3, priv->bssid);
  1809. /* packets to our adapter go through */
  1810. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1811. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1812. /* packets from our adapter are dropped (echo) */
  1813. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1814. return 0;
  1815. /* {broad,multi}cast packets to our BSS go through */
  1816. if (is_multicast_ether_addr(header->addr1))
  1817. return !compare_ether_addr(header->addr2, priv->bssid);
  1818. /* packets to our adapter go through */
  1819. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1820. }
  1821. return 1;
  1822. }
  1823. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1824. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1825. {
  1826. switch (status & TX_STATUS_MSK) {
  1827. case TX_STATUS_SUCCESS:
  1828. return "SUCCESS";
  1829. TX_STATUS_ENTRY(SHORT_LIMIT);
  1830. TX_STATUS_ENTRY(LONG_LIMIT);
  1831. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1832. TX_STATUS_ENTRY(MGMNT_ABORT);
  1833. TX_STATUS_ENTRY(NEXT_FRAG);
  1834. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1835. TX_STATUS_ENTRY(DEST_PS);
  1836. TX_STATUS_ENTRY(ABORTED);
  1837. TX_STATUS_ENTRY(BT_RETRY);
  1838. TX_STATUS_ENTRY(STA_INVALID);
  1839. TX_STATUS_ENTRY(FRAG_DROPPED);
  1840. TX_STATUS_ENTRY(TID_DISABLE);
  1841. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1842. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1843. TX_STATUS_ENTRY(TX_LOCKED);
  1844. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1845. }
  1846. return "UNKNOWN";
  1847. }
  1848. /**
  1849. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1850. *
  1851. * NOTE: priv->mutex is not required before calling this function
  1852. */
  1853. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  1854. {
  1855. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1856. clear_bit(STATUS_SCANNING, &priv->status);
  1857. return 0;
  1858. }
  1859. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1860. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1861. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1862. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1863. queue_work(priv->workqueue, &priv->abort_scan);
  1864. } else
  1865. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1866. return test_bit(STATUS_SCANNING, &priv->status);
  1867. }
  1868. return 0;
  1869. }
  1870. /**
  1871. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1872. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1873. *
  1874. * NOTE: priv->mutex must be held before calling this function
  1875. */
  1876. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  1877. {
  1878. unsigned long now = jiffies;
  1879. int ret;
  1880. ret = iwl4965_scan_cancel(priv);
  1881. if (ret && ms) {
  1882. mutex_unlock(&priv->mutex);
  1883. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1884. test_bit(STATUS_SCANNING, &priv->status))
  1885. msleep(1);
  1886. mutex_lock(&priv->mutex);
  1887. return test_bit(STATUS_SCANNING, &priv->status);
  1888. }
  1889. return ret;
  1890. }
  1891. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  1892. {
  1893. /* Reset ieee stats */
  1894. /* We don't reset the net_device_stats (ieee->stats) on
  1895. * re-association */
  1896. priv->last_seq_num = -1;
  1897. priv->last_frag_num = -1;
  1898. priv->last_packet_time = 0;
  1899. iwl4965_scan_cancel(priv);
  1900. }
  1901. #define MAX_UCODE_BEACON_INTERVAL 4096
  1902. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1903. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1904. {
  1905. u16 new_val = 0;
  1906. u16 beacon_factor = 0;
  1907. beacon_factor =
  1908. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1909. / MAX_UCODE_BEACON_INTERVAL;
  1910. new_val = beacon_val / beacon_factor;
  1911. return cpu_to_le16(new_val);
  1912. }
  1913. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  1914. {
  1915. u64 interval_tm_unit;
  1916. u64 tsf, result;
  1917. unsigned long flags;
  1918. struct ieee80211_conf *conf = NULL;
  1919. u16 beacon_int = 0;
  1920. conf = ieee80211_get_hw_conf(priv->hw);
  1921. spin_lock_irqsave(&priv->lock, flags);
  1922. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1923. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1924. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1925. tsf = priv->timestamp1;
  1926. tsf = ((tsf << 32) | priv->timestamp0);
  1927. beacon_int = priv->beacon_int;
  1928. spin_unlock_irqrestore(&priv->lock, flags);
  1929. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1930. if (beacon_int == 0) {
  1931. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1932. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1933. } else {
  1934. priv->rxon_timing.beacon_interval =
  1935. cpu_to_le16(beacon_int);
  1936. priv->rxon_timing.beacon_interval =
  1937. iwl4965_adjust_beacon_interval(
  1938. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1939. }
  1940. priv->rxon_timing.atim_window = 0;
  1941. } else {
  1942. priv->rxon_timing.beacon_interval =
  1943. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1944. /* TODO: we need to get atim_window from upper stack
  1945. * for now we set to 0 */
  1946. priv->rxon_timing.atim_window = 0;
  1947. }
  1948. interval_tm_unit =
  1949. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1950. result = do_div(tsf, interval_tm_unit);
  1951. priv->rxon_timing.beacon_init_val =
  1952. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1953. IWL_DEBUG_ASSOC
  1954. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1955. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1956. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1957. le16_to_cpu(priv->rxon_timing.atim_window));
  1958. }
  1959. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  1960. {
  1961. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1962. IWL_ERROR("APs don't scan.\n");
  1963. return 0;
  1964. }
  1965. if (!iwl4965_is_ready_rf(priv)) {
  1966. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1967. return -EIO;
  1968. }
  1969. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1970. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1971. return -EAGAIN;
  1972. }
  1973. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1974. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1975. "Queuing.\n");
  1976. return -EAGAIN;
  1977. }
  1978. IWL_DEBUG_INFO("Starting scan...\n");
  1979. priv->scan_bands = 2;
  1980. set_bit(STATUS_SCANNING, &priv->status);
  1981. priv->scan_start = jiffies;
  1982. priv->scan_pass_start = priv->scan_start;
  1983. queue_work(priv->workqueue, &priv->request_scan);
  1984. return 0;
  1985. }
  1986. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  1987. {
  1988. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  1989. if (hw_decrypt)
  1990. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  1991. else
  1992. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  1993. return 0;
  1994. }
  1995. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv,
  1996. enum ieee80211_band band)
  1997. {
  1998. if (band == IEEE80211_BAND_5GHZ) {
  1999. priv->staging_rxon.flags &=
  2000. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2001. | RXON_FLG_CCK_MSK);
  2002. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2003. } else {
  2004. /* Copied from iwl4965_bg_post_associate() */
  2005. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2006. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2007. else
  2008. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2009. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2010. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2011. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2012. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2013. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2014. }
  2015. }
  2016. /*
  2017. * initialize rxon structure with default values from eeprom
  2018. */
  2019. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  2020. {
  2021. const struct iwl4965_channel_info *ch_info;
  2022. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2023. switch (priv->iw_mode) {
  2024. case IEEE80211_IF_TYPE_AP:
  2025. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2026. break;
  2027. case IEEE80211_IF_TYPE_STA:
  2028. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2029. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2030. break;
  2031. case IEEE80211_IF_TYPE_IBSS:
  2032. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2033. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2034. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2035. RXON_FILTER_ACCEPT_GRP_MSK;
  2036. break;
  2037. case IEEE80211_IF_TYPE_MNTR:
  2038. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2039. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2040. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2041. break;
  2042. }
  2043. #if 0
  2044. /* TODO: Figure out when short_preamble would be set and cache from
  2045. * that */
  2046. if (!hw_to_local(priv->hw)->short_preamble)
  2047. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2048. else
  2049. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2050. #endif
  2051. ch_info = iwl4965_get_channel_info(priv, priv->band,
  2052. le16_to_cpu(priv->staging_rxon.channel));
  2053. if (!ch_info)
  2054. ch_info = &priv->channel_info[0];
  2055. /*
  2056. * in some case A channels are all non IBSS
  2057. * in this case force B/G channel
  2058. */
  2059. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2060. !(is_channel_ibss(ch_info)))
  2061. ch_info = &priv->channel_info[0];
  2062. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2063. priv->band = ch_info->band;
  2064. iwl4965_set_flags_for_phymode(priv, priv->band);
  2065. priv->staging_rxon.ofdm_basic_rates =
  2066. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2067. priv->staging_rxon.cck_basic_rates =
  2068. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2069. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2070. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2071. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2072. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2073. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2074. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2075. iwl4965_set_rxon_chain(priv);
  2076. }
  2077. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  2078. {
  2079. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2080. const struct iwl4965_channel_info *ch_info;
  2081. ch_info = iwl4965_get_channel_info(priv,
  2082. priv->band,
  2083. le16_to_cpu(priv->staging_rxon.channel));
  2084. if (!ch_info || !is_channel_ibss(ch_info)) {
  2085. IWL_ERROR("channel %d not IBSS channel\n",
  2086. le16_to_cpu(priv->staging_rxon.channel));
  2087. return -EINVAL;
  2088. }
  2089. }
  2090. priv->iw_mode = mode;
  2091. iwl4965_connection_init_rx_config(priv);
  2092. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2093. iwl4965_clear_stations_table(priv);
  2094. /* dont commit rxon if rf-kill is on*/
  2095. if (!iwl4965_is_ready_rf(priv))
  2096. return -EAGAIN;
  2097. cancel_delayed_work(&priv->scan_check);
  2098. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2099. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2100. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2101. return -EAGAIN;
  2102. }
  2103. iwl4965_commit_rxon(priv);
  2104. return 0;
  2105. }
  2106. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2107. struct ieee80211_tx_control *ctl,
  2108. struct iwl4965_cmd *cmd,
  2109. struct sk_buff *skb_frag,
  2110. int last_frag)
  2111. {
  2112. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2113. switch (keyinfo->alg) {
  2114. case ALG_CCMP:
  2115. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2116. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2117. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2118. break;
  2119. case ALG_TKIP:
  2120. #if 0
  2121. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2122. if (last_frag)
  2123. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2124. 8);
  2125. else
  2126. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2127. #endif
  2128. break;
  2129. case ALG_WEP:
  2130. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2131. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2132. if (keyinfo->keylen == 13)
  2133. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2134. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2135. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2136. "with key %d\n", ctl->key_idx);
  2137. break;
  2138. default:
  2139. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2140. break;
  2141. }
  2142. }
  2143. /*
  2144. * handle build REPLY_TX command notification.
  2145. */
  2146. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2147. struct iwl4965_cmd *cmd,
  2148. struct ieee80211_tx_control *ctrl,
  2149. struct ieee80211_hdr *hdr,
  2150. int is_unicast, u8 std_id)
  2151. {
  2152. __le16 *qc;
  2153. u16 fc = le16_to_cpu(hdr->frame_control);
  2154. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2155. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2156. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2157. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2158. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2159. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2160. if (ieee80211_is_probe_response(fc) &&
  2161. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2162. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2163. } else {
  2164. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2165. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2166. }
  2167. if (ieee80211_is_back_request(fc))
  2168. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  2169. cmd->cmd.tx.sta_id = std_id;
  2170. if (ieee80211_get_morefrag(hdr))
  2171. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2172. qc = ieee80211_get_qos_ctrl(hdr);
  2173. if (qc) {
  2174. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2175. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2176. } else
  2177. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2178. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2179. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2180. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2181. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2182. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2183. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2184. }
  2185. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2186. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2187. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2188. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2189. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2190. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2191. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2192. else
  2193. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2194. } else
  2195. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2196. cmd->cmd.tx.driver_txop = 0;
  2197. cmd->cmd.tx.tx_flags = tx_flags;
  2198. cmd->cmd.tx.next_frame_len = 0;
  2199. }
  2200. /**
  2201. * iwl4965_get_sta_id - Find station's index within station table
  2202. *
  2203. * If new IBSS station, create new entry in station table
  2204. */
  2205. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2206. struct ieee80211_hdr *hdr)
  2207. {
  2208. int sta_id;
  2209. u16 fc = le16_to_cpu(hdr->frame_control);
  2210. DECLARE_MAC_BUF(mac);
  2211. /* If this frame is broadcast or management, use broadcast station id */
  2212. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2213. is_multicast_ether_addr(hdr->addr1))
  2214. return priv->hw_setting.bcast_sta_id;
  2215. switch (priv->iw_mode) {
  2216. /* If we are a client station in a BSS network, use the special
  2217. * AP station entry (that's the only station we communicate with) */
  2218. case IEEE80211_IF_TYPE_STA:
  2219. return IWL_AP_ID;
  2220. /* If we are an AP, then find the station, or use BCAST */
  2221. case IEEE80211_IF_TYPE_AP:
  2222. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2223. if (sta_id != IWL_INVALID_STATION)
  2224. return sta_id;
  2225. return priv->hw_setting.bcast_sta_id;
  2226. /* If this frame is going out to an IBSS network, find the station,
  2227. * or create a new station table entry */
  2228. case IEEE80211_IF_TYPE_IBSS:
  2229. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2230. if (sta_id != IWL_INVALID_STATION)
  2231. return sta_id;
  2232. /* Create new station table entry */
  2233. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2234. 0, CMD_ASYNC, NULL);
  2235. if (sta_id != IWL_INVALID_STATION)
  2236. return sta_id;
  2237. IWL_DEBUG_DROP("Station %s not in station map. "
  2238. "Defaulting to broadcast...\n",
  2239. print_mac(mac, hdr->addr1));
  2240. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2241. return priv->hw_setting.bcast_sta_id;
  2242. default:
  2243. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2244. return priv->hw_setting.bcast_sta_id;
  2245. }
  2246. }
  2247. /*
  2248. * start REPLY_TX command process
  2249. */
  2250. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2251. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2252. {
  2253. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2254. struct iwl4965_tfd_frame *tfd;
  2255. u32 *control_flags;
  2256. int txq_id = ctl->queue;
  2257. struct iwl4965_tx_queue *txq = NULL;
  2258. struct iwl4965_queue *q = NULL;
  2259. dma_addr_t phys_addr;
  2260. dma_addr_t txcmd_phys;
  2261. dma_addr_t scratch_phys;
  2262. struct iwl4965_cmd *out_cmd = NULL;
  2263. u16 len, idx, len_org;
  2264. u8 id, hdr_len, unicast;
  2265. u8 sta_id;
  2266. u16 seq_number = 0;
  2267. u16 fc;
  2268. __le16 *qc;
  2269. u8 wait_write_ptr = 0;
  2270. unsigned long flags;
  2271. int rc;
  2272. spin_lock_irqsave(&priv->lock, flags);
  2273. if (iwl4965_is_rfkill(priv)) {
  2274. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2275. goto drop_unlock;
  2276. }
  2277. if (!priv->vif) {
  2278. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2279. goto drop_unlock;
  2280. }
  2281. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  2282. IWL_ERROR("ERROR: No TX rate available.\n");
  2283. goto drop_unlock;
  2284. }
  2285. unicast = !is_multicast_ether_addr(hdr->addr1);
  2286. id = 0;
  2287. fc = le16_to_cpu(hdr->frame_control);
  2288. #ifdef CONFIG_IWL4965_DEBUG
  2289. if (ieee80211_is_auth(fc))
  2290. IWL_DEBUG_TX("Sending AUTH frame\n");
  2291. else if (ieee80211_is_assoc_request(fc))
  2292. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2293. else if (ieee80211_is_reassoc_request(fc))
  2294. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2295. #endif
  2296. /* drop all data frame if we are not associated */
  2297. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  2298. (!iwl4965_is_associated(priv) ||
  2299. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  2300. !priv->assoc_station_added)) {
  2301. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2302. goto drop_unlock;
  2303. }
  2304. spin_unlock_irqrestore(&priv->lock, flags);
  2305. hdr_len = ieee80211_get_hdrlen(fc);
  2306. /* Find (or create) index into station table for destination station */
  2307. sta_id = iwl4965_get_sta_id(priv, hdr);
  2308. if (sta_id == IWL_INVALID_STATION) {
  2309. DECLARE_MAC_BUF(mac);
  2310. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2311. print_mac(mac, hdr->addr1));
  2312. goto drop;
  2313. }
  2314. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2315. qc = ieee80211_get_qos_ctrl(hdr);
  2316. if (qc) {
  2317. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2318. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2319. IEEE80211_SCTL_SEQ;
  2320. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2321. (hdr->seq_ctrl &
  2322. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2323. seq_number += 0x10;
  2324. #ifdef CONFIG_IWL4965_HT
  2325. /* aggregation is on for this <sta,tid> */
  2326. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  2327. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2328. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  2329. #endif /* CONFIG_IWL4965_HT */
  2330. }
  2331. /* Descriptor for chosen Tx queue */
  2332. txq = &priv->txq[txq_id];
  2333. q = &txq->q;
  2334. spin_lock_irqsave(&priv->lock, flags);
  2335. /* Set up first empty TFD within this queue's circular TFD buffer */
  2336. tfd = &txq->bd[q->write_ptr];
  2337. memset(tfd, 0, sizeof(*tfd));
  2338. control_flags = (u32 *) tfd;
  2339. idx = get_cmd_index(q, q->write_ptr, 0);
  2340. /* Set up driver data for this TFD */
  2341. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2342. txq->txb[q->write_ptr].skb[0] = skb;
  2343. memcpy(&(txq->txb[q->write_ptr].status.control),
  2344. ctl, sizeof(struct ieee80211_tx_control));
  2345. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2346. out_cmd = &txq->cmd[idx];
  2347. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2348. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2349. /*
  2350. * Set up the Tx-command (not MAC!) header.
  2351. * Store the chosen Tx queue and TFD index within the sequence field;
  2352. * after Tx, uCode's Tx response will return this value so driver can
  2353. * locate the frame within the tx queue and do post-tx processing.
  2354. */
  2355. out_cmd->hdr.cmd = REPLY_TX;
  2356. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2357. INDEX_TO_SEQ(q->write_ptr)));
  2358. /* Copy MAC header from skb into command buffer */
  2359. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2360. /*
  2361. * Use the first empty entry in this queue's command buffer array
  2362. * to contain the Tx command and MAC header concatenated together
  2363. * (payload data will be in another buffer).
  2364. * Size of this varies, due to varying MAC header length.
  2365. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2366. * of the MAC header (device reads on dword boundaries).
  2367. * We'll tell device about this padding later.
  2368. */
  2369. len = priv->hw_setting.tx_cmd_len +
  2370. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2371. len_org = len;
  2372. len = (len + 3) & ~3;
  2373. if (len_org != len)
  2374. len_org = 1;
  2375. else
  2376. len_org = 0;
  2377. /* Physical address of this Tx command's header (not MAC header!),
  2378. * within command buffer array. */
  2379. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2380. offsetof(struct iwl4965_cmd, hdr);
  2381. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2382. * first entry */
  2383. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2384. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2385. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2386. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2387. * if any (802.11 null frames have no payload). */
  2388. len = skb->len - hdr_len;
  2389. if (len) {
  2390. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2391. len, PCI_DMA_TODEVICE);
  2392. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2393. }
  2394. /* Tell 4965 about any 2-byte padding after MAC header */
  2395. if (len_org)
  2396. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2397. /* Total # bytes to be transmitted */
  2398. len = (u16)skb->len;
  2399. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2400. /* TODO need this for burst mode later on */
  2401. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2402. /* set is_hcca to 0; it probably will never be implemented */
  2403. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2404. scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
  2405. offsetof(struct iwl4965_tx_cmd, scratch);
  2406. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2407. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2408. if (!ieee80211_get_morefrag(hdr)) {
  2409. txq->need_update = 1;
  2410. if (qc) {
  2411. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2412. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2413. }
  2414. } else {
  2415. wait_write_ptr = 1;
  2416. txq->need_update = 0;
  2417. }
  2418. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2419. sizeof(out_cmd->cmd.tx));
  2420. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2421. ieee80211_get_hdrlen(fc));
  2422. /* Set up entry for this TFD in Tx byte-count array */
  2423. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2424. /* Tell device the write index *just past* this latest filled TFD */
  2425. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  2426. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2427. spin_unlock_irqrestore(&priv->lock, flags);
  2428. if (rc)
  2429. return rc;
  2430. if ((iwl4965_queue_space(q) < q->high_mark)
  2431. && priv->mac80211_registered) {
  2432. if (wait_write_ptr) {
  2433. spin_lock_irqsave(&priv->lock, flags);
  2434. txq->need_update = 1;
  2435. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2436. spin_unlock_irqrestore(&priv->lock, flags);
  2437. }
  2438. ieee80211_stop_queue(priv->hw, ctl->queue);
  2439. }
  2440. return 0;
  2441. drop_unlock:
  2442. spin_unlock_irqrestore(&priv->lock, flags);
  2443. drop:
  2444. return -1;
  2445. }
  2446. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2447. {
  2448. const struct ieee80211_supported_band *hw = NULL;
  2449. struct ieee80211_rate *rate;
  2450. int i;
  2451. hw = iwl4965_get_hw_mode(priv, priv->band);
  2452. if (!hw) {
  2453. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2454. return;
  2455. }
  2456. priv->active_rate = 0;
  2457. priv->active_rate_basic = 0;
  2458. for (i = 0; i < hw->n_bitrates; i++) {
  2459. rate = &(hw->bitrates[i]);
  2460. if (rate->hw_value < IWL_RATE_COUNT)
  2461. priv->active_rate |= (1 << rate->hw_value);
  2462. }
  2463. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2464. priv->active_rate, priv->active_rate_basic);
  2465. /*
  2466. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2467. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2468. * OFDM
  2469. */
  2470. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2471. priv->staging_rxon.cck_basic_rates =
  2472. ((priv->active_rate_basic &
  2473. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2474. else
  2475. priv->staging_rxon.cck_basic_rates =
  2476. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2477. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2478. priv->staging_rxon.ofdm_basic_rates =
  2479. ((priv->active_rate_basic &
  2480. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2481. IWL_FIRST_OFDM_RATE) & 0xFF;
  2482. else
  2483. priv->staging_rxon.ofdm_basic_rates =
  2484. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2485. }
  2486. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2487. {
  2488. unsigned long flags;
  2489. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2490. return;
  2491. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2492. disable_radio ? "OFF" : "ON");
  2493. if (disable_radio) {
  2494. iwl4965_scan_cancel(priv);
  2495. /* FIXME: This is a workaround for AP */
  2496. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2497. spin_lock_irqsave(&priv->lock, flags);
  2498. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2499. CSR_UCODE_SW_BIT_RFKILL);
  2500. spin_unlock_irqrestore(&priv->lock, flags);
  2501. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2502. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2503. }
  2504. return;
  2505. }
  2506. spin_lock_irqsave(&priv->lock, flags);
  2507. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2508. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2509. spin_unlock_irqrestore(&priv->lock, flags);
  2510. /* wake up ucode */
  2511. msleep(10);
  2512. spin_lock_irqsave(&priv->lock, flags);
  2513. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2514. if (!iwl4965_grab_nic_access(priv))
  2515. iwl4965_release_nic_access(priv);
  2516. spin_unlock_irqrestore(&priv->lock, flags);
  2517. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2518. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2519. "disabled by HW switch\n");
  2520. return;
  2521. }
  2522. queue_work(priv->workqueue, &priv->restart);
  2523. return;
  2524. }
  2525. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2526. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2527. {
  2528. u16 fc =
  2529. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2530. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2531. return;
  2532. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2533. return;
  2534. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2535. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2536. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2537. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2538. RX_RES_STATUS_BAD_ICV_MIC)
  2539. stats->flag |= RX_FLAG_MMIC_ERROR;
  2540. case RX_RES_STATUS_SEC_TYPE_WEP:
  2541. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2542. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2543. RX_RES_STATUS_DECRYPT_OK) {
  2544. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2545. stats->flag |= RX_FLAG_DECRYPTED;
  2546. }
  2547. break;
  2548. default:
  2549. break;
  2550. }
  2551. }
  2552. #define IWL_PACKET_RETRY_TIME HZ
  2553. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2554. {
  2555. u16 sc = le16_to_cpu(header->seq_ctrl);
  2556. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2557. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2558. u16 *last_seq, *last_frag;
  2559. unsigned long *last_time;
  2560. switch (priv->iw_mode) {
  2561. case IEEE80211_IF_TYPE_IBSS:{
  2562. struct list_head *p;
  2563. struct iwl4965_ibss_seq *entry = NULL;
  2564. u8 *mac = header->addr2;
  2565. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2566. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2567. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2568. if (!compare_ether_addr(entry->mac, mac))
  2569. break;
  2570. }
  2571. if (p == &priv->ibss_mac_hash[index]) {
  2572. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2573. if (!entry) {
  2574. IWL_ERROR("Cannot malloc new mac entry\n");
  2575. return 0;
  2576. }
  2577. memcpy(entry->mac, mac, ETH_ALEN);
  2578. entry->seq_num = seq;
  2579. entry->frag_num = frag;
  2580. entry->packet_time = jiffies;
  2581. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2582. return 0;
  2583. }
  2584. last_seq = &entry->seq_num;
  2585. last_frag = &entry->frag_num;
  2586. last_time = &entry->packet_time;
  2587. break;
  2588. }
  2589. case IEEE80211_IF_TYPE_STA:
  2590. last_seq = &priv->last_seq_num;
  2591. last_frag = &priv->last_frag_num;
  2592. last_time = &priv->last_packet_time;
  2593. break;
  2594. default:
  2595. return 0;
  2596. }
  2597. if ((*last_seq == seq) &&
  2598. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2599. if (*last_frag == frag)
  2600. goto drop;
  2601. if (*last_frag + 1 != frag)
  2602. /* out-of-order fragment */
  2603. goto drop;
  2604. } else
  2605. *last_seq = seq;
  2606. *last_frag = frag;
  2607. *last_time = jiffies;
  2608. return 0;
  2609. drop:
  2610. return 1;
  2611. }
  2612. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2613. #include "iwl-spectrum.h"
  2614. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2615. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2616. #define TIME_UNIT 1024
  2617. /*
  2618. * extended beacon time format
  2619. * time in usec will be changed into a 32-bit value in 8:24 format
  2620. * the high 1 byte is the beacon counts
  2621. * the lower 3 bytes is the time in usec within one beacon interval
  2622. */
  2623. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2624. {
  2625. u32 quot;
  2626. u32 rem;
  2627. u32 interval = beacon_interval * 1024;
  2628. if (!interval || !usec)
  2629. return 0;
  2630. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2631. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2632. return (quot << 24) + rem;
  2633. }
  2634. /* base is usually what we get from ucode with each received frame,
  2635. * the same as HW timer counter counting down
  2636. */
  2637. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2638. {
  2639. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2640. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2641. u32 interval = beacon_interval * TIME_UNIT;
  2642. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2643. (addon & BEACON_TIME_MASK_HIGH);
  2644. if (base_low > addon_low)
  2645. res += base_low - addon_low;
  2646. else if (base_low < addon_low) {
  2647. res += interval + base_low - addon_low;
  2648. res += (1 << 24);
  2649. } else
  2650. res += (1 << 24);
  2651. return cpu_to_le32(res);
  2652. }
  2653. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2654. struct ieee80211_measurement_params *params,
  2655. u8 type)
  2656. {
  2657. struct iwl4965_spectrum_cmd spectrum;
  2658. struct iwl4965_rx_packet *res;
  2659. struct iwl4965_host_cmd cmd = {
  2660. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2661. .data = (void *)&spectrum,
  2662. .meta.flags = CMD_WANT_SKB,
  2663. };
  2664. u32 add_time = le64_to_cpu(params->start_time);
  2665. int rc;
  2666. int spectrum_resp_status;
  2667. int duration = le16_to_cpu(params->duration);
  2668. if (iwl4965_is_associated(priv))
  2669. add_time =
  2670. iwl4965_usecs_to_beacons(
  2671. le64_to_cpu(params->start_time) - priv->last_tsf,
  2672. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2673. memset(&spectrum, 0, sizeof(spectrum));
  2674. spectrum.channel_count = cpu_to_le16(1);
  2675. spectrum.flags =
  2676. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2677. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2678. cmd.len = sizeof(spectrum);
  2679. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2680. if (iwl4965_is_associated(priv))
  2681. spectrum.start_time =
  2682. iwl4965_add_beacon_time(priv->last_beacon_time,
  2683. add_time,
  2684. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2685. else
  2686. spectrum.start_time = 0;
  2687. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2688. spectrum.channels[0].channel = params->channel;
  2689. spectrum.channels[0].type = type;
  2690. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2691. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2692. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2693. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2694. if (rc)
  2695. return rc;
  2696. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2697. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2698. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2699. rc = -EIO;
  2700. }
  2701. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2702. switch (spectrum_resp_status) {
  2703. case 0: /* Command will be handled */
  2704. if (res->u.spectrum.id != 0xff) {
  2705. IWL_DEBUG_INFO
  2706. ("Replaced existing measurement: %d\n",
  2707. res->u.spectrum.id);
  2708. priv->measurement_status &= ~MEASUREMENT_READY;
  2709. }
  2710. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2711. rc = 0;
  2712. break;
  2713. case 1: /* Command will not be handled */
  2714. rc = -EAGAIN;
  2715. break;
  2716. }
  2717. dev_kfree_skb_any(cmd.meta.u.skb);
  2718. return rc;
  2719. }
  2720. #endif
  2721. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2722. struct iwl4965_tx_info *tx_sta)
  2723. {
  2724. tx_sta->status.ack_signal = 0;
  2725. tx_sta->status.excessive_retries = 0;
  2726. tx_sta->status.queue_length = 0;
  2727. tx_sta->status.queue_number = 0;
  2728. if (in_interrupt())
  2729. ieee80211_tx_status_irqsafe(priv->hw,
  2730. tx_sta->skb[0], &(tx_sta->status));
  2731. else
  2732. ieee80211_tx_status(priv->hw,
  2733. tx_sta->skb[0], &(tx_sta->status));
  2734. tx_sta->skb[0] = NULL;
  2735. }
  2736. /**
  2737. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2738. *
  2739. * When FW advances 'R' index, all entries between old and new 'R' index
  2740. * need to be reclaimed. As result, some free space forms. If there is
  2741. * enough free space (> low mark), wake the stack that feeds us.
  2742. */
  2743. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2744. {
  2745. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2746. struct iwl4965_queue *q = &txq->q;
  2747. int nfreed = 0;
  2748. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2749. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2750. "is out of range [0-%d] %d %d.\n", txq_id,
  2751. index, q->n_bd, q->write_ptr, q->read_ptr);
  2752. return 0;
  2753. }
  2754. for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
  2755. q->read_ptr != index;
  2756. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2757. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2758. iwl4965_txstatus_to_ieee(priv,
  2759. &(txq->txb[txq->q.read_ptr]));
  2760. iwl4965_hw_txq_free_tfd(priv, txq);
  2761. } else if (nfreed > 1) {
  2762. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2763. q->write_ptr, q->read_ptr);
  2764. queue_work(priv->workqueue, &priv->restart);
  2765. }
  2766. nfreed++;
  2767. }
  2768. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2769. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2770. priv->mac80211_registered)
  2771. ieee80211_wake_queue(priv->hw, txq_id); */
  2772. return nfreed;
  2773. }
  2774. static int iwl4965_is_tx_success(u32 status)
  2775. {
  2776. status &= TX_STATUS_MSK;
  2777. return (status == TX_STATUS_SUCCESS)
  2778. || (status == TX_STATUS_DIRECT_DONE);
  2779. }
  2780. /******************************************************************************
  2781. *
  2782. * Generic RX handler implementations
  2783. *
  2784. ******************************************************************************/
  2785. #ifdef CONFIG_IWL4965_HT
  2786. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  2787. struct ieee80211_hdr *hdr)
  2788. {
  2789. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2790. return IWL_AP_ID;
  2791. else {
  2792. u8 *da = ieee80211_get_DA(hdr);
  2793. return iwl4965_hw_find_station(priv, da);
  2794. }
  2795. }
  2796. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2797. struct iwl4965_priv *priv, int txq_id, int idx)
  2798. {
  2799. if (priv->txq[txq_id].txb[idx].skb[0])
  2800. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2801. txb[idx].skb[0]->data;
  2802. return NULL;
  2803. }
  2804. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2805. {
  2806. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2807. tx_resp->frame_count);
  2808. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2809. }
  2810. /**
  2811. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2812. */
  2813. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  2814. struct iwl4965_ht_agg *agg,
  2815. struct iwl4965_tx_resp_agg *tx_resp,
  2816. u16 start_idx)
  2817. {
  2818. u16 status;
  2819. struct agg_tx_status *frame_status = &tx_resp->status;
  2820. struct ieee80211_tx_status *tx_status = NULL;
  2821. struct ieee80211_hdr *hdr = NULL;
  2822. int i, sh;
  2823. int txq_id, idx;
  2824. u16 seq;
  2825. if (agg->wait_for_ba)
  2826. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2827. agg->frame_count = tx_resp->frame_count;
  2828. agg->start_idx = start_idx;
  2829. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2830. agg->bitmap = 0;
  2831. /* # frames attempted by Tx command */
  2832. if (agg->frame_count == 1) {
  2833. /* Only one frame was attempted; no block-ack will arrive */
  2834. status = le16_to_cpu(frame_status[0].status);
  2835. seq = le16_to_cpu(frame_status[0].sequence);
  2836. idx = SEQ_TO_INDEX(seq);
  2837. txq_id = SEQ_TO_QUEUE(seq);
  2838. /* FIXME: code repetition */
  2839. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2840. agg->frame_count, agg->start_idx, idx);
  2841. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2842. tx_status->retry_count = tx_resp->failure_frame;
  2843. tx_status->queue_number = status & 0xff;
  2844. tx_status->queue_length = tx_resp->failure_rts;
  2845. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2846. tx_status->flags = iwl4965_is_tx_success(status)?
  2847. IEEE80211_TX_STATUS_ACK : 0;
  2848. iwl4965_hwrate_to_tx_control(priv,
  2849. le32_to_cpu(tx_resp->rate_n_flags),
  2850. &tx_status->control);
  2851. /* FIXME: code repetition end */
  2852. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2853. status & 0xff, tx_resp->failure_frame);
  2854. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2855. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2856. agg->wait_for_ba = 0;
  2857. } else {
  2858. /* Two or more frames were attempted; expect block-ack */
  2859. u64 bitmap = 0;
  2860. int start = agg->start_idx;
  2861. /* Construct bit-map of pending frames within Tx window */
  2862. for (i = 0; i < agg->frame_count; i++) {
  2863. u16 sc;
  2864. status = le16_to_cpu(frame_status[i].status);
  2865. seq = le16_to_cpu(frame_status[i].sequence);
  2866. idx = SEQ_TO_INDEX(seq);
  2867. txq_id = SEQ_TO_QUEUE(seq);
  2868. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2869. AGG_TX_STATE_ABORT_MSK))
  2870. continue;
  2871. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2872. agg->frame_count, txq_id, idx);
  2873. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2874. sc = le16_to_cpu(hdr->seq_ctrl);
  2875. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2876. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2877. " idx=%d, seq_idx=%d, seq=%d\n",
  2878. idx, SEQ_TO_SN(sc),
  2879. hdr->seq_ctrl);
  2880. return -1;
  2881. }
  2882. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2883. i, idx, SEQ_TO_SN(sc));
  2884. sh = idx - start;
  2885. if (sh > 64) {
  2886. sh = (start - idx) + 0xff;
  2887. bitmap = bitmap << sh;
  2888. sh = 0;
  2889. start = idx;
  2890. } else if (sh < -64)
  2891. sh = 0xff - (start - idx);
  2892. else if (sh < 0) {
  2893. sh = start - idx;
  2894. start = idx;
  2895. bitmap = bitmap << sh;
  2896. sh = 0;
  2897. }
  2898. bitmap |= (1 << sh);
  2899. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2900. start, (u32)(bitmap & 0xFFFFFFFF));
  2901. }
  2902. agg->bitmap = bitmap;
  2903. agg->start_idx = start;
  2904. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2905. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2906. agg->frame_count, agg->start_idx,
  2907. agg->bitmap);
  2908. if (bitmap)
  2909. agg->wait_for_ba = 1;
  2910. }
  2911. return 0;
  2912. }
  2913. #endif
  2914. /**
  2915. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2916. */
  2917. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  2918. struct iwl4965_rx_mem_buffer *rxb)
  2919. {
  2920. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2921. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2922. int txq_id = SEQ_TO_QUEUE(sequence);
  2923. int index = SEQ_TO_INDEX(sequence);
  2924. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2925. struct ieee80211_tx_status *tx_status;
  2926. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2927. u32 status = le32_to_cpu(tx_resp->status);
  2928. #ifdef CONFIG_IWL4965_HT
  2929. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2930. struct ieee80211_hdr *hdr;
  2931. __le16 *qc;
  2932. #endif
  2933. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2934. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2935. "is out of range [0-%d] %d %d\n", txq_id,
  2936. index, txq->q.n_bd, txq->q.write_ptr,
  2937. txq->q.read_ptr);
  2938. return;
  2939. }
  2940. #ifdef CONFIG_IWL4965_HT
  2941. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2942. qc = ieee80211_get_qos_ctrl(hdr);
  2943. if (qc)
  2944. tid = le16_to_cpu(*qc) & 0xf;
  2945. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2946. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2947. IWL_ERROR("Station not known\n");
  2948. return;
  2949. }
  2950. if (txq->sched_retry) {
  2951. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2952. struct iwl4965_ht_agg *agg = NULL;
  2953. if (!qc)
  2954. return;
  2955. agg = &priv->stations[sta_id].tid[tid].agg;
  2956. iwl4965_tx_status_reply_tx(priv, agg,
  2957. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2958. if ((tx_resp->frame_count == 1) &&
  2959. !iwl4965_is_tx_success(status)) {
  2960. /* TODO: send BAR */
  2961. }
  2962. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2963. int freed;
  2964. index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2965. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2966. "%d index %d\n", scd_ssn , index);
  2967. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2968. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2969. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2970. txq_id >= 0 && priv->mac80211_registered &&
  2971. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2972. ieee80211_wake_queue(priv->hw, txq_id);
  2973. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2974. }
  2975. } else {
  2976. #endif /* CONFIG_IWL4965_HT */
  2977. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2978. tx_status->retry_count = tx_resp->failure_frame;
  2979. tx_status->queue_number = status;
  2980. tx_status->queue_length = tx_resp->bt_kill_count;
  2981. tx_status->queue_length |= tx_resp->failure_rts;
  2982. tx_status->flags =
  2983. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2984. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2985. &tx_status->control);
  2986. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2987. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2988. status, le32_to_cpu(tx_resp->rate_n_flags),
  2989. tx_resp->failure_frame);
  2990. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2991. if (index != -1) {
  2992. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2993. #ifdef CONFIG_IWL4965_HT
  2994. if (tid != MAX_TID_COUNT)
  2995. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2996. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2997. (txq_id >= 0) &&
  2998. priv->mac80211_registered)
  2999. ieee80211_wake_queue(priv->hw, txq_id);
  3000. if (tid != MAX_TID_COUNT)
  3001. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  3002. #endif
  3003. }
  3004. #ifdef CONFIG_IWL4965_HT
  3005. }
  3006. #endif /* CONFIG_IWL4965_HT */
  3007. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3008. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3009. }
  3010. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  3011. struct iwl4965_rx_mem_buffer *rxb)
  3012. {
  3013. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3014. struct iwl4965_alive_resp *palive;
  3015. struct delayed_work *pwork;
  3016. palive = &pkt->u.alive_frame;
  3017. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3018. "0x%01X 0x%01X\n",
  3019. palive->is_valid, palive->ver_type,
  3020. palive->ver_subtype);
  3021. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3022. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3023. memcpy(&priv->card_alive_init,
  3024. &pkt->u.alive_frame,
  3025. sizeof(struct iwl4965_init_alive_resp));
  3026. pwork = &priv->init_alive_start;
  3027. } else {
  3028. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3029. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3030. sizeof(struct iwl4965_alive_resp));
  3031. pwork = &priv->alive_start;
  3032. }
  3033. /* We delay the ALIVE response by 5ms to
  3034. * give the HW RF Kill time to activate... */
  3035. if (palive->is_valid == UCODE_VALID_OK)
  3036. queue_delayed_work(priv->workqueue, pwork,
  3037. msecs_to_jiffies(5));
  3038. else
  3039. IWL_WARNING("uCode did not respond OK.\n");
  3040. }
  3041. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  3042. struct iwl4965_rx_mem_buffer *rxb)
  3043. {
  3044. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3045. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3046. return;
  3047. }
  3048. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  3049. struct iwl4965_rx_mem_buffer *rxb)
  3050. {
  3051. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3052. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3053. "seq 0x%04X ser 0x%08X\n",
  3054. le32_to_cpu(pkt->u.err_resp.error_type),
  3055. get_cmd_string(pkt->u.err_resp.cmd_id),
  3056. pkt->u.err_resp.cmd_id,
  3057. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3058. le32_to_cpu(pkt->u.err_resp.error_info));
  3059. }
  3060. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3061. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  3062. {
  3063. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3064. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3065. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  3066. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3067. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3068. rxon->channel = csa->channel;
  3069. priv->staging_rxon.channel = csa->channel;
  3070. }
  3071. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  3072. struct iwl4965_rx_mem_buffer *rxb)
  3073. {
  3074. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  3075. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3076. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3077. if (!report->state) {
  3078. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3079. "Spectrum Measure Notification: Start\n");
  3080. return;
  3081. }
  3082. memcpy(&priv->measure_report, report, sizeof(*report));
  3083. priv->measurement_status |= MEASUREMENT_READY;
  3084. #endif
  3085. }
  3086. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  3087. struct iwl4965_rx_mem_buffer *rxb)
  3088. {
  3089. #ifdef CONFIG_IWL4965_DEBUG
  3090. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3091. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3092. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3093. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3094. #endif
  3095. }
  3096. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3097. struct iwl4965_rx_mem_buffer *rxb)
  3098. {
  3099. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3100. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3101. "notification for %s:\n",
  3102. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3103. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3104. }
  3105. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3106. {
  3107. struct iwl4965_priv *priv =
  3108. container_of(work, struct iwl4965_priv, beacon_update);
  3109. struct sk_buff *beacon;
  3110. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3111. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  3112. if (!beacon) {
  3113. IWL_ERROR("update beacon failed\n");
  3114. return;
  3115. }
  3116. mutex_lock(&priv->mutex);
  3117. /* new beacon skb is allocated every time; dispose previous.*/
  3118. if (priv->ibss_beacon)
  3119. dev_kfree_skb(priv->ibss_beacon);
  3120. priv->ibss_beacon = beacon;
  3121. mutex_unlock(&priv->mutex);
  3122. iwl4965_send_beacon_cmd(priv);
  3123. }
  3124. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3125. struct iwl4965_rx_mem_buffer *rxb)
  3126. {
  3127. #ifdef CONFIG_IWL4965_DEBUG
  3128. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3129. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3130. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3131. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3132. "tsf %d %d rate %d\n",
  3133. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3134. beacon->beacon_notify_hdr.failure_frame,
  3135. le32_to_cpu(beacon->ibss_mgr_status),
  3136. le32_to_cpu(beacon->high_tsf),
  3137. le32_to_cpu(beacon->low_tsf), rate);
  3138. #endif
  3139. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3140. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3141. queue_work(priv->workqueue, &priv->beacon_update);
  3142. }
  3143. /* Service response to REPLY_SCAN_CMD (0x80) */
  3144. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3145. struct iwl4965_rx_mem_buffer *rxb)
  3146. {
  3147. #ifdef CONFIG_IWL4965_DEBUG
  3148. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3149. struct iwl4965_scanreq_notification *notif =
  3150. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3151. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3152. #endif
  3153. }
  3154. /* Service SCAN_START_NOTIFICATION (0x82) */
  3155. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3156. struct iwl4965_rx_mem_buffer *rxb)
  3157. {
  3158. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3159. struct iwl4965_scanstart_notification *notif =
  3160. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3161. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3162. IWL_DEBUG_SCAN("Scan start: "
  3163. "%d [802.11%s] "
  3164. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3165. notif->channel,
  3166. notif->band ? "bg" : "a",
  3167. notif->tsf_high,
  3168. notif->tsf_low, notif->status, notif->beacon_timer);
  3169. }
  3170. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3171. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3172. struct iwl4965_rx_mem_buffer *rxb)
  3173. {
  3174. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3175. struct iwl4965_scanresults_notification *notif =
  3176. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3177. IWL_DEBUG_SCAN("Scan ch.res: "
  3178. "%d [802.11%s] "
  3179. "(TSF: 0x%08X:%08X) - %d "
  3180. "elapsed=%lu usec (%dms since last)\n",
  3181. notif->channel,
  3182. notif->band ? "bg" : "a",
  3183. le32_to_cpu(notif->tsf_high),
  3184. le32_to_cpu(notif->tsf_low),
  3185. le32_to_cpu(notif->statistics[0]),
  3186. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3187. jiffies_to_msecs(elapsed_jiffies
  3188. (priv->last_scan_jiffies, jiffies)));
  3189. priv->last_scan_jiffies = jiffies;
  3190. priv->next_scan_jiffies = 0;
  3191. }
  3192. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3193. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3194. struct iwl4965_rx_mem_buffer *rxb)
  3195. {
  3196. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3197. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3198. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3199. scan_notif->scanned_channels,
  3200. scan_notif->tsf_low,
  3201. scan_notif->tsf_high, scan_notif->status);
  3202. /* The HW is no longer scanning */
  3203. clear_bit(STATUS_SCAN_HW, &priv->status);
  3204. /* The scan completion notification came in, so kill that timer... */
  3205. cancel_delayed_work(&priv->scan_check);
  3206. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3207. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3208. jiffies_to_msecs(elapsed_jiffies
  3209. (priv->scan_pass_start, jiffies)));
  3210. /* Remove this scanned band from the list
  3211. * of pending bands to scan */
  3212. priv->scan_bands--;
  3213. /* If a request to abort was given, or the scan did not succeed
  3214. * then we reset the scan state machine and terminate,
  3215. * re-queuing another scan if one has been requested */
  3216. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3217. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3218. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3219. } else {
  3220. /* If there are more bands on this scan pass reschedule */
  3221. if (priv->scan_bands > 0)
  3222. goto reschedule;
  3223. }
  3224. priv->last_scan_jiffies = jiffies;
  3225. priv->next_scan_jiffies = 0;
  3226. IWL_DEBUG_INFO("Setting scan to off\n");
  3227. clear_bit(STATUS_SCANNING, &priv->status);
  3228. IWL_DEBUG_INFO("Scan took %dms\n",
  3229. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3230. queue_work(priv->workqueue, &priv->scan_completed);
  3231. return;
  3232. reschedule:
  3233. priv->scan_pass_start = jiffies;
  3234. queue_work(priv->workqueue, &priv->request_scan);
  3235. }
  3236. /* Handle notification from uCode that card's power state is changing
  3237. * due to software, hardware, or critical temperature RFKILL */
  3238. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3239. struct iwl4965_rx_mem_buffer *rxb)
  3240. {
  3241. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3242. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3243. unsigned long status = priv->status;
  3244. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3245. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3246. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3247. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3248. RF_CARD_DISABLED)) {
  3249. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3250. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3251. if (!iwl4965_grab_nic_access(priv)) {
  3252. iwl4965_write_direct32(
  3253. priv, HBUS_TARG_MBX_C,
  3254. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3255. iwl4965_release_nic_access(priv);
  3256. }
  3257. if (!(flags & RXON_CARD_DISABLED)) {
  3258. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3259. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3260. if (!iwl4965_grab_nic_access(priv)) {
  3261. iwl4965_write_direct32(
  3262. priv, HBUS_TARG_MBX_C,
  3263. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3264. iwl4965_release_nic_access(priv);
  3265. }
  3266. }
  3267. if (flags & RF_CARD_DISABLED) {
  3268. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3269. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3270. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3271. if (!iwl4965_grab_nic_access(priv))
  3272. iwl4965_release_nic_access(priv);
  3273. }
  3274. }
  3275. if (flags & HW_CARD_DISABLED)
  3276. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3277. else
  3278. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3279. if (flags & SW_CARD_DISABLED)
  3280. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3281. else
  3282. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3283. if (!(flags & RXON_CARD_DISABLED))
  3284. iwl4965_scan_cancel(priv);
  3285. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3286. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3287. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3288. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3289. queue_work(priv->workqueue, &priv->rf_kill);
  3290. else
  3291. wake_up_interruptible(&priv->wait_command_queue);
  3292. }
  3293. /**
  3294. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3295. *
  3296. * Setup the RX handlers for each of the reply types sent from the uCode
  3297. * to the host.
  3298. *
  3299. * This function chains into the hardware specific files for them to setup
  3300. * any hardware specific handlers as well.
  3301. */
  3302. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3303. {
  3304. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3305. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3306. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3307. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3308. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3309. iwl4965_rx_spectrum_measure_notif;
  3310. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3311. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3312. iwl4965_rx_pm_debug_statistics_notif;
  3313. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3314. /*
  3315. * The same handler is used for both the REPLY to a discrete
  3316. * statistics request from the host as well as for the periodic
  3317. * statistics notifications (after received beacons) from the uCode.
  3318. */
  3319. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3320. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3321. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3322. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3323. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3324. iwl4965_rx_scan_results_notif;
  3325. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3326. iwl4965_rx_scan_complete_notif;
  3327. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3328. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3329. /* Set up hardware specific Rx handlers */
  3330. iwl4965_hw_rx_handler_setup(priv);
  3331. }
  3332. /**
  3333. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3334. * @rxb: Rx buffer to reclaim
  3335. *
  3336. * If an Rx buffer has an async callback associated with it the callback
  3337. * will be executed. The attached skb (if present) will only be freed
  3338. * if the callback returns 1
  3339. */
  3340. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3341. struct iwl4965_rx_mem_buffer *rxb)
  3342. {
  3343. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3344. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3345. int txq_id = SEQ_TO_QUEUE(sequence);
  3346. int index = SEQ_TO_INDEX(sequence);
  3347. int huge = sequence & SEQ_HUGE_FRAME;
  3348. int cmd_index;
  3349. struct iwl4965_cmd *cmd;
  3350. /* If a Tx command is being handled and it isn't in the actual
  3351. * command queue then there a command routing bug has been introduced
  3352. * in the queue management code. */
  3353. if (txq_id != IWL_CMD_QUEUE_NUM)
  3354. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3355. txq_id, pkt->hdr.cmd);
  3356. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3357. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3358. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3359. /* Input error checking is done when commands are added to queue. */
  3360. if (cmd->meta.flags & CMD_WANT_SKB) {
  3361. cmd->meta.source->u.skb = rxb->skb;
  3362. rxb->skb = NULL;
  3363. } else if (cmd->meta.u.callback &&
  3364. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3365. rxb->skb = NULL;
  3366. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3367. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3368. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3369. wake_up_interruptible(&priv->wait_command_queue);
  3370. }
  3371. }
  3372. /************************** RX-FUNCTIONS ****************************/
  3373. /*
  3374. * Rx theory of operation
  3375. *
  3376. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3377. * each of which point to Receive Buffers to be filled by 4965. These get
  3378. * used not only for Rx frames, but for any command response or notification
  3379. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3380. * of indexes into the circular buffer.
  3381. *
  3382. * Rx Queue Indexes
  3383. * The host/firmware share two index registers for managing the Rx buffers.
  3384. *
  3385. * The READ index maps to the first position that the firmware may be writing
  3386. * to -- the driver can read up to (but not including) this position and get
  3387. * good data.
  3388. * The READ index is managed by the firmware once the card is enabled.
  3389. *
  3390. * The WRITE index maps to the last position the driver has read from -- the
  3391. * position preceding WRITE is the last slot the firmware can place a packet.
  3392. *
  3393. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3394. * WRITE = READ.
  3395. *
  3396. * During initialization, the host sets up the READ queue position to the first
  3397. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3398. *
  3399. * When the firmware places a packet in a buffer, it will advance the READ index
  3400. * and fire the RX interrupt. The driver can then query the READ index and
  3401. * process as many packets as possible, moving the WRITE index forward as it
  3402. * resets the Rx queue buffers with new memory.
  3403. *
  3404. * The management in the driver is as follows:
  3405. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3406. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3407. * to replenish the iwl->rxq->rx_free.
  3408. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3409. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3410. * 'processed' and 'read' driver indexes as well)
  3411. * + A received packet is processed and handed to the kernel network stack,
  3412. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3413. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3414. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3415. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3416. * were enough free buffers and RX_STALLED is set it is cleared.
  3417. *
  3418. *
  3419. * Driver sequence:
  3420. *
  3421. * iwl4965_rx_queue_alloc() Allocates rx_free
  3422. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3423. * iwl4965_rx_queue_restock
  3424. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3425. * queue, updates firmware pointers, and updates
  3426. * the WRITE index. If insufficient rx_free buffers
  3427. * are available, schedules iwl4965_rx_replenish
  3428. *
  3429. * -- enable interrupts --
  3430. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3431. * READ INDEX, detaching the SKB from the pool.
  3432. * Moves the packet buffer from queue to rx_used.
  3433. * Calls iwl4965_rx_queue_restock to refill any empty
  3434. * slots.
  3435. * ...
  3436. *
  3437. */
  3438. /**
  3439. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3440. */
  3441. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3442. {
  3443. int s = q->read - q->write;
  3444. if (s <= 0)
  3445. s += RX_QUEUE_SIZE;
  3446. /* keep some buffer to not confuse full and empty queue */
  3447. s -= 2;
  3448. if (s < 0)
  3449. s = 0;
  3450. return s;
  3451. }
  3452. /**
  3453. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3454. */
  3455. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3456. {
  3457. u32 reg = 0;
  3458. int rc = 0;
  3459. unsigned long flags;
  3460. spin_lock_irqsave(&q->lock, flags);
  3461. if (q->need_update == 0)
  3462. goto exit_unlock;
  3463. /* If power-saving is in use, make sure device is awake */
  3464. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3465. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3466. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3467. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3468. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3469. goto exit_unlock;
  3470. }
  3471. rc = iwl4965_grab_nic_access(priv);
  3472. if (rc)
  3473. goto exit_unlock;
  3474. /* Device expects a multiple of 8 */
  3475. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3476. q->write & ~0x7);
  3477. iwl4965_release_nic_access(priv);
  3478. /* Else device is assumed to be awake */
  3479. } else
  3480. /* Device expects a multiple of 8 */
  3481. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3482. q->need_update = 0;
  3483. exit_unlock:
  3484. spin_unlock_irqrestore(&q->lock, flags);
  3485. return rc;
  3486. }
  3487. /**
  3488. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3489. */
  3490. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3491. dma_addr_t dma_addr)
  3492. {
  3493. return cpu_to_le32((u32)(dma_addr >> 8));
  3494. }
  3495. /**
  3496. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3497. *
  3498. * If there are slots in the RX queue that need to be restocked,
  3499. * and we have free pre-allocated buffers, fill the ranks as much
  3500. * as we can, pulling from rx_free.
  3501. *
  3502. * This moves the 'write' index forward to catch up with 'processed', and
  3503. * also updates the memory address in the firmware to reference the new
  3504. * target buffer.
  3505. */
  3506. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3507. {
  3508. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3509. struct list_head *element;
  3510. struct iwl4965_rx_mem_buffer *rxb;
  3511. unsigned long flags;
  3512. int write, rc;
  3513. spin_lock_irqsave(&rxq->lock, flags);
  3514. write = rxq->write & ~0x7;
  3515. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3516. /* Get next free Rx buffer, remove from free list */
  3517. element = rxq->rx_free.next;
  3518. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3519. list_del(element);
  3520. /* Point to Rx buffer via next RBD in circular buffer */
  3521. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3522. rxq->queue[rxq->write] = rxb;
  3523. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3524. rxq->free_count--;
  3525. }
  3526. spin_unlock_irqrestore(&rxq->lock, flags);
  3527. /* If the pre-allocated buffer pool is dropping low, schedule to
  3528. * refill it */
  3529. if (rxq->free_count <= RX_LOW_WATERMARK)
  3530. queue_work(priv->workqueue, &priv->rx_replenish);
  3531. /* If we've added more space for the firmware to place data, tell it.
  3532. * Increment device's write pointer in multiples of 8. */
  3533. if ((write != (rxq->write & ~0x7))
  3534. || (abs(rxq->write - rxq->read) > 7)) {
  3535. spin_lock_irqsave(&rxq->lock, flags);
  3536. rxq->need_update = 1;
  3537. spin_unlock_irqrestore(&rxq->lock, flags);
  3538. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3539. if (rc)
  3540. return rc;
  3541. }
  3542. return 0;
  3543. }
  3544. /**
  3545. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3546. *
  3547. * When moving to rx_free an SKB is allocated for the slot.
  3548. *
  3549. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3550. * This is called as a scheduled work item (except for during initialization)
  3551. */
  3552. static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
  3553. {
  3554. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3555. struct list_head *element;
  3556. struct iwl4965_rx_mem_buffer *rxb;
  3557. unsigned long flags;
  3558. spin_lock_irqsave(&rxq->lock, flags);
  3559. while (!list_empty(&rxq->rx_used)) {
  3560. element = rxq->rx_used.next;
  3561. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3562. /* Alloc a new receive buffer */
  3563. rxb->skb =
  3564. alloc_skb(priv->hw_setting.rx_buf_size,
  3565. __GFP_NOWARN | GFP_ATOMIC);
  3566. if (!rxb->skb) {
  3567. if (net_ratelimit())
  3568. printk(KERN_CRIT DRV_NAME
  3569. ": Can not allocate SKB buffers\n");
  3570. /* We don't reschedule replenish work here -- we will
  3571. * call the restock method and if it still needs
  3572. * more buffers it will schedule replenish */
  3573. break;
  3574. }
  3575. priv->alloc_rxb_skb++;
  3576. list_del(element);
  3577. /* Get physical address of RB/SKB */
  3578. rxb->dma_addr =
  3579. pci_map_single(priv->pci_dev, rxb->skb->data,
  3580. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3581. list_add_tail(&rxb->list, &rxq->rx_free);
  3582. rxq->free_count++;
  3583. }
  3584. spin_unlock_irqrestore(&rxq->lock, flags);
  3585. }
  3586. /*
  3587. * this should be called while priv->lock is locked
  3588. */
  3589. static void __iwl4965_rx_replenish(void *data)
  3590. {
  3591. struct iwl4965_priv *priv = data;
  3592. iwl4965_rx_allocate(priv);
  3593. iwl4965_rx_queue_restock(priv);
  3594. }
  3595. void iwl4965_rx_replenish(void *data)
  3596. {
  3597. struct iwl4965_priv *priv = data;
  3598. unsigned long flags;
  3599. iwl4965_rx_allocate(priv);
  3600. spin_lock_irqsave(&priv->lock, flags);
  3601. iwl4965_rx_queue_restock(priv);
  3602. spin_unlock_irqrestore(&priv->lock, flags);
  3603. }
  3604. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3605. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3606. * This free routine walks the list of POOL entries and if SKB is set to
  3607. * non NULL it is unmapped and freed
  3608. */
  3609. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3610. {
  3611. int i;
  3612. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3613. if (rxq->pool[i].skb != NULL) {
  3614. pci_unmap_single(priv->pci_dev,
  3615. rxq->pool[i].dma_addr,
  3616. priv->hw_setting.rx_buf_size,
  3617. PCI_DMA_FROMDEVICE);
  3618. dev_kfree_skb(rxq->pool[i].skb);
  3619. }
  3620. }
  3621. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3622. rxq->dma_addr);
  3623. rxq->bd = NULL;
  3624. }
  3625. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3626. {
  3627. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3628. struct pci_dev *dev = priv->pci_dev;
  3629. int i;
  3630. spin_lock_init(&rxq->lock);
  3631. INIT_LIST_HEAD(&rxq->rx_free);
  3632. INIT_LIST_HEAD(&rxq->rx_used);
  3633. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3634. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3635. if (!rxq->bd)
  3636. return -ENOMEM;
  3637. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3638. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3639. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3640. /* Set us so that we have processed and used all buffers, but have
  3641. * not restocked the Rx queue with fresh buffers */
  3642. rxq->read = rxq->write = 0;
  3643. rxq->free_count = 0;
  3644. rxq->need_update = 0;
  3645. return 0;
  3646. }
  3647. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3648. {
  3649. unsigned long flags;
  3650. int i;
  3651. spin_lock_irqsave(&rxq->lock, flags);
  3652. INIT_LIST_HEAD(&rxq->rx_free);
  3653. INIT_LIST_HEAD(&rxq->rx_used);
  3654. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3655. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3656. /* In the reset function, these buffers may have been allocated
  3657. * to an SKB, so we need to unmap and free potential storage */
  3658. if (rxq->pool[i].skb != NULL) {
  3659. pci_unmap_single(priv->pci_dev,
  3660. rxq->pool[i].dma_addr,
  3661. priv->hw_setting.rx_buf_size,
  3662. PCI_DMA_FROMDEVICE);
  3663. priv->alloc_rxb_skb--;
  3664. dev_kfree_skb(rxq->pool[i].skb);
  3665. rxq->pool[i].skb = NULL;
  3666. }
  3667. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3668. }
  3669. /* Set us so that we have processed and used all buffers, but have
  3670. * not restocked the Rx queue with fresh buffers */
  3671. rxq->read = rxq->write = 0;
  3672. rxq->free_count = 0;
  3673. spin_unlock_irqrestore(&rxq->lock, flags);
  3674. }
  3675. /* Convert linear signal-to-noise ratio into dB */
  3676. static u8 ratio2dB[100] = {
  3677. /* 0 1 2 3 4 5 6 7 8 9 */
  3678. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3679. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3680. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3681. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3682. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3683. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3684. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3685. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3686. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3687. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3688. };
  3689. /* Calculates a relative dB value from a ratio of linear
  3690. * (i.e. not dB) signal levels.
  3691. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3692. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3693. {
  3694. /* 1000:1 or higher just report as 60 dB */
  3695. if (sig_ratio >= 1000)
  3696. return 60;
  3697. /* 100:1 or higher, divide by 10 and use table,
  3698. * add 20 dB to make up for divide by 10 */
  3699. if (sig_ratio >= 100)
  3700. return (20 + (int)ratio2dB[sig_ratio/10]);
  3701. /* We shouldn't see this */
  3702. if (sig_ratio < 1)
  3703. return 0;
  3704. /* Use table for ratios 1:1 - 99:1 */
  3705. return (int)ratio2dB[sig_ratio];
  3706. }
  3707. #define PERFECT_RSSI (-20) /* dBm */
  3708. #define WORST_RSSI (-95) /* dBm */
  3709. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3710. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3711. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3712. * about formulas used below. */
  3713. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3714. {
  3715. int sig_qual;
  3716. int degradation = PERFECT_RSSI - rssi_dbm;
  3717. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3718. * as indicator; formula is (signal dbm - noise dbm).
  3719. * SNR at or above 40 is a great signal (100%).
  3720. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3721. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3722. if (noise_dbm) {
  3723. if (rssi_dbm - noise_dbm >= 40)
  3724. return 100;
  3725. else if (rssi_dbm < noise_dbm)
  3726. return 0;
  3727. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3728. /* Else use just the signal level.
  3729. * This formula is a least squares fit of data points collected and
  3730. * compared with a reference system that had a percentage (%) display
  3731. * for signal quality. */
  3732. } else
  3733. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3734. (15 * RSSI_RANGE + 62 * degradation)) /
  3735. (RSSI_RANGE * RSSI_RANGE);
  3736. if (sig_qual > 100)
  3737. sig_qual = 100;
  3738. else if (sig_qual < 1)
  3739. sig_qual = 0;
  3740. return sig_qual;
  3741. }
  3742. /**
  3743. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3744. *
  3745. * Uses the priv->rx_handlers callback function array to invoke
  3746. * the appropriate handlers, including command responses,
  3747. * frame-received notifications, and other notifications.
  3748. */
  3749. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3750. {
  3751. struct iwl4965_rx_mem_buffer *rxb;
  3752. struct iwl4965_rx_packet *pkt;
  3753. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3754. u32 r, i;
  3755. int reclaim;
  3756. unsigned long flags;
  3757. u8 fill_rx = 0;
  3758. u32 count = 8;
  3759. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3760. * buffer that the driver may process (last buffer filled by ucode). */
  3761. r = iwl4965_hw_get_rx_read(priv);
  3762. i = rxq->read;
  3763. /* Rx interrupt, but nothing sent from uCode */
  3764. if (i == r)
  3765. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3766. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3767. fill_rx = 1;
  3768. while (i != r) {
  3769. rxb = rxq->queue[i];
  3770. /* If an RXB doesn't have a Rx queue slot associated with it,
  3771. * then a bug has been introduced in the queue refilling
  3772. * routines -- catch it here */
  3773. BUG_ON(rxb == NULL);
  3774. rxq->queue[i] = NULL;
  3775. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3776. priv->hw_setting.rx_buf_size,
  3777. PCI_DMA_FROMDEVICE);
  3778. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3779. /* Reclaim a command buffer only if this packet is a response
  3780. * to a (driver-originated) command.
  3781. * If the packet (e.g. Rx frame) originated from uCode,
  3782. * there is no command buffer to reclaim.
  3783. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3784. * but apparently a few don't get set; catch them here. */
  3785. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3786. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3787. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3788. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3789. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3790. (pkt->hdr.cmd != REPLY_TX);
  3791. /* Based on type of command response or notification,
  3792. * handle those that need handling via function in
  3793. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3794. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3795. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3796. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3797. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3798. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3799. } else {
  3800. /* No handling needed */
  3801. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3802. "r %d i %d No handler needed for %s, 0x%02x\n",
  3803. r, i, get_cmd_string(pkt->hdr.cmd),
  3804. pkt->hdr.cmd);
  3805. }
  3806. if (reclaim) {
  3807. /* Invoke any callbacks, transfer the skb to caller, and
  3808. * fire off the (possibly) blocking iwl4965_send_cmd()
  3809. * as we reclaim the driver command queue */
  3810. if (rxb && rxb->skb)
  3811. iwl4965_tx_cmd_complete(priv, rxb);
  3812. else
  3813. IWL_WARNING("Claim null rxb?\n");
  3814. }
  3815. /* For now we just don't re-use anything. We can tweak this
  3816. * later to try and re-use notification packets and SKBs that
  3817. * fail to Rx correctly */
  3818. if (rxb->skb != NULL) {
  3819. priv->alloc_rxb_skb--;
  3820. dev_kfree_skb_any(rxb->skb);
  3821. rxb->skb = NULL;
  3822. }
  3823. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3824. priv->hw_setting.rx_buf_size,
  3825. PCI_DMA_FROMDEVICE);
  3826. spin_lock_irqsave(&rxq->lock, flags);
  3827. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3828. spin_unlock_irqrestore(&rxq->lock, flags);
  3829. i = (i + 1) & RX_QUEUE_MASK;
  3830. /* If there are a lot of unused frames,
  3831. * restock the Rx queue so ucode wont assert. */
  3832. if (fill_rx) {
  3833. count++;
  3834. if (count >= 8) {
  3835. priv->rxq.read = i;
  3836. __iwl4965_rx_replenish(priv);
  3837. count = 0;
  3838. }
  3839. }
  3840. }
  3841. /* Backtrack one entry */
  3842. priv->rxq.read = i;
  3843. iwl4965_rx_queue_restock(priv);
  3844. }
  3845. /**
  3846. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3847. */
  3848. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  3849. struct iwl4965_tx_queue *txq)
  3850. {
  3851. u32 reg = 0;
  3852. int rc = 0;
  3853. int txq_id = txq->q.id;
  3854. if (txq->need_update == 0)
  3855. return rc;
  3856. /* if we're trying to save power */
  3857. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3858. /* wake up nic if it's powered down ...
  3859. * uCode will wake up, and interrupt us again, so next
  3860. * time we'll skip this part. */
  3861. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3862. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3863. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3864. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3865. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3866. return rc;
  3867. }
  3868. /* restore this queue's parameters in nic hardware. */
  3869. rc = iwl4965_grab_nic_access(priv);
  3870. if (rc)
  3871. return rc;
  3872. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  3873. txq->q.write_ptr | (txq_id << 8));
  3874. iwl4965_release_nic_access(priv);
  3875. /* else not in power-save mode, uCode will never sleep when we're
  3876. * trying to tx (during RFKILL, we're not trying to tx). */
  3877. } else
  3878. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  3879. txq->q.write_ptr | (txq_id << 8));
  3880. txq->need_update = 0;
  3881. return rc;
  3882. }
  3883. #ifdef CONFIG_IWL4965_DEBUG
  3884. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3885. {
  3886. DECLARE_MAC_BUF(mac);
  3887. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3888. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3889. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3890. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3891. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3892. le32_to_cpu(rxon->filter_flags));
  3893. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3894. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3895. rxon->ofdm_basic_rates);
  3896. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3897. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3898. print_mac(mac, rxon->node_addr));
  3899. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3900. print_mac(mac, rxon->bssid_addr));
  3901. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3902. }
  3903. #endif
  3904. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  3905. {
  3906. IWL_DEBUG_ISR("Enabling interrupts\n");
  3907. set_bit(STATUS_INT_ENABLED, &priv->status);
  3908. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3909. }
  3910. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  3911. {
  3912. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3913. /* disable interrupts from uCode/NIC to host */
  3914. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  3915. /* acknowledge/clear/reset any interrupts still pending
  3916. * from uCode or flow handler (Rx/Tx DMA) */
  3917. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  3918. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3919. IWL_DEBUG_ISR("Disabled interrupts\n");
  3920. }
  3921. static const char *desc_lookup(int i)
  3922. {
  3923. switch (i) {
  3924. case 1:
  3925. return "FAIL";
  3926. case 2:
  3927. return "BAD_PARAM";
  3928. case 3:
  3929. return "BAD_CHECKSUM";
  3930. case 4:
  3931. return "NMI_INTERRUPT";
  3932. case 5:
  3933. return "SYSASSERT";
  3934. case 6:
  3935. return "FATAL_ERROR";
  3936. }
  3937. return "UNKNOWN";
  3938. }
  3939. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3940. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3941. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  3942. {
  3943. u32 data2, line;
  3944. u32 desc, time, count, base, data1;
  3945. u32 blink1, blink2, ilink1, ilink2;
  3946. int rc;
  3947. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3948. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  3949. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3950. return;
  3951. }
  3952. rc = iwl4965_grab_nic_access(priv);
  3953. if (rc) {
  3954. IWL_WARNING("Can not read from adapter at this time.\n");
  3955. return;
  3956. }
  3957. count = iwl4965_read_targ_mem(priv, base);
  3958. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3959. IWL_ERROR("Start IWL Error Log Dump:\n");
  3960. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3961. }
  3962. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  3963. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  3964. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  3965. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  3966. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  3967. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  3968. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  3969. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  3970. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  3971. IWL_ERROR("Desc Time "
  3972. "data1 data2 line\n");
  3973. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3974. desc_lookup(desc), desc, time, data1, data2, line);
  3975. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3976. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3977. ilink1, ilink2);
  3978. iwl4965_release_nic_access(priv);
  3979. }
  3980. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3981. /**
  3982. * iwl4965_print_event_log - Dump error event log to syslog
  3983. *
  3984. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  3985. */
  3986. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  3987. u32 num_events, u32 mode)
  3988. {
  3989. u32 i;
  3990. u32 base; /* SRAM byte address of event log header */
  3991. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3992. u32 ptr; /* SRAM byte address of log data */
  3993. u32 ev, time, data; /* event log data */
  3994. if (num_events == 0)
  3995. return;
  3996. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3997. if (mode == 0)
  3998. event_size = 2 * sizeof(u32);
  3999. else
  4000. event_size = 3 * sizeof(u32);
  4001. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4002. /* "time" is actually "data" for mode 0 (no timestamp).
  4003. * place event id # at far right for easier visual parsing. */
  4004. for (i = 0; i < num_events; i++) {
  4005. ev = iwl4965_read_targ_mem(priv, ptr);
  4006. ptr += sizeof(u32);
  4007. time = iwl4965_read_targ_mem(priv, ptr);
  4008. ptr += sizeof(u32);
  4009. if (mode == 0)
  4010. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4011. else {
  4012. data = iwl4965_read_targ_mem(priv, ptr);
  4013. ptr += sizeof(u32);
  4014. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4015. }
  4016. }
  4017. }
  4018. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  4019. {
  4020. int rc;
  4021. u32 base; /* SRAM byte address of event log header */
  4022. u32 capacity; /* event log capacity in # entries */
  4023. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4024. u32 num_wraps; /* # times uCode wrapped to top of log */
  4025. u32 next_entry; /* index of next entry to be written by uCode */
  4026. u32 size; /* # entries that we'll print */
  4027. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4028. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4029. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4030. return;
  4031. }
  4032. rc = iwl4965_grab_nic_access(priv);
  4033. if (rc) {
  4034. IWL_WARNING("Can not read from adapter at this time.\n");
  4035. return;
  4036. }
  4037. /* event log header */
  4038. capacity = iwl4965_read_targ_mem(priv, base);
  4039. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  4040. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  4041. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  4042. size = num_wraps ? capacity : next_entry;
  4043. /* bail out if nothing in log */
  4044. if (size == 0) {
  4045. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4046. iwl4965_release_nic_access(priv);
  4047. return;
  4048. }
  4049. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4050. size, num_wraps);
  4051. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4052. * i.e the next one that uCode would fill. */
  4053. if (num_wraps)
  4054. iwl4965_print_event_log(priv, next_entry,
  4055. capacity - next_entry, mode);
  4056. /* (then/else) start at top of log */
  4057. iwl4965_print_event_log(priv, 0, next_entry, mode);
  4058. iwl4965_release_nic_access(priv);
  4059. }
  4060. /**
  4061. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  4062. */
  4063. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  4064. {
  4065. /* Set the FW error flag -- cleared on iwl4965_down */
  4066. set_bit(STATUS_FW_ERROR, &priv->status);
  4067. /* Cancel currently queued command. */
  4068. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4069. #ifdef CONFIG_IWL4965_DEBUG
  4070. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  4071. iwl4965_dump_nic_error_log(priv);
  4072. iwl4965_dump_nic_event_log(priv);
  4073. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  4074. }
  4075. #endif
  4076. wake_up_interruptible(&priv->wait_command_queue);
  4077. /* Keep the restart process from trying to send host
  4078. * commands by clearing the INIT status bit */
  4079. clear_bit(STATUS_READY, &priv->status);
  4080. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4081. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4082. "Restarting adapter due to uCode error.\n");
  4083. if (iwl4965_is_associated(priv)) {
  4084. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4085. sizeof(priv->recovery_rxon));
  4086. priv->error_recovering = 1;
  4087. }
  4088. queue_work(priv->workqueue, &priv->restart);
  4089. }
  4090. }
  4091. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4092. {
  4093. unsigned long flags;
  4094. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4095. sizeof(priv->staging_rxon));
  4096. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4097. iwl4965_commit_rxon(priv);
  4098. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4099. spin_lock_irqsave(&priv->lock, flags);
  4100. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4101. priv->error_recovering = 0;
  4102. spin_unlock_irqrestore(&priv->lock, flags);
  4103. }
  4104. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4105. {
  4106. u32 inta, handled = 0;
  4107. u32 inta_fh;
  4108. unsigned long flags;
  4109. #ifdef CONFIG_IWL4965_DEBUG
  4110. u32 inta_mask;
  4111. #endif
  4112. spin_lock_irqsave(&priv->lock, flags);
  4113. /* Ack/clear/reset pending uCode interrupts.
  4114. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4115. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4116. inta = iwl4965_read32(priv, CSR_INT);
  4117. iwl4965_write32(priv, CSR_INT, inta);
  4118. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4119. * Any new interrupts that happen after this, either while we're
  4120. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4121. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4122. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4123. #ifdef CONFIG_IWL4965_DEBUG
  4124. if (iwl4965_debug_level & IWL_DL_ISR) {
  4125. /* just for debug */
  4126. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4127. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4128. inta, inta_mask, inta_fh);
  4129. }
  4130. #endif
  4131. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4132. * atomic, make sure that inta covers all the interrupts that
  4133. * we've discovered, even if FH interrupt came in just after
  4134. * reading CSR_INT. */
  4135. if (inta_fh & CSR49_FH_INT_RX_MASK)
  4136. inta |= CSR_INT_BIT_FH_RX;
  4137. if (inta_fh & CSR49_FH_INT_TX_MASK)
  4138. inta |= CSR_INT_BIT_FH_TX;
  4139. /* Now service all interrupt bits discovered above. */
  4140. if (inta & CSR_INT_BIT_HW_ERR) {
  4141. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4142. /* Tell the device to stop sending interrupts */
  4143. iwl4965_disable_interrupts(priv);
  4144. iwl4965_irq_handle_error(priv);
  4145. handled |= CSR_INT_BIT_HW_ERR;
  4146. spin_unlock_irqrestore(&priv->lock, flags);
  4147. return;
  4148. }
  4149. #ifdef CONFIG_IWL4965_DEBUG
  4150. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4151. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4152. if (inta & CSR_INT_BIT_SCD)
  4153. IWL_DEBUG_ISR("Scheduler finished to transmit "
  4154. "the frame/frames.\n");
  4155. /* Alive notification via Rx interrupt will do the real work */
  4156. if (inta & CSR_INT_BIT_ALIVE)
  4157. IWL_DEBUG_ISR("Alive interrupt\n");
  4158. }
  4159. #endif
  4160. /* Safely ignore these bits for debug checks below */
  4161. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  4162. /* HW RF KILL switch toggled */
  4163. if (inta & CSR_INT_BIT_RF_KILL) {
  4164. int hw_rf_kill = 0;
  4165. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4166. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4167. hw_rf_kill = 1;
  4168. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4169. "RF_KILL bit toggled to %s.\n",
  4170. hw_rf_kill ? "disable radio":"enable radio");
  4171. /* Queue restart only if RF_KILL switch was set to "kill"
  4172. * when we loaded driver, and is now set to "enable".
  4173. * After we're Alive, RF_KILL gets handled by
  4174. * iwl4965_rx_card_state_notif() */
  4175. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4176. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4177. queue_work(priv->workqueue, &priv->restart);
  4178. }
  4179. handled |= CSR_INT_BIT_RF_KILL;
  4180. }
  4181. /* Chip got too hot and stopped itself */
  4182. if (inta & CSR_INT_BIT_CT_KILL) {
  4183. IWL_ERROR("Microcode CT kill error detected.\n");
  4184. handled |= CSR_INT_BIT_CT_KILL;
  4185. }
  4186. /* Error detected by uCode */
  4187. if (inta & CSR_INT_BIT_SW_ERR) {
  4188. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4189. inta);
  4190. iwl4965_irq_handle_error(priv);
  4191. handled |= CSR_INT_BIT_SW_ERR;
  4192. }
  4193. /* uCode wakes up after power-down sleep */
  4194. if (inta & CSR_INT_BIT_WAKEUP) {
  4195. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4196. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4197. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4198. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4199. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4200. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4201. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4202. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4203. handled |= CSR_INT_BIT_WAKEUP;
  4204. }
  4205. /* All uCode command responses, including Tx command responses,
  4206. * Rx "responses" (frame-received notification), and other
  4207. * notifications from uCode come through here*/
  4208. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4209. iwl4965_rx_handle(priv);
  4210. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4211. }
  4212. if (inta & CSR_INT_BIT_FH_TX) {
  4213. IWL_DEBUG_ISR("Tx interrupt\n");
  4214. handled |= CSR_INT_BIT_FH_TX;
  4215. }
  4216. if (inta & ~handled)
  4217. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4218. if (inta & ~CSR_INI_SET_MASK) {
  4219. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4220. inta & ~CSR_INI_SET_MASK);
  4221. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4222. }
  4223. /* Re-enable all interrupts */
  4224. iwl4965_enable_interrupts(priv);
  4225. #ifdef CONFIG_IWL4965_DEBUG
  4226. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4227. inta = iwl4965_read32(priv, CSR_INT);
  4228. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4229. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4230. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4231. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4232. }
  4233. #endif
  4234. spin_unlock_irqrestore(&priv->lock, flags);
  4235. }
  4236. static irqreturn_t iwl4965_isr(int irq, void *data)
  4237. {
  4238. struct iwl4965_priv *priv = data;
  4239. u32 inta, inta_mask;
  4240. u32 inta_fh;
  4241. if (!priv)
  4242. return IRQ_NONE;
  4243. spin_lock(&priv->lock);
  4244. /* Disable (but don't clear!) interrupts here to avoid
  4245. * back-to-back ISRs and sporadic interrupts from our NIC.
  4246. * If we have something to service, the tasklet will re-enable ints.
  4247. * If we *don't* have something, we'll re-enable before leaving here. */
  4248. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4249. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4250. /* Discover which interrupts are active/pending */
  4251. inta = iwl4965_read32(priv, CSR_INT);
  4252. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4253. /* Ignore interrupt if there's nothing in NIC to service.
  4254. * This may be due to IRQ shared with another device,
  4255. * or due to sporadic interrupts thrown from our NIC. */
  4256. if (!inta && !inta_fh) {
  4257. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4258. goto none;
  4259. }
  4260. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4261. /* Hardware disappeared. It might have already raised
  4262. * an interrupt */
  4263. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4264. goto unplugged;
  4265. }
  4266. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4267. inta, inta_mask, inta_fh);
  4268. inta &= ~CSR_INT_BIT_SCD;
  4269. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4270. if (likely(inta || inta_fh))
  4271. tasklet_schedule(&priv->irq_tasklet);
  4272. unplugged:
  4273. spin_unlock(&priv->lock);
  4274. return IRQ_HANDLED;
  4275. none:
  4276. /* re-enable interrupts here since we don't have anything to service. */
  4277. iwl4965_enable_interrupts(priv);
  4278. spin_unlock(&priv->lock);
  4279. return IRQ_NONE;
  4280. }
  4281. /************************** EEPROM BANDS ****************************
  4282. *
  4283. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4284. * EEPROM contents to the specific channel number supported for each
  4285. * band.
  4286. *
  4287. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4288. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4289. * The specific geography and calibration information for that channel
  4290. * is contained in the eeprom map itself.
  4291. *
  4292. * During init, we copy the eeprom information and channel map
  4293. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4294. *
  4295. * channel_map_24/52 provides the index in the channel_info array for a
  4296. * given channel. We have to have two separate maps as there is channel
  4297. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4298. * band_2
  4299. *
  4300. * A value of 0xff stored in the channel_map indicates that the channel
  4301. * is not supported by the hardware at all.
  4302. *
  4303. * A value of 0xfe in the channel_map indicates that the channel is not
  4304. * valid for Tx with the current hardware. This means that
  4305. * while the system can tune and receive on a given channel, it may not
  4306. * be able to associate or transmit any frames on that
  4307. * channel. There is no corresponding channel information for that
  4308. * entry.
  4309. *
  4310. *********************************************************************/
  4311. /* 2.4 GHz */
  4312. static const u8 iwl4965_eeprom_band_1[14] = {
  4313. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4314. };
  4315. /* 5.2 GHz bands */
  4316. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4317. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4318. };
  4319. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4320. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4321. };
  4322. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4323. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4324. };
  4325. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4326. 145, 149, 153, 157, 161, 165
  4327. };
  4328. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4329. 1, 2, 3, 4, 5, 6, 7
  4330. };
  4331. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4332. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4333. };
  4334. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4335. int band,
  4336. int *eeprom_ch_count,
  4337. const struct iwl4965_eeprom_channel
  4338. **eeprom_ch_info,
  4339. const u8 **eeprom_ch_index)
  4340. {
  4341. switch (band) {
  4342. case 1: /* 2.4GHz band */
  4343. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4344. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4345. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4346. break;
  4347. case 2: /* 4.9GHz band */
  4348. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4349. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4350. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4351. break;
  4352. case 3: /* 5.2GHz band */
  4353. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4354. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4355. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4356. break;
  4357. case 4: /* 5.5GHz band */
  4358. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4359. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4360. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4361. break;
  4362. case 5: /* 5.7GHz band */
  4363. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4364. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4365. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4366. break;
  4367. case 6: /* 2.4GHz FAT channels */
  4368. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4369. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4370. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4371. break;
  4372. case 7: /* 5 GHz FAT channels */
  4373. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4374. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4375. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4376. break;
  4377. default:
  4378. BUG();
  4379. return;
  4380. }
  4381. }
  4382. /**
  4383. * iwl4965_get_channel_info - Find driver's private channel info
  4384. *
  4385. * Based on band and channel number.
  4386. */
  4387. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4388. enum ieee80211_band band, u16 channel)
  4389. {
  4390. int i;
  4391. switch (band) {
  4392. case IEEE80211_BAND_5GHZ:
  4393. for (i = 14; i < priv->channel_count; i++) {
  4394. if (priv->channel_info[i].channel == channel)
  4395. return &priv->channel_info[i];
  4396. }
  4397. break;
  4398. case IEEE80211_BAND_2GHZ:
  4399. if (channel >= 1 && channel <= 14)
  4400. return &priv->channel_info[channel - 1];
  4401. break;
  4402. default:
  4403. BUG();
  4404. }
  4405. return NULL;
  4406. }
  4407. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4408. ? # x " " : "")
  4409. /**
  4410. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4411. */
  4412. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4413. {
  4414. int eeprom_ch_count = 0;
  4415. const u8 *eeprom_ch_index = NULL;
  4416. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4417. int band, ch;
  4418. struct iwl4965_channel_info *ch_info;
  4419. if (priv->channel_count) {
  4420. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4421. return 0;
  4422. }
  4423. if (priv->eeprom.version < 0x2f) {
  4424. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4425. priv->eeprom.version);
  4426. return -EINVAL;
  4427. }
  4428. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4429. priv->channel_count =
  4430. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4431. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4432. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4433. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4434. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4435. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4436. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4437. priv->channel_count, GFP_KERNEL);
  4438. if (!priv->channel_info) {
  4439. IWL_ERROR("Could not allocate channel_info\n");
  4440. priv->channel_count = 0;
  4441. return -ENOMEM;
  4442. }
  4443. ch_info = priv->channel_info;
  4444. /* Loop through the 5 EEPROM bands adding them in order to the
  4445. * channel map we maintain (that contains additional information than
  4446. * what just in the EEPROM) */
  4447. for (band = 1; band <= 5; band++) {
  4448. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4449. &eeprom_ch_info, &eeprom_ch_index);
  4450. /* Loop through each band adding each of the channels */
  4451. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4452. ch_info->channel = eeprom_ch_index[ch];
  4453. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  4454. IEEE80211_BAND_5GHZ;
  4455. /* permanently store EEPROM's channel regulatory flags
  4456. * and max power in channel info database. */
  4457. ch_info->eeprom = eeprom_ch_info[ch];
  4458. /* Copy the run-time flags so they are there even on
  4459. * invalid channels */
  4460. ch_info->flags = eeprom_ch_info[ch].flags;
  4461. if (!(is_channel_valid(ch_info))) {
  4462. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4463. "No traffic\n",
  4464. ch_info->channel,
  4465. ch_info->flags,
  4466. is_channel_a_band(ch_info) ?
  4467. "5.2" : "2.4");
  4468. ch_info++;
  4469. continue;
  4470. }
  4471. /* Initialize regulatory-based run-time data */
  4472. ch_info->max_power_avg = ch_info->curr_txpow =
  4473. eeprom_ch_info[ch].max_power_avg;
  4474. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4475. ch_info->min_power = 0;
  4476. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s%s(0x%02x"
  4477. " %ddBm): Ad-Hoc %ssupported\n",
  4478. ch_info->channel,
  4479. is_channel_a_band(ch_info) ?
  4480. "5.2" : "2.4",
  4481. CHECK_AND_PRINT(VALID),
  4482. CHECK_AND_PRINT(IBSS),
  4483. CHECK_AND_PRINT(ACTIVE),
  4484. CHECK_AND_PRINT(RADAR),
  4485. CHECK_AND_PRINT(WIDE),
  4486. CHECK_AND_PRINT(NARROW),
  4487. CHECK_AND_PRINT(DFS),
  4488. eeprom_ch_info[ch].flags,
  4489. eeprom_ch_info[ch].max_power_avg,
  4490. ((eeprom_ch_info[ch].
  4491. flags & EEPROM_CHANNEL_IBSS)
  4492. && !(eeprom_ch_info[ch].
  4493. flags & EEPROM_CHANNEL_RADAR))
  4494. ? "" : "not ");
  4495. /* Set the user_txpower_limit to the highest power
  4496. * supported by any channel */
  4497. if (eeprom_ch_info[ch].max_power_avg >
  4498. priv->user_txpower_limit)
  4499. priv->user_txpower_limit =
  4500. eeprom_ch_info[ch].max_power_avg;
  4501. ch_info++;
  4502. }
  4503. }
  4504. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4505. for (band = 6; band <= 7; band++) {
  4506. enum ieee80211_band ieeeband;
  4507. u8 fat_extension_chan;
  4508. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4509. &eeprom_ch_info, &eeprom_ch_index);
  4510. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4511. ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  4512. /* Loop through each band adding each of the channels */
  4513. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4514. if ((band == 6) &&
  4515. ((eeprom_ch_index[ch] == 5) ||
  4516. (eeprom_ch_index[ch] == 6) ||
  4517. (eeprom_ch_index[ch] == 7)))
  4518. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4519. else
  4520. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4521. /* Set up driver's info for lower half */
  4522. iwl4965_set_fat_chan_info(priv, ieeeband,
  4523. eeprom_ch_index[ch],
  4524. &(eeprom_ch_info[ch]),
  4525. fat_extension_chan);
  4526. /* Set up driver's info for upper half */
  4527. iwl4965_set_fat_chan_info(priv, ieeeband,
  4528. (eeprom_ch_index[ch] + 4),
  4529. &(eeprom_ch_info[ch]),
  4530. HT_IE_EXT_CHANNEL_BELOW);
  4531. }
  4532. }
  4533. return 0;
  4534. }
  4535. /*
  4536. * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
  4537. */
  4538. static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
  4539. {
  4540. kfree(priv->channel_info);
  4541. priv->channel_count = 0;
  4542. }
  4543. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4544. * sending probe req. This should be set long enough to hear probe responses
  4545. * from more than one AP. */
  4546. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4547. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4548. /* For faster active scanning, scan will move to the next channel if fewer than
  4549. * PLCP_QUIET_THRESH packets are heard on this channel within
  4550. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4551. * time if it's a quiet channel (nothing responded to our probe, and there's
  4552. * no other traffic).
  4553. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4554. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4555. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4556. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4557. * Must be set longer than active dwell time.
  4558. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4559. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4560. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4561. #define IWL_PASSIVE_DWELL_BASE (100)
  4562. #define IWL_CHANNEL_TUNE_TIME 5
  4563. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv,
  4564. enum ieee80211_band band)
  4565. {
  4566. if (band == IEEE80211_BAND_5GHZ)
  4567. return IWL_ACTIVE_DWELL_TIME_52;
  4568. else
  4569. return IWL_ACTIVE_DWELL_TIME_24;
  4570. }
  4571. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv,
  4572. enum ieee80211_band band)
  4573. {
  4574. u16 active = iwl4965_get_active_dwell_time(priv, band);
  4575. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  4576. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4577. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4578. if (iwl4965_is_associated(priv)) {
  4579. /* If we're associated, we clamp the maximum passive
  4580. * dwell time to be 98% of the beacon interval (minus
  4581. * 2 * channel tune time) */
  4582. passive = priv->beacon_int;
  4583. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4584. passive = IWL_PASSIVE_DWELL_BASE;
  4585. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4586. }
  4587. if (passive <= active)
  4588. passive = active + 1;
  4589. return passive;
  4590. }
  4591. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv,
  4592. enum ieee80211_band band,
  4593. u8 is_active, u8 direct_mask,
  4594. struct iwl4965_scan_channel *scan_ch)
  4595. {
  4596. const struct ieee80211_channel *channels = NULL;
  4597. const struct ieee80211_supported_band *sband;
  4598. const struct iwl4965_channel_info *ch_info;
  4599. u16 passive_dwell = 0;
  4600. u16 active_dwell = 0;
  4601. int added, i;
  4602. sband = iwl4965_get_hw_mode(priv, band);
  4603. if (!sband)
  4604. return 0;
  4605. channels = sband->channels;
  4606. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4607. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4608. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4609. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4610. le16_to_cpu(priv->active_rxon.channel)) {
  4611. if (iwl4965_is_associated(priv)) {
  4612. IWL_DEBUG_SCAN
  4613. ("Skipping current channel %d\n",
  4614. le16_to_cpu(priv->active_rxon.channel));
  4615. continue;
  4616. }
  4617. } else if (priv->only_active_channel)
  4618. continue;
  4619. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4620. ch_info = iwl4965_get_channel_info(priv, band,
  4621. scan_ch->channel);
  4622. if (!is_channel_valid(ch_info)) {
  4623. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4624. scan_ch->channel);
  4625. continue;
  4626. }
  4627. if (!is_active || is_channel_passive(ch_info) ||
  4628. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4629. scan_ch->type = 0; /* passive */
  4630. else
  4631. scan_ch->type = 1; /* active */
  4632. if (scan_ch->type & 1)
  4633. scan_ch->type |= (direct_mask << 1);
  4634. if (is_channel_narrow(ch_info))
  4635. scan_ch->type |= (1 << 7);
  4636. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4637. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4638. /* Set txpower levels to defaults */
  4639. scan_ch->tpc.dsp_atten = 110;
  4640. /* scan_pwr_info->tpc.dsp_atten; */
  4641. /*scan_pwr_info->tpc.tx_gain; */
  4642. if (band == IEEE80211_BAND_5GHZ)
  4643. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4644. else {
  4645. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4646. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4647. * power level:
  4648. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4649. */
  4650. }
  4651. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4652. scan_ch->channel,
  4653. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4654. (scan_ch->type & 1) ?
  4655. active_dwell : passive_dwell);
  4656. scan_ch++;
  4657. added++;
  4658. }
  4659. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4660. return added;
  4661. }
  4662. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4663. struct ieee80211_rate *rates)
  4664. {
  4665. int i;
  4666. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4667. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4668. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4669. rates[i].hw_value_short = i;
  4670. rates[i].flags = 0;
  4671. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4672. /*
  4673. * If CCK != 1M then set short preamble rate flag.
  4674. */
  4675. rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
  4676. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4677. }
  4678. }
  4679. }
  4680. /**
  4681. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4682. */
  4683. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4684. {
  4685. struct iwl4965_channel_info *ch;
  4686. struct ieee80211_supported_band *sband;
  4687. struct ieee80211_channel *channels;
  4688. struct ieee80211_channel *geo_ch;
  4689. struct ieee80211_rate *rates;
  4690. int i = 0;
  4691. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4692. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4693. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4694. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4695. return 0;
  4696. }
  4697. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4698. priv->channel_count, GFP_KERNEL);
  4699. if (!channels)
  4700. return -ENOMEM;
  4701. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4702. GFP_KERNEL);
  4703. if (!rates) {
  4704. kfree(channels);
  4705. return -ENOMEM;
  4706. }
  4707. /* 5.2GHz channels start after the 2.4GHz channels */
  4708. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4709. sband->channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4710. /* just OFDM */
  4711. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4712. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4713. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_5GHZ);
  4714. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4715. sband->channels = channels;
  4716. /* OFDM & CCK */
  4717. sband->bitrates = rates;
  4718. sband->n_bitrates = IWL_RATE_COUNT;
  4719. iwl4965_init_ht_hw_capab(&sband->ht_info, IEEE80211_BAND_2GHZ);
  4720. priv->ieee_channels = channels;
  4721. priv->ieee_rates = rates;
  4722. iwl4965_init_hw_rates(priv, rates);
  4723. for (i = 0; i < priv->channel_count; i++) {
  4724. ch = &priv->channel_info[i];
  4725. /* FIXME: might be removed if scan is OK */
  4726. if (!is_channel_valid(ch))
  4727. continue;
  4728. if (is_channel_a_band(ch))
  4729. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4730. else
  4731. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4732. geo_ch = &sband->channels[sband->n_channels++];
  4733. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4734. geo_ch->max_power = ch->max_power_avg;
  4735. geo_ch->max_antenna_gain = 0xff;
  4736. geo_ch->hw_value = ch->channel;
  4737. if (is_channel_valid(ch)) {
  4738. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4739. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4740. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4741. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4742. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4743. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4744. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4745. priv->max_channel_txpower_limit =
  4746. ch->max_power_avg;
  4747. } else {
  4748. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4749. }
  4750. /* Save flags for reg domain usage */
  4751. geo_ch->orig_flags = geo_ch->flags;
  4752. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4753. ch->channel, geo_ch->center_freq,
  4754. is_channel_a_band(ch) ? "5.2" : "2.4",
  4755. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4756. "restricted" : "valid",
  4757. geo_ch->flags);
  4758. }
  4759. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4760. priv->cfg->sku & IWL_SKU_A) {
  4761. printk(KERN_INFO DRV_NAME
  4762. ": Incorrectly detected BG card as ABG. Please send "
  4763. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4764. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4765. priv->cfg->sku &= ~IWL_SKU_A;
  4766. }
  4767. printk(KERN_INFO DRV_NAME
  4768. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4769. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4770. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4771. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
  4772. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
  4773. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4774. return 0;
  4775. }
  4776. /*
  4777. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4778. */
  4779. static void iwl4965_free_geos(struct iwl4965_priv *priv)
  4780. {
  4781. kfree(priv->ieee_channels);
  4782. kfree(priv->ieee_rates);
  4783. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4784. }
  4785. /******************************************************************************
  4786. *
  4787. * uCode download functions
  4788. *
  4789. ******************************************************************************/
  4790. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  4791. {
  4792. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4793. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4794. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4795. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4796. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4797. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4798. }
  4799. /**
  4800. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4801. * looking at all data.
  4802. */
  4803. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
  4804. u32 len)
  4805. {
  4806. u32 val;
  4807. u32 save_len = len;
  4808. int rc = 0;
  4809. u32 errcnt;
  4810. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4811. rc = iwl4965_grab_nic_access(priv);
  4812. if (rc)
  4813. return rc;
  4814. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4815. errcnt = 0;
  4816. for (; len > 0; len -= sizeof(u32), image++) {
  4817. /* read data comes through single port, auto-incr addr */
  4818. /* NOTE: Use the debugless read so we don't flood kernel log
  4819. * if IWL_DL_IO is set */
  4820. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4821. if (val != le32_to_cpu(*image)) {
  4822. IWL_ERROR("uCode INST section is invalid at "
  4823. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4824. save_len - len, val, le32_to_cpu(*image));
  4825. rc = -EIO;
  4826. errcnt++;
  4827. if (errcnt >= 20)
  4828. break;
  4829. }
  4830. }
  4831. iwl4965_release_nic_access(priv);
  4832. if (!errcnt)
  4833. IWL_DEBUG_INFO
  4834. ("ucode image in INSTRUCTION memory is good\n");
  4835. return rc;
  4836. }
  4837. /**
  4838. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4839. * using sample data 100 bytes apart. If these sample points are good,
  4840. * it's a pretty good bet that everything between them is good, too.
  4841. */
  4842. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  4843. {
  4844. u32 val;
  4845. int rc = 0;
  4846. u32 errcnt = 0;
  4847. u32 i;
  4848. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4849. rc = iwl4965_grab_nic_access(priv);
  4850. if (rc)
  4851. return rc;
  4852. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4853. /* read data comes through single port, auto-incr addr */
  4854. /* NOTE: Use the debugless read so we don't flood kernel log
  4855. * if IWL_DL_IO is set */
  4856. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4857. i + RTC_INST_LOWER_BOUND);
  4858. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4859. if (val != le32_to_cpu(*image)) {
  4860. #if 0 /* Enable this if you want to see details */
  4861. IWL_ERROR("uCode INST section is invalid at "
  4862. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4863. i, val, *image);
  4864. #endif
  4865. rc = -EIO;
  4866. errcnt++;
  4867. if (errcnt >= 3)
  4868. break;
  4869. }
  4870. }
  4871. iwl4965_release_nic_access(priv);
  4872. return rc;
  4873. }
  4874. /**
  4875. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4876. * and verify its contents
  4877. */
  4878. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  4879. {
  4880. __le32 *image;
  4881. u32 len;
  4882. int rc = 0;
  4883. /* Try bootstrap */
  4884. image = (__le32 *)priv->ucode_boot.v_addr;
  4885. len = priv->ucode_boot.len;
  4886. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4887. if (rc == 0) {
  4888. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4889. return 0;
  4890. }
  4891. /* Try initialize */
  4892. image = (__le32 *)priv->ucode_init.v_addr;
  4893. len = priv->ucode_init.len;
  4894. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4895. if (rc == 0) {
  4896. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4897. return 0;
  4898. }
  4899. /* Try runtime/protocol */
  4900. image = (__le32 *)priv->ucode_code.v_addr;
  4901. len = priv->ucode_code.len;
  4902. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4903. if (rc == 0) {
  4904. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4905. return 0;
  4906. }
  4907. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4908. /* Since nothing seems to match, show first several data entries in
  4909. * instruction SRAM, so maybe visual inspection will give a clue.
  4910. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4911. image = (__le32 *)priv->ucode_boot.v_addr;
  4912. len = priv->ucode_boot.len;
  4913. rc = iwl4965_verify_inst_full(priv, image, len);
  4914. return rc;
  4915. }
  4916. /* check contents of special bootstrap uCode SRAM */
  4917. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  4918. {
  4919. __le32 *image = priv->ucode_boot.v_addr;
  4920. u32 len = priv->ucode_boot.len;
  4921. u32 reg;
  4922. u32 val;
  4923. IWL_DEBUG_INFO("Begin verify bsm\n");
  4924. /* verify BSM SRAM contents */
  4925. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  4926. for (reg = BSM_SRAM_LOWER_BOUND;
  4927. reg < BSM_SRAM_LOWER_BOUND + len;
  4928. reg += sizeof(u32), image ++) {
  4929. val = iwl4965_read_prph(priv, reg);
  4930. if (val != le32_to_cpu(*image)) {
  4931. IWL_ERROR("BSM uCode verification failed at "
  4932. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4933. BSM_SRAM_LOWER_BOUND,
  4934. reg - BSM_SRAM_LOWER_BOUND, len,
  4935. val, le32_to_cpu(*image));
  4936. return -EIO;
  4937. }
  4938. }
  4939. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4940. return 0;
  4941. }
  4942. /**
  4943. * iwl4965_load_bsm - Load bootstrap instructions
  4944. *
  4945. * BSM operation:
  4946. *
  4947. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4948. * in special SRAM that does not power down during RFKILL. When powering back
  4949. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4950. * the bootstrap program into the on-board processor, and starts it.
  4951. *
  4952. * The bootstrap program loads (via DMA) instructions and data for a new
  4953. * program from host DRAM locations indicated by the host driver in the
  4954. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4955. * automatically.
  4956. *
  4957. * When initializing the NIC, the host driver points the BSM to the
  4958. * "initialize" uCode image. This uCode sets up some internal data, then
  4959. * notifies host via "initialize alive" that it is complete.
  4960. *
  4961. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4962. * normal runtime uCode instructions and a backup uCode data cache buffer
  4963. * (filled initially with starting data values for the on-board processor),
  4964. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4965. * which begins normal operation.
  4966. *
  4967. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4968. * the backup data cache in DRAM before SRAM is powered down.
  4969. *
  4970. * When powering back up, the BSM loads the bootstrap program. This reloads
  4971. * the runtime uCode instructions and the backup data cache into SRAM,
  4972. * and re-launches the runtime uCode from where it left off.
  4973. */
  4974. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  4975. {
  4976. __le32 *image = priv->ucode_boot.v_addr;
  4977. u32 len = priv->ucode_boot.len;
  4978. dma_addr_t pinst;
  4979. dma_addr_t pdata;
  4980. u32 inst_len;
  4981. u32 data_len;
  4982. int rc;
  4983. int i;
  4984. u32 done;
  4985. u32 reg_offset;
  4986. IWL_DEBUG_INFO("Begin load bsm\n");
  4987. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4988. if (len > IWL_MAX_BSM_SIZE)
  4989. return -EINVAL;
  4990. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4991. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  4992. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  4993. * after the "initialize" uCode has run, to point to
  4994. * runtime/protocol instructions and backup data cache. */
  4995. pinst = priv->ucode_init.p_addr >> 4;
  4996. pdata = priv->ucode_init_data.p_addr >> 4;
  4997. inst_len = priv->ucode_init.len;
  4998. data_len = priv->ucode_init_data.len;
  4999. rc = iwl4965_grab_nic_access(priv);
  5000. if (rc)
  5001. return rc;
  5002. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5003. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5004. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5005. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5006. /* Fill BSM memory with bootstrap instructions */
  5007. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5008. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5009. reg_offset += sizeof(u32), image++)
  5010. _iwl4965_write_prph(priv, reg_offset,
  5011. le32_to_cpu(*image));
  5012. rc = iwl4965_verify_bsm(priv);
  5013. if (rc) {
  5014. iwl4965_release_nic_access(priv);
  5015. return rc;
  5016. }
  5017. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5018. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5019. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  5020. RTC_INST_LOWER_BOUND);
  5021. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5022. /* Load bootstrap code into instruction SRAM now,
  5023. * to prepare to load "initialize" uCode */
  5024. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5025. BSM_WR_CTRL_REG_BIT_START);
  5026. /* Wait for load of bootstrap uCode to finish */
  5027. for (i = 0; i < 100; i++) {
  5028. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  5029. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5030. break;
  5031. udelay(10);
  5032. }
  5033. if (i < 100)
  5034. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5035. else {
  5036. IWL_ERROR("BSM write did not complete!\n");
  5037. return -EIO;
  5038. }
  5039. /* Enable future boot loads whenever power management unit triggers it
  5040. * (e.g. when powering back up after power-save shutdown) */
  5041. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5042. BSM_WR_CTRL_REG_BIT_START_EN);
  5043. iwl4965_release_nic_access(priv);
  5044. return 0;
  5045. }
  5046. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  5047. {
  5048. /* Remove all resets to allow NIC to operate */
  5049. iwl4965_write32(priv, CSR_RESET, 0);
  5050. }
  5051. /**
  5052. * iwl4965_read_ucode - Read uCode images from disk file.
  5053. *
  5054. * Copy into buffers for card to fetch via bus-mastering
  5055. */
  5056. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  5057. {
  5058. struct iwl4965_ucode *ucode;
  5059. int ret;
  5060. const struct firmware *ucode_raw;
  5061. const char *name = priv->cfg->fw_name;
  5062. u8 *src;
  5063. size_t len;
  5064. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5065. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5066. * request_firmware() is synchronous, file is in memory on return. */
  5067. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5068. if (ret < 0) {
  5069. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  5070. name, ret);
  5071. goto error;
  5072. }
  5073. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5074. name, ucode_raw->size);
  5075. /* Make sure that we got at least our header! */
  5076. if (ucode_raw->size < sizeof(*ucode)) {
  5077. IWL_ERROR("File size way too small!\n");
  5078. ret = -EINVAL;
  5079. goto err_release;
  5080. }
  5081. /* Data from ucode file: header followed by uCode images */
  5082. ucode = (void *)ucode_raw->data;
  5083. ver = le32_to_cpu(ucode->ver);
  5084. inst_size = le32_to_cpu(ucode->inst_size);
  5085. data_size = le32_to_cpu(ucode->data_size);
  5086. init_size = le32_to_cpu(ucode->init_size);
  5087. init_data_size = le32_to_cpu(ucode->init_data_size);
  5088. boot_size = le32_to_cpu(ucode->boot_size);
  5089. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5090. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5091. inst_size);
  5092. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5093. data_size);
  5094. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5095. init_size);
  5096. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5097. init_data_size);
  5098. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5099. boot_size);
  5100. /* Verify size of file vs. image size info in file's header */
  5101. if (ucode_raw->size < sizeof(*ucode) +
  5102. inst_size + data_size + init_size +
  5103. init_data_size + boot_size) {
  5104. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5105. (int)ucode_raw->size);
  5106. ret = -EINVAL;
  5107. goto err_release;
  5108. }
  5109. /* Verify that uCode images will fit in card's SRAM */
  5110. if (inst_size > IWL_MAX_INST_SIZE) {
  5111. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5112. inst_size);
  5113. ret = -EINVAL;
  5114. goto err_release;
  5115. }
  5116. if (data_size > IWL_MAX_DATA_SIZE) {
  5117. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5118. data_size);
  5119. ret = -EINVAL;
  5120. goto err_release;
  5121. }
  5122. if (init_size > IWL_MAX_INST_SIZE) {
  5123. IWL_DEBUG_INFO
  5124. ("uCode init instr len %d too large to fit in\n",
  5125. init_size);
  5126. ret = -EINVAL;
  5127. goto err_release;
  5128. }
  5129. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5130. IWL_DEBUG_INFO
  5131. ("uCode init data len %d too large to fit in\n",
  5132. init_data_size);
  5133. ret = -EINVAL;
  5134. goto err_release;
  5135. }
  5136. if (boot_size > IWL_MAX_BSM_SIZE) {
  5137. IWL_DEBUG_INFO
  5138. ("uCode boot instr len %d too large to fit in\n",
  5139. boot_size);
  5140. ret = -EINVAL;
  5141. goto err_release;
  5142. }
  5143. /* Allocate ucode buffers for card's bus-master loading ... */
  5144. /* Runtime instructions and 2 copies of data:
  5145. * 1) unmodified from disk
  5146. * 2) backup cache for save/restore during power-downs */
  5147. priv->ucode_code.len = inst_size;
  5148. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5149. priv->ucode_data.len = data_size;
  5150. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5151. priv->ucode_data_backup.len = data_size;
  5152. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5153. /* Initialization instructions and data */
  5154. if (init_size && init_data_size) {
  5155. priv->ucode_init.len = init_size;
  5156. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5157. priv->ucode_init_data.len = init_data_size;
  5158. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5159. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5160. goto err_pci_alloc;
  5161. }
  5162. /* Bootstrap (instructions only, no data) */
  5163. if (boot_size) {
  5164. priv->ucode_boot.len = boot_size;
  5165. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5166. if (!priv->ucode_boot.v_addr)
  5167. goto err_pci_alloc;
  5168. }
  5169. /* Copy images into buffers for card's bus-master reads ... */
  5170. /* Runtime instructions (first block of data in file) */
  5171. src = &ucode->data[0];
  5172. len = priv->ucode_code.len;
  5173. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5174. memcpy(priv->ucode_code.v_addr, src, len);
  5175. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5176. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5177. /* Runtime data (2nd block)
  5178. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5179. src = &ucode->data[inst_size];
  5180. len = priv->ucode_data.len;
  5181. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5182. memcpy(priv->ucode_data.v_addr, src, len);
  5183. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5184. /* Initialization instructions (3rd block) */
  5185. if (init_size) {
  5186. src = &ucode->data[inst_size + data_size];
  5187. len = priv->ucode_init.len;
  5188. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5189. len);
  5190. memcpy(priv->ucode_init.v_addr, src, len);
  5191. }
  5192. /* Initialization data (4th block) */
  5193. if (init_data_size) {
  5194. src = &ucode->data[inst_size + data_size + init_size];
  5195. len = priv->ucode_init_data.len;
  5196. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5197. len);
  5198. memcpy(priv->ucode_init_data.v_addr, src, len);
  5199. }
  5200. /* Bootstrap instructions (5th block) */
  5201. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5202. len = priv->ucode_boot.len;
  5203. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5204. memcpy(priv->ucode_boot.v_addr, src, len);
  5205. /* We have our copies now, allow OS release its copies */
  5206. release_firmware(ucode_raw);
  5207. return 0;
  5208. err_pci_alloc:
  5209. IWL_ERROR("failed to allocate pci memory\n");
  5210. ret = -ENOMEM;
  5211. iwl4965_dealloc_ucode_pci(priv);
  5212. err_release:
  5213. release_firmware(ucode_raw);
  5214. error:
  5215. return ret;
  5216. }
  5217. /**
  5218. * iwl4965_set_ucode_ptrs - Set uCode address location
  5219. *
  5220. * Tell initialization uCode where to find runtime uCode.
  5221. *
  5222. * BSM registers initially contain pointers to initialization uCode.
  5223. * We need to replace them to load runtime uCode inst and data,
  5224. * and to save runtime data when powering down.
  5225. */
  5226. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5227. {
  5228. dma_addr_t pinst;
  5229. dma_addr_t pdata;
  5230. int rc = 0;
  5231. unsigned long flags;
  5232. /* bits 35:4 for 4965 */
  5233. pinst = priv->ucode_code.p_addr >> 4;
  5234. pdata = priv->ucode_data_backup.p_addr >> 4;
  5235. spin_lock_irqsave(&priv->lock, flags);
  5236. rc = iwl4965_grab_nic_access(priv);
  5237. if (rc) {
  5238. spin_unlock_irqrestore(&priv->lock, flags);
  5239. return rc;
  5240. }
  5241. /* Tell bootstrap uCode where to find image to load */
  5242. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5243. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5244. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5245. priv->ucode_data.len);
  5246. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5247. * that all new ptr/size info is in place */
  5248. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5249. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5250. iwl4965_release_nic_access(priv);
  5251. spin_unlock_irqrestore(&priv->lock, flags);
  5252. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5253. return rc;
  5254. }
  5255. /**
  5256. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5257. *
  5258. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5259. *
  5260. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5261. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5262. * (3945 does not contain this data).
  5263. *
  5264. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5265. */
  5266. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5267. {
  5268. /* Check alive response for "valid" sign from uCode */
  5269. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5270. /* We had an error bringing up the hardware, so take it
  5271. * all the way back down so we can try again */
  5272. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5273. goto restart;
  5274. }
  5275. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5276. * This is a paranoid check, because we would not have gotten the
  5277. * "initialize" alive if code weren't properly loaded. */
  5278. if (iwl4965_verify_ucode(priv)) {
  5279. /* Runtime instruction load was bad;
  5280. * take it all the way back down so we can try again */
  5281. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5282. goto restart;
  5283. }
  5284. /* Calculate temperature */
  5285. priv->temperature = iwl4965_get_temperature(priv);
  5286. /* Send pointers to protocol/runtime uCode image ... init code will
  5287. * load and launch runtime uCode, which will send us another "Alive"
  5288. * notification. */
  5289. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5290. if (iwl4965_set_ucode_ptrs(priv)) {
  5291. /* Runtime instruction load won't happen;
  5292. * take it all the way back down so we can try again */
  5293. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5294. goto restart;
  5295. }
  5296. return;
  5297. restart:
  5298. queue_work(priv->workqueue, &priv->restart);
  5299. }
  5300. /**
  5301. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5302. * from protocol/runtime uCode (initialization uCode's
  5303. * Alive gets handled by iwl4965_init_alive_start()).
  5304. */
  5305. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5306. {
  5307. int rc = 0;
  5308. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5309. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5310. /* We had an error bringing up the hardware, so take it
  5311. * all the way back down so we can try again */
  5312. IWL_DEBUG_INFO("Alive failed.\n");
  5313. goto restart;
  5314. }
  5315. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5316. * This is a paranoid check, because we would not have gotten the
  5317. * "runtime" alive if code weren't properly loaded. */
  5318. if (iwl4965_verify_ucode(priv)) {
  5319. /* Runtime instruction load was bad;
  5320. * take it all the way back down so we can try again */
  5321. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5322. goto restart;
  5323. }
  5324. iwl4965_clear_stations_table(priv);
  5325. rc = iwl4965_alive_notify(priv);
  5326. if (rc) {
  5327. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5328. rc);
  5329. goto restart;
  5330. }
  5331. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5332. set_bit(STATUS_ALIVE, &priv->status);
  5333. /* Clear out the uCode error bit if it is set */
  5334. clear_bit(STATUS_FW_ERROR, &priv->status);
  5335. if (iwl4965_is_rfkill(priv))
  5336. return;
  5337. ieee80211_start_queues(priv->hw);
  5338. priv->active_rate = priv->rates_mask;
  5339. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5340. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5341. if (iwl4965_is_associated(priv)) {
  5342. struct iwl4965_rxon_cmd *active_rxon =
  5343. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5344. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5345. sizeof(priv->staging_rxon));
  5346. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5347. } else {
  5348. /* Initialize our rx_config data */
  5349. iwl4965_connection_init_rx_config(priv);
  5350. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5351. }
  5352. /* Configure Bluetooth device coexistence support */
  5353. iwl4965_send_bt_config(priv);
  5354. /* Configure the adapter for unassociated operation */
  5355. iwl4965_commit_rxon(priv);
  5356. /* At this point, the NIC is initialized and operational */
  5357. priv->notif_missed_beacons = 0;
  5358. set_bit(STATUS_READY, &priv->status);
  5359. iwl4965_rf_kill_ct_config(priv);
  5360. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5361. wake_up_interruptible(&priv->wait_command_queue);
  5362. if (priv->error_recovering)
  5363. iwl4965_error_recovery(priv);
  5364. return;
  5365. restart:
  5366. queue_work(priv->workqueue, &priv->restart);
  5367. }
  5368. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5369. static void __iwl4965_down(struct iwl4965_priv *priv)
  5370. {
  5371. unsigned long flags;
  5372. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5373. struct ieee80211_conf *conf = NULL;
  5374. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5375. conf = ieee80211_get_hw_conf(priv->hw);
  5376. if (!exit_pending)
  5377. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5378. iwl4965_clear_stations_table(priv);
  5379. /* Unblock any waiting calls */
  5380. wake_up_interruptible_all(&priv->wait_command_queue);
  5381. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5382. * exiting the module */
  5383. if (!exit_pending)
  5384. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5385. /* stop and reset the on-board processor */
  5386. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5387. /* tell the device to stop sending interrupts */
  5388. iwl4965_disable_interrupts(priv);
  5389. if (priv->mac80211_registered)
  5390. ieee80211_stop_queues(priv->hw);
  5391. /* If we have not previously called iwl4965_init() then
  5392. * clear all bits but the RF Kill and SUSPEND bits and return */
  5393. if (!iwl4965_is_init(priv)) {
  5394. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5395. STATUS_RF_KILL_HW |
  5396. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5397. STATUS_RF_KILL_SW |
  5398. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5399. STATUS_GEO_CONFIGURED |
  5400. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5401. STATUS_IN_SUSPEND;
  5402. goto exit;
  5403. }
  5404. /* ...otherwise clear out all the status bits but the RF Kill and
  5405. * SUSPEND bits and continue taking the NIC down. */
  5406. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5407. STATUS_RF_KILL_HW |
  5408. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5409. STATUS_RF_KILL_SW |
  5410. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5411. STATUS_GEO_CONFIGURED |
  5412. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5413. STATUS_IN_SUSPEND |
  5414. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5415. STATUS_FW_ERROR;
  5416. spin_lock_irqsave(&priv->lock, flags);
  5417. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5418. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5419. spin_unlock_irqrestore(&priv->lock, flags);
  5420. iwl4965_hw_txq_ctx_stop(priv);
  5421. iwl4965_hw_rxq_stop(priv);
  5422. spin_lock_irqsave(&priv->lock, flags);
  5423. if (!iwl4965_grab_nic_access(priv)) {
  5424. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5425. APMG_CLK_VAL_DMA_CLK_RQT);
  5426. iwl4965_release_nic_access(priv);
  5427. }
  5428. spin_unlock_irqrestore(&priv->lock, flags);
  5429. udelay(5);
  5430. iwl4965_hw_nic_stop_master(priv);
  5431. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5432. iwl4965_hw_nic_reset(priv);
  5433. exit:
  5434. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5435. if (priv->ibss_beacon)
  5436. dev_kfree_skb(priv->ibss_beacon);
  5437. priv->ibss_beacon = NULL;
  5438. /* clear out any free frames */
  5439. iwl4965_clear_free_frames(priv);
  5440. }
  5441. static void iwl4965_down(struct iwl4965_priv *priv)
  5442. {
  5443. mutex_lock(&priv->mutex);
  5444. __iwl4965_down(priv);
  5445. mutex_unlock(&priv->mutex);
  5446. iwl4965_cancel_deferred_work(priv);
  5447. }
  5448. #define MAX_HW_RESTARTS 5
  5449. static int __iwl4965_up(struct iwl4965_priv *priv)
  5450. {
  5451. int rc, i;
  5452. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5453. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5454. return -EIO;
  5455. }
  5456. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5457. IWL_WARNING("Radio disabled by SW RF kill (module "
  5458. "parameter)\n");
  5459. return -ENODEV;
  5460. }
  5461. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5462. IWL_ERROR("ucode not available for device bringup\n");
  5463. return -EIO;
  5464. }
  5465. /* If platform's RF_KILL switch is NOT set to KILL */
  5466. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  5467. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  5468. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5469. else {
  5470. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5471. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  5472. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5473. return -ENODEV;
  5474. }
  5475. }
  5476. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5477. rc = iwl4965_hw_nic_init(priv);
  5478. if (rc) {
  5479. IWL_ERROR("Unable to int nic\n");
  5480. return rc;
  5481. }
  5482. /* make sure rfkill handshake bits are cleared */
  5483. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5484. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5485. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5486. /* clear (again), then enable host interrupts */
  5487. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5488. iwl4965_enable_interrupts(priv);
  5489. /* really make sure rfkill handshake bits are cleared */
  5490. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5491. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5492. /* Copy original ucode data image from disk into backup cache.
  5493. * This will be used to initialize the on-board processor's
  5494. * data SRAM for a clean start when the runtime program first loads. */
  5495. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5496. priv->ucode_data.len);
  5497. /* We return success when we resume from suspend and rf_kill is on. */
  5498. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  5499. return 0;
  5500. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5501. iwl4965_clear_stations_table(priv);
  5502. /* load bootstrap state machine,
  5503. * load bootstrap program into processor's memory,
  5504. * prepare to load the "initialize" uCode */
  5505. rc = iwl4965_load_bsm(priv);
  5506. if (rc) {
  5507. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5508. continue;
  5509. }
  5510. /* start card; "initialize" will load runtime ucode */
  5511. iwl4965_nic_start(priv);
  5512. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5513. return 0;
  5514. }
  5515. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5516. __iwl4965_down(priv);
  5517. /* tried to restart and config the device for as long as our
  5518. * patience could withstand */
  5519. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5520. return -EIO;
  5521. }
  5522. /*****************************************************************************
  5523. *
  5524. * Workqueue callbacks
  5525. *
  5526. *****************************************************************************/
  5527. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5528. {
  5529. struct iwl4965_priv *priv =
  5530. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5531. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5532. return;
  5533. mutex_lock(&priv->mutex);
  5534. iwl4965_init_alive_start(priv);
  5535. mutex_unlock(&priv->mutex);
  5536. }
  5537. static void iwl4965_bg_alive_start(struct work_struct *data)
  5538. {
  5539. struct iwl4965_priv *priv =
  5540. container_of(data, struct iwl4965_priv, alive_start.work);
  5541. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5542. return;
  5543. mutex_lock(&priv->mutex);
  5544. iwl4965_alive_start(priv);
  5545. mutex_unlock(&priv->mutex);
  5546. }
  5547. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5548. {
  5549. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5550. wake_up_interruptible(&priv->wait_command_queue);
  5551. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5552. return;
  5553. mutex_lock(&priv->mutex);
  5554. if (!iwl4965_is_rfkill(priv)) {
  5555. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5556. "HW and/or SW RF Kill no longer active, restarting "
  5557. "device\n");
  5558. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5559. queue_work(priv->workqueue, &priv->restart);
  5560. } else {
  5561. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5562. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5563. "disabled by SW switch\n");
  5564. else
  5565. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5566. "Kill switch must be turned off for "
  5567. "wireless networking to work.\n");
  5568. }
  5569. mutex_unlock(&priv->mutex);
  5570. }
  5571. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5572. static void iwl4965_bg_scan_check(struct work_struct *data)
  5573. {
  5574. struct iwl4965_priv *priv =
  5575. container_of(data, struct iwl4965_priv, scan_check.work);
  5576. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5577. return;
  5578. mutex_lock(&priv->mutex);
  5579. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5580. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5581. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5582. "Scan completion watchdog resetting adapter (%dms)\n",
  5583. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5584. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5585. iwl4965_send_scan_abort(priv);
  5586. }
  5587. mutex_unlock(&priv->mutex);
  5588. }
  5589. static void iwl4965_bg_request_scan(struct work_struct *data)
  5590. {
  5591. struct iwl4965_priv *priv =
  5592. container_of(data, struct iwl4965_priv, request_scan);
  5593. struct iwl4965_host_cmd cmd = {
  5594. .id = REPLY_SCAN_CMD,
  5595. .len = sizeof(struct iwl4965_scan_cmd),
  5596. .meta.flags = CMD_SIZE_HUGE,
  5597. };
  5598. int rc = 0;
  5599. struct iwl4965_scan_cmd *scan;
  5600. struct ieee80211_conf *conf = NULL;
  5601. u16 cmd_len;
  5602. enum ieee80211_band band;
  5603. u8 direct_mask;
  5604. conf = ieee80211_get_hw_conf(priv->hw);
  5605. mutex_lock(&priv->mutex);
  5606. if (!iwl4965_is_ready(priv)) {
  5607. IWL_WARNING("request scan called when driver not ready.\n");
  5608. goto done;
  5609. }
  5610. /* Make sure the scan wasn't cancelled before this queued work
  5611. * was given the chance to run... */
  5612. if (!test_bit(STATUS_SCANNING, &priv->status))
  5613. goto done;
  5614. /* This should never be called or scheduled if there is currently
  5615. * a scan active in the hardware. */
  5616. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5617. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5618. "Ignoring second request.\n");
  5619. rc = -EIO;
  5620. goto done;
  5621. }
  5622. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5623. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5624. goto done;
  5625. }
  5626. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5627. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5628. goto done;
  5629. }
  5630. if (iwl4965_is_rfkill(priv)) {
  5631. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5632. goto done;
  5633. }
  5634. if (!test_bit(STATUS_READY, &priv->status)) {
  5635. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5636. goto done;
  5637. }
  5638. if (!priv->scan_bands) {
  5639. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5640. goto done;
  5641. }
  5642. if (!priv->scan) {
  5643. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5644. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5645. if (!priv->scan) {
  5646. rc = -ENOMEM;
  5647. goto done;
  5648. }
  5649. }
  5650. scan = priv->scan;
  5651. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5652. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5653. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5654. if (iwl4965_is_associated(priv)) {
  5655. u16 interval = 0;
  5656. u32 extra;
  5657. u32 suspend_time = 100;
  5658. u32 scan_suspend_time = 100;
  5659. unsigned long flags;
  5660. IWL_DEBUG_INFO("Scanning while associated...\n");
  5661. spin_lock_irqsave(&priv->lock, flags);
  5662. interval = priv->beacon_int;
  5663. spin_unlock_irqrestore(&priv->lock, flags);
  5664. scan->suspend_time = 0;
  5665. scan->max_out_time = cpu_to_le32(200 * 1024);
  5666. if (!interval)
  5667. interval = suspend_time;
  5668. extra = (suspend_time / interval) << 22;
  5669. scan_suspend_time = (extra |
  5670. ((suspend_time % interval) * 1024));
  5671. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5672. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5673. scan_suspend_time, interval);
  5674. }
  5675. /* We should add the ability for user to lock to PASSIVE ONLY */
  5676. if (priv->one_direct_scan) {
  5677. IWL_DEBUG_SCAN
  5678. ("Kicking off one direct scan for '%s'\n",
  5679. iwl4965_escape_essid(priv->direct_ssid,
  5680. priv->direct_ssid_len));
  5681. scan->direct_scan[0].id = WLAN_EID_SSID;
  5682. scan->direct_scan[0].len = priv->direct_ssid_len;
  5683. memcpy(scan->direct_scan[0].ssid,
  5684. priv->direct_ssid, priv->direct_ssid_len);
  5685. direct_mask = 1;
  5686. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5687. scan->direct_scan[0].id = WLAN_EID_SSID;
  5688. scan->direct_scan[0].len = priv->essid_len;
  5689. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5690. direct_mask = 1;
  5691. } else
  5692. direct_mask = 0;
  5693. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5694. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5695. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5696. switch (priv->scan_bands) {
  5697. case 2:
  5698. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5699. scan->tx_cmd.rate_n_flags =
  5700. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5701. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5702. scan->good_CRC_th = 0;
  5703. band = IEEE80211_BAND_2GHZ;
  5704. break;
  5705. case 1:
  5706. scan->tx_cmd.rate_n_flags =
  5707. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5708. RATE_MCS_ANT_B_MSK);
  5709. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5710. band = IEEE80211_BAND_5GHZ;
  5711. break;
  5712. default:
  5713. IWL_WARNING("Invalid scan band count\n");
  5714. goto done;
  5715. }
  5716. /* We don't build a direct scan probe request; the uCode will do
  5717. * that based on the direct_mask added to each channel entry */
  5718. cmd_len = iwl4965_fill_probe_req(priv, band,
  5719. (struct ieee80211_mgmt *)scan->data,
  5720. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  5721. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  5722. /* select Rx chains */
  5723. /* Force use of chains B and C (0x6) for scan Rx.
  5724. * Avoid A (0x1) because of its off-channel reception on A-band.
  5725. * MIMO is not used here, but value is required to make uCode happy. */
  5726. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5727. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5728. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5729. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5730. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5731. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5732. if (direct_mask)
  5733. IWL_DEBUG_SCAN
  5734. ("Initiating direct scan for %s.\n",
  5735. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5736. else
  5737. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5738. scan->channel_count =
  5739. iwl4965_get_channels_for_scan(
  5740. priv, band, 1, /* active */
  5741. direct_mask,
  5742. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5743. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5744. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5745. cmd.data = scan;
  5746. scan->len = cpu_to_le16(cmd.len);
  5747. set_bit(STATUS_SCAN_HW, &priv->status);
  5748. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5749. if (rc)
  5750. goto done;
  5751. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5752. IWL_SCAN_CHECK_WATCHDOG);
  5753. mutex_unlock(&priv->mutex);
  5754. return;
  5755. done:
  5756. /* inform mac80211 scan aborted */
  5757. queue_work(priv->workqueue, &priv->scan_completed);
  5758. mutex_unlock(&priv->mutex);
  5759. }
  5760. static void iwl4965_bg_up(struct work_struct *data)
  5761. {
  5762. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  5763. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5764. return;
  5765. mutex_lock(&priv->mutex);
  5766. __iwl4965_up(priv);
  5767. mutex_unlock(&priv->mutex);
  5768. }
  5769. static void iwl4965_bg_restart(struct work_struct *data)
  5770. {
  5771. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  5772. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5773. return;
  5774. iwl4965_down(priv);
  5775. queue_work(priv->workqueue, &priv->up);
  5776. }
  5777. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5778. {
  5779. struct iwl4965_priv *priv =
  5780. container_of(data, struct iwl4965_priv, rx_replenish);
  5781. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5782. return;
  5783. mutex_lock(&priv->mutex);
  5784. iwl4965_rx_replenish(priv);
  5785. mutex_unlock(&priv->mutex);
  5786. }
  5787. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5788. static void iwl4965_bg_post_associate(struct work_struct *data)
  5789. {
  5790. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  5791. post_associate.work);
  5792. int rc = 0;
  5793. struct ieee80211_conf *conf = NULL;
  5794. DECLARE_MAC_BUF(mac);
  5795. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5796. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5797. return;
  5798. }
  5799. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5800. priv->assoc_id,
  5801. print_mac(mac, priv->active_rxon.bssid_addr));
  5802. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5803. return;
  5804. mutex_lock(&priv->mutex);
  5805. if (!priv->vif || !priv->is_open) {
  5806. mutex_unlock(&priv->mutex);
  5807. return;
  5808. }
  5809. iwl4965_scan_cancel_timeout(priv, 200);
  5810. conf = ieee80211_get_hw_conf(priv->hw);
  5811. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5812. iwl4965_commit_rxon(priv);
  5813. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5814. iwl4965_setup_rxon_timing(priv);
  5815. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5816. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5817. if (rc)
  5818. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5819. "Attempting to continue.\n");
  5820. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5821. #ifdef CONFIG_IWL4965_HT
  5822. if (priv->current_ht_config.is_ht)
  5823. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5824. #endif /* CONFIG_IWL4965_HT*/
  5825. iwl4965_set_rxon_chain(priv);
  5826. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5827. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5828. priv->assoc_id, priv->beacon_int);
  5829. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5830. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5831. else
  5832. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5833. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5834. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5835. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5836. else
  5837. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5838. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5839. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5840. }
  5841. iwl4965_commit_rxon(priv);
  5842. switch (priv->iw_mode) {
  5843. case IEEE80211_IF_TYPE_STA:
  5844. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5845. break;
  5846. case IEEE80211_IF_TYPE_IBSS:
  5847. /* clear out the station table */
  5848. iwl4965_clear_stations_table(priv);
  5849. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5850. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5851. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5852. iwl4965_send_beacon_cmd(priv);
  5853. break;
  5854. default:
  5855. IWL_ERROR("%s Should not be called in %d mode\n",
  5856. __FUNCTION__, priv->iw_mode);
  5857. break;
  5858. }
  5859. iwl4965_sequence_reset(priv);
  5860. #ifdef CONFIG_IWL4965_SENSITIVITY
  5861. /* Enable Rx differential gain and sensitivity calibrations */
  5862. iwl4965_chain_noise_reset(priv);
  5863. priv->start_calib = 1;
  5864. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5865. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5866. priv->assoc_station_added = 1;
  5867. iwl4965_activate_qos(priv, 0);
  5868. /* we have just associated, don't start scan too early */
  5869. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5870. mutex_unlock(&priv->mutex);
  5871. }
  5872. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5873. {
  5874. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  5875. if (!iwl4965_is_ready(priv))
  5876. return;
  5877. mutex_lock(&priv->mutex);
  5878. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5879. iwl4965_send_scan_abort(priv);
  5880. mutex_unlock(&priv->mutex);
  5881. }
  5882. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5883. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5884. {
  5885. struct iwl4965_priv *priv =
  5886. container_of(work, struct iwl4965_priv, scan_completed);
  5887. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5888. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5889. return;
  5890. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5891. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5892. ieee80211_scan_completed(priv->hw);
  5893. /* Since setting the TXPOWER may have been deferred while
  5894. * performing the scan, fire one off */
  5895. mutex_lock(&priv->mutex);
  5896. iwl4965_hw_reg_send_txpower(priv);
  5897. mutex_unlock(&priv->mutex);
  5898. }
  5899. /*****************************************************************************
  5900. *
  5901. * mac80211 entry point functions
  5902. *
  5903. *****************************************************************************/
  5904. #define UCODE_READY_TIMEOUT (2 * HZ)
  5905. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5906. {
  5907. struct iwl4965_priv *priv = hw->priv;
  5908. int ret;
  5909. IWL_DEBUG_MAC80211("enter\n");
  5910. if (pci_enable_device(priv->pci_dev)) {
  5911. IWL_ERROR("Fail to pci_enable_device\n");
  5912. return -ENODEV;
  5913. }
  5914. pci_restore_state(priv->pci_dev);
  5915. pci_enable_msi(priv->pci_dev);
  5916. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5917. DRV_NAME, priv);
  5918. if (ret) {
  5919. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5920. goto out_disable_msi;
  5921. }
  5922. /* we should be verifying the device is ready to be opened */
  5923. mutex_lock(&priv->mutex);
  5924. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5925. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5926. * ucode filename and max sizes are card-specific. */
  5927. if (!priv->ucode_code.len) {
  5928. ret = iwl4965_read_ucode(priv);
  5929. if (ret) {
  5930. IWL_ERROR("Could not read microcode: %d\n", ret);
  5931. mutex_unlock(&priv->mutex);
  5932. goto out_release_irq;
  5933. }
  5934. }
  5935. ret = __iwl4965_up(priv);
  5936. mutex_unlock(&priv->mutex);
  5937. if (ret)
  5938. goto out_release_irq;
  5939. IWL_DEBUG_INFO("Start UP work done.\n");
  5940. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5941. return 0;
  5942. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5943. * mac80211 will not be run successfully. */
  5944. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5945. test_bit(STATUS_READY, &priv->status),
  5946. UCODE_READY_TIMEOUT);
  5947. if (!ret) {
  5948. if (!test_bit(STATUS_READY, &priv->status)) {
  5949. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5950. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5951. ret = -ETIMEDOUT;
  5952. goto out_release_irq;
  5953. }
  5954. }
  5955. priv->is_open = 1;
  5956. IWL_DEBUG_MAC80211("leave\n");
  5957. return 0;
  5958. out_release_irq:
  5959. free_irq(priv->pci_dev->irq, priv);
  5960. out_disable_msi:
  5961. pci_disable_msi(priv->pci_dev);
  5962. pci_disable_device(priv->pci_dev);
  5963. priv->is_open = 0;
  5964. IWL_DEBUG_MAC80211("leave - failed\n");
  5965. return ret;
  5966. }
  5967. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5968. {
  5969. struct iwl4965_priv *priv = hw->priv;
  5970. IWL_DEBUG_MAC80211("enter\n");
  5971. if (!priv->is_open) {
  5972. IWL_DEBUG_MAC80211("leave - skip\n");
  5973. return;
  5974. }
  5975. priv->is_open = 0;
  5976. if (iwl4965_is_ready_rf(priv)) {
  5977. /* stop mac, cancel any scan request and clear
  5978. * RXON_FILTER_ASSOC_MSK BIT
  5979. */
  5980. mutex_lock(&priv->mutex);
  5981. iwl4965_scan_cancel_timeout(priv, 100);
  5982. cancel_delayed_work(&priv->post_associate);
  5983. mutex_unlock(&priv->mutex);
  5984. }
  5985. iwl4965_down(priv);
  5986. flush_workqueue(priv->workqueue);
  5987. free_irq(priv->pci_dev->irq, priv);
  5988. pci_disable_msi(priv->pci_dev);
  5989. pci_save_state(priv->pci_dev);
  5990. pci_disable_device(priv->pci_dev);
  5991. IWL_DEBUG_MAC80211("leave\n");
  5992. }
  5993. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5994. struct ieee80211_tx_control *ctl)
  5995. {
  5996. struct iwl4965_priv *priv = hw->priv;
  5997. IWL_DEBUG_MAC80211("enter\n");
  5998. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5999. IWL_DEBUG_MAC80211("leave - monitor\n");
  6000. return -1;
  6001. }
  6002. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6003. ctl->tx_rate->bitrate);
  6004. if (iwl4965_tx_skb(priv, skb, ctl))
  6005. dev_kfree_skb_any(skb);
  6006. IWL_DEBUG_MAC80211("leave\n");
  6007. return 0;
  6008. }
  6009. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  6010. struct ieee80211_if_init_conf *conf)
  6011. {
  6012. struct iwl4965_priv *priv = hw->priv;
  6013. unsigned long flags;
  6014. DECLARE_MAC_BUF(mac);
  6015. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  6016. if (priv->vif) {
  6017. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  6018. return -EOPNOTSUPP;
  6019. }
  6020. spin_lock_irqsave(&priv->lock, flags);
  6021. priv->vif = conf->vif;
  6022. spin_unlock_irqrestore(&priv->lock, flags);
  6023. mutex_lock(&priv->mutex);
  6024. if (conf->mac_addr) {
  6025. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6026. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6027. }
  6028. if (iwl4965_is_ready(priv))
  6029. iwl4965_set_mode(priv, conf->type);
  6030. mutex_unlock(&priv->mutex);
  6031. IWL_DEBUG_MAC80211("leave\n");
  6032. return 0;
  6033. }
  6034. /**
  6035. * iwl4965_mac_config - mac80211 config callback
  6036. *
  6037. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6038. * be set inappropriately and the driver currently sets the hardware up to
  6039. * use it whenever needed.
  6040. */
  6041. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6042. {
  6043. struct iwl4965_priv *priv = hw->priv;
  6044. const struct iwl4965_channel_info *ch_info;
  6045. unsigned long flags;
  6046. int ret = 0;
  6047. mutex_lock(&priv->mutex);
  6048. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  6049. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  6050. if (!iwl4965_is_ready(priv)) {
  6051. IWL_DEBUG_MAC80211("leave - not ready\n");
  6052. ret = -EIO;
  6053. goto out;
  6054. }
  6055. if (unlikely(!iwl4965_param_disable_hw_scan &&
  6056. test_bit(STATUS_SCANNING, &priv->status))) {
  6057. IWL_DEBUG_MAC80211("leave - scanning\n");
  6058. set_bit(STATUS_CONF_PENDING, &priv->status);
  6059. mutex_unlock(&priv->mutex);
  6060. return 0;
  6061. }
  6062. spin_lock_irqsave(&priv->lock, flags);
  6063. ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
  6064. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6065. if (!is_channel_valid(ch_info)) {
  6066. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6067. spin_unlock_irqrestore(&priv->lock, flags);
  6068. ret = -EINVAL;
  6069. goto out;
  6070. }
  6071. #ifdef CONFIG_IWL4965_HT
  6072. /* if we are switching from ht to 2.4 clear flags
  6073. * from any ht related info since 2.4 does not
  6074. * support ht */
  6075. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  6076. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6077. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6078. #endif
  6079. )
  6080. priv->staging_rxon.flags = 0;
  6081. #endif /* CONFIG_IWL4965_HT */
  6082. iwl4965_set_rxon_channel(priv, conf->channel->band,
  6083. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6084. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  6085. /* The list of supported rates and rate mask can be different
  6086. * for each band; since the band may have changed, reset
  6087. * the rate mask to what mac80211 lists */
  6088. iwl4965_set_rate(priv);
  6089. spin_unlock_irqrestore(&priv->lock, flags);
  6090. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6091. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6092. iwl4965_hw_channel_switch(priv, conf->channel);
  6093. goto out;
  6094. }
  6095. #endif
  6096. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6097. if (!conf->radio_enabled) {
  6098. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6099. goto out;
  6100. }
  6101. if (iwl4965_is_rfkill(priv)) {
  6102. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6103. ret = -EIO;
  6104. goto out;
  6105. }
  6106. iwl4965_set_rate(priv);
  6107. if (memcmp(&priv->active_rxon,
  6108. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6109. iwl4965_commit_rxon(priv);
  6110. else
  6111. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6112. IWL_DEBUG_MAC80211("leave\n");
  6113. out:
  6114. clear_bit(STATUS_CONF_PENDING, &priv->status);
  6115. mutex_unlock(&priv->mutex);
  6116. return ret;
  6117. }
  6118. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6119. {
  6120. int rc = 0;
  6121. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6122. return;
  6123. /* The following should be done only at AP bring up */
  6124. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6125. /* RXON - unassoc (to set timing command) */
  6126. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6127. iwl4965_commit_rxon(priv);
  6128. /* RXON Timing */
  6129. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6130. iwl4965_setup_rxon_timing(priv);
  6131. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6132. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6133. if (rc)
  6134. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6135. "Attempting to continue.\n");
  6136. iwl4965_set_rxon_chain(priv);
  6137. /* FIXME: what should be the assoc_id for AP? */
  6138. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6139. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6140. priv->staging_rxon.flags |=
  6141. RXON_FLG_SHORT_PREAMBLE_MSK;
  6142. else
  6143. priv->staging_rxon.flags &=
  6144. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6145. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6146. if (priv->assoc_capability &
  6147. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6148. priv->staging_rxon.flags |=
  6149. RXON_FLG_SHORT_SLOT_MSK;
  6150. else
  6151. priv->staging_rxon.flags &=
  6152. ~RXON_FLG_SHORT_SLOT_MSK;
  6153. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6154. priv->staging_rxon.flags &=
  6155. ~RXON_FLG_SHORT_SLOT_MSK;
  6156. }
  6157. /* restore RXON assoc */
  6158. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6159. iwl4965_commit_rxon(priv);
  6160. iwl4965_activate_qos(priv, 1);
  6161. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6162. }
  6163. iwl4965_send_beacon_cmd(priv);
  6164. /* FIXME - we need to add code here to detect a totally new
  6165. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6166. * clear sta table, add BCAST sta... */
  6167. }
  6168. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  6169. struct ieee80211_vif *vif,
  6170. struct ieee80211_if_conf *conf)
  6171. {
  6172. struct iwl4965_priv *priv = hw->priv;
  6173. DECLARE_MAC_BUF(mac);
  6174. unsigned long flags;
  6175. int rc;
  6176. if (conf == NULL)
  6177. return -EIO;
  6178. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6179. (!conf->beacon || !conf->ssid_len)) {
  6180. IWL_DEBUG_MAC80211
  6181. ("Leaving in AP mode because HostAPD is not ready.\n");
  6182. return 0;
  6183. }
  6184. if (!iwl4965_is_alive(priv))
  6185. return -EAGAIN;
  6186. mutex_lock(&priv->mutex);
  6187. if (conf->bssid)
  6188. IWL_DEBUG_MAC80211("bssid: %s\n",
  6189. print_mac(mac, conf->bssid));
  6190. /*
  6191. * very dubious code was here; the probe filtering flag is never set:
  6192. *
  6193. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6194. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6195. */
  6196. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6197. IWL_DEBUG_MAC80211("leave - scanning\n");
  6198. mutex_unlock(&priv->mutex);
  6199. return 0;
  6200. }
  6201. if (priv->vif != vif) {
  6202. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  6203. mutex_unlock(&priv->mutex);
  6204. return 0;
  6205. }
  6206. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6207. if (!conf->bssid) {
  6208. conf->bssid = priv->mac_addr;
  6209. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6210. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6211. print_mac(mac, conf->bssid));
  6212. }
  6213. if (priv->ibss_beacon)
  6214. dev_kfree_skb(priv->ibss_beacon);
  6215. priv->ibss_beacon = conf->beacon;
  6216. }
  6217. if (iwl4965_is_rfkill(priv))
  6218. goto done;
  6219. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6220. !is_multicast_ether_addr(conf->bssid)) {
  6221. /* If there is currently a HW scan going on in the background
  6222. * then we need to cancel it else the RXON below will fail. */
  6223. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6224. IWL_WARNING("Aborted scan still in progress "
  6225. "after 100ms\n");
  6226. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6227. mutex_unlock(&priv->mutex);
  6228. return -EAGAIN;
  6229. }
  6230. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6231. /* TODO: Audit driver for usage of these members and see
  6232. * if mac80211 deprecates them (priv->bssid looks like it
  6233. * shouldn't be there, but I haven't scanned the IBSS code
  6234. * to verify) - jpk */
  6235. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6236. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6237. iwl4965_config_ap(priv);
  6238. else {
  6239. rc = iwl4965_commit_rxon(priv);
  6240. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6241. iwl4965_rxon_add_station(
  6242. priv, priv->active_rxon.bssid_addr, 1);
  6243. }
  6244. } else {
  6245. iwl4965_scan_cancel_timeout(priv, 100);
  6246. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6247. iwl4965_commit_rxon(priv);
  6248. }
  6249. done:
  6250. spin_lock_irqsave(&priv->lock, flags);
  6251. if (!conf->ssid_len)
  6252. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6253. else
  6254. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6255. priv->essid_len = conf->ssid_len;
  6256. spin_unlock_irqrestore(&priv->lock, flags);
  6257. IWL_DEBUG_MAC80211("leave\n");
  6258. mutex_unlock(&priv->mutex);
  6259. return 0;
  6260. }
  6261. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6262. unsigned int changed_flags,
  6263. unsigned int *total_flags,
  6264. int mc_count, struct dev_addr_list *mc_list)
  6265. {
  6266. /*
  6267. * XXX: dummy
  6268. * see also iwl4965_connection_init_rx_config
  6269. */
  6270. *total_flags = 0;
  6271. }
  6272. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6273. struct ieee80211_if_init_conf *conf)
  6274. {
  6275. struct iwl4965_priv *priv = hw->priv;
  6276. IWL_DEBUG_MAC80211("enter\n");
  6277. mutex_lock(&priv->mutex);
  6278. if (iwl4965_is_ready_rf(priv)) {
  6279. iwl4965_scan_cancel_timeout(priv, 100);
  6280. cancel_delayed_work(&priv->post_associate);
  6281. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6282. iwl4965_commit_rxon(priv);
  6283. }
  6284. if (priv->vif == conf->vif) {
  6285. priv->vif = NULL;
  6286. memset(priv->bssid, 0, ETH_ALEN);
  6287. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6288. priv->essid_len = 0;
  6289. }
  6290. mutex_unlock(&priv->mutex);
  6291. IWL_DEBUG_MAC80211("leave\n");
  6292. }
  6293. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  6294. struct ieee80211_vif *vif,
  6295. struct ieee80211_bss_conf *bss_conf,
  6296. u32 changes)
  6297. {
  6298. struct iwl4965_priv *priv = hw->priv;
  6299. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  6300. if (bss_conf->use_short_preamble)
  6301. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6302. else
  6303. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6304. }
  6305. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  6306. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  6307. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6308. else
  6309. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6310. }
  6311. if (changes & BSS_CHANGED_ASSOC) {
  6312. /*
  6313. * TODO:
  6314. * do stuff instead of sniffing assoc resp
  6315. */
  6316. }
  6317. if (iwl4965_is_associated(priv))
  6318. iwl4965_send_rxon_assoc(priv);
  6319. }
  6320. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6321. {
  6322. int rc = 0;
  6323. unsigned long flags;
  6324. struct iwl4965_priv *priv = hw->priv;
  6325. IWL_DEBUG_MAC80211("enter\n");
  6326. mutex_lock(&priv->mutex);
  6327. spin_lock_irqsave(&priv->lock, flags);
  6328. if (!iwl4965_is_ready_rf(priv)) {
  6329. rc = -EIO;
  6330. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6331. goto out_unlock;
  6332. }
  6333. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6334. rc = -EIO;
  6335. IWL_ERROR("ERROR: APs don't scan\n");
  6336. goto out_unlock;
  6337. }
  6338. /* we don't schedule scan within next_scan_jiffies period */
  6339. if (priv->next_scan_jiffies &&
  6340. time_after(priv->next_scan_jiffies, jiffies)) {
  6341. rc = -EAGAIN;
  6342. goto out_unlock;
  6343. }
  6344. /* if we just finished scan ask for delay */
  6345. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6346. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6347. rc = -EAGAIN;
  6348. goto out_unlock;
  6349. }
  6350. if (len) {
  6351. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6352. iwl4965_escape_essid(ssid, len), (int)len);
  6353. priv->one_direct_scan = 1;
  6354. priv->direct_ssid_len = (u8)
  6355. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6356. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6357. } else
  6358. priv->one_direct_scan = 0;
  6359. rc = iwl4965_scan_initiate(priv);
  6360. IWL_DEBUG_MAC80211("leave\n");
  6361. out_unlock:
  6362. spin_unlock_irqrestore(&priv->lock, flags);
  6363. mutex_unlock(&priv->mutex);
  6364. return rc;
  6365. }
  6366. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6367. const u8 *local_addr, const u8 *addr,
  6368. struct ieee80211_key_conf *key)
  6369. {
  6370. struct iwl4965_priv *priv = hw->priv;
  6371. DECLARE_MAC_BUF(mac);
  6372. int rc = 0;
  6373. u8 sta_id;
  6374. IWL_DEBUG_MAC80211("enter\n");
  6375. if (!iwl4965_param_hwcrypto) {
  6376. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6377. return -EOPNOTSUPP;
  6378. }
  6379. if (is_zero_ether_addr(addr))
  6380. /* only support pairwise keys */
  6381. return -EOPNOTSUPP;
  6382. sta_id = iwl4965_hw_find_station(priv, addr);
  6383. if (sta_id == IWL_INVALID_STATION) {
  6384. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6385. print_mac(mac, addr));
  6386. return -EINVAL;
  6387. }
  6388. mutex_lock(&priv->mutex);
  6389. iwl4965_scan_cancel_timeout(priv, 100);
  6390. switch (cmd) {
  6391. case SET_KEY:
  6392. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6393. if (!rc) {
  6394. iwl4965_set_rxon_hwcrypto(priv, 1);
  6395. iwl4965_commit_rxon(priv);
  6396. key->hw_key_idx = sta_id;
  6397. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6398. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6399. }
  6400. break;
  6401. case DISABLE_KEY:
  6402. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6403. if (!rc) {
  6404. iwl4965_set_rxon_hwcrypto(priv, 0);
  6405. iwl4965_commit_rxon(priv);
  6406. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6407. }
  6408. break;
  6409. default:
  6410. rc = -EINVAL;
  6411. }
  6412. IWL_DEBUG_MAC80211("leave\n");
  6413. mutex_unlock(&priv->mutex);
  6414. return rc;
  6415. }
  6416. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6417. const struct ieee80211_tx_queue_params *params)
  6418. {
  6419. struct iwl4965_priv *priv = hw->priv;
  6420. unsigned long flags;
  6421. int q;
  6422. IWL_DEBUG_MAC80211("enter\n");
  6423. if (!iwl4965_is_ready_rf(priv)) {
  6424. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6425. return -EIO;
  6426. }
  6427. if (queue >= AC_NUM) {
  6428. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6429. return 0;
  6430. }
  6431. if (!priv->qos_data.qos_enable) {
  6432. priv->qos_data.qos_active = 0;
  6433. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6434. return 0;
  6435. }
  6436. q = AC_NUM - 1 - queue;
  6437. spin_lock_irqsave(&priv->lock, flags);
  6438. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6439. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6440. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6441. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6442. cpu_to_le16((params->txop * 32));
  6443. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6444. priv->qos_data.qos_active = 1;
  6445. spin_unlock_irqrestore(&priv->lock, flags);
  6446. mutex_lock(&priv->mutex);
  6447. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6448. iwl4965_activate_qos(priv, 1);
  6449. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6450. iwl4965_activate_qos(priv, 0);
  6451. mutex_unlock(&priv->mutex);
  6452. IWL_DEBUG_MAC80211("leave\n");
  6453. return 0;
  6454. }
  6455. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6456. struct ieee80211_tx_queue_stats *stats)
  6457. {
  6458. struct iwl4965_priv *priv = hw->priv;
  6459. int i, avail;
  6460. struct iwl4965_tx_queue *txq;
  6461. struct iwl4965_queue *q;
  6462. unsigned long flags;
  6463. IWL_DEBUG_MAC80211("enter\n");
  6464. if (!iwl4965_is_ready_rf(priv)) {
  6465. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6466. return -EIO;
  6467. }
  6468. spin_lock_irqsave(&priv->lock, flags);
  6469. for (i = 0; i < AC_NUM; i++) {
  6470. txq = &priv->txq[i];
  6471. q = &txq->q;
  6472. avail = iwl4965_queue_space(q);
  6473. stats->data[i].len = q->n_window - avail;
  6474. stats->data[i].limit = q->n_window - q->high_mark;
  6475. stats->data[i].count = q->n_window;
  6476. }
  6477. spin_unlock_irqrestore(&priv->lock, flags);
  6478. IWL_DEBUG_MAC80211("leave\n");
  6479. return 0;
  6480. }
  6481. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6482. struct ieee80211_low_level_stats *stats)
  6483. {
  6484. IWL_DEBUG_MAC80211("enter\n");
  6485. IWL_DEBUG_MAC80211("leave\n");
  6486. return 0;
  6487. }
  6488. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6489. {
  6490. IWL_DEBUG_MAC80211("enter\n");
  6491. IWL_DEBUG_MAC80211("leave\n");
  6492. return 0;
  6493. }
  6494. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6495. {
  6496. struct iwl4965_priv *priv = hw->priv;
  6497. unsigned long flags;
  6498. mutex_lock(&priv->mutex);
  6499. IWL_DEBUG_MAC80211("enter\n");
  6500. priv->lq_mngr.lq_ready = 0;
  6501. #ifdef CONFIG_IWL4965_HT
  6502. spin_lock_irqsave(&priv->lock, flags);
  6503. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6504. spin_unlock_irqrestore(&priv->lock, flags);
  6505. #endif /* CONFIG_IWL4965_HT */
  6506. iwl4965_reset_qos(priv);
  6507. cancel_delayed_work(&priv->post_associate);
  6508. spin_lock_irqsave(&priv->lock, flags);
  6509. priv->assoc_id = 0;
  6510. priv->assoc_capability = 0;
  6511. priv->call_post_assoc_from_beacon = 0;
  6512. priv->assoc_station_added = 0;
  6513. /* new association get rid of ibss beacon skb */
  6514. if (priv->ibss_beacon)
  6515. dev_kfree_skb(priv->ibss_beacon);
  6516. priv->ibss_beacon = NULL;
  6517. priv->beacon_int = priv->hw->conf.beacon_int;
  6518. priv->timestamp1 = 0;
  6519. priv->timestamp0 = 0;
  6520. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6521. priv->beacon_int = 0;
  6522. spin_unlock_irqrestore(&priv->lock, flags);
  6523. if (!iwl4965_is_ready_rf(priv)) {
  6524. IWL_DEBUG_MAC80211("leave - not ready\n");
  6525. mutex_unlock(&priv->mutex);
  6526. return;
  6527. }
  6528. /* we are restarting association process
  6529. * clear RXON_FILTER_ASSOC_MSK bit
  6530. */
  6531. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6532. iwl4965_scan_cancel_timeout(priv, 100);
  6533. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6534. iwl4965_commit_rxon(priv);
  6535. }
  6536. /* Per mac80211.h: This is only used in IBSS mode... */
  6537. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6538. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6539. mutex_unlock(&priv->mutex);
  6540. return;
  6541. }
  6542. priv->only_active_channel = 0;
  6543. iwl4965_set_rate(priv);
  6544. mutex_unlock(&priv->mutex);
  6545. IWL_DEBUG_MAC80211("leave\n");
  6546. }
  6547. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6548. struct ieee80211_tx_control *control)
  6549. {
  6550. struct iwl4965_priv *priv = hw->priv;
  6551. unsigned long flags;
  6552. mutex_lock(&priv->mutex);
  6553. IWL_DEBUG_MAC80211("enter\n");
  6554. if (!iwl4965_is_ready_rf(priv)) {
  6555. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6556. mutex_unlock(&priv->mutex);
  6557. return -EIO;
  6558. }
  6559. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6560. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6561. mutex_unlock(&priv->mutex);
  6562. return -EIO;
  6563. }
  6564. spin_lock_irqsave(&priv->lock, flags);
  6565. if (priv->ibss_beacon)
  6566. dev_kfree_skb(priv->ibss_beacon);
  6567. priv->ibss_beacon = skb;
  6568. priv->assoc_id = 0;
  6569. IWL_DEBUG_MAC80211("leave\n");
  6570. spin_unlock_irqrestore(&priv->lock, flags);
  6571. iwl4965_reset_qos(priv);
  6572. queue_work(priv->workqueue, &priv->post_associate.work);
  6573. mutex_unlock(&priv->mutex);
  6574. return 0;
  6575. }
  6576. #ifdef CONFIG_IWL4965_HT
  6577. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6578. struct iwl4965_priv *priv)
  6579. {
  6580. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6581. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6582. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6583. IWL_DEBUG_MAC80211("enter: \n");
  6584. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6585. iwl_conf->is_ht = 0;
  6586. return;
  6587. }
  6588. iwl_conf->is_ht = 1;
  6589. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6590. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6591. iwl_conf->sgf |= 0x1;
  6592. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6593. iwl_conf->sgf |= 0x2;
  6594. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6595. iwl_conf->max_amsdu_size =
  6596. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6597. iwl_conf->supported_chan_width =
  6598. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6599. iwl_conf->extension_chan_offset =
  6600. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6601. /* If no above or below channel supplied disable FAT channel */
  6602. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  6603. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  6604. iwl_conf->supported_chan_width = 0;
  6605. iwl_conf->tx_mimo_ps_mode =
  6606. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6607. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6608. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6609. iwl_conf->tx_chan_width =
  6610. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6611. iwl_conf->ht_protection =
  6612. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6613. iwl_conf->non_GF_STA_present =
  6614. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6615. IWL_DEBUG_MAC80211("control channel %d\n",
  6616. iwl_conf->control_channel);
  6617. IWL_DEBUG_MAC80211("leave\n");
  6618. }
  6619. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6620. struct ieee80211_conf *conf)
  6621. {
  6622. struct iwl4965_priv *priv = hw->priv;
  6623. IWL_DEBUG_MAC80211("enter: \n");
  6624. iwl4965_ht_info_fill(conf, priv);
  6625. iwl4965_set_rxon_chain(priv);
  6626. if (priv && priv->assoc_id &&
  6627. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6628. unsigned long flags;
  6629. spin_lock_irqsave(&priv->lock, flags);
  6630. if (priv->beacon_int)
  6631. queue_work(priv->workqueue, &priv->post_associate.work);
  6632. else
  6633. priv->call_post_assoc_from_beacon = 1;
  6634. spin_unlock_irqrestore(&priv->lock, flags);
  6635. }
  6636. IWL_DEBUG_MAC80211("leave:\n");
  6637. return 0;
  6638. }
  6639. #endif /*CONFIG_IWL4965_HT*/
  6640. /*****************************************************************************
  6641. *
  6642. * sysfs attributes
  6643. *
  6644. *****************************************************************************/
  6645. #ifdef CONFIG_IWL4965_DEBUG
  6646. /*
  6647. * The following adds a new attribute to the sysfs representation
  6648. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6649. * used for controlling the debug level.
  6650. *
  6651. * See the level definitions in iwl for details.
  6652. */
  6653. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6654. {
  6655. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6656. }
  6657. static ssize_t store_debug_level(struct device_driver *d,
  6658. const char *buf, size_t count)
  6659. {
  6660. char *p = (char *)buf;
  6661. u32 val;
  6662. val = simple_strtoul(p, &p, 0);
  6663. if (p == buf)
  6664. printk(KERN_INFO DRV_NAME
  6665. ": %s is not in hex or decimal form.\n", buf);
  6666. else
  6667. iwl4965_debug_level = val;
  6668. return strnlen(buf, count);
  6669. }
  6670. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6671. show_debug_level, store_debug_level);
  6672. #endif /* CONFIG_IWL4965_DEBUG */
  6673. static ssize_t show_rf_kill(struct device *d,
  6674. struct device_attribute *attr, char *buf)
  6675. {
  6676. /*
  6677. * 0 - RF kill not enabled
  6678. * 1 - SW based RF kill active (sysfs)
  6679. * 2 - HW based RF kill active
  6680. * 3 - Both HW and SW based RF kill active
  6681. */
  6682. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6683. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6684. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6685. return sprintf(buf, "%i\n", val);
  6686. }
  6687. static ssize_t store_rf_kill(struct device *d,
  6688. struct device_attribute *attr,
  6689. const char *buf, size_t count)
  6690. {
  6691. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6692. mutex_lock(&priv->mutex);
  6693. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6694. mutex_unlock(&priv->mutex);
  6695. return count;
  6696. }
  6697. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6698. static ssize_t show_temperature(struct device *d,
  6699. struct device_attribute *attr, char *buf)
  6700. {
  6701. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6702. if (!iwl4965_is_alive(priv))
  6703. return -EAGAIN;
  6704. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6705. }
  6706. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6707. static ssize_t show_rs_window(struct device *d,
  6708. struct device_attribute *attr,
  6709. char *buf)
  6710. {
  6711. struct iwl4965_priv *priv = d->driver_data;
  6712. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6713. }
  6714. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6715. static ssize_t show_tx_power(struct device *d,
  6716. struct device_attribute *attr, char *buf)
  6717. {
  6718. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6719. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6720. }
  6721. static ssize_t store_tx_power(struct device *d,
  6722. struct device_attribute *attr,
  6723. const char *buf, size_t count)
  6724. {
  6725. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6726. char *p = (char *)buf;
  6727. u32 val;
  6728. val = simple_strtoul(p, &p, 10);
  6729. if (p == buf)
  6730. printk(KERN_INFO DRV_NAME
  6731. ": %s is not in decimal form.\n", buf);
  6732. else
  6733. iwl4965_hw_reg_set_txpower(priv, val);
  6734. return count;
  6735. }
  6736. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6737. static ssize_t show_flags(struct device *d,
  6738. struct device_attribute *attr, char *buf)
  6739. {
  6740. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6741. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6742. }
  6743. static ssize_t store_flags(struct device *d,
  6744. struct device_attribute *attr,
  6745. const char *buf, size_t count)
  6746. {
  6747. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6748. u32 flags = simple_strtoul(buf, NULL, 0);
  6749. mutex_lock(&priv->mutex);
  6750. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6751. /* Cancel any currently running scans... */
  6752. if (iwl4965_scan_cancel_timeout(priv, 100))
  6753. IWL_WARNING("Could not cancel scan.\n");
  6754. else {
  6755. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6756. flags);
  6757. priv->staging_rxon.flags = cpu_to_le32(flags);
  6758. iwl4965_commit_rxon(priv);
  6759. }
  6760. }
  6761. mutex_unlock(&priv->mutex);
  6762. return count;
  6763. }
  6764. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6765. static ssize_t show_filter_flags(struct device *d,
  6766. struct device_attribute *attr, char *buf)
  6767. {
  6768. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6769. return sprintf(buf, "0x%04X\n",
  6770. le32_to_cpu(priv->active_rxon.filter_flags));
  6771. }
  6772. static ssize_t store_filter_flags(struct device *d,
  6773. struct device_attribute *attr,
  6774. const char *buf, size_t count)
  6775. {
  6776. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6777. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6778. mutex_lock(&priv->mutex);
  6779. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6780. /* Cancel any currently running scans... */
  6781. if (iwl4965_scan_cancel_timeout(priv, 100))
  6782. IWL_WARNING("Could not cancel scan.\n");
  6783. else {
  6784. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6785. "0x%04X\n", filter_flags);
  6786. priv->staging_rxon.filter_flags =
  6787. cpu_to_le32(filter_flags);
  6788. iwl4965_commit_rxon(priv);
  6789. }
  6790. }
  6791. mutex_unlock(&priv->mutex);
  6792. return count;
  6793. }
  6794. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6795. store_filter_flags);
  6796. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6797. static ssize_t show_measurement(struct device *d,
  6798. struct device_attribute *attr, char *buf)
  6799. {
  6800. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6801. struct iwl4965_spectrum_notification measure_report;
  6802. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6803. u8 *data = (u8 *) & measure_report;
  6804. unsigned long flags;
  6805. spin_lock_irqsave(&priv->lock, flags);
  6806. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6807. spin_unlock_irqrestore(&priv->lock, flags);
  6808. return 0;
  6809. }
  6810. memcpy(&measure_report, &priv->measure_report, size);
  6811. priv->measurement_status = 0;
  6812. spin_unlock_irqrestore(&priv->lock, flags);
  6813. while (size && (PAGE_SIZE - len)) {
  6814. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6815. PAGE_SIZE - len, 1);
  6816. len = strlen(buf);
  6817. if (PAGE_SIZE - len)
  6818. buf[len++] = '\n';
  6819. ofs += 16;
  6820. size -= min(size, 16U);
  6821. }
  6822. return len;
  6823. }
  6824. static ssize_t store_measurement(struct device *d,
  6825. struct device_attribute *attr,
  6826. const char *buf, size_t count)
  6827. {
  6828. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6829. struct ieee80211_measurement_params params = {
  6830. .channel = le16_to_cpu(priv->active_rxon.channel),
  6831. .start_time = cpu_to_le64(priv->last_tsf),
  6832. .duration = cpu_to_le16(1),
  6833. };
  6834. u8 type = IWL_MEASURE_BASIC;
  6835. u8 buffer[32];
  6836. u8 channel;
  6837. if (count) {
  6838. char *p = buffer;
  6839. strncpy(buffer, buf, min(sizeof(buffer), count));
  6840. channel = simple_strtoul(p, NULL, 0);
  6841. if (channel)
  6842. params.channel = channel;
  6843. p = buffer;
  6844. while (*p && *p != ' ')
  6845. p++;
  6846. if (*p)
  6847. type = simple_strtoul(p + 1, NULL, 0);
  6848. }
  6849. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6850. "channel %d (for '%s')\n", type, params.channel, buf);
  6851. iwl4965_get_measurement(priv, &params, type);
  6852. return count;
  6853. }
  6854. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6855. show_measurement, store_measurement);
  6856. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6857. static ssize_t store_retry_rate(struct device *d,
  6858. struct device_attribute *attr,
  6859. const char *buf, size_t count)
  6860. {
  6861. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6862. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6863. if (priv->retry_rate <= 0)
  6864. priv->retry_rate = 1;
  6865. return count;
  6866. }
  6867. static ssize_t show_retry_rate(struct device *d,
  6868. struct device_attribute *attr, char *buf)
  6869. {
  6870. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6871. return sprintf(buf, "%d", priv->retry_rate);
  6872. }
  6873. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6874. store_retry_rate);
  6875. static ssize_t store_power_level(struct device *d,
  6876. struct device_attribute *attr,
  6877. const char *buf, size_t count)
  6878. {
  6879. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6880. int rc;
  6881. int mode;
  6882. mode = simple_strtoul(buf, NULL, 0);
  6883. mutex_lock(&priv->mutex);
  6884. if (!iwl4965_is_ready(priv)) {
  6885. rc = -EAGAIN;
  6886. goto out;
  6887. }
  6888. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6889. mode = IWL_POWER_AC;
  6890. else
  6891. mode |= IWL_POWER_ENABLED;
  6892. if (mode != priv->power_mode) {
  6893. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6894. if (rc) {
  6895. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6896. goto out;
  6897. }
  6898. priv->power_mode = mode;
  6899. }
  6900. rc = count;
  6901. out:
  6902. mutex_unlock(&priv->mutex);
  6903. return rc;
  6904. }
  6905. #define MAX_WX_STRING 80
  6906. /* Values are in microsecond */
  6907. static const s32 timeout_duration[] = {
  6908. 350000,
  6909. 250000,
  6910. 75000,
  6911. 37000,
  6912. 25000,
  6913. };
  6914. static const s32 period_duration[] = {
  6915. 400000,
  6916. 700000,
  6917. 1000000,
  6918. 1000000,
  6919. 1000000
  6920. };
  6921. static ssize_t show_power_level(struct device *d,
  6922. struct device_attribute *attr, char *buf)
  6923. {
  6924. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6925. int level = IWL_POWER_LEVEL(priv->power_mode);
  6926. char *p = buf;
  6927. p += sprintf(p, "%d ", level);
  6928. switch (level) {
  6929. case IWL_POWER_MODE_CAM:
  6930. case IWL_POWER_AC:
  6931. p += sprintf(p, "(AC)");
  6932. break;
  6933. case IWL_POWER_BATTERY:
  6934. p += sprintf(p, "(BATTERY)");
  6935. break;
  6936. default:
  6937. p += sprintf(p,
  6938. "(Timeout %dms, Period %dms)",
  6939. timeout_duration[level - 1] / 1000,
  6940. period_duration[level - 1] / 1000);
  6941. }
  6942. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6943. p += sprintf(p, " OFF\n");
  6944. else
  6945. p += sprintf(p, " \n");
  6946. return (p - buf + 1);
  6947. }
  6948. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6949. store_power_level);
  6950. static ssize_t show_channels(struct device *d,
  6951. struct device_attribute *attr, char *buf)
  6952. {
  6953. /* all this shit doesn't belong into sysfs anyway */
  6954. return 0;
  6955. }
  6956. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6957. static ssize_t show_statistics(struct device *d,
  6958. struct device_attribute *attr, char *buf)
  6959. {
  6960. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6961. u32 size = sizeof(struct iwl4965_notif_statistics);
  6962. u32 len = 0, ofs = 0;
  6963. u8 *data = (u8 *) & priv->statistics;
  6964. int rc = 0;
  6965. if (!iwl4965_is_alive(priv))
  6966. return -EAGAIN;
  6967. mutex_lock(&priv->mutex);
  6968. rc = iwl4965_send_statistics_request(priv);
  6969. mutex_unlock(&priv->mutex);
  6970. if (rc) {
  6971. len = sprintf(buf,
  6972. "Error sending statistics request: 0x%08X\n", rc);
  6973. return len;
  6974. }
  6975. while (size && (PAGE_SIZE - len)) {
  6976. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6977. PAGE_SIZE - len, 1);
  6978. len = strlen(buf);
  6979. if (PAGE_SIZE - len)
  6980. buf[len++] = '\n';
  6981. ofs += 16;
  6982. size -= min(size, 16U);
  6983. }
  6984. return len;
  6985. }
  6986. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6987. static ssize_t show_antenna(struct device *d,
  6988. struct device_attribute *attr, char *buf)
  6989. {
  6990. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6991. if (!iwl4965_is_alive(priv))
  6992. return -EAGAIN;
  6993. return sprintf(buf, "%d\n", priv->antenna);
  6994. }
  6995. static ssize_t store_antenna(struct device *d,
  6996. struct device_attribute *attr,
  6997. const char *buf, size_t count)
  6998. {
  6999. int ant;
  7000. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7001. if (count == 0)
  7002. return 0;
  7003. if (sscanf(buf, "%1i", &ant) != 1) {
  7004. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7005. return count;
  7006. }
  7007. if ((ant >= 0) && (ant <= 2)) {
  7008. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7009. priv->antenna = (enum iwl4965_antenna)ant;
  7010. } else
  7011. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7012. return count;
  7013. }
  7014. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7015. static ssize_t show_status(struct device *d,
  7016. struct device_attribute *attr, char *buf)
  7017. {
  7018. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7019. if (!iwl4965_is_alive(priv))
  7020. return -EAGAIN;
  7021. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7022. }
  7023. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7024. static ssize_t dump_error_log(struct device *d,
  7025. struct device_attribute *attr,
  7026. const char *buf, size_t count)
  7027. {
  7028. char *p = (char *)buf;
  7029. if (p[0] == '1')
  7030. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  7031. return strnlen(buf, count);
  7032. }
  7033. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7034. static ssize_t dump_event_log(struct device *d,
  7035. struct device_attribute *attr,
  7036. const char *buf, size_t count)
  7037. {
  7038. char *p = (char *)buf;
  7039. if (p[0] == '1')
  7040. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  7041. return strnlen(buf, count);
  7042. }
  7043. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7044. /*****************************************************************************
  7045. *
  7046. * driver setup and teardown
  7047. *
  7048. *****************************************************************************/
  7049. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  7050. {
  7051. priv->workqueue = create_workqueue(DRV_NAME);
  7052. init_waitqueue_head(&priv->wait_command_queue);
  7053. INIT_WORK(&priv->up, iwl4965_bg_up);
  7054. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  7055. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  7056. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  7057. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  7058. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  7059. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  7060. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  7061. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  7062. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  7063. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  7064. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  7065. iwl4965_hw_setup_deferred_work(priv);
  7066. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7067. iwl4965_irq_tasklet, (unsigned long)priv);
  7068. }
  7069. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  7070. {
  7071. iwl4965_hw_cancel_deferred_work(priv);
  7072. cancel_delayed_work_sync(&priv->init_alive_start);
  7073. cancel_delayed_work(&priv->scan_check);
  7074. cancel_delayed_work(&priv->alive_start);
  7075. cancel_delayed_work(&priv->post_associate);
  7076. cancel_work_sync(&priv->beacon_update);
  7077. }
  7078. static struct attribute *iwl4965_sysfs_entries[] = {
  7079. &dev_attr_antenna.attr,
  7080. &dev_attr_channels.attr,
  7081. &dev_attr_dump_errors.attr,
  7082. &dev_attr_dump_events.attr,
  7083. &dev_attr_flags.attr,
  7084. &dev_attr_filter_flags.attr,
  7085. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7086. &dev_attr_measurement.attr,
  7087. #endif
  7088. &dev_attr_power_level.attr,
  7089. &dev_attr_retry_rate.attr,
  7090. &dev_attr_rf_kill.attr,
  7091. &dev_attr_rs_window.attr,
  7092. &dev_attr_statistics.attr,
  7093. &dev_attr_status.attr,
  7094. &dev_attr_temperature.attr,
  7095. &dev_attr_tx_power.attr,
  7096. NULL
  7097. };
  7098. static struct attribute_group iwl4965_attribute_group = {
  7099. .name = NULL, /* put in device directory */
  7100. .attrs = iwl4965_sysfs_entries,
  7101. };
  7102. static struct ieee80211_ops iwl4965_hw_ops = {
  7103. .tx = iwl4965_mac_tx,
  7104. .start = iwl4965_mac_start,
  7105. .stop = iwl4965_mac_stop,
  7106. .add_interface = iwl4965_mac_add_interface,
  7107. .remove_interface = iwl4965_mac_remove_interface,
  7108. .config = iwl4965_mac_config,
  7109. .config_interface = iwl4965_mac_config_interface,
  7110. .configure_filter = iwl4965_configure_filter,
  7111. .set_key = iwl4965_mac_set_key,
  7112. .get_stats = iwl4965_mac_get_stats,
  7113. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7114. .conf_tx = iwl4965_mac_conf_tx,
  7115. .get_tsf = iwl4965_mac_get_tsf,
  7116. .reset_tsf = iwl4965_mac_reset_tsf,
  7117. .beacon_update = iwl4965_mac_beacon_update,
  7118. .bss_info_changed = iwl4965_bss_info_changed,
  7119. #ifdef CONFIG_IWL4965_HT
  7120. .conf_ht = iwl4965_mac_conf_ht,
  7121. .ampdu_action = iwl4965_mac_ampdu_action,
  7122. #endif /* CONFIG_IWL4965_HT */
  7123. .hw_scan = iwl4965_mac_hw_scan
  7124. };
  7125. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7126. {
  7127. int err = 0;
  7128. struct iwl4965_priv *priv;
  7129. struct ieee80211_hw *hw;
  7130. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  7131. int i;
  7132. DECLARE_MAC_BUF(mac);
  7133. /* Disabling hardware scan means that mac80211 will perform scans
  7134. * "the hard way", rather than using device's scan. */
  7135. if (iwl4965_param_disable_hw_scan) {
  7136. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7137. iwl4965_hw_ops.hw_scan = NULL;
  7138. }
  7139. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7140. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7141. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7142. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7143. err = -EINVAL;
  7144. goto out;
  7145. }
  7146. /* mac80211 allocates memory for this device instance, including
  7147. * space for this driver's private structure */
  7148. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7149. if (hw == NULL) {
  7150. IWL_ERROR("Can not allocate network device\n");
  7151. err = -ENOMEM;
  7152. goto out;
  7153. }
  7154. SET_IEEE80211_DEV(hw, &pdev->dev);
  7155. hw->rate_control_algorithm = "iwl-4965-rs";
  7156. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7157. priv = hw->priv;
  7158. priv->hw = hw;
  7159. priv->cfg = cfg;
  7160. priv->pci_dev = pdev;
  7161. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7162. #ifdef CONFIG_IWL4965_DEBUG
  7163. iwl4965_debug_level = iwl4965_param_debug;
  7164. atomic_set(&priv->restrict_refcnt, 0);
  7165. #endif
  7166. priv->retry_rate = 1;
  7167. priv->ibss_beacon = NULL;
  7168. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7169. * the range of signal quality values that we'll provide.
  7170. * Negative values for level/noise indicate that we'll provide dBm.
  7171. * For WE, at least, non-0 values here *enable* display of values
  7172. * in app (iwconfig). */
  7173. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7174. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7175. hw->max_signal = 100; /* link quality indication (%) */
  7176. /* Tell mac80211 our Tx characteristics */
  7177. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7178. /* Default value; 4 EDCA QOS priorities */
  7179. hw->queues = 4;
  7180. #ifdef CONFIG_IWL4965_HT
  7181. /* Enhanced value; more queues, to support 11n aggregation */
  7182. hw->queues = 16;
  7183. #endif /* CONFIG_IWL4965_HT */
  7184. spin_lock_init(&priv->lock);
  7185. spin_lock_init(&priv->power_data.lock);
  7186. spin_lock_init(&priv->sta_lock);
  7187. spin_lock_init(&priv->hcmd_lock);
  7188. spin_lock_init(&priv->lq_mngr.lock);
  7189. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7190. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7191. INIT_LIST_HEAD(&priv->free_frames);
  7192. mutex_init(&priv->mutex);
  7193. if (pci_enable_device(pdev)) {
  7194. err = -ENODEV;
  7195. goto out_ieee80211_free_hw;
  7196. }
  7197. pci_set_master(pdev);
  7198. /* Clear the driver's (not device's) station table */
  7199. iwl4965_clear_stations_table(priv);
  7200. priv->data_retry_limit = -1;
  7201. priv->ieee_channels = NULL;
  7202. priv->ieee_rates = NULL;
  7203. priv->band = IEEE80211_BAND_2GHZ;
  7204. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7205. if (!err)
  7206. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7207. if (err) {
  7208. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7209. goto out_pci_disable_device;
  7210. }
  7211. pci_set_drvdata(pdev, priv);
  7212. err = pci_request_regions(pdev, DRV_NAME);
  7213. if (err)
  7214. goto out_pci_disable_device;
  7215. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7216. * PCI Tx retries from interfering with C3 CPU state */
  7217. pci_write_config_byte(pdev, 0x41, 0x00);
  7218. priv->hw_base = pci_iomap(pdev, 0, 0);
  7219. if (!priv->hw_base) {
  7220. err = -ENODEV;
  7221. goto out_pci_release_regions;
  7222. }
  7223. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7224. (unsigned long long) pci_resource_len(pdev, 0));
  7225. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7226. /* Initialize module parameter values here */
  7227. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7228. if (iwl4965_param_disable) {
  7229. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7230. IWL_DEBUG_INFO("Radio disabled.\n");
  7231. }
  7232. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7233. priv->ps_mode = 0;
  7234. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7235. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7236. priv->ps_mode = IWL_MIMO_PS_NONE;
  7237. /* Choose which receivers/antennas to use */
  7238. iwl4965_set_rxon_chain(priv);
  7239. printk(KERN_INFO DRV_NAME
  7240. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  7241. /* Device-specific setup */
  7242. if (iwl4965_hw_set_hw_setting(priv)) {
  7243. IWL_ERROR("failed to set hw settings\n");
  7244. goto out_iounmap;
  7245. }
  7246. if (iwl4965_param_qos_enable)
  7247. priv->qos_data.qos_enable = 1;
  7248. iwl4965_reset_qos(priv);
  7249. priv->qos_data.qos_active = 0;
  7250. priv->qos_data.qos_cap.val = 0;
  7251. iwl4965_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  7252. iwl4965_setup_deferred_work(priv);
  7253. iwl4965_setup_rx_handlers(priv);
  7254. priv->rates_mask = IWL_RATES_MASK;
  7255. /* If power management is turned on, default to AC mode */
  7256. priv->power_mode = IWL_POWER_AC;
  7257. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7258. iwl4965_disable_interrupts(priv);
  7259. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7260. if (err) {
  7261. IWL_ERROR("failed to create sysfs device attributes\n");
  7262. goto out_release_irq;
  7263. }
  7264. /* nic init */
  7265. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  7266. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  7267. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  7268. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  7269. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  7270. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  7271. if (err < 0) {
  7272. IWL_DEBUG_INFO("Failed to init the card\n");
  7273. goto out_remove_sysfs;
  7274. }
  7275. /* Read the EEPROM */
  7276. err = iwl4965_eeprom_init(priv);
  7277. if (err) {
  7278. IWL_ERROR("Unable to init EEPROM\n");
  7279. goto out_remove_sysfs;
  7280. }
  7281. /* MAC Address location in EEPROM same for 3945/4965 */
  7282. get_eeprom_mac(priv, priv->mac_addr);
  7283. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  7284. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  7285. err = iwl4965_init_channel_map(priv);
  7286. if (err) {
  7287. IWL_ERROR("initializing regulatory failed: %d\n", err);
  7288. goto out_remove_sysfs;
  7289. }
  7290. err = iwl4965_init_geos(priv);
  7291. if (err) {
  7292. IWL_ERROR("initializing geos failed: %d\n", err);
  7293. goto out_free_channel_map;
  7294. }
  7295. iwl4965_rate_control_register(priv->hw);
  7296. err = ieee80211_register_hw(priv->hw);
  7297. if (err) {
  7298. IWL_ERROR("Failed to register network device (error %d)\n", err);
  7299. goto out_free_geos;
  7300. }
  7301. priv->hw->conf.beacon_int = 100;
  7302. priv->mac80211_registered = 1;
  7303. pci_save_state(pdev);
  7304. pci_disable_device(pdev);
  7305. return 0;
  7306. out_free_geos:
  7307. iwl4965_free_geos(priv);
  7308. out_free_channel_map:
  7309. iwl4965_free_channel_map(priv);
  7310. out_remove_sysfs:
  7311. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7312. out_release_irq:
  7313. destroy_workqueue(priv->workqueue);
  7314. priv->workqueue = NULL;
  7315. iwl4965_unset_hw_setting(priv);
  7316. out_iounmap:
  7317. pci_iounmap(pdev, priv->hw_base);
  7318. out_pci_release_regions:
  7319. pci_release_regions(pdev);
  7320. out_pci_disable_device:
  7321. pci_disable_device(pdev);
  7322. pci_set_drvdata(pdev, NULL);
  7323. out_ieee80211_free_hw:
  7324. ieee80211_free_hw(priv->hw);
  7325. out:
  7326. return err;
  7327. }
  7328. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7329. {
  7330. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7331. struct list_head *p, *q;
  7332. int i;
  7333. if (!priv)
  7334. return;
  7335. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7336. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7337. iwl4965_down(priv);
  7338. /* Free MAC hash list for ADHOC */
  7339. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7340. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7341. list_del(p);
  7342. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7343. }
  7344. }
  7345. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7346. iwl4965_dealloc_ucode_pci(priv);
  7347. if (priv->rxq.bd)
  7348. iwl4965_rx_queue_free(priv, &priv->rxq);
  7349. iwl4965_hw_txq_ctx_free(priv);
  7350. iwl4965_unset_hw_setting(priv);
  7351. iwl4965_clear_stations_table(priv);
  7352. if (priv->mac80211_registered) {
  7353. ieee80211_unregister_hw(priv->hw);
  7354. iwl4965_rate_control_unregister(priv->hw);
  7355. }
  7356. /*netif_stop_queue(dev); */
  7357. flush_workqueue(priv->workqueue);
  7358. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7359. * priv->workqueue... so we can't take down the workqueue
  7360. * until now... */
  7361. destroy_workqueue(priv->workqueue);
  7362. priv->workqueue = NULL;
  7363. pci_iounmap(pdev, priv->hw_base);
  7364. pci_release_regions(pdev);
  7365. pci_disable_device(pdev);
  7366. pci_set_drvdata(pdev, NULL);
  7367. iwl4965_free_channel_map(priv);
  7368. iwl4965_free_geos(priv);
  7369. if (priv->ibss_beacon)
  7370. dev_kfree_skb(priv->ibss_beacon);
  7371. ieee80211_free_hw(priv->hw);
  7372. }
  7373. #ifdef CONFIG_PM
  7374. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7375. {
  7376. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7377. if (priv->is_open) {
  7378. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7379. iwl4965_mac_stop(priv->hw);
  7380. priv->is_open = 1;
  7381. }
  7382. pci_set_power_state(pdev, PCI_D3hot);
  7383. return 0;
  7384. }
  7385. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7386. {
  7387. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7388. pci_set_power_state(pdev, PCI_D0);
  7389. if (priv->is_open)
  7390. iwl4965_mac_start(priv->hw);
  7391. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7392. return 0;
  7393. }
  7394. #endif /* CONFIG_PM */
  7395. /*****************************************************************************
  7396. *
  7397. * driver and module entry point
  7398. *
  7399. *****************************************************************************/
  7400. static struct pci_driver iwl4965_driver = {
  7401. .name = DRV_NAME,
  7402. .id_table = iwl4965_hw_card_ids,
  7403. .probe = iwl4965_pci_probe,
  7404. .remove = __devexit_p(iwl4965_pci_remove),
  7405. #ifdef CONFIG_PM
  7406. .suspend = iwl4965_pci_suspend,
  7407. .resume = iwl4965_pci_resume,
  7408. #endif
  7409. };
  7410. static int __init iwl4965_init(void)
  7411. {
  7412. int ret;
  7413. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7414. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7415. ret = pci_register_driver(&iwl4965_driver);
  7416. if (ret) {
  7417. IWL_ERROR("Unable to initialize PCI module\n");
  7418. return ret;
  7419. }
  7420. #ifdef CONFIG_IWL4965_DEBUG
  7421. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7422. if (ret) {
  7423. IWL_ERROR("Unable to create driver sysfs file\n");
  7424. pci_unregister_driver(&iwl4965_driver);
  7425. return ret;
  7426. }
  7427. #endif
  7428. return ret;
  7429. }
  7430. static void __exit iwl4965_exit(void)
  7431. {
  7432. #ifdef CONFIG_IWL4965_DEBUG
  7433. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7434. #endif
  7435. pci_unregister_driver(&iwl4965_driver);
  7436. }
  7437. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7438. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7439. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7440. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7441. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7442. MODULE_PARM_DESC(hwcrypto,
  7443. "using hardware crypto engine (default 0 [software])\n");
  7444. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7445. MODULE_PARM_DESC(debug, "debug output mask");
  7446. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7447. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7448. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7449. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7450. /* QoS */
  7451. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7452. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7453. module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
  7454. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  7455. module_exit(iwl4965_exit);
  7456. module_init(iwl4965_init);