pci.c 24 KB

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  1. /*
  2. * Copyright IBM Corp. 2012
  3. *
  4. * Author(s):
  5. * Jan Glauber <jang@linux.vnet.ibm.com>
  6. *
  7. * The System z PCI code is a rewrite from a prototype by
  8. * the following people (Kudoz!):
  9. * Alexander Schmidt
  10. * Christoph Raisch
  11. * Hannes Hering
  12. * Hoang-Nam Nguyen
  13. * Jan-Bernd Themann
  14. * Stefan Roscher
  15. * Thomas Klein
  16. */
  17. #define COMPONENT "zPCI"
  18. #define pr_fmt(fmt) COMPONENT ": " fmt
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include <linux/err.h>
  22. #include <linux/export.h>
  23. #include <linux/delay.h>
  24. #include <linux/irq.h>
  25. #include <linux/kernel_stat.h>
  26. #include <linux/seq_file.h>
  27. #include <linux/pci.h>
  28. #include <linux/msi.h>
  29. #include <asm/isc.h>
  30. #include <asm/airq.h>
  31. #include <asm/facility.h>
  32. #include <asm/pci_insn.h>
  33. #include <asm/pci_clp.h>
  34. #include <asm/pci_dma.h>
  35. #define DEBUG /* enable pr_debug */
  36. #define SIC_IRQ_MODE_ALL 0
  37. #define SIC_IRQ_MODE_SINGLE 1
  38. #define ZPCI_NR_DMA_SPACES 1
  39. #define ZPCI_MSI_VEC_BITS 6
  40. #define ZPCI_NR_DEVICES CONFIG_PCI_NR_FUNCTIONS
  41. /* list of all detected zpci devices */
  42. LIST_HEAD(zpci_list);
  43. EXPORT_SYMBOL_GPL(zpci_list);
  44. DEFINE_MUTEX(zpci_list_lock);
  45. EXPORT_SYMBOL_GPL(zpci_list_lock);
  46. static struct pci_hp_callback_ops *hotplug_ops;
  47. static DECLARE_BITMAP(zpci_domain, ZPCI_NR_DEVICES);
  48. static DEFINE_SPINLOCK(zpci_domain_lock);
  49. struct callback {
  50. irq_handler_t handler;
  51. void *data;
  52. };
  53. struct zdev_irq_map {
  54. unsigned long aibv; /* AI bit vector */
  55. int msi_vecs; /* consecutive MSI-vectors used */
  56. int __unused;
  57. struct callback cb[ZPCI_NR_MSI_VECS]; /* callback handler array */
  58. spinlock_t lock; /* protect callbacks against de-reg */
  59. };
  60. struct intr_bucket {
  61. /* amap of adapters, one bit per dev, corresponds to one irq nr */
  62. unsigned long *alloc;
  63. /* AI summary bit, global page for all devices */
  64. unsigned long *aisb;
  65. /* pointer to aibv and callback data in zdev */
  66. struct zdev_irq_map *imap[ZPCI_NR_DEVICES];
  67. /* protects the whole bucket struct */
  68. spinlock_t lock;
  69. };
  70. static struct intr_bucket *bucket;
  71. /* Adapter local summary indicator */
  72. static u8 *zpci_irq_si;
  73. static atomic_t irq_retries = ATOMIC_INIT(0);
  74. /* I/O Map */
  75. static DEFINE_SPINLOCK(zpci_iomap_lock);
  76. static DECLARE_BITMAP(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  77. struct zpci_iomap_entry *zpci_iomap_start;
  78. EXPORT_SYMBOL_GPL(zpci_iomap_start);
  79. /* highest irq summary bit */
  80. static int __read_mostly aisb_max;
  81. static struct kmem_cache *zdev_irq_cache;
  82. static struct kmem_cache *zdev_fmb_cache;
  83. static inline int irq_to_msi_nr(unsigned int irq)
  84. {
  85. return irq & ZPCI_MSI_MASK;
  86. }
  87. static inline int irq_to_dev_nr(unsigned int irq)
  88. {
  89. return irq >> ZPCI_MSI_VEC_BITS;
  90. }
  91. static inline struct zdev_irq_map *get_imap(unsigned int irq)
  92. {
  93. return bucket->imap[irq_to_dev_nr(irq)];
  94. }
  95. struct zpci_dev *get_zdev(struct pci_dev *pdev)
  96. {
  97. return (struct zpci_dev *) pdev->sysdata;
  98. }
  99. struct zpci_dev *get_zdev_by_fid(u32 fid)
  100. {
  101. struct zpci_dev *tmp, *zdev = NULL;
  102. mutex_lock(&zpci_list_lock);
  103. list_for_each_entry(tmp, &zpci_list, entry) {
  104. if (tmp->fid == fid) {
  105. zdev = tmp;
  106. break;
  107. }
  108. }
  109. mutex_unlock(&zpci_list_lock);
  110. return zdev;
  111. }
  112. bool zpci_fid_present(u32 fid)
  113. {
  114. return (get_zdev_by_fid(fid) != NULL) ? true : false;
  115. }
  116. static struct zpci_dev *get_zdev_by_bus(struct pci_bus *bus)
  117. {
  118. return (bus && bus->sysdata) ? (struct zpci_dev *) bus->sysdata : NULL;
  119. }
  120. int pci_domain_nr(struct pci_bus *bus)
  121. {
  122. return ((struct zpci_dev *) bus->sysdata)->domain;
  123. }
  124. EXPORT_SYMBOL_GPL(pci_domain_nr);
  125. int pci_proc_domain(struct pci_bus *bus)
  126. {
  127. return pci_domain_nr(bus);
  128. }
  129. EXPORT_SYMBOL_GPL(pci_proc_domain);
  130. /* Modify PCI: Register adapter interruptions */
  131. static int zpci_register_airq(struct zpci_dev *zdev, unsigned int aisb,
  132. u64 aibv)
  133. {
  134. u64 req = ZPCI_CREATE_REQ(zdev->fh, 0, ZPCI_MOD_FC_REG_INT);
  135. struct zpci_fib *fib;
  136. int rc;
  137. fib = (void *) get_zeroed_page(GFP_KERNEL);
  138. if (!fib)
  139. return -ENOMEM;
  140. fib->isc = PCI_ISC;
  141. fib->noi = zdev->irq_map->msi_vecs;
  142. fib->sum = 1; /* enable summary notifications */
  143. fib->aibv = aibv;
  144. fib->aibvo = 0; /* every function has its own page */
  145. fib->aisb = (u64) bucket->aisb + aisb / 8;
  146. fib->aisbo = aisb & ZPCI_MSI_MASK;
  147. rc = s390pci_mod_fc(req, fib);
  148. pr_debug("%s mpcifc returned noi: %d\n", __func__, fib->noi);
  149. free_page((unsigned long) fib);
  150. return rc;
  151. }
  152. struct mod_pci_args {
  153. u64 base;
  154. u64 limit;
  155. u64 iota;
  156. u64 fmb_addr;
  157. };
  158. static int mod_pci(struct zpci_dev *zdev, int fn, u8 dmaas, struct mod_pci_args *args)
  159. {
  160. u64 req = ZPCI_CREATE_REQ(zdev->fh, dmaas, fn);
  161. struct zpci_fib *fib;
  162. int rc;
  163. /* The FIB must be available even if it's not used */
  164. fib = (void *) get_zeroed_page(GFP_KERNEL);
  165. if (!fib)
  166. return -ENOMEM;
  167. fib->pba = args->base;
  168. fib->pal = args->limit;
  169. fib->iota = args->iota;
  170. fib->fmb_addr = args->fmb_addr;
  171. rc = s390pci_mod_fc(req, fib);
  172. free_page((unsigned long) fib);
  173. return rc;
  174. }
  175. /* Modify PCI: Register I/O address translation parameters */
  176. int zpci_register_ioat(struct zpci_dev *zdev, u8 dmaas,
  177. u64 base, u64 limit, u64 iota)
  178. {
  179. struct mod_pci_args args = { base, limit, iota, 0 };
  180. WARN_ON_ONCE(iota & 0x3fff);
  181. args.iota |= ZPCI_IOTA_RTTO_FLAG;
  182. return mod_pci(zdev, ZPCI_MOD_FC_REG_IOAT, dmaas, &args);
  183. }
  184. /* Modify PCI: Unregister I/O address translation parameters */
  185. int zpci_unregister_ioat(struct zpci_dev *zdev, u8 dmaas)
  186. {
  187. struct mod_pci_args args = { 0, 0, 0, 0 };
  188. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_IOAT, dmaas, &args);
  189. }
  190. /* Modify PCI: Unregister adapter interruptions */
  191. static int zpci_unregister_airq(struct zpci_dev *zdev)
  192. {
  193. struct mod_pci_args args = { 0, 0, 0, 0 };
  194. return mod_pci(zdev, ZPCI_MOD_FC_DEREG_INT, 0, &args);
  195. }
  196. /* Modify PCI: Set PCI function measurement parameters */
  197. int zpci_fmb_enable_device(struct zpci_dev *zdev)
  198. {
  199. struct mod_pci_args args = { 0, 0, 0, 0 };
  200. if (zdev->fmb)
  201. return -EINVAL;
  202. zdev->fmb = kmem_cache_zalloc(zdev_fmb_cache, GFP_KERNEL);
  203. if (!zdev->fmb)
  204. return -ENOMEM;
  205. WARN_ON((u64) zdev->fmb & 0xf);
  206. args.fmb_addr = virt_to_phys(zdev->fmb);
  207. return mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  208. }
  209. /* Modify PCI: Disable PCI function measurement */
  210. int zpci_fmb_disable_device(struct zpci_dev *zdev)
  211. {
  212. struct mod_pci_args args = { 0, 0, 0, 0 };
  213. int rc;
  214. if (!zdev->fmb)
  215. return -EINVAL;
  216. /* Function measurement is disabled if fmb address is zero */
  217. rc = mod_pci(zdev, ZPCI_MOD_FC_SET_MEASURE, 0, &args);
  218. kmem_cache_free(zdev_fmb_cache, zdev->fmb);
  219. zdev->fmb = NULL;
  220. return rc;
  221. }
  222. #define ZPCI_PCIAS_CFGSPC 15
  223. static int zpci_cfg_load(struct zpci_dev *zdev, int offset, u32 *val, u8 len)
  224. {
  225. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  226. u64 data;
  227. int rc;
  228. rc = s390pci_load(&data, req, offset);
  229. if (!rc) {
  230. data = data << ((8 - len) * 8);
  231. data = le64_to_cpu(data);
  232. *val = (u32) data;
  233. } else
  234. *val = 0xffffffff;
  235. return rc;
  236. }
  237. static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)
  238. {
  239. u64 req = ZPCI_CREATE_REQ(zdev->fh, ZPCI_PCIAS_CFGSPC, len);
  240. u64 data = val;
  241. int rc;
  242. data = cpu_to_le64(data);
  243. data = data >> ((8 - len) * 8);
  244. rc = s390pci_store(data, req, offset);
  245. return rc;
  246. }
  247. void enable_irq(unsigned int irq)
  248. {
  249. struct msi_desc *msi = irq_get_msi_desc(irq);
  250. zpci_msi_set_mask_bits(msi, 1, 0);
  251. }
  252. EXPORT_SYMBOL_GPL(enable_irq);
  253. void disable_irq(unsigned int irq)
  254. {
  255. struct msi_desc *msi = irq_get_msi_desc(irq);
  256. zpci_msi_set_mask_bits(msi, 1, 1);
  257. }
  258. EXPORT_SYMBOL_GPL(disable_irq);
  259. void pcibios_fixup_bus(struct pci_bus *bus)
  260. {
  261. }
  262. resource_size_t pcibios_align_resource(void *data, const struct resource *res,
  263. resource_size_t size,
  264. resource_size_t align)
  265. {
  266. return 0;
  267. }
  268. /* combine single writes by using store-block insn */
  269. void __iowrite64_copy(void __iomem *to, const void *from, size_t count)
  270. {
  271. zpci_memcpy_toio(to, from, count);
  272. }
  273. /* Create a virtual mapping cookie for a PCI BAR */
  274. void __iomem *pci_iomap(struct pci_dev *pdev, int bar, unsigned long max)
  275. {
  276. struct zpci_dev *zdev = get_zdev(pdev);
  277. u64 addr;
  278. int idx;
  279. if ((bar & 7) != bar)
  280. return NULL;
  281. idx = zdev->bars[bar].map_idx;
  282. spin_lock(&zpci_iomap_lock);
  283. zpci_iomap_start[idx].fh = zdev->fh;
  284. zpci_iomap_start[idx].bar = bar;
  285. spin_unlock(&zpci_iomap_lock);
  286. addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
  287. return (void __iomem *) addr;
  288. }
  289. EXPORT_SYMBOL_GPL(pci_iomap);
  290. void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
  291. {
  292. unsigned int idx;
  293. idx = (((__force u64) addr) & ~ZPCI_IOMAP_ADDR_BASE) >> 48;
  294. spin_lock(&zpci_iomap_lock);
  295. zpci_iomap_start[idx].fh = 0;
  296. zpci_iomap_start[idx].bar = 0;
  297. spin_unlock(&zpci_iomap_lock);
  298. }
  299. EXPORT_SYMBOL_GPL(pci_iounmap);
  300. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
  301. int size, u32 *val)
  302. {
  303. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  304. int ret;
  305. if (!zdev || devfn != ZPCI_DEVFN)
  306. ret = -ENODEV;
  307. else
  308. ret = zpci_cfg_load(zdev, where, val, size);
  309. return ret;
  310. }
  311. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where,
  312. int size, u32 val)
  313. {
  314. struct zpci_dev *zdev = get_zdev_by_bus(bus);
  315. int ret;
  316. if (!zdev || devfn != ZPCI_DEVFN)
  317. ret = -ENODEV;
  318. else
  319. ret = zpci_cfg_store(zdev, where, val, size);
  320. return ret;
  321. }
  322. static struct pci_ops pci_root_ops = {
  323. .read = pci_read,
  324. .write = pci_write,
  325. };
  326. /* store the last handled bit to implement fair scheduling of devices */
  327. static DEFINE_PER_CPU(unsigned long, next_sbit);
  328. static void zpci_irq_handler(void *dont, void *need)
  329. {
  330. unsigned long sbit, mbit, last = 0, start = __get_cpu_var(next_sbit);
  331. int rescan = 0, max = aisb_max;
  332. struct zdev_irq_map *imap;
  333. inc_irq_stat(IRQIO_PCI);
  334. sbit = start;
  335. scan:
  336. /* find summary_bit */
  337. for_each_set_bit_left_cont(sbit, bucket->aisb, max) {
  338. clear_bit(63 - (sbit & 63), bucket->aisb + (sbit >> 6));
  339. last = sbit;
  340. /* find vector bit */
  341. imap = bucket->imap[sbit];
  342. for_each_set_bit_left(mbit, &imap->aibv, imap->msi_vecs) {
  343. inc_irq_stat(IRQIO_MSI);
  344. clear_bit(63 - mbit, &imap->aibv);
  345. spin_lock(&imap->lock);
  346. if (imap->cb[mbit].handler)
  347. imap->cb[mbit].handler(mbit,
  348. imap->cb[mbit].data);
  349. spin_unlock(&imap->lock);
  350. }
  351. }
  352. if (rescan)
  353. goto out;
  354. /* scan the skipped bits */
  355. if (start > 0) {
  356. sbit = 0;
  357. max = start;
  358. start = 0;
  359. goto scan;
  360. }
  361. /* enable interrupts again */
  362. set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  363. /* check again to not lose initiative */
  364. rmb();
  365. max = aisb_max;
  366. sbit = find_first_bit_left(bucket->aisb, max);
  367. if (sbit != max) {
  368. atomic_inc(&irq_retries);
  369. rescan++;
  370. goto scan;
  371. }
  372. out:
  373. /* store next device bit to scan */
  374. __get_cpu_var(next_sbit) = (++last >= aisb_max) ? 0 : last;
  375. }
  376. /* msi_vecs - number of requested interrupts, 0 place function to error state */
  377. static int zpci_setup_msi(struct pci_dev *pdev, int msi_vecs)
  378. {
  379. struct zpci_dev *zdev = get_zdev(pdev);
  380. unsigned int aisb, msi_nr;
  381. struct msi_desc *msi;
  382. int rc;
  383. /* store the number of used MSI vectors */
  384. zdev->irq_map->msi_vecs = min(msi_vecs, ZPCI_NR_MSI_VECS);
  385. spin_lock(&bucket->lock);
  386. aisb = find_first_zero_bit(bucket->alloc, PAGE_SIZE);
  387. /* alloc map exhausted? */
  388. if (aisb == PAGE_SIZE) {
  389. spin_unlock(&bucket->lock);
  390. return -EIO;
  391. }
  392. set_bit(aisb, bucket->alloc);
  393. spin_unlock(&bucket->lock);
  394. zdev->aisb = aisb;
  395. if (aisb + 1 > aisb_max)
  396. aisb_max = aisb + 1;
  397. /* wire up IRQ shortcut pointer */
  398. bucket->imap[zdev->aisb] = zdev->irq_map;
  399. pr_debug("%s: imap[%u] linked to %p\n", __func__, zdev->aisb, zdev->irq_map);
  400. /* TODO: irq number 0 wont be found if we return less than requested MSIs.
  401. * ignore it for now and fix in common code.
  402. */
  403. msi_nr = aisb << ZPCI_MSI_VEC_BITS;
  404. list_for_each_entry(msi, &pdev->msi_list, list) {
  405. rc = zpci_setup_msi_irq(zdev, msi, msi_nr,
  406. aisb << ZPCI_MSI_VEC_BITS);
  407. if (rc)
  408. return rc;
  409. msi_nr++;
  410. }
  411. rc = zpci_register_airq(zdev, aisb, (u64) &zdev->irq_map->aibv);
  412. if (rc) {
  413. clear_bit(aisb, bucket->alloc);
  414. dev_err(&pdev->dev, "register MSI failed with: %d\n", rc);
  415. return rc;
  416. }
  417. return (zdev->irq_map->msi_vecs == msi_vecs) ?
  418. 0 : zdev->irq_map->msi_vecs;
  419. }
  420. static void zpci_teardown_msi(struct pci_dev *pdev)
  421. {
  422. struct zpci_dev *zdev = get_zdev(pdev);
  423. struct msi_desc *msi;
  424. int aisb, rc;
  425. rc = zpci_unregister_airq(zdev);
  426. if (rc) {
  427. dev_err(&pdev->dev, "deregister MSI failed with: %d\n", rc);
  428. return;
  429. }
  430. msi = list_first_entry(&pdev->msi_list, struct msi_desc, list);
  431. aisb = irq_to_dev_nr(msi->irq);
  432. list_for_each_entry(msi, &pdev->msi_list, list)
  433. zpci_teardown_msi_irq(zdev, msi);
  434. clear_bit(aisb, bucket->alloc);
  435. if (aisb + 1 == aisb_max)
  436. aisb_max--;
  437. }
  438. int arch_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
  439. {
  440. pr_debug("%s: requesting %d MSI-X interrupts...", __func__, nvec);
  441. if (type != PCI_CAP_ID_MSIX && type != PCI_CAP_ID_MSI)
  442. return -EINVAL;
  443. return zpci_setup_msi(pdev, nvec);
  444. }
  445. void arch_teardown_msi_irqs(struct pci_dev *pdev)
  446. {
  447. pr_info("%s: on pdev: %p\n", __func__, pdev);
  448. zpci_teardown_msi(pdev);
  449. }
  450. static void zpci_map_resources(struct zpci_dev *zdev)
  451. {
  452. struct pci_dev *pdev = zdev->pdev;
  453. resource_size_t len;
  454. int i;
  455. for (i = 0; i < PCI_BAR_COUNT; i++) {
  456. len = pci_resource_len(pdev, i);
  457. if (!len)
  458. continue;
  459. pdev->resource[i].start = (resource_size_t) pci_iomap(pdev, i, 0);
  460. pdev->resource[i].end = pdev->resource[i].start + len - 1;
  461. pr_debug("BAR%i: -> start: %Lx end: %Lx\n",
  462. i, pdev->resource[i].start, pdev->resource[i].end);
  463. }
  464. }
  465. static void zpci_unmap_resources(struct zpci_dev *zdev)
  466. {
  467. struct pci_dev *pdev = zdev->pdev;
  468. resource_size_t len;
  469. int i;
  470. for (i = 0; i < PCI_BAR_COUNT; i++) {
  471. len = pci_resource_len(pdev, i);
  472. if (!len)
  473. continue;
  474. pci_iounmap(pdev, (void *) pdev->resource[i].start);
  475. }
  476. }
  477. struct zpci_dev *zpci_alloc_device(void)
  478. {
  479. struct zpci_dev *zdev;
  480. /* Alloc memory for our private pci device data */
  481. zdev = kzalloc(sizeof(*zdev), GFP_KERNEL);
  482. if (!zdev)
  483. return ERR_PTR(-ENOMEM);
  484. /* Alloc aibv & callback space */
  485. zdev->irq_map = kmem_cache_zalloc(zdev_irq_cache, GFP_KERNEL);
  486. if (!zdev->irq_map)
  487. goto error;
  488. WARN_ON((u64) zdev->irq_map & 0xff);
  489. return zdev;
  490. error:
  491. kfree(zdev);
  492. return ERR_PTR(-ENOMEM);
  493. }
  494. void zpci_free_device(struct zpci_dev *zdev)
  495. {
  496. kmem_cache_free(zdev_irq_cache, zdev->irq_map);
  497. kfree(zdev);
  498. }
  499. /*
  500. * Too late for any s390 specific setup, since interrupts must be set up
  501. * already which requires DMA setup too and the pci scan will access the
  502. * config space, which only works if the function handle is enabled.
  503. */
  504. int pcibios_enable_device(struct pci_dev *pdev, int mask)
  505. {
  506. struct resource *res;
  507. u16 cmd;
  508. int i;
  509. pci_read_config_word(pdev, PCI_COMMAND, &cmd);
  510. for (i = 0; i < PCI_BAR_COUNT; i++) {
  511. res = &pdev->resource[i];
  512. if (res->flags & IORESOURCE_IO)
  513. return -EINVAL;
  514. if (res->flags & IORESOURCE_MEM)
  515. cmd |= PCI_COMMAND_MEMORY;
  516. }
  517. pci_write_config_word(pdev, PCI_COMMAND, cmd);
  518. return 0;
  519. }
  520. int pcibios_add_platform_entries(struct pci_dev *pdev)
  521. {
  522. return zpci_sysfs_add_device(&pdev->dev);
  523. }
  524. int zpci_request_irq(unsigned int irq, irq_handler_t handler, void *data)
  525. {
  526. int msi_nr = irq_to_msi_nr(irq);
  527. struct zdev_irq_map *imap;
  528. struct msi_desc *msi;
  529. msi = irq_get_msi_desc(irq);
  530. if (!msi)
  531. return -EIO;
  532. imap = get_imap(irq);
  533. spin_lock_init(&imap->lock);
  534. pr_debug("%s: register handler for IRQ:MSI %d:%d\n", __func__, irq >> 6, msi_nr);
  535. imap->cb[msi_nr].handler = handler;
  536. imap->cb[msi_nr].data = data;
  537. /*
  538. * The generic MSI code returns with the interrupt disabled on the
  539. * card, using the MSI mask bits. Firmware doesn't appear to unmask
  540. * at that level, so we do it here by hand.
  541. */
  542. zpci_msi_set_mask_bits(msi, 1, 0);
  543. return 0;
  544. }
  545. void zpci_free_irq(unsigned int irq)
  546. {
  547. struct zdev_irq_map *imap = get_imap(irq);
  548. int msi_nr = irq_to_msi_nr(irq);
  549. unsigned long flags;
  550. pr_debug("%s: for irq: %d\n", __func__, irq);
  551. spin_lock_irqsave(&imap->lock, flags);
  552. imap->cb[msi_nr].handler = NULL;
  553. imap->cb[msi_nr].data = NULL;
  554. spin_unlock_irqrestore(&imap->lock, flags);
  555. }
  556. int request_irq(unsigned int irq, irq_handler_t handler,
  557. unsigned long irqflags, const char *devname, void *dev_id)
  558. {
  559. pr_debug("%s: irq: %d handler: %p flags: %lx dev: %s\n",
  560. __func__, irq, handler, irqflags, devname);
  561. return zpci_request_irq(irq, handler, dev_id);
  562. }
  563. EXPORT_SYMBOL_GPL(request_irq);
  564. void free_irq(unsigned int irq, void *dev_id)
  565. {
  566. zpci_free_irq(irq);
  567. }
  568. EXPORT_SYMBOL_GPL(free_irq);
  569. static int __init zpci_irq_init(void)
  570. {
  571. int cpu, rc;
  572. bucket = kzalloc(sizeof(*bucket), GFP_KERNEL);
  573. if (!bucket)
  574. return -ENOMEM;
  575. bucket->aisb = (unsigned long *) get_zeroed_page(GFP_KERNEL);
  576. if (!bucket->aisb) {
  577. rc = -ENOMEM;
  578. goto out_aisb;
  579. }
  580. bucket->alloc = (unsigned long *) get_zeroed_page(GFP_KERNEL);
  581. if (!bucket->alloc) {
  582. rc = -ENOMEM;
  583. goto out_alloc;
  584. }
  585. isc_register(PCI_ISC);
  586. zpci_irq_si = s390_register_adapter_interrupt(&zpci_irq_handler, NULL, PCI_ISC);
  587. if (IS_ERR(zpci_irq_si)) {
  588. rc = PTR_ERR(zpci_irq_si);
  589. zpci_irq_si = NULL;
  590. goto out_ai;
  591. }
  592. for_each_online_cpu(cpu)
  593. per_cpu(next_sbit, cpu) = 0;
  594. spin_lock_init(&bucket->lock);
  595. /* set summary to 1 to be called every time for the ISC */
  596. *zpci_irq_si = 1;
  597. set_irq_ctrl(SIC_IRQ_MODE_SINGLE, NULL, PCI_ISC);
  598. return 0;
  599. out_ai:
  600. isc_unregister(PCI_ISC);
  601. free_page((unsigned long) bucket->alloc);
  602. out_alloc:
  603. free_page((unsigned long) bucket->aisb);
  604. out_aisb:
  605. kfree(bucket);
  606. return rc;
  607. }
  608. static void zpci_irq_exit(void)
  609. {
  610. free_page((unsigned long) bucket->alloc);
  611. free_page((unsigned long) bucket->aisb);
  612. s390_unregister_adapter_interrupt(zpci_irq_si, PCI_ISC);
  613. isc_unregister(PCI_ISC);
  614. kfree(bucket);
  615. }
  616. void zpci_debug_info(struct zpci_dev *zdev, struct seq_file *m)
  617. {
  618. if (!zdev)
  619. return;
  620. seq_printf(m, "global irq retries: %u\n", atomic_read(&irq_retries));
  621. seq_printf(m, "aibv[0]:%016lx aibv[1]:%016lx aisb:%016lx\n",
  622. get_imap(0)->aibv, get_imap(1)->aibv, *bucket->aisb);
  623. }
  624. static struct resource *zpci_alloc_bus_resource(unsigned long start, unsigned long size,
  625. unsigned long flags, int domain)
  626. {
  627. struct resource *r;
  628. char *name;
  629. int rc;
  630. r = kzalloc(sizeof(*r), GFP_KERNEL);
  631. if (!r)
  632. return ERR_PTR(-ENOMEM);
  633. r->start = start;
  634. r->end = r->start + size - 1;
  635. r->flags = flags;
  636. r->parent = &iomem_resource;
  637. name = kmalloc(18, GFP_KERNEL);
  638. if (!name) {
  639. kfree(r);
  640. return ERR_PTR(-ENOMEM);
  641. }
  642. sprintf(name, "PCI Bus: %04x:%02x", domain, ZPCI_BUS_NR);
  643. r->name = name;
  644. rc = request_resource(&iomem_resource, r);
  645. if (rc)
  646. pr_debug("request resource %pR failed\n", r);
  647. return r;
  648. }
  649. static int zpci_alloc_iomap(struct zpci_dev *zdev)
  650. {
  651. int entry;
  652. spin_lock(&zpci_iomap_lock);
  653. entry = find_first_zero_bit(zpci_iomap, ZPCI_IOMAP_MAX_ENTRIES);
  654. if (entry == ZPCI_IOMAP_MAX_ENTRIES) {
  655. spin_unlock(&zpci_iomap_lock);
  656. return -ENOSPC;
  657. }
  658. set_bit(entry, zpci_iomap);
  659. spin_unlock(&zpci_iomap_lock);
  660. return entry;
  661. }
  662. static void zpci_free_iomap(struct zpci_dev *zdev, int entry)
  663. {
  664. spin_lock(&zpci_iomap_lock);
  665. memset(&zpci_iomap_start[entry], 0, sizeof(struct zpci_iomap_entry));
  666. clear_bit(entry, zpci_iomap);
  667. spin_unlock(&zpci_iomap_lock);
  668. }
  669. int pcibios_add_device(struct pci_dev *pdev)
  670. {
  671. struct zpci_dev *zdev = get_zdev(pdev);
  672. zdev->pdev = pdev;
  673. zpci_debug_init_device(zdev);
  674. zpci_fmb_enable_device(zdev);
  675. zpci_map_resources(zdev);
  676. return 0;
  677. }
  678. void pcibios_release_device(struct pci_dev *pdev)
  679. {
  680. struct zpci_dev *zdev = get_zdev(pdev);
  681. zpci_unmap_resources(zdev);
  682. zpci_fmb_disable_device(zdev);
  683. zpci_debug_exit_device(zdev);
  684. zdev->pdev = NULL;
  685. }
  686. static int zpci_scan_bus(struct zpci_dev *zdev)
  687. {
  688. struct resource *res;
  689. LIST_HEAD(resources);
  690. int i;
  691. /* allocate mapping entry for each used bar */
  692. for (i = 0; i < PCI_BAR_COUNT; i++) {
  693. unsigned long addr, size, flags;
  694. int entry;
  695. if (!zdev->bars[i].size)
  696. continue;
  697. entry = zpci_alloc_iomap(zdev);
  698. if (entry < 0)
  699. return entry;
  700. zdev->bars[i].map_idx = entry;
  701. /* only MMIO is supported */
  702. flags = IORESOURCE_MEM;
  703. if (zdev->bars[i].val & 8)
  704. flags |= IORESOURCE_PREFETCH;
  705. if (zdev->bars[i].val & 4)
  706. flags |= IORESOURCE_MEM_64;
  707. addr = ZPCI_IOMAP_ADDR_BASE + ((u64) entry << 48);
  708. size = 1UL << zdev->bars[i].size;
  709. res = zpci_alloc_bus_resource(addr, size, flags, zdev->domain);
  710. if (IS_ERR(res)) {
  711. zpci_free_iomap(zdev, entry);
  712. return PTR_ERR(res);
  713. }
  714. pci_add_resource(&resources, res);
  715. }
  716. zdev->bus = pci_scan_root_bus(NULL, ZPCI_BUS_NR, &pci_root_ops,
  717. zdev, &resources);
  718. if (!zdev->bus)
  719. return -EIO;
  720. zdev->bus->max_bus_speed = zdev->max_bus_speed;
  721. return 0;
  722. }
  723. static int zpci_alloc_domain(struct zpci_dev *zdev)
  724. {
  725. spin_lock(&zpci_domain_lock);
  726. zdev->domain = find_first_zero_bit(zpci_domain, ZPCI_NR_DEVICES);
  727. if (zdev->domain == ZPCI_NR_DEVICES) {
  728. spin_unlock(&zpci_domain_lock);
  729. return -ENOSPC;
  730. }
  731. set_bit(zdev->domain, zpci_domain);
  732. spin_unlock(&zpci_domain_lock);
  733. return 0;
  734. }
  735. static void zpci_free_domain(struct zpci_dev *zdev)
  736. {
  737. spin_lock(&zpci_domain_lock);
  738. clear_bit(zdev->domain, zpci_domain);
  739. spin_unlock(&zpci_domain_lock);
  740. }
  741. int zpci_enable_device(struct zpci_dev *zdev)
  742. {
  743. int rc;
  744. rc = clp_enable_fh(zdev, ZPCI_NR_DMA_SPACES);
  745. if (rc)
  746. goto out;
  747. pr_info("Enabled fh: 0x%x fid: 0x%x\n", zdev->fh, zdev->fid);
  748. rc = zpci_dma_init_device(zdev);
  749. if (rc)
  750. goto out_dma;
  751. return 0;
  752. out_dma:
  753. clp_disable_fh(zdev);
  754. out:
  755. return rc;
  756. }
  757. EXPORT_SYMBOL_GPL(zpci_enable_device);
  758. int zpci_disable_device(struct zpci_dev *zdev)
  759. {
  760. zpci_dma_exit_device(zdev);
  761. return clp_disable_fh(zdev);
  762. }
  763. EXPORT_SYMBOL_GPL(zpci_disable_device);
  764. int zpci_create_device(struct zpci_dev *zdev)
  765. {
  766. int rc;
  767. rc = zpci_alloc_domain(zdev);
  768. if (rc)
  769. goto out;
  770. if (zdev->state == ZPCI_FN_STATE_CONFIGURED) {
  771. rc = zpci_enable_device(zdev);
  772. if (rc)
  773. goto out_free;
  774. zdev->state = ZPCI_FN_STATE_ONLINE;
  775. }
  776. rc = zpci_scan_bus(zdev);
  777. if (rc)
  778. goto out_disable;
  779. mutex_lock(&zpci_list_lock);
  780. list_add_tail(&zdev->entry, &zpci_list);
  781. if (hotplug_ops)
  782. hotplug_ops->create_slot(zdev);
  783. mutex_unlock(&zpci_list_lock);
  784. return 0;
  785. out_disable:
  786. if (zdev->state == ZPCI_FN_STATE_ONLINE)
  787. zpci_disable_device(zdev);
  788. out_free:
  789. zpci_free_domain(zdev);
  790. out:
  791. return rc;
  792. }
  793. void zpci_stop_device(struct zpci_dev *zdev)
  794. {
  795. zpci_dma_exit_device(zdev);
  796. /*
  797. * Note: SCLP disables fh via set-pci-fn so don't
  798. * do that here.
  799. */
  800. }
  801. EXPORT_SYMBOL_GPL(zpci_stop_device);
  802. static inline int barsize(u8 size)
  803. {
  804. return (size) ? (1 << size) >> 10 : 0;
  805. }
  806. static int zpci_mem_init(void)
  807. {
  808. zdev_irq_cache = kmem_cache_create("PCI_IRQ_cache", sizeof(struct zdev_irq_map),
  809. L1_CACHE_BYTES, SLAB_HWCACHE_ALIGN, NULL);
  810. if (!zdev_irq_cache)
  811. goto error_zdev;
  812. zdev_fmb_cache = kmem_cache_create("PCI_FMB_cache", sizeof(struct zpci_fmb),
  813. 16, 0, NULL);
  814. if (!zdev_fmb_cache)
  815. goto error_fmb;
  816. /* TODO: use realloc */
  817. zpci_iomap_start = kzalloc(ZPCI_IOMAP_MAX_ENTRIES * sizeof(*zpci_iomap_start),
  818. GFP_KERNEL);
  819. if (!zpci_iomap_start)
  820. goto error_iomap;
  821. return 0;
  822. error_iomap:
  823. kmem_cache_destroy(zdev_fmb_cache);
  824. error_fmb:
  825. kmem_cache_destroy(zdev_irq_cache);
  826. error_zdev:
  827. return -ENOMEM;
  828. }
  829. static void zpci_mem_exit(void)
  830. {
  831. kfree(zpci_iomap_start);
  832. kmem_cache_destroy(zdev_irq_cache);
  833. kmem_cache_destroy(zdev_fmb_cache);
  834. }
  835. void zpci_register_hp_ops(struct pci_hp_callback_ops *ops)
  836. {
  837. mutex_lock(&zpci_list_lock);
  838. hotplug_ops = ops;
  839. mutex_unlock(&zpci_list_lock);
  840. }
  841. EXPORT_SYMBOL_GPL(zpci_register_hp_ops);
  842. void zpci_deregister_hp_ops(void)
  843. {
  844. mutex_lock(&zpci_list_lock);
  845. hotplug_ops = NULL;
  846. mutex_unlock(&zpci_list_lock);
  847. }
  848. EXPORT_SYMBOL_GPL(zpci_deregister_hp_ops);
  849. unsigned int s390_pci_probe;
  850. EXPORT_SYMBOL_GPL(s390_pci_probe);
  851. char * __init pcibios_setup(char *str)
  852. {
  853. if (!strcmp(str, "on")) {
  854. s390_pci_probe = 1;
  855. return NULL;
  856. }
  857. return str;
  858. }
  859. static int __init pci_base_init(void)
  860. {
  861. int rc;
  862. if (!s390_pci_probe)
  863. return 0;
  864. if (!test_facility(2) || !test_facility(69)
  865. || !test_facility(71) || !test_facility(72))
  866. return 0;
  867. pr_info("Probing PCI hardware: PCI:%d SID:%d AEN:%d\n",
  868. test_facility(69), test_facility(70),
  869. test_facility(71));
  870. rc = zpci_debug_init();
  871. if (rc)
  872. return rc;
  873. rc = zpci_mem_init();
  874. if (rc)
  875. goto out_mem;
  876. rc = zpci_msihash_init();
  877. if (rc)
  878. goto out_hash;
  879. rc = zpci_irq_init();
  880. if (rc)
  881. goto out_irq;
  882. rc = zpci_dma_init();
  883. if (rc)
  884. goto out_dma;
  885. rc = clp_find_pci_devices();
  886. if (rc)
  887. goto out_find;
  888. return 0;
  889. out_find:
  890. zpci_dma_exit();
  891. out_dma:
  892. zpci_irq_exit();
  893. out_irq:
  894. zpci_msihash_exit();
  895. out_hash:
  896. zpci_mem_exit();
  897. out_mem:
  898. zpci_debug_exit();
  899. return rc;
  900. }
  901. subsys_initcall(pci_base_init);