wm8750.c 35 KB

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  1. /*
  2. * wm8750.c -- WM8750 ALSA SoC audio driver
  3. *
  4. * Copyright 2005 Openedhand Ltd.
  5. *
  6. * Author: Richard Purdie <richard@openedhand.com>
  7. *
  8. * Based on WM8753.c
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/pm.h>
  19. #include <linux/i2c.h>
  20. #include <linux/platform_device.h>
  21. #include <sound/driver.h>
  22. #include <sound/core.h>
  23. #include <sound/pcm.h>
  24. #include <sound/pcm_params.h>
  25. #include <sound/soc.h>
  26. #include <sound/soc-dapm.h>
  27. #include <sound/initval.h>
  28. #include "wm8750.h"
  29. #define AUDIO_NAME "WM8750"
  30. #define WM8750_VERSION "0.11"
  31. /*
  32. * Debug
  33. */
  34. #define WM8750_DEBUG 0
  35. #ifdef WM8750_DEBUG
  36. #define dbg(format, arg...) \
  37. printk(KERN_DEBUG AUDIO_NAME ": " format "\n" , ## arg)
  38. #else
  39. #define dbg(format, arg...) do {} while (0)
  40. #endif
  41. #define err(format, arg...) \
  42. printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg)
  43. #define info(format, arg...) \
  44. printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg)
  45. #define warn(format, arg...) \
  46. printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg)
  47. static struct work_struct wm8750_dapm_work;
  48. /*
  49. * wm8750 register cache
  50. * We can't read the WM8750 register space when we
  51. * are using 2 wire for device control, so we cache them instead.
  52. */
  53. static const u16 wm8750_reg[] = {
  54. 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
  55. 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
  56. 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
  57. 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
  58. 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
  59. 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
  60. 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
  61. 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
  62. 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
  63. 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
  64. 0x0079, 0x0079, 0x0079, /* 40 */
  65. };
  66. #define WM8750_HIFI_DAIFMT \
  67. (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_RIGHT_J | \
  68. SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_NB_IF | SND_SOC_DAIFMT_IB_NF | \
  69. SND_SOC_DAIFMT_IB_IF)
  70. #define WM8750_DIR \
  71. (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
  72. #define WM8750_HIFI_FSB \
  73. (SND_SOC_FSBD(1) | SND_SOC_FSBD(2) | SND_SOC_FSBD(4) | \
  74. SND_SOC_FSBD(8) | SND_SOC_FSBD(16))
  75. #define WM8750_HIFI_RATES \
  76. (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 | SNDRV_PCM_RATE_16000 | \
  77. SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
  78. SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
  79. #define WM8750_HIFI_BITS \
  80. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
  81. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  82. static struct snd_soc_dai_mode wm8750_modes[] = {
  83. /* common codec frame and clock master modes */
  84. /* 8k */
  85. {
  86. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  87. .pcmfmt = WM8750_HIFI_BITS,
  88. .pcmrate = SNDRV_PCM_RATE_8000,
  89. .pcmdir = WM8750_DIR,
  90. .flags = SND_SOC_DAI_BFS_DIV,
  91. .fs = 1536,
  92. .bfs = WM8750_HIFI_FSB,
  93. },
  94. {
  95. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  96. .pcmfmt = WM8750_HIFI_BITS,
  97. .pcmrate = SNDRV_PCM_RATE_8000,
  98. .pcmdir = WM8750_DIR,
  99. .flags = SND_SOC_DAI_BFS_DIV,
  100. .fs = 1408,
  101. .bfs = WM8750_HIFI_FSB,
  102. },
  103. {
  104. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  105. .pcmfmt = WM8750_HIFI_BITS,
  106. .pcmrate = SNDRV_PCM_RATE_8000,
  107. .pcmdir = WM8750_DIR,
  108. .flags = SND_SOC_DAI_BFS_DIV,
  109. .fs = 2304,
  110. .bfs = WM8750_HIFI_FSB,
  111. },
  112. {
  113. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  114. .pcmfmt = WM8750_HIFI_BITS,
  115. .pcmrate = SNDRV_PCM_RATE_8000,
  116. .pcmdir = WM8750_DIR,
  117. .flags = SND_SOC_DAI_BFS_DIV,
  118. .fs = 2112,
  119. .bfs = WM8750_HIFI_FSB,
  120. },
  121. {
  122. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  123. .pcmfmt = WM8750_HIFI_BITS,
  124. .pcmrate = SNDRV_PCM_RATE_8000,
  125. .pcmdir = WM8750_DIR,
  126. .flags = SND_SOC_DAI_BFS_DIV,
  127. .fs = 1500,
  128. .bfs = WM8750_HIFI_FSB,
  129. },
  130. /* 11.025k */
  131. {
  132. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  133. .pcmfmt = WM8750_HIFI_BITS,
  134. .pcmrate = SNDRV_PCM_RATE_11025,
  135. .pcmdir = WM8750_DIR,
  136. .flags = SND_SOC_DAI_BFS_DIV,
  137. .fs = 1024,
  138. .bfs = WM8750_HIFI_FSB,
  139. },
  140. {
  141. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  142. .pcmfmt = WM8750_HIFI_BITS,
  143. .pcmrate = SNDRV_PCM_RATE_11025,
  144. .pcmdir = WM8750_DIR,
  145. .flags = SND_SOC_DAI_BFS_DIV,
  146. .fs = 1536,
  147. .bfs = WM8750_HIFI_FSB,
  148. },
  149. {
  150. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  151. .pcmfmt = WM8750_HIFI_BITS,
  152. .pcmrate = SNDRV_PCM_RATE_11025,
  153. .pcmdir = WM8750_DIR,
  154. .flags = SND_SOC_DAI_BFS_DIV,
  155. .fs = 1088,
  156. .bfs = WM8750_HIFI_FSB,
  157. },
  158. /* 16k */
  159. {
  160. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  161. .pcmfmt = WM8750_HIFI_BITS,
  162. .pcmrate = SNDRV_PCM_RATE_16000,
  163. .pcmdir = WM8750_DIR,
  164. .flags = SND_SOC_DAI_BFS_DIV,
  165. .fs = 768,
  166. .bfs = WM8750_HIFI_FSB,
  167. },
  168. {
  169. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  170. .pcmfmt = WM8750_HIFI_BITS,
  171. .pcmrate = SNDRV_PCM_RATE_16000,
  172. .pcmdir = WM8750_DIR,
  173. .flags = SND_SOC_DAI_BFS_DIV,
  174. .fs = 1152,
  175. .bfs = WM8750_HIFI_FSB
  176. },
  177. {
  178. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  179. .pcmfmt = WM8750_HIFI_BITS,
  180. .pcmrate = SNDRV_PCM_RATE_16000,
  181. .pcmdir = WM8750_DIR,
  182. .flags = SND_SOC_DAI_BFS_DIV,
  183. .fs = 750,
  184. .bfs = WM8750_HIFI_FSB,
  185. },
  186. /* 22.05k */
  187. {
  188. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  189. .pcmfmt = WM8750_HIFI_BITS,
  190. .pcmrate = SNDRV_PCM_RATE_22050,
  191. .pcmdir = WM8750_DIR,
  192. .flags = SND_SOC_DAI_BFS_DIV,
  193. .fs = 512,
  194. .bfs = WM8750_HIFI_FSB,
  195. },
  196. {
  197. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  198. .pcmfmt = WM8750_HIFI_BITS,
  199. .pcmrate = SNDRV_PCM_RATE_22050,
  200. .pcmdir = WM8750_DIR,
  201. .flags = SND_SOC_DAI_BFS_DIV,
  202. .fs = 768,
  203. .bfs = WM8750_HIFI_FSB,
  204. },
  205. {
  206. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  207. .pcmfmt = WM8750_HIFI_BITS,
  208. .pcmrate = SNDRV_PCM_RATE_22050,
  209. .pcmdir = WM8750_DIR,
  210. .flags = SND_SOC_DAI_BFS_DIV,
  211. .fs = 544,
  212. .bfs = WM8750_HIFI_FSB,
  213. },
  214. /* 32k */
  215. {
  216. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  217. .pcmfmt = WM8750_HIFI_BITS,
  218. .pcmrate = SNDRV_PCM_RATE_32000,
  219. .pcmdir = WM8750_DIR,
  220. .flags = SND_SOC_DAI_BFS_DIV,
  221. .fs = 384,
  222. .bfs = WM8750_HIFI_FSB,
  223. },
  224. {
  225. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  226. .pcmfmt = WM8750_HIFI_BITS,
  227. .pcmrate = SNDRV_PCM_RATE_32000,
  228. .pcmdir = WM8750_DIR,
  229. .flags = SND_SOC_DAI_BFS_DIV,
  230. .fs = 576,
  231. .bfs = WM8750_HIFI_FSB,
  232. },
  233. {
  234. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  235. .pcmfmt = WM8750_HIFI_BITS,
  236. .pcmrate = SNDRV_PCM_RATE_32000,
  237. .pcmdir = WM8750_DIR,
  238. .flags = SND_SOC_DAI_BFS_DIV,
  239. .fs = 375,
  240. .bfs = WM8750_HIFI_FSB,
  241. },
  242. /* 44.1k & 48k */
  243. {
  244. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  245. .pcmfmt = WM8750_HIFI_BITS,
  246. .pcmrate = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
  247. .pcmdir = WM8750_DIR,
  248. .flags = SND_SOC_DAI_BFS_DIV,
  249. .fs = 256,
  250. .bfs = WM8750_HIFI_FSB,
  251. },
  252. {
  253. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  254. .pcmfmt = WM8750_HIFI_BITS,
  255. .pcmrate = SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
  256. .pcmdir = WM8750_DIR,
  257. .flags = SND_SOC_DAI_BFS_DIV,
  258. .fs = 384,
  259. .bfs = WM8750_HIFI_FSB,
  260. },
  261. {
  262. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  263. .pcmfmt = WM8750_HIFI_BITS,
  264. .pcmrate = SNDRV_PCM_RATE_44100,
  265. .pcmdir = WM8750_DIR,
  266. .flags = SND_SOC_DAI_BFS_DIV,
  267. .fs = 272,
  268. .bfs = WM8750_HIFI_FSB,
  269. },
  270. {
  271. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  272. .pcmfmt = WM8750_HIFI_BITS,
  273. .pcmrate = SNDRV_PCM_RATE_48000,
  274. .pcmdir = WM8750_DIR,
  275. .flags = SND_SOC_DAI_BFS_DIV,
  276. .fs = 250,
  277. .bfs = WM8750_HIFI_FSB,
  278. },
  279. /* 88.2k & 96k */
  280. {
  281. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  282. .pcmfmt = WM8750_HIFI_BITS,
  283. .pcmrate = SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000,
  284. .pcmdir = WM8750_DIR,
  285. .flags = SND_SOC_DAI_BFS_DIV,
  286. .fs = 128,
  287. .bfs = WM8750_HIFI_FSB,
  288. },
  289. {
  290. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  291. .pcmfmt = WM8750_HIFI_BITS,
  292. .pcmrate = SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000,
  293. .pcmdir = WM8750_DIR,
  294. .flags = SND_SOC_DAI_BFS_DIV,
  295. .fs = 192,
  296. .bfs = WM8750_HIFI_FSB,
  297. },
  298. {
  299. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  300. .pcmfmt = WM8750_HIFI_BITS,
  301. .pcmrate = SNDRV_PCM_RATE_88200,
  302. .pcmdir = WM8750_DIR,
  303. .flags = SND_SOC_DAI_BFS_DIV,
  304. .fs = 136,
  305. .bfs = WM8750_HIFI_FSB,
  306. },
  307. {
  308. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBM_CFM,
  309. .pcmfmt = WM8750_HIFI_BITS,
  310. .pcmrate = SNDRV_PCM_RATE_96000,
  311. .pcmdir = WM8750_DIR,
  312. .flags = SND_SOC_DAI_BFS_DIV,
  313. .fs = 125,
  314. .bfs = WM8750_HIFI_FSB,
  315. },
  316. /* codec frame and clock slave modes */
  317. {
  318. .fmt = WM8750_HIFI_DAIFMT | SND_SOC_DAIFMT_CBS_CFS,
  319. .pcmfmt = WM8750_HIFI_BITS,
  320. .pcmrate = WM8750_HIFI_RATES,
  321. .pcmdir = WM8750_DIR,
  322. .flags = SND_SOC_DAI_BFS_DIV,
  323. .fs = SND_SOC_FS_ALL,
  324. .bfs = SND_SOC_FSB_ALL,
  325. },
  326. };
  327. /*
  328. * read wm8750 register cache
  329. */
  330. static inline unsigned int wm8750_read_reg_cache(struct snd_soc_codec *codec,
  331. unsigned int reg)
  332. {
  333. u16 *cache = codec->reg_cache;
  334. if (reg > WM8750_CACHE_REGNUM)
  335. return -1;
  336. return cache[reg];
  337. }
  338. /*
  339. * write wm8750 register cache
  340. */
  341. static inline void wm8750_write_reg_cache(struct snd_soc_codec *codec,
  342. unsigned int reg, unsigned int value)
  343. {
  344. u16 *cache = codec->reg_cache;
  345. if (reg > WM8750_CACHE_REGNUM)
  346. return;
  347. cache[reg] = value;
  348. }
  349. static int wm8750_write(struct snd_soc_codec *codec, unsigned int reg,
  350. unsigned int value)
  351. {
  352. u8 data[2];
  353. /* data is
  354. * D15..D9 WM8753 register offset
  355. * D8...D0 register data
  356. */
  357. data[0] = (reg << 1) | ((value >> 8) & 0x0001);
  358. data[1] = value & 0x00ff;
  359. wm8750_write_reg_cache (codec, reg, value);
  360. if (codec->hw_write(codec->control_data, data, 2) == 2)
  361. return 0;
  362. else
  363. return -EIO;
  364. }
  365. #define wm8750_reset(c) wm8750_write(c, WM8750_RESET, 0)
  366. /*
  367. * WM8750 Controls
  368. */
  369. static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
  370. static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
  371. static const char *wm8750_treble[] = {"8kHz", "4kHz"};
  372. static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
  373. static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
  374. static const char *wm8750_3d_func[] = {"Capture", "Playback"};
  375. static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
  376. static const char *wm8750_ng_type[] = {"Constant PGA Gain",
  377. "Mute ADC Output"};
  378. static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
  379. "Differential"};
  380. static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
  381. "Differential"};
  382. static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
  383. "ROUT1"};
  384. static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
  385. static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
  386. "L + R Invert"};
  387. static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
  388. static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
  389. "Mono (Right)", "Digital Mono"};
  390. static const struct soc_enum wm8750_enum[] = {
  391. SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
  392. SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
  393. SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
  394. SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
  395. SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
  396. SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
  397. SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
  398. SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
  399. SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
  400. SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
  401. SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
  402. SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
  403. SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
  404. SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
  405. SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
  406. SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
  407. SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
  408. };
  409. static const struct snd_kcontrol_new wm8750_snd_controls[] = {
  410. SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
  411. SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
  412. SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
  413. SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
  414. WM8750_ROUT1V, 7, 1, 0),
  415. SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
  416. WM8750_ROUT2V, 7, 1, 0),
  417. SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
  418. SOC_ENUM("Capture Polarity", wm8750_enum[14]),
  419. SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
  420. SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
  421. SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
  422. SOC_ENUM("Bass Boost", wm8750_enum[0]),
  423. SOC_ENUM("Bass Filter", wm8750_enum[1]),
  424. SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
  425. SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 0),
  426. SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
  427. SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
  428. SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
  429. SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
  430. SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
  431. SOC_ENUM("3D Mode", wm8750_enum[5]),
  432. SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
  433. SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
  434. SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
  435. SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
  436. SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
  437. SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
  438. SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
  439. SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
  440. SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
  441. SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
  442. SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
  443. SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
  444. SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
  445. SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
  446. SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
  447. /* Unimplemented */
  448. /* ADCDAC Bit 0 - ADCHPD */
  449. /* ADCDAC Bit 4 - HPOR */
  450. /* ADCTL1 Bit 2,3 - DATSEL */
  451. /* ADCTL1 Bit 4,5 - DMONOMIX */
  452. /* ADCTL1 Bit 6,7 - VSEL */
  453. /* ADCTL2 Bit 2 - LRCM */
  454. /* ADCTL2 Bit 3 - TRI */
  455. /* ADCTL3 Bit 5 - HPFLREN */
  456. /* ADCTL3 Bit 6 - VROI */
  457. /* ADCTL3 Bit 7,8 - ADCLRM */
  458. /* ADCIN Bit 4 - LDCM */
  459. /* ADCIN Bit 5 - RDCM */
  460. SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
  461. SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
  462. WM8750_LOUTM2, 4, 7, 1),
  463. SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
  464. WM8750_ROUTM2, 4, 7, 1),
  465. SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
  466. WM8750_MOUTM2, 4, 7, 1),
  467. SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
  468. SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
  469. 0, 127, 0),
  470. SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
  471. 0, 127, 0),
  472. SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
  473. };
  474. /* add non dapm controls */
  475. static int wm8750_add_controls(struct snd_soc_codec *codec)
  476. {
  477. int err, i;
  478. for (i = 0; i < ARRAY_SIZE(wm8750_snd_controls); i++) {
  479. err = snd_ctl_add(codec->card,
  480. snd_soc_cnew(&wm8750_snd_controls[i],codec, NULL));
  481. if (err < 0)
  482. return err;
  483. }
  484. return 0;
  485. }
  486. /*
  487. * DAPM Controls
  488. */
  489. /* Left Mixer */
  490. static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
  491. SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
  492. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
  493. SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
  494. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
  495. };
  496. /* Right Mixer */
  497. static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
  498. SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
  499. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
  500. SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
  501. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
  502. };
  503. /* Mono Mixer */
  504. static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
  505. SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
  506. SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
  507. SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
  508. SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
  509. };
  510. /* Left Line Mux */
  511. static const struct snd_kcontrol_new wm8750_left_line_controls =
  512. SOC_DAPM_ENUM("Route", wm8750_enum[8]);
  513. /* Right Line Mux */
  514. static const struct snd_kcontrol_new wm8750_right_line_controls =
  515. SOC_DAPM_ENUM("Route", wm8750_enum[9]);
  516. /* Left PGA Mux */
  517. static const struct snd_kcontrol_new wm8750_left_pga_controls =
  518. SOC_DAPM_ENUM("Route", wm8750_enum[10]);
  519. /* Right PGA Mux */
  520. static const struct snd_kcontrol_new wm8750_right_pga_controls =
  521. SOC_DAPM_ENUM("Route", wm8750_enum[11]);
  522. /* Out 3 Mux */
  523. static const struct snd_kcontrol_new wm8750_out3_controls =
  524. SOC_DAPM_ENUM("Route", wm8750_enum[12]);
  525. /* Differential Mux */
  526. static const struct snd_kcontrol_new wm8750_diffmux_controls =
  527. SOC_DAPM_ENUM("Route", wm8750_enum[13]);
  528. /* Mono ADC Mux */
  529. static const struct snd_kcontrol_new wm8750_monomux_controls =
  530. SOC_DAPM_ENUM("Route", wm8750_enum[16]);
  531. static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
  532. SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
  533. &wm8750_left_mixer_controls[0],
  534. ARRAY_SIZE(wm8750_left_mixer_controls)),
  535. SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
  536. &wm8750_right_mixer_controls[0],
  537. ARRAY_SIZE(wm8750_right_mixer_controls)),
  538. SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
  539. &wm8750_mono_mixer_controls[0],
  540. ARRAY_SIZE(wm8750_mono_mixer_controls)),
  541. SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
  542. SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
  543. SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
  544. SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
  545. SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
  546. SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
  547. SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
  548. SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
  549. SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
  550. SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
  551. &wm8750_left_pga_controls),
  552. SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
  553. &wm8750_right_pga_controls),
  554. SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
  555. &wm8750_left_line_controls),
  556. SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
  557. &wm8750_right_line_controls),
  558. SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
  559. SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
  560. SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
  561. SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
  562. &wm8750_diffmux_controls),
  563. SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
  564. &wm8750_monomux_controls),
  565. SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
  566. &wm8750_monomux_controls),
  567. SND_SOC_DAPM_OUTPUT("LOUT1"),
  568. SND_SOC_DAPM_OUTPUT("ROUT1"),
  569. SND_SOC_DAPM_OUTPUT("LOUT2"),
  570. SND_SOC_DAPM_OUTPUT("ROUT2"),
  571. SND_SOC_DAPM_OUTPUT("MONO"),
  572. SND_SOC_DAPM_OUTPUT("OUT3"),
  573. SND_SOC_DAPM_INPUT("LINPUT1"),
  574. SND_SOC_DAPM_INPUT("LINPUT2"),
  575. SND_SOC_DAPM_INPUT("LINPUT3"),
  576. SND_SOC_DAPM_INPUT("RINPUT1"),
  577. SND_SOC_DAPM_INPUT("RINPUT2"),
  578. SND_SOC_DAPM_INPUT("RINPUT3"),
  579. };
  580. static const char *audio_map[][3] = {
  581. /* left mixer */
  582. {"Left Mixer", "Playback Switch", "Left DAC"},
  583. {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
  584. {"Left Mixer", "Right Playback Switch", "Right DAC"},
  585. {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
  586. /* right mixer */
  587. {"Right Mixer", "Left Playback Switch", "Left DAC"},
  588. {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
  589. {"Right Mixer", "Playback Switch", "Right DAC"},
  590. {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
  591. /* left out 1 */
  592. {"Left Out 1", NULL, "Left Mixer"},
  593. {"LOUT1", NULL, "Left Out 1"},
  594. /* left out 2 */
  595. {"Left Out 2", NULL, "Left Mixer"},
  596. {"LOUT2", NULL, "Left Out 2"},
  597. /* right out 1 */
  598. {"Right Out 1", NULL, "Right Mixer"},
  599. {"ROUT1", NULL, "Right Out 1"},
  600. /* right out 2 */
  601. {"Right Out 2", NULL, "Right Mixer"},
  602. {"ROUT2", NULL, "Right Out 2"},
  603. /* mono mixer */
  604. {"Mono Mixer", "Left Playback Switch", "Left DAC"},
  605. {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
  606. {"Mono Mixer", "Right Playback Switch", "Right DAC"},
  607. {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
  608. /* mono out */
  609. {"Mono Out 1", NULL, "Mono Mixer"},
  610. {"MONO1", NULL, "Mono Out 1"},
  611. /* out 3 */
  612. {"Out3 Mux", "VREF", "VREF"},
  613. {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
  614. {"Out3 Mux", "ROUT1", "Right Mixer"},
  615. {"Out3 Mux", "MonoOut", "MONO1"},
  616. {"Out 3", NULL, "Out3 Mux"},
  617. {"OUT3", NULL, "Out 3"},
  618. /* Left Line Mux */
  619. {"Left Line Mux", "Line 1", "LINPUT1"},
  620. {"Left Line Mux", "Line 2", "LINPUT2"},
  621. {"Left Line Mux", "Line 3", "LINPUT3"},
  622. {"Left Line Mux", "PGA", "Left PGA Mux"},
  623. {"Left Line Mux", "Differential", "Differential Mux"},
  624. /* Right Line Mux */
  625. {"Right Line Mux", "Line 1", "RINPUT1"},
  626. {"Right Line Mux", "Line 2", "RINPUT2"},
  627. {"Right Line Mux", "Line 3", "RINPUT3"},
  628. {"Right Line Mux", "PGA", "Right PGA Mux"},
  629. {"Right Line Mux", "Differential", "Differential Mux"},
  630. /* Left PGA Mux */
  631. {"Left PGA Mux", "Line 1", "LINPUT1"},
  632. {"Left PGA Mux", "Line 2", "LINPUT2"},
  633. {"Left PGA Mux", "Line 3", "LINPUT3"},
  634. {"Left PGA Mux", "Differential", "Differential Mux"},
  635. /* Right PGA Mux */
  636. {"Right PGA Mux", "Line 1", "RINPUT1"},
  637. {"Right PGA Mux", "Line 2", "RINPUT2"},
  638. {"Right PGA Mux", "Line 3", "RINPUT3"},
  639. {"Right PGA Mux", "Differential", "Differential Mux"},
  640. /* Differential Mux */
  641. {"Differential Mux", "Line 1", "LINPUT1"},
  642. {"Differential Mux", "Line 1", "RINPUT1"},
  643. {"Differential Mux", "Line 2", "LINPUT2"},
  644. {"Differential Mux", "Line 2", "RINPUT2"},
  645. /* Left ADC Mux */
  646. {"Left ADC Mux", "Stereo", "Left PGA Mux"},
  647. {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
  648. {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
  649. /* Right ADC Mux */
  650. {"Right ADC Mux", "Stereo", "Right PGA Mux"},
  651. {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
  652. {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
  653. /* ADC */
  654. {"Left ADC", NULL, "Left ADC Mux"},
  655. {"Right ADC", NULL, "Right ADC Mux"},
  656. /* terminator */
  657. {NULL, NULL, NULL},
  658. };
  659. static int wm8750_add_widgets(struct snd_soc_codec *codec)
  660. {
  661. int i;
  662. for(i = 0; i < ARRAY_SIZE(wm8750_dapm_widgets); i++) {
  663. snd_soc_dapm_new_control(codec, &wm8750_dapm_widgets[i]);
  664. }
  665. /* set up audio path audio_mapnects */
  666. for(i = 0; audio_map[i][0] != NULL; i++) {
  667. snd_soc_dapm_connect_input(codec, audio_map[i][0],
  668. audio_map[i][1], audio_map[i][2]);
  669. }
  670. snd_soc_dapm_new_widgets(codec);
  671. return 0;
  672. }
  673. struct _coeff_div {
  674. u32 mclk;
  675. u32 rate;
  676. u16 fs;
  677. u8 sr:5;
  678. u8 usb:1;
  679. };
  680. /* codec hifi mclk clock divider coefficients */
  681. static const struct _coeff_div coeff_div[] = {
  682. /* 8k */
  683. {12288000, 8000, 1536, 0x6, 0x0},
  684. {11289600, 8000, 1408, 0x16, 0x0},
  685. {18432000, 8000, 2304, 0x7, 0x0},
  686. {16934400, 8000, 2112, 0x17, 0x0},
  687. {12000000, 8000, 1500, 0x6, 0x1},
  688. /* 11.025k */
  689. {11289600, 11025, 1024, 0x18, 0x0},
  690. {16934400, 11025, 1536, 0x19, 0x0},
  691. {12000000, 11025, 1088, 0x19, 0x1},
  692. /* 16k */
  693. {12288000, 16000, 768, 0xa, 0x0},
  694. {18432000, 16000, 1152, 0xb, 0x0},
  695. {12000000, 16000, 750, 0xa, 0x1},
  696. /* 22.05k */
  697. {11289600, 22050, 512, 0x1a, 0x0},
  698. {16934400, 22050, 768, 0x1b, 0x0},
  699. {12000000, 22050, 544, 0x1b, 0x1},
  700. /* 32k */
  701. {12288000, 32000, 384, 0xc, 0x0},
  702. {18432000, 32000, 576, 0xd, 0x0},
  703. {12000000, 32000, 375, 0xa, 0x1},
  704. /* 44.1k */
  705. {11289600, 44100, 256, 0x10, 0x0},
  706. {16934400, 44100, 384, 0x11, 0x0},
  707. {12000000, 44100, 272, 0x11, 0x1},
  708. /* 48k */
  709. {12288000, 48000, 256, 0x0, 0x0},
  710. {18432000, 48000, 384, 0x1, 0x0},
  711. {12000000, 48000, 250, 0x0, 0x1},
  712. /* 88.2k */
  713. {11289600, 88200, 128, 0x1e, 0x0},
  714. {16934400, 88200, 192, 0x1f, 0x0},
  715. {12000000, 88200, 136, 0x1f, 0x1},
  716. /* 96k */
  717. {12288000, 96000, 128, 0xe, 0x0},
  718. {18432000, 96000, 192, 0xf, 0x0},
  719. {12000000, 96000, 125, 0xe, 0x1},
  720. };
  721. static inline int get_coeff(int mclk, int rate)
  722. {
  723. int i;
  724. for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
  725. if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
  726. return i;
  727. }
  728. printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
  729. mclk, rate);
  730. return -EINVAL;
  731. }
  732. /* WM8750 supports numerous input clocks per sample rate */
  733. static unsigned int wm8750_config_sysclk(struct snd_soc_codec_dai *dai,
  734. struct snd_soc_clock_info *info, unsigned int clk)
  735. {
  736. dai->mclk = clk;
  737. return dai->mclk;
  738. }
  739. static int wm8750_pcm_prepare(struct snd_pcm_substream *substream)
  740. {
  741. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  742. struct snd_soc_device *socdev = rtd->socdev;
  743. struct snd_soc_codec *codec = socdev->codec;
  744. u16 iface = 0, bfs, srate = 0;
  745. int i = get_coeff(rtd->codec_dai->mclk,
  746. snd_soc_get_rate(rtd->codec_dai->dai_runtime.pcmrate));
  747. /* is coefficient valid ? */
  748. if (i < 0)
  749. return i;
  750. bfs = SND_SOC_FSBD_REAL(rtd->codec_dai->dai_runtime.bfs);
  751. /* set master/slave audio interface */
  752. switch (rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_CLOCK_MASK) {
  753. case SND_SOC_DAIFMT_CBM_CFM:
  754. iface = 0x0040;
  755. break;
  756. case SND_SOC_DAIFMT_CBS_CFS:
  757. break;
  758. }
  759. /* interface format */
  760. switch (rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  761. case SND_SOC_DAIFMT_I2S:
  762. iface |= 0x0002;
  763. break;
  764. case SND_SOC_DAIFMT_RIGHT_J:
  765. break;
  766. case SND_SOC_DAIFMT_LEFT_J:
  767. iface |= 0x0001;
  768. break;
  769. case SND_SOC_DAIFMT_DSP_A:
  770. iface |= 0x0003;
  771. break;
  772. case SND_SOC_DAIFMT_DSP_B:
  773. iface |= 0x0013;
  774. break;
  775. }
  776. /* bit size */
  777. switch (rtd->codec_dai->dai_runtime.pcmfmt) {
  778. case SNDRV_PCM_FMTBIT_S16_LE:
  779. break;
  780. case SNDRV_PCM_FMTBIT_S20_3LE:
  781. iface |= 0x0004;
  782. break;
  783. case SNDRV_PCM_FMTBIT_S24_LE:
  784. iface |= 0x0008;
  785. break;
  786. case SNDRV_PCM_FMTBIT_S32_LE:
  787. iface |= 0x000c;
  788. break;
  789. }
  790. /* clock inversion */
  791. switch (rtd->codec_dai->dai_runtime.fmt & SND_SOC_DAIFMT_INV_MASK) {
  792. case SND_SOC_DAIFMT_NB_NF:
  793. break;
  794. case SND_SOC_DAIFMT_IB_IF:
  795. iface |= 0x0090;
  796. break;
  797. case SND_SOC_DAIFMT_IB_NF:
  798. iface |= 0x0080;
  799. break;
  800. case SND_SOC_DAIFMT_NB_IF:
  801. iface |= 0x0010;
  802. break;
  803. }
  804. /* set bclk divisor rate */
  805. switch (bfs) {
  806. case 1:
  807. break;
  808. case 4:
  809. srate |= (0x1 << 7);
  810. break;
  811. case 8:
  812. srate |= (0x2 << 7);
  813. break;
  814. case 16:
  815. srate |= (0x3 << 7);
  816. break;
  817. }
  818. /* set iface & srate */
  819. wm8750_write(codec, WM8750_IFACE, iface);
  820. wm8750_write(codec, WM8750_SRATE, srate |
  821. (coeff_div[i].sr << 1) | coeff_div[i].usb);
  822. return 0;
  823. }
  824. static int wm8750_mute(struct snd_soc_codec *codec,
  825. struct snd_soc_codec_dai *dai, int mute)
  826. {
  827. u16 mute_reg = wm8750_read_reg_cache(codec, WM8750_ADCDAC) & 0xfff7;
  828. if (mute)
  829. wm8750_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
  830. else
  831. wm8750_write(codec, WM8750_ADCDAC, mute_reg);
  832. return 0;
  833. }
  834. static int wm8750_dapm_event(struct snd_soc_codec *codec, int event)
  835. {
  836. u16 pwr_reg = wm8750_read_reg_cache(codec, WM8750_PWR1) & 0xfe3e;
  837. switch (event) {
  838. case SNDRV_CTL_POWER_D0: /* full On */
  839. /* set vmid to 50k and unmute dac */
  840. wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
  841. break;
  842. case SNDRV_CTL_POWER_D1: /* partial On */
  843. case SNDRV_CTL_POWER_D2: /* partial On */
  844. /* set vmid to 5k for quick power up */
  845. wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
  846. break;
  847. case SNDRV_CTL_POWER_D3hot: /* Off, with power */
  848. /* mute dac and set vmid to 500k, enable VREF */
  849. wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
  850. break;
  851. case SNDRV_CTL_POWER_D3cold: /* Off, without power */
  852. wm8750_write(codec, WM8750_PWR1, 0x0001);
  853. break;
  854. }
  855. codec->dapm_state = event;
  856. return 0;
  857. }
  858. struct snd_soc_codec_dai wm8750_dai = {
  859. .name = "WM8750",
  860. .playback = {
  861. .stream_name = "Playback",
  862. .channels_min = 1,
  863. .channels_max = 2,
  864. },
  865. .capture = {
  866. .stream_name = "Capture",
  867. .channels_min = 1,
  868. .channels_max = 2,
  869. },
  870. .config_sysclk = wm8750_config_sysclk,
  871. .digital_mute = wm8750_mute,
  872. .ops = {
  873. .prepare = wm8750_pcm_prepare,
  874. },
  875. .caps = {
  876. .num_modes = ARRAY_SIZE(wm8750_modes),
  877. .mode = wm8750_modes,
  878. },
  879. };
  880. EXPORT_SYMBOL_GPL(wm8750_dai);
  881. static void wm8750_work(void *data)
  882. {
  883. struct snd_soc_codec *codec = (struct snd_soc_codec *)data;
  884. wm8750_dapm_event(codec, codec->dapm_state);
  885. }
  886. static int wm8750_suspend(struct platform_device *pdev, pm_message_t state)
  887. {
  888. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  889. struct snd_soc_codec *codec = socdev->codec;
  890. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
  891. return 0;
  892. }
  893. static int wm8750_resume(struct platform_device *pdev)
  894. {
  895. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  896. struct snd_soc_codec *codec = socdev->codec;
  897. int i;
  898. u8 data[2];
  899. u16 *cache = codec->reg_cache;
  900. /* Sync reg_cache with the hardware */
  901. for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) {
  902. if (i == WM8750_RESET)
  903. continue;
  904. data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
  905. data[1] = cache[i] & 0x00ff;
  906. codec->hw_write(codec->control_data, data, 2);
  907. }
  908. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3hot);
  909. /* charge wm8750 caps */
  910. if (codec->suspend_dapm_state == SNDRV_CTL_POWER_D0) {
  911. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2);
  912. codec->dapm_state = SNDRV_CTL_POWER_D0;
  913. schedule_delayed_work(&wm8750_dapm_work,
  914. msecs_to_jiffies(1000));
  915. }
  916. return 0;
  917. }
  918. /*
  919. * initialise the WM8750 driver
  920. * register the mixer and dsp interfaces with the kernel
  921. */
  922. static int wm8750_init(struct snd_soc_device *socdev)
  923. {
  924. struct snd_soc_codec *codec = socdev->codec;
  925. int reg, ret = 0;
  926. codec->name = "WM8750";
  927. codec->owner = THIS_MODULE;
  928. codec->read = wm8750_read_reg_cache;
  929. codec->write = wm8750_write;
  930. codec->dapm_event = wm8750_dapm_event;
  931. codec->dai = &wm8750_dai;
  932. codec->num_dai = 1;
  933. codec->reg_cache_size = ARRAY_SIZE(wm8750_reg);
  934. codec->reg_cache =
  935. kzalloc(sizeof(u16) * ARRAY_SIZE(wm8750_reg), GFP_KERNEL);
  936. if (codec->reg_cache == NULL)
  937. return -ENOMEM;
  938. memcpy(codec->reg_cache, wm8750_reg,
  939. sizeof(u16) * ARRAY_SIZE(wm8750_reg));
  940. codec->reg_cache_size = sizeof(u16) * ARRAY_SIZE(wm8750_reg);
  941. wm8750_reset(codec);
  942. /* register pcms */
  943. ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
  944. if (ret < 0) {
  945. kfree(codec->reg_cache);
  946. return ret;
  947. }
  948. /* charge output caps */
  949. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2);
  950. codec->dapm_state = SNDRV_CTL_POWER_D3hot;
  951. schedule_delayed_work(&wm8750_dapm_work, msecs_to_jiffies(1000));
  952. /* set the update bits */
  953. reg = wm8750_read_reg_cache(codec, WM8750_LDAC);
  954. wm8750_write(codec, WM8750_LDAC, reg | 0x0100);
  955. reg = wm8750_read_reg_cache(codec, WM8750_RDAC);
  956. wm8750_write(codec, WM8750_RDAC, reg | 0x0100);
  957. reg = wm8750_read_reg_cache(codec, WM8750_LOUT1V);
  958. wm8750_write(codec, WM8750_LOUT1V, reg | 0x0100);
  959. reg = wm8750_read_reg_cache(codec, WM8750_ROUT1V);
  960. wm8750_write(codec, WM8750_ROUT1V, reg | 0x0100);
  961. reg = wm8750_read_reg_cache(codec, WM8750_LOUT2V);
  962. wm8750_write(codec, WM8750_LOUT2V, reg | 0x0100);
  963. reg = wm8750_read_reg_cache(codec, WM8750_ROUT2V);
  964. wm8750_write(codec, WM8750_ROUT2V, reg | 0x0100);
  965. reg = wm8750_read_reg_cache(codec, WM8750_LINVOL);
  966. wm8750_write(codec, WM8750_LINVOL, reg | 0x0100);
  967. reg = wm8750_read_reg_cache(codec, WM8750_RINVOL);
  968. wm8750_write(codec, WM8750_RINVOL, reg | 0x0100);
  969. wm8750_add_controls(codec);
  970. wm8750_add_widgets(codec);
  971. ret = snd_soc_register_card(socdev);
  972. if (ret < 0) {
  973. snd_soc_free_pcms(socdev);
  974. snd_soc_dapm_free(socdev);
  975. }
  976. return ret;
  977. }
  978. /* If the i2c layer weren't so broken, we could pass this kind of data
  979. around */
  980. static struct snd_soc_device *wm8750_socdev;
  981. #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
  982. /*
  983. * WM8731 2 wire address is determined by GPIO5
  984. * state during powerup.
  985. * low = 0x1a
  986. * high = 0x1b
  987. */
  988. static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END };
  989. /* Magic definition of all other variables and things */
  990. I2C_CLIENT_INSMOD;
  991. static struct i2c_driver wm8750_i2c_driver;
  992. static struct i2c_client client_template;
  993. static int wm8750_codec_probe(struct i2c_adapter *adap, int addr, int kind)
  994. {
  995. struct snd_soc_device *socdev = wm8750_socdev;
  996. struct wm8750_setup_data *setup = socdev->codec_data;
  997. struct snd_soc_codec *codec = socdev->codec;
  998. struct i2c_client *i2c;
  999. int ret;
  1000. if (addr != setup->i2c_address)
  1001. return -ENODEV;
  1002. client_template.adapter = adap;
  1003. client_template.addr = addr;
  1004. i2c = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
  1005. if (i2c == NULL) {
  1006. kfree(codec);
  1007. return -ENOMEM;
  1008. }
  1009. memcpy(i2c, &client_template, sizeof(struct i2c_client));
  1010. i2c_set_clientdata(i2c, codec);
  1011. codec->control_data = i2c;
  1012. ret = i2c_attach_client(i2c);
  1013. if (ret < 0) {
  1014. err("failed to attach codec at addr %x\n", addr);
  1015. goto err;
  1016. }
  1017. ret = wm8750_init(socdev);
  1018. if (ret < 0) {
  1019. err("failed to initialise WM8750\n");
  1020. goto err;
  1021. }
  1022. return ret;
  1023. err:
  1024. kfree(codec);
  1025. kfree(i2c);
  1026. return ret;
  1027. }
  1028. static int wm8750_i2c_detach(struct i2c_client *client)
  1029. {
  1030. struct snd_soc_codec *codec = i2c_get_clientdata(client);
  1031. i2c_detach_client(client);
  1032. kfree(codec->reg_cache);
  1033. kfree(client);
  1034. return 0;
  1035. }
  1036. static int wm8750_i2c_attach(struct i2c_adapter *adap)
  1037. {
  1038. return i2c_probe(adap, &addr_data, wm8750_codec_probe);
  1039. }
  1040. /* corgi i2c codec control layer */
  1041. static struct i2c_driver wm8750_i2c_driver = {
  1042. .driver = {
  1043. .name = "WM8750 I2C Codec",
  1044. .owner = THIS_MODULE,
  1045. },
  1046. .id = I2C_DRIVERID_WM8750,
  1047. .attach_adapter = wm8750_i2c_attach,
  1048. .detach_client = wm8750_i2c_detach,
  1049. .command = NULL,
  1050. };
  1051. static struct i2c_client client_template = {
  1052. .name = "WM8750",
  1053. .driver = &wm8750_i2c_driver,
  1054. };
  1055. #endif
  1056. static int wm8750_probe(struct platform_device *pdev)
  1057. {
  1058. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  1059. struct wm8750_setup_data *setup = socdev->codec_data;
  1060. struct snd_soc_codec *codec;
  1061. int ret = 0;
  1062. info("WM8750 Audio Codec %s", WM8750_VERSION);
  1063. codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
  1064. if (codec == NULL)
  1065. return -ENOMEM;
  1066. socdev->codec = codec;
  1067. mutex_init(&codec->mutex);
  1068. INIT_LIST_HEAD(&codec->dapm_widgets);
  1069. INIT_LIST_HEAD(&codec->dapm_paths);
  1070. wm8750_socdev = socdev;
  1071. INIT_WORK(&wm8750_dapm_work, wm8750_work, codec);
  1072. #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
  1073. if (setup->i2c_address) {
  1074. normal_i2c[0] = setup->i2c_address;
  1075. codec->hw_write = (hw_write_t)i2c_master_send;
  1076. ret = i2c_add_driver(&wm8750_i2c_driver);
  1077. if (ret != 0)
  1078. printk(KERN_ERR "can't add i2c driver");
  1079. }
  1080. #else
  1081. /* Add other interfaces here */
  1082. #endif
  1083. return ret;
  1084. }
  1085. /* power down chip */
  1086. static int wm8750_remove(struct platform_device *pdev)
  1087. {
  1088. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  1089. struct snd_soc_codec *codec = socdev->codec;
  1090. if (codec->control_data)
  1091. wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
  1092. flush_scheduled_work();
  1093. snd_soc_free_pcms(socdev);
  1094. snd_soc_dapm_free(socdev);
  1095. #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
  1096. i2c_del_driver(&wm8750_i2c_driver);
  1097. #endif
  1098. kfree(codec);
  1099. return 0;
  1100. }
  1101. struct snd_soc_codec_device soc_codec_dev_wm8750 = {
  1102. .probe = wm8750_probe,
  1103. .remove = wm8750_remove,
  1104. .suspend = wm8750_suspend,
  1105. .resume = wm8750_resume,
  1106. };
  1107. EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750);
  1108. MODULE_DESCRIPTION("ASoC WM8750 driver");
  1109. MODULE_AUTHOR("Liam Girdwood");
  1110. MODULE_LICENSE("GPL");