iwl3945-base.c 121 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/sched.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/ieee80211_radiotap.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-sta.h"
  50. #include "iwl-3945.h"
  51. #include "iwl-helpers.h"
  52. #include "iwl-core.h"
  53. #include "iwl-dev.h"
  54. /*
  55. * module name, copyright, version, etc.
  56. */
  57. #define DRV_DESCRIPTION \
  58. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  59. #ifdef CONFIG_IWLWIFI_DEBUG
  60. #define VD "d"
  61. #else
  62. #define VD
  63. #endif
  64. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  65. #define VS "s"
  66. #else
  67. #define VS
  68. #endif
  69. #define IWL39_VERSION "1.2.26k" VD VS
  70. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  71. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  72. #define DRV_VERSION IWL39_VERSION
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  76. MODULE_LICENSE("GPL");
  77. /* module parameters */
  78. struct iwl_mod_params iwl3945_mod_params = {
  79. .sw_crypto = 1,
  80. .restart_fw = 1,
  81. /* the rest are 0 by default */
  82. };
  83. /**
  84. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  85. * @priv: eeprom and antenna fields are used to determine antenna flags
  86. *
  87. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  88. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  89. *
  90. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  91. * IWL_ANTENNA_MAIN - Force MAIN antenna
  92. * IWL_ANTENNA_AUX - Force AUX antenna
  93. */
  94. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  95. {
  96. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  97. switch (iwl3945_mod_params.antenna) {
  98. case IWL_ANTENNA_DIVERSITY:
  99. return 0;
  100. case IWL_ANTENNA_MAIN:
  101. if (eeprom->antenna_switch_type)
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  103. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  104. case IWL_ANTENNA_AUX:
  105. if (eeprom->antenna_switch_type)
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  108. }
  109. /* bad antenna selector value */
  110. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  111. iwl3945_mod_params.antenna);
  112. return 0; /* "diversity" is default if error */
  113. }
  114. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  115. struct ieee80211_key_conf *keyconf,
  116. u8 sta_id)
  117. {
  118. unsigned long flags;
  119. __le16 key_flags = 0;
  120. int ret;
  121. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  122. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  123. if (sta_id == priv->hw_params.bcast_sta_id)
  124. key_flags |= STA_KEY_MULTICAST_MSK;
  125. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  126. keyconf->hw_key_idx = keyconf->keyidx;
  127. key_flags &= ~STA_KEY_FLG_INVALID;
  128. spin_lock_irqsave(&priv->sta_lock, flags);
  129. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  130. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  131. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  132. keyconf->keylen);
  133. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  134. keyconf->keylen);
  135. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  136. == STA_KEY_FLG_NO_ENC)
  137. priv->stations[sta_id].sta.key.key_offset =
  138. iwl_get_free_ucode_key_index(priv);
  139. /* else, we are overriding an existing key => no need to allocated room
  140. * in uCode. */
  141. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  142. "no space for a new key");
  143. priv->stations[sta_id].sta.key.key_flags = key_flags;
  144. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  145. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  146. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  147. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  148. spin_unlock_irqrestore(&priv->sta_lock, flags);
  149. return ret;
  150. }
  151. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  152. struct ieee80211_key_conf *keyconf,
  153. u8 sta_id)
  154. {
  155. return -EOPNOTSUPP;
  156. }
  157. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  158. struct ieee80211_key_conf *keyconf,
  159. u8 sta_id)
  160. {
  161. return -EOPNOTSUPP;
  162. }
  163. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  164. {
  165. unsigned long flags;
  166. spin_lock_irqsave(&priv->sta_lock, flags);
  167. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  168. memset(&priv->stations[sta_id].sta.key, 0,
  169. sizeof(struct iwl4965_keyinfo));
  170. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  171. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  172. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  173. spin_unlock_irqrestore(&priv->sta_lock, flags);
  174. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  175. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  176. return 0;
  177. }
  178. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  179. struct ieee80211_key_conf *keyconf, u8 sta_id)
  180. {
  181. int ret = 0;
  182. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  183. switch (keyconf->alg) {
  184. case ALG_CCMP:
  185. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  186. break;
  187. case ALG_TKIP:
  188. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  189. break;
  190. case ALG_WEP:
  191. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  192. break;
  193. default:
  194. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  195. ret = -EINVAL;
  196. }
  197. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  198. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  199. sta_id, ret);
  200. return ret;
  201. }
  202. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  203. {
  204. int ret = -EOPNOTSUPP;
  205. return ret;
  206. }
  207. static int iwl3945_set_static_key(struct iwl_priv *priv,
  208. struct ieee80211_key_conf *key)
  209. {
  210. if (key->alg == ALG_WEP)
  211. return -EOPNOTSUPP;
  212. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  213. return -EINVAL;
  214. }
  215. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  216. {
  217. struct list_head *element;
  218. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  219. priv->frames_count);
  220. while (!list_empty(&priv->free_frames)) {
  221. element = priv->free_frames.next;
  222. list_del(element);
  223. kfree(list_entry(element, struct iwl3945_frame, list));
  224. priv->frames_count--;
  225. }
  226. if (priv->frames_count) {
  227. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  228. priv->frames_count);
  229. priv->frames_count = 0;
  230. }
  231. }
  232. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  233. {
  234. struct iwl3945_frame *frame;
  235. struct list_head *element;
  236. if (list_empty(&priv->free_frames)) {
  237. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  238. if (!frame) {
  239. IWL_ERR(priv, "Could not allocate frame!\n");
  240. return NULL;
  241. }
  242. priv->frames_count++;
  243. return frame;
  244. }
  245. element = priv->free_frames.next;
  246. list_del(element);
  247. return list_entry(element, struct iwl3945_frame, list);
  248. }
  249. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  250. {
  251. memset(frame, 0, sizeof(*frame));
  252. list_add(&frame->list, &priv->free_frames);
  253. }
  254. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  255. struct ieee80211_hdr *hdr,
  256. int left)
  257. {
  258. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  259. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  260. (priv->iw_mode != NL80211_IFTYPE_AP)))
  261. return 0;
  262. if (priv->ibss_beacon->len > left)
  263. return 0;
  264. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  265. return priv->ibss_beacon->len;
  266. }
  267. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  268. {
  269. struct iwl3945_frame *frame;
  270. unsigned int frame_size;
  271. int rc;
  272. u8 rate;
  273. frame = iwl3945_get_free_frame(priv);
  274. if (!frame) {
  275. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  276. "command.\n");
  277. return -ENOMEM;
  278. }
  279. rate = iwl_rate_get_lowest_plcp(priv);
  280. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  281. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  282. &frame->u.cmd[0]);
  283. iwl3945_free_frame(priv, frame);
  284. return rc;
  285. }
  286. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  287. {
  288. if (priv->shared_virt)
  289. pci_free_consistent(priv->pci_dev,
  290. sizeof(struct iwl3945_shared),
  291. priv->shared_virt,
  292. priv->shared_phys);
  293. }
  294. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  295. struct ieee80211_tx_info *info,
  296. struct iwl_device_cmd *cmd,
  297. struct sk_buff *skb_frag,
  298. int sta_id)
  299. {
  300. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  301. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  302. switch (keyinfo->alg) {
  303. case ALG_CCMP:
  304. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  305. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  306. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  307. break;
  308. case ALG_TKIP:
  309. break;
  310. case ALG_WEP:
  311. tx_cmd->sec_ctl = TX_CMD_SEC_WEP |
  312. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  313. if (keyinfo->keylen == 13)
  314. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  315. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  316. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  317. "with key %d\n", info->control.hw_key->hw_key_idx);
  318. break;
  319. default:
  320. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  321. break;
  322. }
  323. }
  324. /*
  325. * handle build REPLY_TX command notification.
  326. */
  327. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  328. struct iwl_device_cmd *cmd,
  329. struct ieee80211_tx_info *info,
  330. struct ieee80211_hdr *hdr, u8 std_id)
  331. {
  332. struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  333. __le32 tx_flags = tx_cmd->tx_flags;
  334. __le16 fc = hdr->frame_control;
  335. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  336. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  337. tx_flags |= TX_CMD_FLG_ACK_MSK;
  338. if (ieee80211_is_mgmt(fc))
  339. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  340. if (ieee80211_is_probe_resp(fc) &&
  341. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  342. tx_flags |= TX_CMD_FLG_TSF_MSK;
  343. } else {
  344. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  345. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  346. }
  347. tx_cmd->sta_id = std_id;
  348. if (ieee80211_has_morefrags(fc))
  349. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  350. if (ieee80211_is_data_qos(fc)) {
  351. u8 *qc = ieee80211_get_qos_ctl(hdr);
  352. tx_cmd->tid_tspec = qc[0] & 0xf;
  353. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  354. } else {
  355. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  356. }
  357. priv->cfg->ops->utils->rts_tx_cmd_flag(info, &tx_flags);
  358. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  359. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  360. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  361. if (ieee80211_is_mgmt(fc)) {
  362. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  363. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  364. else
  365. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  366. } else {
  367. tx_cmd->timeout.pm_frame_timeout = 0;
  368. }
  369. tx_cmd->driver_txop = 0;
  370. tx_cmd->tx_flags = tx_flags;
  371. tx_cmd->next_frame_len = 0;
  372. }
  373. /*
  374. * start REPLY_TX command process
  375. */
  376. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  377. {
  378. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  379. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  380. struct iwl3945_tx_cmd *tx_cmd;
  381. struct iwl_tx_queue *txq = NULL;
  382. struct iwl_queue *q = NULL;
  383. struct iwl_device_cmd *out_cmd;
  384. struct iwl_cmd_meta *out_meta;
  385. dma_addr_t phys_addr;
  386. dma_addr_t txcmd_phys;
  387. int txq_id = skb_get_queue_mapping(skb);
  388. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  389. u8 id;
  390. u8 unicast;
  391. u8 sta_id;
  392. u8 tid = 0;
  393. u16 seq_number = 0;
  394. __le16 fc;
  395. u8 wait_write_ptr = 0;
  396. u8 *qc = NULL;
  397. unsigned long flags;
  398. int rc;
  399. spin_lock_irqsave(&priv->lock, flags);
  400. if (iwl_is_rfkill(priv)) {
  401. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  402. goto drop_unlock;
  403. }
  404. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  405. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  406. goto drop_unlock;
  407. }
  408. unicast = !is_multicast_ether_addr(hdr->addr1);
  409. id = 0;
  410. fc = hdr->frame_control;
  411. #ifdef CONFIG_IWLWIFI_DEBUG
  412. if (ieee80211_is_auth(fc))
  413. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  414. else if (ieee80211_is_assoc_req(fc))
  415. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  416. else if (ieee80211_is_reassoc_req(fc))
  417. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  418. #endif
  419. /* drop all non-injected data frame if we are not associated */
  420. if (ieee80211_is_data(fc) &&
  421. !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
  422. (!iwl_is_associated(priv) ||
  423. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  424. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  425. goto drop_unlock;
  426. }
  427. spin_unlock_irqrestore(&priv->lock, flags);
  428. hdr_len = ieee80211_hdrlen(fc);
  429. /* Find (or create) index into station table for destination station */
  430. if (info->flags & IEEE80211_TX_CTL_INJECTED)
  431. sta_id = priv->hw_params.bcast_sta_id;
  432. else
  433. sta_id = iwl_get_sta_id(priv, hdr);
  434. if (sta_id == IWL_INVALID_STATION) {
  435. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  436. hdr->addr1);
  437. goto drop;
  438. }
  439. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  440. if (ieee80211_is_data_qos(fc)) {
  441. qc = ieee80211_get_qos_ctl(hdr);
  442. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  443. if (unlikely(tid >= MAX_TID_COUNT))
  444. goto drop;
  445. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  446. IEEE80211_SCTL_SEQ;
  447. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  448. (hdr->seq_ctrl &
  449. cpu_to_le16(IEEE80211_SCTL_FRAG));
  450. seq_number += 0x10;
  451. }
  452. /* Descriptor for chosen Tx queue */
  453. txq = &priv->txq[txq_id];
  454. q = &txq->q;
  455. spin_lock_irqsave(&priv->lock, flags);
  456. idx = get_cmd_index(q, q->write_ptr, 0);
  457. /* Set up driver data for this TFD */
  458. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  459. txq->txb[q->write_ptr].skb[0] = skb;
  460. /* Init first empty entry in queue's array of Tx/cmd buffers */
  461. out_cmd = txq->cmd[idx];
  462. out_meta = &txq->meta[idx];
  463. tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  464. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  465. memset(tx_cmd, 0, sizeof(*tx_cmd));
  466. /*
  467. * Set up the Tx-command (not MAC!) header.
  468. * Store the chosen Tx queue and TFD index within the sequence field;
  469. * after Tx, uCode's Tx response will return this value so driver can
  470. * locate the frame within the tx queue and do post-tx processing.
  471. */
  472. out_cmd->hdr.cmd = REPLY_TX;
  473. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  474. INDEX_TO_SEQ(q->write_ptr)));
  475. /* Copy MAC header from skb into command buffer */
  476. memcpy(tx_cmd->hdr, hdr, hdr_len);
  477. if (info->control.hw_key)
  478. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  479. /* TODO need this for burst mode later on */
  480. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  481. /* set is_hcca to 0; it probably will never be implemented */
  482. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  483. /* Total # bytes to be transmitted */
  484. len = (u16)skb->len;
  485. tx_cmd->len = cpu_to_le16(len);
  486. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  487. iwl_update_stats(priv, true, fc, len);
  488. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  489. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  490. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  491. txq->need_update = 1;
  492. if (qc)
  493. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  494. } else {
  495. wait_write_ptr = 1;
  496. txq->need_update = 0;
  497. }
  498. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  499. le16_to_cpu(out_cmd->hdr.sequence));
  500. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx_cmd->tx_flags));
  501. iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  502. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
  503. ieee80211_hdrlen(fc));
  504. /*
  505. * Use the first empty entry in this queue's command buffer array
  506. * to contain the Tx command and MAC header concatenated together
  507. * (payload data will be in another buffer).
  508. * Size of this varies, due to varying MAC header length.
  509. * If end is not dword aligned, we'll have 2 extra bytes at the end
  510. * of the MAC header (device reads on dword boundaries).
  511. * We'll tell device about this padding later.
  512. */
  513. len = sizeof(struct iwl3945_tx_cmd) +
  514. sizeof(struct iwl_cmd_header) + hdr_len;
  515. len_org = len;
  516. len = (len + 3) & ~3;
  517. if (len_org != len)
  518. len_org = 1;
  519. else
  520. len_org = 0;
  521. /* Physical address of this Tx command's header (not MAC header!),
  522. * within command buffer array. */
  523. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  524. len, PCI_DMA_TODEVICE);
  525. /* we do not map meta data ... so we can safely access address to
  526. * provide to unmap command*/
  527. pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
  528. pci_unmap_len_set(out_meta, len, len);
  529. /* Add buffer containing Tx command and MAC(!) header to TFD's
  530. * first entry */
  531. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  532. txcmd_phys, len, 1, 0);
  533. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  534. * if any (802.11 null frames have no payload). */
  535. len = skb->len - hdr_len;
  536. if (len) {
  537. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  538. len, PCI_DMA_TODEVICE);
  539. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  540. phys_addr, len,
  541. 0, U32_PAD(len));
  542. }
  543. /* Tell device the write index *just past* this latest filled TFD */
  544. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  545. rc = iwl_txq_update_write_ptr(priv, txq);
  546. spin_unlock_irqrestore(&priv->lock, flags);
  547. if (rc)
  548. return rc;
  549. if ((iwl_queue_space(q) < q->high_mark)
  550. && priv->mac80211_registered) {
  551. if (wait_write_ptr) {
  552. spin_lock_irqsave(&priv->lock, flags);
  553. txq->need_update = 1;
  554. iwl_txq_update_write_ptr(priv, txq);
  555. spin_unlock_irqrestore(&priv->lock, flags);
  556. }
  557. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  558. }
  559. return 0;
  560. drop_unlock:
  561. spin_unlock_irqrestore(&priv->lock, flags);
  562. drop:
  563. return -1;
  564. }
  565. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  566. #include "iwl-spectrum.h"
  567. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  568. #define BEACON_TIME_MASK_HIGH 0xFF000000
  569. #define TIME_UNIT 1024
  570. /*
  571. * extended beacon time format
  572. * time in usec will be changed into a 32-bit value in 8:24 format
  573. * the high 1 byte is the beacon counts
  574. * the lower 3 bytes is the time in usec within one beacon interval
  575. */
  576. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  577. {
  578. u32 quot;
  579. u32 rem;
  580. u32 interval = beacon_interval * 1024;
  581. if (!interval || !usec)
  582. return 0;
  583. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  584. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  585. return (quot << 24) + rem;
  586. }
  587. /* base is usually what we get from ucode with each received frame,
  588. * the same as HW timer counter counting down
  589. */
  590. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  591. {
  592. u32 base_low = base & BEACON_TIME_MASK_LOW;
  593. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  594. u32 interval = beacon_interval * TIME_UNIT;
  595. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  596. (addon & BEACON_TIME_MASK_HIGH);
  597. if (base_low > addon_low)
  598. res += base_low - addon_low;
  599. else if (base_low < addon_low) {
  600. res += interval + base_low - addon_low;
  601. res += (1 << 24);
  602. } else
  603. res += (1 << 24);
  604. return cpu_to_le32(res);
  605. }
  606. static int iwl3945_get_measurement(struct iwl_priv *priv,
  607. struct ieee80211_measurement_params *params,
  608. u8 type)
  609. {
  610. struct iwl_spectrum_cmd spectrum;
  611. struct iwl_rx_packet *pkt;
  612. struct iwl_host_cmd cmd = {
  613. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  614. .data = (void *)&spectrum,
  615. .flags = CMD_WANT_SKB,
  616. };
  617. u32 add_time = le64_to_cpu(params->start_time);
  618. int rc;
  619. int spectrum_resp_status;
  620. int duration = le16_to_cpu(params->duration);
  621. if (iwl_is_associated(priv))
  622. add_time =
  623. iwl3945_usecs_to_beacons(
  624. le64_to_cpu(params->start_time) - priv->last_tsf,
  625. le16_to_cpu(priv->rxon_timing.beacon_interval));
  626. memset(&spectrum, 0, sizeof(spectrum));
  627. spectrum.channel_count = cpu_to_le16(1);
  628. spectrum.flags =
  629. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  630. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  631. cmd.len = sizeof(spectrum);
  632. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  633. if (iwl_is_associated(priv))
  634. spectrum.start_time =
  635. iwl3945_add_beacon_time(priv->last_beacon_time,
  636. add_time,
  637. le16_to_cpu(priv->rxon_timing.beacon_interval));
  638. else
  639. spectrum.start_time = 0;
  640. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  641. spectrum.channels[0].channel = params->channel;
  642. spectrum.channels[0].type = type;
  643. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  644. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  645. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  646. rc = iwl_send_cmd_sync(priv, &cmd);
  647. if (rc)
  648. return rc;
  649. pkt = (struct iwl_rx_packet *)cmd.reply_page;
  650. if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
  651. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  652. rc = -EIO;
  653. }
  654. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  655. switch (spectrum_resp_status) {
  656. case 0: /* Command will be handled */
  657. if (pkt->u.spectrum.id != 0xff) {
  658. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  659. pkt->u.spectrum.id);
  660. priv->measurement_status &= ~MEASUREMENT_READY;
  661. }
  662. priv->measurement_status |= MEASUREMENT_ACTIVE;
  663. rc = 0;
  664. break;
  665. case 1: /* Command will not be handled */
  666. rc = -EAGAIN;
  667. break;
  668. }
  669. free_pages(cmd.reply_page, priv->hw_params.rx_page_order);
  670. return rc;
  671. }
  672. #endif
  673. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  674. struct iwl_rx_mem_buffer *rxb)
  675. {
  676. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  677. struct iwl_alive_resp *palive;
  678. struct delayed_work *pwork;
  679. palive = &pkt->u.alive_frame;
  680. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  681. "0x%01X 0x%01X\n",
  682. palive->is_valid, palive->ver_type,
  683. palive->ver_subtype);
  684. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  685. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  686. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  687. sizeof(struct iwl_alive_resp));
  688. pwork = &priv->init_alive_start;
  689. } else {
  690. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  691. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  692. sizeof(struct iwl_alive_resp));
  693. pwork = &priv->alive_start;
  694. iwl3945_disable_events(priv);
  695. }
  696. /* We delay the ALIVE response by 5ms to
  697. * give the HW RF Kill time to activate... */
  698. if (palive->is_valid == UCODE_VALID_OK)
  699. queue_delayed_work(priv->workqueue, pwork,
  700. msecs_to_jiffies(5));
  701. else
  702. IWL_WARN(priv, "uCode did not respond OK.\n");
  703. }
  704. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  705. struct iwl_rx_mem_buffer *rxb)
  706. {
  707. #ifdef CONFIG_IWLWIFI_DEBUG
  708. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  709. #endif
  710. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  711. return;
  712. }
  713. static void iwl3945_bg_beacon_update(struct work_struct *work)
  714. {
  715. struct iwl_priv *priv =
  716. container_of(work, struct iwl_priv, beacon_update);
  717. struct sk_buff *beacon;
  718. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  719. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  720. if (!beacon) {
  721. IWL_ERR(priv, "update beacon failed\n");
  722. return;
  723. }
  724. mutex_lock(&priv->mutex);
  725. /* new beacon skb is allocated every time; dispose previous.*/
  726. if (priv->ibss_beacon)
  727. dev_kfree_skb(priv->ibss_beacon);
  728. priv->ibss_beacon = beacon;
  729. mutex_unlock(&priv->mutex);
  730. iwl3945_send_beacon_cmd(priv);
  731. }
  732. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  733. struct iwl_rx_mem_buffer *rxb)
  734. {
  735. #ifdef CONFIG_IWLWIFI_DEBUG
  736. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  737. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  738. u8 rate = beacon->beacon_notify_hdr.rate;
  739. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  740. "tsf %d %d rate %d\n",
  741. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  742. beacon->beacon_notify_hdr.failure_frame,
  743. le32_to_cpu(beacon->ibss_mgr_status),
  744. le32_to_cpu(beacon->high_tsf),
  745. le32_to_cpu(beacon->low_tsf), rate);
  746. #endif
  747. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  748. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  749. queue_work(priv->workqueue, &priv->beacon_update);
  750. }
  751. /* Handle notification from uCode that card's power state is changing
  752. * due to software, hardware, or critical temperature RFKILL */
  753. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  754. struct iwl_rx_mem_buffer *rxb)
  755. {
  756. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  757. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  758. unsigned long status = priv->status;
  759. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  760. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  761. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  762. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  763. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  764. if (flags & HW_CARD_DISABLED)
  765. set_bit(STATUS_RF_KILL_HW, &priv->status);
  766. else
  767. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  768. iwl_scan_cancel(priv);
  769. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  770. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  771. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  772. test_bit(STATUS_RF_KILL_HW, &priv->status));
  773. else
  774. wake_up_interruptible(&priv->wait_command_queue);
  775. }
  776. /**
  777. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  778. *
  779. * Setup the RX handlers for each of the reply types sent from the uCode
  780. * to the host.
  781. *
  782. * This function chains into the hardware specific files for them to setup
  783. * any hardware specific handlers as well.
  784. */
  785. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  786. {
  787. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  788. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  789. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  790. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  791. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  792. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  793. iwl_rx_pm_debug_statistics_notif;
  794. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  795. /*
  796. * The same handler is used for both the REPLY to a discrete
  797. * statistics request from the host as well as for the periodic
  798. * statistics notifications (after received beacons) from the uCode.
  799. */
  800. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  801. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  802. iwl_setup_spectrum_handlers(priv);
  803. iwl_setup_rx_scan_handlers(priv);
  804. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  805. /* Set up hardware specific Rx handlers */
  806. iwl3945_hw_rx_handler_setup(priv);
  807. }
  808. /************************** RX-FUNCTIONS ****************************/
  809. /*
  810. * Rx theory of operation
  811. *
  812. * The host allocates 32 DMA target addresses and passes the host address
  813. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  814. * 0 to 31
  815. *
  816. * Rx Queue Indexes
  817. * The host/firmware share two index registers for managing the Rx buffers.
  818. *
  819. * The READ index maps to the first position that the firmware may be writing
  820. * to -- the driver can read up to (but not including) this position and get
  821. * good data.
  822. * The READ index is managed by the firmware once the card is enabled.
  823. *
  824. * The WRITE index maps to the last position the driver has read from -- the
  825. * position preceding WRITE is the last slot the firmware can place a packet.
  826. *
  827. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  828. * WRITE = READ.
  829. *
  830. * During initialization, the host sets up the READ queue position to the first
  831. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  832. *
  833. * When the firmware places a packet in a buffer, it will advance the READ index
  834. * and fire the RX interrupt. The driver can then query the READ index and
  835. * process as many packets as possible, moving the WRITE index forward as it
  836. * resets the Rx queue buffers with new memory.
  837. *
  838. * The management in the driver is as follows:
  839. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  840. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  841. * to replenish the iwl->rxq->rx_free.
  842. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  843. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  844. * 'processed' and 'read' driver indexes as well)
  845. * + A received packet is processed and handed to the kernel network stack,
  846. * detached from the iwl->rxq. The driver 'processed' index is updated.
  847. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  848. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  849. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  850. * were enough free buffers and RX_STALLED is set it is cleared.
  851. *
  852. *
  853. * Driver sequence:
  854. *
  855. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  856. * iwl3945_rx_queue_restock
  857. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  858. * queue, updates firmware pointers, and updates
  859. * the WRITE index. If insufficient rx_free buffers
  860. * are available, schedules iwl3945_rx_replenish
  861. *
  862. * -- enable interrupts --
  863. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  864. * READ INDEX, detaching the SKB from the pool.
  865. * Moves the packet buffer from queue to rx_used.
  866. * Calls iwl3945_rx_queue_restock to refill any empty
  867. * slots.
  868. * ...
  869. *
  870. */
  871. /**
  872. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  873. */
  874. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  875. dma_addr_t dma_addr)
  876. {
  877. return cpu_to_le32((u32)dma_addr);
  878. }
  879. /**
  880. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  881. *
  882. * If there are slots in the RX queue that need to be restocked,
  883. * and we have free pre-allocated buffers, fill the ranks as much
  884. * as we can, pulling from rx_free.
  885. *
  886. * This moves the 'write' index forward to catch up with 'processed', and
  887. * also updates the memory address in the firmware to reference the new
  888. * target buffer.
  889. */
  890. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  891. {
  892. struct iwl_rx_queue *rxq = &priv->rxq;
  893. struct list_head *element;
  894. struct iwl_rx_mem_buffer *rxb;
  895. unsigned long flags;
  896. int write, rc;
  897. spin_lock_irqsave(&rxq->lock, flags);
  898. write = rxq->write & ~0x7;
  899. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  900. /* Get next free Rx buffer, remove from free list */
  901. element = rxq->rx_free.next;
  902. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  903. list_del(element);
  904. /* Point to Rx buffer via next RBD in circular buffer */
  905. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
  906. rxq->queue[rxq->write] = rxb;
  907. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  908. rxq->free_count--;
  909. }
  910. spin_unlock_irqrestore(&rxq->lock, flags);
  911. /* If the pre-allocated buffer pool is dropping low, schedule to
  912. * refill it */
  913. if (rxq->free_count <= RX_LOW_WATERMARK)
  914. queue_work(priv->workqueue, &priv->rx_replenish);
  915. /* If we've added more space for the firmware to place data, tell it.
  916. * Increment device's write pointer in multiples of 8. */
  917. if ((rxq->write_actual != (rxq->write & ~0x7))
  918. || (abs(rxq->write - rxq->read) > 7)) {
  919. spin_lock_irqsave(&rxq->lock, flags);
  920. rxq->need_update = 1;
  921. spin_unlock_irqrestore(&rxq->lock, flags);
  922. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  923. if (rc)
  924. return rc;
  925. }
  926. return 0;
  927. }
  928. /**
  929. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  930. *
  931. * When moving to rx_free an SKB is allocated for the slot.
  932. *
  933. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  934. * This is called as a scheduled work item (except for during initialization)
  935. */
  936. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  937. {
  938. struct iwl_rx_queue *rxq = &priv->rxq;
  939. struct list_head *element;
  940. struct iwl_rx_mem_buffer *rxb;
  941. struct page *page;
  942. unsigned long flags;
  943. gfp_t gfp_mask = priority;
  944. while (1) {
  945. spin_lock_irqsave(&rxq->lock, flags);
  946. if (list_empty(&rxq->rx_used)) {
  947. spin_unlock_irqrestore(&rxq->lock, flags);
  948. return;
  949. }
  950. spin_unlock_irqrestore(&rxq->lock, flags);
  951. if (rxq->free_count > RX_LOW_WATERMARK)
  952. gfp_mask |= __GFP_NOWARN;
  953. if (priv->hw_params.rx_page_order > 0)
  954. gfp_mask |= __GFP_COMP;
  955. /* Alloc a new receive buffer */
  956. page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
  957. if (!page) {
  958. if (net_ratelimit())
  959. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  960. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  961. net_ratelimit())
  962. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  963. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  964. rxq->free_count);
  965. /* We don't reschedule replenish work here -- we will
  966. * call the restock method and if it still needs
  967. * more buffers it will schedule replenish */
  968. break;
  969. }
  970. spin_lock_irqsave(&rxq->lock, flags);
  971. if (list_empty(&rxq->rx_used)) {
  972. spin_unlock_irqrestore(&rxq->lock, flags);
  973. __free_pages(page, priv->hw_params.rx_page_order);
  974. return;
  975. }
  976. element = rxq->rx_used.next;
  977. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  978. list_del(element);
  979. spin_unlock_irqrestore(&rxq->lock, flags);
  980. rxb->page = page;
  981. /* Get physical address of RB/SKB */
  982. rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
  983. PAGE_SIZE << priv->hw_params.rx_page_order,
  984. PCI_DMA_FROMDEVICE);
  985. spin_lock_irqsave(&rxq->lock, flags);
  986. list_add_tail(&rxb->list, &rxq->rx_free);
  987. rxq->free_count++;
  988. priv->alloc_rxb_page++;
  989. spin_unlock_irqrestore(&rxq->lock, flags);
  990. }
  991. }
  992. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  993. {
  994. unsigned long flags;
  995. int i;
  996. spin_lock_irqsave(&rxq->lock, flags);
  997. INIT_LIST_HEAD(&rxq->rx_free);
  998. INIT_LIST_HEAD(&rxq->rx_used);
  999. /* Fill the rx_used queue with _all_ of the Rx buffers */
  1000. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  1001. /* In the reset function, these buffers may have been allocated
  1002. * to an SKB, so we need to unmap and free potential storage */
  1003. if (rxq->pool[i].page != NULL) {
  1004. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1005. PAGE_SIZE << priv->hw_params.rx_page_order,
  1006. PCI_DMA_FROMDEVICE);
  1007. priv->alloc_rxb_page--;
  1008. __free_pages(rxq->pool[i].page,
  1009. priv->hw_params.rx_page_order);
  1010. rxq->pool[i].page = NULL;
  1011. }
  1012. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1013. }
  1014. /* Set us so that we have processed and used all buffers, but have
  1015. * not restocked the Rx queue with fresh buffers */
  1016. rxq->read = rxq->write = 0;
  1017. rxq->write_actual = 0;
  1018. rxq->free_count = 0;
  1019. spin_unlock_irqrestore(&rxq->lock, flags);
  1020. }
  1021. void iwl3945_rx_replenish(void *data)
  1022. {
  1023. struct iwl_priv *priv = data;
  1024. unsigned long flags;
  1025. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1026. spin_lock_irqsave(&priv->lock, flags);
  1027. iwl3945_rx_queue_restock(priv);
  1028. spin_unlock_irqrestore(&priv->lock, flags);
  1029. }
  1030. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1031. {
  1032. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1033. iwl3945_rx_queue_restock(priv);
  1034. }
  1035. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1036. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1037. * This free routine walks the list of POOL entries and if SKB is set to
  1038. * non NULL it is unmapped and freed
  1039. */
  1040. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1041. {
  1042. int i;
  1043. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1044. if (rxq->pool[i].page != NULL) {
  1045. pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
  1046. PAGE_SIZE << priv->hw_params.rx_page_order,
  1047. PCI_DMA_FROMDEVICE);
  1048. __free_pages(rxq->pool[i].page,
  1049. priv->hw_params.rx_page_order);
  1050. rxq->pool[i].page = NULL;
  1051. priv->alloc_rxb_page--;
  1052. }
  1053. }
  1054. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1055. rxq->dma_addr);
  1056. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1057. rxq->rb_stts, rxq->rb_stts_dma);
  1058. rxq->bd = NULL;
  1059. rxq->rb_stts = NULL;
  1060. }
  1061. /* Convert linear signal-to-noise ratio into dB */
  1062. static u8 ratio2dB[100] = {
  1063. /* 0 1 2 3 4 5 6 7 8 9 */
  1064. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1065. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1066. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1067. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1068. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1069. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1070. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1071. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1072. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1073. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1074. };
  1075. /* Calculates a relative dB value from a ratio of linear
  1076. * (i.e. not dB) signal levels.
  1077. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1078. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1079. {
  1080. /* 1000:1 or higher just report as 60 dB */
  1081. if (sig_ratio >= 1000)
  1082. return 60;
  1083. /* 100:1 or higher, divide by 10 and use table,
  1084. * add 20 dB to make up for divide by 10 */
  1085. if (sig_ratio >= 100)
  1086. return 20 + (int)ratio2dB[sig_ratio/10];
  1087. /* We shouldn't see this */
  1088. if (sig_ratio < 1)
  1089. return 0;
  1090. /* Use table for ratios 1:1 - 99:1 */
  1091. return (int)ratio2dB[sig_ratio];
  1092. }
  1093. #define PERFECT_RSSI (-20) /* dBm */
  1094. #define WORST_RSSI (-95) /* dBm */
  1095. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1096. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1097. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1098. * about formulas used below. */
  1099. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1100. {
  1101. int sig_qual;
  1102. int degradation = PERFECT_RSSI - rssi_dbm;
  1103. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1104. * as indicator; formula is (signal dbm - noise dbm).
  1105. * SNR at or above 40 is a great signal (100%).
  1106. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1107. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1108. if (noise_dbm) {
  1109. if (rssi_dbm - noise_dbm >= 40)
  1110. return 100;
  1111. else if (rssi_dbm < noise_dbm)
  1112. return 0;
  1113. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1114. /* Else use just the signal level.
  1115. * This formula is a least squares fit of data points collected and
  1116. * compared with a reference system that had a percentage (%) display
  1117. * for signal quality. */
  1118. } else
  1119. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1120. (15 * RSSI_RANGE + 62 * degradation)) /
  1121. (RSSI_RANGE * RSSI_RANGE);
  1122. if (sig_qual > 100)
  1123. sig_qual = 100;
  1124. else if (sig_qual < 1)
  1125. sig_qual = 0;
  1126. return sig_qual;
  1127. }
  1128. /**
  1129. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1130. *
  1131. * Uses the priv->rx_handlers callback function array to invoke
  1132. * the appropriate handlers, including command responses,
  1133. * frame-received notifications, and other notifications.
  1134. */
  1135. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1136. {
  1137. struct iwl_rx_mem_buffer *rxb;
  1138. struct iwl_rx_packet *pkt;
  1139. struct iwl_rx_queue *rxq = &priv->rxq;
  1140. u32 r, i;
  1141. int reclaim;
  1142. unsigned long flags;
  1143. u8 fill_rx = 0;
  1144. u32 count = 8;
  1145. int total_empty = 0;
  1146. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1147. * buffer that the driver may process (last buffer filled by ucode). */
  1148. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1149. i = rxq->read;
  1150. /* calculate total frames need to be restock after handling RX */
  1151. total_empty = r - rxq->write_actual;
  1152. if (total_empty < 0)
  1153. total_empty += RX_QUEUE_SIZE;
  1154. if (total_empty > (RX_QUEUE_SIZE / 2))
  1155. fill_rx = 1;
  1156. /* Rx interrupt, but nothing sent from uCode */
  1157. if (i == r)
  1158. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1159. while (i != r) {
  1160. rxb = rxq->queue[i];
  1161. /* If an RXB doesn't have a Rx queue slot associated with it,
  1162. * then a bug has been introduced in the queue refilling
  1163. * routines -- catch it here */
  1164. BUG_ON(rxb == NULL);
  1165. rxq->queue[i] = NULL;
  1166. pci_unmap_page(priv->pci_dev, rxb->page_dma,
  1167. PAGE_SIZE << priv->hw_params.rx_page_order,
  1168. PCI_DMA_FROMDEVICE);
  1169. pkt = rxb_addr(rxb);
  1170. trace_iwlwifi_dev_rx(priv, pkt,
  1171. le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK);
  1172. /* Reclaim a command buffer only if this packet is a response
  1173. * to a (driver-originated) command.
  1174. * If the packet (e.g. Rx frame) originated from uCode,
  1175. * there is no command buffer to reclaim.
  1176. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1177. * but apparently a few don't get set; catch them here. */
  1178. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1179. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1180. (pkt->hdr.cmd != REPLY_TX);
  1181. /* Based on type of command response or notification,
  1182. * handle those that need handling via function in
  1183. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1184. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1185. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1186. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1187. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1188. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1189. } else {
  1190. /* No handling needed */
  1191. IWL_DEBUG_RX(priv,
  1192. "r %d i %d No handler needed for %s, 0x%02x\n",
  1193. r, i, get_cmd_string(pkt->hdr.cmd),
  1194. pkt->hdr.cmd);
  1195. }
  1196. /*
  1197. * XXX: After here, we should always check rxb->page
  1198. * against NULL before touching it or its virtual
  1199. * memory (pkt). Because some rx_handler might have
  1200. * already taken or freed the pages.
  1201. */
  1202. if (reclaim) {
  1203. /* Invoke any callbacks, transfer the buffer to caller,
  1204. * and fire off the (possibly) blocking iwl_send_cmd()
  1205. * as we reclaim the driver command queue */
  1206. if (rxb->page)
  1207. iwl_tx_cmd_complete(priv, rxb);
  1208. else
  1209. IWL_WARN(priv, "Claim null rxb?\n");
  1210. }
  1211. /* Reuse the page if possible. For notification packets and
  1212. * SKBs that fail to Rx correctly, add them back into the
  1213. * rx_free list for reuse later. */
  1214. spin_lock_irqsave(&rxq->lock, flags);
  1215. if (rxb->page != NULL) {
  1216. rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
  1217. 0, PAGE_SIZE << priv->hw_params.rx_page_order,
  1218. PCI_DMA_FROMDEVICE);
  1219. list_add_tail(&rxb->list, &rxq->rx_free);
  1220. rxq->free_count++;
  1221. } else
  1222. list_add_tail(&rxb->list, &rxq->rx_used);
  1223. spin_unlock_irqrestore(&rxq->lock, flags);
  1224. i = (i + 1) & RX_QUEUE_MASK;
  1225. /* If there are a lot of unused frames,
  1226. * restock the Rx queue so ucode won't assert. */
  1227. if (fill_rx) {
  1228. count++;
  1229. if (count >= 8) {
  1230. rxq->read = i;
  1231. iwl3945_rx_replenish_now(priv);
  1232. count = 0;
  1233. }
  1234. }
  1235. }
  1236. /* Backtrack one entry */
  1237. rxq->read = i;
  1238. if (fill_rx)
  1239. iwl3945_rx_replenish_now(priv);
  1240. else
  1241. iwl3945_rx_queue_restock(priv);
  1242. }
  1243. /* call this function to flush any scheduled tasklet */
  1244. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1245. {
  1246. /* wait to make sure we flush pending tasklet*/
  1247. synchronize_irq(priv->pci_dev->irq);
  1248. tasklet_kill(&priv->irq_tasklet);
  1249. }
  1250. static const char *desc_lookup(int i)
  1251. {
  1252. switch (i) {
  1253. case 1:
  1254. return "FAIL";
  1255. case 2:
  1256. return "BAD_PARAM";
  1257. case 3:
  1258. return "BAD_CHECKSUM";
  1259. case 4:
  1260. return "NMI_INTERRUPT";
  1261. case 5:
  1262. return "SYSASSERT";
  1263. case 6:
  1264. return "FATAL_ERROR";
  1265. }
  1266. return "UNKNOWN";
  1267. }
  1268. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1269. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1270. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1271. {
  1272. u32 i;
  1273. u32 desc, time, count, base, data1;
  1274. u32 blink1, blink2, ilink1, ilink2;
  1275. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1276. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1277. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1278. return;
  1279. }
  1280. count = iwl_read_targ_mem(priv, base);
  1281. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1282. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1283. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1284. priv->status, count);
  1285. }
  1286. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1287. "ilink1 nmiPC Line\n");
  1288. for (i = ERROR_START_OFFSET;
  1289. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1290. i += ERROR_ELEM_SIZE) {
  1291. desc = iwl_read_targ_mem(priv, base + i);
  1292. time =
  1293. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1294. blink1 =
  1295. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1296. blink2 =
  1297. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1298. ilink1 =
  1299. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1300. ilink2 =
  1301. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1302. data1 =
  1303. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1304. IWL_ERR(priv,
  1305. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1306. desc_lookup(desc), desc, time, blink1, blink2,
  1307. ilink1, ilink2, data1);
  1308. trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0,
  1309. 0, blink1, blink2, ilink1, ilink2);
  1310. }
  1311. }
  1312. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1313. /**
  1314. * iwl3945_print_event_log - Dump error event log to syslog
  1315. *
  1316. */
  1317. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1318. u32 num_events, u32 mode)
  1319. {
  1320. u32 i;
  1321. u32 base; /* SRAM byte address of event log header */
  1322. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1323. u32 ptr; /* SRAM byte address of log data */
  1324. u32 ev, time, data; /* event log data */
  1325. unsigned long reg_flags;
  1326. if (num_events == 0)
  1327. return;
  1328. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1329. if (mode == 0)
  1330. event_size = 2 * sizeof(u32);
  1331. else
  1332. event_size = 3 * sizeof(u32);
  1333. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1334. /* Make sure device is powered up for SRAM reads */
  1335. spin_lock_irqsave(&priv->reg_lock, reg_flags);
  1336. iwl_grab_nic_access(priv);
  1337. /* Set starting address; reads will auto-increment */
  1338. _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr);
  1339. rmb();
  1340. /* "time" is actually "data" for mode 0 (no timestamp).
  1341. * place event id # at far right for easier visual parsing. */
  1342. for (i = 0; i < num_events; i++) {
  1343. ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1344. time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1345. if (mode == 0) {
  1346. /* data, ev */
  1347. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1348. trace_iwlwifi_dev_ucode_event(priv, 0, time, ev);
  1349. } else {
  1350. data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1351. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1352. trace_iwlwifi_dev_ucode_event(priv, time, data, ev);
  1353. }
  1354. }
  1355. /* Allow device to power down */
  1356. iwl_release_nic_access(priv);
  1357. spin_unlock_irqrestore(&priv->reg_lock, reg_flags);
  1358. }
  1359. /**
  1360. * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog
  1361. */
  1362. static void iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity,
  1363. u32 num_wraps, u32 next_entry,
  1364. u32 size, u32 mode)
  1365. {
  1366. /*
  1367. * display the newest DEFAULT_LOG_ENTRIES entries
  1368. * i.e the entries just before the next ont that uCode would fill.
  1369. */
  1370. if (num_wraps) {
  1371. if (next_entry < size) {
  1372. iwl3945_print_event_log(priv,
  1373. capacity - (size - next_entry),
  1374. size - next_entry, mode);
  1375. iwl3945_print_event_log(priv, 0,
  1376. next_entry, mode);
  1377. } else
  1378. iwl3945_print_event_log(priv, next_entry - size,
  1379. size, mode);
  1380. } else {
  1381. if (next_entry < size)
  1382. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1383. else
  1384. iwl3945_print_event_log(priv, next_entry - size,
  1385. size, mode);
  1386. }
  1387. }
  1388. /* For sanity check only. Actual size is determined by uCode, typ. 512 */
  1389. #define IWL3945_MAX_EVENT_LOG_SIZE (512)
  1390. #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20)
  1391. void iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log)
  1392. {
  1393. u32 base; /* SRAM byte address of event log header */
  1394. u32 capacity; /* event log capacity in # entries */
  1395. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1396. u32 num_wraps; /* # times uCode wrapped to top of log */
  1397. u32 next_entry; /* index of next entry to be written by uCode */
  1398. u32 size; /* # entries that we'll print */
  1399. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1400. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1401. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1402. return;
  1403. }
  1404. /* event log header */
  1405. capacity = iwl_read_targ_mem(priv, base);
  1406. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1407. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1408. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1409. if (capacity > IWL3945_MAX_EVENT_LOG_SIZE) {
  1410. IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n",
  1411. capacity, IWL3945_MAX_EVENT_LOG_SIZE);
  1412. capacity = IWL3945_MAX_EVENT_LOG_SIZE;
  1413. }
  1414. if (next_entry > IWL3945_MAX_EVENT_LOG_SIZE) {
  1415. IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n",
  1416. next_entry, IWL3945_MAX_EVENT_LOG_SIZE);
  1417. next_entry = IWL3945_MAX_EVENT_LOG_SIZE;
  1418. }
  1419. size = num_wraps ? capacity : next_entry;
  1420. /* bail out if nothing in log */
  1421. if (size == 0) {
  1422. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1423. return;
  1424. }
  1425. #ifdef CONFIG_IWLWIFI_DEBUG
  1426. if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS))
  1427. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1428. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1429. #else
  1430. size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES)
  1431. ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size;
  1432. #endif
  1433. IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n",
  1434. size);
  1435. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1436. * i.e the next one that uCode would fill. */
  1437. if (num_wraps)
  1438. iwl3945_print_event_log(priv, next_entry,
  1439. capacity - next_entry, mode);
  1440. /* (then/else) start at top of log */
  1441. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1442. #ifdef CONFIG_IWLWIFI_DEBUG
  1443. if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) {
  1444. /* if uCode has wrapped back to top of log,
  1445. * start at the oldest entry,
  1446. * i.e the next one that uCode would fill.
  1447. */
  1448. if (num_wraps)
  1449. iwl3945_print_event_log(priv, next_entry,
  1450. capacity - next_entry, mode);
  1451. /* (then/else) start at top of log */
  1452. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1453. } else
  1454. iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1455. next_entry, size, mode);
  1456. #else
  1457. iwl3945_print_last_event_logs(priv, capacity, num_wraps,
  1458. next_entry, size, mode);
  1459. #endif
  1460. }
  1461. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1462. {
  1463. u32 inta, handled = 0;
  1464. u32 inta_fh;
  1465. unsigned long flags;
  1466. #ifdef CONFIG_IWLWIFI_DEBUG
  1467. u32 inta_mask;
  1468. #endif
  1469. spin_lock_irqsave(&priv->lock, flags);
  1470. /* Ack/clear/reset pending uCode interrupts.
  1471. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1472. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1473. inta = iwl_read32(priv, CSR_INT);
  1474. iwl_write32(priv, CSR_INT, inta);
  1475. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1476. * Any new interrupts that happen after this, either while we're
  1477. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1478. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1479. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1480. #ifdef CONFIG_IWLWIFI_DEBUG
  1481. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1482. /* just for debug */
  1483. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1484. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1485. inta, inta_mask, inta_fh);
  1486. }
  1487. #endif
  1488. spin_unlock_irqrestore(&priv->lock, flags);
  1489. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1490. * atomic, make sure that inta covers all the interrupts that
  1491. * we've discovered, even if FH interrupt came in just after
  1492. * reading CSR_INT. */
  1493. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1494. inta |= CSR_INT_BIT_FH_RX;
  1495. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1496. inta |= CSR_INT_BIT_FH_TX;
  1497. /* Now service all interrupt bits discovered above. */
  1498. if (inta & CSR_INT_BIT_HW_ERR) {
  1499. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1500. /* Tell the device to stop sending interrupts */
  1501. iwl_disable_interrupts(priv);
  1502. priv->isr_stats.hw++;
  1503. iwl_irq_handle_error(priv);
  1504. handled |= CSR_INT_BIT_HW_ERR;
  1505. return;
  1506. }
  1507. #ifdef CONFIG_IWLWIFI_DEBUG
  1508. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1509. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1510. if (inta & CSR_INT_BIT_SCD) {
  1511. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1512. "the frame/frames.\n");
  1513. priv->isr_stats.sch++;
  1514. }
  1515. /* Alive notification via Rx interrupt will do the real work */
  1516. if (inta & CSR_INT_BIT_ALIVE) {
  1517. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1518. priv->isr_stats.alive++;
  1519. }
  1520. }
  1521. #endif
  1522. /* Safely ignore these bits for debug checks below */
  1523. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1524. /* Error detected by uCode */
  1525. if (inta & CSR_INT_BIT_SW_ERR) {
  1526. IWL_ERR(priv, "Microcode SW error detected. "
  1527. "Restarting 0x%X.\n", inta);
  1528. priv->isr_stats.sw++;
  1529. priv->isr_stats.sw_err = inta;
  1530. iwl_irq_handle_error(priv);
  1531. handled |= CSR_INT_BIT_SW_ERR;
  1532. }
  1533. /* uCode wakes up after power-down sleep */
  1534. if (inta & CSR_INT_BIT_WAKEUP) {
  1535. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1536. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1537. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1538. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1539. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1540. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1541. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1542. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1543. priv->isr_stats.wakeup++;
  1544. handled |= CSR_INT_BIT_WAKEUP;
  1545. }
  1546. /* All uCode command responses, including Tx command responses,
  1547. * Rx "responses" (frame-received notification), and other
  1548. * notifications from uCode come through here*/
  1549. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1550. iwl3945_rx_handle(priv);
  1551. priv->isr_stats.rx++;
  1552. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1553. }
  1554. if (inta & CSR_INT_BIT_FH_TX) {
  1555. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1556. priv->isr_stats.tx++;
  1557. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1558. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1559. (FH39_SRVC_CHNL), 0x0);
  1560. handled |= CSR_INT_BIT_FH_TX;
  1561. }
  1562. if (inta & ~handled) {
  1563. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1564. priv->isr_stats.unhandled++;
  1565. }
  1566. if (inta & ~priv->inta_mask) {
  1567. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1568. inta & ~priv->inta_mask);
  1569. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1570. }
  1571. /* Re-enable all interrupts */
  1572. /* only Re-enable if disabled by irq */
  1573. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1574. iwl_enable_interrupts(priv);
  1575. #ifdef CONFIG_IWLWIFI_DEBUG
  1576. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1577. inta = iwl_read32(priv, CSR_INT);
  1578. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1579. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1580. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1581. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1582. }
  1583. #endif
  1584. }
  1585. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1586. enum ieee80211_band band,
  1587. u8 is_active, u8 n_probes,
  1588. struct iwl3945_scan_channel *scan_ch)
  1589. {
  1590. struct ieee80211_channel *chan;
  1591. const struct ieee80211_supported_band *sband;
  1592. const struct iwl_channel_info *ch_info;
  1593. u16 passive_dwell = 0;
  1594. u16 active_dwell = 0;
  1595. int added, i;
  1596. sband = iwl_get_hw_mode(priv, band);
  1597. if (!sband)
  1598. return 0;
  1599. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1600. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1601. if (passive_dwell <= active_dwell)
  1602. passive_dwell = active_dwell + 1;
  1603. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1604. chan = priv->scan_request->channels[i];
  1605. if (chan->band != band)
  1606. continue;
  1607. scan_ch->channel = chan->hw_value;
  1608. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1609. if (!is_channel_valid(ch_info)) {
  1610. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1611. scan_ch->channel);
  1612. continue;
  1613. }
  1614. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1615. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1616. /* If passive , set up for auto-switch
  1617. * and use long active_dwell time.
  1618. */
  1619. if (!is_active || is_channel_passive(ch_info) ||
  1620. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1621. scan_ch->type = 0; /* passive */
  1622. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1623. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1624. } else {
  1625. scan_ch->type = 1; /* active */
  1626. }
  1627. /* Set direct probe bits. These may be used both for active
  1628. * scan channels (probes gets sent right away),
  1629. * or for passive channels (probes get se sent only after
  1630. * hearing clear Rx packet).*/
  1631. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1632. if (n_probes)
  1633. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1634. } else {
  1635. /* uCode v1 does not allow setting direct probe bits on
  1636. * passive channel. */
  1637. if ((scan_ch->type & 1) && n_probes)
  1638. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1639. }
  1640. /* Set txpower levels to defaults */
  1641. scan_ch->tpc.dsp_atten = 110;
  1642. /* scan_pwr_info->tpc.dsp_atten; */
  1643. /*scan_pwr_info->tpc.tx_gain; */
  1644. if (band == IEEE80211_BAND_5GHZ)
  1645. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1646. else {
  1647. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1648. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1649. * power level:
  1650. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1651. */
  1652. }
  1653. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1654. scan_ch->channel,
  1655. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1656. (scan_ch->type & 1) ?
  1657. active_dwell : passive_dwell);
  1658. scan_ch++;
  1659. added++;
  1660. }
  1661. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1662. return added;
  1663. }
  1664. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1665. struct ieee80211_rate *rates)
  1666. {
  1667. int i;
  1668. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1669. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1670. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1671. rates[i].hw_value_short = i;
  1672. rates[i].flags = 0;
  1673. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1674. /*
  1675. * If CCK != 1M then set short preamble rate flag.
  1676. */
  1677. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1678. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1679. }
  1680. }
  1681. }
  1682. /******************************************************************************
  1683. *
  1684. * uCode download functions
  1685. *
  1686. ******************************************************************************/
  1687. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1688. {
  1689. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1690. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1691. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1692. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1693. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1694. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1695. }
  1696. /**
  1697. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1698. * looking at all data.
  1699. */
  1700. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1701. {
  1702. u32 val;
  1703. u32 save_len = len;
  1704. int rc = 0;
  1705. u32 errcnt;
  1706. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1707. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1708. IWL39_RTC_INST_LOWER_BOUND);
  1709. errcnt = 0;
  1710. for (; len > 0; len -= sizeof(u32), image++) {
  1711. /* read data comes through single port, auto-incr addr */
  1712. /* NOTE: Use the debugless read so we don't flood kernel log
  1713. * if IWL_DL_IO is set */
  1714. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1715. if (val != le32_to_cpu(*image)) {
  1716. IWL_ERR(priv, "uCode INST section is invalid at "
  1717. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1718. save_len - len, val, le32_to_cpu(*image));
  1719. rc = -EIO;
  1720. errcnt++;
  1721. if (errcnt >= 20)
  1722. break;
  1723. }
  1724. }
  1725. if (!errcnt)
  1726. IWL_DEBUG_INFO(priv,
  1727. "ucode image in INSTRUCTION memory is good\n");
  1728. return rc;
  1729. }
  1730. /**
  1731. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1732. * using sample data 100 bytes apart. If these sample points are good,
  1733. * it's a pretty good bet that everything between them is good, too.
  1734. */
  1735. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1736. {
  1737. u32 val;
  1738. int rc = 0;
  1739. u32 errcnt = 0;
  1740. u32 i;
  1741. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1742. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1743. /* read data comes through single port, auto-incr addr */
  1744. /* NOTE: Use the debugless read so we don't flood kernel log
  1745. * if IWL_DL_IO is set */
  1746. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1747. i + IWL39_RTC_INST_LOWER_BOUND);
  1748. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1749. if (val != le32_to_cpu(*image)) {
  1750. #if 0 /* Enable this if you want to see details */
  1751. IWL_ERR(priv, "uCode INST section is invalid at "
  1752. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1753. i, val, *image);
  1754. #endif
  1755. rc = -EIO;
  1756. errcnt++;
  1757. if (errcnt >= 3)
  1758. break;
  1759. }
  1760. }
  1761. return rc;
  1762. }
  1763. /**
  1764. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1765. * and verify its contents
  1766. */
  1767. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1768. {
  1769. __le32 *image;
  1770. u32 len;
  1771. int rc = 0;
  1772. /* Try bootstrap */
  1773. image = (__le32 *)priv->ucode_boot.v_addr;
  1774. len = priv->ucode_boot.len;
  1775. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1776. if (rc == 0) {
  1777. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1778. return 0;
  1779. }
  1780. /* Try initialize */
  1781. image = (__le32 *)priv->ucode_init.v_addr;
  1782. len = priv->ucode_init.len;
  1783. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1784. if (rc == 0) {
  1785. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1786. return 0;
  1787. }
  1788. /* Try runtime/protocol */
  1789. image = (__le32 *)priv->ucode_code.v_addr;
  1790. len = priv->ucode_code.len;
  1791. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1792. if (rc == 0) {
  1793. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1794. return 0;
  1795. }
  1796. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1797. /* Since nothing seems to match, show first several data entries in
  1798. * instruction SRAM, so maybe visual inspection will give a clue.
  1799. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1800. image = (__le32 *)priv->ucode_boot.v_addr;
  1801. len = priv->ucode_boot.len;
  1802. rc = iwl3945_verify_inst_full(priv, image, len);
  1803. return rc;
  1804. }
  1805. static void iwl3945_nic_start(struct iwl_priv *priv)
  1806. {
  1807. /* Remove all resets to allow NIC to operate */
  1808. iwl_write32(priv, CSR_RESET, 0);
  1809. }
  1810. /**
  1811. * iwl3945_read_ucode - Read uCode images from disk file.
  1812. *
  1813. * Copy into buffers for card to fetch via bus-mastering
  1814. */
  1815. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1816. {
  1817. const struct iwl_ucode_header *ucode;
  1818. int ret = -EINVAL, index;
  1819. const struct firmware *ucode_raw;
  1820. /* firmware file name contains uCode/driver compatibility version */
  1821. const char *name_pre = priv->cfg->fw_name_pre;
  1822. const unsigned int api_max = priv->cfg->ucode_api_max;
  1823. const unsigned int api_min = priv->cfg->ucode_api_min;
  1824. char buf[25];
  1825. u8 *src;
  1826. size_t len;
  1827. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1828. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1829. * request_firmware() is synchronous, file is in memory on return. */
  1830. for (index = api_max; index >= api_min; index--) {
  1831. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1832. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1833. if (ret < 0) {
  1834. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1835. buf, ret);
  1836. if (ret == -ENOENT)
  1837. continue;
  1838. else
  1839. goto error;
  1840. } else {
  1841. if (index < api_max)
  1842. IWL_ERR(priv, "Loaded firmware %s, "
  1843. "which is deprecated. "
  1844. " Please use API v%u instead.\n",
  1845. buf, api_max);
  1846. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1847. "(%zd bytes) from disk\n",
  1848. buf, ucode_raw->size);
  1849. break;
  1850. }
  1851. }
  1852. if (ret < 0)
  1853. goto error;
  1854. /* Make sure that we got at least our header! */
  1855. if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
  1856. IWL_ERR(priv, "File size way too small!\n");
  1857. ret = -EINVAL;
  1858. goto err_release;
  1859. }
  1860. /* Data from ucode file: header followed by uCode images */
  1861. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1862. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1863. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1864. inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
  1865. data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
  1866. init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
  1867. init_data_size =
  1868. priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
  1869. boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
  1870. src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
  1871. /* api_ver should match the api version forming part of the
  1872. * firmware filename ... but we don't check for that and only rely
  1873. * on the API version read from firmware header from here on forward */
  1874. if (api_ver < api_min || api_ver > api_max) {
  1875. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1876. "Driver supports v%u, firmware is v%u.\n",
  1877. api_max, api_ver);
  1878. priv->ucode_ver = 0;
  1879. ret = -EINVAL;
  1880. goto err_release;
  1881. }
  1882. if (api_ver != api_max)
  1883. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1884. "got %u. New firmware can be obtained "
  1885. "from http://www.intellinuxwireless.org.\n",
  1886. api_max, api_ver);
  1887. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1888. IWL_UCODE_MAJOR(priv->ucode_ver),
  1889. IWL_UCODE_MINOR(priv->ucode_ver),
  1890. IWL_UCODE_API(priv->ucode_ver),
  1891. IWL_UCODE_SERIAL(priv->ucode_ver));
  1892. snprintf(priv->hw->wiphy->fw_version,
  1893. sizeof(priv->hw->wiphy->fw_version),
  1894. "%u.%u.%u.%u",
  1895. IWL_UCODE_MAJOR(priv->ucode_ver),
  1896. IWL_UCODE_MINOR(priv->ucode_ver),
  1897. IWL_UCODE_API(priv->ucode_ver),
  1898. IWL_UCODE_SERIAL(priv->ucode_ver));
  1899. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1900. priv->ucode_ver);
  1901. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1902. inst_size);
  1903. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1904. data_size);
  1905. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1906. init_size);
  1907. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1908. init_data_size);
  1909. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1910. boot_size);
  1911. /* Verify size of file vs. image size info in file's header */
  1912. if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
  1913. inst_size + data_size + init_size +
  1914. init_data_size + boot_size) {
  1915. IWL_DEBUG_INFO(priv,
  1916. "uCode file size %zd does not match expected size\n",
  1917. ucode_raw->size);
  1918. ret = -EINVAL;
  1919. goto err_release;
  1920. }
  1921. /* Verify that uCode images will fit in card's SRAM */
  1922. if (inst_size > IWL39_MAX_INST_SIZE) {
  1923. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1924. inst_size);
  1925. ret = -EINVAL;
  1926. goto err_release;
  1927. }
  1928. if (data_size > IWL39_MAX_DATA_SIZE) {
  1929. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1930. data_size);
  1931. ret = -EINVAL;
  1932. goto err_release;
  1933. }
  1934. if (init_size > IWL39_MAX_INST_SIZE) {
  1935. IWL_DEBUG_INFO(priv,
  1936. "uCode init instr len %d too large to fit in\n",
  1937. init_size);
  1938. ret = -EINVAL;
  1939. goto err_release;
  1940. }
  1941. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1942. IWL_DEBUG_INFO(priv,
  1943. "uCode init data len %d too large to fit in\n",
  1944. init_data_size);
  1945. ret = -EINVAL;
  1946. goto err_release;
  1947. }
  1948. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1949. IWL_DEBUG_INFO(priv,
  1950. "uCode boot instr len %d too large to fit in\n",
  1951. boot_size);
  1952. ret = -EINVAL;
  1953. goto err_release;
  1954. }
  1955. /* Allocate ucode buffers for card's bus-master loading ... */
  1956. /* Runtime instructions and 2 copies of data:
  1957. * 1) unmodified from disk
  1958. * 2) backup cache for save/restore during power-downs */
  1959. priv->ucode_code.len = inst_size;
  1960. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1961. priv->ucode_data.len = data_size;
  1962. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1963. priv->ucode_data_backup.len = data_size;
  1964. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1965. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1966. !priv->ucode_data_backup.v_addr)
  1967. goto err_pci_alloc;
  1968. /* Initialization instructions and data */
  1969. if (init_size && init_data_size) {
  1970. priv->ucode_init.len = init_size;
  1971. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1972. priv->ucode_init_data.len = init_data_size;
  1973. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1974. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1975. goto err_pci_alloc;
  1976. }
  1977. /* Bootstrap (instructions only, no data) */
  1978. if (boot_size) {
  1979. priv->ucode_boot.len = boot_size;
  1980. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1981. if (!priv->ucode_boot.v_addr)
  1982. goto err_pci_alloc;
  1983. }
  1984. /* Copy images into buffers for card's bus-master reads ... */
  1985. /* Runtime instructions (first block of data in file) */
  1986. len = inst_size;
  1987. IWL_DEBUG_INFO(priv,
  1988. "Copying (but not loading) uCode instr len %zd\n", len);
  1989. memcpy(priv->ucode_code.v_addr, src, len);
  1990. src += len;
  1991. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1992. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1993. /* Runtime data (2nd block)
  1994. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1995. len = data_size;
  1996. IWL_DEBUG_INFO(priv,
  1997. "Copying (but not loading) uCode data len %zd\n", len);
  1998. memcpy(priv->ucode_data.v_addr, src, len);
  1999. memcpy(priv->ucode_data_backup.v_addr, src, len);
  2000. src += len;
  2001. /* Initialization instructions (3rd block) */
  2002. if (init_size) {
  2003. len = init_size;
  2004. IWL_DEBUG_INFO(priv,
  2005. "Copying (but not loading) init instr len %zd\n", len);
  2006. memcpy(priv->ucode_init.v_addr, src, len);
  2007. src += len;
  2008. }
  2009. /* Initialization data (4th block) */
  2010. if (init_data_size) {
  2011. len = init_data_size;
  2012. IWL_DEBUG_INFO(priv,
  2013. "Copying (but not loading) init data len %zd\n", len);
  2014. memcpy(priv->ucode_init_data.v_addr, src, len);
  2015. src += len;
  2016. }
  2017. /* Bootstrap instructions (5th block) */
  2018. len = boot_size;
  2019. IWL_DEBUG_INFO(priv,
  2020. "Copying (but not loading) boot instr len %zd\n", len);
  2021. memcpy(priv->ucode_boot.v_addr, src, len);
  2022. /* We have our copies now, allow OS release its copies */
  2023. release_firmware(ucode_raw);
  2024. return 0;
  2025. err_pci_alloc:
  2026. IWL_ERR(priv, "failed to allocate pci memory\n");
  2027. ret = -ENOMEM;
  2028. iwl3945_dealloc_ucode_pci(priv);
  2029. err_release:
  2030. release_firmware(ucode_raw);
  2031. error:
  2032. return ret;
  2033. }
  2034. /**
  2035. * iwl3945_set_ucode_ptrs - Set uCode address location
  2036. *
  2037. * Tell initialization uCode where to find runtime uCode.
  2038. *
  2039. * BSM registers initially contain pointers to initialization uCode.
  2040. * We need to replace them to load runtime uCode inst and data,
  2041. * and to save runtime data when powering down.
  2042. */
  2043. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  2044. {
  2045. dma_addr_t pinst;
  2046. dma_addr_t pdata;
  2047. /* bits 31:0 for 3945 */
  2048. pinst = priv->ucode_code.p_addr;
  2049. pdata = priv->ucode_data_backup.p_addr;
  2050. /* Tell bootstrap uCode where to find image to load */
  2051. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2052. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2053. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2054. priv->ucode_data.len);
  2055. /* Inst byte count must be last to set up, bit 31 signals uCode
  2056. * that all new ptr/size info is in place */
  2057. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2058. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2059. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2060. return 0;
  2061. }
  2062. /**
  2063. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2064. *
  2065. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2066. *
  2067. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2068. */
  2069. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2070. {
  2071. /* Check alive response for "valid" sign from uCode */
  2072. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2073. /* We had an error bringing up the hardware, so take it
  2074. * all the way back down so we can try again */
  2075. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2076. goto restart;
  2077. }
  2078. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2079. * This is a paranoid check, because we would not have gotten the
  2080. * "initialize" alive if code weren't properly loaded. */
  2081. if (iwl3945_verify_ucode(priv)) {
  2082. /* Runtime instruction load was bad;
  2083. * take it all the way back down so we can try again */
  2084. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2085. goto restart;
  2086. }
  2087. /* Send pointers to protocol/runtime uCode image ... init code will
  2088. * load and launch runtime uCode, which will send us another "Alive"
  2089. * notification. */
  2090. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2091. if (iwl3945_set_ucode_ptrs(priv)) {
  2092. /* Runtime instruction load won't happen;
  2093. * take it all the way back down so we can try again */
  2094. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2095. goto restart;
  2096. }
  2097. return;
  2098. restart:
  2099. queue_work(priv->workqueue, &priv->restart);
  2100. }
  2101. /**
  2102. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2103. * from protocol/runtime uCode (initialization uCode's
  2104. * Alive gets handled by iwl3945_init_alive_start()).
  2105. */
  2106. static void iwl3945_alive_start(struct iwl_priv *priv)
  2107. {
  2108. int thermal_spin = 0;
  2109. u32 rfkill;
  2110. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2111. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2112. /* We had an error bringing up the hardware, so take it
  2113. * all the way back down so we can try again */
  2114. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2115. goto restart;
  2116. }
  2117. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2118. * This is a paranoid check, because we would not have gotten the
  2119. * "runtime" alive if code weren't properly loaded. */
  2120. if (iwl3945_verify_ucode(priv)) {
  2121. /* Runtime instruction load was bad;
  2122. * take it all the way back down so we can try again */
  2123. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2124. goto restart;
  2125. }
  2126. iwl_clear_stations_table(priv);
  2127. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2128. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2129. if (rfkill & 0x1) {
  2130. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2131. /* if RFKILL is not on, then wait for thermal
  2132. * sensor in adapter to kick in */
  2133. while (iwl3945_hw_get_temperature(priv) == 0) {
  2134. thermal_spin++;
  2135. udelay(10);
  2136. }
  2137. if (thermal_spin)
  2138. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2139. thermal_spin * 10);
  2140. } else
  2141. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2142. /* After the ALIVE response, we can send commands to 3945 uCode */
  2143. set_bit(STATUS_ALIVE, &priv->status);
  2144. if (iwl_is_rfkill(priv))
  2145. return;
  2146. ieee80211_wake_queues(priv->hw);
  2147. priv->active_rate = priv->rates_mask;
  2148. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2149. iwl_power_update_mode(priv, true);
  2150. if (iwl_is_associated(priv)) {
  2151. struct iwl3945_rxon_cmd *active_rxon =
  2152. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2153. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2154. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2155. } else {
  2156. /* Initialize our rx_config data */
  2157. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2158. }
  2159. /* Configure Bluetooth device coexistence support */
  2160. iwl_send_bt_config(priv);
  2161. /* Configure the adapter for unassociated operation */
  2162. iwlcore_commit_rxon(priv);
  2163. iwl3945_reg_txpower_periodic(priv);
  2164. iwl_leds_init(priv);
  2165. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2166. set_bit(STATUS_READY, &priv->status);
  2167. wake_up_interruptible(&priv->wait_command_queue);
  2168. /* reassociate for ADHOC mode */
  2169. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2170. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2171. priv->vif);
  2172. if (beacon)
  2173. iwl_mac_beacon_update(priv->hw, beacon);
  2174. }
  2175. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2176. iwl_set_mode(priv, priv->iw_mode);
  2177. return;
  2178. restart:
  2179. queue_work(priv->workqueue, &priv->restart);
  2180. }
  2181. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2182. static void __iwl3945_down(struct iwl_priv *priv)
  2183. {
  2184. unsigned long flags;
  2185. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2186. struct ieee80211_conf *conf = NULL;
  2187. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2188. conf = ieee80211_get_hw_conf(priv->hw);
  2189. if (!exit_pending)
  2190. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2191. iwl_clear_stations_table(priv);
  2192. /* Unblock any waiting calls */
  2193. wake_up_interruptible_all(&priv->wait_command_queue);
  2194. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2195. * exiting the module */
  2196. if (!exit_pending)
  2197. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2198. /* stop and reset the on-board processor */
  2199. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2200. /* tell the device to stop sending interrupts */
  2201. spin_lock_irqsave(&priv->lock, flags);
  2202. iwl_disable_interrupts(priv);
  2203. spin_unlock_irqrestore(&priv->lock, flags);
  2204. iwl_synchronize_irq(priv);
  2205. if (priv->mac80211_registered)
  2206. ieee80211_stop_queues(priv->hw);
  2207. /* If we have not previously called iwl3945_init() then
  2208. * clear all bits but the RF Kill bits and return */
  2209. if (!iwl_is_init(priv)) {
  2210. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2211. STATUS_RF_KILL_HW |
  2212. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2213. STATUS_GEO_CONFIGURED |
  2214. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2215. STATUS_EXIT_PENDING;
  2216. goto exit;
  2217. }
  2218. /* ...otherwise clear out all the status bits but the RF Kill
  2219. * bit and continue taking the NIC down. */
  2220. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2221. STATUS_RF_KILL_HW |
  2222. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2223. STATUS_GEO_CONFIGURED |
  2224. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2225. STATUS_FW_ERROR |
  2226. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2227. STATUS_EXIT_PENDING;
  2228. iwl3945_hw_txq_ctx_stop(priv);
  2229. iwl3945_hw_rxq_stop(priv);
  2230. /* Power-down device's busmaster DMA clocks */
  2231. iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  2232. udelay(5);
  2233. /* Stop the device, and put it in low power state */
  2234. priv->cfg->ops->lib->apm_ops.stop(priv);
  2235. exit:
  2236. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2237. if (priv->ibss_beacon)
  2238. dev_kfree_skb(priv->ibss_beacon);
  2239. priv->ibss_beacon = NULL;
  2240. /* clear out any free frames */
  2241. iwl3945_clear_free_frames(priv);
  2242. }
  2243. static void iwl3945_down(struct iwl_priv *priv)
  2244. {
  2245. mutex_lock(&priv->mutex);
  2246. __iwl3945_down(priv);
  2247. mutex_unlock(&priv->mutex);
  2248. iwl3945_cancel_deferred_work(priv);
  2249. }
  2250. #define MAX_HW_RESTARTS 5
  2251. static int __iwl3945_up(struct iwl_priv *priv)
  2252. {
  2253. int rc, i;
  2254. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2255. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2256. return -EIO;
  2257. }
  2258. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2259. IWL_ERR(priv, "ucode not available for device bring up\n");
  2260. return -EIO;
  2261. }
  2262. /* If platform's RF_KILL switch is NOT set to KILL */
  2263. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2264. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2265. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2266. else {
  2267. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2268. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2269. return -ENODEV;
  2270. }
  2271. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2272. rc = iwl3945_hw_nic_init(priv);
  2273. if (rc) {
  2274. IWL_ERR(priv, "Unable to int nic\n");
  2275. return rc;
  2276. }
  2277. /* make sure rfkill handshake bits are cleared */
  2278. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2279. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2280. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2281. /* clear (again), then enable host interrupts */
  2282. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2283. iwl_enable_interrupts(priv);
  2284. /* really make sure rfkill handshake bits are cleared */
  2285. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2286. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2287. /* Copy original ucode data image from disk into backup cache.
  2288. * This will be used to initialize the on-board processor's
  2289. * data SRAM for a clean start when the runtime program first loads. */
  2290. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2291. priv->ucode_data.len);
  2292. /* We return success when we resume from suspend and rf_kill is on. */
  2293. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2294. return 0;
  2295. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2296. iwl_clear_stations_table(priv);
  2297. /* load bootstrap state machine,
  2298. * load bootstrap program into processor's memory,
  2299. * prepare to load the "initialize" uCode */
  2300. priv->cfg->ops->lib->load_ucode(priv);
  2301. if (rc) {
  2302. IWL_ERR(priv,
  2303. "Unable to set up bootstrap uCode: %d\n", rc);
  2304. continue;
  2305. }
  2306. /* start card; "initialize" will load runtime ucode */
  2307. iwl3945_nic_start(priv);
  2308. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2309. return 0;
  2310. }
  2311. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2312. __iwl3945_down(priv);
  2313. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2314. /* tried to restart and config the device for as long as our
  2315. * patience could withstand */
  2316. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2317. return -EIO;
  2318. }
  2319. /*****************************************************************************
  2320. *
  2321. * Workqueue callbacks
  2322. *
  2323. *****************************************************************************/
  2324. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2325. {
  2326. struct iwl_priv *priv =
  2327. container_of(data, struct iwl_priv, init_alive_start.work);
  2328. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2329. return;
  2330. mutex_lock(&priv->mutex);
  2331. iwl3945_init_alive_start(priv);
  2332. mutex_unlock(&priv->mutex);
  2333. }
  2334. static void iwl3945_bg_alive_start(struct work_struct *data)
  2335. {
  2336. struct iwl_priv *priv =
  2337. container_of(data, struct iwl_priv, alive_start.work);
  2338. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2339. return;
  2340. mutex_lock(&priv->mutex);
  2341. iwl3945_alive_start(priv);
  2342. mutex_unlock(&priv->mutex);
  2343. }
  2344. /*
  2345. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2346. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2347. * *is* readable even when device has been SW_RESET into low power mode
  2348. * (e.g. during RF KILL).
  2349. */
  2350. static void iwl3945_rfkill_poll(struct work_struct *data)
  2351. {
  2352. struct iwl_priv *priv =
  2353. container_of(data, struct iwl_priv, rfkill_poll.work);
  2354. bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
  2355. bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
  2356. & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2357. if (new_rfkill != old_rfkill) {
  2358. if (new_rfkill)
  2359. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2360. else
  2361. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2362. wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
  2363. IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
  2364. new_rfkill ? "disable radio" : "enable radio");
  2365. }
  2366. /* Keep this running, even if radio now enabled. This will be
  2367. * cancelled in mac_start() if system decides to start again */
  2368. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2369. round_jiffies_relative(2 * HZ));
  2370. }
  2371. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2372. static void iwl3945_bg_request_scan(struct work_struct *data)
  2373. {
  2374. struct iwl_priv *priv =
  2375. container_of(data, struct iwl_priv, request_scan);
  2376. struct iwl_host_cmd cmd = {
  2377. .id = REPLY_SCAN_CMD,
  2378. .len = sizeof(struct iwl3945_scan_cmd),
  2379. .flags = CMD_SIZE_HUGE,
  2380. };
  2381. int rc = 0;
  2382. struct iwl3945_scan_cmd *scan;
  2383. struct ieee80211_conf *conf = NULL;
  2384. u8 n_probes = 0;
  2385. enum ieee80211_band band;
  2386. bool is_active = false;
  2387. conf = ieee80211_get_hw_conf(priv->hw);
  2388. mutex_lock(&priv->mutex);
  2389. cancel_delayed_work(&priv->scan_check);
  2390. if (!iwl_is_ready(priv)) {
  2391. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2392. goto done;
  2393. }
  2394. /* Make sure the scan wasn't canceled before this queued work
  2395. * was given the chance to run... */
  2396. if (!test_bit(STATUS_SCANNING, &priv->status))
  2397. goto done;
  2398. /* This should never be called or scheduled if there is currently
  2399. * a scan active in the hardware. */
  2400. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2401. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2402. "Ignoring second request.\n");
  2403. rc = -EIO;
  2404. goto done;
  2405. }
  2406. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2407. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2408. goto done;
  2409. }
  2410. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2411. IWL_DEBUG_HC(priv,
  2412. "Scan request while abort pending. Queuing.\n");
  2413. goto done;
  2414. }
  2415. if (iwl_is_rfkill(priv)) {
  2416. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2417. goto done;
  2418. }
  2419. if (!test_bit(STATUS_READY, &priv->status)) {
  2420. IWL_DEBUG_HC(priv,
  2421. "Scan request while uninitialized. Queuing.\n");
  2422. goto done;
  2423. }
  2424. if (!priv->scan_bands) {
  2425. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2426. goto done;
  2427. }
  2428. if (!priv->scan) {
  2429. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2430. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2431. if (!priv->scan) {
  2432. rc = -ENOMEM;
  2433. goto done;
  2434. }
  2435. }
  2436. scan = priv->scan;
  2437. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2438. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2439. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2440. if (iwl_is_associated(priv)) {
  2441. u16 interval = 0;
  2442. u32 extra;
  2443. u32 suspend_time = 100;
  2444. u32 scan_suspend_time = 100;
  2445. unsigned long flags;
  2446. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2447. spin_lock_irqsave(&priv->lock, flags);
  2448. interval = priv->beacon_int;
  2449. spin_unlock_irqrestore(&priv->lock, flags);
  2450. scan->suspend_time = 0;
  2451. scan->max_out_time = cpu_to_le32(200 * 1024);
  2452. if (!interval)
  2453. interval = suspend_time;
  2454. /*
  2455. * suspend time format:
  2456. * 0-19: beacon interval in usec (time before exec.)
  2457. * 20-23: 0
  2458. * 24-31: number of beacons (suspend between channels)
  2459. */
  2460. extra = (suspend_time / interval) << 24;
  2461. scan_suspend_time = 0xFF0FFFFF &
  2462. (extra | ((suspend_time % interval) * 1024));
  2463. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2464. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2465. scan_suspend_time, interval);
  2466. }
  2467. if (priv->scan_request->n_ssids) {
  2468. int i, p = 0;
  2469. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2470. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2471. /* always does wildcard anyway */
  2472. if (!priv->scan_request->ssids[i].ssid_len)
  2473. continue;
  2474. scan->direct_scan[p].id = WLAN_EID_SSID;
  2475. scan->direct_scan[p].len =
  2476. priv->scan_request->ssids[i].ssid_len;
  2477. memcpy(scan->direct_scan[p].ssid,
  2478. priv->scan_request->ssids[i].ssid,
  2479. priv->scan_request->ssids[i].ssid_len);
  2480. n_probes++;
  2481. p++;
  2482. }
  2483. is_active = true;
  2484. } else
  2485. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2486. /* We don't build a direct scan probe request; the uCode will do
  2487. * that based on the direct_mask added to each channel entry */
  2488. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2489. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2490. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2491. /* flags + rate selection */
  2492. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2493. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2494. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2495. scan->good_CRC_th = 0;
  2496. band = IEEE80211_BAND_2GHZ;
  2497. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2498. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2499. /*
  2500. * If active scaning is requested but a certain channel
  2501. * is marked passive, we can do active scanning if we
  2502. * detect transmissions.
  2503. */
  2504. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2505. band = IEEE80211_BAND_5GHZ;
  2506. } else {
  2507. IWL_WARN(priv, "Invalid scan band count\n");
  2508. goto done;
  2509. }
  2510. scan->tx_cmd.len = cpu_to_le16(
  2511. iwl_fill_probe_req(priv,
  2512. (struct ieee80211_mgmt *)scan->data,
  2513. priv->scan_request->ie,
  2514. priv->scan_request->ie_len,
  2515. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2516. /* select Rx antennas */
  2517. scan->flags |= iwl3945_get_antenna_flags(priv);
  2518. if (iwl_is_monitor_mode(priv))
  2519. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2520. scan->channel_count =
  2521. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2522. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2523. if (scan->channel_count == 0) {
  2524. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2525. goto done;
  2526. }
  2527. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2528. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2529. cmd.data = scan;
  2530. scan->len = cpu_to_le16(cmd.len);
  2531. set_bit(STATUS_SCAN_HW, &priv->status);
  2532. rc = iwl_send_cmd_sync(priv, &cmd);
  2533. if (rc)
  2534. goto done;
  2535. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2536. IWL_SCAN_CHECK_WATCHDOG);
  2537. mutex_unlock(&priv->mutex);
  2538. return;
  2539. done:
  2540. /* can not perform scan make sure we clear scanning
  2541. * bits from status so next scan request can be performed.
  2542. * if we dont clear scanning status bit here all next scan
  2543. * will fail
  2544. */
  2545. clear_bit(STATUS_SCAN_HW, &priv->status);
  2546. clear_bit(STATUS_SCANNING, &priv->status);
  2547. /* inform mac80211 scan aborted */
  2548. queue_work(priv->workqueue, &priv->scan_completed);
  2549. mutex_unlock(&priv->mutex);
  2550. }
  2551. static void iwl3945_bg_up(struct work_struct *data)
  2552. {
  2553. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2554. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2555. return;
  2556. mutex_lock(&priv->mutex);
  2557. __iwl3945_up(priv);
  2558. mutex_unlock(&priv->mutex);
  2559. }
  2560. static void iwl3945_bg_restart(struct work_struct *data)
  2561. {
  2562. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2563. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2564. return;
  2565. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2566. mutex_lock(&priv->mutex);
  2567. priv->vif = NULL;
  2568. priv->is_open = 0;
  2569. mutex_unlock(&priv->mutex);
  2570. iwl3945_down(priv);
  2571. ieee80211_restart_hw(priv->hw);
  2572. } else {
  2573. iwl3945_down(priv);
  2574. queue_work(priv->workqueue, &priv->up);
  2575. }
  2576. }
  2577. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2578. {
  2579. struct iwl_priv *priv =
  2580. container_of(data, struct iwl_priv, rx_replenish);
  2581. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2582. return;
  2583. mutex_lock(&priv->mutex);
  2584. iwl3945_rx_replenish(priv);
  2585. mutex_unlock(&priv->mutex);
  2586. }
  2587. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2588. void iwl3945_post_associate(struct iwl_priv *priv)
  2589. {
  2590. int rc = 0;
  2591. struct ieee80211_conf *conf = NULL;
  2592. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2593. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2594. return;
  2595. }
  2596. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2597. priv->assoc_id, priv->active_rxon.bssid_addr);
  2598. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2599. return;
  2600. if (!priv->vif || !priv->is_open)
  2601. return;
  2602. iwl_scan_cancel_timeout(priv, 200);
  2603. conf = ieee80211_get_hw_conf(priv->hw);
  2604. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2605. iwlcore_commit_rxon(priv);
  2606. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2607. iwl_setup_rxon_timing(priv);
  2608. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2609. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2610. if (rc)
  2611. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2612. "Attempting to continue.\n");
  2613. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2614. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2615. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2616. priv->assoc_id, priv->beacon_int);
  2617. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2618. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2619. else
  2620. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2621. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2622. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2623. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2624. else
  2625. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2626. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2627. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2628. }
  2629. iwlcore_commit_rxon(priv);
  2630. switch (priv->iw_mode) {
  2631. case NL80211_IFTYPE_STATION:
  2632. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2633. break;
  2634. case NL80211_IFTYPE_ADHOC:
  2635. priv->assoc_id = 1;
  2636. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2637. iwl3945_sync_sta(priv, IWL_STA_ID,
  2638. (priv->band == IEEE80211_BAND_5GHZ) ?
  2639. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2640. CMD_ASYNC);
  2641. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2642. iwl3945_send_beacon_cmd(priv);
  2643. break;
  2644. default:
  2645. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2646. __func__, priv->iw_mode);
  2647. break;
  2648. }
  2649. iwl_activate_qos(priv, 0);
  2650. /* we have just associated, don't start scan too early */
  2651. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2652. }
  2653. /*****************************************************************************
  2654. *
  2655. * mac80211 entry point functions
  2656. *
  2657. *****************************************************************************/
  2658. #define UCODE_READY_TIMEOUT (2 * HZ)
  2659. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2660. {
  2661. struct iwl_priv *priv = hw->priv;
  2662. int ret;
  2663. IWL_DEBUG_MAC80211(priv, "enter\n");
  2664. /* we should be verifying the device is ready to be opened */
  2665. mutex_lock(&priv->mutex);
  2666. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2667. * ucode filename and max sizes are card-specific. */
  2668. if (!priv->ucode_code.len) {
  2669. ret = iwl3945_read_ucode(priv);
  2670. if (ret) {
  2671. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2672. mutex_unlock(&priv->mutex);
  2673. goto out_release_irq;
  2674. }
  2675. }
  2676. ret = __iwl3945_up(priv);
  2677. mutex_unlock(&priv->mutex);
  2678. if (ret)
  2679. goto out_release_irq;
  2680. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2681. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2682. * mac80211 will not be run successfully. */
  2683. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2684. test_bit(STATUS_READY, &priv->status),
  2685. UCODE_READY_TIMEOUT);
  2686. if (!ret) {
  2687. if (!test_bit(STATUS_READY, &priv->status)) {
  2688. IWL_ERR(priv,
  2689. "Wait for START_ALIVE timeout after %dms.\n",
  2690. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2691. ret = -ETIMEDOUT;
  2692. goto out_release_irq;
  2693. }
  2694. }
  2695. /* ucode is running and will send rfkill notifications,
  2696. * no need to poll the killswitch state anymore */
  2697. cancel_delayed_work(&priv->rfkill_poll);
  2698. iwl_led_start(priv);
  2699. priv->is_open = 1;
  2700. IWL_DEBUG_MAC80211(priv, "leave\n");
  2701. return 0;
  2702. out_release_irq:
  2703. priv->is_open = 0;
  2704. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2705. return ret;
  2706. }
  2707. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2708. {
  2709. struct iwl_priv *priv = hw->priv;
  2710. IWL_DEBUG_MAC80211(priv, "enter\n");
  2711. if (!priv->is_open) {
  2712. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2713. return;
  2714. }
  2715. priv->is_open = 0;
  2716. if (iwl_is_ready_rf(priv)) {
  2717. /* stop mac, cancel any scan request and clear
  2718. * RXON_FILTER_ASSOC_MSK BIT
  2719. */
  2720. mutex_lock(&priv->mutex);
  2721. iwl_scan_cancel_timeout(priv, 100);
  2722. mutex_unlock(&priv->mutex);
  2723. }
  2724. iwl3945_down(priv);
  2725. flush_workqueue(priv->workqueue);
  2726. /* start polling the killswitch state again */
  2727. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2728. round_jiffies_relative(2 * HZ));
  2729. IWL_DEBUG_MAC80211(priv, "leave\n");
  2730. }
  2731. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2732. {
  2733. struct iwl_priv *priv = hw->priv;
  2734. IWL_DEBUG_MAC80211(priv, "enter\n");
  2735. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2736. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2737. if (iwl3945_tx_skb(priv, skb))
  2738. dev_kfree_skb_any(skb);
  2739. IWL_DEBUG_MAC80211(priv, "leave\n");
  2740. return NETDEV_TX_OK;
  2741. }
  2742. void iwl3945_config_ap(struct iwl_priv *priv)
  2743. {
  2744. int rc = 0;
  2745. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2746. return;
  2747. /* The following should be done only at AP bring up */
  2748. if (!(iwl_is_associated(priv))) {
  2749. /* RXON - unassoc (to set timing command) */
  2750. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2751. iwlcore_commit_rxon(priv);
  2752. /* RXON Timing */
  2753. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2754. iwl_setup_rxon_timing(priv);
  2755. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2756. sizeof(priv->rxon_timing),
  2757. &priv->rxon_timing);
  2758. if (rc)
  2759. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2760. "Attempting to continue.\n");
  2761. /* FIXME: what should be the assoc_id for AP? */
  2762. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2763. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2764. priv->staging_rxon.flags |=
  2765. RXON_FLG_SHORT_PREAMBLE_MSK;
  2766. else
  2767. priv->staging_rxon.flags &=
  2768. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2769. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2770. if (priv->assoc_capability &
  2771. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2772. priv->staging_rxon.flags |=
  2773. RXON_FLG_SHORT_SLOT_MSK;
  2774. else
  2775. priv->staging_rxon.flags &=
  2776. ~RXON_FLG_SHORT_SLOT_MSK;
  2777. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2778. priv->staging_rxon.flags &=
  2779. ~RXON_FLG_SHORT_SLOT_MSK;
  2780. }
  2781. /* restore RXON assoc */
  2782. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2783. iwlcore_commit_rxon(priv);
  2784. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2785. }
  2786. iwl3945_send_beacon_cmd(priv);
  2787. /* FIXME - we need to add code here to detect a totally new
  2788. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2789. * clear sta table, add BCAST sta... */
  2790. }
  2791. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2792. struct ieee80211_vif *vif,
  2793. struct ieee80211_sta *sta,
  2794. struct ieee80211_key_conf *key)
  2795. {
  2796. struct iwl_priv *priv = hw->priv;
  2797. const u8 *addr;
  2798. int ret = 0;
  2799. u8 sta_id = IWL_INVALID_STATION;
  2800. u8 static_key;
  2801. IWL_DEBUG_MAC80211(priv, "enter\n");
  2802. if (iwl3945_mod_params.sw_crypto) {
  2803. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2804. return -EOPNOTSUPP;
  2805. }
  2806. addr = sta ? sta->addr : iwl_bcast_addr;
  2807. static_key = !iwl_is_associated(priv);
  2808. if (!static_key) {
  2809. sta_id = iwl_find_station(priv, addr);
  2810. if (sta_id == IWL_INVALID_STATION) {
  2811. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2812. addr);
  2813. return -EINVAL;
  2814. }
  2815. }
  2816. mutex_lock(&priv->mutex);
  2817. iwl_scan_cancel_timeout(priv, 100);
  2818. mutex_unlock(&priv->mutex);
  2819. switch (cmd) {
  2820. case SET_KEY:
  2821. if (static_key)
  2822. ret = iwl3945_set_static_key(priv, key);
  2823. else
  2824. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2825. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2826. break;
  2827. case DISABLE_KEY:
  2828. if (static_key)
  2829. ret = iwl3945_remove_static_key(priv);
  2830. else
  2831. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2832. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2833. break;
  2834. default:
  2835. ret = -EINVAL;
  2836. }
  2837. IWL_DEBUG_MAC80211(priv, "leave\n");
  2838. return ret;
  2839. }
  2840. /*****************************************************************************
  2841. *
  2842. * sysfs attributes
  2843. *
  2844. *****************************************************************************/
  2845. #ifdef CONFIG_IWLWIFI_DEBUG
  2846. /*
  2847. * The following adds a new attribute to the sysfs representation
  2848. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2849. * used for controlling the debug level.
  2850. *
  2851. * See the level definitions in iwl for details.
  2852. *
  2853. * The debug_level being managed using sysfs below is a per device debug
  2854. * level that is used instead of the global debug level if it (the per
  2855. * device debug level) is set.
  2856. */
  2857. static ssize_t show_debug_level(struct device *d,
  2858. struct device_attribute *attr, char *buf)
  2859. {
  2860. struct iwl_priv *priv = dev_get_drvdata(d);
  2861. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2862. }
  2863. static ssize_t store_debug_level(struct device *d,
  2864. struct device_attribute *attr,
  2865. const char *buf, size_t count)
  2866. {
  2867. struct iwl_priv *priv = dev_get_drvdata(d);
  2868. unsigned long val;
  2869. int ret;
  2870. ret = strict_strtoul(buf, 0, &val);
  2871. if (ret)
  2872. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2873. else {
  2874. priv->debug_level = val;
  2875. if (iwl_alloc_traffic_mem(priv))
  2876. IWL_ERR(priv,
  2877. "Not enough memory to generate traffic log\n");
  2878. }
  2879. return strnlen(buf, count);
  2880. }
  2881. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2882. show_debug_level, store_debug_level);
  2883. #endif /* CONFIG_IWLWIFI_DEBUG */
  2884. static ssize_t show_temperature(struct device *d,
  2885. struct device_attribute *attr, char *buf)
  2886. {
  2887. struct iwl_priv *priv = dev_get_drvdata(d);
  2888. if (!iwl_is_alive(priv))
  2889. return -EAGAIN;
  2890. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2891. }
  2892. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2893. static ssize_t show_tx_power(struct device *d,
  2894. struct device_attribute *attr, char *buf)
  2895. {
  2896. struct iwl_priv *priv = dev_get_drvdata(d);
  2897. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2898. }
  2899. static ssize_t store_tx_power(struct device *d,
  2900. struct device_attribute *attr,
  2901. const char *buf, size_t count)
  2902. {
  2903. struct iwl_priv *priv = dev_get_drvdata(d);
  2904. char *p = (char *)buf;
  2905. u32 val;
  2906. val = simple_strtoul(p, &p, 10);
  2907. if (p == buf)
  2908. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2909. else
  2910. iwl3945_hw_reg_set_txpower(priv, val);
  2911. return count;
  2912. }
  2913. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2914. static ssize_t show_flags(struct device *d,
  2915. struct device_attribute *attr, char *buf)
  2916. {
  2917. struct iwl_priv *priv = dev_get_drvdata(d);
  2918. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2919. }
  2920. static ssize_t store_flags(struct device *d,
  2921. struct device_attribute *attr,
  2922. const char *buf, size_t count)
  2923. {
  2924. struct iwl_priv *priv = dev_get_drvdata(d);
  2925. u32 flags = simple_strtoul(buf, NULL, 0);
  2926. mutex_lock(&priv->mutex);
  2927. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2928. /* Cancel any currently running scans... */
  2929. if (iwl_scan_cancel_timeout(priv, 100))
  2930. IWL_WARN(priv, "Could not cancel scan.\n");
  2931. else {
  2932. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2933. flags);
  2934. priv->staging_rxon.flags = cpu_to_le32(flags);
  2935. iwlcore_commit_rxon(priv);
  2936. }
  2937. }
  2938. mutex_unlock(&priv->mutex);
  2939. return count;
  2940. }
  2941. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2942. static ssize_t show_filter_flags(struct device *d,
  2943. struct device_attribute *attr, char *buf)
  2944. {
  2945. struct iwl_priv *priv = dev_get_drvdata(d);
  2946. return sprintf(buf, "0x%04X\n",
  2947. le32_to_cpu(priv->active_rxon.filter_flags));
  2948. }
  2949. static ssize_t store_filter_flags(struct device *d,
  2950. struct device_attribute *attr,
  2951. const char *buf, size_t count)
  2952. {
  2953. struct iwl_priv *priv = dev_get_drvdata(d);
  2954. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2955. mutex_lock(&priv->mutex);
  2956. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2957. /* Cancel any currently running scans... */
  2958. if (iwl_scan_cancel_timeout(priv, 100))
  2959. IWL_WARN(priv, "Could not cancel scan.\n");
  2960. else {
  2961. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2962. "0x%04X\n", filter_flags);
  2963. priv->staging_rxon.filter_flags =
  2964. cpu_to_le32(filter_flags);
  2965. iwlcore_commit_rxon(priv);
  2966. }
  2967. }
  2968. mutex_unlock(&priv->mutex);
  2969. return count;
  2970. }
  2971. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2972. store_filter_flags);
  2973. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2974. static ssize_t show_measurement(struct device *d,
  2975. struct device_attribute *attr, char *buf)
  2976. {
  2977. struct iwl_priv *priv = dev_get_drvdata(d);
  2978. struct iwl_spectrum_notification measure_report;
  2979. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2980. u8 *data = (u8 *)&measure_report;
  2981. unsigned long flags;
  2982. spin_lock_irqsave(&priv->lock, flags);
  2983. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2984. spin_unlock_irqrestore(&priv->lock, flags);
  2985. return 0;
  2986. }
  2987. memcpy(&measure_report, &priv->measure_report, size);
  2988. priv->measurement_status = 0;
  2989. spin_unlock_irqrestore(&priv->lock, flags);
  2990. while (size && (PAGE_SIZE - len)) {
  2991. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2992. PAGE_SIZE - len, 1);
  2993. len = strlen(buf);
  2994. if (PAGE_SIZE - len)
  2995. buf[len++] = '\n';
  2996. ofs += 16;
  2997. size -= min(size, 16U);
  2998. }
  2999. return len;
  3000. }
  3001. static ssize_t store_measurement(struct device *d,
  3002. struct device_attribute *attr,
  3003. const char *buf, size_t count)
  3004. {
  3005. struct iwl_priv *priv = dev_get_drvdata(d);
  3006. struct ieee80211_measurement_params params = {
  3007. .channel = le16_to_cpu(priv->active_rxon.channel),
  3008. .start_time = cpu_to_le64(priv->last_tsf),
  3009. .duration = cpu_to_le16(1),
  3010. };
  3011. u8 type = IWL_MEASURE_BASIC;
  3012. u8 buffer[32];
  3013. u8 channel;
  3014. if (count) {
  3015. char *p = buffer;
  3016. strncpy(buffer, buf, min(sizeof(buffer), count));
  3017. channel = simple_strtoul(p, NULL, 0);
  3018. if (channel)
  3019. params.channel = channel;
  3020. p = buffer;
  3021. while (*p && *p != ' ')
  3022. p++;
  3023. if (*p)
  3024. type = simple_strtoul(p + 1, NULL, 0);
  3025. }
  3026. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  3027. "channel %d (for '%s')\n", type, params.channel, buf);
  3028. iwl3945_get_measurement(priv, &params, type);
  3029. return count;
  3030. }
  3031. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  3032. show_measurement, store_measurement);
  3033. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  3034. static ssize_t store_retry_rate(struct device *d,
  3035. struct device_attribute *attr,
  3036. const char *buf, size_t count)
  3037. {
  3038. struct iwl_priv *priv = dev_get_drvdata(d);
  3039. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  3040. if (priv->retry_rate <= 0)
  3041. priv->retry_rate = 1;
  3042. return count;
  3043. }
  3044. static ssize_t show_retry_rate(struct device *d,
  3045. struct device_attribute *attr, char *buf)
  3046. {
  3047. struct iwl_priv *priv = dev_get_drvdata(d);
  3048. return sprintf(buf, "%d", priv->retry_rate);
  3049. }
  3050. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3051. store_retry_rate);
  3052. static ssize_t show_channels(struct device *d,
  3053. struct device_attribute *attr, char *buf)
  3054. {
  3055. /* all this shit doesn't belong into sysfs anyway */
  3056. return 0;
  3057. }
  3058. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3059. static ssize_t show_statistics(struct device *d,
  3060. struct device_attribute *attr, char *buf)
  3061. {
  3062. struct iwl_priv *priv = dev_get_drvdata(d);
  3063. u32 size = sizeof(struct iwl3945_notif_statistics);
  3064. u32 len = 0, ofs = 0;
  3065. u8 *data = (u8 *)&priv->statistics_39;
  3066. int rc = 0;
  3067. if (!iwl_is_alive(priv))
  3068. return -EAGAIN;
  3069. mutex_lock(&priv->mutex);
  3070. rc = iwl_send_statistics_request(priv, CMD_SYNC, false);
  3071. mutex_unlock(&priv->mutex);
  3072. if (rc) {
  3073. len = sprintf(buf,
  3074. "Error sending statistics request: 0x%08X\n", rc);
  3075. return len;
  3076. }
  3077. while (size && (PAGE_SIZE - len)) {
  3078. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3079. PAGE_SIZE - len, 1);
  3080. len = strlen(buf);
  3081. if (PAGE_SIZE - len)
  3082. buf[len++] = '\n';
  3083. ofs += 16;
  3084. size -= min(size, 16U);
  3085. }
  3086. return len;
  3087. }
  3088. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3089. static ssize_t show_antenna(struct device *d,
  3090. struct device_attribute *attr, char *buf)
  3091. {
  3092. struct iwl_priv *priv = dev_get_drvdata(d);
  3093. if (!iwl_is_alive(priv))
  3094. return -EAGAIN;
  3095. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3096. }
  3097. static ssize_t store_antenna(struct device *d,
  3098. struct device_attribute *attr,
  3099. const char *buf, size_t count)
  3100. {
  3101. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3102. int ant;
  3103. if (count == 0)
  3104. return 0;
  3105. if (sscanf(buf, "%1i", &ant) != 1) {
  3106. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3107. return count;
  3108. }
  3109. if ((ant >= 0) && (ant <= 2)) {
  3110. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3111. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3112. } else
  3113. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3114. return count;
  3115. }
  3116. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3117. static ssize_t show_status(struct device *d,
  3118. struct device_attribute *attr, char *buf)
  3119. {
  3120. struct iwl_priv *priv = dev_get_drvdata(d);
  3121. if (!iwl_is_alive(priv))
  3122. return -EAGAIN;
  3123. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3124. }
  3125. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3126. static ssize_t dump_error_log(struct device *d,
  3127. struct device_attribute *attr,
  3128. const char *buf, size_t count)
  3129. {
  3130. struct iwl_priv *priv = dev_get_drvdata(d);
  3131. char *p = (char *)buf;
  3132. if (p[0] == '1')
  3133. iwl3945_dump_nic_error_log(priv);
  3134. return strnlen(buf, count);
  3135. }
  3136. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3137. /*****************************************************************************
  3138. *
  3139. * driver setup and tear down
  3140. *
  3141. *****************************************************************************/
  3142. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3143. {
  3144. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3145. init_waitqueue_head(&priv->wait_command_queue);
  3146. INIT_WORK(&priv->up, iwl3945_bg_up);
  3147. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3148. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3149. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3150. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3151. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3152. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3153. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3154. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3155. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3156. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3157. iwl3945_hw_setup_deferred_work(priv);
  3158. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3159. iwl3945_irq_tasklet, (unsigned long)priv);
  3160. }
  3161. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3162. {
  3163. iwl3945_hw_cancel_deferred_work(priv);
  3164. cancel_delayed_work_sync(&priv->init_alive_start);
  3165. cancel_delayed_work(&priv->scan_check);
  3166. cancel_delayed_work(&priv->alive_start);
  3167. cancel_work_sync(&priv->beacon_update);
  3168. }
  3169. static struct attribute *iwl3945_sysfs_entries[] = {
  3170. &dev_attr_antenna.attr,
  3171. &dev_attr_channels.attr,
  3172. &dev_attr_dump_errors.attr,
  3173. &dev_attr_flags.attr,
  3174. &dev_attr_filter_flags.attr,
  3175. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3176. &dev_attr_measurement.attr,
  3177. #endif
  3178. &dev_attr_retry_rate.attr,
  3179. &dev_attr_statistics.attr,
  3180. &dev_attr_status.attr,
  3181. &dev_attr_temperature.attr,
  3182. &dev_attr_tx_power.attr,
  3183. #ifdef CONFIG_IWLWIFI_DEBUG
  3184. &dev_attr_debug_level.attr,
  3185. #endif
  3186. NULL
  3187. };
  3188. static struct attribute_group iwl3945_attribute_group = {
  3189. .name = NULL, /* put in device directory */
  3190. .attrs = iwl3945_sysfs_entries,
  3191. };
  3192. static struct ieee80211_ops iwl3945_hw_ops = {
  3193. .tx = iwl3945_mac_tx,
  3194. .start = iwl3945_mac_start,
  3195. .stop = iwl3945_mac_stop,
  3196. .add_interface = iwl_mac_add_interface,
  3197. .remove_interface = iwl_mac_remove_interface,
  3198. .config = iwl_mac_config,
  3199. .configure_filter = iwl_configure_filter,
  3200. .set_key = iwl3945_mac_set_key,
  3201. .get_tx_stats = iwl_mac_get_tx_stats,
  3202. .conf_tx = iwl_mac_conf_tx,
  3203. .reset_tsf = iwl_mac_reset_tsf,
  3204. .bss_info_changed = iwl_bss_info_changed,
  3205. .hw_scan = iwl_mac_hw_scan
  3206. };
  3207. static int iwl3945_init_drv(struct iwl_priv *priv)
  3208. {
  3209. int ret;
  3210. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3211. priv->retry_rate = 1;
  3212. priv->ibss_beacon = NULL;
  3213. spin_lock_init(&priv->lock);
  3214. spin_lock_init(&priv->sta_lock);
  3215. spin_lock_init(&priv->hcmd_lock);
  3216. INIT_LIST_HEAD(&priv->free_frames);
  3217. mutex_init(&priv->mutex);
  3218. /* Clear the driver's (not device's) station table */
  3219. iwl_clear_stations_table(priv);
  3220. priv->ieee_channels = NULL;
  3221. priv->ieee_rates = NULL;
  3222. priv->band = IEEE80211_BAND_2GHZ;
  3223. priv->iw_mode = NL80211_IFTYPE_STATION;
  3224. iwl_reset_qos(priv);
  3225. priv->qos_data.qos_active = 0;
  3226. priv->qos_data.qos_cap.val = 0;
  3227. priv->rates_mask = IWL_RATES_MASK;
  3228. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3229. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3230. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3231. eeprom->version);
  3232. ret = -EINVAL;
  3233. goto err;
  3234. }
  3235. ret = iwl_init_channel_map(priv);
  3236. if (ret) {
  3237. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3238. goto err;
  3239. }
  3240. /* Set up txpower settings in driver for all channels */
  3241. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3242. ret = -EIO;
  3243. goto err_free_channel_map;
  3244. }
  3245. ret = iwlcore_init_geos(priv);
  3246. if (ret) {
  3247. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3248. goto err_free_channel_map;
  3249. }
  3250. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3251. return 0;
  3252. err_free_channel_map:
  3253. iwl_free_channel_map(priv);
  3254. err:
  3255. return ret;
  3256. }
  3257. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3258. {
  3259. int ret;
  3260. struct ieee80211_hw *hw = priv->hw;
  3261. hw->rate_control_algorithm = "iwl-3945-rs";
  3262. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3263. /* Tell mac80211 our characteristics */
  3264. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3265. IEEE80211_HW_NOISE_DBM |
  3266. IEEE80211_HW_SPECTRUM_MGMT |
  3267. IEEE80211_HW_SUPPORTS_PS |
  3268. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3269. hw->wiphy->interface_modes =
  3270. BIT(NL80211_IFTYPE_STATION) |
  3271. BIT(NL80211_IFTYPE_ADHOC);
  3272. hw->wiphy->flags |= WIPHY_FLAG_STRICT_REGULATORY |
  3273. WIPHY_FLAG_DISABLE_BEACON_HINTS;
  3274. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3275. /* we create the 802.11 header and a zero-length SSID element */
  3276. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3277. /* Default value; 4 EDCA QOS priorities */
  3278. hw->queues = 4;
  3279. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3280. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3281. &priv->bands[IEEE80211_BAND_2GHZ];
  3282. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3283. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3284. &priv->bands[IEEE80211_BAND_5GHZ];
  3285. ret = ieee80211_register_hw(priv->hw);
  3286. if (ret) {
  3287. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3288. return ret;
  3289. }
  3290. priv->mac80211_registered = 1;
  3291. return 0;
  3292. }
  3293. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3294. {
  3295. int err = 0;
  3296. struct iwl_priv *priv;
  3297. struct ieee80211_hw *hw;
  3298. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3299. struct iwl3945_eeprom *eeprom;
  3300. unsigned long flags;
  3301. /***********************
  3302. * 1. Allocating HW data
  3303. * ********************/
  3304. /* mac80211 allocates memory for this device instance, including
  3305. * space for this driver's private structure */
  3306. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3307. if (hw == NULL) {
  3308. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3309. err = -ENOMEM;
  3310. goto out;
  3311. }
  3312. priv = hw->priv;
  3313. SET_IEEE80211_DEV(hw, &pdev->dev);
  3314. /*
  3315. * Disabling hardware scan means that mac80211 will perform scans
  3316. * "the hard way", rather than using device's scan.
  3317. */
  3318. if (iwl3945_mod_params.disable_hw_scan) {
  3319. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3320. iwl3945_hw_ops.hw_scan = NULL;
  3321. }
  3322. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3323. priv->cfg = cfg;
  3324. priv->pci_dev = pdev;
  3325. priv->inta_mask = CSR_INI_SET_MASK;
  3326. #ifdef CONFIG_IWLWIFI_DEBUG
  3327. atomic_set(&priv->restrict_refcnt, 0);
  3328. #endif
  3329. if (iwl_alloc_traffic_mem(priv))
  3330. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3331. /***************************
  3332. * 2. Initializing PCI bus
  3333. * *************************/
  3334. if (pci_enable_device(pdev)) {
  3335. err = -ENODEV;
  3336. goto out_ieee80211_free_hw;
  3337. }
  3338. pci_set_master(pdev);
  3339. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3340. if (!err)
  3341. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3342. if (err) {
  3343. IWL_WARN(priv, "No suitable DMA available.\n");
  3344. goto out_pci_disable_device;
  3345. }
  3346. pci_set_drvdata(pdev, priv);
  3347. err = pci_request_regions(pdev, DRV_NAME);
  3348. if (err)
  3349. goto out_pci_disable_device;
  3350. /***********************
  3351. * 3. Read REV Register
  3352. * ********************/
  3353. priv->hw_base = pci_iomap(pdev, 0, 0);
  3354. if (!priv->hw_base) {
  3355. err = -ENODEV;
  3356. goto out_pci_release_regions;
  3357. }
  3358. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3359. (unsigned long long) pci_resource_len(pdev, 0));
  3360. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3361. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3362. * PCI Tx retries from interfering with C3 CPU state */
  3363. pci_write_config_byte(pdev, 0x41, 0x00);
  3364. /* this spin lock will be used in apm_ops.init and EEPROM access
  3365. * we should init now
  3366. */
  3367. spin_lock_init(&priv->reg_lock);
  3368. /***********************
  3369. * 4. Read EEPROM
  3370. * ********************/
  3371. /* Read the EEPROM */
  3372. err = iwl_eeprom_init(priv);
  3373. if (err) {
  3374. IWL_ERR(priv, "Unable to init EEPROM\n");
  3375. goto out_iounmap;
  3376. }
  3377. /* MAC Address location in EEPROM same for 3945/4965 */
  3378. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3379. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3380. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3381. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3382. /***********************
  3383. * 5. Setup HW Constants
  3384. * ********************/
  3385. /* Device-specific setup */
  3386. if (iwl3945_hw_set_hw_params(priv)) {
  3387. IWL_ERR(priv, "failed to set hw settings\n");
  3388. goto out_eeprom_free;
  3389. }
  3390. /***********************
  3391. * 6. Setup priv
  3392. * ********************/
  3393. err = iwl3945_init_drv(priv);
  3394. if (err) {
  3395. IWL_ERR(priv, "initializing driver failed\n");
  3396. goto out_unset_hw_params;
  3397. }
  3398. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3399. priv->cfg->name);
  3400. /***********************
  3401. * 7. Setup Services
  3402. * ********************/
  3403. spin_lock_irqsave(&priv->lock, flags);
  3404. iwl_disable_interrupts(priv);
  3405. spin_unlock_irqrestore(&priv->lock, flags);
  3406. pci_enable_msi(priv->pci_dev);
  3407. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3408. IRQF_SHARED, DRV_NAME, priv);
  3409. if (err) {
  3410. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3411. goto out_disable_msi;
  3412. }
  3413. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3414. if (err) {
  3415. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3416. goto out_release_irq;
  3417. }
  3418. iwl_set_rxon_channel(priv,
  3419. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3420. iwl3945_setup_deferred_work(priv);
  3421. iwl3945_setup_rx_handlers(priv);
  3422. iwl_power_initialize(priv);
  3423. /*********************************
  3424. * 8. Setup and Register mac80211
  3425. * *******************************/
  3426. iwl_enable_interrupts(priv);
  3427. err = iwl3945_setup_mac(priv);
  3428. if (err)
  3429. goto out_remove_sysfs;
  3430. err = iwl_dbgfs_register(priv, DRV_NAME);
  3431. if (err)
  3432. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3433. /* Start monitoring the killswitch */
  3434. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3435. 2 * HZ);
  3436. return 0;
  3437. out_remove_sysfs:
  3438. destroy_workqueue(priv->workqueue);
  3439. priv->workqueue = NULL;
  3440. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3441. out_release_irq:
  3442. free_irq(priv->pci_dev->irq, priv);
  3443. out_disable_msi:
  3444. pci_disable_msi(priv->pci_dev);
  3445. iwlcore_free_geos(priv);
  3446. iwl_free_channel_map(priv);
  3447. out_unset_hw_params:
  3448. iwl3945_unset_hw_params(priv);
  3449. out_eeprom_free:
  3450. iwl_eeprom_free(priv);
  3451. out_iounmap:
  3452. pci_iounmap(pdev, priv->hw_base);
  3453. out_pci_release_regions:
  3454. pci_release_regions(pdev);
  3455. out_pci_disable_device:
  3456. pci_set_drvdata(pdev, NULL);
  3457. pci_disable_device(pdev);
  3458. out_ieee80211_free_hw:
  3459. iwl_free_traffic_mem(priv);
  3460. ieee80211_free_hw(priv->hw);
  3461. out:
  3462. return err;
  3463. }
  3464. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3465. {
  3466. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3467. unsigned long flags;
  3468. if (!priv)
  3469. return;
  3470. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3471. iwl_dbgfs_unregister(priv);
  3472. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3473. if (priv->mac80211_registered) {
  3474. ieee80211_unregister_hw(priv->hw);
  3475. priv->mac80211_registered = 0;
  3476. } else {
  3477. iwl3945_down(priv);
  3478. }
  3479. /*
  3480. * Make sure device is reset to low power before unloading driver.
  3481. * This may be redundant with iwl_down(), but there are paths to
  3482. * run iwl_down() without calling apm_ops.stop(), and there are
  3483. * paths to avoid running iwl_down() at all before leaving driver.
  3484. * This (inexpensive) call *makes sure* device is reset.
  3485. */
  3486. priv->cfg->ops->lib->apm_ops.stop(priv);
  3487. /* make sure we flush any pending irq or
  3488. * tasklet for the driver
  3489. */
  3490. spin_lock_irqsave(&priv->lock, flags);
  3491. iwl_disable_interrupts(priv);
  3492. spin_unlock_irqrestore(&priv->lock, flags);
  3493. iwl_synchronize_irq(priv);
  3494. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3495. cancel_delayed_work_sync(&priv->rfkill_poll);
  3496. iwl3945_dealloc_ucode_pci(priv);
  3497. if (priv->rxq.bd)
  3498. iwl3945_rx_queue_free(priv, &priv->rxq);
  3499. iwl3945_hw_txq_ctx_free(priv);
  3500. iwl3945_unset_hw_params(priv);
  3501. iwl_clear_stations_table(priv);
  3502. /*netif_stop_queue(dev); */
  3503. flush_workqueue(priv->workqueue);
  3504. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3505. * priv->workqueue... so we can't take down the workqueue
  3506. * until now... */
  3507. destroy_workqueue(priv->workqueue);
  3508. priv->workqueue = NULL;
  3509. iwl_free_traffic_mem(priv);
  3510. free_irq(pdev->irq, priv);
  3511. pci_disable_msi(pdev);
  3512. pci_iounmap(pdev, priv->hw_base);
  3513. pci_release_regions(pdev);
  3514. pci_disable_device(pdev);
  3515. pci_set_drvdata(pdev, NULL);
  3516. iwl_free_channel_map(priv);
  3517. iwlcore_free_geos(priv);
  3518. kfree(priv->scan);
  3519. if (priv->ibss_beacon)
  3520. dev_kfree_skb(priv->ibss_beacon);
  3521. ieee80211_free_hw(priv->hw);
  3522. }
  3523. /*****************************************************************************
  3524. *
  3525. * driver and module entry point
  3526. *
  3527. *****************************************************************************/
  3528. static struct pci_driver iwl3945_driver = {
  3529. .name = DRV_NAME,
  3530. .id_table = iwl3945_hw_card_ids,
  3531. .probe = iwl3945_pci_probe,
  3532. .remove = __devexit_p(iwl3945_pci_remove),
  3533. #ifdef CONFIG_PM
  3534. .suspend = iwl_pci_suspend,
  3535. .resume = iwl_pci_resume,
  3536. #endif
  3537. };
  3538. static int __init iwl3945_init(void)
  3539. {
  3540. int ret;
  3541. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3542. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3543. ret = iwl3945_rate_control_register();
  3544. if (ret) {
  3545. printk(KERN_ERR DRV_NAME
  3546. "Unable to register rate control algorithm: %d\n", ret);
  3547. return ret;
  3548. }
  3549. ret = pci_register_driver(&iwl3945_driver);
  3550. if (ret) {
  3551. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3552. goto error_register;
  3553. }
  3554. return ret;
  3555. error_register:
  3556. iwl3945_rate_control_unregister();
  3557. return ret;
  3558. }
  3559. static void __exit iwl3945_exit(void)
  3560. {
  3561. pci_unregister_driver(&iwl3945_driver);
  3562. iwl3945_rate_control_unregister();
  3563. }
  3564. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3565. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3566. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3567. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3568. MODULE_PARM_DESC(swcrypto,
  3569. "using software crypto (default 1 [software])\n");
  3570. #ifdef CONFIG_IWLWIFI_DEBUG
  3571. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3572. MODULE_PARM_DESC(debug, "debug output mask");
  3573. #endif
  3574. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3575. int, S_IRUGO);
  3576. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3577. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3578. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3579. module_exit(iwl3945_exit);
  3580. module_init(iwl3945_init);