qla_init.c 107 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. #include <linux/vmalloc.h>
  10. #include "qla_devtbl.h"
  11. #ifdef CONFIG_SPARC
  12. #include <asm/prom.h>
  13. #endif
  14. /*
  15. * QLogic ISP2x00 Hardware Support Function Prototypes.
  16. */
  17. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  18. static void qla2x00_resize_request_q(scsi_qla_host_t *);
  19. static int qla2x00_setup_chip(scsi_qla_host_t *);
  20. static void qla2x00_init_response_q_entries(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static int qla2x00_find_new_loop_id(scsi_qla_host_t *ha, fc_port_t *dev);
  33. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  34. static int qla84xx_init_chip(scsi_qla_host_t *);
  35. /****************************************************************************/
  36. /* QLogic ISP2x00 Hardware Support Functions. */
  37. /****************************************************************************/
  38. /*
  39. * qla2x00_initialize_adapter
  40. * Initialize board.
  41. *
  42. * Input:
  43. * ha = adapter block pointer.
  44. *
  45. * Returns:
  46. * 0 = success
  47. */
  48. int
  49. qla2x00_initialize_adapter(scsi_qla_host_t *ha)
  50. {
  51. int rval;
  52. /* Clear adapter flags. */
  53. ha->flags.online = 0;
  54. ha->flags.reset_active = 0;
  55. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  56. atomic_set(&ha->loop_state, LOOP_DOWN);
  57. ha->device_flags = DFLG_NO_CABLE;
  58. ha->dpc_flags = 0;
  59. ha->flags.management_server_logged_in = 0;
  60. ha->marker_needed = 0;
  61. ha->mbx_flags = 0;
  62. ha->isp_abort_cnt = 0;
  63. ha->beacon_blink_led = 0;
  64. set_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags);
  65. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  66. rval = ha->isp_ops->pci_config(ha);
  67. if (rval) {
  68. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  69. ha->host_no));
  70. return (rval);
  71. }
  72. ha->isp_ops->reset_chip(ha);
  73. ha->isp_ops->get_flash_version(ha, ha->request_ring);
  74. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  75. ha->isp_ops->nvram_config(ha);
  76. if (ha->flags.disable_serdes) {
  77. /* Mask HBA via NVRAM settings? */
  78. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  79. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  80. ha->port_name[0], ha->port_name[1],
  81. ha->port_name[2], ha->port_name[3],
  82. ha->port_name[4], ha->port_name[5],
  83. ha->port_name[6], ha->port_name[7]);
  84. return QLA_FUNCTION_FAILED;
  85. }
  86. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  87. if (qla2x00_isp_firmware(ha) != QLA_SUCCESS) {
  88. rval = ha->isp_ops->chip_diag(ha);
  89. if (rval)
  90. return (rval);
  91. rval = qla2x00_setup_chip(ha);
  92. if (rval)
  93. return (rval);
  94. qla2xxx_get_flash_info(ha);
  95. }
  96. if (IS_QLA84XX(ha)) {
  97. ha->cs84xx = qla84xx_get_chip(ha);
  98. if (!ha->cs84xx) {
  99. qla_printk(KERN_ERR, ha,
  100. "Unable to configure ISP84XX.\n");
  101. return QLA_FUNCTION_FAILED;
  102. }
  103. }
  104. rval = qla2x00_init_rings(ha);
  105. return (rval);
  106. }
  107. /**
  108. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  109. * @ha: HA context
  110. *
  111. * Returns 0 on success.
  112. */
  113. int
  114. qla2100_pci_config(scsi_qla_host_t *ha)
  115. {
  116. uint16_t w;
  117. uint32_t d;
  118. unsigned long flags;
  119. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  120. pci_set_master(ha->pdev);
  121. pci_try_set_mwi(ha->pdev);
  122. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  123. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  124. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  125. /* Reset expansion ROM address decode enable */
  126. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  127. d &= ~PCI_ROM_ADDRESS_ENABLE;
  128. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  129. /* Get PCI bus information. */
  130. spin_lock_irqsave(&ha->hardware_lock, flags);
  131. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  132. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  133. return QLA_SUCCESS;
  134. }
  135. /**
  136. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  137. * @ha: HA context
  138. *
  139. * Returns 0 on success.
  140. */
  141. int
  142. qla2300_pci_config(scsi_qla_host_t *ha)
  143. {
  144. uint16_t w;
  145. uint32_t d;
  146. unsigned long flags = 0;
  147. uint32_t cnt;
  148. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  149. pci_set_master(ha->pdev);
  150. pci_try_set_mwi(ha->pdev);
  151. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  152. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  153. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  154. w &= ~PCI_COMMAND_INTX_DISABLE;
  155. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  156. /*
  157. * If this is a 2300 card and not 2312, reset the
  158. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  159. * the 2310 also reports itself as a 2300 so we need to get the
  160. * fb revision level -- a 6 indicates it really is a 2300 and
  161. * not a 2310.
  162. */
  163. if (IS_QLA2300(ha)) {
  164. spin_lock_irqsave(&ha->hardware_lock, flags);
  165. /* Pause RISC. */
  166. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  167. for (cnt = 0; cnt < 30000; cnt++) {
  168. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  169. break;
  170. udelay(10);
  171. }
  172. /* Select FPM registers. */
  173. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  174. RD_REG_WORD(&reg->ctrl_status);
  175. /* Get the fb rev level */
  176. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  177. if (ha->fb_rev == FPM_2300)
  178. pci_clear_mwi(ha->pdev);
  179. /* Deselect FPM registers. */
  180. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  181. RD_REG_WORD(&reg->ctrl_status);
  182. /* Release RISC module. */
  183. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  184. for (cnt = 0; cnt < 30000; cnt++) {
  185. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  186. break;
  187. udelay(10);
  188. }
  189. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  190. }
  191. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  192. /* Reset expansion ROM address decode enable */
  193. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  194. d &= ~PCI_ROM_ADDRESS_ENABLE;
  195. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  196. /* Get PCI bus information. */
  197. spin_lock_irqsave(&ha->hardware_lock, flags);
  198. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  199. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  200. return QLA_SUCCESS;
  201. }
  202. /**
  203. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  204. * @ha: HA context
  205. *
  206. * Returns 0 on success.
  207. */
  208. int
  209. qla24xx_pci_config(scsi_qla_host_t *ha)
  210. {
  211. uint16_t w;
  212. uint32_t d;
  213. unsigned long flags = 0;
  214. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  215. pci_set_master(ha->pdev);
  216. pci_try_set_mwi(ha->pdev);
  217. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  218. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  219. w &= ~PCI_COMMAND_INTX_DISABLE;
  220. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  221. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  222. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  223. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  224. pcix_set_mmrbc(ha->pdev, 2048);
  225. /* PCIe -- adjust Maximum Read Request Size (2048). */
  226. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  227. pcie_set_readrq(ha->pdev, 2048);
  228. /* Reset expansion ROM address decode enable */
  229. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  230. d &= ~PCI_ROM_ADDRESS_ENABLE;
  231. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  232. ha->chip_revision = ha->pdev->revision;
  233. /* Get PCI bus information. */
  234. spin_lock_irqsave(&ha->hardware_lock, flags);
  235. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  236. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  237. return QLA_SUCCESS;
  238. }
  239. /**
  240. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  241. * @ha: HA context
  242. *
  243. * Returns 0 on success.
  244. */
  245. int
  246. qla25xx_pci_config(scsi_qla_host_t *ha)
  247. {
  248. uint16_t w;
  249. uint32_t d;
  250. pci_set_master(ha->pdev);
  251. pci_try_set_mwi(ha->pdev);
  252. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  253. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  254. w &= ~PCI_COMMAND_INTX_DISABLE;
  255. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  256. /* PCIe -- adjust Maximum Read Request Size (2048). */
  257. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  258. pcie_set_readrq(ha->pdev, 2048);
  259. /* Reset expansion ROM address decode enable */
  260. pci_read_config_dword(ha->pdev, PCI_ROM_ADDRESS, &d);
  261. d &= ~PCI_ROM_ADDRESS_ENABLE;
  262. pci_write_config_dword(ha->pdev, PCI_ROM_ADDRESS, d);
  263. ha->chip_revision = ha->pdev->revision;
  264. return QLA_SUCCESS;
  265. }
  266. /**
  267. * qla2x00_isp_firmware() - Choose firmware image.
  268. * @ha: HA context
  269. *
  270. * Returns 0 on success.
  271. */
  272. static int
  273. qla2x00_isp_firmware(scsi_qla_host_t *ha)
  274. {
  275. int rval;
  276. uint16_t loop_id, topo, sw_cap;
  277. uint8_t domain, area, al_pa;
  278. /* Assume loading risc code */
  279. rval = QLA_FUNCTION_FAILED;
  280. if (ha->flags.disable_risc_code_load) {
  281. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  282. ha->host_no));
  283. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  284. /* Verify checksum of loaded RISC code. */
  285. rval = qla2x00_verify_checksum(ha, ha->fw_srisc_address);
  286. if (rval == QLA_SUCCESS) {
  287. /* And, verify we are not in ROM code. */
  288. rval = qla2x00_get_adapter_id(ha, &loop_id, &al_pa,
  289. &area, &domain, &topo, &sw_cap);
  290. }
  291. }
  292. if (rval) {
  293. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  294. ha->host_no));
  295. }
  296. return (rval);
  297. }
  298. /**
  299. * qla2x00_reset_chip() - Reset ISP chip.
  300. * @ha: HA context
  301. *
  302. * Returns 0 on success.
  303. */
  304. void
  305. qla2x00_reset_chip(scsi_qla_host_t *ha)
  306. {
  307. unsigned long flags = 0;
  308. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  309. uint32_t cnt;
  310. uint16_t cmd;
  311. ha->isp_ops->disable_intrs(ha);
  312. spin_lock_irqsave(&ha->hardware_lock, flags);
  313. /* Turn off master enable */
  314. cmd = 0;
  315. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  316. cmd &= ~PCI_COMMAND_MASTER;
  317. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  318. if (!IS_QLA2100(ha)) {
  319. /* Pause RISC. */
  320. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  321. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  322. for (cnt = 0; cnt < 30000; cnt++) {
  323. if ((RD_REG_WORD(&reg->hccr) &
  324. HCCR_RISC_PAUSE) != 0)
  325. break;
  326. udelay(100);
  327. }
  328. } else {
  329. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  330. udelay(10);
  331. }
  332. /* Select FPM registers. */
  333. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  334. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  335. /* FPM Soft Reset. */
  336. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  337. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  338. /* Toggle Fpm Reset. */
  339. if (!IS_QLA2200(ha)) {
  340. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  341. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  342. }
  343. /* Select frame buffer registers. */
  344. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  345. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  346. /* Reset frame buffer FIFOs. */
  347. if (IS_QLA2200(ha)) {
  348. WRT_FB_CMD_REG(ha, reg, 0xa000);
  349. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  350. } else {
  351. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  352. /* Read back fb_cmd until zero or 3 seconds max */
  353. for (cnt = 0; cnt < 3000; cnt++) {
  354. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  355. break;
  356. udelay(100);
  357. }
  358. }
  359. /* Select RISC module registers. */
  360. WRT_REG_WORD(&reg->ctrl_status, 0);
  361. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  362. /* Reset RISC processor. */
  363. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  364. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  365. /* Release RISC processor. */
  366. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  367. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  368. }
  369. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  370. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  371. /* Reset ISP chip. */
  372. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  373. /* Wait for RISC to recover from reset. */
  374. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  375. /*
  376. * It is necessary to for a delay here since the card doesn't
  377. * respond to PCI reads during a reset. On some architectures
  378. * this will result in an MCA.
  379. */
  380. udelay(20);
  381. for (cnt = 30000; cnt; cnt--) {
  382. if ((RD_REG_WORD(&reg->ctrl_status) &
  383. CSR_ISP_SOFT_RESET) == 0)
  384. break;
  385. udelay(100);
  386. }
  387. } else
  388. udelay(10);
  389. /* Reset RISC processor. */
  390. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  391. WRT_REG_WORD(&reg->semaphore, 0);
  392. /* Release RISC processor. */
  393. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  394. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  395. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  396. for (cnt = 0; cnt < 30000; cnt++) {
  397. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  398. break;
  399. udelay(100);
  400. }
  401. } else
  402. udelay(100);
  403. /* Turn on master enable */
  404. cmd |= PCI_COMMAND_MASTER;
  405. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  406. /* Disable RISC pause on FPM parity error. */
  407. if (!IS_QLA2100(ha)) {
  408. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  409. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  410. }
  411. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  412. }
  413. /**
  414. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  415. * @ha: HA context
  416. *
  417. * Returns 0 on success.
  418. */
  419. static inline void
  420. qla24xx_reset_risc(scsi_qla_host_t *ha)
  421. {
  422. int hw_evt = 0;
  423. unsigned long flags = 0;
  424. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  425. uint32_t cnt, d2;
  426. uint16_t wd;
  427. spin_lock_irqsave(&ha->hardware_lock, flags);
  428. /* Reset RISC. */
  429. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  430. for (cnt = 0; cnt < 30000; cnt++) {
  431. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  432. break;
  433. udelay(10);
  434. }
  435. WRT_REG_DWORD(&reg->ctrl_status,
  436. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  437. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  438. udelay(100);
  439. /* Wait for firmware to complete NVRAM accesses. */
  440. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  441. for (cnt = 10000 ; cnt && d2; cnt--) {
  442. udelay(5);
  443. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  444. barrier();
  445. }
  446. if (cnt == 0)
  447. hw_evt = 1;
  448. /* Wait for soft-reset to complete. */
  449. d2 = RD_REG_DWORD(&reg->ctrl_status);
  450. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  451. udelay(5);
  452. d2 = RD_REG_DWORD(&reg->ctrl_status);
  453. barrier();
  454. }
  455. if (cnt == 0 || hw_evt)
  456. qla2xxx_hw_event_log(ha, HW_EVENT_RESET_ERR,
  457. RD_REG_WORD(&reg->mailbox1), RD_REG_WORD(&reg->mailbox2),
  458. RD_REG_WORD(&reg->mailbox3));
  459. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  460. RD_REG_DWORD(&reg->hccr);
  461. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  462. RD_REG_DWORD(&reg->hccr);
  463. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  464. RD_REG_DWORD(&reg->hccr);
  465. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  466. for (cnt = 6000000 ; cnt && d2; cnt--) {
  467. udelay(5);
  468. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  469. barrier();
  470. }
  471. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  472. }
  473. /**
  474. * qla24xx_reset_chip() - Reset ISP24xx chip.
  475. * @ha: HA context
  476. *
  477. * Returns 0 on success.
  478. */
  479. void
  480. qla24xx_reset_chip(scsi_qla_host_t *ha)
  481. {
  482. ha->isp_ops->disable_intrs(ha);
  483. /* Perform RISC reset. */
  484. qla24xx_reset_risc(ha);
  485. }
  486. /**
  487. * qla2x00_chip_diag() - Test chip for proper operation.
  488. * @ha: HA context
  489. *
  490. * Returns 0 on success.
  491. */
  492. int
  493. qla2x00_chip_diag(scsi_qla_host_t *ha)
  494. {
  495. int rval;
  496. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  497. unsigned long flags = 0;
  498. uint16_t data;
  499. uint32_t cnt;
  500. uint16_t mb[5];
  501. /* Assume a failed state */
  502. rval = QLA_FUNCTION_FAILED;
  503. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  504. ha->host_no, (u_long)&reg->flash_address));
  505. spin_lock_irqsave(&ha->hardware_lock, flags);
  506. /* Reset ISP chip. */
  507. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  508. /*
  509. * We need to have a delay here since the card will not respond while
  510. * in reset causing an MCA on some architectures.
  511. */
  512. udelay(20);
  513. data = qla2x00_debounce_register(&reg->ctrl_status);
  514. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  515. udelay(5);
  516. data = RD_REG_WORD(&reg->ctrl_status);
  517. barrier();
  518. }
  519. if (!cnt)
  520. goto chip_diag_failed;
  521. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  522. ha->host_no));
  523. /* Reset RISC processor. */
  524. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  525. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  526. /* Workaround for QLA2312 PCI parity error */
  527. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  528. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  529. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  530. udelay(5);
  531. data = RD_MAILBOX_REG(ha, reg, 0);
  532. barrier();
  533. }
  534. } else
  535. udelay(10);
  536. if (!cnt)
  537. goto chip_diag_failed;
  538. /* Check product ID of chip */
  539. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no));
  540. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  541. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  542. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  543. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  544. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  545. mb[3] != PROD_ID_3) {
  546. qla_printk(KERN_WARNING, ha,
  547. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  548. goto chip_diag_failed;
  549. }
  550. ha->product_id[0] = mb[1];
  551. ha->product_id[1] = mb[2];
  552. ha->product_id[2] = mb[3];
  553. ha->product_id[3] = mb[4];
  554. /* Adjust fw RISC transfer size */
  555. if (ha->request_q_length > 1024)
  556. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  557. else
  558. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  559. ha->request_q_length;
  560. if (IS_QLA2200(ha) &&
  561. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  562. /* Limit firmware transfer size with a 2200A */
  563. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  564. ha->host_no));
  565. ha->device_type |= DT_ISP2200A;
  566. ha->fw_transfer_size = 128;
  567. }
  568. /* Wrap Incoming Mailboxes Test. */
  569. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  570. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", ha->host_no));
  571. rval = qla2x00_mbx_reg_test(ha);
  572. if (rval) {
  573. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  574. ha->host_no));
  575. qla_printk(KERN_WARNING, ha,
  576. "Failed mailbox send register test\n");
  577. }
  578. else {
  579. /* Flag a successful rval */
  580. rval = QLA_SUCCESS;
  581. }
  582. spin_lock_irqsave(&ha->hardware_lock, flags);
  583. chip_diag_failed:
  584. if (rval)
  585. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  586. "****\n", ha->host_no));
  587. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  588. return (rval);
  589. }
  590. /**
  591. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  592. * @ha: HA context
  593. *
  594. * Returns 0 on success.
  595. */
  596. int
  597. qla24xx_chip_diag(scsi_qla_host_t *ha)
  598. {
  599. int rval;
  600. /* Perform RISC reset. */
  601. qla24xx_reset_risc(ha);
  602. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * ha->request_q_length;
  603. rval = qla2x00_mbx_reg_test(ha);
  604. if (rval) {
  605. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  606. ha->host_no));
  607. qla_printk(KERN_WARNING, ha,
  608. "Failed mailbox send register test\n");
  609. } else {
  610. /* Flag a successful rval */
  611. rval = QLA_SUCCESS;
  612. }
  613. return rval;
  614. }
  615. void
  616. qla2x00_alloc_fw_dump(scsi_qla_host_t *ha)
  617. {
  618. int rval;
  619. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  620. eft_size, fce_size;
  621. dma_addr_t tc_dma;
  622. void *tc;
  623. if (ha->fw_dump) {
  624. qla_printk(KERN_WARNING, ha,
  625. "Firmware dump previously allocated.\n");
  626. return;
  627. }
  628. ha->fw_dumped = 0;
  629. fixed_size = mem_size = eft_size = fce_size = 0;
  630. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  631. fixed_size = sizeof(struct qla2100_fw_dump);
  632. } else if (IS_QLA23XX(ha)) {
  633. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  634. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  635. sizeof(uint16_t);
  636. } else if (IS_FWI2_CAPABLE(ha)) {
  637. fixed_size = IS_QLA25XX(ha) ?
  638. offsetof(struct qla25xx_fw_dump, ext_mem):
  639. offsetof(struct qla24xx_fw_dump, ext_mem);
  640. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  641. sizeof(uint32_t);
  642. /* Allocate memory for Fibre Channel Event Buffer. */
  643. if (!IS_QLA25XX(ha))
  644. goto try_eft;
  645. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  646. GFP_KERNEL);
  647. if (!tc) {
  648. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  649. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  650. goto try_eft;
  651. }
  652. memset(tc, 0, FCE_SIZE);
  653. rval = qla2x00_enable_fce_trace(ha, tc_dma, FCE_NUM_BUFFERS,
  654. ha->fce_mb, &ha->fce_bufs);
  655. if (rval) {
  656. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  657. "FCE (%d).\n", rval);
  658. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  659. tc_dma);
  660. ha->flags.fce_enabled = 0;
  661. goto try_eft;
  662. }
  663. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  664. FCE_SIZE / 1024);
  665. fce_size = sizeof(struct qla2xxx_fce_chain) + EFT_SIZE;
  666. ha->flags.fce_enabled = 1;
  667. ha->fce_dma = tc_dma;
  668. ha->fce = tc;
  669. try_eft:
  670. /* Allocate memory for Extended Trace Buffer. */
  671. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  672. GFP_KERNEL);
  673. if (!tc) {
  674. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  675. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  676. goto cont_alloc;
  677. }
  678. memset(tc, 0, EFT_SIZE);
  679. rval = qla2x00_enable_eft_trace(ha, tc_dma, EFT_NUM_BUFFERS);
  680. if (rval) {
  681. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  682. "EFT (%d).\n", rval);
  683. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  684. tc_dma);
  685. goto cont_alloc;
  686. }
  687. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  688. EFT_SIZE / 1024);
  689. eft_size = EFT_SIZE;
  690. ha->eft_dma = tc_dma;
  691. ha->eft = tc;
  692. }
  693. cont_alloc:
  694. req_q_size = ha->request_q_length * sizeof(request_t);
  695. rsp_q_size = ha->response_q_length * sizeof(response_t);
  696. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  697. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size +
  698. eft_size + fce_size;
  699. ha->fw_dump = vmalloc(dump_size);
  700. if (!ha->fw_dump) {
  701. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  702. "firmware dump!!!\n", dump_size / 1024);
  703. if (ha->eft) {
  704. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  705. ha->eft_dma);
  706. ha->eft = NULL;
  707. ha->eft_dma = 0;
  708. }
  709. return;
  710. }
  711. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  712. dump_size / 1024);
  713. ha->fw_dump_len = dump_size;
  714. ha->fw_dump->signature[0] = 'Q';
  715. ha->fw_dump->signature[1] = 'L';
  716. ha->fw_dump->signature[2] = 'G';
  717. ha->fw_dump->signature[3] = 'C';
  718. ha->fw_dump->version = __constant_htonl(1);
  719. ha->fw_dump->fixed_size = htonl(fixed_size);
  720. ha->fw_dump->mem_size = htonl(mem_size);
  721. ha->fw_dump->req_q_size = htonl(req_q_size);
  722. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  723. ha->fw_dump->eft_size = htonl(eft_size);
  724. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  725. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  726. ha->fw_dump->header_size =
  727. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  728. }
  729. /**
  730. * qla2x00_resize_request_q() - Resize request queue given available ISP memory.
  731. * @ha: HA context
  732. *
  733. * Returns 0 on success.
  734. */
  735. static void
  736. qla2x00_resize_request_q(scsi_qla_host_t *ha)
  737. {
  738. int rval;
  739. uint16_t fw_iocb_cnt = 0;
  740. uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM;
  741. dma_addr_t request_dma;
  742. request_t *request_ring;
  743. /* Valid only on recent ISPs. */
  744. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  745. return;
  746. /* Retrieve IOCB counts available to the firmware. */
  747. rval = qla2x00_get_resource_cnts(ha, NULL, NULL, NULL, &fw_iocb_cnt,
  748. &ha->max_npiv_vports);
  749. if (rval)
  750. return;
  751. /* No point in continuing if current settings are sufficient. */
  752. if (fw_iocb_cnt < 1024)
  753. return;
  754. if (ha->request_q_length >= request_q_length)
  755. return;
  756. /* Attempt to claim larger area for request queue. */
  757. request_ring = dma_alloc_coherent(&ha->pdev->dev,
  758. (request_q_length + 1) * sizeof(request_t), &request_dma,
  759. GFP_KERNEL);
  760. if (request_ring == NULL)
  761. return;
  762. /* Resize successful, report extensions. */
  763. qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n",
  764. (ha->fw_memory_size + 1) / 1024);
  765. qla_printk(KERN_INFO, ha, "Resizing request queue depth "
  766. "(%d -> %d)...\n", ha->request_q_length, request_q_length);
  767. /* Clear old allocations. */
  768. dma_free_coherent(&ha->pdev->dev,
  769. (ha->request_q_length + 1) * sizeof(request_t), ha->request_ring,
  770. ha->request_dma);
  771. /* Begin using larger queue. */
  772. ha->request_q_length = request_q_length;
  773. ha->request_ring = request_ring;
  774. ha->request_dma = request_dma;
  775. }
  776. /**
  777. * qla2x00_setup_chip() - Load and start RISC firmware.
  778. * @ha: HA context
  779. *
  780. * Returns 0 on success.
  781. */
  782. static int
  783. qla2x00_setup_chip(scsi_qla_host_t *ha)
  784. {
  785. int rval;
  786. uint32_t srisc_address = 0;
  787. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  788. unsigned long flags;
  789. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  790. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  791. spin_lock_irqsave(&ha->hardware_lock, flags);
  792. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  793. RD_REG_WORD(&reg->hccr);
  794. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  795. }
  796. /* Load firmware sequences */
  797. rval = ha->isp_ops->load_risc(ha, &srisc_address);
  798. if (rval == QLA_SUCCESS) {
  799. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  800. "code.\n", ha->host_no));
  801. rval = qla2x00_verify_checksum(ha, srisc_address);
  802. if (rval == QLA_SUCCESS) {
  803. /* Start firmware execution. */
  804. DEBUG(printk("scsi(%ld): Checksum OK, start "
  805. "firmware.\n", ha->host_no));
  806. rval = qla2x00_execute_fw(ha, srisc_address);
  807. /* Retrieve firmware information. */
  808. if (rval == QLA_SUCCESS && ha->fw_major_version == 0) {
  809. qla2x00_get_fw_version(ha,
  810. &ha->fw_major_version,
  811. &ha->fw_minor_version,
  812. &ha->fw_subminor_version,
  813. &ha->fw_attributes, &ha->fw_memory_size);
  814. qla2x00_resize_request_q(ha);
  815. ha->flags.npiv_supported = 0;
  816. if ((IS_QLA24XX(ha) || IS_QLA25XX(ha) ||
  817. IS_QLA84XX(ha)) &&
  818. (ha->fw_attributes & BIT_2)) {
  819. ha->flags.npiv_supported = 1;
  820. if ((!ha->max_npiv_vports) ||
  821. ((ha->max_npiv_vports + 1) %
  822. MIN_MULTI_ID_FABRIC))
  823. ha->max_npiv_vports =
  824. MIN_MULTI_ID_FABRIC - 1;
  825. }
  826. if (ql2xallocfwdump)
  827. qla2x00_alloc_fw_dump(ha);
  828. }
  829. } else {
  830. DEBUG2(printk(KERN_INFO
  831. "scsi(%ld): ISP Firmware failed checksum.\n",
  832. ha->host_no));
  833. }
  834. }
  835. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  836. /* Enable proper parity. */
  837. spin_lock_irqsave(&ha->hardware_lock, flags);
  838. if (IS_QLA2300(ha))
  839. /* SRAM parity */
  840. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  841. else
  842. /* SRAM, Instruction RAM and GP RAM parity */
  843. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  844. RD_REG_WORD(&reg->hccr);
  845. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  846. }
  847. if (rval) {
  848. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  849. ha->host_no));
  850. }
  851. return (rval);
  852. }
  853. /**
  854. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  855. * @ha: HA context
  856. *
  857. * Beginning of request ring has initialization control block already built
  858. * by nvram config routine.
  859. *
  860. * Returns 0 on success.
  861. */
  862. static void
  863. qla2x00_init_response_q_entries(scsi_qla_host_t *ha)
  864. {
  865. uint16_t cnt;
  866. response_t *pkt;
  867. pkt = ha->response_ring_ptr;
  868. for (cnt = 0; cnt < ha->response_q_length; cnt++) {
  869. pkt->signature = RESPONSE_PROCESSED;
  870. pkt++;
  871. }
  872. }
  873. /**
  874. * qla2x00_update_fw_options() - Read and process firmware options.
  875. * @ha: HA context
  876. *
  877. * Returns 0 on success.
  878. */
  879. void
  880. qla2x00_update_fw_options(scsi_qla_host_t *ha)
  881. {
  882. uint16_t swing, emphasis, tx_sens, rx_sens;
  883. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  884. qla2x00_get_fw_options(ha, ha->fw_options);
  885. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  886. return;
  887. /* Serial Link options. */
  888. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  889. ha->host_no));
  890. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  891. sizeof(ha->fw_seriallink_options)));
  892. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  893. if (ha->fw_seriallink_options[3] & BIT_2) {
  894. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  895. /* 1G settings */
  896. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  897. emphasis = (ha->fw_seriallink_options[2] &
  898. (BIT_4 | BIT_3)) >> 3;
  899. tx_sens = ha->fw_seriallink_options[0] &
  900. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  901. rx_sens = (ha->fw_seriallink_options[0] &
  902. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  903. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  904. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  905. if (rx_sens == 0x0)
  906. rx_sens = 0x3;
  907. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  908. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  909. ha->fw_options[10] |= BIT_5 |
  910. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  911. (tx_sens & (BIT_1 | BIT_0));
  912. /* 2G settings */
  913. swing = (ha->fw_seriallink_options[2] &
  914. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  915. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  916. tx_sens = ha->fw_seriallink_options[1] &
  917. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  918. rx_sens = (ha->fw_seriallink_options[1] &
  919. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  920. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  921. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  922. if (rx_sens == 0x0)
  923. rx_sens = 0x3;
  924. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  925. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  926. ha->fw_options[11] |= BIT_5 |
  927. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  928. (tx_sens & (BIT_1 | BIT_0));
  929. }
  930. /* FCP2 options. */
  931. /* Return command IOCBs without waiting for an ABTS to complete. */
  932. ha->fw_options[3] |= BIT_13;
  933. /* LED scheme. */
  934. if (ha->flags.enable_led_scheme)
  935. ha->fw_options[2] |= BIT_12;
  936. /* Detect ISP6312. */
  937. if (IS_QLA6312(ha))
  938. ha->fw_options[2] |= BIT_13;
  939. /* Update firmware options. */
  940. qla2x00_set_fw_options(ha, ha->fw_options);
  941. }
  942. void
  943. qla24xx_update_fw_options(scsi_qla_host_t *ha)
  944. {
  945. int rval;
  946. /* Update Serial Link options. */
  947. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  948. return;
  949. rval = qla2x00_set_serdes_params(ha,
  950. le16_to_cpu(ha->fw_seriallink_options24[1]),
  951. le16_to_cpu(ha->fw_seriallink_options24[2]),
  952. le16_to_cpu(ha->fw_seriallink_options24[3]));
  953. if (rval != QLA_SUCCESS) {
  954. qla_printk(KERN_WARNING, ha,
  955. "Unable to update Serial Link options (%x).\n", rval);
  956. }
  957. }
  958. void
  959. qla2x00_config_rings(struct scsi_qla_host *ha)
  960. {
  961. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  962. /* Setup ring parameters in initialization control block. */
  963. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  964. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  965. ha->init_cb->request_q_length = cpu_to_le16(ha->request_q_length);
  966. ha->init_cb->response_q_length = cpu_to_le16(ha->response_q_length);
  967. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  968. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  969. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  970. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  971. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  972. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  973. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  974. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  975. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  976. }
  977. void
  978. qla24xx_config_rings(struct scsi_qla_host *ha)
  979. {
  980. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  981. struct init_cb_24xx *icb;
  982. /* Setup ring parameters in initialization control block. */
  983. icb = (struct init_cb_24xx *)ha->init_cb;
  984. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  985. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  986. icb->request_q_length = cpu_to_le16(ha->request_q_length);
  987. icb->response_q_length = cpu_to_le16(ha->response_q_length);
  988. icb->request_q_address[0] = cpu_to_le32(LSD(ha->request_dma));
  989. icb->request_q_address[1] = cpu_to_le32(MSD(ha->request_dma));
  990. icb->response_q_address[0] = cpu_to_le32(LSD(ha->response_dma));
  991. icb->response_q_address[1] = cpu_to_le32(MSD(ha->response_dma));
  992. WRT_REG_DWORD(&reg->req_q_in, 0);
  993. WRT_REG_DWORD(&reg->req_q_out, 0);
  994. WRT_REG_DWORD(&reg->rsp_q_in, 0);
  995. WRT_REG_DWORD(&reg->rsp_q_out, 0);
  996. RD_REG_DWORD(&reg->rsp_q_out);
  997. }
  998. /**
  999. * qla2x00_init_rings() - Initializes firmware.
  1000. * @ha: HA context
  1001. *
  1002. * Beginning of request ring has initialization control block already built
  1003. * by nvram config routine.
  1004. *
  1005. * Returns 0 on success.
  1006. */
  1007. static int
  1008. qla2x00_init_rings(scsi_qla_host_t *ha)
  1009. {
  1010. int rval;
  1011. unsigned long flags = 0;
  1012. int cnt;
  1013. struct mid_init_cb_24xx *mid_init_cb =
  1014. (struct mid_init_cb_24xx *) ha->init_cb;
  1015. spin_lock_irqsave(&ha->hardware_lock, flags);
  1016. /* Clear outstanding commands array. */
  1017. for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1018. ha->outstanding_cmds[cnt] = NULL;
  1019. ha->current_outstanding_cmd = 0;
  1020. /* Clear RSCN queue. */
  1021. ha->rscn_in_ptr = 0;
  1022. ha->rscn_out_ptr = 0;
  1023. /* Initialize firmware. */
  1024. ha->request_ring_ptr = ha->request_ring;
  1025. ha->req_ring_index = 0;
  1026. ha->req_q_cnt = ha->request_q_length;
  1027. ha->response_ring_ptr = ha->response_ring;
  1028. ha->rsp_ring_index = 0;
  1029. /* Initialize response queue entries */
  1030. qla2x00_init_response_q_entries(ha);
  1031. ha->isp_ops->config_rings(ha);
  1032. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1033. /* Update any ISP specific firmware options before initialization. */
  1034. ha->isp_ops->update_fw_options(ha);
  1035. DEBUG(printk("scsi(%ld): Issue init firmware.\n", ha->host_no));
  1036. if (ha->flags.npiv_supported)
  1037. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1038. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1039. rval = qla2x00_init_firmware(ha, ha->init_cb_size);
  1040. if (rval) {
  1041. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1042. ha->host_no));
  1043. } else {
  1044. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1045. ha->host_no));
  1046. }
  1047. return (rval);
  1048. }
  1049. /**
  1050. * qla2x00_fw_ready() - Waits for firmware ready.
  1051. * @ha: HA context
  1052. *
  1053. * Returns 0 on success.
  1054. */
  1055. static int
  1056. qla2x00_fw_ready(scsi_qla_host_t *ha)
  1057. {
  1058. int rval;
  1059. unsigned long wtime, mtime, cs84xx_time;
  1060. uint16_t min_wait; /* Minimum wait time if loop is down */
  1061. uint16_t wait_time; /* Wait time if loop is coming ready */
  1062. uint16_t state[3];
  1063. rval = QLA_SUCCESS;
  1064. /* 20 seconds for loop down. */
  1065. min_wait = 20;
  1066. /*
  1067. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1068. * our own processing.
  1069. */
  1070. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1071. wait_time = min_wait;
  1072. }
  1073. /* Min wait time if loop down */
  1074. mtime = jiffies + (min_wait * HZ);
  1075. /* wait time before firmware ready */
  1076. wtime = jiffies + (wait_time * HZ);
  1077. /* Wait for ISP to finish LIP */
  1078. if (!ha->flags.init_done)
  1079. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1080. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1081. ha->host_no));
  1082. do {
  1083. rval = qla2x00_get_firmware_state(ha, state);
  1084. if (rval == QLA_SUCCESS) {
  1085. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1086. ha->device_flags &= ~DFLG_NO_CABLE;
  1087. }
  1088. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1089. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1090. "84xx=%x.\n", ha->host_no, state[0],
  1091. state[2]));
  1092. if ((state[2] & FSTATE_LOGGED_IN) &&
  1093. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1094. DEBUG16(printk("scsi(%ld): Sending "
  1095. "verify iocb.\n", ha->host_no));
  1096. cs84xx_time = jiffies;
  1097. rval = qla84xx_init_chip(ha);
  1098. if (rval != QLA_SUCCESS)
  1099. break;
  1100. /* Add time taken to initialize. */
  1101. cs84xx_time = jiffies - cs84xx_time;
  1102. wtime += cs84xx_time;
  1103. mtime += cs84xx_time;
  1104. DEBUG16(printk("scsi(%ld): Increasing "
  1105. "wait time by %ld. New time %ld\n",
  1106. ha->host_no, cs84xx_time, wtime));
  1107. }
  1108. } else if (state[0] == FSTATE_READY) {
  1109. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1110. ha->host_no));
  1111. qla2x00_get_retry_cnt(ha, &ha->retry_count,
  1112. &ha->login_timeout, &ha->r_a_tov);
  1113. rval = QLA_SUCCESS;
  1114. break;
  1115. }
  1116. rval = QLA_FUNCTION_FAILED;
  1117. if (atomic_read(&ha->loop_down_timer) &&
  1118. state[0] != FSTATE_READY) {
  1119. /* Loop down. Timeout on min_wait for states
  1120. * other than Wait for Login.
  1121. */
  1122. if (time_after_eq(jiffies, mtime)) {
  1123. qla_printk(KERN_INFO, ha,
  1124. "Cable is unplugged...\n");
  1125. ha->device_flags |= DFLG_NO_CABLE;
  1126. break;
  1127. }
  1128. }
  1129. } else {
  1130. /* Mailbox cmd failed. Timeout on min_wait. */
  1131. if (time_after_eq(jiffies, mtime))
  1132. break;
  1133. }
  1134. if (time_after_eq(jiffies, wtime))
  1135. break;
  1136. /* Delay for a while */
  1137. msleep(500);
  1138. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1139. ha->host_no, state[0], jiffies));
  1140. } while (1);
  1141. DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1142. ha->host_no, state[0], jiffies));
  1143. if (rval) {
  1144. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1145. ha->host_no));
  1146. }
  1147. return (rval);
  1148. }
  1149. /*
  1150. * qla2x00_configure_hba
  1151. * Setup adapter context.
  1152. *
  1153. * Input:
  1154. * ha = adapter state pointer.
  1155. *
  1156. * Returns:
  1157. * 0 = success
  1158. *
  1159. * Context:
  1160. * Kernel context.
  1161. */
  1162. static int
  1163. qla2x00_configure_hba(scsi_qla_host_t *ha)
  1164. {
  1165. int rval;
  1166. uint16_t loop_id;
  1167. uint16_t topo;
  1168. uint16_t sw_cap;
  1169. uint8_t al_pa;
  1170. uint8_t area;
  1171. uint8_t domain;
  1172. char connect_type[22];
  1173. /* Get host addresses. */
  1174. rval = qla2x00_get_adapter_id(ha,
  1175. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1176. if (rval != QLA_SUCCESS) {
  1177. if (LOOP_TRANSITION(ha) || atomic_read(&ha->loop_down_timer) ||
  1178. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1179. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1180. __func__, ha->host_no));
  1181. } else {
  1182. qla_printk(KERN_WARNING, ha,
  1183. "ERROR -- Unable to get host loop ID.\n");
  1184. set_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  1185. }
  1186. return (rval);
  1187. }
  1188. if (topo == 4) {
  1189. qla_printk(KERN_INFO, ha,
  1190. "Cannot get topology - retrying.\n");
  1191. return (QLA_FUNCTION_FAILED);
  1192. }
  1193. ha->loop_id = loop_id;
  1194. /* initialize */
  1195. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1196. ha->operating_mode = LOOP;
  1197. ha->switch_cap = 0;
  1198. switch (topo) {
  1199. case 0:
  1200. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1201. ha->host_no));
  1202. ha->current_topology = ISP_CFG_NL;
  1203. strcpy(connect_type, "(Loop)");
  1204. break;
  1205. case 1:
  1206. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1207. ha->host_no));
  1208. ha->switch_cap = sw_cap;
  1209. ha->current_topology = ISP_CFG_FL;
  1210. strcpy(connect_type, "(FL_Port)");
  1211. break;
  1212. case 2:
  1213. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1214. ha->host_no));
  1215. ha->operating_mode = P2P;
  1216. ha->current_topology = ISP_CFG_N;
  1217. strcpy(connect_type, "(N_Port-to-N_Port)");
  1218. break;
  1219. case 3:
  1220. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1221. ha->host_no));
  1222. ha->switch_cap = sw_cap;
  1223. ha->operating_mode = P2P;
  1224. ha->current_topology = ISP_CFG_F;
  1225. strcpy(connect_type, "(F_Port)");
  1226. break;
  1227. default:
  1228. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1229. "Using NL.\n",
  1230. ha->host_no, topo));
  1231. ha->current_topology = ISP_CFG_NL;
  1232. strcpy(connect_type, "(Loop)");
  1233. break;
  1234. }
  1235. /* Save Host port and loop ID. */
  1236. /* byte order - Big Endian */
  1237. ha->d_id.b.domain = domain;
  1238. ha->d_id.b.area = area;
  1239. ha->d_id.b.al_pa = al_pa;
  1240. if (!ha->flags.init_done)
  1241. qla_printk(KERN_INFO, ha,
  1242. "Topology - %s, Host Loop address 0x%x\n",
  1243. connect_type, ha->loop_id);
  1244. if (rval) {
  1245. DEBUG2_3(printk("scsi(%ld): FAILED.\n", ha->host_no));
  1246. } else {
  1247. DEBUG3(printk("scsi(%ld): exiting normally.\n", ha->host_no));
  1248. }
  1249. return(rval);
  1250. }
  1251. static inline void
  1252. qla2x00_set_model_info(scsi_qla_host_t *ha, uint8_t *model, size_t len, char *def)
  1253. {
  1254. char *st, *en;
  1255. uint16_t index;
  1256. if (memcmp(model, BINZERO, len) != 0) {
  1257. strncpy(ha->model_number, model, len);
  1258. st = en = ha->model_number;
  1259. en += len - 1;
  1260. while (en > st) {
  1261. if (*en != 0x20 && *en != 0x00)
  1262. break;
  1263. *en-- = '\0';
  1264. }
  1265. index = (ha->pdev->subsystem_device & 0xff);
  1266. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1267. index < QLA_MODEL_NAMES)
  1268. strncpy(ha->model_desc,
  1269. qla2x00_model_name[index * 2 + 1],
  1270. sizeof(ha->model_desc) - 1);
  1271. } else {
  1272. index = (ha->pdev->subsystem_device & 0xff);
  1273. if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1274. index < QLA_MODEL_NAMES) {
  1275. strcpy(ha->model_number,
  1276. qla2x00_model_name[index * 2]);
  1277. strncpy(ha->model_desc,
  1278. qla2x00_model_name[index * 2 + 1],
  1279. sizeof(ha->model_desc) - 1);
  1280. } else {
  1281. strcpy(ha->model_number, def);
  1282. }
  1283. }
  1284. if (IS_FWI2_CAPABLE(ha))
  1285. qla2xxx_get_vpd_field(ha, "\x82", ha->model_desc,
  1286. sizeof(ha->model_desc));
  1287. }
  1288. /* On sparc systems, obtain port and node WWN from firmware
  1289. * properties.
  1290. */
  1291. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *ha, nvram_t *nv)
  1292. {
  1293. #ifdef CONFIG_SPARC
  1294. struct pci_dev *pdev = ha->pdev;
  1295. struct device_node *dp = pci_device_to_OF_node(pdev);
  1296. const u8 *val;
  1297. int len;
  1298. val = of_get_property(dp, "port-wwn", &len);
  1299. if (val && len >= WWN_SIZE)
  1300. memcpy(nv->port_name, val, WWN_SIZE);
  1301. val = of_get_property(dp, "node-wwn", &len);
  1302. if (val && len >= WWN_SIZE)
  1303. memcpy(nv->node_name, val, WWN_SIZE);
  1304. #endif
  1305. }
  1306. /*
  1307. * NVRAM configuration for ISP 2xxx
  1308. *
  1309. * Input:
  1310. * ha = adapter block pointer.
  1311. *
  1312. * Output:
  1313. * initialization control block in response_ring
  1314. * host adapters parameters in host adapter block
  1315. *
  1316. * Returns:
  1317. * 0 = success.
  1318. */
  1319. int
  1320. qla2x00_nvram_config(scsi_qla_host_t *ha)
  1321. {
  1322. int rval;
  1323. uint8_t chksum = 0;
  1324. uint16_t cnt;
  1325. uint8_t *dptr1, *dptr2;
  1326. init_cb_t *icb = ha->init_cb;
  1327. nvram_t *nv = ha->nvram;
  1328. uint8_t *ptr = ha->nvram;
  1329. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1330. rval = QLA_SUCCESS;
  1331. /* Determine NVRAM starting address. */
  1332. ha->nvram_size = sizeof(nvram_t);
  1333. ha->nvram_base = 0;
  1334. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1335. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1336. ha->nvram_base = 0x80;
  1337. /* Get NVRAM data and calculate checksum. */
  1338. ha->isp_ops->read_nvram(ha, ptr, ha->nvram_base, ha->nvram_size);
  1339. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1340. chksum += *ptr++;
  1341. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  1342. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1343. /* Bad NVRAM data, set defaults parameters. */
  1344. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1345. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1346. /* Reset NVRAM data. */
  1347. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1348. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1349. nv->nvram_version);
  1350. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1351. "invalid -- WWPN) defaults.\n");
  1352. if (chksum)
  1353. qla2xxx_hw_event_log(ha, HW_EVENT_NVRAM_CHKSUM_ERR, 0,
  1354. MSW(chksum), LSW(chksum));
  1355. /*
  1356. * Set default initialization control block.
  1357. */
  1358. memset(nv, 0, ha->nvram_size);
  1359. nv->parameter_block_version = ICB_VERSION;
  1360. if (IS_QLA23XX(ha)) {
  1361. nv->firmware_options[0] = BIT_2 | BIT_1;
  1362. nv->firmware_options[1] = BIT_7 | BIT_5;
  1363. nv->add_firmware_options[0] = BIT_5;
  1364. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1365. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1366. nv->special_options[1] = BIT_7;
  1367. } else if (IS_QLA2200(ha)) {
  1368. nv->firmware_options[0] = BIT_2 | BIT_1;
  1369. nv->firmware_options[1] = BIT_7 | BIT_5;
  1370. nv->add_firmware_options[0] = BIT_5;
  1371. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1372. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1373. } else if (IS_QLA2100(ha)) {
  1374. nv->firmware_options[0] = BIT_3 | BIT_1;
  1375. nv->firmware_options[1] = BIT_5;
  1376. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1377. }
  1378. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1379. nv->execution_throttle = __constant_cpu_to_le16(16);
  1380. nv->retry_count = 8;
  1381. nv->retry_delay = 1;
  1382. nv->port_name[0] = 33;
  1383. nv->port_name[3] = 224;
  1384. nv->port_name[4] = 139;
  1385. qla2xxx_nvram_wwn_from_ofw(ha, nv);
  1386. nv->login_timeout = 4;
  1387. /*
  1388. * Set default host adapter parameters
  1389. */
  1390. nv->host_p[1] = BIT_2;
  1391. nv->reset_delay = 5;
  1392. nv->port_down_retry_count = 8;
  1393. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1394. nv->link_down_timeout = 60;
  1395. rval = 1;
  1396. }
  1397. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1398. /*
  1399. * The SN2 does not provide BIOS emulation which means you can't change
  1400. * potentially bogus BIOS settings. Force the use of default settings
  1401. * for link rate and frame size. Hope that the rest of the settings
  1402. * are valid.
  1403. */
  1404. if (ia64_platform_is("sn2")) {
  1405. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1406. if (IS_QLA23XX(ha))
  1407. nv->special_options[1] = BIT_7;
  1408. }
  1409. #endif
  1410. /* Reset Initialization control block */
  1411. memset(icb, 0, ha->init_cb_size);
  1412. /*
  1413. * Setup driver NVRAM options.
  1414. */
  1415. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1416. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1417. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1418. nv->firmware_options[1] &= ~BIT_4;
  1419. if (IS_QLA23XX(ha)) {
  1420. nv->firmware_options[0] |= BIT_2;
  1421. nv->firmware_options[0] &= ~BIT_3;
  1422. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1423. if (IS_QLA2300(ha)) {
  1424. if (ha->fb_rev == FPM_2310) {
  1425. strcpy(ha->model_number, "QLA2310");
  1426. } else {
  1427. strcpy(ha->model_number, "QLA2300");
  1428. }
  1429. } else {
  1430. qla2x00_set_model_info(ha, nv->model_number,
  1431. sizeof(nv->model_number), "QLA23xx");
  1432. }
  1433. } else if (IS_QLA2200(ha)) {
  1434. nv->firmware_options[0] |= BIT_2;
  1435. /*
  1436. * 'Point-to-point preferred, else loop' is not a safe
  1437. * connection mode setting.
  1438. */
  1439. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1440. (BIT_5 | BIT_4)) {
  1441. /* Force 'loop preferred, else point-to-point'. */
  1442. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1443. nv->add_firmware_options[0] |= BIT_5;
  1444. }
  1445. strcpy(ha->model_number, "QLA22xx");
  1446. } else /*if (IS_QLA2100(ha))*/ {
  1447. strcpy(ha->model_number, "QLA2100");
  1448. }
  1449. /*
  1450. * Copy over NVRAM RISC parameter block to initialization control block.
  1451. */
  1452. dptr1 = (uint8_t *)icb;
  1453. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1454. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1455. while (cnt--)
  1456. *dptr1++ = *dptr2++;
  1457. /* Copy 2nd half. */
  1458. dptr1 = (uint8_t *)icb->add_firmware_options;
  1459. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1460. while (cnt--)
  1461. *dptr1++ = *dptr2++;
  1462. /* Use alternate WWN? */
  1463. if (nv->host_p[1] & BIT_7) {
  1464. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1465. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1466. }
  1467. /* Prepare nodename */
  1468. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1469. /*
  1470. * Firmware will apply the following mask if the nodename was
  1471. * not provided.
  1472. */
  1473. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1474. icb->node_name[0] &= 0xF0;
  1475. }
  1476. /*
  1477. * Set host adapter parameters.
  1478. */
  1479. if (nv->host_p[0] & BIT_7)
  1480. ql2xextended_error_logging = 1;
  1481. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1482. /* Always load RISC code on non ISP2[12]00 chips. */
  1483. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1484. ha->flags.disable_risc_code_load = 0;
  1485. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1486. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1487. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1488. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1489. ha->flags.disable_serdes = 0;
  1490. ha->operating_mode =
  1491. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1492. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1493. sizeof(ha->fw_seriallink_options));
  1494. /* save HBA serial number */
  1495. ha->serial0 = icb->port_name[5];
  1496. ha->serial1 = icb->port_name[6];
  1497. ha->serial2 = icb->port_name[7];
  1498. ha->node_name = icb->node_name;
  1499. ha->port_name = icb->port_name;
  1500. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1501. ha->retry_count = nv->retry_count;
  1502. /* Set minimum login_timeout to 4 seconds. */
  1503. if (nv->login_timeout < ql2xlogintimeout)
  1504. nv->login_timeout = ql2xlogintimeout;
  1505. if (nv->login_timeout < 4)
  1506. nv->login_timeout = 4;
  1507. ha->login_timeout = nv->login_timeout;
  1508. icb->login_timeout = nv->login_timeout;
  1509. /* Set minimum RATOV to 100 tenths of a second. */
  1510. ha->r_a_tov = 100;
  1511. ha->loop_reset_delay = nv->reset_delay;
  1512. /* Link Down Timeout = 0:
  1513. *
  1514. * When Port Down timer expires we will start returning
  1515. * I/O's to OS with "DID_NO_CONNECT".
  1516. *
  1517. * Link Down Timeout != 0:
  1518. *
  1519. * The driver waits for the link to come up after link down
  1520. * before returning I/Os to OS with "DID_NO_CONNECT".
  1521. */
  1522. if (nv->link_down_timeout == 0) {
  1523. ha->loop_down_abort_time =
  1524. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1525. } else {
  1526. ha->link_down_timeout = nv->link_down_timeout;
  1527. ha->loop_down_abort_time =
  1528. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1529. }
  1530. /*
  1531. * Need enough time to try and get the port back.
  1532. */
  1533. ha->port_down_retry_count = nv->port_down_retry_count;
  1534. if (qlport_down_retry)
  1535. ha->port_down_retry_count = qlport_down_retry;
  1536. /* Set login_retry_count */
  1537. ha->login_retry_count = nv->retry_count;
  1538. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1539. ha->port_down_retry_count > 3)
  1540. ha->login_retry_count = ha->port_down_retry_count;
  1541. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1542. ha->login_retry_count = ha->port_down_retry_count;
  1543. if (ql2xloginretrycount)
  1544. ha->login_retry_count = ql2xloginretrycount;
  1545. icb->lun_enables = __constant_cpu_to_le16(0);
  1546. icb->command_resource_count = 0;
  1547. icb->immediate_notify_resource_count = 0;
  1548. icb->timeout = __constant_cpu_to_le16(0);
  1549. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1550. /* Enable RIO */
  1551. icb->firmware_options[0] &= ~BIT_3;
  1552. icb->add_firmware_options[0] &=
  1553. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1554. icb->add_firmware_options[0] |= BIT_2;
  1555. icb->response_accumulation_timer = 3;
  1556. icb->interrupt_delay_timer = 5;
  1557. ha->flags.process_response_queue = 1;
  1558. } else {
  1559. /* Enable ZIO. */
  1560. if (!ha->flags.init_done) {
  1561. ha->zio_mode = icb->add_firmware_options[0] &
  1562. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1563. ha->zio_timer = icb->interrupt_delay_timer ?
  1564. icb->interrupt_delay_timer: 2;
  1565. }
  1566. icb->add_firmware_options[0] &=
  1567. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1568. ha->flags.process_response_queue = 0;
  1569. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1570. ha->zio_mode = QLA_ZIO_MODE_6;
  1571. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1572. "delay (%d us).\n", ha->host_no, ha->zio_mode,
  1573. ha->zio_timer * 100));
  1574. qla_printk(KERN_INFO, ha,
  1575. "ZIO mode %d enabled; timer delay (%d us).\n",
  1576. ha->zio_mode, ha->zio_timer * 100);
  1577. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1578. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1579. ha->flags.process_response_queue = 1;
  1580. }
  1581. }
  1582. if (rval) {
  1583. DEBUG2_3(printk(KERN_WARNING
  1584. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  1585. }
  1586. return (rval);
  1587. }
  1588. static void
  1589. qla2x00_rport_del(void *data)
  1590. {
  1591. fc_port_t *fcport = data;
  1592. struct fc_rport *rport;
  1593. spin_lock_irq(fcport->ha->host->host_lock);
  1594. rport = fcport->drport;
  1595. fcport->drport = NULL;
  1596. spin_unlock_irq(fcport->ha->host->host_lock);
  1597. if (rport)
  1598. fc_remote_port_delete(rport);
  1599. }
  1600. /**
  1601. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1602. * @ha: HA context
  1603. * @flags: allocation flags
  1604. *
  1605. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1606. */
  1607. static fc_port_t *
  1608. qla2x00_alloc_fcport(scsi_qla_host_t *ha, gfp_t flags)
  1609. {
  1610. fc_port_t *fcport;
  1611. fcport = kzalloc(sizeof(fc_port_t), flags);
  1612. if (!fcport)
  1613. return NULL;
  1614. /* Setup fcport template structure. */
  1615. fcport->ha = ha;
  1616. fcport->vp_idx = ha->vp_idx;
  1617. fcport->port_type = FCT_UNKNOWN;
  1618. fcport->loop_id = FC_NO_LOOP_ID;
  1619. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1620. fcport->flags = FCF_RLC_SUPPORT;
  1621. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1622. return fcport;
  1623. }
  1624. /*
  1625. * qla2x00_configure_loop
  1626. * Updates Fibre Channel Device Database with what is actually on loop.
  1627. *
  1628. * Input:
  1629. * ha = adapter block pointer.
  1630. *
  1631. * Returns:
  1632. * 0 = success.
  1633. * 1 = error.
  1634. * 2 = database was full and device was not configured.
  1635. */
  1636. static int
  1637. qla2x00_configure_loop(scsi_qla_host_t *ha)
  1638. {
  1639. int rval;
  1640. unsigned long flags, save_flags;
  1641. rval = QLA_SUCCESS;
  1642. /* Get Initiator ID */
  1643. if (test_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags)) {
  1644. rval = qla2x00_configure_hba(ha);
  1645. if (rval != QLA_SUCCESS) {
  1646. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1647. ha->host_no));
  1648. return (rval);
  1649. }
  1650. }
  1651. save_flags = flags = ha->dpc_flags;
  1652. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1653. ha->host_no, flags));
  1654. /*
  1655. * If we have both an RSCN and PORT UPDATE pending then handle them
  1656. * both at the same time.
  1657. */
  1658. clear_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1659. clear_bit(RSCN_UPDATE, &ha->dpc_flags);
  1660. /* Determine what we need to do */
  1661. if (ha->current_topology == ISP_CFG_FL &&
  1662. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1663. ha->flags.rscn_queue_overflow = 1;
  1664. set_bit(RSCN_UPDATE, &flags);
  1665. } else if (ha->current_topology == ISP_CFG_F &&
  1666. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1667. ha->flags.rscn_queue_overflow = 1;
  1668. set_bit(RSCN_UPDATE, &flags);
  1669. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1670. } else if (ha->current_topology == ISP_CFG_N) {
  1671. clear_bit(RSCN_UPDATE, &flags);
  1672. } else if (!ha->flags.online ||
  1673. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1674. ha->flags.rscn_queue_overflow = 1;
  1675. set_bit(RSCN_UPDATE, &flags);
  1676. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1677. }
  1678. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1679. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1680. rval = QLA_FUNCTION_FAILED;
  1681. } else {
  1682. rval = qla2x00_configure_local_loop(ha);
  1683. }
  1684. }
  1685. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1686. if (LOOP_TRANSITION(ha)) {
  1687. rval = QLA_FUNCTION_FAILED;
  1688. } else {
  1689. rval = qla2x00_configure_fabric(ha);
  1690. }
  1691. }
  1692. if (rval == QLA_SUCCESS) {
  1693. if (atomic_read(&ha->loop_down_timer) ||
  1694. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1695. rval = QLA_FUNCTION_FAILED;
  1696. } else {
  1697. atomic_set(&ha->loop_state, LOOP_READY);
  1698. DEBUG(printk("scsi(%ld): LOOP READY\n", ha->host_no));
  1699. }
  1700. }
  1701. if (rval) {
  1702. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1703. __func__, ha->host_no));
  1704. } else {
  1705. DEBUG3(printk("%s: exiting normally\n", __func__));
  1706. }
  1707. /* Restore state if a resync event occured during processing */
  1708. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)) {
  1709. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1710. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  1711. if (test_bit(RSCN_UPDATE, &save_flags)) {
  1712. ha->flags.rscn_queue_overflow = 1;
  1713. set_bit(RSCN_UPDATE, &ha->dpc_flags);
  1714. }
  1715. }
  1716. return (rval);
  1717. }
  1718. /*
  1719. * qla2x00_configure_local_loop
  1720. * Updates Fibre Channel Device Database with local loop devices.
  1721. *
  1722. * Input:
  1723. * ha = adapter block pointer.
  1724. *
  1725. * Returns:
  1726. * 0 = success.
  1727. */
  1728. static int
  1729. qla2x00_configure_local_loop(scsi_qla_host_t *ha)
  1730. {
  1731. int rval, rval2;
  1732. int found_devs;
  1733. int found;
  1734. fc_port_t *fcport, *new_fcport;
  1735. uint16_t index;
  1736. uint16_t entries;
  1737. char *id_iter;
  1738. uint16_t loop_id;
  1739. uint8_t domain, area, al_pa;
  1740. scsi_qla_host_t *pha = to_qla_parent(ha);
  1741. found_devs = 0;
  1742. new_fcport = NULL;
  1743. entries = MAX_FIBRE_DEVICES;
  1744. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", ha->host_no));
  1745. DEBUG3(qla2x00_get_fcal_position_map(ha, NULL));
  1746. /* Get list of logged in devices. */
  1747. memset(ha->gid_list, 0, GID_LIST_SIZE);
  1748. rval = qla2x00_get_id_list(ha, ha->gid_list, ha->gid_list_dma,
  1749. &entries);
  1750. if (rval != QLA_SUCCESS)
  1751. goto cleanup_allocation;
  1752. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  1753. ha->host_no, entries));
  1754. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  1755. entries * sizeof(struct gid_list_info)));
  1756. /* Allocate temporary fcport for any new fcports discovered. */
  1757. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1758. if (new_fcport == NULL) {
  1759. rval = QLA_MEMORY_ALLOC_FAILED;
  1760. goto cleanup_allocation;
  1761. }
  1762. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1763. /*
  1764. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  1765. */
  1766. list_for_each_entry(fcport, &pha->fcports, list) {
  1767. if (fcport->vp_idx != ha->vp_idx)
  1768. continue;
  1769. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  1770. fcport->port_type != FCT_BROADCAST &&
  1771. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  1772. DEBUG(printk("scsi(%ld): Marking port lost, "
  1773. "loop_id=0x%04x\n",
  1774. ha->host_no, fcport->loop_id));
  1775. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  1776. fcport->flags &= ~FCF_FARP_DONE;
  1777. }
  1778. }
  1779. /* Add devices to port list. */
  1780. id_iter = (char *)ha->gid_list;
  1781. for (index = 0; index < entries; index++) {
  1782. domain = ((struct gid_list_info *)id_iter)->domain;
  1783. area = ((struct gid_list_info *)id_iter)->area;
  1784. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  1785. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1786. loop_id = (uint16_t)
  1787. ((struct gid_list_info *)id_iter)->loop_id_2100;
  1788. else
  1789. loop_id = le16_to_cpu(
  1790. ((struct gid_list_info *)id_iter)->loop_id);
  1791. id_iter += ha->gid_list_info_size;
  1792. /* Bypass reserved domain fields. */
  1793. if ((domain & 0xf0) == 0xf0)
  1794. continue;
  1795. /* Bypass if not same domain and area of adapter. */
  1796. if (area && domain &&
  1797. (area != ha->d_id.b.area || domain != ha->d_id.b.domain))
  1798. continue;
  1799. /* Bypass invalid local loop ID. */
  1800. if (loop_id > LAST_LOCAL_LOOP_ID)
  1801. continue;
  1802. /* Fill in member data. */
  1803. new_fcport->d_id.b.domain = domain;
  1804. new_fcport->d_id.b.area = area;
  1805. new_fcport->d_id.b.al_pa = al_pa;
  1806. new_fcport->loop_id = loop_id;
  1807. new_fcport->vp_idx = ha->vp_idx;
  1808. rval2 = qla2x00_get_port_database(ha, new_fcport, 0);
  1809. if (rval2 != QLA_SUCCESS) {
  1810. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  1811. "information -- get_port_database=%x, "
  1812. "loop_id=0x%04x\n",
  1813. ha->host_no, rval2, new_fcport->loop_id));
  1814. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  1815. ha->host_no));
  1816. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  1817. continue;
  1818. }
  1819. /* Check for matching device in port list. */
  1820. found = 0;
  1821. fcport = NULL;
  1822. list_for_each_entry(fcport, &pha->fcports, list) {
  1823. if (fcport->vp_idx != ha->vp_idx)
  1824. continue;
  1825. if (memcmp(new_fcport->port_name, fcport->port_name,
  1826. WWN_SIZE))
  1827. continue;
  1828. fcport->flags &= ~(FCF_FABRIC_DEVICE |
  1829. FCF_PERSISTENT_BOUND);
  1830. fcport->loop_id = new_fcport->loop_id;
  1831. fcport->port_type = new_fcport->port_type;
  1832. fcport->d_id.b24 = new_fcport->d_id.b24;
  1833. memcpy(fcport->node_name, new_fcport->node_name,
  1834. WWN_SIZE);
  1835. found++;
  1836. break;
  1837. }
  1838. if (!found) {
  1839. /* New device, add to fcports list. */
  1840. new_fcport->flags &= ~FCF_PERSISTENT_BOUND;
  1841. if (ha->parent) {
  1842. new_fcport->ha = ha;
  1843. new_fcport->vp_idx = ha->vp_idx;
  1844. list_add_tail(&new_fcport->vp_fcport,
  1845. &ha->vp_fcports);
  1846. }
  1847. list_add_tail(&new_fcport->list, &pha->fcports);
  1848. /* Allocate a new replacement fcport. */
  1849. fcport = new_fcport;
  1850. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  1851. if (new_fcport == NULL) {
  1852. rval = QLA_MEMORY_ALLOC_FAILED;
  1853. goto cleanup_allocation;
  1854. }
  1855. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  1856. }
  1857. /* Base iIDMA settings on HBA port speed. */
  1858. fcport->fp_speed = ha->link_data_rate;
  1859. qla2x00_update_fcport(ha, fcport);
  1860. found_devs++;
  1861. }
  1862. cleanup_allocation:
  1863. kfree(new_fcport);
  1864. if (rval != QLA_SUCCESS) {
  1865. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  1866. "rval=%x\n", ha->host_no, rval));
  1867. }
  1868. if (found_devs) {
  1869. ha->device_flags |= DFLG_LOCAL_DEVICES;
  1870. ha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES;
  1871. }
  1872. return (rval);
  1873. }
  1874. static void
  1875. qla2x00_iidma_fcport(scsi_qla_host_t *ha, fc_port_t *fcport)
  1876. {
  1877. #define LS_UNKNOWN 2
  1878. static char *link_speeds[5] = { "1", "2", "?", "4", "8" };
  1879. int rval;
  1880. uint16_t mb[6];
  1881. if (!IS_IIDMA_CAPABLE(ha))
  1882. return;
  1883. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  1884. fcport->fp_speed > ha->link_data_rate)
  1885. return;
  1886. rval = qla2x00_set_idma_speed(ha, fcport->loop_id, fcport->fp_speed,
  1887. mb);
  1888. if (rval != QLA_SUCCESS) {
  1889. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  1890. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  1891. ha->host_no, fcport->port_name[0], fcport->port_name[1],
  1892. fcport->port_name[2], fcport->port_name[3],
  1893. fcport->port_name[4], fcport->port_name[5],
  1894. fcport->port_name[6], fcport->port_name[7], rval,
  1895. fcport->fp_speed, mb[0], mb[1]));
  1896. } else {
  1897. DEBUG2(qla_printk(KERN_INFO, ha,
  1898. "iIDMA adjusted to %s GB/s on "
  1899. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  1900. link_speeds[fcport->fp_speed], fcport->port_name[0],
  1901. fcport->port_name[1], fcport->port_name[2],
  1902. fcport->port_name[3], fcport->port_name[4],
  1903. fcport->port_name[5], fcport->port_name[6],
  1904. fcport->port_name[7]));
  1905. }
  1906. }
  1907. static void
  1908. qla2x00_reg_remote_port(scsi_qla_host_t *ha, fc_port_t *fcport)
  1909. {
  1910. struct fc_rport_identifiers rport_ids;
  1911. struct fc_rport *rport;
  1912. if (fcport->drport)
  1913. qla2x00_rport_del(fcport);
  1914. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  1915. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  1916. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  1917. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  1918. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1919. fcport->rport = rport = fc_remote_port_add(ha->host, 0, &rport_ids);
  1920. if (!rport) {
  1921. qla_printk(KERN_WARNING, ha,
  1922. "Unable to allocate fc remote port!\n");
  1923. return;
  1924. }
  1925. spin_lock_irq(fcport->ha->host->host_lock);
  1926. *((fc_port_t **)rport->dd_data) = fcport;
  1927. spin_unlock_irq(fcport->ha->host->host_lock);
  1928. rport->supported_classes = fcport->supported_classes;
  1929. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  1930. if (fcport->port_type == FCT_INITIATOR)
  1931. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  1932. if (fcport->port_type == FCT_TARGET)
  1933. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  1934. fc_remote_port_rolechg(rport, rport_ids.roles);
  1935. }
  1936. /*
  1937. * qla2x00_update_fcport
  1938. * Updates device on list.
  1939. *
  1940. * Input:
  1941. * ha = adapter block pointer.
  1942. * fcport = port structure pointer.
  1943. *
  1944. * Return:
  1945. * 0 - Success
  1946. * BIT_0 - error
  1947. *
  1948. * Context:
  1949. * Kernel context.
  1950. */
  1951. void
  1952. qla2x00_update_fcport(scsi_qla_host_t *ha, fc_port_t *fcport)
  1953. {
  1954. scsi_qla_host_t *pha = to_qla_parent(ha);
  1955. fcport->ha = ha;
  1956. fcport->login_retry = 0;
  1957. fcport->port_login_retry_count = pha->port_down_retry_count *
  1958. PORT_RETRY_TIME;
  1959. atomic_set(&fcport->port_down_timer, pha->port_down_retry_count *
  1960. PORT_RETRY_TIME);
  1961. fcport->flags &= ~FCF_LOGIN_NEEDED;
  1962. qla2x00_iidma_fcport(ha, fcport);
  1963. atomic_set(&fcport->state, FCS_ONLINE);
  1964. qla2x00_reg_remote_port(ha, fcport);
  1965. }
  1966. /*
  1967. * qla2x00_configure_fabric
  1968. * Setup SNS devices with loop ID's.
  1969. *
  1970. * Input:
  1971. * ha = adapter block pointer.
  1972. *
  1973. * Returns:
  1974. * 0 = success.
  1975. * BIT_0 = error
  1976. */
  1977. static int
  1978. qla2x00_configure_fabric(scsi_qla_host_t *ha)
  1979. {
  1980. int rval, rval2;
  1981. fc_port_t *fcport, *fcptemp;
  1982. uint16_t next_loopid;
  1983. uint16_t mb[MAILBOX_REGISTER_COUNT];
  1984. uint16_t loop_id;
  1985. LIST_HEAD(new_fcports);
  1986. scsi_qla_host_t *pha = to_qla_parent(ha);
  1987. /* If FL port exists, then SNS is present */
  1988. if (IS_FWI2_CAPABLE(ha))
  1989. loop_id = NPH_F_PORT;
  1990. else
  1991. loop_id = SNS_FL_PORT;
  1992. rval = qla2x00_get_port_name(ha, loop_id, ha->fabric_node_name, 1);
  1993. if (rval != QLA_SUCCESS) {
  1994. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  1995. "Port\n", ha->host_no));
  1996. ha->device_flags &= ~SWITCH_FOUND;
  1997. return (QLA_SUCCESS);
  1998. }
  1999. ha->device_flags |= SWITCH_FOUND;
  2000. /* Mark devices that need re-synchronization. */
  2001. rval2 = qla2x00_device_resync(ha);
  2002. if (rval2 == QLA_RSCNS_HANDLED) {
  2003. /* No point doing the scan, just continue. */
  2004. return (QLA_SUCCESS);
  2005. }
  2006. do {
  2007. /* FDMI support. */
  2008. if (ql2xfdmienable &&
  2009. test_and_clear_bit(REGISTER_FDMI_NEEDED, &ha->dpc_flags))
  2010. qla2x00_fdmi_register(ha);
  2011. /* Ensure we are logged into the SNS. */
  2012. if (IS_FWI2_CAPABLE(ha))
  2013. loop_id = NPH_SNS;
  2014. else
  2015. loop_id = SIMPLE_NAME_SERVER;
  2016. ha->isp_ops->fabric_login(ha, loop_id, 0xff, 0xff,
  2017. 0xfc, mb, BIT_1 | BIT_0);
  2018. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2019. DEBUG2(qla_printk(KERN_INFO, ha,
  2020. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2021. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2022. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2023. return (QLA_SUCCESS);
  2024. }
  2025. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags)) {
  2026. if (qla2x00_rft_id(ha)) {
  2027. /* EMPTY */
  2028. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2029. "TYPE failed.\n", ha->host_no));
  2030. }
  2031. if (qla2x00_rff_id(ha)) {
  2032. /* EMPTY */
  2033. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2034. "Features failed.\n", ha->host_no));
  2035. }
  2036. if (qla2x00_rnn_id(ha)) {
  2037. /* EMPTY */
  2038. DEBUG2(printk("scsi(%ld): Register Node Name "
  2039. "failed.\n", ha->host_no));
  2040. } else if (qla2x00_rsnn_nn(ha)) {
  2041. /* EMPTY */
  2042. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2043. "Node Name failed.\n", ha->host_no));
  2044. }
  2045. }
  2046. rval = qla2x00_find_all_fabric_devs(ha, &new_fcports);
  2047. if (rval != QLA_SUCCESS)
  2048. break;
  2049. /*
  2050. * Logout all previous fabric devices marked lost, except
  2051. * tape devices.
  2052. */
  2053. list_for_each_entry(fcport, &pha->fcports, list) {
  2054. if (fcport->vp_idx !=ha->vp_idx)
  2055. continue;
  2056. if (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2057. break;
  2058. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2059. continue;
  2060. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2061. qla2x00_mark_device_lost(ha, fcport,
  2062. ql2xplogiabsentdevice, 0);
  2063. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2064. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2065. fcport->port_type != FCT_INITIATOR &&
  2066. fcport->port_type != FCT_BROADCAST) {
  2067. ha->isp_ops->fabric_logout(ha,
  2068. fcport->loop_id,
  2069. fcport->d_id.b.domain,
  2070. fcport->d_id.b.area,
  2071. fcport->d_id.b.al_pa);
  2072. fcport->loop_id = FC_NO_LOOP_ID;
  2073. }
  2074. }
  2075. }
  2076. /* Starting free loop ID. */
  2077. next_loopid = pha->min_external_loopid;
  2078. /*
  2079. * Scan through our port list and login entries that need to be
  2080. * logged in.
  2081. */
  2082. list_for_each_entry(fcport, &pha->fcports, list) {
  2083. if (fcport->vp_idx != ha->vp_idx)
  2084. continue;
  2085. if (atomic_read(&ha->loop_down_timer) ||
  2086. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2087. break;
  2088. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2089. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2090. continue;
  2091. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2092. fcport->loop_id = next_loopid;
  2093. rval = qla2x00_find_new_loop_id(
  2094. to_qla_parent(ha), fcport);
  2095. if (rval != QLA_SUCCESS) {
  2096. /* Ran out of IDs to use */
  2097. break;
  2098. }
  2099. }
  2100. /* Login and update database */
  2101. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  2102. }
  2103. /* Exit if out of loop IDs. */
  2104. if (rval != QLA_SUCCESS) {
  2105. break;
  2106. }
  2107. /*
  2108. * Login and add the new devices to our port list.
  2109. */
  2110. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2111. if (atomic_read(&ha->loop_down_timer) ||
  2112. test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
  2113. break;
  2114. /* Find a new loop ID to use. */
  2115. fcport->loop_id = next_loopid;
  2116. rval = qla2x00_find_new_loop_id(to_qla_parent(ha),
  2117. fcport);
  2118. if (rval != QLA_SUCCESS) {
  2119. /* Ran out of IDs to use */
  2120. break;
  2121. }
  2122. /* Login and update database */
  2123. qla2x00_fabric_dev_login(ha, fcport, &next_loopid);
  2124. if (ha->parent) {
  2125. fcport->ha = ha;
  2126. fcport->vp_idx = ha->vp_idx;
  2127. list_add_tail(&fcport->vp_fcport,
  2128. &ha->vp_fcports);
  2129. list_move_tail(&fcport->list,
  2130. &ha->parent->fcports);
  2131. } else
  2132. list_move_tail(&fcport->list, &ha->fcports);
  2133. }
  2134. } while (0);
  2135. /* Free all new device structures not processed. */
  2136. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2137. list_del(&fcport->list);
  2138. kfree(fcport);
  2139. }
  2140. if (rval) {
  2141. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2142. "rval=%d\n", ha->host_no, rval));
  2143. }
  2144. return (rval);
  2145. }
  2146. /*
  2147. * qla2x00_find_all_fabric_devs
  2148. *
  2149. * Input:
  2150. * ha = adapter block pointer.
  2151. * dev = database device entry pointer.
  2152. *
  2153. * Returns:
  2154. * 0 = success.
  2155. *
  2156. * Context:
  2157. * Kernel context.
  2158. */
  2159. static int
  2160. qla2x00_find_all_fabric_devs(scsi_qla_host_t *ha, struct list_head *new_fcports)
  2161. {
  2162. int rval;
  2163. uint16_t loop_id;
  2164. fc_port_t *fcport, *new_fcport, *fcptemp;
  2165. int found;
  2166. sw_info_t *swl;
  2167. int swl_idx;
  2168. int first_dev, last_dev;
  2169. port_id_t wrap, nxt_d_id;
  2170. int vp_index;
  2171. int empty_vp_index;
  2172. int found_vp;
  2173. scsi_qla_host_t *vha;
  2174. scsi_qla_host_t *pha = to_qla_parent(ha);
  2175. rval = QLA_SUCCESS;
  2176. /* Try GID_PT to get device list, else GAN. */
  2177. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2178. if (!swl) {
  2179. /*EMPTY*/
  2180. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2181. "on GA_NXT\n", ha->host_no));
  2182. } else {
  2183. if (qla2x00_gid_pt(ha, swl) != QLA_SUCCESS) {
  2184. kfree(swl);
  2185. swl = NULL;
  2186. } else if (qla2x00_gpn_id(ha, swl) != QLA_SUCCESS) {
  2187. kfree(swl);
  2188. swl = NULL;
  2189. } else if (qla2x00_gnn_id(ha, swl) != QLA_SUCCESS) {
  2190. kfree(swl);
  2191. swl = NULL;
  2192. } else if (ql2xiidmaenable &&
  2193. qla2x00_gfpn_id(ha, swl) == QLA_SUCCESS) {
  2194. qla2x00_gpsc(ha, swl);
  2195. }
  2196. }
  2197. swl_idx = 0;
  2198. /* Allocate temporary fcport for any new fcports discovered. */
  2199. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  2200. if (new_fcport == NULL) {
  2201. kfree(swl);
  2202. return (QLA_MEMORY_ALLOC_FAILED);
  2203. }
  2204. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2205. new_fcport->vp_idx = ha->vp_idx;
  2206. /* Set start port ID scan at adapter ID. */
  2207. first_dev = 1;
  2208. last_dev = 0;
  2209. /* Starting free loop ID. */
  2210. loop_id = pha->min_external_loopid;
  2211. for (; loop_id <= ha->last_loop_id; loop_id++) {
  2212. if (qla2x00_is_reserved_id(ha, loop_id))
  2213. continue;
  2214. if (atomic_read(&ha->loop_down_timer) || LOOP_TRANSITION(ha))
  2215. break;
  2216. if (swl != NULL) {
  2217. if (last_dev) {
  2218. wrap.b24 = new_fcport->d_id.b24;
  2219. } else {
  2220. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2221. memcpy(new_fcport->node_name,
  2222. swl[swl_idx].node_name, WWN_SIZE);
  2223. memcpy(new_fcport->port_name,
  2224. swl[swl_idx].port_name, WWN_SIZE);
  2225. memcpy(new_fcport->fabric_port_name,
  2226. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2227. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2228. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2229. last_dev = 1;
  2230. }
  2231. swl_idx++;
  2232. }
  2233. } else {
  2234. /* Send GA_NXT to the switch */
  2235. rval = qla2x00_ga_nxt(ha, new_fcport);
  2236. if (rval != QLA_SUCCESS) {
  2237. qla_printk(KERN_WARNING, ha,
  2238. "SNS scan failed -- assuming zero-entry "
  2239. "result...\n");
  2240. list_for_each_entry_safe(fcport, fcptemp,
  2241. new_fcports, list) {
  2242. list_del(&fcport->list);
  2243. kfree(fcport);
  2244. }
  2245. rval = QLA_SUCCESS;
  2246. break;
  2247. }
  2248. }
  2249. /* If wrap on switch device list, exit. */
  2250. if (first_dev) {
  2251. wrap.b24 = new_fcport->d_id.b24;
  2252. first_dev = 0;
  2253. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2254. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2255. ha->host_no, new_fcport->d_id.b.domain,
  2256. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2257. break;
  2258. }
  2259. /* Bypass if same physical adapter. */
  2260. if (new_fcport->d_id.b24 == pha->d_id.b24)
  2261. continue;
  2262. /* Bypass virtual ports of the same host. */
  2263. if (pha->num_vhosts) {
  2264. for_each_mapped_vp_idx(pha, vp_index) {
  2265. empty_vp_index = 1;
  2266. found_vp = 0;
  2267. list_for_each_entry(vha, &pha->vp_list,
  2268. vp_list) {
  2269. if (vp_index == vha->vp_idx) {
  2270. empty_vp_index = 0;
  2271. found_vp = 1;
  2272. break;
  2273. }
  2274. }
  2275. if (empty_vp_index)
  2276. continue;
  2277. if (found_vp &&
  2278. new_fcport->d_id.b24 == vha->d_id.b24)
  2279. break;
  2280. }
  2281. if (vp_index <= pha->max_npiv_vports)
  2282. continue;
  2283. }
  2284. /* Bypass if same domain and area of adapter. */
  2285. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2286. (ha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2287. ISP_CFG_FL)
  2288. continue;
  2289. /* Bypass reserved domain fields. */
  2290. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2291. continue;
  2292. /* Locate matching device in database. */
  2293. found = 0;
  2294. list_for_each_entry(fcport, &pha->fcports, list) {
  2295. if (new_fcport->vp_idx != fcport->vp_idx)
  2296. continue;
  2297. if (memcmp(new_fcport->port_name, fcport->port_name,
  2298. WWN_SIZE))
  2299. continue;
  2300. found++;
  2301. /* Update port state. */
  2302. memcpy(fcport->fabric_port_name,
  2303. new_fcport->fabric_port_name, WWN_SIZE);
  2304. fcport->fp_speed = new_fcport->fp_speed;
  2305. /*
  2306. * If address the same and state FCS_ONLINE, nothing
  2307. * changed.
  2308. */
  2309. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2310. atomic_read(&fcport->state) == FCS_ONLINE) {
  2311. break;
  2312. }
  2313. /*
  2314. * If device was not a fabric device before.
  2315. */
  2316. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2317. fcport->d_id.b24 = new_fcport->d_id.b24;
  2318. fcport->loop_id = FC_NO_LOOP_ID;
  2319. fcport->flags |= (FCF_FABRIC_DEVICE |
  2320. FCF_LOGIN_NEEDED);
  2321. fcport->flags &= ~FCF_PERSISTENT_BOUND;
  2322. break;
  2323. }
  2324. /*
  2325. * Port ID changed or device was marked to be updated;
  2326. * Log it out if still logged in and mark it for
  2327. * relogin later.
  2328. */
  2329. fcport->d_id.b24 = new_fcport->d_id.b24;
  2330. fcport->flags |= FCF_LOGIN_NEEDED;
  2331. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2332. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2333. fcport->port_type != FCT_INITIATOR &&
  2334. fcport->port_type != FCT_BROADCAST) {
  2335. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2336. fcport->d_id.b.domain, fcport->d_id.b.area,
  2337. fcport->d_id.b.al_pa);
  2338. fcport->loop_id = FC_NO_LOOP_ID;
  2339. }
  2340. break;
  2341. }
  2342. if (found)
  2343. continue;
  2344. /* If device was not in our fcports list, then add it. */
  2345. list_add_tail(&new_fcport->list, new_fcports);
  2346. /* Allocate a new replacement fcport. */
  2347. nxt_d_id.b24 = new_fcport->d_id.b24;
  2348. new_fcport = qla2x00_alloc_fcport(ha, GFP_KERNEL);
  2349. if (new_fcport == NULL) {
  2350. kfree(swl);
  2351. return (QLA_MEMORY_ALLOC_FAILED);
  2352. }
  2353. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2354. new_fcport->d_id.b24 = nxt_d_id.b24;
  2355. new_fcport->vp_idx = ha->vp_idx;
  2356. }
  2357. kfree(swl);
  2358. kfree(new_fcport);
  2359. if (!list_empty(new_fcports))
  2360. ha->device_flags |= DFLG_FABRIC_DEVICES;
  2361. return (rval);
  2362. }
  2363. /*
  2364. * qla2x00_find_new_loop_id
  2365. * Scan through our port list and find a new usable loop ID.
  2366. *
  2367. * Input:
  2368. * ha: adapter state pointer.
  2369. * dev: port structure pointer.
  2370. *
  2371. * Returns:
  2372. * qla2x00 local function return status code.
  2373. *
  2374. * Context:
  2375. * Kernel context.
  2376. */
  2377. static int
  2378. qla2x00_find_new_loop_id(scsi_qla_host_t *ha, fc_port_t *dev)
  2379. {
  2380. int rval;
  2381. int found;
  2382. fc_port_t *fcport;
  2383. uint16_t first_loop_id;
  2384. scsi_qla_host_t *pha = to_qla_parent(ha);
  2385. rval = QLA_SUCCESS;
  2386. /* Save starting loop ID. */
  2387. first_loop_id = dev->loop_id;
  2388. for (;;) {
  2389. /* Skip loop ID if already used by adapter. */
  2390. if (dev->loop_id == ha->loop_id) {
  2391. dev->loop_id++;
  2392. }
  2393. /* Skip reserved loop IDs. */
  2394. while (qla2x00_is_reserved_id(ha, dev->loop_id)) {
  2395. dev->loop_id++;
  2396. }
  2397. /* Reset loop ID if passed the end. */
  2398. if (dev->loop_id > ha->last_loop_id) {
  2399. /* first loop ID. */
  2400. dev->loop_id = ha->min_external_loopid;
  2401. }
  2402. /* Check for loop ID being already in use. */
  2403. found = 0;
  2404. fcport = NULL;
  2405. list_for_each_entry(fcport, &pha->fcports, list) {
  2406. if (fcport->loop_id == dev->loop_id && fcport != dev) {
  2407. /* ID possibly in use */
  2408. found++;
  2409. break;
  2410. }
  2411. }
  2412. /* If not in use then it is free to use. */
  2413. if (!found) {
  2414. break;
  2415. }
  2416. /* ID in use. Try next value. */
  2417. dev->loop_id++;
  2418. /* If wrap around. No free ID to use. */
  2419. if (dev->loop_id == first_loop_id) {
  2420. dev->loop_id = FC_NO_LOOP_ID;
  2421. rval = QLA_FUNCTION_FAILED;
  2422. break;
  2423. }
  2424. }
  2425. return (rval);
  2426. }
  2427. /*
  2428. * qla2x00_device_resync
  2429. * Marks devices in the database that needs resynchronization.
  2430. *
  2431. * Input:
  2432. * ha = adapter block pointer.
  2433. *
  2434. * Context:
  2435. * Kernel context.
  2436. */
  2437. static int
  2438. qla2x00_device_resync(scsi_qla_host_t *ha)
  2439. {
  2440. int rval;
  2441. uint32_t mask;
  2442. fc_port_t *fcport;
  2443. uint32_t rscn_entry;
  2444. uint8_t rscn_out_iter;
  2445. uint8_t format;
  2446. port_id_t d_id;
  2447. scsi_qla_host_t *pha = to_qla_parent(ha);
  2448. rval = QLA_RSCNS_HANDLED;
  2449. while (ha->rscn_out_ptr != ha->rscn_in_ptr ||
  2450. ha->flags.rscn_queue_overflow) {
  2451. rscn_entry = ha->rscn_queue[ha->rscn_out_ptr];
  2452. format = MSB(MSW(rscn_entry));
  2453. d_id.b.domain = LSB(MSW(rscn_entry));
  2454. d_id.b.area = MSB(LSW(rscn_entry));
  2455. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2456. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2457. "[%02x/%02x%02x%02x].\n",
  2458. ha->host_no, ha->rscn_out_ptr, format, d_id.b.domain,
  2459. d_id.b.area, d_id.b.al_pa));
  2460. ha->rscn_out_ptr++;
  2461. if (ha->rscn_out_ptr == MAX_RSCN_COUNT)
  2462. ha->rscn_out_ptr = 0;
  2463. /* Skip duplicate entries. */
  2464. for (rscn_out_iter = ha->rscn_out_ptr;
  2465. !ha->flags.rscn_queue_overflow &&
  2466. rscn_out_iter != ha->rscn_in_ptr;
  2467. rscn_out_iter = (rscn_out_iter ==
  2468. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2469. if (rscn_entry != ha->rscn_queue[rscn_out_iter])
  2470. break;
  2471. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2472. "entry found at [%d].\n", ha->host_no,
  2473. rscn_out_iter));
  2474. ha->rscn_out_ptr = rscn_out_iter;
  2475. }
  2476. /* Queue overflow, set switch default case. */
  2477. if (ha->flags.rscn_queue_overflow) {
  2478. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2479. "overflow.\n", ha->host_no));
  2480. format = 3;
  2481. ha->flags.rscn_queue_overflow = 0;
  2482. }
  2483. switch (format) {
  2484. case 0:
  2485. mask = 0xffffff;
  2486. break;
  2487. case 1:
  2488. mask = 0xffff00;
  2489. break;
  2490. case 2:
  2491. mask = 0xff0000;
  2492. break;
  2493. default:
  2494. mask = 0x0;
  2495. d_id.b24 = 0;
  2496. ha->rscn_out_ptr = ha->rscn_in_ptr;
  2497. break;
  2498. }
  2499. rval = QLA_SUCCESS;
  2500. list_for_each_entry(fcport, &pha->fcports, list) {
  2501. if (fcport->vp_idx != ha->vp_idx)
  2502. continue;
  2503. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2504. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2505. fcport->port_type == FCT_BROADCAST)
  2506. continue;
  2507. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2508. if (format != 3 ||
  2509. fcport->port_type != FCT_INITIATOR) {
  2510. qla2x00_mark_device_lost(ha, fcport,
  2511. 0, 0);
  2512. }
  2513. }
  2514. fcport->flags &= ~FCF_FARP_DONE;
  2515. }
  2516. }
  2517. return (rval);
  2518. }
  2519. /*
  2520. * qla2x00_fabric_dev_login
  2521. * Login fabric target device and update FC port database.
  2522. *
  2523. * Input:
  2524. * ha: adapter state pointer.
  2525. * fcport: port structure list pointer.
  2526. * next_loopid: contains value of a new loop ID that can be used
  2527. * by the next login attempt.
  2528. *
  2529. * Returns:
  2530. * qla2x00 local function return status code.
  2531. *
  2532. * Context:
  2533. * Kernel context.
  2534. */
  2535. static int
  2536. qla2x00_fabric_dev_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2537. uint16_t *next_loopid)
  2538. {
  2539. int rval;
  2540. int retry;
  2541. uint8_t opts;
  2542. rval = QLA_SUCCESS;
  2543. retry = 0;
  2544. rval = qla2x00_fabric_login(ha, fcport, next_loopid);
  2545. if (rval == QLA_SUCCESS) {
  2546. /* Send an ADISC to tape devices.*/
  2547. opts = 0;
  2548. if (fcport->flags & FCF_TAPE_PRESENT)
  2549. opts |= BIT_1;
  2550. rval = qla2x00_get_port_database(ha, fcport, opts);
  2551. if (rval != QLA_SUCCESS) {
  2552. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2553. fcport->d_id.b.domain, fcport->d_id.b.area,
  2554. fcport->d_id.b.al_pa);
  2555. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2556. } else {
  2557. qla2x00_update_fcport(ha, fcport);
  2558. }
  2559. }
  2560. return (rval);
  2561. }
  2562. /*
  2563. * qla2x00_fabric_login
  2564. * Issue fabric login command.
  2565. *
  2566. * Input:
  2567. * ha = adapter block pointer.
  2568. * device = pointer to FC device type structure.
  2569. *
  2570. * Returns:
  2571. * 0 - Login successfully
  2572. * 1 - Login failed
  2573. * 2 - Initiator device
  2574. * 3 - Fatal error
  2575. */
  2576. int
  2577. qla2x00_fabric_login(scsi_qla_host_t *ha, fc_port_t *fcport,
  2578. uint16_t *next_loopid)
  2579. {
  2580. int rval;
  2581. int retry;
  2582. uint16_t tmp_loopid;
  2583. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2584. retry = 0;
  2585. tmp_loopid = 0;
  2586. for (;;) {
  2587. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2588. "for port %02x%02x%02x.\n",
  2589. ha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2590. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2591. /* Login fcport on switch. */
  2592. ha->isp_ops->fabric_login(ha, fcport->loop_id,
  2593. fcport->d_id.b.domain, fcport->d_id.b.area,
  2594. fcport->d_id.b.al_pa, mb, BIT_0);
  2595. if (mb[0] == MBS_PORT_ID_USED) {
  2596. /*
  2597. * Device has another loop ID. The firmware team
  2598. * recommends the driver perform an implicit login with
  2599. * the specified ID again. The ID we just used is save
  2600. * here so we return with an ID that can be tried by
  2601. * the next login.
  2602. */
  2603. retry++;
  2604. tmp_loopid = fcport->loop_id;
  2605. fcport->loop_id = mb[1];
  2606. DEBUG(printk("Fabric Login: port in use - next "
  2607. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2608. fcport->loop_id, fcport->d_id.b.domain,
  2609. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2610. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2611. /*
  2612. * Login succeeded.
  2613. */
  2614. if (retry) {
  2615. /* A retry occurred before. */
  2616. *next_loopid = tmp_loopid;
  2617. } else {
  2618. /*
  2619. * No retry occurred before. Just increment the
  2620. * ID value for next login.
  2621. */
  2622. *next_loopid = (fcport->loop_id + 1);
  2623. }
  2624. if (mb[1] & BIT_0) {
  2625. fcport->port_type = FCT_INITIATOR;
  2626. } else {
  2627. fcport->port_type = FCT_TARGET;
  2628. if (mb[1] & BIT_1) {
  2629. fcport->flags |= FCF_TAPE_PRESENT;
  2630. }
  2631. }
  2632. if (mb[10] & BIT_0)
  2633. fcport->supported_classes |= FC_COS_CLASS2;
  2634. if (mb[10] & BIT_1)
  2635. fcport->supported_classes |= FC_COS_CLASS3;
  2636. rval = QLA_SUCCESS;
  2637. break;
  2638. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2639. /*
  2640. * Loop ID already used, try next loop ID.
  2641. */
  2642. fcport->loop_id++;
  2643. rval = qla2x00_find_new_loop_id(ha, fcport);
  2644. if (rval != QLA_SUCCESS) {
  2645. /* Ran out of loop IDs to use */
  2646. break;
  2647. }
  2648. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2649. /*
  2650. * Firmware possibly timed out during login. If NO
  2651. * retries are left to do then the device is declared
  2652. * dead.
  2653. */
  2654. *next_loopid = fcport->loop_id;
  2655. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2656. fcport->d_id.b.domain, fcport->d_id.b.area,
  2657. fcport->d_id.b.al_pa);
  2658. qla2x00_mark_device_lost(ha, fcport, 1, 0);
  2659. rval = 1;
  2660. break;
  2661. } else {
  2662. /*
  2663. * unrecoverable / not handled error
  2664. */
  2665. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2666. "loop_id=%x jiffies=%lx.\n",
  2667. __func__, ha->host_no, mb[0],
  2668. fcport->d_id.b.domain, fcport->d_id.b.area,
  2669. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2670. *next_loopid = fcport->loop_id;
  2671. ha->isp_ops->fabric_logout(ha, fcport->loop_id,
  2672. fcport->d_id.b.domain, fcport->d_id.b.area,
  2673. fcport->d_id.b.al_pa);
  2674. fcport->loop_id = FC_NO_LOOP_ID;
  2675. fcport->login_retry = 0;
  2676. rval = 3;
  2677. break;
  2678. }
  2679. }
  2680. return (rval);
  2681. }
  2682. /*
  2683. * qla2x00_local_device_login
  2684. * Issue local device login command.
  2685. *
  2686. * Input:
  2687. * ha = adapter block pointer.
  2688. * loop_id = loop id of device to login to.
  2689. *
  2690. * Returns (Where's the #define!!!!):
  2691. * 0 - Login successfully
  2692. * 1 - Login failed
  2693. * 3 - Fatal error
  2694. */
  2695. int
  2696. qla2x00_local_device_login(scsi_qla_host_t *ha, fc_port_t *fcport)
  2697. {
  2698. int rval;
  2699. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2700. memset(mb, 0, sizeof(mb));
  2701. rval = qla2x00_login_local_device(ha, fcport, mb, BIT_0);
  2702. if (rval == QLA_SUCCESS) {
  2703. /* Interrogate mailbox registers for any errors */
  2704. if (mb[0] == MBS_COMMAND_ERROR)
  2705. rval = 1;
  2706. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2707. /* device not in PCB table */
  2708. rval = 3;
  2709. }
  2710. return (rval);
  2711. }
  2712. /*
  2713. * qla2x00_loop_resync
  2714. * Resync with fibre channel devices.
  2715. *
  2716. * Input:
  2717. * ha = adapter block pointer.
  2718. *
  2719. * Returns:
  2720. * 0 = success
  2721. */
  2722. int
  2723. qla2x00_loop_resync(scsi_qla_host_t *ha)
  2724. {
  2725. int rval;
  2726. uint32_t wait_time;
  2727. rval = QLA_SUCCESS;
  2728. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2729. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2730. if (ha->flags.online) {
  2731. if (!(rval = qla2x00_fw_ready(ha))) {
  2732. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2733. wait_time = 256;
  2734. do {
  2735. atomic_set(&ha->loop_state, LOOP_UPDATE);
  2736. /* Issue a marker after FW becomes ready. */
  2737. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2738. ha->marker_needed = 0;
  2739. /* Remap devices on Loop. */
  2740. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2741. qla2x00_configure_loop(ha);
  2742. wait_time--;
  2743. } while (!atomic_read(&ha->loop_down_timer) &&
  2744. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2745. wait_time &&
  2746. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2747. }
  2748. }
  2749. if (test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) {
  2750. return (QLA_FUNCTION_FAILED);
  2751. }
  2752. if (rval) {
  2753. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  2754. }
  2755. return (rval);
  2756. }
  2757. void
  2758. qla2x00_update_fcports(scsi_qla_host_t *ha)
  2759. {
  2760. fc_port_t *fcport;
  2761. /* Go with deferred removal of rport references. */
  2762. list_for_each_entry(fcport, &ha->fcports, list)
  2763. if (fcport->drport &&
  2764. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  2765. qla2x00_rport_del(fcport);
  2766. }
  2767. /*
  2768. * qla2x00_abort_isp
  2769. * Resets ISP and aborts all outstanding commands.
  2770. *
  2771. * Input:
  2772. * ha = adapter block pointer.
  2773. *
  2774. * Returns:
  2775. * 0 = success
  2776. */
  2777. int
  2778. qla2x00_abort_isp(scsi_qla_host_t *ha)
  2779. {
  2780. int rval;
  2781. uint8_t status = 0;
  2782. scsi_qla_host_t *vha;
  2783. if (ha->flags.online) {
  2784. ha->flags.online = 0;
  2785. clear_bit(ISP_ABORT_NEEDED, &ha->dpc_flags);
  2786. ha->qla_stats.total_isp_aborts++;
  2787. qla_printk(KERN_INFO, ha,
  2788. "Performing ISP error recovery - ha= %p.\n", ha);
  2789. ha->isp_ops->reset_chip(ha);
  2790. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  2791. if (atomic_read(&ha->loop_state) != LOOP_DOWN) {
  2792. atomic_set(&ha->loop_state, LOOP_DOWN);
  2793. qla2x00_mark_all_devices_lost(ha, 0);
  2794. list_for_each_entry(vha, &ha->vp_list, vp_list)
  2795. qla2x00_mark_all_devices_lost(vha, 0);
  2796. } else {
  2797. if (!atomic_read(&ha->loop_down_timer))
  2798. atomic_set(&ha->loop_down_timer,
  2799. LOOP_DOWN_TIME);
  2800. }
  2801. /* Requeue all commands in outstanding command list. */
  2802. qla2x00_abort_all_cmds(ha, DID_RESET << 16);
  2803. ha->isp_ops->get_flash_version(ha, ha->request_ring);
  2804. ha->isp_ops->nvram_config(ha);
  2805. if (!qla2x00_restart_isp(ha)) {
  2806. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2807. if (!atomic_read(&ha->loop_down_timer)) {
  2808. /*
  2809. * Issue marker command only when we are going
  2810. * to start the I/O .
  2811. */
  2812. ha->marker_needed = 1;
  2813. }
  2814. ha->flags.online = 1;
  2815. ha->isp_ops->enable_intrs(ha);
  2816. ha->isp_abort_cnt = 0;
  2817. clear_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2818. if (ha->fce) {
  2819. ha->flags.fce_enabled = 1;
  2820. memset(ha->fce, 0,
  2821. fce_calc_size(ha->fce_bufs));
  2822. rval = qla2x00_enable_fce_trace(ha,
  2823. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  2824. &ha->fce_bufs);
  2825. if (rval) {
  2826. qla_printk(KERN_WARNING, ha,
  2827. "Unable to reinitialize FCE "
  2828. "(%d).\n", rval);
  2829. ha->flags.fce_enabled = 0;
  2830. }
  2831. }
  2832. if (ha->eft) {
  2833. memset(ha->eft, 0, EFT_SIZE);
  2834. rval = qla2x00_enable_eft_trace(ha,
  2835. ha->eft_dma, EFT_NUM_BUFFERS);
  2836. if (rval) {
  2837. qla_printk(KERN_WARNING, ha,
  2838. "Unable to reinitialize EFT "
  2839. "(%d).\n", rval);
  2840. }
  2841. }
  2842. } else { /* failed the ISP abort */
  2843. ha->flags.online = 1;
  2844. if (test_bit(ISP_ABORT_RETRY, &ha->dpc_flags)) {
  2845. if (ha->isp_abort_cnt == 0) {
  2846. qla_printk(KERN_WARNING, ha,
  2847. "ISP error recovery failed - "
  2848. "board disabled\n");
  2849. /*
  2850. * The next call disables the board
  2851. * completely.
  2852. */
  2853. ha->isp_ops->reset_adapter(ha);
  2854. ha->flags.online = 0;
  2855. clear_bit(ISP_ABORT_RETRY,
  2856. &ha->dpc_flags);
  2857. status = 0;
  2858. } else { /* schedule another ISP abort */
  2859. ha->isp_abort_cnt--;
  2860. DEBUG(printk("qla%ld: ISP abort - "
  2861. "retry remaining %d\n",
  2862. ha->host_no, ha->isp_abort_cnt));
  2863. status = 1;
  2864. }
  2865. } else {
  2866. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  2867. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  2868. "- retrying (%d) more times\n",
  2869. ha->host_no, ha->isp_abort_cnt));
  2870. set_bit(ISP_ABORT_RETRY, &ha->dpc_flags);
  2871. status = 1;
  2872. }
  2873. }
  2874. }
  2875. if (status) {
  2876. qla_printk(KERN_INFO, ha,
  2877. "qla2x00_abort_isp: **** FAILED ****\n");
  2878. } else {
  2879. DEBUG(printk(KERN_INFO
  2880. "qla2x00_abort_isp(%ld): exiting.\n",
  2881. ha->host_no));
  2882. }
  2883. return(status);
  2884. }
  2885. /*
  2886. * qla2x00_restart_isp
  2887. * restarts the ISP after a reset
  2888. *
  2889. * Input:
  2890. * ha = adapter block pointer.
  2891. *
  2892. * Returns:
  2893. * 0 = success
  2894. */
  2895. static int
  2896. qla2x00_restart_isp(scsi_qla_host_t *ha)
  2897. {
  2898. uint8_t status = 0;
  2899. uint32_t wait_time;
  2900. /* If firmware needs to be loaded */
  2901. if (qla2x00_isp_firmware(ha)) {
  2902. ha->flags.online = 0;
  2903. if (!(status = ha->isp_ops->chip_diag(ha)))
  2904. status = qla2x00_setup_chip(ha);
  2905. }
  2906. if (!status && !(status = qla2x00_init_rings(ha))) {
  2907. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  2908. if (!(status = qla2x00_fw_ready(ha))) {
  2909. DEBUG(printk("%s(): Start configure loop, "
  2910. "status = %d\n", __func__, status));
  2911. /* Issue a marker after FW becomes ready. */
  2912. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  2913. ha->flags.online = 1;
  2914. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  2915. wait_time = 256;
  2916. do {
  2917. clear_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  2918. qla2x00_configure_loop(ha);
  2919. wait_time--;
  2920. } while (!atomic_read(&ha->loop_down_timer) &&
  2921. !(test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags)) &&
  2922. wait_time &&
  2923. (test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags)));
  2924. }
  2925. /* if no cable then assume it's good */
  2926. if ((ha->device_flags & DFLG_NO_CABLE))
  2927. status = 0;
  2928. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  2929. __func__,
  2930. status));
  2931. }
  2932. return (status);
  2933. }
  2934. /*
  2935. * qla2x00_reset_adapter
  2936. * Reset adapter.
  2937. *
  2938. * Input:
  2939. * ha = adapter block pointer.
  2940. */
  2941. void
  2942. qla2x00_reset_adapter(scsi_qla_host_t *ha)
  2943. {
  2944. unsigned long flags = 0;
  2945. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  2946. ha->flags.online = 0;
  2947. ha->isp_ops->disable_intrs(ha);
  2948. spin_lock_irqsave(&ha->hardware_lock, flags);
  2949. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  2950. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2951. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  2952. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  2953. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2954. }
  2955. void
  2956. qla24xx_reset_adapter(scsi_qla_host_t *ha)
  2957. {
  2958. unsigned long flags = 0;
  2959. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  2960. ha->flags.online = 0;
  2961. ha->isp_ops->disable_intrs(ha);
  2962. spin_lock_irqsave(&ha->hardware_lock, flags);
  2963. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  2964. RD_REG_DWORD(&reg->hccr);
  2965. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  2966. RD_REG_DWORD(&reg->hccr);
  2967. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2968. }
  2969. /* On sparc systems, obtain port and node WWN from firmware
  2970. * properties.
  2971. */
  2972. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *ha, struct nvram_24xx *nv)
  2973. {
  2974. #ifdef CONFIG_SPARC
  2975. struct pci_dev *pdev = ha->pdev;
  2976. struct device_node *dp = pci_device_to_OF_node(pdev);
  2977. const u8 *val;
  2978. int len;
  2979. val = of_get_property(dp, "port-wwn", &len);
  2980. if (val && len >= WWN_SIZE)
  2981. memcpy(nv->port_name, val, WWN_SIZE);
  2982. val = of_get_property(dp, "node-wwn", &len);
  2983. if (val && len >= WWN_SIZE)
  2984. memcpy(nv->node_name, val, WWN_SIZE);
  2985. #endif
  2986. }
  2987. int
  2988. qla24xx_nvram_config(scsi_qla_host_t *ha)
  2989. {
  2990. int rval;
  2991. struct init_cb_24xx *icb;
  2992. struct nvram_24xx *nv;
  2993. uint32_t *dptr;
  2994. uint8_t *dptr1, *dptr2;
  2995. uint32_t chksum;
  2996. uint16_t cnt;
  2997. rval = QLA_SUCCESS;
  2998. icb = (struct init_cb_24xx *)ha->init_cb;
  2999. nv = ha->nvram;
  3000. /* Determine NVRAM starting address. */
  3001. ha->nvram_size = sizeof(struct nvram_24xx);
  3002. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3003. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3004. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3005. if (PCI_FUNC(ha->pdev->devfn)) {
  3006. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3007. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3008. }
  3009. /* Get VPD data into cache */
  3010. ha->vpd = ha->nvram + VPD_OFFSET;
  3011. ha->isp_ops->read_nvram(ha, (uint8_t *)ha->vpd,
  3012. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3013. /* Get NVRAM data into cache and calculate checksum. */
  3014. dptr = (uint32_t *)nv;
  3015. ha->isp_ops->read_nvram(ha, (uint8_t *)dptr, ha->nvram_base,
  3016. ha->nvram_size);
  3017. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3018. chksum += le32_to_cpu(*dptr++);
  3019. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no));
  3020. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3021. /* Bad NVRAM data, set defaults parameters. */
  3022. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3023. || nv->id[3] != ' ' ||
  3024. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3025. /* Reset NVRAM data. */
  3026. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3027. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3028. le16_to_cpu(nv->nvram_version));
  3029. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3030. "invalid -- WWPN) defaults.\n");
  3031. /*
  3032. * Set default initialization control block.
  3033. */
  3034. memset(nv, 0, ha->nvram_size);
  3035. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3036. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3037. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3038. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3039. nv->exchange_count = __constant_cpu_to_le16(0);
  3040. nv->hard_address = __constant_cpu_to_le16(124);
  3041. nv->port_name[0] = 0x21;
  3042. nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn);
  3043. nv->port_name[2] = 0x00;
  3044. nv->port_name[3] = 0xe0;
  3045. nv->port_name[4] = 0x8b;
  3046. nv->port_name[5] = 0x1c;
  3047. nv->port_name[6] = 0x55;
  3048. nv->port_name[7] = 0x86;
  3049. nv->node_name[0] = 0x20;
  3050. nv->node_name[1] = 0x00;
  3051. nv->node_name[2] = 0x00;
  3052. nv->node_name[3] = 0xe0;
  3053. nv->node_name[4] = 0x8b;
  3054. nv->node_name[5] = 0x1c;
  3055. nv->node_name[6] = 0x55;
  3056. nv->node_name[7] = 0x86;
  3057. qla24xx_nvram_wwn_from_ofw(ha, nv);
  3058. nv->login_retry_count = __constant_cpu_to_le16(8);
  3059. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3060. nv->login_timeout = __constant_cpu_to_le16(0);
  3061. nv->firmware_options_1 =
  3062. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3063. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3064. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3065. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3066. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3067. nv->efi_parameters = __constant_cpu_to_le32(0);
  3068. nv->reset_delay = 5;
  3069. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3070. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3071. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3072. rval = 1;
  3073. }
  3074. /* Reset Initialization control block */
  3075. memset(icb, 0, sizeof(struct init_cb_24xx));
  3076. /* Copy 1st segment. */
  3077. dptr1 = (uint8_t *)icb;
  3078. dptr2 = (uint8_t *)&nv->version;
  3079. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3080. while (cnt--)
  3081. *dptr1++ = *dptr2++;
  3082. icb->login_retry_count = nv->login_retry_count;
  3083. icb->link_down_on_nos = nv->link_down_on_nos;
  3084. /* Copy 2nd segment. */
  3085. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3086. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3087. cnt = (uint8_t *)&icb->reserved_3 -
  3088. (uint8_t *)&icb->interrupt_delay_timer;
  3089. while (cnt--)
  3090. *dptr1++ = *dptr2++;
  3091. /*
  3092. * Setup driver NVRAM options.
  3093. */
  3094. qla2x00_set_model_info(ha, nv->model_name, sizeof(nv->model_name),
  3095. "QLA2462");
  3096. /* Use alternate WWN? */
  3097. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3098. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3099. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3100. }
  3101. /* Prepare nodename */
  3102. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3103. /*
  3104. * Firmware will apply the following mask if the nodename was
  3105. * not provided.
  3106. */
  3107. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3108. icb->node_name[0] &= 0xF0;
  3109. }
  3110. /* Set host adapter parameters. */
  3111. ha->flags.disable_risc_code_load = 0;
  3112. ha->flags.enable_lip_reset = 0;
  3113. ha->flags.enable_lip_full_login =
  3114. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3115. ha->flags.enable_target_reset =
  3116. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3117. ha->flags.enable_led_scheme = 0;
  3118. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3119. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3120. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3121. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3122. sizeof(ha->fw_seriallink_options24));
  3123. /* save HBA serial number */
  3124. ha->serial0 = icb->port_name[5];
  3125. ha->serial1 = icb->port_name[6];
  3126. ha->serial2 = icb->port_name[7];
  3127. ha->node_name = icb->node_name;
  3128. ha->port_name = icb->port_name;
  3129. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3130. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3131. /* Set minimum login_timeout to 4 seconds. */
  3132. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3133. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3134. if (le16_to_cpu(nv->login_timeout) < 4)
  3135. nv->login_timeout = __constant_cpu_to_le16(4);
  3136. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3137. icb->login_timeout = nv->login_timeout;
  3138. /* Set minimum RATOV to 100 tenths of a second. */
  3139. ha->r_a_tov = 100;
  3140. ha->loop_reset_delay = nv->reset_delay;
  3141. /* Link Down Timeout = 0:
  3142. *
  3143. * When Port Down timer expires we will start returning
  3144. * I/O's to OS with "DID_NO_CONNECT".
  3145. *
  3146. * Link Down Timeout != 0:
  3147. *
  3148. * The driver waits for the link to come up after link down
  3149. * before returning I/Os to OS with "DID_NO_CONNECT".
  3150. */
  3151. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3152. ha->loop_down_abort_time =
  3153. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3154. } else {
  3155. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3156. ha->loop_down_abort_time =
  3157. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3158. }
  3159. /* Need enough time to try and get the port back. */
  3160. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3161. if (qlport_down_retry)
  3162. ha->port_down_retry_count = qlport_down_retry;
  3163. /* Set login_retry_count */
  3164. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3165. if (ha->port_down_retry_count ==
  3166. le16_to_cpu(nv->port_down_retry_count) &&
  3167. ha->port_down_retry_count > 3)
  3168. ha->login_retry_count = ha->port_down_retry_count;
  3169. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3170. ha->login_retry_count = ha->port_down_retry_count;
  3171. if (ql2xloginretrycount)
  3172. ha->login_retry_count = ql2xloginretrycount;
  3173. /* Enable ZIO. */
  3174. if (!ha->flags.init_done) {
  3175. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3176. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3177. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3178. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3179. }
  3180. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3181. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3182. ha->flags.process_response_queue = 0;
  3183. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3184. ha->zio_mode = QLA_ZIO_MODE_6;
  3185. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3186. "(%d us).\n", ha->host_no, ha->zio_mode,
  3187. ha->zio_timer * 100));
  3188. qla_printk(KERN_INFO, ha,
  3189. "ZIO mode %d enabled; timer delay (%d us).\n",
  3190. ha->zio_mode, ha->zio_timer * 100);
  3191. icb->firmware_options_2 |= cpu_to_le32(
  3192. (uint32_t)ha->zio_mode);
  3193. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3194. ha->flags.process_response_queue = 1;
  3195. }
  3196. if (rval) {
  3197. DEBUG2_3(printk(KERN_WARNING
  3198. "scsi(%ld): NVRAM configuration failed!\n", ha->host_no));
  3199. }
  3200. return (rval);
  3201. }
  3202. static int
  3203. qla24xx_load_risc_flash(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3204. {
  3205. int rval;
  3206. int segments, fragment;
  3207. uint32_t faddr;
  3208. uint32_t *dcode, dlen;
  3209. uint32_t risc_addr;
  3210. uint32_t risc_size;
  3211. uint32_t i;
  3212. rval = QLA_SUCCESS;
  3213. segments = FA_RISC_CODE_SEGMENTS;
  3214. faddr = FA_RISC_CODE_ADDR;
  3215. dcode = (uint32_t *)ha->request_ring;
  3216. *srisc_addr = 0;
  3217. /* Validate firmware image by checking version. */
  3218. qla24xx_read_flash_data(ha, dcode, faddr + 4, 4);
  3219. for (i = 0; i < 4; i++)
  3220. dcode[i] = be32_to_cpu(dcode[i]);
  3221. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3222. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3223. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3224. dcode[3] == 0)) {
  3225. qla_printk(KERN_WARNING, ha,
  3226. "Unable to verify integrity of flash firmware image!\n");
  3227. qla_printk(KERN_WARNING, ha,
  3228. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3229. dcode[1], dcode[2], dcode[3]);
  3230. return QLA_FUNCTION_FAILED;
  3231. }
  3232. while (segments && rval == QLA_SUCCESS) {
  3233. /* Read segment's load information. */
  3234. qla24xx_read_flash_data(ha, dcode, faddr, 4);
  3235. risc_addr = be32_to_cpu(dcode[2]);
  3236. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3237. risc_size = be32_to_cpu(dcode[3]);
  3238. fragment = 0;
  3239. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3240. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3241. if (dlen > risc_size)
  3242. dlen = risc_size;
  3243. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3244. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3245. ha->host_no, risc_addr, dlen, faddr));
  3246. qla24xx_read_flash_data(ha, dcode, faddr, dlen);
  3247. for (i = 0; i < dlen; i++)
  3248. dcode[i] = swab32(dcode[i]);
  3249. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3250. dlen);
  3251. if (rval) {
  3252. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3253. "segment %d of firmware\n", ha->host_no,
  3254. fragment));
  3255. qla_printk(KERN_WARNING, ha,
  3256. "[ERROR] Failed to load segment %d of "
  3257. "firmware\n", fragment);
  3258. break;
  3259. }
  3260. faddr += dlen;
  3261. risc_addr += dlen;
  3262. risc_size -= dlen;
  3263. fragment++;
  3264. }
  3265. /* Next segment. */
  3266. segments--;
  3267. }
  3268. return rval;
  3269. }
  3270. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3271. int
  3272. qla2x00_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3273. {
  3274. int rval;
  3275. int i, fragment;
  3276. uint16_t *wcode, *fwcode;
  3277. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3278. struct fw_blob *blob;
  3279. /* Load firmware blob. */
  3280. blob = qla2x00_request_firmware(ha);
  3281. if (!blob) {
  3282. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3283. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3284. "from: " QLA_FW_URL ".\n");
  3285. return QLA_FUNCTION_FAILED;
  3286. }
  3287. rval = QLA_SUCCESS;
  3288. wcode = (uint16_t *)ha->request_ring;
  3289. *srisc_addr = 0;
  3290. fwcode = (uint16_t *)blob->fw->data;
  3291. fwclen = 0;
  3292. /* Validate firmware image by checking version. */
  3293. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3294. qla_printk(KERN_WARNING, ha,
  3295. "Unable to verify integrity of firmware image (%Zd)!\n",
  3296. blob->fw->size);
  3297. goto fail_fw_integrity;
  3298. }
  3299. for (i = 0; i < 4; i++)
  3300. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3301. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3302. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3303. wcode[2] == 0 && wcode[3] == 0)) {
  3304. qla_printk(KERN_WARNING, ha,
  3305. "Unable to verify integrity of firmware image!\n");
  3306. qla_printk(KERN_WARNING, ha,
  3307. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3308. wcode[1], wcode[2], wcode[3]);
  3309. goto fail_fw_integrity;
  3310. }
  3311. seg = blob->segs;
  3312. while (*seg && rval == QLA_SUCCESS) {
  3313. risc_addr = *seg;
  3314. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3315. risc_size = be16_to_cpu(fwcode[3]);
  3316. /* Validate firmware image size. */
  3317. fwclen += risc_size * sizeof(uint16_t);
  3318. if (blob->fw->size < fwclen) {
  3319. qla_printk(KERN_WARNING, ha,
  3320. "Unable to verify integrity of firmware image "
  3321. "(%Zd)!\n", blob->fw->size);
  3322. goto fail_fw_integrity;
  3323. }
  3324. fragment = 0;
  3325. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3326. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3327. if (wlen > risc_size)
  3328. wlen = risc_size;
  3329. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3330. "addr %x, number of words 0x%x.\n", ha->host_no,
  3331. risc_addr, wlen));
  3332. for (i = 0; i < wlen; i++)
  3333. wcode[i] = swab16(fwcode[i]);
  3334. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3335. wlen);
  3336. if (rval) {
  3337. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3338. "segment %d of firmware\n", ha->host_no,
  3339. fragment));
  3340. qla_printk(KERN_WARNING, ha,
  3341. "[ERROR] Failed to load segment %d of "
  3342. "firmware\n", fragment);
  3343. break;
  3344. }
  3345. fwcode += wlen;
  3346. risc_addr += wlen;
  3347. risc_size -= wlen;
  3348. fragment++;
  3349. }
  3350. /* Next segment. */
  3351. seg++;
  3352. }
  3353. return rval;
  3354. fail_fw_integrity:
  3355. return QLA_FUNCTION_FAILED;
  3356. }
  3357. int
  3358. qla24xx_load_risc(scsi_qla_host_t *ha, uint32_t *srisc_addr)
  3359. {
  3360. int rval;
  3361. int segments, fragment;
  3362. uint32_t *dcode, dlen;
  3363. uint32_t risc_addr;
  3364. uint32_t risc_size;
  3365. uint32_t i;
  3366. struct fw_blob *blob;
  3367. uint32_t *fwcode, fwclen;
  3368. /* Load firmware blob. */
  3369. blob = qla2x00_request_firmware(ha);
  3370. if (!blob) {
  3371. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3372. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3373. "from: " QLA_FW_URL ".\n");
  3374. /* Try to load RISC code from flash. */
  3375. qla_printk(KERN_ERR, ha, "Attempting to load (potentially "
  3376. "outdated) firmware from flash.\n");
  3377. return qla24xx_load_risc_flash(ha, srisc_addr);
  3378. }
  3379. rval = QLA_SUCCESS;
  3380. segments = FA_RISC_CODE_SEGMENTS;
  3381. dcode = (uint32_t *)ha->request_ring;
  3382. *srisc_addr = 0;
  3383. fwcode = (uint32_t *)blob->fw->data;
  3384. fwclen = 0;
  3385. /* Validate firmware image by checking version. */
  3386. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3387. qla_printk(KERN_WARNING, ha,
  3388. "Unable to verify integrity of firmware image (%Zd)!\n",
  3389. blob->fw->size);
  3390. goto fail_fw_integrity;
  3391. }
  3392. for (i = 0; i < 4; i++)
  3393. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3394. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3395. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3396. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3397. dcode[3] == 0)) {
  3398. qla_printk(KERN_WARNING, ha,
  3399. "Unable to verify integrity of firmware image!\n");
  3400. qla_printk(KERN_WARNING, ha,
  3401. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3402. dcode[1], dcode[2], dcode[3]);
  3403. goto fail_fw_integrity;
  3404. }
  3405. while (segments && rval == QLA_SUCCESS) {
  3406. risc_addr = be32_to_cpu(fwcode[2]);
  3407. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3408. risc_size = be32_to_cpu(fwcode[3]);
  3409. /* Validate firmware image size. */
  3410. fwclen += risc_size * sizeof(uint32_t);
  3411. if (blob->fw->size < fwclen) {
  3412. qla_printk(KERN_WARNING, ha,
  3413. "Unable to verify integrity of firmware image "
  3414. "(%Zd)!\n", blob->fw->size);
  3415. goto fail_fw_integrity;
  3416. }
  3417. fragment = 0;
  3418. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3419. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3420. if (dlen > risc_size)
  3421. dlen = risc_size;
  3422. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3423. "addr %x, number of dwords 0x%x.\n", ha->host_no,
  3424. risc_addr, dlen));
  3425. for (i = 0; i < dlen; i++)
  3426. dcode[i] = swab32(fwcode[i]);
  3427. rval = qla2x00_load_ram(ha, ha->request_dma, risc_addr,
  3428. dlen);
  3429. if (rval) {
  3430. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3431. "segment %d of firmware\n", ha->host_no,
  3432. fragment));
  3433. qla_printk(KERN_WARNING, ha,
  3434. "[ERROR] Failed to load segment %d of "
  3435. "firmware\n", fragment);
  3436. break;
  3437. }
  3438. fwcode += dlen;
  3439. risc_addr += dlen;
  3440. risc_size -= dlen;
  3441. fragment++;
  3442. }
  3443. /* Next segment. */
  3444. segments--;
  3445. }
  3446. return rval;
  3447. fail_fw_integrity:
  3448. return QLA_FUNCTION_FAILED;
  3449. }
  3450. void
  3451. qla2x00_try_to_stop_firmware(scsi_qla_host_t *ha)
  3452. {
  3453. int ret, retries;
  3454. if (!IS_FWI2_CAPABLE(ha))
  3455. return;
  3456. if (!ha->fw_major_version)
  3457. return;
  3458. ret = qla2x00_stop_firmware(ha);
  3459. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3460. retries ; retries--) {
  3461. ha->isp_ops->reset_chip(ha);
  3462. if (ha->isp_ops->chip_diag(ha) != QLA_SUCCESS)
  3463. continue;
  3464. if (qla2x00_setup_chip(ha) != QLA_SUCCESS)
  3465. continue;
  3466. qla_printk(KERN_INFO, ha,
  3467. "Attempting retry of stop-firmware command...\n");
  3468. ret = qla2x00_stop_firmware(ha);
  3469. }
  3470. }
  3471. int
  3472. qla24xx_configure_vhba(scsi_qla_host_t *ha)
  3473. {
  3474. int rval = QLA_SUCCESS;
  3475. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3476. if (!ha->parent)
  3477. return -EINVAL;
  3478. rval = qla2x00_fw_ready(ha->parent);
  3479. if (rval == QLA_SUCCESS) {
  3480. clear_bit(RESET_MARKER_NEEDED, &ha->dpc_flags);
  3481. qla2x00_marker(ha, 0, 0, MK_SYNC_ALL);
  3482. }
  3483. ha->flags.management_server_logged_in = 0;
  3484. /* Login to SNS first */
  3485. qla24xx_login_fabric(ha->parent, NPH_SNS, 0xff, 0xff, 0xfc,
  3486. mb, BIT_1);
  3487. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3488. DEBUG15(qla_printk(KERN_INFO, ha,
  3489. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3490. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3491. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3492. return (QLA_FUNCTION_FAILED);
  3493. }
  3494. atomic_set(&ha->loop_down_timer, 0);
  3495. atomic_set(&ha->loop_state, LOOP_UP);
  3496. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  3497. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  3498. rval = qla2x00_loop_resync(ha->parent);
  3499. return rval;
  3500. }
  3501. /* 84XX Support **************************************************************/
  3502. static LIST_HEAD(qla_cs84xx_list);
  3503. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3504. static struct qla_chip_state_84xx *
  3505. qla84xx_get_chip(struct scsi_qla_host *ha)
  3506. {
  3507. struct qla_chip_state_84xx *cs84xx;
  3508. mutex_lock(&qla_cs84xx_mutex);
  3509. /* Find any shared 84xx chip. */
  3510. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3511. if (cs84xx->bus == ha->pdev->bus) {
  3512. kref_get(&cs84xx->kref);
  3513. goto done;
  3514. }
  3515. }
  3516. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3517. if (!cs84xx)
  3518. goto done;
  3519. kref_init(&cs84xx->kref);
  3520. spin_lock_init(&cs84xx->access_lock);
  3521. mutex_init(&cs84xx->fw_update_mutex);
  3522. cs84xx->bus = ha->pdev->bus;
  3523. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3524. done:
  3525. mutex_unlock(&qla_cs84xx_mutex);
  3526. return cs84xx;
  3527. }
  3528. static void
  3529. __qla84xx_chip_release(struct kref *kref)
  3530. {
  3531. struct qla_chip_state_84xx *cs84xx =
  3532. container_of(kref, struct qla_chip_state_84xx, kref);
  3533. mutex_lock(&qla_cs84xx_mutex);
  3534. list_del(&cs84xx->list);
  3535. mutex_unlock(&qla_cs84xx_mutex);
  3536. kfree(cs84xx);
  3537. }
  3538. void
  3539. qla84xx_put_chip(struct scsi_qla_host *ha)
  3540. {
  3541. if (ha->cs84xx)
  3542. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3543. }
  3544. static int
  3545. qla84xx_init_chip(scsi_qla_host_t *ha)
  3546. {
  3547. int rval;
  3548. uint16_t status[2];
  3549. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3550. rval = qla84xx_verify_chip(ha, status);
  3551. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3552. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3553. QLA_SUCCESS;
  3554. }