bnx2x_cmn.c 75 KB

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  1. /* bnx2x_cmn.c: Broadcom Everest network driver.
  2. *
  3. * Copyright (c) 2007-2011 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  10. * Written by: Eliezer Tamir
  11. * Based on code from Michael Chan's bnx2 driver
  12. * UDP CSUM errata workaround by Arik Gendelman
  13. * Slowpath and fastpath rework by Vladislav Zolotarov
  14. * Statistics and Link management by Yitchak Gertner
  15. *
  16. */
  17. #include <linux/etherdevice.h>
  18. #include <linux/if_vlan.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/ip.h>
  21. #include <net/ipv6.h>
  22. #include <net/ip6_checksum.h>
  23. #include <linux/firmware.h>
  24. #include <linux/prefetch.h>
  25. #include "bnx2x_cmn.h"
  26. #include "bnx2x_init.h"
  27. static int bnx2x_setup_irqs(struct bnx2x *bp);
  28. /**
  29. * bnx2x_bz_fp - zero content of the fastpath structure.
  30. *
  31. * @bp: driver handle
  32. * @index: fastpath index to be zeroed
  33. *
  34. * Makes sure the contents of the bp->fp[index].napi is kept
  35. * intact.
  36. */
  37. static inline void bnx2x_bz_fp(struct bnx2x *bp, int index)
  38. {
  39. struct bnx2x_fastpath *fp = &bp->fp[index];
  40. struct napi_struct orig_napi = fp->napi;
  41. /* bzero bnx2x_fastpath contents */
  42. memset(fp, 0, sizeof(*fp));
  43. /* Restore the NAPI object as it has been already initialized */
  44. fp->napi = orig_napi;
  45. }
  46. /**
  47. * bnx2x_move_fp - move content of the fastpath structure.
  48. *
  49. * @bp: driver handle
  50. * @from: source FP index
  51. * @to: destination FP index
  52. *
  53. * Makes sure the contents of the bp->fp[to].napi is kept
  54. * intact.
  55. */
  56. static inline void bnx2x_move_fp(struct bnx2x *bp, int from, int to)
  57. {
  58. struct bnx2x_fastpath *from_fp = &bp->fp[from];
  59. struct bnx2x_fastpath *to_fp = &bp->fp[to];
  60. struct napi_struct orig_napi = to_fp->napi;
  61. /* Move bnx2x_fastpath contents */
  62. memcpy(to_fp, from_fp, sizeof(*to_fp));
  63. to_fp->index = to;
  64. /* Restore the NAPI object as it has been already initialized */
  65. to_fp->napi = orig_napi;
  66. }
  67. /* free skb in the packet ring at pos idx
  68. * return idx of last bd freed
  69. */
  70. static u16 bnx2x_free_tx_pkt(struct bnx2x *bp, struct bnx2x_fastpath *fp,
  71. u16 idx)
  72. {
  73. struct sw_tx_bd *tx_buf = &fp->tx_buf_ring[idx];
  74. struct eth_tx_start_bd *tx_start_bd;
  75. struct eth_tx_bd *tx_data_bd;
  76. struct sk_buff *skb = tx_buf->skb;
  77. u16 bd_idx = TX_BD(tx_buf->first_bd), new_cons;
  78. int nbd;
  79. /* prefetch skb end pointer to speedup dev_kfree_skb() */
  80. prefetch(&skb->end);
  81. DP(BNX2X_MSG_OFF, "pkt_idx %d buff @(%p)->skb %p\n",
  82. idx, tx_buf, skb);
  83. /* unmap first bd */
  84. DP(BNX2X_MSG_OFF, "free bd_idx %d\n", bd_idx);
  85. tx_start_bd = &fp->tx_desc_ring[bd_idx].start_bd;
  86. dma_unmap_single(&bp->pdev->dev, BD_UNMAP_ADDR(tx_start_bd),
  87. BD_UNMAP_LEN(tx_start_bd), DMA_TO_DEVICE);
  88. nbd = le16_to_cpu(tx_start_bd->nbd) - 1;
  89. #ifdef BNX2X_STOP_ON_ERROR
  90. if ((nbd - 1) > (MAX_SKB_FRAGS + 2)) {
  91. BNX2X_ERR("BAD nbd!\n");
  92. bnx2x_panic();
  93. }
  94. #endif
  95. new_cons = nbd + tx_buf->first_bd;
  96. /* Get the next bd */
  97. bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
  98. /* Skip a parse bd... */
  99. --nbd;
  100. bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
  101. /* ...and the TSO split header bd since they have no mapping */
  102. if (tx_buf->flags & BNX2X_TSO_SPLIT_BD) {
  103. --nbd;
  104. bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
  105. }
  106. /* now free frags */
  107. while (nbd > 0) {
  108. DP(BNX2X_MSG_OFF, "free frag bd_idx %d\n", bd_idx);
  109. tx_data_bd = &fp->tx_desc_ring[bd_idx].reg_bd;
  110. dma_unmap_page(&bp->pdev->dev, BD_UNMAP_ADDR(tx_data_bd),
  111. BD_UNMAP_LEN(tx_data_bd), DMA_TO_DEVICE);
  112. if (--nbd)
  113. bd_idx = TX_BD(NEXT_TX_IDX(bd_idx));
  114. }
  115. /* release skb */
  116. WARN_ON(!skb);
  117. dev_kfree_skb_any(skb);
  118. tx_buf->first_bd = 0;
  119. tx_buf->skb = NULL;
  120. return new_cons;
  121. }
  122. int bnx2x_tx_int(struct bnx2x_fastpath *fp)
  123. {
  124. struct bnx2x *bp = fp->bp;
  125. struct netdev_queue *txq;
  126. u16 hw_cons, sw_cons, bd_cons = fp->tx_bd_cons;
  127. #ifdef BNX2X_STOP_ON_ERROR
  128. if (unlikely(bp->panic))
  129. return -1;
  130. #endif
  131. txq = netdev_get_tx_queue(bp->dev, fp->index);
  132. hw_cons = le16_to_cpu(*fp->tx_cons_sb);
  133. sw_cons = fp->tx_pkt_cons;
  134. while (sw_cons != hw_cons) {
  135. u16 pkt_cons;
  136. pkt_cons = TX_BD(sw_cons);
  137. DP(NETIF_MSG_TX_DONE, "queue[%d]: hw_cons %u sw_cons %u "
  138. " pkt_cons %u\n",
  139. fp->index, hw_cons, sw_cons, pkt_cons);
  140. bd_cons = bnx2x_free_tx_pkt(bp, fp, pkt_cons);
  141. sw_cons++;
  142. }
  143. fp->tx_pkt_cons = sw_cons;
  144. fp->tx_bd_cons = bd_cons;
  145. /* Need to make the tx_bd_cons update visible to start_xmit()
  146. * before checking for netif_tx_queue_stopped(). Without the
  147. * memory barrier, there is a small possibility that
  148. * start_xmit() will miss it and cause the queue to be stopped
  149. * forever.
  150. */
  151. smp_mb();
  152. if (unlikely(netif_tx_queue_stopped(txq))) {
  153. /* Taking tx_lock() is needed to prevent reenabling the queue
  154. * while it's empty. This could have happen if rx_action() gets
  155. * suspended in bnx2x_tx_int() after the condition before
  156. * netif_tx_wake_queue(), while tx_action (bnx2x_start_xmit()):
  157. *
  158. * stops the queue->sees fresh tx_bd_cons->releases the queue->
  159. * sends some packets consuming the whole queue again->
  160. * stops the queue
  161. */
  162. __netif_tx_lock(txq, smp_processor_id());
  163. if ((netif_tx_queue_stopped(txq)) &&
  164. (bp->state == BNX2X_STATE_OPEN) &&
  165. (bnx2x_tx_avail(fp) >= MAX_SKB_FRAGS + 3))
  166. netif_tx_wake_queue(txq);
  167. __netif_tx_unlock(txq);
  168. }
  169. return 0;
  170. }
  171. static inline void bnx2x_update_last_max_sge(struct bnx2x_fastpath *fp,
  172. u16 idx)
  173. {
  174. u16 last_max = fp->last_max_sge;
  175. if (SUB_S16(idx, last_max) > 0)
  176. fp->last_max_sge = idx;
  177. }
  178. static void bnx2x_update_sge_prod(struct bnx2x_fastpath *fp,
  179. struct eth_fast_path_rx_cqe *fp_cqe)
  180. {
  181. struct bnx2x *bp = fp->bp;
  182. u16 sge_len = SGE_PAGE_ALIGN(le16_to_cpu(fp_cqe->pkt_len) -
  183. le16_to_cpu(fp_cqe->len_on_bd)) >>
  184. SGE_PAGE_SHIFT;
  185. u16 last_max, last_elem, first_elem;
  186. u16 delta = 0;
  187. u16 i;
  188. if (!sge_len)
  189. return;
  190. /* First mark all used pages */
  191. for (i = 0; i < sge_len; i++)
  192. SGE_MASK_CLEAR_BIT(fp,
  193. RX_SGE(le16_to_cpu(fp_cqe->sgl_or_raw_data.sgl[i])));
  194. DP(NETIF_MSG_RX_STATUS, "fp_cqe->sgl[%d] = %d\n",
  195. sge_len - 1, le16_to_cpu(fp_cqe->sgl_or_raw_data.sgl[sge_len - 1]));
  196. /* Here we assume that the last SGE index is the biggest */
  197. prefetch((void *)(fp->sge_mask));
  198. bnx2x_update_last_max_sge(fp,
  199. le16_to_cpu(fp_cqe->sgl_or_raw_data.sgl[sge_len - 1]));
  200. last_max = RX_SGE(fp->last_max_sge);
  201. last_elem = last_max >> RX_SGE_MASK_ELEM_SHIFT;
  202. first_elem = RX_SGE(fp->rx_sge_prod) >> RX_SGE_MASK_ELEM_SHIFT;
  203. /* If ring is not full */
  204. if (last_elem + 1 != first_elem)
  205. last_elem++;
  206. /* Now update the prod */
  207. for (i = first_elem; i != last_elem; i = NEXT_SGE_MASK_ELEM(i)) {
  208. if (likely(fp->sge_mask[i]))
  209. break;
  210. fp->sge_mask[i] = RX_SGE_MASK_ELEM_ONE_MASK;
  211. delta += RX_SGE_MASK_ELEM_SZ;
  212. }
  213. if (delta > 0) {
  214. fp->rx_sge_prod += delta;
  215. /* clear page-end entries */
  216. bnx2x_clear_sge_mask_next_elems(fp);
  217. }
  218. DP(NETIF_MSG_RX_STATUS,
  219. "fp->last_max_sge = %d fp->rx_sge_prod = %d\n",
  220. fp->last_max_sge, fp->rx_sge_prod);
  221. }
  222. static void bnx2x_tpa_start(struct bnx2x_fastpath *fp, u16 queue,
  223. struct sk_buff *skb, u16 cons, u16 prod)
  224. {
  225. struct bnx2x *bp = fp->bp;
  226. struct sw_rx_bd *cons_rx_buf = &fp->rx_buf_ring[cons];
  227. struct sw_rx_bd *prod_rx_buf = &fp->rx_buf_ring[prod];
  228. struct eth_rx_bd *prod_bd = &fp->rx_desc_ring[prod];
  229. dma_addr_t mapping;
  230. /* move empty skb from pool to prod and map it */
  231. prod_rx_buf->skb = fp->tpa_pool[queue].skb;
  232. mapping = dma_map_single(&bp->pdev->dev, fp->tpa_pool[queue].skb->data,
  233. fp->rx_buf_size, DMA_FROM_DEVICE);
  234. dma_unmap_addr_set(prod_rx_buf, mapping, mapping);
  235. /* move partial skb from cons to pool (don't unmap yet) */
  236. fp->tpa_pool[queue] = *cons_rx_buf;
  237. /* mark bin state as start - print error if current state != stop */
  238. if (fp->tpa_state[queue] != BNX2X_TPA_STOP)
  239. BNX2X_ERR("start of bin not in stop [%d]\n", queue);
  240. fp->tpa_state[queue] = BNX2X_TPA_START;
  241. /* point prod_bd to new skb */
  242. prod_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
  243. prod_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
  244. #ifdef BNX2X_STOP_ON_ERROR
  245. fp->tpa_queue_used |= (1 << queue);
  246. #ifdef _ASM_GENERIC_INT_L64_H
  247. DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%lx\n",
  248. #else
  249. DP(NETIF_MSG_RX_STATUS, "fp->tpa_queue_used = 0x%llx\n",
  250. #endif
  251. fp->tpa_queue_used);
  252. #endif
  253. }
  254. /* Timestamp option length allowed for TPA aggregation:
  255. *
  256. * nop nop kind length echo val
  257. */
  258. #define TPA_TSTAMP_OPT_LEN 12
  259. /**
  260. * bnx2x_set_lro_mss - calculate the approximate value of the MSS
  261. *
  262. * @bp: driver handle
  263. * @parsing_flags: parsing flags from the START CQE
  264. * @len_on_bd: total length of the first packet for the
  265. * aggregation.
  266. *
  267. * Approximate value of the MSS for this aggregation calculated using
  268. * the first packet of it.
  269. */
  270. static inline u16 bnx2x_set_lro_mss(struct bnx2x *bp, u16 parsing_flags,
  271. u16 len_on_bd)
  272. {
  273. /* TPA arrgregation won't have an IP options and TCP options
  274. * other than timestamp.
  275. */
  276. u16 hdrs_len = ETH_HLEN + sizeof(struct iphdr) + sizeof(struct tcphdr);
  277. /* Check if there was a TCP timestamp, if there is it's will
  278. * always be 12 bytes length: nop nop kind length echo val.
  279. *
  280. * Otherwise FW would close the aggregation.
  281. */
  282. if (parsing_flags & PARSING_FLAGS_TIME_STAMP_EXIST_FLAG)
  283. hdrs_len += TPA_TSTAMP_OPT_LEN;
  284. return len_on_bd - hdrs_len;
  285. }
  286. static int bnx2x_fill_frag_skb(struct bnx2x *bp, struct bnx2x_fastpath *fp,
  287. struct sk_buff *skb,
  288. struct eth_fast_path_rx_cqe *fp_cqe,
  289. u16 cqe_idx, u16 parsing_flags)
  290. {
  291. struct sw_rx_page *rx_pg, old_rx_pg;
  292. u16 len_on_bd = le16_to_cpu(fp_cqe->len_on_bd);
  293. u32 i, frag_len, frag_size, pages;
  294. int err;
  295. int j;
  296. frag_size = le16_to_cpu(fp_cqe->pkt_len) - len_on_bd;
  297. pages = SGE_PAGE_ALIGN(frag_size) >> SGE_PAGE_SHIFT;
  298. /* This is needed in order to enable forwarding support */
  299. if (frag_size)
  300. skb_shinfo(skb)->gso_size = bnx2x_set_lro_mss(bp, parsing_flags,
  301. len_on_bd);
  302. #ifdef BNX2X_STOP_ON_ERROR
  303. if (pages > min_t(u32, 8, MAX_SKB_FRAGS)*SGE_PAGE_SIZE*PAGES_PER_SGE) {
  304. BNX2X_ERR("SGL length is too long: %d. CQE index is %d\n",
  305. pages, cqe_idx);
  306. BNX2X_ERR("fp_cqe->pkt_len = %d fp_cqe->len_on_bd = %d\n",
  307. fp_cqe->pkt_len, len_on_bd);
  308. bnx2x_panic();
  309. return -EINVAL;
  310. }
  311. #endif
  312. /* Run through the SGL and compose the fragmented skb */
  313. for (i = 0, j = 0; i < pages; i += PAGES_PER_SGE, j++) {
  314. u16 sge_idx =
  315. RX_SGE(le16_to_cpu(fp_cqe->sgl_or_raw_data.sgl[j]));
  316. /* FW gives the indices of the SGE as if the ring is an array
  317. (meaning that "next" element will consume 2 indices) */
  318. frag_len = min(frag_size, (u32)(SGE_PAGE_SIZE*PAGES_PER_SGE));
  319. rx_pg = &fp->rx_page_ring[sge_idx];
  320. old_rx_pg = *rx_pg;
  321. /* If we fail to allocate a substitute page, we simply stop
  322. where we are and drop the whole packet */
  323. err = bnx2x_alloc_rx_sge(bp, fp, sge_idx);
  324. if (unlikely(err)) {
  325. fp->eth_q_stats.rx_skb_alloc_failed++;
  326. return err;
  327. }
  328. /* Unmap the page as we r going to pass it to the stack */
  329. dma_unmap_page(&bp->pdev->dev,
  330. dma_unmap_addr(&old_rx_pg, mapping),
  331. SGE_PAGE_SIZE*PAGES_PER_SGE, DMA_FROM_DEVICE);
  332. /* Add one frag and update the appropriate fields in the skb */
  333. skb_fill_page_desc(skb, j, old_rx_pg.page, 0, frag_len);
  334. skb->data_len += frag_len;
  335. skb->truesize += frag_len;
  336. skb->len += frag_len;
  337. frag_size -= frag_len;
  338. }
  339. return 0;
  340. }
  341. static void bnx2x_tpa_stop(struct bnx2x *bp, struct bnx2x_fastpath *fp,
  342. u16 queue, int pad, int len, union eth_rx_cqe *cqe,
  343. u16 cqe_idx)
  344. {
  345. struct sw_rx_bd *rx_buf = &fp->tpa_pool[queue];
  346. struct sk_buff *skb = rx_buf->skb;
  347. /* alloc new skb */
  348. struct sk_buff *new_skb = netdev_alloc_skb(bp->dev, fp->rx_buf_size);
  349. /* Unmap skb in the pool anyway, as we are going to change
  350. pool entry status to BNX2X_TPA_STOP even if new skb allocation
  351. fails. */
  352. dma_unmap_single(&bp->pdev->dev, dma_unmap_addr(rx_buf, mapping),
  353. fp->rx_buf_size, DMA_FROM_DEVICE);
  354. if (likely(new_skb)) {
  355. /* fix ip xsum and give it to the stack */
  356. /* (no need to map the new skb) */
  357. u16 parsing_flags =
  358. le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags);
  359. prefetch(skb);
  360. prefetch(((char *)(skb)) + L1_CACHE_BYTES);
  361. #ifdef BNX2X_STOP_ON_ERROR
  362. if (pad + len > fp->rx_buf_size) {
  363. BNX2X_ERR("skb_put is about to fail... "
  364. "pad %d len %d rx_buf_size %d\n",
  365. pad, len, fp->rx_buf_size);
  366. bnx2x_panic();
  367. return;
  368. }
  369. #endif
  370. skb_reserve(skb, pad);
  371. skb_put(skb, len);
  372. skb->protocol = eth_type_trans(skb, bp->dev);
  373. skb->ip_summed = CHECKSUM_UNNECESSARY;
  374. {
  375. struct iphdr *iph;
  376. iph = (struct iphdr *)skb->data;
  377. iph->check = 0;
  378. iph->check = ip_fast_csum((u8 *)iph, iph->ihl);
  379. }
  380. if (!bnx2x_fill_frag_skb(bp, fp, skb,
  381. &cqe->fast_path_cqe, cqe_idx,
  382. parsing_flags)) {
  383. if (parsing_flags & PARSING_FLAGS_VLAN)
  384. __vlan_hwaccel_put_tag(skb,
  385. le16_to_cpu(cqe->fast_path_cqe.
  386. vlan_tag));
  387. napi_gro_receive(&fp->napi, skb);
  388. } else {
  389. DP(NETIF_MSG_RX_STATUS, "Failed to allocate new pages"
  390. " - dropping packet!\n");
  391. dev_kfree_skb_any(skb);
  392. }
  393. /* put new skb in bin */
  394. fp->tpa_pool[queue].skb = new_skb;
  395. } else {
  396. /* else drop the packet and keep the buffer in the bin */
  397. DP(NETIF_MSG_RX_STATUS,
  398. "Failed to allocate new skb - dropping packet!\n");
  399. fp->eth_q_stats.rx_skb_alloc_failed++;
  400. }
  401. fp->tpa_state[queue] = BNX2X_TPA_STOP;
  402. }
  403. /* Set Toeplitz hash value in the skb using the value from the
  404. * CQE (calculated by HW).
  405. */
  406. static inline void bnx2x_set_skb_rxhash(struct bnx2x *bp, union eth_rx_cqe *cqe,
  407. struct sk_buff *skb)
  408. {
  409. /* Set Toeplitz hash from CQE */
  410. if ((bp->dev->features & NETIF_F_RXHASH) &&
  411. (cqe->fast_path_cqe.status_flags &
  412. ETH_FAST_PATH_RX_CQE_RSS_HASH_FLG))
  413. skb->rxhash =
  414. le32_to_cpu(cqe->fast_path_cqe.rss_hash_result);
  415. }
  416. int bnx2x_rx_int(struct bnx2x_fastpath *fp, int budget)
  417. {
  418. struct bnx2x *bp = fp->bp;
  419. u16 bd_cons, bd_prod, bd_prod_fw, comp_ring_cons;
  420. u16 hw_comp_cons, sw_comp_cons, sw_comp_prod;
  421. int rx_pkt = 0;
  422. #ifdef BNX2X_STOP_ON_ERROR
  423. if (unlikely(bp->panic))
  424. return 0;
  425. #endif
  426. /* CQ "next element" is of the size of the regular element,
  427. that's why it's ok here */
  428. hw_comp_cons = le16_to_cpu(*fp->rx_cons_sb);
  429. if ((hw_comp_cons & MAX_RCQ_DESC_CNT) == MAX_RCQ_DESC_CNT)
  430. hw_comp_cons++;
  431. bd_cons = fp->rx_bd_cons;
  432. bd_prod = fp->rx_bd_prod;
  433. bd_prod_fw = bd_prod;
  434. sw_comp_cons = fp->rx_comp_cons;
  435. sw_comp_prod = fp->rx_comp_prod;
  436. /* Memory barrier necessary as speculative reads of the rx
  437. * buffer can be ahead of the index in the status block
  438. */
  439. rmb();
  440. DP(NETIF_MSG_RX_STATUS,
  441. "queue[%d]: hw_comp_cons %u sw_comp_cons %u\n",
  442. fp->index, hw_comp_cons, sw_comp_cons);
  443. while (sw_comp_cons != hw_comp_cons) {
  444. struct sw_rx_bd *rx_buf = NULL;
  445. struct sk_buff *skb;
  446. union eth_rx_cqe *cqe;
  447. u8 cqe_fp_flags;
  448. u16 len, pad;
  449. comp_ring_cons = RCQ_BD(sw_comp_cons);
  450. bd_prod = RX_BD(bd_prod);
  451. bd_cons = RX_BD(bd_cons);
  452. /* Prefetch the page containing the BD descriptor
  453. at producer's index. It will be needed when new skb is
  454. allocated */
  455. prefetch((void *)(PAGE_ALIGN((unsigned long)
  456. (&fp->rx_desc_ring[bd_prod])) -
  457. PAGE_SIZE + 1));
  458. cqe = &fp->rx_comp_ring[comp_ring_cons];
  459. cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
  460. DP(NETIF_MSG_RX_STATUS, "CQE type %x err %x status %x"
  461. " queue %x vlan %x len %u\n", CQE_TYPE(cqe_fp_flags),
  462. cqe_fp_flags, cqe->fast_path_cqe.status_flags,
  463. le32_to_cpu(cqe->fast_path_cqe.rss_hash_result),
  464. le16_to_cpu(cqe->fast_path_cqe.vlan_tag),
  465. le16_to_cpu(cqe->fast_path_cqe.pkt_len));
  466. /* is this a slowpath msg? */
  467. if (unlikely(CQE_TYPE(cqe_fp_flags))) {
  468. bnx2x_sp_event(fp, cqe);
  469. goto next_cqe;
  470. /* this is an rx packet */
  471. } else {
  472. rx_buf = &fp->rx_buf_ring[bd_cons];
  473. skb = rx_buf->skb;
  474. prefetch(skb);
  475. len = le16_to_cpu(cqe->fast_path_cqe.pkt_len);
  476. pad = cqe->fast_path_cqe.placement_offset;
  477. /* - If CQE is marked both TPA_START and TPA_END it is
  478. * a non-TPA CQE.
  479. * - FP CQE will always have either TPA_START or/and
  480. * TPA_STOP flags set.
  481. */
  482. if ((!fp->disable_tpa) &&
  483. (TPA_TYPE(cqe_fp_flags) !=
  484. (TPA_TYPE_START | TPA_TYPE_END))) {
  485. u16 queue = cqe->fast_path_cqe.queue_index;
  486. if (TPA_TYPE(cqe_fp_flags) == TPA_TYPE_START) {
  487. DP(NETIF_MSG_RX_STATUS,
  488. "calling tpa_start on queue %d\n",
  489. queue);
  490. bnx2x_tpa_start(fp, queue, skb,
  491. bd_cons, bd_prod);
  492. /* Set Toeplitz hash for an LRO skb */
  493. bnx2x_set_skb_rxhash(bp, cqe, skb);
  494. goto next_rx;
  495. } else { /* TPA_STOP */
  496. DP(NETIF_MSG_RX_STATUS,
  497. "calling tpa_stop on queue %d\n",
  498. queue);
  499. if (!BNX2X_RX_SUM_FIX(cqe))
  500. BNX2X_ERR("STOP on none TCP "
  501. "data\n");
  502. /* This is a size of the linear data
  503. on this skb */
  504. len = le16_to_cpu(cqe->fast_path_cqe.
  505. len_on_bd);
  506. bnx2x_tpa_stop(bp, fp, queue, pad,
  507. len, cqe, comp_ring_cons);
  508. #ifdef BNX2X_STOP_ON_ERROR
  509. if (bp->panic)
  510. return 0;
  511. #endif
  512. bnx2x_update_sge_prod(fp,
  513. &cqe->fast_path_cqe);
  514. goto next_cqe;
  515. }
  516. }
  517. dma_sync_single_for_device(&bp->pdev->dev,
  518. dma_unmap_addr(rx_buf, mapping),
  519. pad + RX_COPY_THRESH,
  520. DMA_FROM_DEVICE);
  521. prefetch(((char *)(skb)) + L1_CACHE_BYTES);
  522. /* is this an error packet? */
  523. if (unlikely(cqe_fp_flags & ETH_RX_ERROR_FALGS)) {
  524. DP(NETIF_MSG_RX_ERR,
  525. "ERROR flags %x rx packet %u\n",
  526. cqe_fp_flags, sw_comp_cons);
  527. fp->eth_q_stats.rx_err_discard_pkt++;
  528. goto reuse_rx;
  529. }
  530. /* Since we don't have a jumbo ring
  531. * copy small packets if mtu > 1500
  532. */
  533. if ((bp->dev->mtu > ETH_MAX_PACKET_SIZE) &&
  534. (len <= RX_COPY_THRESH)) {
  535. struct sk_buff *new_skb;
  536. new_skb = netdev_alloc_skb(bp->dev,
  537. len + pad);
  538. if (new_skb == NULL) {
  539. DP(NETIF_MSG_RX_ERR,
  540. "ERROR packet dropped "
  541. "because of alloc failure\n");
  542. fp->eth_q_stats.rx_skb_alloc_failed++;
  543. goto reuse_rx;
  544. }
  545. /* aligned copy */
  546. skb_copy_from_linear_data_offset(skb, pad,
  547. new_skb->data + pad, len);
  548. skb_reserve(new_skb, pad);
  549. skb_put(new_skb, len);
  550. bnx2x_reuse_rx_skb(fp, bd_cons, bd_prod);
  551. skb = new_skb;
  552. } else
  553. if (likely(bnx2x_alloc_rx_skb(bp, fp, bd_prod) == 0)) {
  554. dma_unmap_single(&bp->pdev->dev,
  555. dma_unmap_addr(rx_buf, mapping),
  556. fp->rx_buf_size,
  557. DMA_FROM_DEVICE);
  558. skb_reserve(skb, pad);
  559. skb_put(skb, len);
  560. } else {
  561. DP(NETIF_MSG_RX_ERR,
  562. "ERROR packet dropped because "
  563. "of alloc failure\n");
  564. fp->eth_q_stats.rx_skb_alloc_failed++;
  565. reuse_rx:
  566. bnx2x_reuse_rx_skb(fp, bd_cons, bd_prod);
  567. goto next_rx;
  568. }
  569. skb->protocol = eth_type_trans(skb, bp->dev);
  570. /* Set Toeplitz hash for a none-LRO skb */
  571. bnx2x_set_skb_rxhash(bp, cqe, skb);
  572. skb_checksum_none_assert(skb);
  573. if (bp->dev->features & NETIF_F_RXCSUM) {
  574. if (likely(BNX2X_RX_CSUM_OK(cqe)))
  575. skb->ip_summed = CHECKSUM_UNNECESSARY;
  576. else
  577. fp->eth_q_stats.hw_csum_err++;
  578. }
  579. }
  580. skb_record_rx_queue(skb, fp->index);
  581. if (le16_to_cpu(cqe->fast_path_cqe.pars_flags.flags) &
  582. PARSING_FLAGS_VLAN)
  583. __vlan_hwaccel_put_tag(skb,
  584. le16_to_cpu(cqe->fast_path_cqe.vlan_tag));
  585. napi_gro_receive(&fp->napi, skb);
  586. next_rx:
  587. rx_buf->skb = NULL;
  588. bd_cons = NEXT_RX_IDX(bd_cons);
  589. bd_prod = NEXT_RX_IDX(bd_prod);
  590. bd_prod_fw = NEXT_RX_IDX(bd_prod_fw);
  591. rx_pkt++;
  592. next_cqe:
  593. sw_comp_prod = NEXT_RCQ_IDX(sw_comp_prod);
  594. sw_comp_cons = NEXT_RCQ_IDX(sw_comp_cons);
  595. if (rx_pkt == budget)
  596. break;
  597. } /* while */
  598. fp->rx_bd_cons = bd_cons;
  599. fp->rx_bd_prod = bd_prod_fw;
  600. fp->rx_comp_cons = sw_comp_cons;
  601. fp->rx_comp_prod = sw_comp_prod;
  602. /* Update producers */
  603. bnx2x_update_rx_prod(bp, fp, bd_prod_fw, sw_comp_prod,
  604. fp->rx_sge_prod);
  605. fp->rx_pkt += rx_pkt;
  606. fp->rx_calls++;
  607. return rx_pkt;
  608. }
  609. static irqreturn_t bnx2x_msix_fp_int(int irq, void *fp_cookie)
  610. {
  611. struct bnx2x_fastpath *fp = fp_cookie;
  612. struct bnx2x *bp = fp->bp;
  613. DP(BNX2X_MSG_FP, "got an MSI-X interrupt on IDX:SB "
  614. "[fp %d fw_sd %d igusb %d]\n",
  615. fp->index, fp->fw_sb_id, fp->igu_sb_id);
  616. bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID, 0, IGU_INT_DISABLE, 0);
  617. #ifdef BNX2X_STOP_ON_ERROR
  618. if (unlikely(bp->panic))
  619. return IRQ_HANDLED;
  620. #endif
  621. /* Handle Rx and Tx according to MSI-X vector */
  622. prefetch(fp->rx_cons_sb);
  623. prefetch(fp->tx_cons_sb);
  624. prefetch(&fp->sb_running_index[SM_RX_ID]);
  625. napi_schedule(&bnx2x_fp(bp, fp->index, napi));
  626. return IRQ_HANDLED;
  627. }
  628. /* HW Lock for shared dual port PHYs */
  629. void bnx2x_acquire_phy_lock(struct bnx2x *bp)
  630. {
  631. mutex_lock(&bp->port.phy_mutex);
  632. if (bp->port.need_hw_lock)
  633. bnx2x_acquire_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
  634. }
  635. void bnx2x_release_phy_lock(struct bnx2x *bp)
  636. {
  637. if (bp->port.need_hw_lock)
  638. bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_MDIO);
  639. mutex_unlock(&bp->port.phy_mutex);
  640. }
  641. /* calculates MF speed according to current linespeed and MF configuration */
  642. u16 bnx2x_get_mf_speed(struct bnx2x *bp)
  643. {
  644. u16 line_speed = bp->link_vars.line_speed;
  645. if (IS_MF(bp)) {
  646. u16 maxCfg = bnx2x_extract_max_cfg(bp,
  647. bp->mf_config[BP_VN(bp)]);
  648. /* Calculate the current MAX line speed limit for the MF
  649. * devices
  650. */
  651. if (IS_MF_SI(bp))
  652. line_speed = (line_speed * maxCfg) / 100;
  653. else { /* SD mode */
  654. u16 vn_max_rate = maxCfg * 100;
  655. if (vn_max_rate < line_speed)
  656. line_speed = vn_max_rate;
  657. }
  658. }
  659. return line_speed;
  660. }
  661. /**
  662. * bnx2x_fill_report_data - fill link report data to report
  663. *
  664. * @bp: driver handle
  665. * @data: link state to update
  666. *
  667. * It uses a none-atomic bit operations because is called under the mutex.
  668. */
  669. static inline void bnx2x_fill_report_data(struct bnx2x *bp,
  670. struct bnx2x_link_report_data *data)
  671. {
  672. u16 line_speed = bnx2x_get_mf_speed(bp);
  673. memset(data, 0, sizeof(*data));
  674. /* Fill the report data: efective line speed */
  675. data->line_speed = line_speed;
  676. /* Link is down */
  677. if (!bp->link_vars.link_up || (bp->flags & MF_FUNC_DIS))
  678. __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
  679. &data->link_report_flags);
  680. /* Full DUPLEX */
  681. if (bp->link_vars.duplex == DUPLEX_FULL)
  682. __set_bit(BNX2X_LINK_REPORT_FD, &data->link_report_flags);
  683. /* Rx Flow Control is ON */
  684. if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_RX)
  685. __set_bit(BNX2X_LINK_REPORT_RX_FC_ON, &data->link_report_flags);
  686. /* Tx Flow Control is ON */
  687. if (bp->link_vars.flow_ctrl & BNX2X_FLOW_CTRL_TX)
  688. __set_bit(BNX2X_LINK_REPORT_TX_FC_ON, &data->link_report_flags);
  689. }
  690. /**
  691. * bnx2x_link_report - report link status to OS.
  692. *
  693. * @bp: driver handle
  694. *
  695. * Calls the __bnx2x_link_report() under the same locking scheme
  696. * as a link/PHY state managing code to ensure a consistent link
  697. * reporting.
  698. */
  699. void bnx2x_link_report(struct bnx2x *bp)
  700. {
  701. bnx2x_acquire_phy_lock(bp);
  702. __bnx2x_link_report(bp);
  703. bnx2x_release_phy_lock(bp);
  704. }
  705. /**
  706. * __bnx2x_link_report - report link status to OS.
  707. *
  708. * @bp: driver handle
  709. *
  710. * None atomic inmlementation.
  711. * Should be called under the phy_lock.
  712. */
  713. void __bnx2x_link_report(struct bnx2x *bp)
  714. {
  715. struct bnx2x_link_report_data cur_data;
  716. /* reread mf_cfg */
  717. if (!CHIP_IS_E1(bp))
  718. bnx2x_read_mf_cfg(bp);
  719. /* Read the current link report info */
  720. bnx2x_fill_report_data(bp, &cur_data);
  721. /* Don't report link down or exactly the same link status twice */
  722. if (!memcmp(&cur_data, &bp->last_reported_link, sizeof(cur_data)) ||
  723. (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
  724. &bp->last_reported_link.link_report_flags) &&
  725. test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
  726. &cur_data.link_report_flags)))
  727. return;
  728. bp->link_cnt++;
  729. /* We are going to report a new link parameters now -
  730. * remember the current data for the next time.
  731. */
  732. memcpy(&bp->last_reported_link, &cur_data, sizeof(cur_data));
  733. if (test_bit(BNX2X_LINK_REPORT_LINK_DOWN,
  734. &cur_data.link_report_flags)) {
  735. netif_carrier_off(bp->dev);
  736. netdev_err(bp->dev, "NIC Link is Down\n");
  737. return;
  738. } else {
  739. netif_carrier_on(bp->dev);
  740. netdev_info(bp->dev, "NIC Link is Up, ");
  741. pr_cont("%d Mbps ", cur_data.line_speed);
  742. if (test_and_clear_bit(BNX2X_LINK_REPORT_FD,
  743. &cur_data.link_report_flags))
  744. pr_cont("full duplex");
  745. else
  746. pr_cont("half duplex");
  747. /* Handle the FC at the end so that only these flags would be
  748. * possibly set. This way we may easily check if there is no FC
  749. * enabled.
  750. */
  751. if (cur_data.link_report_flags) {
  752. if (test_bit(BNX2X_LINK_REPORT_RX_FC_ON,
  753. &cur_data.link_report_flags)) {
  754. pr_cont(", receive ");
  755. if (test_bit(BNX2X_LINK_REPORT_TX_FC_ON,
  756. &cur_data.link_report_flags))
  757. pr_cont("& transmit ");
  758. } else {
  759. pr_cont(", transmit ");
  760. }
  761. pr_cont("flow control ON");
  762. }
  763. pr_cont("\n");
  764. }
  765. }
  766. void bnx2x_init_rx_rings(struct bnx2x *bp)
  767. {
  768. int func = BP_FUNC(bp);
  769. int max_agg_queues = CHIP_IS_E1(bp) ? ETH_MAX_AGGREGATION_QUEUES_E1 :
  770. ETH_MAX_AGGREGATION_QUEUES_E1H;
  771. u16 ring_prod;
  772. int i, j;
  773. /* Allocate TPA resources */
  774. for_each_rx_queue(bp, j) {
  775. struct bnx2x_fastpath *fp = &bp->fp[j];
  776. DP(NETIF_MSG_IFUP,
  777. "mtu %d rx_buf_size %d\n", bp->dev->mtu, fp->rx_buf_size);
  778. if (!fp->disable_tpa) {
  779. /* Fill the per-aggregation pool */
  780. for (i = 0; i < max_agg_queues; i++) {
  781. fp->tpa_pool[i].skb =
  782. netdev_alloc_skb(bp->dev, fp->rx_buf_size);
  783. if (!fp->tpa_pool[i].skb) {
  784. BNX2X_ERR("Failed to allocate TPA "
  785. "skb pool for queue[%d] - "
  786. "disabling TPA on this "
  787. "queue!\n", j);
  788. bnx2x_free_tpa_pool(bp, fp, i);
  789. fp->disable_tpa = 1;
  790. break;
  791. }
  792. dma_unmap_addr_set((struct sw_rx_bd *)
  793. &bp->fp->tpa_pool[i],
  794. mapping, 0);
  795. fp->tpa_state[i] = BNX2X_TPA_STOP;
  796. }
  797. /* "next page" elements initialization */
  798. bnx2x_set_next_page_sgl(fp);
  799. /* set SGEs bit mask */
  800. bnx2x_init_sge_ring_bit_mask(fp);
  801. /* Allocate SGEs and initialize the ring elements */
  802. for (i = 0, ring_prod = 0;
  803. i < MAX_RX_SGE_CNT*NUM_RX_SGE_PAGES; i++) {
  804. if (bnx2x_alloc_rx_sge(bp, fp, ring_prod) < 0) {
  805. BNX2X_ERR("was only able to allocate "
  806. "%d rx sges\n", i);
  807. BNX2X_ERR("disabling TPA for"
  808. " queue[%d]\n", j);
  809. /* Cleanup already allocated elements */
  810. bnx2x_free_rx_sge_range(bp,
  811. fp, ring_prod);
  812. bnx2x_free_tpa_pool(bp,
  813. fp, max_agg_queues);
  814. fp->disable_tpa = 1;
  815. ring_prod = 0;
  816. break;
  817. }
  818. ring_prod = NEXT_SGE_IDX(ring_prod);
  819. }
  820. fp->rx_sge_prod = ring_prod;
  821. }
  822. }
  823. for_each_rx_queue(bp, j) {
  824. struct bnx2x_fastpath *fp = &bp->fp[j];
  825. fp->rx_bd_cons = 0;
  826. /* Activate BD ring */
  827. /* Warning!
  828. * this will generate an interrupt (to the TSTORM)
  829. * must only be done after chip is initialized
  830. */
  831. bnx2x_update_rx_prod(bp, fp, fp->rx_bd_prod, fp->rx_comp_prod,
  832. fp->rx_sge_prod);
  833. if (j != 0)
  834. continue;
  835. if (!CHIP_IS_E2(bp)) {
  836. REG_WR(bp, BAR_USTRORM_INTMEM +
  837. USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func),
  838. U64_LO(fp->rx_comp_mapping));
  839. REG_WR(bp, BAR_USTRORM_INTMEM +
  840. USTORM_MEM_WORKAROUND_ADDRESS_OFFSET(func) + 4,
  841. U64_HI(fp->rx_comp_mapping));
  842. }
  843. }
  844. }
  845. static void bnx2x_free_tx_skbs(struct bnx2x *bp)
  846. {
  847. int i;
  848. for_each_tx_queue(bp, i) {
  849. struct bnx2x_fastpath *fp = &bp->fp[i];
  850. u16 bd_cons = fp->tx_bd_cons;
  851. u16 sw_prod = fp->tx_pkt_prod;
  852. u16 sw_cons = fp->tx_pkt_cons;
  853. while (sw_cons != sw_prod) {
  854. bd_cons = bnx2x_free_tx_pkt(bp, fp, TX_BD(sw_cons));
  855. sw_cons++;
  856. }
  857. }
  858. }
  859. static void bnx2x_free_rx_bds(struct bnx2x_fastpath *fp)
  860. {
  861. struct bnx2x *bp = fp->bp;
  862. int i;
  863. /* ring wasn't allocated */
  864. if (fp->rx_buf_ring == NULL)
  865. return;
  866. for (i = 0; i < NUM_RX_BD; i++) {
  867. struct sw_rx_bd *rx_buf = &fp->rx_buf_ring[i];
  868. struct sk_buff *skb = rx_buf->skb;
  869. if (skb == NULL)
  870. continue;
  871. dma_unmap_single(&bp->pdev->dev,
  872. dma_unmap_addr(rx_buf, mapping),
  873. fp->rx_buf_size, DMA_FROM_DEVICE);
  874. rx_buf->skb = NULL;
  875. dev_kfree_skb(skb);
  876. }
  877. }
  878. static void bnx2x_free_rx_skbs(struct bnx2x *bp)
  879. {
  880. int j;
  881. for_each_rx_queue(bp, j) {
  882. struct bnx2x_fastpath *fp = &bp->fp[j];
  883. bnx2x_free_rx_bds(fp);
  884. if (!fp->disable_tpa)
  885. bnx2x_free_tpa_pool(bp, fp, CHIP_IS_E1(bp) ?
  886. ETH_MAX_AGGREGATION_QUEUES_E1 :
  887. ETH_MAX_AGGREGATION_QUEUES_E1H);
  888. }
  889. }
  890. void bnx2x_free_skbs(struct bnx2x *bp)
  891. {
  892. bnx2x_free_tx_skbs(bp);
  893. bnx2x_free_rx_skbs(bp);
  894. }
  895. void bnx2x_update_max_mf_config(struct bnx2x *bp, u32 value)
  896. {
  897. /* load old values */
  898. u32 mf_cfg = bp->mf_config[BP_VN(bp)];
  899. if (value != bnx2x_extract_max_cfg(bp, mf_cfg)) {
  900. /* leave all but MAX value */
  901. mf_cfg &= ~FUNC_MF_CFG_MAX_BW_MASK;
  902. /* set new MAX value */
  903. mf_cfg |= (value << FUNC_MF_CFG_MAX_BW_SHIFT)
  904. & FUNC_MF_CFG_MAX_BW_MASK;
  905. bnx2x_fw_command(bp, DRV_MSG_CODE_SET_MF_BW, mf_cfg);
  906. }
  907. }
  908. static void bnx2x_free_msix_irqs(struct bnx2x *bp)
  909. {
  910. int i, offset = 1;
  911. free_irq(bp->msix_table[0].vector, bp->dev);
  912. DP(NETIF_MSG_IFDOWN, "released sp irq (%d)\n",
  913. bp->msix_table[0].vector);
  914. #ifdef BCM_CNIC
  915. offset++;
  916. #endif
  917. for_each_eth_queue(bp, i) {
  918. DP(NETIF_MSG_IFDOWN, "about to release fp #%d->%d irq "
  919. "state %x\n", i, bp->msix_table[i + offset].vector,
  920. bnx2x_fp(bp, i, state));
  921. free_irq(bp->msix_table[i + offset].vector, &bp->fp[i]);
  922. }
  923. }
  924. void bnx2x_free_irq(struct bnx2x *bp)
  925. {
  926. if (bp->flags & USING_MSIX_FLAG)
  927. bnx2x_free_msix_irqs(bp);
  928. else if (bp->flags & USING_MSI_FLAG)
  929. free_irq(bp->pdev->irq, bp->dev);
  930. else
  931. free_irq(bp->pdev->irq, bp->dev);
  932. }
  933. int bnx2x_enable_msix(struct bnx2x *bp)
  934. {
  935. int msix_vec = 0, i, rc, req_cnt;
  936. bp->msix_table[msix_vec].entry = msix_vec;
  937. DP(NETIF_MSG_IFUP, "msix_table[0].entry = %d (slowpath)\n",
  938. bp->msix_table[0].entry);
  939. msix_vec++;
  940. #ifdef BCM_CNIC
  941. bp->msix_table[msix_vec].entry = msix_vec;
  942. DP(NETIF_MSG_IFUP, "msix_table[%d].entry = %d (CNIC)\n",
  943. bp->msix_table[msix_vec].entry, bp->msix_table[msix_vec].entry);
  944. msix_vec++;
  945. #endif
  946. for_each_eth_queue(bp, i) {
  947. bp->msix_table[msix_vec].entry = msix_vec;
  948. DP(NETIF_MSG_IFUP, "msix_table[%d].entry = %d "
  949. "(fastpath #%u)\n", msix_vec, msix_vec, i);
  950. msix_vec++;
  951. }
  952. req_cnt = BNX2X_NUM_ETH_QUEUES(bp) + CNIC_CONTEXT_USE + 1;
  953. rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], req_cnt);
  954. /*
  955. * reconfigure number of tx/rx queues according to available
  956. * MSI-X vectors
  957. */
  958. if (rc >= BNX2X_MIN_MSIX_VEC_CNT) {
  959. /* how less vectors we will have? */
  960. int diff = req_cnt - rc;
  961. DP(NETIF_MSG_IFUP,
  962. "Trying to use less MSI-X vectors: %d\n", rc);
  963. rc = pci_enable_msix(bp->pdev, &bp->msix_table[0], rc);
  964. if (rc) {
  965. DP(NETIF_MSG_IFUP,
  966. "MSI-X is not attainable rc %d\n", rc);
  967. return rc;
  968. }
  969. /*
  970. * decrease number of queues by number of unallocated entries
  971. */
  972. bp->num_queues -= diff;
  973. DP(NETIF_MSG_IFUP, "New queue configuration set: %d\n",
  974. bp->num_queues);
  975. } else if (rc) {
  976. /* fall to INTx if not enough memory */
  977. if (rc == -ENOMEM)
  978. bp->flags |= DISABLE_MSI_FLAG;
  979. DP(NETIF_MSG_IFUP, "MSI-X is not attainable rc %d\n", rc);
  980. return rc;
  981. }
  982. bp->flags |= USING_MSIX_FLAG;
  983. return 0;
  984. }
  985. static int bnx2x_req_msix_irqs(struct bnx2x *bp)
  986. {
  987. int i, rc, offset = 1;
  988. rc = request_irq(bp->msix_table[0].vector, bnx2x_msix_sp_int, 0,
  989. bp->dev->name, bp->dev);
  990. if (rc) {
  991. BNX2X_ERR("request sp irq failed\n");
  992. return -EBUSY;
  993. }
  994. #ifdef BCM_CNIC
  995. offset++;
  996. #endif
  997. for_each_eth_queue(bp, i) {
  998. struct bnx2x_fastpath *fp = &bp->fp[i];
  999. snprintf(fp->name, sizeof(fp->name), "%s-fp-%d",
  1000. bp->dev->name, i);
  1001. rc = request_irq(bp->msix_table[offset].vector,
  1002. bnx2x_msix_fp_int, 0, fp->name, fp);
  1003. if (rc) {
  1004. BNX2X_ERR("request fp #%d irq failed rc %d\n", i, rc);
  1005. bnx2x_free_msix_irqs(bp);
  1006. return -EBUSY;
  1007. }
  1008. offset++;
  1009. fp->state = BNX2X_FP_STATE_IRQ;
  1010. }
  1011. i = BNX2X_NUM_ETH_QUEUES(bp);
  1012. offset = 1 + CNIC_CONTEXT_USE;
  1013. netdev_info(bp->dev, "using MSI-X IRQs: sp %d fp[%d] %d"
  1014. " ... fp[%d] %d\n",
  1015. bp->msix_table[0].vector,
  1016. 0, bp->msix_table[offset].vector,
  1017. i - 1, bp->msix_table[offset + i - 1].vector);
  1018. return 0;
  1019. }
  1020. int bnx2x_enable_msi(struct bnx2x *bp)
  1021. {
  1022. int rc;
  1023. rc = pci_enable_msi(bp->pdev);
  1024. if (rc) {
  1025. DP(NETIF_MSG_IFUP, "MSI is not attainable\n");
  1026. return -1;
  1027. }
  1028. bp->flags |= USING_MSI_FLAG;
  1029. return 0;
  1030. }
  1031. static int bnx2x_req_irq(struct bnx2x *bp)
  1032. {
  1033. unsigned long flags;
  1034. int rc;
  1035. if (bp->flags & USING_MSI_FLAG)
  1036. flags = 0;
  1037. else
  1038. flags = IRQF_SHARED;
  1039. rc = request_irq(bp->pdev->irq, bnx2x_interrupt, flags,
  1040. bp->dev->name, bp->dev);
  1041. if (!rc)
  1042. bnx2x_fp(bp, 0, state) = BNX2X_FP_STATE_IRQ;
  1043. return rc;
  1044. }
  1045. static void bnx2x_napi_enable(struct bnx2x *bp)
  1046. {
  1047. int i;
  1048. for_each_napi_queue(bp, i)
  1049. napi_enable(&bnx2x_fp(bp, i, napi));
  1050. }
  1051. static void bnx2x_napi_disable(struct bnx2x *bp)
  1052. {
  1053. int i;
  1054. for_each_napi_queue(bp, i)
  1055. napi_disable(&bnx2x_fp(bp, i, napi));
  1056. }
  1057. void bnx2x_netif_start(struct bnx2x *bp)
  1058. {
  1059. if (netif_running(bp->dev)) {
  1060. bnx2x_napi_enable(bp);
  1061. bnx2x_int_enable(bp);
  1062. if (bp->state == BNX2X_STATE_OPEN)
  1063. netif_tx_wake_all_queues(bp->dev);
  1064. }
  1065. }
  1066. void bnx2x_netif_stop(struct bnx2x *bp, int disable_hw)
  1067. {
  1068. bnx2x_int_disable_sync(bp, disable_hw);
  1069. bnx2x_napi_disable(bp);
  1070. netif_tx_disable(bp->dev);
  1071. }
  1072. u16 bnx2x_select_queue(struct net_device *dev, struct sk_buff *skb)
  1073. {
  1074. #ifdef BCM_CNIC
  1075. struct bnx2x *bp = netdev_priv(dev);
  1076. if (NO_FCOE(bp))
  1077. return skb_tx_hash(dev, skb);
  1078. else {
  1079. struct ethhdr *hdr = (struct ethhdr *)skb->data;
  1080. u16 ether_type = ntohs(hdr->h_proto);
  1081. /* Skip VLAN tag if present */
  1082. if (ether_type == ETH_P_8021Q) {
  1083. struct vlan_ethhdr *vhdr =
  1084. (struct vlan_ethhdr *)skb->data;
  1085. ether_type = ntohs(vhdr->h_vlan_encapsulated_proto);
  1086. }
  1087. /* If ethertype is FCoE or FIP - use FCoE ring */
  1088. if ((ether_type == ETH_P_FCOE) || (ether_type == ETH_P_FIP))
  1089. return bnx2x_fcoe(bp, index);
  1090. }
  1091. #endif
  1092. /* Select a none-FCoE queue: if FCoE is enabled, exclude FCoE L2 ring
  1093. */
  1094. return __skb_tx_hash(dev, skb,
  1095. dev->real_num_tx_queues - FCOE_CONTEXT_USE);
  1096. }
  1097. void bnx2x_set_num_queues(struct bnx2x *bp)
  1098. {
  1099. switch (bp->multi_mode) {
  1100. case ETH_RSS_MODE_DISABLED:
  1101. bp->num_queues = 1;
  1102. break;
  1103. case ETH_RSS_MODE_REGULAR:
  1104. bp->num_queues = bnx2x_calc_num_queues(bp);
  1105. break;
  1106. default:
  1107. bp->num_queues = 1;
  1108. break;
  1109. }
  1110. /* Add special queues */
  1111. bp->num_queues += NONE_ETH_CONTEXT_USE;
  1112. }
  1113. #ifdef BCM_CNIC
  1114. static inline void bnx2x_set_fcoe_eth_macs(struct bnx2x *bp)
  1115. {
  1116. if (!NO_FCOE(bp)) {
  1117. if (!IS_MF_SD(bp))
  1118. bnx2x_set_fip_eth_mac_addr(bp, 1);
  1119. bnx2x_set_all_enode_macs(bp, 1);
  1120. bp->flags |= FCOE_MACS_SET;
  1121. }
  1122. }
  1123. #endif
  1124. static void bnx2x_release_firmware(struct bnx2x *bp)
  1125. {
  1126. kfree(bp->init_ops_offsets);
  1127. kfree(bp->init_ops);
  1128. kfree(bp->init_data);
  1129. release_firmware(bp->firmware);
  1130. }
  1131. static inline int bnx2x_set_real_num_queues(struct bnx2x *bp)
  1132. {
  1133. int rc, num = bp->num_queues;
  1134. #ifdef BCM_CNIC
  1135. if (NO_FCOE(bp))
  1136. num -= FCOE_CONTEXT_USE;
  1137. #endif
  1138. netif_set_real_num_tx_queues(bp->dev, num);
  1139. rc = netif_set_real_num_rx_queues(bp->dev, num);
  1140. return rc;
  1141. }
  1142. static inline void bnx2x_set_rx_buf_size(struct bnx2x *bp)
  1143. {
  1144. int i;
  1145. for_each_queue(bp, i) {
  1146. struct bnx2x_fastpath *fp = &bp->fp[i];
  1147. /* Always use a mini-jumbo MTU for the FCoE L2 ring */
  1148. if (IS_FCOE_IDX(i))
  1149. /*
  1150. * Although there are no IP frames expected to arrive to
  1151. * this ring we still want to add an
  1152. * IP_HEADER_ALIGNMENT_PADDING to prevent a buffer
  1153. * overrun attack.
  1154. */
  1155. fp->rx_buf_size =
  1156. BNX2X_FCOE_MINI_JUMBO_MTU + ETH_OVREHEAD +
  1157. BNX2X_RX_ALIGN + IP_HEADER_ALIGNMENT_PADDING;
  1158. else
  1159. fp->rx_buf_size =
  1160. bp->dev->mtu + ETH_OVREHEAD + BNX2X_RX_ALIGN +
  1161. IP_HEADER_ALIGNMENT_PADDING;
  1162. }
  1163. }
  1164. /* must be called with rtnl_lock */
  1165. int bnx2x_nic_load(struct bnx2x *bp, int load_mode)
  1166. {
  1167. u32 load_code;
  1168. int i, rc;
  1169. /* Set init arrays */
  1170. rc = bnx2x_init_firmware(bp);
  1171. if (rc) {
  1172. BNX2X_ERR("Error loading firmware\n");
  1173. return rc;
  1174. }
  1175. #ifdef BNX2X_STOP_ON_ERROR
  1176. if (unlikely(bp->panic))
  1177. return -EPERM;
  1178. #endif
  1179. bp->state = BNX2X_STATE_OPENING_WAIT4_LOAD;
  1180. /* Set the initial link reported state to link down */
  1181. bnx2x_acquire_phy_lock(bp);
  1182. memset(&bp->last_reported_link, 0, sizeof(bp->last_reported_link));
  1183. __set_bit(BNX2X_LINK_REPORT_LINK_DOWN,
  1184. &bp->last_reported_link.link_report_flags);
  1185. bnx2x_release_phy_lock(bp);
  1186. /* must be called before memory allocation and HW init */
  1187. bnx2x_ilt_set_info(bp);
  1188. /* zero fastpath structures preserving invariants like napi which are
  1189. * allocated only once
  1190. */
  1191. for_each_queue(bp, i)
  1192. bnx2x_bz_fp(bp, i);
  1193. /* Set the receive queues buffer size */
  1194. bnx2x_set_rx_buf_size(bp);
  1195. for_each_queue(bp, i)
  1196. bnx2x_fp(bp, i, disable_tpa) =
  1197. ((bp->flags & TPA_ENABLE_FLAG) == 0);
  1198. #ifdef BCM_CNIC
  1199. /* We don't want TPA on FCoE L2 ring */
  1200. bnx2x_fcoe(bp, disable_tpa) = 1;
  1201. #endif
  1202. if (bnx2x_alloc_mem(bp))
  1203. return -ENOMEM;
  1204. /* As long as bnx2x_alloc_mem() may possibly update
  1205. * bp->num_queues, bnx2x_set_real_num_queues() should always
  1206. * come after it.
  1207. */
  1208. rc = bnx2x_set_real_num_queues(bp);
  1209. if (rc) {
  1210. BNX2X_ERR("Unable to set real_num_queues\n");
  1211. goto load_error0;
  1212. }
  1213. bnx2x_napi_enable(bp);
  1214. /* Send LOAD_REQUEST command to MCP
  1215. Returns the type of LOAD command:
  1216. if it is the first port to be initialized
  1217. common blocks should be initialized, otherwise - not
  1218. */
  1219. if (!BP_NOMCP(bp)) {
  1220. load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_REQ, 0);
  1221. if (!load_code) {
  1222. BNX2X_ERR("MCP response failure, aborting\n");
  1223. rc = -EBUSY;
  1224. goto load_error1;
  1225. }
  1226. if (load_code == FW_MSG_CODE_DRV_LOAD_REFUSED) {
  1227. rc = -EBUSY; /* other port in diagnostic mode */
  1228. goto load_error1;
  1229. }
  1230. } else {
  1231. int path = BP_PATH(bp);
  1232. int port = BP_PORT(bp);
  1233. DP(NETIF_MSG_IFUP, "NO MCP - load counts[%d] %d, %d, %d\n",
  1234. path, load_count[path][0], load_count[path][1],
  1235. load_count[path][2]);
  1236. load_count[path][0]++;
  1237. load_count[path][1 + port]++;
  1238. DP(NETIF_MSG_IFUP, "NO MCP - new load counts[%d] %d, %d, %d\n",
  1239. path, load_count[path][0], load_count[path][1],
  1240. load_count[path][2]);
  1241. if (load_count[path][0] == 1)
  1242. load_code = FW_MSG_CODE_DRV_LOAD_COMMON;
  1243. else if (load_count[path][1 + port] == 1)
  1244. load_code = FW_MSG_CODE_DRV_LOAD_PORT;
  1245. else
  1246. load_code = FW_MSG_CODE_DRV_LOAD_FUNCTION;
  1247. }
  1248. if ((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) ||
  1249. (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP) ||
  1250. (load_code == FW_MSG_CODE_DRV_LOAD_PORT))
  1251. bp->port.pmf = 1;
  1252. else
  1253. bp->port.pmf = 0;
  1254. DP(NETIF_MSG_LINK, "pmf %d\n", bp->port.pmf);
  1255. /* Initialize HW */
  1256. rc = bnx2x_init_hw(bp, load_code);
  1257. if (rc) {
  1258. BNX2X_ERR("HW init failed, aborting\n");
  1259. bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
  1260. goto load_error2;
  1261. }
  1262. /* Connect to IRQs */
  1263. rc = bnx2x_setup_irqs(bp);
  1264. if (rc) {
  1265. bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
  1266. goto load_error2;
  1267. }
  1268. /* Setup NIC internals and enable interrupts */
  1269. bnx2x_nic_init(bp, load_code);
  1270. if (((load_code == FW_MSG_CODE_DRV_LOAD_COMMON) ||
  1271. (load_code == FW_MSG_CODE_DRV_LOAD_COMMON_CHIP)) &&
  1272. (bp->common.shmem2_base))
  1273. SHMEM2_WR(bp, dcc_support,
  1274. (SHMEM_DCC_SUPPORT_DISABLE_ENABLE_PF_TLV |
  1275. SHMEM_DCC_SUPPORT_BANDWIDTH_ALLOCATION_TLV));
  1276. /* Send LOAD_DONE command to MCP */
  1277. if (!BP_NOMCP(bp)) {
  1278. load_code = bnx2x_fw_command(bp, DRV_MSG_CODE_LOAD_DONE, 0);
  1279. if (!load_code) {
  1280. BNX2X_ERR("MCP response failure, aborting\n");
  1281. rc = -EBUSY;
  1282. goto load_error3;
  1283. }
  1284. }
  1285. bnx2x_dcbx_init(bp);
  1286. bp->state = BNX2X_STATE_OPENING_WAIT4_PORT;
  1287. rc = bnx2x_func_start(bp);
  1288. if (rc) {
  1289. BNX2X_ERR("Function start failed!\n");
  1290. #ifndef BNX2X_STOP_ON_ERROR
  1291. goto load_error3;
  1292. #else
  1293. bp->panic = 1;
  1294. return -EBUSY;
  1295. #endif
  1296. }
  1297. rc = bnx2x_setup_client(bp, &bp->fp[0], 1 /* Leading */);
  1298. if (rc) {
  1299. BNX2X_ERR("Setup leading failed!\n");
  1300. #ifndef BNX2X_STOP_ON_ERROR
  1301. goto load_error3;
  1302. #else
  1303. bp->panic = 1;
  1304. return -EBUSY;
  1305. #endif
  1306. }
  1307. if (!CHIP_IS_E1(bp) &&
  1308. (bp->mf_config[BP_VN(bp)] & FUNC_MF_CFG_FUNC_DISABLED)) {
  1309. DP(NETIF_MSG_IFUP, "mf_cfg function disabled\n");
  1310. bp->flags |= MF_FUNC_DIS;
  1311. }
  1312. #ifdef BCM_CNIC
  1313. /* Enable Timer scan */
  1314. REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + BP_PORT(bp)*4, 1);
  1315. #endif
  1316. for_each_nondefault_queue(bp, i) {
  1317. rc = bnx2x_setup_client(bp, &bp->fp[i], 0);
  1318. if (rc)
  1319. #ifdef BCM_CNIC
  1320. goto load_error4;
  1321. #else
  1322. goto load_error3;
  1323. #endif
  1324. }
  1325. /* Now when Clients are configured we are ready to work */
  1326. bp->state = BNX2X_STATE_OPEN;
  1327. #ifdef BCM_CNIC
  1328. bnx2x_set_fcoe_eth_macs(bp);
  1329. #endif
  1330. bnx2x_set_eth_mac(bp, 1);
  1331. /* Clear MC configuration */
  1332. if (CHIP_IS_E1(bp))
  1333. bnx2x_invalidate_e1_mc_list(bp);
  1334. else
  1335. bnx2x_invalidate_e1h_mc_list(bp);
  1336. /* Clear UC lists configuration */
  1337. bnx2x_invalidate_uc_list(bp);
  1338. if (bp->pending_max) {
  1339. bnx2x_update_max_mf_config(bp, bp->pending_max);
  1340. bp->pending_max = 0;
  1341. }
  1342. if (bp->port.pmf)
  1343. bnx2x_initial_phy_init(bp, load_mode);
  1344. /* Initialize Rx filtering */
  1345. bnx2x_set_rx_mode(bp->dev);
  1346. /* Start fast path */
  1347. switch (load_mode) {
  1348. case LOAD_NORMAL:
  1349. /* Tx queue should be only reenabled */
  1350. netif_tx_wake_all_queues(bp->dev);
  1351. /* Initialize the receive filter. */
  1352. break;
  1353. case LOAD_OPEN:
  1354. netif_tx_start_all_queues(bp->dev);
  1355. smp_mb__after_clear_bit();
  1356. break;
  1357. case LOAD_DIAG:
  1358. bp->state = BNX2X_STATE_DIAG;
  1359. break;
  1360. default:
  1361. break;
  1362. }
  1363. if (!bp->port.pmf)
  1364. bnx2x__link_status_update(bp);
  1365. /* start the timer */
  1366. mod_timer(&bp->timer, jiffies + bp->current_interval);
  1367. #ifdef BCM_CNIC
  1368. bnx2x_setup_cnic_irq_info(bp);
  1369. if (bp->state == BNX2X_STATE_OPEN)
  1370. bnx2x_cnic_notify(bp, CNIC_CTL_START_CMD);
  1371. #endif
  1372. bnx2x_inc_load_cnt(bp);
  1373. bnx2x_release_firmware(bp);
  1374. return 0;
  1375. #ifdef BCM_CNIC
  1376. load_error4:
  1377. /* Disable Timer scan */
  1378. REG_WR(bp, TM_REG_EN_LINEAR0_TIMER + BP_PORT(bp)*4, 0);
  1379. #endif
  1380. load_error3:
  1381. bnx2x_int_disable_sync(bp, 1);
  1382. /* Free SKBs, SGEs, TPA pool and driver internals */
  1383. bnx2x_free_skbs(bp);
  1384. for_each_rx_queue(bp, i)
  1385. bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
  1386. /* Release IRQs */
  1387. bnx2x_free_irq(bp);
  1388. load_error2:
  1389. if (!BP_NOMCP(bp)) {
  1390. bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_REQ_WOL_MCP, 0);
  1391. bnx2x_fw_command(bp, DRV_MSG_CODE_UNLOAD_DONE, 0);
  1392. }
  1393. bp->port.pmf = 0;
  1394. load_error1:
  1395. bnx2x_napi_disable(bp);
  1396. load_error0:
  1397. bnx2x_free_mem(bp);
  1398. bnx2x_release_firmware(bp);
  1399. return rc;
  1400. }
  1401. /* must be called with rtnl_lock */
  1402. int bnx2x_nic_unload(struct bnx2x *bp, int unload_mode)
  1403. {
  1404. int i;
  1405. if (bp->state == BNX2X_STATE_CLOSED) {
  1406. /* Interface has been removed - nothing to recover */
  1407. bp->recovery_state = BNX2X_RECOVERY_DONE;
  1408. bp->is_leader = 0;
  1409. bnx2x_release_hw_lock(bp, HW_LOCK_RESOURCE_RESERVED_08);
  1410. smp_wmb();
  1411. return -EINVAL;
  1412. }
  1413. #ifdef BCM_CNIC
  1414. bnx2x_cnic_notify(bp, CNIC_CTL_STOP_CMD);
  1415. #endif
  1416. bp->state = BNX2X_STATE_CLOSING_WAIT4_HALT;
  1417. /* Set "drop all" */
  1418. bp->rx_mode = BNX2X_RX_MODE_NONE;
  1419. bnx2x_set_storm_rx_mode(bp);
  1420. /* Stop Tx */
  1421. bnx2x_tx_disable(bp);
  1422. del_timer_sync(&bp->timer);
  1423. SHMEM_WR(bp, func_mb[BP_FW_MB_IDX(bp)].drv_pulse_mb,
  1424. (DRV_PULSE_ALWAYS_ALIVE | bp->fw_drv_pulse_wr_seq));
  1425. bnx2x_stats_handle(bp, STATS_EVENT_STOP);
  1426. /* Cleanup the chip if needed */
  1427. if (unload_mode != UNLOAD_RECOVERY)
  1428. bnx2x_chip_cleanup(bp, unload_mode);
  1429. else {
  1430. /* Disable HW interrupts, NAPI and Tx */
  1431. bnx2x_netif_stop(bp, 1);
  1432. /* Release IRQs */
  1433. bnx2x_free_irq(bp);
  1434. }
  1435. bp->port.pmf = 0;
  1436. /* Free SKBs, SGEs, TPA pool and driver internals */
  1437. bnx2x_free_skbs(bp);
  1438. for_each_rx_queue(bp, i)
  1439. bnx2x_free_rx_sge_range(bp, bp->fp + i, NUM_RX_SGE);
  1440. bnx2x_free_mem(bp);
  1441. bp->state = BNX2X_STATE_CLOSED;
  1442. /* The last driver must disable a "close the gate" if there is no
  1443. * parity attention or "process kill" pending.
  1444. */
  1445. if ((!bnx2x_dec_load_cnt(bp)) && (!bnx2x_chk_parity_attn(bp)) &&
  1446. bnx2x_reset_is_done(bp))
  1447. bnx2x_disable_close_the_gate(bp);
  1448. /* Reset MCP mail box sequence if there is on going recovery */
  1449. if (unload_mode == UNLOAD_RECOVERY)
  1450. bp->fw_seq = 0;
  1451. return 0;
  1452. }
  1453. int bnx2x_set_power_state(struct bnx2x *bp, pci_power_t state)
  1454. {
  1455. u16 pmcsr;
  1456. /* If there is no power capability, silently succeed */
  1457. if (!bp->pm_cap) {
  1458. DP(NETIF_MSG_HW, "No power capability. Breaking.\n");
  1459. return 0;
  1460. }
  1461. pci_read_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL, &pmcsr);
  1462. switch (state) {
  1463. case PCI_D0:
  1464. pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,
  1465. ((pmcsr & ~PCI_PM_CTRL_STATE_MASK) |
  1466. PCI_PM_CTRL_PME_STATUS));
  1467. if (pmcsr & PCI_PM_CTRL_STATE_MASK)
  1468. /* delay required during transition out of D3hot */
  1469. msleep(20);
  1470. break;
  1471. case PCI_D3hot:
  1472. /* If there are other clients above don't
  1473. shut down the power */
  1474. if (atomic_read(&bp->pdev->enable_cnt) != 1)
  1475. return 0;
  1476. /* Don't shut down the power for emulation and FPGA */
  1477. if (CHIP_REV_IS_SLOW(bp))
  1478. return 0;
  1479. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  1480. pmcsr |= 3;
  1481. if (bp->wol)
  1482. pmcsr |= PCI_PM_CTRL_PME_ENABLE;
  1483. pci_write_config_word(bp->pdev, bp->pm_cap + PCI_PM_CTRL,
  1484. pmcsr);
  1485. /* No more memory access after this point until
  1486. * device is brought back to D0.
  1487. */
  1488. break;
  1489. default:
  1490. return -EINVAL;
  1491. }
  1492. return 0;
  1493. }
  1494. /*
  1495. * net_device service functions
  1496. */
  1497. int bnx2x_poll(struct napi_struct *napi, int budget)
  1498. {
  1499. int work_done = 0;
  1500. struct bnx2x_fastpath *fp = container_of(napi, struct bnx2x_fastpath,
  1501. napi);
  1502. struct bnx2x *bp = fp->bp;
  1503. while (1) {
  1504. #ifdef BNX2X_STOP_ON_ERROR
  1505. if (unlikely(bp->panic)) {
  1506. napi_complete(napi);
  1507. return 0;
  1508. }
  1509. #endif
  1510. if (bnx2x_has_tx_work(fp))
  1511. bnx2x_tx_int(fp);
  1512. if (bnx2x_has_rx_work(fp)) {
  1513. work_done += bnx2x_rx_int(fp, budget - work_done);
  1514. /* must not complete if we consumed full budget */
  1515. if (work_done >= budget)
  1516. break;
  1517. }
  1518. /* Fall out from the NAPI loop if needed */
  1519. if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) {
  1520. #ifdef BCM_CNIC
  1521. /* No need to update SB for FCoE L2 ring as long as
  1522. * it's connected to the default SB and the SB
  1523. * has been updated when NAPI was scheduled.
  1524. */
  1525. if (IS_FCOE_FP(fp)) {
  1526. napi_complete(napi);
  1527. break;
  1528. }
  1529. #endif
  1530. bnx2x_update_fpsb_idx(fp);
  1531. /* bnx2x_has_rx_work() reads the status block,
  1532. * thus we need to ensure that status block indices
  1533. * have been actually read (bnx2x_update_fpsb_idx)
  1534. * prior to this check (bnx2x_has_rx_work) so that
  1535. * we won't write the "newer" value of the status block
  1536. * to IGU (if there was a DMA right after
  1537. * bnx2x_has_rx_work and if there is no rmb, the memory
  1538. * reading (bnx2x_update_fpsb_idx) may be postponed
  1539. * to right before bnx2x_ack_sb). In this case there
  1540. * will never be another interrupt until there is
  1541. * another update of the status block, while there
  1542. * is still unhandled work.
  1543. */
  1544. rmb();
  1545. if (!(bnx2x_has_rx_work(fp) || bnx2x_has_tx_work(fp))) {
  1546. napi_complete(napi);
  1547. /* Re-enable interrupts */
  1548. DP(NETIF_MSG_HW,
  1549. "Update index to %d\n", fp->fp_hc_idx);
  1550. bnx2x_ack_sb(bp, fp->igu_sb_id, USTORM_ID,
  1551. le16_to_cpu(fp->fp_hc_idx),
  1552. IGU_INT_ENABLE, 1);
  1553. break;
  1554. }
  1555. }
  1556. }
  1557. return work_done;
  1558. }
  1559. /* we split the first BD into headers and data BDs
  1560. * to ease the pain of our fellow microcode engineers
  1561. * we use one mapping for both BDs
  1562. * So far this has only been observed to happen
  1563. * in Other Operating Systems(TM)
  1564. */
  1565. static noinline u16 bnx2x_tx_split(struct bnx2x *bp,
  1566. struct bnx2x_fastpath *fp,
  1567. struct sw_tx_bd *tx_buf,
  1568. struct eth_tx_start_bd **tx_bd, u16 hlen,
  1569. u16 bd_prod, int nbd)
  1570. {
  1571. struct eth_tx_start_bd *h_tx_bd = *tx_bd;
  1572. struct eth_tx_bd *d_tx_bd;
  1573. dma_addr_t mapping;
  1574. int old_len = le16_to_cpu(h_tx_bd->nbytes);
  1575. /* first fix first BD */
  1576. h_tx_bd->nbd = cpu_to_le16(nbd);
  1577. h_tx_bd->nbytes = cpu_to_le16(hlen);
  1578. DP(NETIF_MSG_TX_QUEUED, "TSO split header size is %d "
  1579. "(%x:%x) nbd %d\n", h_tx_bd->nbytes, h_tx_bd->addr_hi,
  1580. h_tx_bd->addr_lo, h_tx_bd->nbd);
  1581. /* now get a new data BD
  1582. * (after the pbd) and fill it */
  1583. bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
  1584. d_tx_bd = &fp->tx_desc_ring[bd_prod].reg_bd;
  1585. mapping = HILO_U64(le32_to_cpu(h_tx_bd->addr_hi),
  1586. le32_to_cpu(h_tx_bd->addr_lo)) + hlen;
  1587. d_tx_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
  1588. d_tx_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
  1589. d_tx_bd->nbytes = cpu_to_le16(old_len - hlen);
  1590. /* this marks the BD as one that has no individual mapping */
  1591. tx_buf->flags |= BNX2X_TSO_SPLIT_BD;
  1592. DP(NETIF_MSG_TX_QUEUED,
  1593. "TSO split data size is %d (%x:%x)\n",
  1594. d_tx_bd->nbytes, d_tx_bd->addr_hi, d_tx_bd->addr_lo);
  1595. /* update tx_bd */
  1596. *tx_bd = (struct eth_tx_start_bd *)d_tx_bd;
  1597. return bd_prod;
  1598. }
  1599. static inline u16 bnx2x_csum_fix(unsigned char *t_header, u16 csum, s8 fix)
  1600. {
  1601. if (fix > 0)
  1602. csum = (u16) ~csum_fold(csum_sub(csum,
  1603. csum_partial(t_header - fix, fix, 0)));
  1604. else if (fix < 0)
  1605. csum = (u16) ~csum_fold(csum_add(csum,
  1606. csum_partial(t_header, -fix, 0)));
  1607. return swab16(csum);
  1608. }
  1609. static inline u32 bnx2x_xmit_type(struct bnx2x *bp, struct sk_buff *skb)
  1610. {
  1611. u32 rc;
  1612. if (skb->ip_summed != CHECKSUM_PARTIAL)
  1613. rc = XMIT_PLAIN;
  1614. else {
  1615. if (vlan_get_protocol(skb) == htons(ETH_P_IPV6)) {
  1616. rc = XMIT_CSUM_V6;
  1617. if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
  1618. rc |= XMIT_CSUM_TCP;
  1619. } else {
  1620. rc = XMIT_CSUM_V4;
  1621. if (ip_hdr(skb)->protocol == IPPROTO_TCP)
  1622. rc |= XMIT_CSUM_TCP;
  1623. }
  1624. }
  1625. if (skb_is_gso_v6(skb))
  1626. rc |= XMIT_GSO_V6 | XMIT_CSUM_TCP | XMIT_CSUM_V6;
  1627. else if (skb_is_gso(skb))
  1628. rc |= XMIT_GSO_V4 | XMIT_CSUM_V4 | XMIT_CSUM_TCP;
  1629. return rc;
  1630. }
  1631. #if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3)
  1632. /* check if packet requires linearization (packet is too fragmented)
  1633. no need to check fragmentation if page size > 8K (there will be no
  1634. violation to FW restrictions) */
  1635. static int bnx2x_pkt_req_lin(struct bnx2x *bp, struct sk_buff *skb,
  1636. u32 xmit_type)
  1637. {
  1638. int to_copy = 0;
  1639. int hlen = 0;
  1640. int first_bd_sz = 0;
  1641. /* 3 = 1 (for linear data BD) + 2 (for PBD and last BD) */
  1642. if (skb_shinfo(skb)->nr_frags >= (MAX_FETCH_BD - 3)) {
  1643. if (xmit_type & XMIT_GSO) {
  1644. unsigned short lso_mss = skb_shinfo(skb)->gso_size;
  1645. /* Check if LSO packet needs to be copied:
  1646. 3 = 1 (for headers BD) + 2 (for PBD and last BD) */
  1647. int wnd_size = MAX_FETCH_BD - 3;
  1648. /* Number of windows to check */
  1649. int num_wnds = skb_shinfo(skb)->nr_frags - wnd_size;
  1650. int wnd_idx = 0;
  1651. int frag_idx = 0;
  1652. u32 wnd_sum = 0;
  1653. /* Headers length */
  1654. hlen = (int)(skb_transport_header(skb) - skb->data) +
  1655. tcp_hdrlen(skb);
  1656. /* Amount of data (w/o headers) on linear part of SKB*/
  1657. first_bd_sz = skb_headlen(skb) - hlen;
  1658. wnd_sum = first_bd_sz;
  1659. /* Calculate the first sum - it's special */
  1660. for (frag_idx = 0; frag_idx < wnd_size - 1; frag_idx++)
  1661. wnd_sum +=
  1662. skb_shinfo(skb)->frags[frag_idx].size;
  1663. /* If there was data on linear skb data - check it */
  1664. if (first_bd_sz > 0) {
  1665. if (unlikely(wnd_sum < lso_mss)) {
  1666. to_copy = 1;
  1667. goto exit_lbl;
  1668. }
  1669. wnd_sum -= first_bd_sz;
  1670. }
  1671. /* Others are easier: run through the frag list and
  1672. check all windows */
  1673. for (wnd_idx = 0; wnd_idx <= num_wnds; wnd_idx++) {
  1674. wnd_sum +=
  1675. skb_shinfo(skb)->frags[wnd_idx + wnd_size - 1].size;
  1676. if (unlikely(wnd_sum < lso_mss)) {
  1677. to_copy = 1;
  1678. break;
  1679. }
  1680. wnd_sum -=
  1681. skb_shinfo(skb)->frags[wnd_idx].size;
  1682. }
  1683. } else {
  1684. /* in non-LSO too fragmented packet should always
  1685. be linearized */
  1686. to_copy = 1;
  1687. }
  1688. }
  1689. exit_lbl:
  1690. if (unlikely(to_copy))
  1691. DP(NETIF_MSG_TX_QUEUED,
  1692. "Linearization IS REQUIRED for %s packet. "
  1693. "num_frags %d hlen %d first_bd_sz %d\n",
  1694. (xmit_type & XMIT_GSO) ? "LSO" : "non-LSO",
  1695. skb_shinfo(skb)->nr_frags, hlen, first_bd_sz);
  1696. return to_copy;
  1697. }
  1698. #endif
  1699. static inline void bnx2x_set_pbd_gso_e2(struct sk_buff *skb, u32 *parsing_data,
  1700. u32 xmit_type)
  1701. {
  1702. *parsing_data |= (skb_shinfo(skb)->gso_size <<
  1703. ETH_TX_PARSE_BD_E2_LSO_MSS_SHIFT) &
  1704. ETH_TX_PARSE_BD_E2_LSO_MSS;
  1705. if ((xmit_type & XMIT_GSO_V6) &&
  1706. (ipv6_hdr(skb)->nexthdr == NEXTHDR_IPV6))
  1707. *parsing_data |= ETH_TX_PARSE_BD_E2_IPV6_WITH_EXT_HDR;
  1708. }
  1709. /**
  1710. * bnx2x_set_pbd_gso - update PBD in GSO case.
  1711. *
  1712. * @skb: packet skb
  1713. * @pbd: parse BD
  1714. * @xmit_type: xmit flags
  1715. */
  1716. static inline void bnx2x_set_pbd_gso(struct sk_buff *skb,
  1717. struct eth_tx_parse_bd_e1x *pbd,
  1718. u32 xmit_type)
  1719. {
  1720. pbd->lso_mss = cpu_to_le16(skb_shinfo(skb)->gso_size);
  1721. pbd->tcp_send_seq = swab32(tcp_hdr(skb)->seq);
  1722. pbd->tcp_flags = pbd_tcp_flags(skb);
  1723. if (xmit_type & XMIT_GSO_V4) {
  1724. pbd->ip_id = swab16(ip_hdr(skb)->id);
  1725. pbd->tcp_pseudo_csum =
  1726. swab16(~csum_tcpudp_magic(ip_hdr(skb)->saddr,
  1727. ip_hdr(skb)->daddr,
  1728. 0, IPPROTO_TCP, 0));
  1729. } else
  1730. pbd->tcp_pseudo_csum =
  1731. swab16(~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
  1732. &ipv6_hdr(skb)->daddr,
  1733. 0, IPPROTO_TCP, 0));
  1734. pbd->global_data |= ETH_TX_PARSE_BD_E1X_PSEUDO_CS_WITHOUT_LEN;
  1735. }
  1736. /**
  1737. * bnx2x_set_pbd_csum_e2 - update PBD with checksum and return header length
  1738. *
  1739. * @bp: driver handle
  1740. * @skb: packet skb
  1741. * @parsing_data: data to be updated
  1742. * @xmit_type: xmit flags
  1743. *
  1744. * 57712 related
  1745. */
  1746. static inline u8 bnx2x_set_pbd_csum_e2(struct bnx2x *bp, struct sk_buff *skb,
  1747. u32 *parsing_data, u32 xmit_type)
  1748. {
  1749. *parsing_data |=
  1750. ((((u8 *)skb_transport_header(skb) - skb->data) >> 1) <<
  1751. ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W_SHIFT) &
  1752. ETH_TX_PARSE_BD_E2_TCP_HDR_START_OFFSET_W;
  1753. if (xmit_type & XMIT_CSUM_TCP) {
  1754. *parsing_data |= ((tcp_hdrlen(skb) / 4) <<
  1755. ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW_SHIFT) &
  1756. ETH_TX_PARSE_BD_E2_TCP_HDR_LENGTH_DW;
  1757. return skb_transport_header(skb) + tcp_hdrlen(skb) - skb->data;
  1758. } else
  1759. /* We support checksum offload for TCP and UDP only.
  1760. * No need to pass the UDP header length - it's a constant.
  1761. */
  1762. return skb_transport_header(skb) +
  1763. sizeof(struct udphdr) - skb->data;
  1764. }
  1765. /**
  1766. * bnx2x_set_pbd_csum - update PBD with checksum and return header length
  1767. *
  1768. * @bp: driver handle
  1769. * @skb: packet skb
  1770. * @pbd: parse BD to be updated
  1771. * @xmit_type: xmit flags
  1772. */
  1773. static inline u8 bnx2x_set_pbd_csum(struct bnx2x *bp, struct sk_buff *skb,
  1774. struct eth_tx_parse_bd_e1x *pbd,
  1775. u32 xmit_type)
  1776. {
  1777. u8 hlen = (skb_network_header(skb) - skb->data) >> 1;
  1778. /* for now NS flag is not used in Linux */
  1779. pbd->global_data =
  1780. (hlen | ((skb->protocol == cpu_to_be16(ETH_P_8021Q)) <<
  1781. ETH_TX_PARSE_BD_E1X_LLC_SNAP_EN_SHIFT));
  1782. pbd->ip_hlen_w = (skb_transport_header(skb) -
  1783. skb_network_header(skb)) >> 1;
  1784. hlen += pbd->ip_hlen_w;
  1785. /* We support checksum offload for TCP and UDP only */
  1786. if (xmit_type & XMIT_CSUM_TCP)
  1787. hlen += tcp_hdrlen(skb) / 2;
  1788. else
  1789. hlen += sizeof(struct udphdr) / 2;
  1790. pbd->total_hlen_w = cpu_to_le16(hlen);
  1791. hlen = hlen*2;
  1792. if (xmit_type & XMIT_CSUM_TCP) {
  1793. pbd->tcp_pseudo_csum = swab16(tcp_hdr(skb)->check);
  1794. } else {
  1795. s8 fix = SKB_CS_OFF(skb); /* signed! */
  1796. DP(NETIF_MSG_TX_QUEUED,
  1797. "hlen %d fix %d csum before fix %x\n",
  1798. le16_to_cpu(pbd->total_hlen_w), fix, SKB_CS(skb));
  1799. /* HW bug: fixup the CSUM */
  1800. pbd->tcp_pseudo_csum =
  1801. bnx2x_csum_fix(skb_transport_header(skb),
  1802. SKB_CS(skb), fix);
  1803. DP(NETIF_MSG_TX_QUEUED, "csum after fix %x\n",
  1804. pbd->tcp_pseudo_csum);
  1805. }
  1806. return hlen;
  1807. }
  1808. /* called with netif_tx_lock
  1809. * bnx2x_tx_int() runs without netif_tx_lock unless it needs to call
  1810. * netif_wake_queue()
  1811. */
  1812. netdev_tx_t bnx2x_start_xmit(struct sk_buff *skb, struct net_device *dev)
  1813. {
  1814. struct bnx2x *bp = netdev_priv(dev);
  1815. struct bnx2x_fastpath *fp;
  1816. struct netdev_queue *txq;
  1817. struct sw_tx_bd *tx_buf;
  1818. struct eth_tx_start_bd *tx_start_bd;
  1819. struct eth_tx_bd *tx_data_bd, *total_pkt_bd = NULL;
  1820. struct eth_tx_parse_bd_e1x *pbd_e1x = NULL;
  1821. struct eth_tx_parse_bd_e2 *pbd_e2 = NULL;
  1822. u32 pbd_e2_parsing_data = 0;
  1823. u16 pkt_prod, bd_prod;
  1824. int nbd, fp_index;
  1825. dma_addr_t mapping;
  1826. u32 xmit_type = bnx2x_xmit_type(bp, skb);
  1827. int i;
  1828. u8 hlen = 0;
  1829. __le16 pkt_size = 0;
  1830. struct ethhdr *eth;
  1831. u8 mac_type = UNICAST_ADDRESS;
  1832. #ifdef BNX2X_STOP_ON_ERROR
  1833. if (unlikely(bp->panic))
  1834. return NETDEV_TX_BUSY;
  1835. #endif
  1836. fp_index = skb_get_queue_mapping(skb);
  1837. txq = netdev_get_tx_queue(dev, fp_index);
  1838. fp = &bp->fp[fp_index];
  1839. if (unlikely(bnx2x_tx_avail(fp) < (skb_shinfo(skb)->nr_frags + 3))) {
  1840. fp->eth_q_stats.driver_xoff++;
  1841. netif_tx_stop_queue(txq);
  1842. BNX2X_ERR("BUG! Tx ring full when queue awake!\n");
  1843. return NETDEV_TX_BUSY;
  1844. }
  1845. DP(NETIF_MSG_TX_QUEUED, "queue[%d]: SKB: summed %x protocol %x "
  1846. "protocol(%x,%x) gso type %x xmit_type %x\n",
  1847. fp_index, skb->ip_summed, skb->protocol, ipv6_hdr(skb)->nexthdr,
  1848. ip_hdr(skb)->protocol, skb_shinfo(skb)->gso_type, xmit_type);
  1849. eth = (struct ethhdr *)skb->data;
  1850. /* set flag according to packet type (UNICAST_ADDRESS is default)*/
  1851. if (unlikely(is_multicast_ether_addr(eth->h_dest))) {
  1852. if (is_broadcast_ether_addr(eth->h_dest))
  1853. mac_type = BROADCAST_ADDRESS;
  1854. else
  1855. mac_type = MULTICAST_ADDRESS;
  1856. }
  1857. #if (MAX_SKB_FRAGS >= MAX_FETCH_BD - 3)
  1858. /* First, check if we need to linearize the skb (due to FW
  1859. restrictions). No need to check fragmentation if page size > 8K
  1860. (there will be no violation to FW restrictions) */
  1861. if (bnx2x_pkt_req_lin(bp, skb, xmit_type)) {
  1862. /* Statistics of linearization */
  1863. bp->lin_cnt++;
  1864. if (skb_linearize(skb) != 0) {
  1865. DP(NETIF_MSG_TX_QUEUED, "SKB linearization failed - "
  1866. "silently dropping this SKB\n");
  1867. dev_kfree_skb_any(skb);
  1868. return NETDEV_TX_OK;
  1869. }
  1870. }
  1871. #endif
  1872. /*
  1873. Please read carefully. First we use one BD which we mark as start,
  1874. then we have a parsing info BD (used for TSO or xsum),
  1875. and only then we have the rest of the TSO BDs.
  1876. (don't forget to mark the last one as last,
  1877. and to unmap only AFTER you write to the BD ...)
  1878. And above all, all pdb sizes are in words - NOT DWORDS!
  1879. */
  1880. pkt_prod = fp->tx_pkt_prod++;
  1881. bd_prod = TX_BD(fp->tx_bd_prod);
  1882. /* get a tx_buf and first BD */
  1883. tx_buf = &fp->tx_buf_ring[TX_BD(pkt_prod)];
  1884. tx_start_bd = &fp->tx_desc_ring[bd_prod].start_bd;
  1885. tx_start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
  1886. SET_FLAG(tx_start_bd->general_data, ETH_TX_START_BD_ETH_ADDR_TYPE,
  1887. mac_type);
  1888. /* header nbd */
  1889. SET_FLAG(tx_start_bd->general_data, ETH_TX_START_BD_HDR_NBDS, 1);
  1890. /* remember the first BD of the packet */
  1891. tx_buf->first_bd = fp->tx_bd_prod;
  1892. tx_buf->skb = skb;
  1893. tx_buf->flags = 0;
  1894. DP(NETIF_MSG_TX_QUEUED,
  1895. "sending pkt %u @%p next_idx %u bd %u @%p\n",
  1896. pkt_prod, tx_buf, fp->tx_pkt_prod, bd_prod, tx_start_bd);
  1897. if (vlan_tx_tag_present(skb)) {
  1898. tx_start_bd->vlan_or_ethertype =
  1899. cpu_to_le16(vlan_tx_tag_get(skb));
  1900. tx_start_bd->bd_flags.as_bitfield |=
  1901. (X_ETH_OUTBAND_VLAN << ETH_TX_BD_FLAGS_VLAN_MODE_SHIFT);
  1902. } else
  1903. tx_start_bd->vlan_or_ethertype = cpu_to_le16(pkt_prod);
  1904. /* turn on parsing and get a BD */
  1905. bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
  1906. if (xmit_type & XMIT_CSUM) {
  1907. tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_L4_CSUM;
  1908. if (xmit_type & XMIT_CSUM_V4)
  1909. tx_start_bd->bd_flags.as_bitfield |=
  1910. ETH_TX_BD_FLAGS_IP_CSUM;
  1911. else
  1912. tx_start_bd->bd_flags.as_bitfield |=
  1913. ETH_TX_BD_FLAGS_IPV6;
  1914. if (!(xmit_type & XMIT_CSUM_TCP))
  1915. tx_start_bd->bd_flags.as_bitfield |=
  1916. ETH_TX_BD_FLAGS_IS_UDP;
  1917. }
  1918. if (CHIP_IS_E2(bp)) {
  1919. pbd_e2 = &fp->tx_desc_ring[bd_prod].parse_bd_e2;
  1920. memset(pbd_e2, 0, sizeof(struct eth_tx_parse_bd_e2));
  1921. /* Set PBD in checksum offload case */
  1922. if (xmit_type & XMIT_CSUM)
  1923. hlen = bnx2x_set_pbd_csum_e2(bp, skb,
  1924. &pbd_e2_parsing_data,
  1925. xmit_type);
  1926. } else {
  1927. pbd_e1x = &fp->tx_desc_ring[bd_prod].parse_bd_e1x;
  1928. memset(pbd_e1x, 0, sizeof(struct eth_tx_parse_bd_e1x));
  1929. /* Set PBD in checksum offload case */
  1930. if (xmit_type & XMIT_CSUM)
  1931. hlen = bnx2x_set_pbd_csum(bp, skb, pbd_e1x, xmit_type);
  1932. }
  1933. /* Map skb linear data for DMA */
  1934. mapping = dma_map_single(&bp->pdev->dev, skb->data,
  1935. skb_headlen(skb), DMA_TO_DEVICE);
  1936. /* Setup the data pointer of the first BD of the packet */
  1937. tx_start_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
  1938. tx_start_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
  1939. nbd = skb_shinfo(skb)->nr_frags + 2; /* start_bd + pbd + frags */
  1940. tx_start_bd->nbd = cpu_to_le16(nbd);
  1941. tx_start_bd->nbytes = cpu_to_le16(skb_headlen(skb));
  1942. pkt_size = tx_start_bd->nbytes;
  1943. DP(NETIF_MSG_TX_QUEUED, "first bd @%p addr (%x:%x) nbd %d"
  1944. " nbytes %d flags %x vlan %x\n",
  1945. tx_start_bd, tx_start_bd->addr_hi, tx_start_bd->addr_lo,
  1946. le16_to_cpu(tx_start_bd->nbd), le16_to_cpu(tx_start_bd->nbytes),
  1947. tx_start_bd->bd_flags.as_bitfield,
  1948. le16_to_cpu(tx_start_bd->vlan_or_ethertype));
  1949. if (xmit_type & XMIT_GSO) {
  1950. DP(NETIF_MSG_TX_QUEUED,
  1951. "TSO packet len %d hlen %d total len %d tso size %d\n",
  1952. skb->len, hlen, skb_headlen(skb),
  1953. skb_shinfo(skb)->gso_size);
  1954. tx_start_bd->bd_flags.as_bitfield |= ETH_TX_BD_FLAGS_SW_LSO;
  1955. if (unlikely(skb_headlen(skb) > hlen))
  1956. bd_prod = bnx2x_tx_split(bp, fp, tx_buf, &tx_start_bd,
  1957. hlen, bd_prod, ++nbd);
  1958. if (CHIP_IS_E2(bp))
  1959. bnx2x_set_pbd_gso_e2(skb, &pbd_e2_parsing_data,
  1960. xmit_type);
  1961. else
  1962. bnx2x_set_pbd_gso(skb, pbd_e1x, xmit_type);
  1963. }
  1964. /* Set the PBD's parsing_data field if not zero
  1965. * (for the chips newer than 57711).
  1966. */
  1967. if (pbd_e2_parsing_data)
  1968. pbd_e2->parsing_data = cpu_to_le32(pbd_e2_parsing_data);
  1969. tx_data_bd = (struct eth_tx_bd *)tx_start_bd;
  1970. /* Handle fragmented skb */
  1971. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  1972. skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
  1973. bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
  1974. tx_data_bd = &fp->tx_desc_ring[bd_prod].reg_bd;
  1975. if (total_pkt_bd == NULL)
  1976. total_pkt_bd = &fp->tx_desc_ring[bd_prod].reg_bd;
  1977. mapping = dma_map_page(&bp->pdev->dev, frag->page,
  1978. frag->page_offset,
  1979. frag->size, DMA_TO_DEVICE);
  1980. tx_data_bd->addr_hi = cpu_to_le32(U64_HI(mapping));
  1981. tx_data_bd->addr_lo = cpu_to_le32(U64_LO(mapping));
  1982. tx_data_bd->nbytes = cpu_to_le16(frag->size);
  1983. le16_add_cpu(&pkt_size, frag->size);
  1984. DP(NETIF_MSG_TX_QUEUED,
  1985. "frag %d bd @%p addr (%x:%x) nbytes %d\n",
  1986. i, tx_data_bd, tx_data_bd->addr_hi, tx_data_bd->addr_lo,
  1987. le16_to_cpu(tx_data_bd->nbytes));
  1988. }
  1989. DP(NETIF_MSG_TX_QUEUED, "last bd @%p\n", tx_data_bd);
  1990. bd_prod = TX_BD(NEXT_TX_IDX(bd_prod));
  1991. /* now send a tx doorbell, counting the next BD
  1992. * if the packet contains or ends with it
  1993. */
  1994. if (TX_BD_POFF(bd_prod) < nbd)
  1995. nbd++;
  1996. if (total_pkt_bd != NULL)
  1997. total_pkt_bd->total_pkt_bytes = pkt_size;
  1998. if (pbd_e1x)
  1999. DP(NETIF_MSG_TX_QUEUED,
  2000. "PBD (E1X) @%p ip_data %x ip_hlen %u ip_id %u lso_mss %u"
  2001. " tcp_flags %x xsum %x seq %u hlen %u\n",
  2002. pbd_e1x, pbd_e1x->global_data, pbd_e1x->ip_hlen_w,
  2003. pbd_e1x->ip_id, pbd_e1x->lso_mss, pbd_e1x->tcp_flags,
  2004. pbd_e1x->tcp_pseudo_csum, pbd_e1x->tcp_send_seq,
  2005. le16_to_cpu(pbd_e1x->total_hlen_w));
  2006. if (pbd_e2)
  2007. DP(NETIF_MSG_TX_QUEUED,
  2008. "PBD (E2) @%p dst %x %x %x src %x %x %x parsing_data %x\n",
  2009. pbd_e2, pbd_e2->dst_mac_addr_hi, pbd_e2->dst_mac_addr_mid,
  2010. pbd_e2->dst_mac_addr_lo, pbd_e2->src_mac_addr_hi,
  2011. pbd_e2->src_mac_addr_mid, pbd_e2->src_mac_addr_lo,
  2012. pbd_e2->parsing_data);
  2013. DP(NETIF_MSG_TX_QUEUED, "doorbell: nbd %d bd %u\n", nbd, bd_prod);
  2014. /*
  2015. * Make sure that the BD data is updated before updating the producer
  2016. * since FW might read the BD right after the producer is updated.
  2017. * This is only applicable for weak-ordered memory model archs such
  2018. * as IA-64. The following barrier is also mandatory since FW will
  2019. * assumes packets must have BDs.
  2020. */
  2021. wmb();
  2022. fp->tx_db.data.prod += nbd;
  2023. barrier();
  2024. DOORBELL(bp, fp->cid, fp->tx_db.raw);
  2025. mmiowb();
  2026. fp->tx_bd_prod += nbd;
  2027. if (unlikely(bnx2x_tx_avail(fp) < MAX_SKB_FRAGS + 3)) {
  2028. netif_tx_stop_queue(txq);
  2029. /* paired memory barrier is in bnx2x_tx_int(), we have to keep
  2030. * ordering of set_bit() in netif_tx_stop_queue() and read of
  2031. * fp->bd_tx_cons */
  2032. smp_mb();
  2033. fp->eth_q_stats.driver_xoff++;
  2034. if (bnx2x_tx_avail(fp) >= MAX_SKB_FRAGS + 3)
  2035. netif_tx_wake_queue(txq);
  2036. }
  2037. fp->tx_pkt++;
  2038. return NETDEV_TX_OK;
  2039. }
  2040. /* called with rtnl_lock */
  2041. int bnx2x_change_mac_addr(struct net_device *dev, void *p)
  2042. {
  2043. struct sockaddr *addr = p;
  2044. struct bnx2x *bp = netdev_priv(dev);
  2045. if (!is_valid_ether_addr((u8 *)(addr->sa_data)))
  2046. return -EINVAL;
  2047. memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
  2048. if (netif_running(dev))
  2049. bnx2x_set_eth_mac(bp, 1);
  2050. return 0;
  2051. }
  2052. static void bnx2x_free_fp_mem_at(struct bnx2x *bp, int fp_index)
  2053. {
  2054. union host_hc_status_block *sb = &bnx2x_fp(bp, fp_index, status_blk);
  2055. struct bnx2x_fastpath *fp = &bp->fp[fp_index];
  2056. /* Common */
  2057. #ifdef BCM_CNIC
  2058. if (IS_FCOE_IDX(fp_index)) {
  2059. memset(sb, 0, sizeof(union host_hc_status_block));
  2060. fp->status_blk_mapping = 0;
  2061. } else {
  2062. #endif
  2063. /* status blocks */
  2064. if (CHIP_IS_E2(bp))
  2065. BNX2X_PCI_FREE(sb->e2_sb,
  2066. bnx2x_fp(bp, fp_index,
  2067. status_blk_mapping),
  2068. sizeof(struct host_hc_status_block_e2));
  2069. else
  2070. BNX2X_PCI_FREE(sb->e1x_sb,
  2071. bnx2x_fp(bp, fp_index,
  2072. status_blk_mapping),
  2073. sizeof(struct host_hc_status_block_e1x));
  2074. #ifdef BCM_CNIC
  2075. }
  2076. #endif
  2077. /* Rx */
  2078. if (!skip_rx_queue(bp, fp_index)) {
  2079. bnx2x_free_rx_bds(fp);
  2080. /* fastpath rx rings: rx_buf rx_desc rx_comp */
  2081. BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_buf_ring));
  2082. BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_desc_ring),
  2083. bnx2x_fp(bp, fp_index, rx_desc_mapping),
  2084. sizeof(struct eth_rx_bd) * NUM_RX_BD);
  2085. BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_comp_ring),
  2086. bnx2x_fp(bp, fp_index, rx_comp_mapping),
  2087. sizeof(struct eth_fast_path_rx_cqe) *
  2088. NUM_RCQ_BD);
  2089. /* SGE ring */
  2090. BNX2X_FREE(bnx2x_fp(bp, fp_index, rx_page_ring));
  2091. BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, rx_sge_ring),
  2092. bnx2x_fp(bp, fp_index, rx_sge_mapping),
  2093. BCM_PAGE_SIZE * NUM_RX_SGE_PAGES);
  2094. }
  2095. /* Tx */
  2096. if (!skip_tx_queue(bp, fp_index)) {
  2097. /* fastpath tx rings: tx_buf tx_desc */
  2098. BNX2X_FREE(bnx2x_fp(bp, fp_index, tx_buf_ring));
  2099. BNX2X_PCI_FREE(bnx2x_fp(bp, fp_index, tx_desc_ring),
  2100. bnx2x_fp(bp, fp_index, tx_desc_mapping),
  2101. sizeof(union eth_tx_bd_types) * NUM_TX_BD);
  2102. }
  2103. /* end of fastpath */
  2104. }
  2105. void bnx2x_free_fp_mem(struct bnx2x *bp)
  2106. {
  2107. int i;
  2108. for_each_queue(bp, i)
  2109. bnx2x_free_fp_mem_at(bp, i);
  2110. }
  2111. static inline void set_sb_shortcuts(struct bnx2x *bp, int index)
  2112. {
  2113. union host_hc_status_block status_blk = bnx2x_fp(bp, index, status_blk);
  2114. if (CHIP_IS_E2(bp)) {
  2115. bnx2x_fp(bp, index, sb_index_values) =
  2116. (__le16 *)status_blk.e2_sb->sb.index_values;
  2117. bnx2x_fp(bp, index, sb_running_index) =
  2118. (__le16 *)status_blk.e2_sb->sb.running_index;
  2119. } else {
  2120. bnx2x_fp(bp, index, sb_index_values) =
  2121. (__le16 *)status_blk.e1x_sb->sb.index_values;
  2122. bnx2x_fp(bp, index, sb_running_index) =
  2123. (__le16 *)status_blk.e1x_sb->sb.running_index;
  2124. }
  2125. }
  2126. static int bnx2x_alloc_fp_mem_at(struct bnx2x *bp, int index)
  2127. {
  2128. union host_hc_status_block *sb;
  2129. struct bnx2x_fastpath *fp = &bp->fp[index];
  2130. int ring_size = 0;
  2131. /* if rx_ring_size specified - use it */
  2132. int rx_ring_size = bp->rx_ring_size ? bp->rx_ring_size :
  2133. MAX_RX_AVAIL/bp->num_queues;
  2134. /* allocate at least number of buffers required by FW */
  2135. rx_ring_size = max_t(int, fp->disable_tpa ? MIN_RX_SIZE_NONTPA :
  2136. MIN_RX_SIZE_TPA,
  2137. rx_ring_size);
  2138. bnx2x_fp(bp, index, bp) = bp;
  2139. bnx2x_fp(bp, index, index) = index;
  2140. /* Common */
  2141. sb = &bnx2x_fp(bp, index, status_blk);
  2142. #ifdef BCM_CNIC
  2143. if (!IS_FCOE_IDX(index)) {
  2144. #endif
  2145. /* status blocks */
  2146. if (CHIP_IS_E2(bp))
  2147. BNX2X_PCI_ALLOC(sb->e2_sb,
  2148. &bnx2x_fp(bp, index, status_blk_mapping),
  2149. sizeof(struct host_hc_status_block_e2));
  2150. else
  2151. BNX2X_PCI_ALLOC(sb->e1x_sb,
  2152. &bnx2x_fp(bp, index, status_blk_mapping),
  2153. sizeof(struct host_hc_status_block_e1x));
  2154. #ifdef BCM_CNIC
  2155. }
  2156. #endif
  2157. /* FCoE Queue uses Default SB and doesn't ACK the SB, thus no need to
  2158. * set shortcuts for it.
  2159. */
  2160. if (!IS_FCOE_IDX(index))
  2161. set_sb_shortcuts(bp, index);
  2162. /* Tx */
  2163. if (!skip_tx_queue(bp, index)) {
  2164. /* fastpath tx rings: tx_buf tx_desc */
  2165. BNX2X_ALLOC(bnx2x_fp(bp, index, tx_buf_ring),
  2166. sizeof(struct sw_tx_bd) * NUM_TX_BD);
  2167. BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, tx_desc_ring),
  2168. &bnx2x_fp(bp, index, tx_desc_mapping),
  2169. sizeof(union eth_tx_bd_types) * NUM_TX_BD);
  2170. }
  2171. /* Rx */
  2172. if (!skip_rx_queue(bp, index)) {
  2173. /* fastpath rx rings: rx_buf rx_desc rx_comp */
  2174. BNX2X_ALLOC(bnx2x_fp(bp, index, rx_buf_ring),
  2175. sizeof(struct sw_rx_bd) * NUM_RX_BD);
  2176. BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_desc_ring),
  2177. &bnx2x_fp(bp, index, rx_desc_mapping),
  2178. sizeof(struct eth_rx_bd) * NUM_RX_BD);
  2179. BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_comp_ring),
  2180. &bnx2x_fp(bp, index, rx_comp_mapping),
  2181. sizeof(struct eth_fast_path_rx_cqe) *
  2182. NUM_RCQ_BD);
  2183. /* SGE ring */
  2184. BNX2X_ALLOC(bnx2x_fp(bp, index, rx_page_ring),
  2185. sizeof(struct sw_rx_page) * NUM_RX_SGE);
  2186. BNX2X_PCI_ALLOC(bnx2x_fp(bp, index, rx_sge_ring),
  2187. &bnx2x_fp(bp, index, rx_sge_mapping),
  2188. BCM_PAGE_SIZE * NUM_RX_SGE_PAGES);
  2189. /* RX BD ring */
  2190. bnx2x_set_next_page_rx_bd(fp);
  2191. /* CQ ring */
  2192. bnx2x_set_next_page_rx_cq(fp);
  2193. /* BDs */
  2194. ring_size = bnx2x_alloc_rx_bds(fp, rx_ring_size);
  2195. if (ring_size < rx_ring_size)
  2196. goto alloc_mem_err;
  2197. }
  2198. return 0;
  2199. /* handles low memory cases */
  2200. alloc_mem_err:
  2201. BNX2X_ERR("Unable to allocate full memory for queue %d (size %d)\n",
  2202. index, ring_size);
  2203. /* FW will drop all packets if queue is not big enough,
  2204. * In these cases we disable the queue
  2205. * Min size diferent for TPA and non-TPA queues
  2206. */
  2207. if (ring_size < (fp->disable_tpa ?
  2208. MIN_RX_SIZE_NONTPA : MIN_RX_SIZE_TPA)) {
  2209. /* release memory allocated for this queue */
  2210. bnx2x_free_fp_mem_at(bp, index);
  2211. return -ENOMEM;
  2212. }
  2213. return 0;
  2214. }
  2215. int bnx2x_alloc_fp_mem(struct bnx2x *bp)
  2216. {
  2217. int i;
  2218. /**
  2219. * 1. Allocate FP for leading - fatal if error
  2220. * 2. {CNIC} Allocate FCoE FP - fatal if error
  2221. * 3. Allocate RSS - fix number of queues if error
  2222. */
  2223. /* leading */
  2224. if (bnx2x_alloc_fp_mem_at(bp, 0))
  2225. return -ENOMEM;
  2226. #ifdef BCM_CNIC
  2227. if (!NO_FCOE(bp))
  2228. /* FCoE */
  2229. if (bnx2x_alloc_fp_mem_at(bp, FCOE_IDX))
  2230. /* we will fail load process instead of mark
  2231. * NO_FCOE_FLAG
  2232. */
  2233. return -ENOMEM;
  2234. #endif
  2235. /* RSS */
  2236. for_each_nondefault_eth_queue(bp, i)
  2237. if (bnx2x_alloc_fp_mem_at(bp, i))
  2238. break;
  2239. /* handle memory failures */
  2240. if (i != BNX2X_NUM_ETH_QUEUES(bp)) {
  2241. int delta = BNX2X_NUM_ETH_QUEUES(bp) - i;
  2242. WARN_ON(delta < 0);
  2243. #ifdef BCM_CNIC
  2244. /**
  2245. * move non eth FPs next to last eth FP
  2246. * must be done in that order
  2247. * FCOE_IDX < FWD_IDX < OOO_IDX
  2248. */
  2249. /* move FCoE fp */
  2250. bnx2x_move_fp(bp, FCOE_IDX, FCOE_IDX - delta);
  2251. #endif
  2252. bp->num_queues -= delta;
  2253. BNX2X_ERR("Adjusted num of queues from %d to %d\n",
  2254. bp->num_queues + delta, bp->num_queues);
  2255. }
  2256. return 0;
  2257. }
  2258. static int bnx2x_setup_irqs(struct bnx2x *bp)
  2259. {
  2260. int rc = 0;
  2261. if (bp->flags & USING_MSIX_FLAG) {
  2262. rc = bnx2x_req_msix_irqs(bp);
  2263. if (rc)
  2264. return rc;
  2265. } else {
  2266. bnx2x_ack_int(bp);
  2267. rc = bnx2x_req_irq(bp);
  2268. if (rc) {
  2269. BNX2X_ERR("IRQ request failed rc %d, aborting\n", rc);
  2270. return rc;
  2271. }
  2272. if (bp->flags & USING_MSI_FLAG) {
  2273. bp->dev->irq = bp->pdev->irq;
  2274. netdev_info(bp->dev, "using MSI IRQ %d\n",
  2275. bp->pdev->irq);
  2276. }
  2277. }
  2278. return 0;
  2279. }
  2280. void bnx2x_free_mem_bp(struct bnx2x *bp)
  2281. {
  2282. kfree(bp->fp);
  2283. kfree(bp->msix_table);
  2284. kfree(bp->ilt);
  2285. }
  2286. int __devinit bnx2x_alloc_mem_bp(struct bnx2x *bp)
  2287. {
  2288. struct bnx2x_fastpath *fp;
  2289. struct msix_entry *tbl;
  2290. struct bnx2x_ilt *ilt;
  2291. /* fp array */
  2292. fp = kzalloc(L2_FP_COUNT(bp->l2_cid_count)*sizeof(*fp), GFP_KERNEL);
  2293. if (!fp)
  2294. goto alloc_err;
  2295. bp->fp = fp;
  2296. /* msix table */
  2297. tbl = kzalloc((FP_SB_COUNT(bp->l2_cid_count) + 1) * sizeof(*tbl),
  2298. GFP_KERNEL);
  2299. if (!tbl)
  2300. goto alloc_err;
  2301. bp->msix_table = tbl;
  2302. /* ilt */
  2303. ilt = kzalloc(sizeof(*ilt), GFP_KERNEL);
  2304. if (!ilt)
  2305. goto alloc_err;
  2306. bp->ilt = ilt;
  2307. return 0;
  2308. alloc_err:
  2309. bnx2x_free_mem_bp(bp);
  2310. return -ENOMEM;
  2311. }
  2312. static int bnx2x_reload_if_running(struct net_device *dev)
  2313. {
  2314. struct bnx2x *bp = netdev_priv(dev);
  2315. if (unlikely(!netif_running(dev)))
  2316. return 0;
  2317. bnx2x_nic_unload(bp, UNLOAD_NORMAL);
  2318. return bnx2x_nic_load(bp, LOAD_NORMAL);
  2319. }
  2320. int bnx2x_get_cur_phy_idx(struct bnx2x *bp)
  2321. {
  2322. u32 sel_phy_idx = 0;
  2323. if (bp->link_params.num_phys <= 1)
  2324. return INT_PHY;
  2325. if (bp->link_vars.link_up) {
  2326. sel_phy_idx = EXT_PHY1;
  2327. /* In case link is SERDES, check if the EXT_PHY2 is the one */
  2328. if ((bp->link_vars.link_status & LINK_STATUS_SERDES_LINK) &&
  2329. (bp->link_params.phy[EXT_PHY2].supported & SUPPORTED_FIBRE))
  2330. sel_phy_idx = EXT_PHY2;
  2331. } else {
  2332. switch (bnx2x_phy_selection(&bp->link_params)) {
  2333. case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT:
  2334. case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY:
  2335. case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY:
  2336. sel_phy_idx = EXT_PHY1;
  2337. break;
  2338. case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY:
  2339. case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY:
  2340. sel_phy_idx = EXT_PHY2;
  2341. break;
  2342. }
  2343. }
  2344. return sel_phy_idx;
  2345. }
  2346. int bnx2x_get_link_cfg_idx(struct bnx2x *bp)
  2347. {
  2348. u32 sel_phy_idx = bnx2x_get_cur_phy_idx(bp);
  2349. /*
  2350. * The selected actived PHY is always after swapping (in case PHY
  2351. * swapping is enabled). So when swapping is enabled, we need to reverse
  2352. * the configuration
  2353. */
  2354. if (bp->link_params.multi_phy_config &
  2355. PORT_HW_CFG_PHY_SWAPPED_ENABLED) {
  2356. if (sel_phy_idx == EXT_PHY1)
  2357. sel_phy_idx = EXT_PHY2;
  2358. else if (sel_phy_idx == EXT_PHY2)
  2359. sel_phy_idx = EXT_PHY1;
  2360. }
  2361. return LINK_CONFIG_IDX(sel_phy_idx);
  2362. }
  2363. /* called with rtnl_lock */
  2364. int bnx2x_change_mtu(struct net_device *dev, int new_mtu)
  2365. {
  2366. struct bnx2x *bp = netdev_priv(dev);
  2367. if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
  2368. printk(KERN_ERR "Handling parity error recovery. Try again later\n");
  2369. return -EAGAIN;
  2370. }
  2371. if ((new_mtu > ETH_MAX_JUMBO_PACKET_SIZE) ||
  2372. ((new_mtu + ETH_HLEN) < ETH_MIN_PACKET_SIZE))
  2373. return -EINVAL;
  2374. /* This does not race with packet allocation
  2375. * because the actual alloc size is
  2376. * only updated as part of load
  2377. */
  2378. dev->mtu = new_mtu;
  2379. return bnx2x_reload_if_running(dev);
  2380. }
  2381. u32 bnx2x_fix_features(struct net_device *dev, u32 features)
  2382. {
  2383. struct bnx2x *bp = netdev_priv(dev);
  2384. /* TPA requires Rx CSUM offloading */
  2385. if (!(features & NETIF_F_RXCSUM) || bp->disable_tpa)
  2386. features &= ~NETIF_F_LRO;
  2387. return features;
  2388. }
  2389. int bnx2x_set_features(struct net_device *dev, u32 features)
  2390. {
  2391. struct bnx2x *bp = netdev_priv(dev);
  2392. u32 flags = bp->flags;
  2393. bool bnx2x_reload = false;
  2394. if (features & NETIF_F_LRO)
  2395. flags |= TPA_ENABLE_FLAG;
  2396. else
  2397. flags &= ~TPA_ENABLE_FLAG;
  2398. if (features & NETIF_F_LOOPBACK) {
  2399. if (bp->link_params.loopback_mode != LOOPBACK_BMAC) {
  2400. bp->link_params.loopback_mode = LOOPBACK_BMAC;
  2401. bnx2x_reload = true;
  2402. }
  2403. } else {
  2404. if (bp->link_params.loopback_mode != LOOPBACK_NONE) {
  2405. bp->link_params.loopback_mode = LOOPBACK_NONE;
  2406. bnx2x_reload = true;
  2407. }
  2408. }
  2409. if (flags ^ bp->flags) {
  2410. bp->flags = flags;
  2411. bnx2x_reload = true;
  2412. }
  2413. if (bnx2x_reload) {
  2414. if (bp->recovery_state == BNX2X_RECOVERY_DONE)
  2415. return bnx2x_reload_if_running(dev);
  2416. /* else: bnx2x_nic_load() will be called at end of recovery */
  2417. }
  2418. return 0;
  2419. }
  2420. void bnx2x_tx_timeout(struct net_device *dev)
  2421. {
  2422. struct bnx2x *bp = netdev_priv(dev);
  2423. #ifdef BNX2X_STOP_ON_ERROR
  2424. if (!bp->panic)
  2425. bnx2x_panic();
  2426. #endif
  2427. /* This allows the netif to be shutdown gracefully before resetting */
  2428. schedule_delayed_work(&bp->reset_task, 0);
  2429. }
  2430. int bnx2x_suspend(struct pci_dev *pdev, pm_message_t state)
  2431. {
  2432. struct net_device *dev = pci_get_drvdata(pdev);
  2433. struct bnx2x *bp;
  2434. if (!dev) {
  2435. dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n");
  2436. return -ENODEV;
  2437. }
  2438. bp = netdev_priv(dev);
  2439. rtnl_lock();
  2440. pci_save_state(pdev);
  2441. if (!netif_running(dev)) {
  2442. rtnl_unlock();
  2443. return 0;
  2444. }
  2445. netif_device_detach(dev);
  2446. bnx2x_nic_unload(bp, UNLOAD_CLOSE);
  2447. bnx2x_set_power_state(bp, pci_choose_state(pdev, state));
  2448. rtnl_unlock();
  2449. return 0;
  2450. }
  2451. int bnx2x_resume(struct pci_dev *pdev)
  2452. {
  2453. struct net_device *dev = pci_get_drvdata(pdev);
  2454. struct bnx2x *bp;
  2455. int rc;
  2456. if (!dev) {
  2457. dev_err(&pdev->dev, "BAD net device from bnx2x_init_one\n");
  2458. return -ENODEV;
  2459. }
  2460. bp = netdev_priv(dev);
  2461. if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
  2462. printk(KERN_ERR "Handling parity error recovery. Try again later\n");
  2463. return -EAGAIN;
  2464. }
  2465. rtnl_lock();
  2466. pci_restore_state(pdev);
  2467. if (!netif_running(dev)) {
  2468. rtnl_unlock();
  2469. return 0;
  2470. }
  2471. bnx2x_set_power_state(bp, PCI_D0);
  2472. netif_device_attach(dev);
  2473. /* Since the chip was reset, clear the FW sequence number */
  2474. bp->fw_seq = 0;
  2475. rc = bnx2x_nic_load(bp, LOAD_OPEN);
  2476. rtnl_unlock();
  2477. return rc;
  2478. }