pm.c 8.7 KB

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  1. /* linux/arch/arm/plat-s3c/pm.c
  2. *
  3. * Copyright 2008 Openmoko, Inc.
  4. * Copyright 2004,2006,2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>
  6. * http://armlinux.simtec.co.uk/
  7. *
  8. * S3C common power management (suspend to ram) support.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/suspend.h>
  16. #include <linux/errno.h>
  17. #include <linux/delay.h>
  18. #include <linux/serial_core.h>
  19. #include <linux/io.h>
  20. #include <asm/cacheflush.h>
  21. #include <mach/hardware.h>
  22. #include <plat/regs-serial.h>
  23. #include <mach/regs-clock.h>
  24. #include <mach/regs-gpio.h>
  25. #include <mach/regs-mem.h>
  26. #include <mach/regs-irq.h>
  27. #include <asm/irq.h>
  28. #include <plat/pm.h>
  29. #include <plat/pm-core.h>
  30. /* for external use */
  31. unsigned long s3c_pm_flags;
  32. /* Debug code:
  33. *
  34. * This code supports debug output to the low level UARTs for use on
  35. * resume before the console layer is available.
  36. */
  37. #ifdef CONFIG_S3C2410_PM_DEBUG
  38. extern void printascii(const char *);
  39. void s3c_pm_dbg(const char *fmt, ...)
  40. {
  41. va_list va;
  42. char buff[256];
  43. va_start(va, fmt);
  44. vsprintf(buff, fmt, va);
  45. va_end(va);
  46. printascii(buff);
  47. }
  48. static inline void s3c_pm_debug_init(void)
  49. {
  50. /* restart uart clocks so we can use them to output */
  51. s3c_pm_debug_init_uart();
  52. }
  53. #else
  54. #define s3c_pm_debug_init() do { } while(0)
  55. #endif /* CONFIG_S3C2410_PM_DEBUG */
  56. /* Save the UART configurations if we are configured for debug. */
  57. unsigned char pm_uart_udivslot;
  58. #ifdef CONFIG_S3C2410_PM_DEBUG
  59. struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
  60. static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
  61. {
  62. void __iomem *regs = S3C_VA_UARTx(uart);
  63. save->ulcon = __raw_readl(regs + S3C2410_ULCON);
  64. save->ucon = __raw_readl(regs + S3C2410_UCON);
  65. save->ufcon = __raw_readl(regs + S3C2410_UFCON);
  66. save->umcon = __raw_readl(regs + S3C2410_UMCON);
  67. save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
  68. if (pm_uart_udivslot)
  69. save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT);
  70. S3C_PMDBG("UART[%d]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n",
  71. uart, save->ulcon, save->ucon, save->ufcon, save->ubrdiv);
  72. }
  73. static void s3c_pm_save_uarts(void)
  74. {
  75. struct pm_uart_save *save = uart_save;
  76. unsigned int uart;
  77. for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
  78. s3c_pm_save_uart(uart, save);
  79. }
  80. static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
  81. {
  82. void __iomem *regs = S3C_VA_UARTx(uart);
  83. s3c_pm_arch_update_uart(regs, save);
  84. __raw_writel(save->ulcon, regs + S3C2410_ULCON);
  85. __raw_writel(save->ucon, regs + S3C2410_UCON);
  86. __raw_writel(save->ufcon, regs + S3C2410_UFCON);
  87. __raw_writel(save->umcon, regs + S3C2410_UMCON);
  88. __raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
  89. if (pm_uart_udivslot)
  90. __raw_writel(save->udivslot, regs + S3C2443_DIVSLOT);
  91. }
  92. static void s3c_pm_restore_uarts(void)
  93. {
  94. struct pm_uart_save *save = uart_save;
  95. unsigned int uart;
  96. for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
  97. s3c_pm_restore_uart(uart, save);
  98. }
  99. #else
  100. static void s3c_pm_save_uarts(void) { }
  101. static void s3c_pm_restore_uarts(void) { }
  102. #endif
  103. /* The IRQ ext-int code goes here, it is too small to currently bother
  104. * with its own file. */
  105. unsigned long s3c_irqwake_intmask = 0xffffffffL;
  106. unsigned long s3c_irqwake_eintmask = 0xffffffffL;
  107. int s3c_irqext_wake(unsigned int irqno, unsigned int state)
  108. {
  109. unsigned long bit = 1L << IRQ_EINT_BIT(irqno);
  110. if (!(s3c_irqwake_eintallow & bit))
  111. return -ENOENT;
  112. printk(KERN_INFO "wake %s for irq %d\n",
  113. state ? "enabled" : "disabled", irqno);
  114. if (!state)
  115. s3c_irqwake_eintmask |= bit;
  116. else
  117. s3c_irqwake_eintmask &= ~bit;
  118. return 0;
  119. }
  120. /* helper functions to save and restore register state */
  121. /**
  122. * s3c_pm_do_save() - save a set of registers for restoration on resume.
  123. * @ptr: Pointer to an array of registers.
  124. * @count: Size of the ptr array.
  125. *
  126. * Run through the list of registers given, saving their contents in the
  127. * array for later restoration when we wakeup.
  128. */
  129. void s3c_pm_do_save(struct sleep_save *ptr, int count)
  130. {
  131. for (; count > 0; count--, ptr++) {
  132. ptr->val = __raw_readl(ptr->reg);
  133. S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val);
  134. }
  135. }
  136. /**
  137. * s3c_pm_do_restore() - restore register values from the save list.
  138. * @ptr: Pointer to an array of registers.
  139. * @count: Size of the ptr array.
  140. *
  141. * Restore the register values saved from s3c_pm_do_save().
  142. *
  143. * Note, we do not use S3C_PMDBG() in here, as the system may not have
  144. * restore the UARTs state yet
  145. */
  146. void s3c_pm_do_restore(struct sleep_save *ptr, int count)
  147. {
  148. for (; count > 0; count--, ptr++) {
  149. printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n",
  150. ptr->reg, ptr->val, __raw_readl(ptr->reg));
  151. __raw_writel(ptr->val, ptr->reg);
  152. }
  153. }
  154. /**
  155. * s3c_pm_do_restore_core() - early restore register values from save list.
  156. *
  157. * This is similar to s3c_pm_do_restore() except we try and minimise the
  158. * side effects of the function in case registers that hardware might need
  159. * to work has been restored.
  160. *
  161. * WARNING: Do not put any debug in here that may effect memory or use
  162. * peripherals, as things may be changing!
  163. */
  164. void s3c_pm_do_restore_core(struct sleep_save *ptr, int count)
  165. {
  166. for (; count > 0; count--, ptr++)
  167. __raw_writel(ptr->val, ptr->reg);
  168. }
  169. /* s3c2410_pm_show_resume_irqs
  170. *
  171. * print any IRQs asserted at resume time (ie, we woke from)
  172. */
  173. static void s3c_pm_show_resume_irqs(int start, unsigned long which,
  174. unsigned long mask)
  175. {
  176. int i;
  177. which &= ~mask;
  178. for (i = 0; i <= 31; i++) {
  179. if (which & (1L<<i)) {
  180. S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
  181. }
  182. }
  183. }
  184. void (*pm_cpu_prep)(void);
  185. void (*pm_cpu_sleep)(void);
  186. #define any_allowed(mask, allow) (((mask) & (allow)) != (allow))
  187. /* s3c_pm_enter
  188. *
  189. * central control for sleep/resume process
  190. */
  191. static int s3c_pm_enter(suspend_state_t state)
  192. {
  193. static unsigned long regs_save[16];
  194. /* ensure the debug is initialised (if enabled) */
  195. s3c_pm_debug_init();
  196. S3C_PMDBG("%s(%d)\n", __func__, state);
  197. if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
  198. printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
  199. return -EINVAL;
  200. }
  201. /* check if we have anything to wake-up with... bad things seem
  202. * to happen if you suspend with no wakeup (system will often
  203. * require a full power-cycle)
  204. */
  205. if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
  206. !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
  207. printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
  208. printk(KERN_ERR "%s: Aborting sleep\n", __func__);
  209. return -EINVAL;
  210. }
  211. /* store the physical address of the register recovery block */
  212. s3c_sleep_save_phys = virt_to_phys(regs_save);
  213. S3C_PMDBG("s3c_sleep_save_phys=0x%08lx\n", s3c_sleep_save_phys);
  214. /* save all necessary core registers not covered by the drivers */
  215. s3c_pm_save_gpios();
  216. s3c_pm_save_uarts();
  217. s3c_pm_save_core();
  218. /* set the irq configuration for wake */
  219. s3c_pm_configure_extint();
  220. S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
  221. s3c_irqwake_intmask, s3c_irqwake_eintmask);
  222. s3c_pm_arch_prepare_irqs();
  223. /* call cpu specific preparation */
  224. pm_cpu_prep();
  225. /* flush cache back to ram */
  226. flush_cache_all();
  227. s3c_pm_check_store();
  228. /* send the cpu to sleep... */
  229. s3c_pm_arch_stop_clocks();
  230. /* s3c_cpu_save will also act as our return point from when
  231. * we resume as it saves its own register state and restores it
  232. * during the resume. */
  233. s3c_cpu_save(regs_save);
  234. /* restore the cpu state using the kernel's cpu init code. */
  235. cpu_init();
  236. /* restore the system state */
  237. s3c_pm_restore_core();
  238. s3c_pm_restore_uarts();
  239. s3c_pm_restore_gpios();
  240. s3c_pm_debug_init();
  241. /* check what irq (if any) restored the system */
  242. s3c_pm_arch_show_resume_irqs();
  243. S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
  244. s3c_pm_check_restore();
  245. /* ok, let's return from sleep */
  246. S3C_PMDBG("S3C PM Resume (post-restore)\n");
  247. return 0;
  248. }
  249. /* callback from assembly code */
  250. void s3c_pm_cb_flushcache(void)
  251. {
  252. flush_cache_all();
  253. }
  254. static int s3c_pm_prepare(void)
  255. {
  256. /* prepare check area if configured */
  257. s3c_pm_check_prepare();
  258. return 0;
  259. }
  260. static void s3c_pm_finish(void)
  261. {
  262. s3c_pm_check_cleanup();
  263. }
  264. static struct platform_suspend_ops s3c_pm_ops = {
  265. .enter = s3c_pm_enter,
  266. .prepare = s3c_pm_prepare,
  267. .finish = s3c_pm_finish,
  268. .valid = suspend_valid_only_mem,
  269. };
  270. /* s3c_pm_init
  271. *
  272. * Attach the power management functions. This should be called
  273. * from the board specific initialisation if the board supports
  274. * it.
  275. */
  276. int __init s3c_pm_init(void)
  277. {
  278. printk("S3C Power Management, Copyright 2004 Simtec Electronics\n");
  279. suspend_set_ops(&s3c_pm_ops);
  280. return 0;
  281. }