gpio-cfg.h 6.7 KB

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  1. /* linux/arch/arm/plat-s3c/include/plat/gpio-cfg.h
  2. *
  3. * Copyright 2008 Openmoko, Inc.
  4. * Copyright 2008 Simtec Electronics
  5. * http://armlinux.simtec.co.uk/
  6. * Ben Dooks <ben@simtec.co.uk>
  7. *
  8. * S3C Platform - GPIO pin configuration
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. /* This file contains the necessary definitions to get the basic gpio
  15. * pin configuration done such as setting a pin to input or output or
  16. * changing the pull-{up,down} configurations.
  17. */
  18. /* Note, this interface is being added to the s3c64xx arch first and will
  19. * be added to the s3c24xx systems later.
  20. */
  21. #ifndef __PLAT_GPIO_CFG_H
  22. #define __PLAT_GPIO_CFG_H __FILE__
  23. typedef unsigned int __bitwise__ s3c_gpio_pull_t;
  24. typedef unsigned int __bitwise__ s5p_gpio_drvstr_t;
  25. /* forward declaration if gpio-core.h hasn't been included */
  26. struct s3c_gpio_chip;
  27. /**
  28. * struct s3c_gpio_cfg GPIO configuration
  29. * @cfg_eint: Configuration setting when used for external interrupt source
  30. * @get_pull: Read the current pull configuration for the GPIO
  31. * @set_pull: Set the current pull configuraiton for the GPIO
  32. * @set_config: Set the current configuration for the GPIO
  33. * @get_config: Read the current configuration for the GPIO
  34. *
  35. * Each chip can have more than one type of GPIO bank available and some
  36. * have different capabilites even when they have the same control register
  37. * layouts. Provide an point to vector control routine and provide any
  38. * per-bank configuration information that other systems such as the
  39. * external interrupt code will need.
  40. *
  41. * @sa s3c_gpio_cfgpin
  42. * @sa s3c_gpio_getcfg
  43. * @sa s3c_gpio_setpull
  44. * @sa s3c_gpio_getpull
  45. */
  46. struct s3c_gpio_cfg {
  47. unsigned int cfg_eint;
  48. s3c_gpio_pull_t (*get_pull)(struct s3c_gpio_chip *chip, unsigned offs);
  49. int (*set_pull)(struct s3c_gpio_chip *chip, unsigned offs,
  50. s3c_gpio_pull_t pull);
  51. unsigned (*get_config)(struct s3c_gpio_chip *chip, unsigned offs);
  52. int (*set_config)(struct s3c_gpio_chip *chip, unsigned offs,
  53. unsigned config);
  54. };
  55. #define S3C_GPIO_SPECIAL_MARK (0xfffffff0)
  56. #define S3C_GPIO_SPECIAL(x) (S3C_GPIO_SPECIAL_MARK | (x))
  57. /* Defines for generic pin configurations */
  58. #define S3C_GPIO_INPUT (S3C_GPIO_SPECIAL(0))
  59. #define S3C_GPIO_OUTPUT (S3C_GPIO_SPECIAL(1))
  60. #define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x))
  61. #define s3c_gpio_is_cfg_special(_cfg) \
  62. (((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK)
  63. /**
  64. * s3c_gpio_cfgpin() - Change the GPIO function of a pin.
  65. * @pin pin The pin number to configure.
  66. * @to to The configuration for the pin's function.
  67. *
  68. * Configure which function is actually connected to the external
  69. * pin, such as an gpio input, output or some form of special function
  70. * connected to an internal peripheral block.
  71. *
  72. * The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT
  73. * or S3C_GPIO_SFN() to indicate one of the possible values that the helper
  74. * will then generate the correct bit mask and shift for the configuration.
  75. *
  76. * If a bank of GPIOs all needs to be set to special-function 2, then
  77. * the following code will work:
  78. *
  79. * for (gpio = start; gpio < end; gpio++)
  80. * s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2));
  81. *
  82. * The @to parameter can also be a specific value already shifted to the
  83. * correct position in the control register, although these are discouraged
  84. * in newer kernels and are only being kept for compatibility.
  85. */
  86. extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to);
  87. /**
  88. * s3c_gpio_getcfg - Read the current function for a GPIO pin
  89. * @pin: The pin to read the configuration value for.
  90. *
  91. * Read the configuration state of the given @pin, returning a value that
  92. * could be passed back to s3c_gpio_cfgpin().
  93. *
  94. * @sa s3c_gpio_cfgpin
  95. */
  96. extern unsigned s3c_gpio_getcfg(unsigned int pin);
  97. /**
  98. * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range
  99. * @start: The pin number to start at
  100. * @nr: The number of pins to configure from @start.
  101. * @cfg: The configuration for the pin's function
  102. *
  103. * Call s3c_gpio_cfgpin() for the @nr pins starting at @start.
  104. *
  105. * @sa s3c_gpio_cfgpin.
  106. */
  107. extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
  108. unsigned int cfg);
  109. /* Define values for the pull-{up,down} available for each gpio pin.
  110. *
  111. * These values control the state of the weak pull-{up,down} resistors
  112. * available on most pins on the S3C series. Not all chips support both
  113. * up or down settings, and it may be dependant on the chip that is being
  114. * used to whether the particular mode is available.
  115. */
  116. #define S3C_GPIO_PULL_NONE ((__force s3c_gpio_pull_t)0x00)
  117. #define S3C_GPIO_PULL_DOWN ((__force s3c_gpio_pull_t)0x01)
  118. #define S3C_GPIO_PULL_UP ((__force s3c_gpio_pull_t)0x02)
  119. /**
  120. * s3c_gpio_setpull() - set the state of a gpio pin pull resistor
  121. * @pin: The pin number to configure the pull resistor.
  122. * @pull: The configuration for the pull resistor.
  123. *
  124. * This function sets the state of the pull-{up,down} resistor for the
  125. * specified pin. It will return 0 if successfull, or a negative error
  126. * code if the pin cannot support the requested pull setting.
  127. *
  128. * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP.
  129. */
  130. extern int s3c_gpio_setpull(unsigned int pin, s3c_gpio_pull_t pull);
  131. /**
  132. * s3c_gpio_getpull() - get the pull resistor state of a gpio pin
  133. * @pin: The pin number to get the settings for
  134. *
  135. * Read the pull resistor value for the specified pin.
  136. */
  137. extern s3c_gpio_pull_t s3c_gpio_getpull(unsigned int pin);
  138. /* Define values for the drvstr available for each gpio pin.
  139. *
  140. * These values control the value of the output signal driver strength,
  141. * configurable on most pins on the S5P series.
  142. */
  143. #define S5P_GPIO_DRVSTR_LV1 ((__force s5p_gpio_drvstr_t)0x0)
  144. #define S5P_GPIO_DRVSTR_LV2 ((__force s5p_gpio_drvstr_t)0x2)
  145. #define S5P_GPIO_DRVSTR_LV3 ((__force s5p_gpio_drvstr_t)0x1)
  146. #define S5P_GPIO_DRVSTR_LV4 ((__force s5p_gpio_drvstr_t)0x3)
  147. /**
  148. * s5c_gpio_get_drvstr() - get the driver streght value of a gpio pin
  149. * @pin: The pin number to get the settings for
  150. *
  151. * Read the driver streght value for the specified pin.
  152. */
  153. extern s5p_gpio_drvstr_t s5p_gpio_get_drvstr(unsigned int pin);
  154. /**
  155. * s3c_gpio_set_drvstr() - set the driver streght value of a gpio pin
  156. * @pin: The pin number to configure the driver streght value
  157. * @drvstr: The new value of the driver strength
  158. *
  159. * This function sets the driver strength value for the specified pin.
  160. * It will return 0 if successfull, or a negative error code if the pin
  161. * cannot support the requested setting.
  162. */
  163. extern int s5p_gpio_set_drvstr(unsigned int pin, s5p_gpio_drvstr_t drvstr);
  164. #endif /* __PLAT_GPIO_CFG_H */