fault-armv.c 6.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242
  1. /*
  2. * linux/arch/arm/mm/fault-armv.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Modifications for ARM processor (c) 1995-2002 Russell King
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License version 2 as
  9. * published by the Free Software Foundation.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/sched.h>
  13. #include <linux/kernel.h>
  14. #include <linux/mm.h>
  15. #include <linux/bitops.h>
  16. #include <linux/vmalloc.h>
  17. #include <linux/init.h>
  18. #include <linux/pagemap.h>
  19. #include <asm/bugs.h>
  20. #include <asm/cacheflush.h>
  21. #include <asm/cachetype.h>
  22. #include <asm/pgtable.h>
  23. #include <asm/tlbflush.h>
  24. #include "mm.h"
  25. static unsigned long shared_pte_mask = L_PTE_MT_BUFFERABLE;
  26. /*
  27. * We take the easy way out of this problem - we make the
  28. * PTE uncacheable. However, we leave the write buffer on.
  29. *
  30. * Note that the pte lock held when calling update_mmu_cache must also
  31. * guard the pte (somewhere else in the same mm) that we modify here.
  32. * Therefore those configurations which might call adjust_pte (those
  33. * without CONFIG_CPU_CACHE_VIPT) cannot support split page_table_lock.
  34. */
  35. static int do_adjust_pte(struct vm_area_struct *vma, unsigned long address,
  36. unsigned long pfn, pte_t *ptep)
  37. {
  38. pte_t entry = *ptep;
  39. int ret;
  40. /*
  41. * If this page is present, it's actually being shared.
  42. */
  43. ret = pte_present(entry);
  44. /*
  45. * If this page isn't present, or is already setup to
  46. * fault (ie, is old), we can safely ignore any issues.
  47. */
  48. if (ret && (pte_val(entry) & L_PTE_MT_MASK) != shared_pte_mask) {
  49. flush_cache_page(vma, address, pfn);
  50. outer_flush_range((pfn << PAGE_SHIFT),
  51. (pfn << PAGE_SHIFT) + PAGE_SIZE);
  52. pte_val(entry) &= ~L_PTE_MT_MASK;
  53. pte_val(entry) |= shared_pte_mask;
  54. set_pte_at(vma->vm_mm, address, ptep, entry);
  55. flush_tlb_page(vma, address);
  56. }
  57. return ret;
  58. }
  59. static int adjust_pte(struct vm_area_struct *vma, unsigned long address,
  60. unsigned long pfn)
  61. {
  62. spinlock_t *ptl;
  63. pgd_t *pgd;
  64. pmd_t *pmd;
  65. pte_t *pte;
  66. int ret;
  67. pgd = pgd_offset(vma->vm_mm, address);
  68. if (pgd_none_or_clear_bad(pgd))
  69. return 0;
  70. pmd = pmd_offset(pgd, address);
  71. if (pmd_none_or_clear_bad(pmd))
  72. return 0;
  73. /*
  74. * This is called while another page table is mapped, so we
  75. * must use the nested version. This also means we need to
  76. * open-code the spin-locking.
  77. */
  78. ptl = pte_lockptr(vma->vm_mm, pmd);
  79. pte = pte_offset_map_nested(pmd, address);
  80. spin_lock(ptl);
  81. ret = do_adjust_pte(vma, address, pfn, pte);
  82. spin_unlock(ptl);
  83. pte_unmap_nested(pte);
  84. return ret;
  85. }
  86. static void
  87. make_coherent(struct address_space *mapping, struct vm_area_struct *vma, unsigned long addr, unsigned long pfn)
  88. {
  89. struct mm_struct *mm = vma->vm_mm;
  90. struct vm_area_struct *mpnt;
  91. struct prio_tree_iter iter;
  92. unsigned long offset;
  93. pgoff_t pgoff;
  94. int aliases = 0;
  95. pgoff = vma->vm_pgoff + ((addr - vma->vm_start) >> PAGE_SHIFT);
  96. /*
  97. * If we have any shared mappings that are in the same mm
  98. * space, then we need to handle them specially to maintain
  99. * cache coherency.
  100. */
  101. flush_dcache_mmap_lock(mapping);
  102. vma_prio_tree_foreach(mpnt, &iter, &mapping->i_mmap, pgoff, pgoff) {
  103. /*
  104. * If this VMA is not in our MM, we can ignore it.
  105. * Note that we intentionally mask out the VMA
  106. * that we are fixing up.
  107. */
  108. if (mpnt->vm_mm != mm || mpnt == vma)
  109. continue;
  110. if (!(mpnt->vm_flags & VM_MAYSHARE))
  111. continue;
  112. offset = (pgoff - mpnt->vm_pgoff) << PAGE_SHIFT;
  113. aliases += adjust_pte(mpnt, mpnt->vm_start + offset, pfn);
  114. }
  115. flush_dcache_mmap_unlock(mapping);
  116. if (aliases)
  117. adjust_pte(vma, addr, pfn);
  118. else
  119. flush_cache_page(vma, addr, pfn);
  120. }
  121. /*
  122. * Take care of architecture specific things when placing a new PTE into
  123. * a page table, or changing an existing PTE. Basically, there are two
  124. * things that we need to take care of:
  125. *
  126. * 1. If PG_dcache_dirty is set for the page, we need to ensure
  127. * that any cache entries for the kernels virtual memory
  128. * range are written back to the page.
  129. * 2. If we have multiple shared mappings of the same space in
  130. * an object, we need to deal with the cache aliasing issues.
  131. *
  132. * Note that the pte lock will be held.
  133. */
  134. void update_mmu_cache(struct vm_area_struct *vma, unsigned long addr,
  135. pte_t *ptep)
  136. {
  137. unsigned long pfn = pte_pfn(*ptep);
  138. struct address_space *mapping;
  139. struct page *page;
  140. if (!pfn_valid(pfn))
  141. return;
  142. /*
  143. * The zero page is never written to, so never has any dirty
  144. * cache lines, and therefore never needs to be flushed.
  145. */
  146. page = pfn_to_page(pfn);
  147. if (page == ZERO_PAGE(0))
  148. return;
  149. mapping = page_mapping(page);
  150. #ifndef CONFIG_SMP
  151. if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
  152. __flush_dcache_page(mapping, page);
  153. #endif
  154. if (mapping) {
  155. if (cache_is_vivt())
  156. make_coherent(mapping, vma, addr, pfn);
  157. else if (vma->vm_flags & VM_EXEC)
  158. __flush_icache_all();
  159. }
  160. }
  161. /*
  162. * Check whether the write buffer has physical address aliasing
  163. * issues. If it has, we need to avoid them for the case where
  164. * we have several shared mappings of the same object in user
  165. * space.
  166. */
  167. static int __init check_writebuffer(unsigned long *p1, unsigned long *p2)
  168. {
  169. register unsigned long zero = 0, one = 1, val;
  170. local_irq_disable();
  171. mb();
  172. *p1 = one;
  173. mb();
  174. *p2 = zero;
  175. mb();
  176. val = *p1;
  177. mb();
  178. local_irq_enable();
  179. return val != zero;
  180. }
  181. void __init check_writebuffer_bugs(void)
  182. {
  183. struct page *page;
  184. const char *reason;
  185. unsigned long v = 1;
  186. printk(KERN_INFO "CPU: Testing write buffer coherency: ");
  187. page = alloc_page(GFP_KERNEL);
  188. if (page) {
  189. unsigned long *p1, *p2;
  190. pgprot_t prot = __pgprot_modify(PAGE_KERNEL,
  191. L_PTE_MT_MASK, L_PTE_MT_BUFFERABLE);
  192. p1 = vmap(&page, 1, VM_IOREMAP, prot);
  193. p2 = vmap(&page, 1, VM_IOREMAP, prot);
  194. if (p1 && p2) {
  195. v = check_writebuffer(p1, p2);
  196. reason = "enabling work-around";
  197. } else {
  198. reason = "unable to map memory\n";
  199. }
  200. vunmap(p1);
  201. vunmap(p2);
  202. put_page(page);
  203. } else {
  204. reason = "unable to grab page\n";
  205. }
  206. if (v) {
  207. printk("failed, %s\n", reason);
  208. shared_pte_mask = L_PTE_MT_UNCACHED;
  209. } else {
  210. printk("ok\n");
  211. }
  212. }