saa7134-dvb.c 21 KB

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  1. /*
  2. *
  3. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  4. *
  5. * Extended 3 / 2005 by Hartmut Hackmann to support various
  6. * cards with the tda10046 DVB-T channel decoder
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/init.h>
  23. #include <linux/list.h>
  24. #include <linux/module.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/kthread.h>
  29. #include <linux/suspend.h>
  30. #include "saa7134-reg.h"
  31. #include "saa7134.h"
  32. #ifdef HAVE_MT352
  33. # include "mt352.h"
  34. # include "mt352_priv.h" /* FIXME */
  35. #endif
  36. #ifdef HAVE_TDA1004X
  37. # include "tda1004x.h"
  38. #endif
  39. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  40. MODULE_LICENSE("GPL");
  41. static unsigned int antenna_pwr = 0;
  42. module_param(antenna_pwr, int, 0444);
  43. MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
  44. /* ------------------------------------------------------------------ */
  45. #ifdef HAVE_MT352
  46. static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
  47. {
  48. u32 ok;
  49. if (!on) {
  50. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
  51. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  52. return 0;
  53. }
  54. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
  55. saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  56. udelay(10);
  57. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
  58. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
  59. udelay(10);
  60. saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
  61. udelay(10);
  62. ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
  63. printk("%s: %s %s\n", dev->name, __FUNCTION__,
  64. ok ? "on" : "off");
  65. if (!ok)
  66. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  67. return ok;
  68. }
  69. static int mt352_pinnacle_init(struct dvb_frontend* fe)
  70. {
  71. static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
  72. static u8 reset [] = { RESET, 0x80 };
  73. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  74. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
  75. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
  76. static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
  77. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
  78. static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
  79. static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
  80. struct saa7134_dev *dev= fe->dvb->priv;
  81. printk("%s: %s called\n",dev->name,__FUNCTION__);
  82. mt352_write(fe, clock_config, sizeof(clock_config));
  83. udelay(200);
  84. mt352_write(fe, reset, sizeof(reset));
  85. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  86. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  87. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  88. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  89. mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
  90. mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
  91. mt352_write(fe, irq_cfg, sizeof(irq_cfg));
  92. return 0;
  93. }
  94. static int mt352_pinnacle_pll_set(struct dvb_frontend* fe,
  95. struct dvb_frontend_parameters* params,
  96. u8* pllbuf)
  97. {
  98. static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
  99. static int off = TDA9887_PRESENT | TDA9887_PORT2_ACTIVE;
  100. struct saa7134_dev *dev = fe->dvb->priv;
  101. struct v4l2_frequency f;
  102. /* set frequency (mt2050) */
  103. f.tuner = 0;
  104. f.type = V4L2_TUNER_DIGITAL_TV;
  105. f.frequency = params->frequency / 1000 * 16 / 1000;
  106. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
  107. saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
  108. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&off);
  109. pinnacle_antenna_pwr(dev, antenna_pwr);
  110. /* mt352 setup */
  111. mt352_pinnacle_init(fe);
  112. pllbuf[0] = 0xc2;
  113. pllbuf[1] = 0x00;
  114. pllbuf[2] = 0x00;
  115. pllbuf[3] = 0x80;
  116. pllbuf[4] = 0x00;
  117. return 0;
  118. }
  119. static struct mt352_config pinnacle_300i = {
  120. .demod_address = 0x3c >> 1,
  121. .adc_clock = 20333,
  122. .if2 = 36150,
  123. .no_tuner = 1,
  124. .demod_init = mt352_pinnacle_init,
  125. .pll_set = mt352_pinnacle_pll_set,
  126. };
  127. #endif
  128. /* ------------------------------------------------------------------ */
  129. #ifdef HAVE_TDA1004X
  130. static int philips_tda6651_pll_set(u8 addr, struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  131. {
  132. struct saa7134_dev *dev = fe->dvb->priv;
  133. u8 tuner_buf[4];
  134. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
  135. sizeof(tuner_buf) };
  136. int tuner_frequency = 0;
  137. u8 band, cp, filter;
  138. /* determine charge pump */
  139. tuner_frequency = params->frequency + 36166000;
  140. if (tuner_frequency < 87000000)
  141. return -EINVAL;
  142. else if (tuner_frequency < 130000000)
  143. cp = 3;
  144. else if (tuner_frequency < 160000000)
  145. cp = 5;
  146. else if (tuner_frequency < 200000000)
  147. cp = 6;
  148. else if (tuner_frequency < 290000000)
  149. cp = 3;
  150. else if (tuner_frequency < 420000000)
  151. cp = 5;
  152. else if (tuner_frequency < 480000000)
  153. cp = 6;
  154. else if (tuner_frequency < 620000000)
  155. cp = 3;
  156. else if (tuner_frequency < 830000000)
  157. cp = 5;
  158. else if (tuner_frequency < 895000000)
  159. cp = 7;
  160. else
  161. return -EINVAL;
  162. /* determine band */
  163. if (params->frequency < 49000000)
  164. return -EINVAL;
  165. else if (params->frequency < 161000000)
  166. band = 1;
  167. else if (params->frequency < 444000000)
  168. band = 2;
  169. else if (params->frequency < 861000000)
  170. band = 4;
  171. else
  172. return -EINVAL;
  173. /* setup PLL filter */
  174. switch (params->u.ofdm.bandwidth) {
  175. case BANDWIDTH_6_MHZ:
  176. filter = 0;
  177. break;
  178. case BANDWIDTH_7_MHZ:
  179. filter = 0;
  180. break;
  181. case BANDWIDTH_8_MHZ:
  182. filter = 1;
  183. break;
  184. default:
  185. return -EINVAL;
  186. }
  187. /* calculate divisor
  188. * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
  189. */
  190. tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
  191. /* setup tuner buffer */
  192. tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
  193. tuner_buf[1] = tuner_frequency & 0xff;
  194. tuner_buf[2] = 0xca;
  195. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  196. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  197. return -EIO;
  198. msleep(1);
  199. return 0;
  200. }
  201. static int philips_tda6651_pll_init(u8 addr, struct dvb_frontend *fe)
  202. {
  203. struct saa7134_dev *dev = fe->dvb->priv;
  204. static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  205. struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
  206. /* setup PLL configuration */
  207. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  208. return -EIO;
  209. msleep(1);
  210. return 0;
  211. }
  212. /* ------------------------------------------------------------------ */
  213. static int philips_tu1216_pll_60_init(struct dvb_frontend *fe)
  214. {
  215. return philips_tda6651_pll_init(0x60, fe);
  216. }
  217. static int philips_tu1216_pll_60_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  218. {
  219. return philips_tda6651_pll_set(0x60, fe, params);
  220. }
  221. static int philips_tu1216_request_firmware(struct dvb_frontend *fe,
  222. const struct firmware **fw, char *name)
  223. {
  224. struct saa7134_dev *dev = fe->dvb->priv;
  225. return request_firmware(fw, name, &dev->pci->dev);
  226. }
  227. static struct tda1004x_config philips_tu1216_60_config = {
  228. .demod_address = 0x8,
  229. .invert = 1,
  230. .invert_oclk = 0,
  231. .xtal_freq = TDA10046_XTAL_4M,
  232. .agc_config = TDA10046_AGC_DEFAULT,
  233. .if_freq = TDA10046_FREQ_3617,
  234. .pll_init = philips_tu1216_pll_60_init,
  235. .pll_set = philips_tu1216_pll_60_set,
  236. .pll_sleep = NULL,
  237. .request_firmware = philips_tu1216_request_firmware,
  238. };
  239. /* ------------------------------------------------------------------ */
  240. static int philips_tu1216_pll_61_init(struct dvb_frontend *fe)
  241. {
  242. return philips_tda6651_pll_init(0x61, fe);
  243. }
  244. static int philips_tu1216_pll_61_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  245. {
  246. return philips_tda6651_pll_set(0x61, fe, params);
  247. }
  248. static struct tda1004x_config philips_tu1216_61_config = {
  249. .demod_address = 0x8,
  250. .invert = 1,
  251. .invert_oclk = 0,
  252. .xtal_freq = TDA10046_XTAL_4M,
  253. .agc_config = TDA10046_AGC_DEFAULT,
  254. .if_freq = TDA10046_FREQ_3617,
  255. .pll_init = philips_tu1216_pll_61_init,
  256. .pll_set = philips_tu1216_pll_61_set,
  257. .pll_sleep = NULL,
  258. .request_firmware = philips_tu1216_request_firmware,
  259. };
  260. /* ------------------------------------------------------------------ */
  261. static int philips_europa_pll_init(struct dvb_frontend *fe)
  262. {
  263. struct saa7134_dev *dev = fe->dvb->priv;
  264. static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
  265. struct i2c_msg init_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
  266. /* setup PLL configuration */
  267. if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
  268. return -EIO;
  269. msleep(1);
  270. /* switch the board to dvb mode */
  271. init_msg.addr = 0x43;
  272. init_msg.len = 0x02;
  273. msg[0] = 0x00;
  274. msg[1] = 0x40;
  275. if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
  276. return -EIO;
  277. return 0;
  278. }
  279. static int philips_td1316_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  280. {
  281. return philips_tda6651_pll_set(0x61, fe, params);
  282. }
  283. static void philips_europa_analog(struct dvb_frontend *fe)
  284. {
  285. struct saa7134_dev *dev = fe->dvb->priv;
  286. /* this message actually turns the tuner back to analog mode */
  287. static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
  288. struct i2c_msg analog_msg = {.addr = 0x61,.flags = 0,.buf = msg,.len = sizeof(msg) };
  289. i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
  290. msleep(1);
  291. /* switch the board to analog mode */
  292. analog_msg.addr = 0x43;
  293. analog_msg.len = 0x02;
  294. msg[0] = 0x00;
  295. msg[1] = 0x14;
  296. i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
  297. }
  298. static struct tda1004x_config philips_europa_config = {
  299. .demod_address = 0x8,
  300. .invert = 0,
  301. .invert_oclk = 0,
  302. .xtal_freq = TDA10046_XTAL_4M,
  303. .agc_config = TDA10046_AGC_IFO_AUTO_POS,
  304. .if_freq = TDA10046_FREQ_052,
  305. .pll_init = philips_europa_pll_init,
  306. .pll_set = philips_td1316_pll_set,
  307. .pll_sleep = philips_europa_analog,
  308. .request_firmware = NULL,
  309. };
  310. /* ------------------------------------------------------------------ */
  311. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  312. {
  313. struct saa7134_dev *dev = fe->dvb->priv;
  314. /* this message is to set up ATC and ALC */
  315. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  316. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
  317. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  318. return -EIO;
  319. msleep(1);
  320. return 0;
  321. }
  322. static void philips_fmd1216_analog(struct dvb_frontend *fe)
  323. {
  324. struct saa7134_dev *dev = fe->dvb->priv;
  325. /* this message actually turns the tuner back to analog mode */
  326. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 };
  327. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
  328. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  329. msleep(1);
  330. fmd1216_init[2] = 0x86;
  331. fmd1216_init[3] = 0x54;
  332. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  333. msleep(1);
  334. }
  335. static int philips_fmd1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  336. {
  337. struct saa7134_dev *dev = fe->dvb->priv;
  338. u8 tuner_buf[4];
  339. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len =
  340. sizeof(tuner_buf) };
  341. int tuner_frequency = 0;
  342. int divider = 0;
  343. u8 band, mode, cp;
  344. /* determine charge pump */
  345. tuner_frequency = params->frequency + 36130000;
  346. if (tuner_frequency < 87000000)
  347. return -EINVAL;
  348. /* low band */
  349. else if (tuner_frequency < 180000000) {
  350. band = 1;
  351. mode = 7;
  352. cp = 0;
  353. } else if (tuner_frequency < 195000000) {
  354. band = 1;
  355. mode = 6;
  356. cp = 1;
  357. /* mid band */
  358. } else if (tuner_frequency < 366000000) {
  359. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  360. band = 10;
  361. } else {
  362. band = 2;
  363. }
  364. mode = 7;
  365. cp = 0;
  366. } else if (tuner_frequency < 478000000) {
  367. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  368. band = 10;
  369. } else {
  370. band = 2;
  371. }
  372. mode = 6;
  373. cp = 1;
  374. /* high band */
  375. } else if (tuner_frequency < 662000000) {
  376. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  377. band = 12;
  378. } else {
  379. band = 4;
  380. }
  381. mode = 7;
  382. cp = 0;
  383. } else if (tuner_frequency < 840000000) {
  384. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  385. band = 12;
  386. } else {
  387. band = 4;
  388. }
  389. mode = 6;
  390. cp = 1;
  391. } else {
  392. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  393. band = 12;
  394. } else {
  395. band = 4;
  396. }
  397. mode = 7;
  398. cp = 1;
  399. }
  400. /* calculate divisor */
  401. /* ((36166000 + Finput) / 166666) rounded! */
  402. divider = (tuner_frequency + 83333) / 166667;
  403. /* setup tuner buffer */
  404. tuner_buf[0] = (divider >> 8) & 0x7f;
  405. tuner_buf[1] = divider & 0xff;
  406. tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4;
  407. tuner_buf[3] = 0x40 | band;
  408. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  409. return -EIO;
  410. return 0;
  411. }
  412. static struct tda1004x_config medion_cardbus = {
  413. .demod_address = 0x08,
  414. .invert = 1,
  415. .invert_oclk = 0,
  416. .xtal_freq = TDA10046_XTAL_16M,
  417. .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
  418. .if_freq = TDA10046_FREQ_3613,
  419. .pll_init = philips_fmd1216_pll_init,
  420. .pll_set = philips_fmd1216_pll_set,
  421. .pll_sleep = philips_fmd1216_analog,
  422. .request_firmware = NULL,
  423. };
  424. /* ------------------------------------------------------------------ */
  425. struct tda827x_data {
  426. u32 lomax;
  427. u8 spd;
  428. u8 bs;
  429. u8 bp;
  430. u8 cp;
  431. u8 gc3;
  432. u8 div1p5;
  433. };
  434. static struct tda827x_data tda827x_dvbt[] = {
  435. { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
  436. { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
  437. { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
  438. { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
  439. { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
  440. { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
  441. { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  442. { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
  443. { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
  444. { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  445. { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  446. { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
  447. { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  448. { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  449. { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
  450. { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
  451. { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  452. { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  453. { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  454. { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  455. { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
  456. { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
  457. { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  458. { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  459. { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  460. { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
  461. { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  462. { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
  463. { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
  464. };
  465. static int philips_tda827x_pll_init(struct dvb_frontend *fe)
  466. {
  467. return 0;
  468. }
  469. static int philips_tda827x_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  470. {
  471. struct saa7134_dev *dev = fe->dvb->priv;
  472. u8 tuner_buf[14];
  473. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,
  474. .len = sizeof(tuner_buf) };
  475. int i, tuner_freq, if_freq;
  476. u32 N;
  477. switch (params->u.ofdm.bandwidth) {
  478. case BANDWIDTH_6_MHZ:
  479. if_freq = 4000000;
  480. break;
  481. case BANDWIDTH_7_MHZ:
  482. if_freq = 4500000;
  483. break;
  484. default: /* 8 MHz or Auto */
  485. if_freq = 5000000;
  486. break;
  487. }
  488. tuner_freq = params->frequency + if_freq;
  489. i = 0;
  490. while (tda827x_dvbt[i].lomax < tuner_freq) {
  491. if(tda827x_dvbt[i + 1].lomax == 0)
  492. break;
  493. i++;
  494. }
  495. N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2);
  496. tuner_buf[0] = 0;
  497. tuner_buf[1] = (N>>8) | 0x40;
  498. tuner_buf[2] = N & 0xff;
  499. tuner_buf[3] = 0;
  500. tuner_buf[4] = 0x52;
  501. tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) +
  502. (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp;
  503. tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f;
  504. tuner_buf[7] = 0xbf;
  505. tuner_buf[8] = 0x2a;
  506. tuner_buf[9] = 0x05;
  507. tuner_buf[10] = 0xff;
  508. tuner_buf[11] = 0x00;
  509. tuner_buf[12] = 0x00;
  510. tuner_buf[13] = 0x40;
  511. tuner_msg.len = 14;
  512. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  513. return -EIO;
  514. msleep(500);
  515. /* correct CP value */
  516. tuner_buf[0] = 0x30;
  517. tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp;
  518. tuner_msg.len = 2;
  519. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  520. return 0;
  521. }
  522. static void philips_tda827x_pll_sleep(struct dvb_frontend *fe)
  523. {
  524. struct saa7134_dev *dev = fe->dvb->priv;
  525. static u8 tda827x_sleep[] = { 0x30, 0xd0};
  526. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep,
  527. .len = sizeof(tda827x_sleep) };
  528. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  529. }
  530. static struct tda1004x_config tda827x_lifeview_config = {
  531. .demod_address = 0x08,
  532. .invert = 1,
  533. .invert_oclk = 0,
  534. .xtal_freq = TDA10046_XTAL_16M,
  535. .agc_config = TDA10046_AGC_TDA827X,
  536. .if_freq = TDA10046_FREQ_045,
  537. .pll_init = philips_tda827x_pll_init,
  538. .pll_set = philips_tda827x_pll_set,
  539. .pll_sleep = philips_tda827x_pll_sleep,
  540. .request_firmware = NULL,
  541. };
  542. #endif
  543. /* ------------------------------------------------------------------ */
  544. static int dvb_init(struct saa7134_dev *dev)
  545. {
  546. /* init struct videobuf_dvb */
  547. dev->ts.nr_bufs = 32;
  548. dev->ts.nr_packets = 32*4;
  549. dev->dvb.name = dev->name;
  550. videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops,
  551. dev->pci, &dev->slock,
  552. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  553. V4L2_FIELD_ALTERNATE,
  554. sizeof(struct saa7134_buf),
  555. dev);
  556. switch (dev->board) {
  557. #ifdef HAVE_MT352
  558. case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
  559. printk("%s: pinnacle 300i dvb setup\n",dev->name);
  560. dev->dvb.frontend = mt352_attach(&pinnacle_300i,
  561. &dev->i2c_adap);
  562. break;
  563. #endif
  564. #ifdef HAVE_TDA1004X
  565. case SAA7134_BOARD_MD7134:
  566. dev->dvb.frontend = tda10046_attach(&medion_cardbus,
  567. &dev->i2c_adap);
  568. break;
  569. case SAA7134_BOARD_PHILIPS_TOUGH:
  570. dev->dvb.frontend = tda10046_attach(&philips_tu1216_60_config,
  571. &dev->i2c_adap);
  572. break;
  573. case SAA7134_BOARD_FLYDVBTDUO:
  574. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  575. &dev->i2c_adap);
  576. break;
  577. case SAA7134_BOARD_THYPHOON_DVBT_DUO_CARDBUS:
  578. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  579. &dev->i2c_adap);
  580. break;
  581. case SAA7134_BOARD_PHILIPS_EUROPA:
  582. dev->dvb.frontend = tda10046_attach(&philips_europa_config,
  583. &dev->i2c_adap);
  584. break;
  585. case SAA7134_BOARD_VIDEOMATE_DVBT_300:
  586. dev->dvb.frontend = tda10046_attach(&philips_europa_config,
  587. &dev->i2c_adap);
  588. break;
  589. case SAA7134_BOARD_VIDEOMATE_DVBT_200:
  590. dev->dvb.frontend = tda10046_attach(&philips_tu1216_61_config,
  591. &dev->i2c_adap);
  592. break;
  593. #endif
  594. default:
  595. printk("%s: Huh? unknown DVB card?\n",dev->name);
  596. break;
  597. }
  598. if (NULL == dev->dvb.frontend) {
  599. printk("%s: frontend initialization failed\n",dev->name);
  600. return -1;
  601. }
  602. /* register everything else */
  603. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
  604. }
  605. static int dvb_fini(struct saa7134_dev *dev)
  606. {
  607. static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
  608. switch (dev->board) {
  609. case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
  610. /* otherwise we don't detect the tuner on next insmod */
  611. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
  612. break;
  613. };
  614. videobuf_dvb_unregister(&dev->dvb);
  615. return 0;
  616. }
  617. static struct saa7134_mpeg_ops dvb_ops = {
  618. .type = SAA7134_MPEG_DVB,
  619. .init = dvb_init,
  620. .fini = dvb_fini,
  621. };
  622. static int __init dvb_register(void)
  623. {
  624. return saa7134_ts_register(&dvb_ops);
  625. }
  626. static void __exit dvb_unregister(void)
  627. {
  628. saa7134_ts_unregister(&dvb_ops);
  629. }
  630. module_init(dvb_register);
  631. module_exit(dvb_unregister);
  632. /* ------------------------------------------------------------------ */
  633. /*
  634. * Local variables:
  635. * c-basic-offset: 8
  636. * End:
  637. */