cx88-dvb.c 23 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "nxt200x.h"
  41. #include "cx24123.h"
  42. #include "isl6421.h"
  43. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  44. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  45. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  46. MODULE_LICENSE("GPL");
  47. static unsigned int debug = 0;
  48. module_param(debug, int, 0644);
  49. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  50. #define dprintk(level,fmt, arg...) if (debug >= level) \
  51. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  52. /* ------------------------------------------------------------------ */
  53. static int dvb_buf_setup(struct videobuf_queue *q,
  54. unsigned int *count, unsigned int *size)
  55. {
  56. struct cx8802_dev *dev = q->priv_data;
  57. dev->ts_packet_size = 188 * 4;
  58. dev->ts_packet_count = 32;
  59. *size = dev->ts_packet_size * dev->ts_packet_count;
  60. *count = 32;
  61. return 0;
  62. }
  63. static int dvb_buf_prepare(struct videobuf_queue *q,
  64. struct videobuf_buffer *vb, enum v4l2_field field)
  65. {
  66. struct cx8802_dev *dev = q->priv_data;
  67. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  68. }
  69. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  70. {
  71. struct cx8802_dev *dev = q->priv_data;
  72. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  73. }
  74. static void dvb_buf_release(struct videobuf_queue *q,
  75. struct videobuf_buffer *vb)
  76. {
  77. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  78. }
  79. static struct videobuf_queue_ops dvb_qops = {
  80. .buf_setup = dvb_buf_setup,
  81. .buf_prepare = dvb_buf_prepare,
  82. .buf_queue = dvb_buf_queue,
  83. .buf_release = dvb_buf_release,
  84. };
  85. /* ------------------------------------------------------------------ */
  86. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  87. {
  88. struct cx8802_dev *dev= fe->dvb->priv;
  89. struct cx8802_driver *drv = NULL;
  90. int ret = 0;
  91. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  92. if (drv) {
  93. if (acquire)
  94. ret = drv->request_acquire(drv);
  95. else
  96. ret = drv->request_release(drv);
  97. }
  98. return ret;
  99. }
  100. /* ------------------------------------------------------------------ */
  101. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  102. {
  103. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  104. static u8 reset [] = { RESET, 0x80 };
  105. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  106. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  107. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  108. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  109. mt352_write(fe, clock_config, sizeof(clock_config));
  110. udelay(200);
  111. mt352_write(fe, reset, sizeof(reset));
  112. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  113. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  114. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  115. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  116. return 0;
  117. }
  118. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  119. {
  120. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  121. static u8 reset [] = { RESET, 0x80 };
  122. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  123. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  124. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  125. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  126. mt352_write(fe, clock_config, sizeof(clock_config));
  127. udelay(200);
  128. mt352_write(fe, reset, sizeof(reset));
  129. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  130. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  131. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  132. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  133. return 0;
  134. }
  135. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  136. {
  137. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  138. static u8 reset [] = { 0x50, 0x80 };
  139. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  140. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  141. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  142. static u8 dntv_extra[] = { 0xB5, 0x7A };
  143. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  144. mt352_write(fe, clock_config, sizeof(clock_config));
  145. udelay(2000);
  146. mt352_write(fe, reset, sizeof(reset));
  147. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  148. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  149. udelay(2000);
  150. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  151. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  152. return 0;
  153. }
  154. static struct mt352_config dvico_fusionhdtv = {
  155. .demod_address = 0x0f,
  156. .demod_init = dvico_fusionhdtv_demod_init,
  157. };
  158. static struct mt352_config dntv_live_dvbt_config = {
  159. .demod_address = 0x0f,
  160. .demod_init = dntv_live_dvbt_demod_init,
  161. };
  162. static struct mt352_config dvico_fusionhdtv_dual = {
  163. .demod_address = 0x0f,
  164. .demod_init = dvico_dual_demod_init,
  165. };
  166. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  167. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  168. {
  169. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  170. static u8 reset [] = { 0x50, 0x80 };
  171. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  172. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  173. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  174. static u8 dntv_extra[] = { 0xB5, 0x7A };
  175. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  176. mt352_write(fe, clock_config, sizeof(clock_config));
  177. udelay(2000);
  178. mt352_write(fe, reset, sizeof(reset));
  179. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  180. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  181. udelay(2000);
  182. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  183. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  184. return 0;
  185. }
  186. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  187. {
  188. struct cx8802_dev *dev= fe->dvb->priv;
  189. /* this message is to set up ATC and ALC */
  190. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  191. struct i2c_msg msg =
  192. { .addr = dev->core->pll_addr, .flags = 0,
  193. .buf = fmd1216_init, .len = sizeof(fmd1216_init) };
  194. int err;
  195. if (fe->ops.i2c_gate_ctrl)
  196. fe->ops.i2c_gate_ctrl(fe, 1);
  197. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  198. if (err < 0)
  199. return err;
  200. else
  201. return -EREMOTEIO;
  202. }
  203. return 0;
  204. }
  205. static int dntv_live_dvbt_pro_tuner_set_params(struct dvb_frontend* fe,
  206. struct dvb_frontend_parameters* params)
  207. {
  208. struct cx8802_dev *dev= fe->dvb->priv;
  209. u8 buf[4];
  210. struct i2c_msg msg =
  211. { .addr = dev->core->pll_addr, .flags = 0,
  212. .buf = buf, .len = 4 };
  213. int err;
  214. /* Switch PLL to DVB mode */
  215. err = philips_fmd1216_pll_init(fe);
  216. if (err)
  217. return err;
  218. /* Tune PLL */
  219. dvb_pll_configure(dev->core->pll_desc, buf, params);
  220. if (fe->ops.i2c_gate_ctrl)
  221. fe->ops.i2c_gate_ctrl(fe, 1);
  222. if ((err = i2c_transfer(&dev->core->i2c_adap, &msg, 1)) != 1) {
  223. printk(KERN_WARNING "cx88-dvb: %s error "
  224. "(addr %02x <- %02x, err = %i)\n",
  225. __FUNCTION__, dev->core->pll_addr, buf[0], err);
  226. if (err < 0)
  227. return err;
  228. else
  229. return -EREMOTEIO;
  230. }
  231. return 0;
  232. }
  233. static struct mt352_config dntv_live_dvbt_pro_config = {
  234. .demod_address = 0x0f,
  235. .no_tuner = 1,
  236. .demod_init = dntv_live_dvbt_pro_demod_init,
  237. };
  238. #endif
  239. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  240. .demod_address = 0x0f,
  241. .no_tuner = 1,
  242. };
  243. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  244. .demod_address = 0x0f,
  245. };
  246. static struct cx22702_config connexant_refboard_config = {
  247. .demod_address = 0x43,
  248. .output_mode = CX22702_SERIAL_OUTPUT,
  249. };
  250. static struct cx22702_config hauppauge_hvr_config = {
  251. .demod_address = 0x63,
  252. .output_mode = CX22702_SERIAL_OUTPUT,
  253. };
  254. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  255. {
  256. struct cx8802_dev *dev= fe->dvb->priv;
  257. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  258. return 0;
  259. }
  260. static struct or51132_config pchdtv_hd3000 = {
  261. .demod_address = 0x15,
  262. .set_ts_params = or51132_set_ts_param,
  263. };
  264. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  265. {
  266. struct cx8802_dev *dev= fe->dvb->priv;
  267. struct cx88_core *core = dev->core;
  268. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  269. if (index == 0)
  270. cx_clear(MO_GP0_IO, 8);
  271. else
  272. cx_set(MO_GP0_IO, 8);
  273. return 0;
  274. }
  275. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  276. {
  277. struct cx8802_dev *dev= fe->dvb->priv;
  278. if (is_punctured)
  279. dev->ts_gen_cntrl |= 0x04;
  280. else
  281. dev->ts_gen_cntrl &= ~0x04;
  282. return 0;
  283. }
  284. static struct lgdt330x_config fusionhdtv_3_gold = {
  285. .demod_address = 0x0e,
  286. .demod_chip = LGDT3302,
  287. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  288. .set_ts_params = lgdt330x_set_ts_param,
  289. };
  290. static struct lgdt330x_config fusionhdtv_5_gold = {
  291. .demod_address = 0x0e,
  292. .demod_chip = LGDT3303,
  293. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  294. .set_ts_params = lgdt330x_set_ts_param,
  295. };
  296. static struct lgdt330x_config pchdtv_hd5500 = {
  297. .demod_address = 0x59,
  298. .demod_chip = LGDT3303,
  299. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  300. .set_ts_params = lgdt330x_set_ts_param,
  301. };
  302. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  303. {
  304. struct cx8802_dev *dev= fe->dvb->priv;
  305. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  306. return 0;
  307. }
  308. static struct nxt200x_config ati_hdtvwonder = {
  309. .demod_address = 0x0a,
  310. .set_ts_params = nxt200x_set_ts_param,
  311. };
  312. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  313. int is_punctured)
  314. {
  315. struct cx8802_dev *dev= fe->dvb->priv;
  316. dev->ts_gen_cntrl = 0x02;
  317. return 0;
  318. }
  319. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  320. fe_sec_voltage_t voltage)
  321. {
  322. struct cx8802_dev *dev= fe->dvb->priv;
  323. struct cx88_core *core = dev->core;
  324. if (voltage == SEC_VOLTAGE_OFF)
  325. cx_write(MO_GP0_IO, 0x000006fb);
  326. else
  327. cx_write(MO_GP0_IO, 0x000006f9);
  328. if (core->prev_set_voltage)
  329. return core->prev_set_voltage(fe, voltage);
  330. return 0;
  331. }
  332. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  333. fe_sec_voltage_t voltage)
  334. {
  335. struct cx8802_dev *dev= fe->dvb->priv;
  336. struct cx88_core *core = dev->core;
  337. if (voltage == SEC_VOLTAGE_OFF) {
  338. dprintk(1,"LNB Voltage OFF\n");
  339. cx_write(MO_GP0_IO, 0x0000efff);
  340. }
  341. if (core->prev_set_voltage)
  342. return core->prev_set_voltage(fe, voltage);
  343. return 0;
  344. }
  345. static struct cx24123_config geniatech_dvbs_config = {
  346. .demod_address = 0x55,
  347. .set_ts_params = cx24123_set_ts_param,
  348. };
  349. static struct cx24123_config hauppauge_novas_config = {
  350. .demod_address = 0x55,
  351. .set_ts_params = cx24123_set_ts_param,
  352. };
  353. static struct cx24123_config kworld_dvbs_100_config = {
  354. .demod_address = 0x15,
  355. .set_ts_params = cx24123_set_ts_param,
  356. .lnb_polarity = 1,
  357. };
  358. static int dvb_register(struct cx8802_dev *dev)
  359. {
  360. /* init struct videobuf_dvb */
  361. dev->dvb.name = dev->core->name;
  362. dev->ts_gen_cntrl = 0x0c;
  363. /* init frontend */
  364. switch (dev->core->board) {
  365. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  366. dev->dvb.frontend = dvb_attach(cx22702_attach,
  367. &connexant_refboard_config,
  368. &dev->core->i2c_adap);
  369. if (dev->dvb.frontend != NULL) {
  370. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  371. &dev->core->i2c_adap,
  372. &dvb_pll_thomson_dtt759x);
  373. }
  374. break;
  375. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  376. case CX88_BOARD_CONEXANT_DVB_T1:
  377. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  378. case CX88_BOARD_WINFAST_DTV1000:
  379. dev->dvb.frontend = dvb_attach(cx22702_attach,
  380. &connexant_refboard_config,
  381. &dev->core->i2c_adap);
  382. if (dev->dvb.frontend != NULL) {
  383. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  384. &dev->core->i2c_adap,
  385. &dvb_pll_thomson_dtt7579);
  386. }
  387. break;
  388. case CX88_BOARD_WINFAST_DTV2000H:
  389. case CX88_BOARD_HAUPPAUGE_HVR1100:
  390. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  391. case CX88_BOARD_HAUPPAUGE_HVR1300:
  392. case CX88_BOARD_HAUPPAUGE_HVR3000:
  393. dev->dvb.frontend = dvb_attach(cx22702_attach,
  394. &hauppauge_hvr_config,
  395. &dev->core->i2c_adap);
  396. if (dev->dvb.frontend != NULL) {
  397. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  398. &dev->core->i2c_adap, &dvb_pll_fmd1216me);
  399. }
  400. break;
  401. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  402. dev->dvb.frontend = dvb_attach(mt352_attach,
  403. &dvico_fusionhdtv,
  404. &dev->core->i2c_adap);
  405. if (dev->dvb.frontend != NULL) {
  406. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  407. NULL, &dvb_pll_thomson_dtt7579);
  408. break;
  409. }
  410. /* ZL10353 replaces MT352 on later cards */
  411. dev->dvb.frontend = dvb_attach(zl10353_attach,
  412. &dvico_fusionhdtv_plus_v1_1,
  413. &dev->core->i2c_adap);
  414. if (dev->dvb.frontend != NULL) {
  415. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  416. NULL, &dvb_pll_thomson_dtt7579);
  417. }
  418. break;
  419. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  420. /* The tin box says DEE1601, but it seems to be DTT7579
  421. * compatible, with a slightly different MT352 AGC gain. */
  422. dev->dvb.frontend = dvb_attach(mt352_attach,
  423. &dvico_fusionhdtv_dual,
  424. &dev->core->i2c_adap);
  425. if (dev->dvb.frontend != NULL) {
  426. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  427. NULL, &dvb_pll_thomson_dtt7579);
  428. break;
  429. }
  430. /* ZL10353 replaces MT352 on later cards */
  431. dev->dvb.frontend = dvb_attach(zl10353_attach,
  432. &dvico_fusionhdtv_plus_v1_1,
  433. &dev->core->i2c_adap);
  434. if (dev->dvb.frontend != NULL) {
  435. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  436. NULL, &dvb_pll_thomson_dtt7579);
  437. }
  438. break;
  439. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  440. dev->dvb.frontend = dvb_attach(mt352_attach,
  441. &dvico_fusionhdtv,
  442. &dev->core->i2c_adap);
  443. if (dev->dvb.frontend != NULL) {
  444. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  445. NULL, &dvb_pll_lg_z201);
  446. }
  447. break;
  448. case CX88_BOARD_KWORLD_DVB_T:
  449. case CX88_BOARD_DNTV_LIVE_DVB_T:
  450. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  451. dev->dvb.frontend = dvb_attach(mt352_attach,
  452. &dntv_live_dvbt_config,
  453. &dev->core->i2c_adap);
  454. if (dev->dvb.frontend != NULL) {
  455. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  456. NULL, &dvb_pll_unknown_1);
  457. }
  458. break;
  459. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  460. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  461. dev->core->pll_addr = 0x61;
  462. dev->core->pll_desc = &dvb_pll_fmd1216me;
  463. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  464. &((struct vp3054_i2c_state *)dev->card_priv)->adap);
  465. if (dev->dvb.frontend != NULL) {
  466. dev->dvb.frontend->ops.tuner_ops.set_params = dntv_live_dvbt_pro_tuner_set_params;
  467. }
  468. #else
  469. printk("%s: built without vp3054 support\n", dev->core->name);
  470. #endif
  471. break;
  472. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  473. dev->dvb.frontend = dvb_attach(zl10353_attach,
  474. &dvico_fusionhdtv_hybrid,
  475. &dev->core->i2c_adap);
  476. if (dev->dvb.frontend != NULL) {
  477. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  478. &dev->core->i2c_adap,
  479. &dvb_pll_thomson_fe6600);
  480. }
  481. break;
  482. case CX88_BOARD_PCHDTV_HD3000:
  483. dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  484. &dev->core->i2c_adap);
  485. if (dev->dvb.frontend != NULL) {
  486. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  487. &dev->core->i2c_adap,
  488. &dvb_pll_thomson_dtt761x);
  489. }
  490. break;
  491. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  492. dev->ts_gen_cntrl = 0x08;
  493. {
  494. /* Do a hardware reset of chip before using it. */
  495. struct cx88_core *core = dev->core;
  496. cx_clear(MO_GP0_IO, 1);
  497. mdelay(100);
  498. cx_set(MO_GP0_IO, 1);
  499. mdelay(200);
  500. /* Select RF connector callback */
  501. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  502. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  503. &fusionhdtv_3_gold,
  504. &dev->core->i2c_adap);
  505. if (dev->dvb.frontend != NULL) {
  506. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  507. &dev->core->i2c_adap,
  508. &dvb_pll_microtune_4042);
  509. }
  510. }
  511. break;
  512. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  513. dev->ts_gen_cntrl = 0x08;
  514. {
  515. /* Do a hardware reset of chip before using it. */
  516. struct cx88_core *core = dev->core;
  517. cx_clear(MO_GP0_IO, 1);
  518. mdelay(100);
  519. cx_set(MO_GP0_IO, 9);
  520. mdelay(200);
  521. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  522. &fusionhdtv_3_gold,
  523. &dev->core->i2c_adap);
  524. if (dev->dvb.frontend != NULL) {
  525. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  526. &dev->core->i2c_adap,
  527. &dvb_pll_thomson_dtt761x);
  528. }
  529. }
  530. break;
  531. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  532. dev->ts_gen_cntrl = 0x08;
  533. {
  534. /* Do a hardware reset of chip before using it. */
  535. struct cx88_core *core = dev->core;
  536. cx_clear(MO_GP0_IO, 1);
  537. mdelay(100);
  538. cx_set(MO_GP0_IO, 1);
  539. mdelay(200);
  540. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  541. &fusionhdtv_5_gold,
  542. &dev->core->i2c_adap);
  543. if (dev->dvb.frontend != NULL) {
  544. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  545. &dev->core->i2c_adap,
  546. &dvb_pll_lg_tdvs_h06xf);
  547. }
  548. }
  549. break;
  550. case CX88_BOARD_PCHDTV_HD5500:
  551. dev->ts_gen_cntrl = 0x08;
  552. {
  553. /* Do a hardware reset of chip before using it. */
  554. struct cx88_core *core = dev->core;
  555. cx_clear(MO_GP0_IO, 1);
  556. mdelay(100);
  557. cx_set(MO_GP0_IO, 1);
  558. mdelay(200);
  559. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  560. &pchdtv_hd5500,
  561. &dev->core->i2c_adap);
  562. if (dev->dvb.frontend != NULL) {
  563. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  564. &dev->core->i2c_adap,
  565. &dvb_pll_lg_tdvs_h06xf);
  566. }
  567. }
  568. break;
  569. case CX88_BOARD_ATI_HDTVWONDER:
  570. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  571. &ati_hdtvwonder,
  572. &dev->core->i2c_adap);
  573. if (dev->dvb.frontend != NULL) {
  574. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  575. NULL, &dvb_pll_tuv1236d);
  576. }
  577. break;
  578. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  579. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  580. dev->dvb.frontend = dvb_attach(cx24123_attach,
  581. &hauppauge_novas_config,
  582. &dev->core->i2c_adap);
  583. if (dev->dvb.frontend) {
  584. dvb_attach(isl6421_attach, dev->dvb.frontend,
  585. &dev->core->i2c_adap, 0x08, 0x00, 0x00);
  586. }
  587. break;
  588. case CX88_BOARD_KWORLD_DVBS_100:
  589. dev->dvb.frontend = dvb_attach(cx24123_attach,
  590. &kworld_dvbs_100_config,
  591. &dev->core->i2c_adap);
  592. if (dev->dvb.frontend) {
  593. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  594. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  595. }
  596. break;
  597. case CX88_BOARD_GENIATECH_DVBS:
  598. dev->dvb.frontend = dvb_attach(cx24123_attach,
  599. &geniatech_dvbs_config,
  600. &dev->core->i2c_adap);
  601. if (dev->dvb.frontend) {
  602. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  603. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  604. }
  605. break;
  606. default:
  607. printk("%s: The frontend of your DVB/ATSC card isn't supported yet\n",
  608. dev->core->name);
  609. break;
  610. }
  611. if (NULL == dev->dvb.frontend) {
  612. printk("%s: frontend initialization failed\n",dev->core->name);
  613. return -1;
  614. }
  615. if (dev->core->pll_desc) {
  616. dev->dvb.frontend->ops.info.frequency_min = dev->core->pll_desc->min;
  617. dev->dvb.frontend->ops.info.frequency_max = dev->core->pll_desc->max;
  618. }
  619. /* Ensure all frontends negotiate bus access */
  620. dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  621. /* Put the analog decoder in standby to keep it quiet */
  622. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  623. /* register everything */
  624. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  625. }
  626. /* ----------------------------------------------------------- */
  627. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  628. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  629. {
  630. struct cx88_core *core = drv->core;
  631. int err = 0;
  632. dprintk( 1, "%s\n", __FUNCTION__);
  633. switch (core->board) {
  634. case CX88_BOARD_HAUPPAUGE_HVR1300:
  635. /* We arrive here with either the cx23416 or the cx22702
  636. * on the bus. Take the bus from the cx23416 and enable the
  637. * cx22702 demod
  638. */
  639. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  640. cx_clear(MO_GP0_IO, 0x00000004);
  641. udelay(1000);
  642. break;
  643. default:
  644. err = -ENODEV;
  645. }
  646. return err;
  647. }
  648. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  649. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  650. {
  651. struct cx88_core *core = drv->core;
  652. int err = 0;
  653. dprintk( 1, "%s\n", __FUNCTION__);
  654. switch (core->board) {
  655. case CX88_BOARD_HAUPPAUGE_HVR1300:
  656. /* Do Nothing, leave the cx22702 on the bus. */
  657. break;
  658. default:
  659. err = -ENODEV;
  660. }
  661. return err;
  662. }
  663. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  664. {
  665. struct cx88_core *core = drv->core;
  666. struct cx8802_dev *dev = drv->core->dvbdev;
  667. int err;
  668. dprintk( 1, "%s\n", __FUNCTION__);
  669. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  670. core->board,
  671. core->name,
  672. core->pci_bus,
  673. core->pci_slot);
  674. err = -ENODEV;
  675. if (!(cx88_boards[core->board].mpeg & CX88_MPEG_DVB))
  676. goto fail_core;
  677. /* If vp3054 isn't enabled, a stub will just return 0 */
  678. err = vp3054_i2c_probe(dev);
  679. if (0 != err)
  680. goto fail_core;
  681. /* dvb stuff */
  682. printk("%s/2: cx2388x based dvb card\n", core->name);
  683. videobuf_queue_init(&dev->dvb.dvbq, &dvb_qops,
  684. dev->pci, &dev->slock,
  685. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  686. V4L2_FIELD_TOP,
  687. sizeof(struct cx88_buffer),
  688. dev);
  689. err = dvb_register(dev);
  690. if (err != 0)
  691. printk("%s dvb_register failed err = %d\n", __FUNCTION__, err);
  692. fail_core:
  693. return err;
  694. }
  695. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  696. {
  697. struct cx8802_dev *dev = drv->core->dvbdev;
  698. /* dvb */
  699. videobuf_dvb_unregister(&dev->dvb);
  700. vp3054_i2c_remove(dev);
  701. return 0;
  702. }
  703. static struct cx8802_driver cx8802_dvb_driver = {
  704. .type_id = CX88_MPEG_DVB,
  705. .hw_access = CX8802_DRVCTL_SHARED,
  706. .probe = cx8802_dvb_probe,
  707. .remove = cx8802_dvb_remove,
  708. .advise_acquire = cx8802_dvb_advise_acquire,
  709. .advise_release = cx8802_dvb_advise_release,
  710. };
  711. static int dvb_init(void)
  712. {
  713. printk(KERN_INFO "cx2388x dvb driver version %d.%d.%d loaded\n",
  714. (CX88_VERSION_CODE >> 16) & 0xff,
  715. (CX88_VERSION_CODE >> 8) & 0xff,
  716. CX88_VERSION_CODE & 0xff);
  717. #ifdef SNAPSHOT
  718. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  719. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  720. #endif
  721. return cx8802_register_driver(&cx8802_dvb_driver);
  722. }
  723. static void dvb_fini(void)
  724. {
  725. cx8802_unregister_driver(&cx8802_dvb_driver);
  726. }
  727. module_init(dvb_init);
  728. module_exit(dvb_fini);
  729. /*
  730. * Local variables:
  731. * c-basic-offset: 8
  732. * compile-command: "make DVB=1"
  733. * End:
  734. */