pci.c 8.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374
  1. /*
  2. * linux/drivers/mtd/maps/pci.c
  3. *
  4. * Copyright (C) 2001 Russell King, All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Generic PCI memory map driver. We support the following boards:
  11. * - Intel IQ80310 ATU.
  12. * - Intel EBSA285 (blank rom programming mode). Tested working 27/09/2001
  13. */
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/pci.h>
  17. #include <linux/init.h>
  18. #include <linux/slab.h>
  19. #include <linux/mtd/mtd.h>
  20. #include <linux/mtd/map.h>
  21. #include <linux/mtd/partitions.h>
  22. struct map_pci_info;
  23. struct mtd_pci_info {
  24. int (*init)(struct pci_dev *dev, struct map_pci_info *map);
  25. void (*exit)(struct pci_dev *dev, struct map_pci_info *map);
  26. unsigned long (*translate)(struct map_pci_info *map, unsigned long ofs);
  27. const char *map_name;
  28. };
  29. struct map_pci_info {
  30. struct map_info map;
  31. void __iomem *base;
  32. void (*exit)(struct pci_dev *dev, struct map_pci_info *map);
  33. unsigned long (*translate)(struct map_pci_info *map, unsigned long ofs);
  34. struct pci_dev *dev;
  35. };
  36. static map_word mtd_pci_read8(struct map_info *_map, unsigned long ofs)
  37. {
  38. struct map_pci_info *map = (struct map_pci_info *)_map;
  39. map_word val;
  40. val.x[0]= readb(map->base + map->translate(map, ofs));
  41. // printk("read8 : %08lx => %02x\n", ofs, val.x[0]);
  42. return val;
  43. }
  44. #if 0
  45. static map_word mtd_pci_read16(struct map_info *_map, unsigned long ofs)
  46. {
  47. struct map_pci_info *map = (struct map_pci_info *)_map;
  48. map_word val;
  49. val.x[0] = readw(map->base + map->translate(map, ofs));
  50. // printk("read16: %08lx => %04x\n", ofs, val.x[0]);
  51. return val;
  52. }
  53. #endif
  54. static map_word mtd_pci_read32(struct map_info *_map, unsigned long ofs)
  55. {
  56. struct map_pci_info *map = (struct map_pci_info *)_map;
  57. map_word val;
  58. val.x[0] = readl(map->base + map->translate(map, ofs));
  59. // printk("read32: %08lx => %08x\n", ofs, val.x[0]);
  60. return val;
  61. }
  62. static void mtd_pci_copyfrom(struct map_info *_map, void *to, unsigned long from, ssize_t len)
  63. {
  64. struct map_pci_info *map = (struct map_pci_info *)_map;
  65. memcpy_fromio(to, map->base + map->translate(map, from), len);
  66. }
  67. static void mtd_pci_write8(struct map_info *_map, map_word val, unsigned long ofs)
  68. {
  69. struct map_pci_info *map = (struct map_pci_info *)_map;
  70. // printk("write8 : %08lx <= %02x\n", ofs, val.x[0]);
  71. writeb(val.x[0], map->base + map->translate(map, ofs));
  72. }
  73. #if 0
  74. static void mtd_pci_write16(struct map_info *_map, map_word val, unsigned long ofs)
  75. {
  76. struct map_pci_info *map = (struct map_pci_info *)_map;
  77. // printk("write16: %08lx <= %04x\n", ofs, val.x[0]);
  78. writew(val.x[0], map->base + map->translate(map, ofs));
  79. }
  80. #endif
  81. static void mtd_pci_write32(struct map_info *_map, map_word val, unsigned long ofs)
  82. {
  83. struct map_pci_info *map = (struct map_pci_info *)_map;
  84. // printk("write32: %08lx <= %08x\n", ofs, val.x[0]);
  85. writel(val.x[0], map->base + map->translate(map, ofs));
  86. }
  87. static void mtd_pci_copyto(struct map_info *_map, unsigned long to, const void *from, ssize_t len)
  88. {
  89. struct map_pci_info *map = (struct map_pci_info *)_map;
  90. memcpy_toio(map->base + map->translate(map, to), from, len);
  91. }
  92. static const struct map_info mtd_pci_map = {
  93. .phys = NO_XIP,
  94. .copy_from = mtd_pci_copyfrom,
  95. .copy_to = mtd_pci_copyto,
  96. };
  97. /*
  98. * Intel IOP80310 Flash driver
  99. */
  100. static int
  101. intel_iq80310_init(struct pci_dev *dev, struct map_pci_info *map)
  102. {
  103. u32 win_base;
  104. map->map.bankwidth = 1;
  105. map->map.read = mtd_pci_read8,
  106. map->map.write = mtd_pci_write8,
  107. map->map.size = 0x00800000;
  108. map->base = ioremap_nocache(pci_resource_start(dev, 0),
  109. pci_resource_len(dev, 0));
  110. if (!map->base)
  111. return -ENOMEM;
  112. /*
  113. * We want to base the memory window at Xscale
  114. * bus address 0, not 0x1000.
  115. */
  116. pci_read_config_dword(dev, 0x44, &win_base);
  117. pci_write_config_dword(dev, 0x44, 0);
  118. map->map.map_priv_2 = win_base;
  119. return 0;
  120. }
  121. static void
  122. intel_iq80310_exit(struct pci_dev *dev, struct map_pci_info *map)
  123. {
  124. if (map->base)
  125. iounmap(map->base);
  126. pci_write_config_dword(dev, 0x44, map->map.map_priv_2);
  127. }
  128. static unsigned long
  129. intel_iq80310_translate(struct map_pci_info *map, unsigned long ofs)
  130. {
  131. unsigned long page_addr = ofs & 0x00400000;
  132. /*
  133. * This mundges the flash location so we avoid
  134. * the first 80 bytes (they appear to read nonsense).
  135. */
  136. if (page_addr) {
  137. writel(0x00000008, map->base + 0x1558);
  138. writel(0x00000000, map->base + 0x1550);
  139. } else {
  140. writel(0x00000007, map->base + 0x1558);
  141. writel(0x00800000, map->base + 0x1550);
  142. ofs += 0x00800000;
  143. }
  144. return ofs;
  145. }
  146. static struct mtd_pci_info intel_iq80310_info = {
  147. .init = intel_iq80310_init,
  148. .exit = intel_iq80310_exit,
  149. .translate = intel_iq80310_translate,
  150. .map_name = "cfi_probe",
  151. };
  152. /*
  153. * Intel DC21285 driver
  154. */
  155. static int
  156. intel_dc21285_init(struct pci_dev *dev, struct map_pci_info *map)
  157. {
  158. unsigned long base, len;
  159. base = pci_resource_start(dev, PCI_ROM_RESOURCE);
  160. len = pci_resource_len(dev, PCI_ROM_RESOURCE);
  161. if (!len || !base) {
  162. /*
  163. * No ROM resource
  164. */
  165. base = pci_resource_start(dev, 2);
  166. len = pci_resource_len(dev, 2);
  167. /*
  168. * We need to re-allocate PCI BAR2 address range to the
  169. * PCI ROM BAR, and disable PCI BAR2.
  170. */
  171. } else {
  172. /*
  173. * Hmm, if an address was allocated to the ROM resource, but
  174. * not enabled, should we be allocating a new resource for it
  175. * or simply enabling it?
  176. */
  177. pci_enable_rom(dev);
  178. printk("%s: enabling expansion ROM\n", pci_name(dev));
  179. }
  180. if (!len || !base)
  181. return -ENXIO;
  182. map->map.bankwidth = 4;
  183. map->map.read = mtd_pci_read32,
  184. map->map.write = mtd_pci_write32,
  185. map->map.size = len;
  186. map->base = ioremap_nocache(base, len);
  187. if (!map->base)
  188. return -ENOMEM;
  189. return 0;
  190. }
  191. static void
  192. intel_dc21285_exit(struct pci_dev *dev, struct map_pci_info *map)
  193. {
  194. u32 val;
  195. if (map->base)
  196. iounmap(map->base);
  197. /*
  198. * We need to undo the PCI BAR2/PCI ROM BAR address alteration.
  199. */
  200. pci_disable_rom(dev);
  201. }
  202. static unsigned long
  203. intel_dc21285_translate(struct map_pci_info *map, unsigned long ofs)
  204. {
  205. return ofs & 0x00ffffc0 ? ofs : (ofs ^ (1 << 5));
  206. }
  207. static struct mtd_pci_info intel_dc21285_info = {
  208. .init = intel_dc21285_init,
  209. .exit = intel_dc21285_exit,
  210. .translate = intel_dc21285_translate,
  211. .map_name = "jedec_probe",
  212. };
  213. /*
  214. * PCI device ID table
  215. */
  216. static struct pci_device_id mtd_pci_ids[] = {
  217. {
  218. .vendor = PCI_VENDOR_ID_INTEL,
  219. .device = 0x530d,
  220. .subvendor = PCI_ANY_ID,
  221. .subdevice = PCI_ANY_ID,
  222. .class = PCI_CLASS_MEMORY_OTHER << 8,
  223. .class_mask = 0xffff00,
  224. .driver_data = (unsigned long)&intel_iq80310_info,
  225. },
  226. {
  227. .vendor = PCI_VENDOR_ID_DEC,
  228. .device = PCI_DEVICE_ID_DEC_21285,
  229. .subvendor = 0, /* DC21285 defaults to 0 on reset */
  230. .subdevice = 0, /* DC21285 defaults to 0 on reset */
  231. .driver_data = (unsigned long)&intel_dc21285_info,
  232. },
  233. { 0, }
  234. };
  235. /*
  236. * Generic code follows.
  237. */
  238. static int __devinit
  239. mtd_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
  240. {
  241. struct mtd_pci_info *info = (struct mtd_pci_info *)id->driver_data;
  242. struct map_pci_info *map = NULL;
  243. struct mtd_info *mtd = NULL;
  244. int err;
  245. err = pci_enable_device(dev);
  246. if (err)
  247. goto out;
  248. err = pci_request_regions(dev, "pci mtd");
  249. if (err)
  250. goto out;
  251. map = kmalloc(sizeof(*map), GFP_KERNEL);
  252. err = -ENOMEM;
  253. if (!map)
  254. goto release;
  255. map->map = mtd_pci_map;
  256. map->map.name = pci_name(dev);
  257. map->dev = dev;
  258. map->exit = info->exit;
  259. map->translate = info->translate;
  260. err = info->init(dev, map);
  261. if (err)
  262. goto release;
  263. /* tsk - do_map_probe should take const char * */
  264. mtd = do_map_probe((char *)info->map_name, &map->map);
  265. err = -ENODEV;
  266. if (!mtd)
  267. goto release;
  268. mtd->owner = THIS_MODULE;
  269. add_mtd_device(mtd);
  270. pci_set_drvdata(dev, mtd);
  271. return 0;
  272. release:
  273. if (map) {
  274. map->exit(dev, map);
  275. kfree(map);
  276. }
  277. pci_release_regions(dev);
  278. out:
  279. return err;
  280. }
  281. static void __devexit
  282. mtd_pci_remove(struct pci_dev *dev)
  283. {
  284. struct mtd_info *mtd = pci_get_drvdata(dev);
  285. struct map_pci_info *map = mtd->priv;
  286. del_mtd_device(mtd);
  287. map_destroy(mtd);
  288. map->exit(dev, map);
  289. kfree(map);
  290. pci_set_drvdata(dev, NULL);
  291. pci_release_regions(dev);
  292. }
  293. static struct pci_driver mtd_pci_driver = {
  294. .name = "MTD PCI",
  295. .probe = mtd_pci_probe,
  296. .remove = __devexit_p(mtd_pci_remove),
  297. .id_table = mtd_pci_ids,
  298. };
  299. static int __init mtd_pci_maps_init(void)
  300. {
  301. return pci_register_driver(&mtd_pci_driver);
  302. }
  303. static void __exit mtd_pci_maps_exit(void)
  304. {
  305. pci_unregister_driver(&mtd_pci_driver);
  306. }
  307. module_init(mtd_pci_maps_init);
  308. module_exit(mtd_pci_maps_exit);
  309. MODULE_LICENSE("GPL");
  310. MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>");
  311. MODULE_DESCRIPTION("Generic PCI map driver");
  312. MODULE_DEVICE_TABLE(pci, mtd_pci_ids);