setup.c 25 KB

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  1. /*
  2. * linux/arch/arm/kernel/setup.c
  3. *
  4. * Copyright (C) 1995-2001 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/module.h>
  11. #include <linux/kernel.h>
  12. #include <linux/stddef.h>
  13. #include <linux/ioport.h>
  14. #include <linux/delay.h>
  15. #include <linux/utsname.h>
  16. #include <linux/initrd.h>
  17. #include <linux/console.h>
  18. #include <linux/bootmem.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/screen_info.h>
  21. #include <linux/init.h>
  22. #include <linux/kexec.h>
  23. #include <linux/of_fdt.h>
  24. #include <linux/crash_dump.h>
  25. #include <linux/root_dev.h>
  26. #include <linux/cpu.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/smp.h>
  29. #include <linux/fs.h>
  30. #include <linux/proc_fs.h>
  31. #include <linux/memblock.h>
  32. #include <asm/unified.h>
  33. #include <asm/cpu.h>
  34. #include <asm/cputype.h>
  35. #include <asm/elf.h>
  36. #include <asm/procinfo.h>
  37. #include <asm/sections.h>
  38. #include <asm/setup.h>
  39. #include <asm/smp_plat.h>
  40. #include <asm/mach-types.h>
  41. #include <asm/cacheflush.h>
  42. #include <asm/cachetype.h>
  43. #include <asm/tlbflush.h>
  44. #include <asm/prom.h>
  45. #include <asm/mach/arch.h>
  46. #include <asm/mach/irq.h>
  47. #include <asm/mach/time.h>
  48. #include <asm/traps.h>
  49. #include <asm/unwind.h>
  50. #if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
  51. #include "compat.h"
  52. #endif
  53. #include "atags.h"
  54. #include "tcm.h"
  55. #ifndef MEM_SIZE
  56. #define MEM_SIZE (16*1024*1024)
  57. #endif
  58. #if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
  59. char fpe_type[8];
  60. static int __init fpe_setup(char *line)
  61. {
  62. memcpy(fpe_type, line, 8);
  63. return 1;
  64. }
  65. __setup("fpe=", fpe_setup);
  66. #endif
  67. extern void paging_init(struct machine_desc *desc);
  68. extern void sanity_check_meminfo(void);
  69. extern void reboot_setup(char *str);
  70. unsigned int processor_id;
  71. EXPORT_SYMBOL(processor_id);
  72. unsigned int __machine_arch_type __read_mostly;
  73. EXPORT_SYMBOL(__machine_arch_type);
  74. unsigned int cacheid __read_mostly;
  75. EXPORT_SYMBOL(cacheid);
  76. unsigned int __atags_pointer __initdata;
  77. unsigned int system_rev;
  78. EXPORT_SYMBOL(system_rev);
  79. unsigned int system_serial_low;
  80. EXPORT_SYMBOL(system_serial_low);
  81. unsigned int system_serial_high;
  82. EXPORT_SYMBOL(system_serial_high);
  83. unsigned int elf_hwcap __read_mostly;
  84. EXPORT_SYMBOL(elf_hwcap);
  85. #ifdef MULTI_CPU
  86. struct processor processor __read_mostly;
  87. #endif
  88. #ifdef MULTI_TLB
  89. struct cpu_tlb_fns cpu_tlb __read_mostly;
  90. #endif
  91. #ifdef MULTI_USER
  92. struct cpu_user_fns cpu_user __read_mostly;
  93. #endif
  94. #ifdef MULTI_CACHE
  95. struct cpu_cache_fns cpu_cache __read_mostly;
  96. #endif
  97. #ifdef CONFIG_OUTER_CACHE
  98. struct outer_cache_fns outer_cache __read_mostly;
  99. EXPORT_SYMBOL(outer_cache);
  100. #endif
  101. struct stack {
  102. u32 irq[3];
  103. u32 abt[3];
  104. u32 und[3];
  105. } ____cacheline_aligned;
  106. static struct stack stacks[NR_CPUS];
  107. char elf_platform[ELF_PLATFORM_SIZE];
  108. EXPORT_SYMBOL(elf_platform);
  109. static const char *cpu_name;
  110. static const char *machine_name;
  111. static char __initdata cmd_line[COMMAND_LINE_SIZE];
  112. struct machine_desc *machine_desc __initdata;
  113. static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
  114. static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
  115. #define ENDIANNESS ((char)endian_test.l)
  116. DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
  117. /*
  118. * Standard memory resources
  119. */
  120. static struct resource mem_res[] = {
  121. {
  122. .name = "Video RAM",
  123. .start = 0,
  124. .end = 0,
  125. .flags = IORESOURCE_MEM
  126. },
  127. {
  128. .name = "Kernel text",
  129. .start = 0,
  130. .end = 0,
  131. .flags = IORESOURCE_MEM
  132. },
  133. {
  134. .name = "Kernel data",
  135. .start = 0,
  136. .end = 0,
  137. .flags = IORESOURCE_MEM
  138. }
  139. };
  140. #define video_ram mem_res[0]
  141. #define kernel_code mem_res[1]
  142. #define kernel_data mem_res[2]
  143. static struct resource io_res[] = {
  144. {
  145. .name = "reserved",
  146. .start = 0x3bc,
  147. .end = 0x3be,
  148. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  149. },
  150. {
  151. .name = "reserved",
  152. .start = 0x378,
  153. .end = 0x37f,
  154. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  155. },
  156. {
  157. .name = "reserved",
  158. .start = 0x278,
  159. .end = 0x27f,
  160. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  161. }
  162. };
  163. #define lp0 io_res[0]
  164. #define lp1 io_res[1]
  165. #define lp2 io_res[2]
  166. static const char *proc_arch[] = {
  167. "undefined/unknown",
  168. "3",
  169. "4",
  170. "4T",
  171. "5",
  172. "5T",
  173. "5TE",
  174. "5TEJ",
  175. "6TEJ",
  176. "7",
  177. "?(11)",
  178. "?(12)",
  179. "?(13)",
  180. "?(14)",
  181. "?(15)",
  182. "?(16)",
  183. "?(17)",
  184. };
  185. int cpu_architecture(void)
  186. {
  187. int cpu_arch;
  188. if ((read_cpuid_id() & 0x0008f000) == 0) {
  189. cpu_arch = CPU_ARCH_UNKNOWN;
  190. } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  191. cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
  192. } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
  193. cpu_arch = (read_cpuid_id() >> 16) & 7;
  194. if (cpu_arch)
  195. cpu_arch += CPU_ARCH_ARMv3;
  196. } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
  197. unsigned int mmfr0;
  198. /* Revised CPUID format. Read the Memory Model Feature
  199. * Register 0 and check for VMSAv7 or PMSAv7 */
  200. asm("mrc p15, 0, %0, c0, c1, 4"
  201. : "=r" (mmfr0));
  202. if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
  203. (mmfr0 & 0x000000f0) >= 0x00000030)
  204. cpu_arch = CPU_ARCH_ARMv7;
  205. else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
  206. (mmfr0 & 0x000000f0) == 0x00000020)
  207. cpu_arch = CPU_ARCH_ARMv6;
  208. else
  209. cpu_arch = CPU_ARCH_UNKNOWN;
  210. } else
  211. cpu_arch = CPU_ARCH_UNKNOWN;
  212. return cpu_arch;
  213. }
  214. static int cpu_has_aliasing_icache(unsigned int arch)
  215. {
  216. int aliasing_icache;
  217. unsigned int id_reg, num_sets, line_size;
  218. /* arch specifies the register format */
  219. switch (arch) {
  220. case CPU_ARCH_ARMv7:
  221. asm("mcr p15, 2, %0, c0, c0, 0 @ set CSSELR"
  222. : /* No output operands */
  223. : "r" (1));
  224. isb();
  225. asm("mrc p15, 1, %0, c0, c0, 0 @ read CCSIDR"
  226. : "=r" (id_reg));
  227. line_size = 4 << ((id_reg & 0x7) + 2);
  228. num_sets = ((id_reg >> 13) & 0x7fff) + 1;
  229. aliasing_icache = (line_size * num_sets) > PAGE_SIZE;
  230. break;
  231. case CPU_ARCH_ARMv6:
  232. aliasing_icache = read_cpuid_cachetype() & (1 << 11);
  233. break;
  234. default:
  235. /* I-cache aliases will be handled by D-cache aliasing code */
  236. aliasing_icache = 0;
  237. }
  238. return aliasing_icache;
  239. }
  240. static void __init cacheid_init(void)
  241. {
  242. unsigned int cachetype = read_cpuid_cachetype();
  243. unsigned int arch = cpu_architecture();
  244. if (arch >= CPU_ARCH_ARMv6) {
  245. if ((cachetype & (7 << 29)) == 4 << 29) {
  246. /* ARMv7 register format */
  247. cacheid = CACHEID_VIPT_NONALIASING;
  248. if ((cachetype & (3 << 14)) == 1 << 14)
  249. cacheid |= CACHEID_ASID_TAGGED;
  250. else if (cpu_has_aliasing_icache(CPU_ARCH_ARMv7))
  251. cacheid |= CACHEID_VIPT_I_ALIASING;
  252. } else if (cachetype & (1 << 23)) {
  253. cacheid = CACHEID_VIPT_ALIASING;
  254. } else {
  255. cacheid = CACHEID_VIPT_NONALIASING;
  256. if (cpu_has_aliasing_icache(CPU_ARCH_ARMv6))
  257. cacheid |= CACHEID_VIPT_I_ALIASING;
  258. }
  259. } else {
  260. cacheid = CACHEID_VIVT;
  261. }
  262. printk("CPU: %s data cache, %s instruction cache\n",
  263. cache_is_vivt() ? "VIVT" :
  264. cache_is_vipt_aliasing() ? "VIPT aliasing" :
  265. cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown",
  266. cache_is_vivt() ? "VIVT" :
  267. icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
  268. icache_is_vipt_aliasing() ? "VIPT aliasing" :
  269. cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
  270. }
  271. /*
  272. * These functions re-use the assembly code in head.S, which
  273. * already provide the required functionality.
  274. */
  275. extern struct proc_info_list *lookup_processor_type(unsigned int);
  276. void __init early_print(const char *str, ...)
  277. {
  278. extern void printascii(const char *);
  279. char buf[256];
  280. va_list ap;
  281. va_start(ap, str);
  282. vsnprintf(buf, sizeof(buf), str, ap);
  283. va_end(ap);
  284. #ifdef CONFIG_DEBUG_LL
  285. printascii(buf);
  286. #endif
  287. printk("%s", buf);
  288. }
  289. static void __init feat_v6_fixup(void)
  290. {
  291. int id = read_cpuid_id();
  292. if ((id & 0xff0f0000) != 0x41070000)
  293. return;
  294. /*
  295. * HWCAP_TLS is available only on 1136 r1p0 and later,
  296. * see also kuser_get_tls_init.
  297. */
  298. if ((((id >> 4) & 0xfff) == 0xb36) && (((id >> 20) & 3) == 0))
  299. elf_hwcap &= ~HWCAP_TLS;
  300. }
  301. static void __init setup_processor(void)
  302. {
  303. struct proc_info_list *list;
  304. /*
  305. * locate processor in the list of supported processor
  306. * types. The linker builds this table for us from the
  307. * entries in arch/arm/mm/proc-*.S
  308. */
  309. list = lookup_processor_type(read_cpuid_id());
  310. if (!list) {
  311. printk("CPU configuration botched (ID %08x), unable "
  312. "to continue.\n", read_cpuid_id());
  313. while (1);
  314. }
  315. cpu_name = list->cpu_name;
  316. #ifdef MULTI_CPU
  317. processor = *list->proc;
  318. #endif
  319. #ifdef MULTI_TLB
  320. cpu_tlb = *list->tlb;
  321. #endif
  322. #ifdef MULTI_USER
  323. cpu_user = *list->user;
  324. #endif
  325. #ifdef MULTI_CACHE
  326. cpu_cache = *list->cache;
  327. #endif
  328. printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
  329. cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
  330. proc_arch[cpu_architecture()], cr_alignment);
  331. sprintf(init_utsname()->machine, "%s%c", list->arch_name, ENDIANNESS);
  332. sprintf(elf_platform, "%s%c", list->elf_name, ENDIANNESS);
  333. elf_hwcap = list->elf_hwcap;
  334. #ifndef CONFIG_ARM_THUMB
  335. elf_hwcap &= ~HWCAP_THUMB;
  336. #endif
  337. feat_v6_fixup();
  338. cacheid_init();
  339. cpu_proc_init();
  340. }
  341. /*
  342. * cpu_init - initialise one CPU.
  343. *
  344. * cpu_init sets up the per-CPU stacks.
  345. */
  346. void cpu_init(void)
  347. {
  348. unsigned int cpu = smp_processor_id();
  349. struct stack *stk = &stacks[cpu];
  350. if (cpu >= NR_CPUS) {
  351. printk(KERN_CRIT "CPU%u: bad primary CPU number\n", cpu);
  352. BUG();
  353. }
  354. /*
  355. * Define the placement constraint for the inline asm directive below.
  356. * In Thumb-2, msr with an immediate value is not allowed.
  357. */
  358. #ifdef CONFIG_THUMB2_KERNEL
  359. #define PLC "r"
  360. #else
  361. #define PLC "I"
  362. #endif
  363. /*
  364. * setup stacks for re-entrant exception handlers
  365. */
  366. __asm__ (
  367. "msr cpsr_c, %1\n\t"
  368. "add r14, %0, %2\n\t"
  369. "mov sp, r14\n\t"
  370. "msr cpsr_c, %3\n\t"
  371. "add r14, %0, %4\n\t"
  372. "mov sp, r14\n\t"
  373. "msr cpsr_c, %5\n\t"
  374. "add r14, %0, %6\n\t"
  375. "mov sp, r14\n\t"
  376. "msr cpsr_c, %7"
  377. :
  378. : "r" (stk),
  379. PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
  380. "I" (offsetof(struct stack, irq[0])),
  381. PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
  382. "I" (offsetof(struct stack, abt[0])),
  383. PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
  384. "I" (offsetof(struct stack, und[0])),
  385. PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
  386. : "r14");
  387. }
  388. void __init dump_machine_table(void)
  389. {
  390. struct machine_desc *p;
  391. early_print("Available machine support:\n\nID (hex)\tNAME\n");
  392. for_each_machine_desc(p)
  393. early_print("%08x\t%s\n", p->nr, p->name);
  394. early_print("\nPlease check your kernel config and/or bootloader.\n");
  395. while (true)
  396. /* can't use cpu_relax() here as it may require MMU setup */;
  397. }
  398. int __init arm_add_memory(phys_addr_t start, unsigned long size)
  399. {
  400. struct membank *bank = &meminfo.bank[meminfo.nr_banks];
  401. if (meminfo.nr_banks >= NR_BANKS) {
  402. printk(KERN_CRIT "NR_BANKS too low, "
  403. "ignoring memory at 0x%08llx\n", (long long)start);
  404. return -EINVAL;
  405. }
  406. /*
  407. * Ensure that start/size are aligned to a page boundary.
  408. * Size is appropriately rounded down, start is rounded up.
  409. */
  410. size -= start & ~PAGE_MASK;
  411. bank->start = PAGE_ALIGN(start);
  412. bank->size = size & PAGE_MASK;
  413. /*
  414. * Check whether this memory region has non-zero size or
  415. * invalid node number.
  416. */
  417. if (bank->size == 0)
  418. return -EINVAL;
  419. meminfo.nr_banks++;
  420. return 0;
  421. }
  422. /*
  423. * Pick out the memory size. We look for mem=size@start,
  424. * where start and size are "size[KkMm]"
  425. */
  426. static int __init early_mem(char *p)
  427. {
  428. static int usermem __initdata = 0;
  429. unsigned long size;
  430. phys_addr_t start;
  431. char *endp;
  432. /*
  433. * If the user specifies memory size, we
  434. * blow away any automatically generated
  435. * size.
  436. */
  437. if (usermem == 0) {
  438. usermem = 1;
  439. meminfo.nr_banks = 0;
  440. }
  441. start = PHYS_OFFSET;
  442. size = memparse(p, &endp);
  443. if (*endp == '@')
  444. start = memparse(endp + 1, NULL);
  445. arm_add_memory(start, size);
  446. return 0;
  447. }
  448. early_param("mem", early_mem);
  449. static void __init
  450. setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz)
  451. {
  452. #ifdef CONFIG_BLK_DEV_RAM
  453. extern int rd_size, rd_image_start, rd_prompt, rd_doload;
  454. rd_image_start = image_start;
  455. rd_prompt = prompt;
  456. rd_doload = doload;
  457. if (rd_sz)
  458. rd_size = rd_sz;
  459. #endif
  460. }
  461. static void __init request_standard_resources(struct machine_desc *mdesc)
  462. {
  463. struct memblock_region *region;
  464. struct resource *res;
  465. kernel_code.start = virt_to_phys(_text);
  466. kernel_code.end = virt_to_phys(_etext - 1);
  467. kernel_data.start = virt_to_phys(_sdata);
  468. kernel_data.end = virt_to_phys(_end - 1);
  469. for_each_memblock(memory, region) {
  470. res = alloc_bootmem_low(sizeof(*res));
  471. res->name = "System RAM";
  472. res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
  473. res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
  474. res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
  475. request_resource(&iomem_resource, res);
  476. if (kernel_code.start >= res->start &&
  477. kernel_code.end <= res->end)
  478. request_resource(res, &kernel_code);
  479. if (kernel_data.start >= res->start &&
  480. kernel_data.end <= res->end)
  481. request_resource(res, &kernel_data);
  482. }
  483. if (mdesc->video_start) {
  484. video_ram.start = mdesc->video_start;
  485. video_ram.end = mdesc->video_end;
  486. request_resource(&iomem_resource, &video_ram);
  487. }
  488. /*
  489. * Some machines don't have the possibility of ever
  490. * possessing lp0, lp1 or lp2
  491. */
  492. if (mdesc->reserve_lp0)
  493. request_resource(&ioport_resource, &lp0);
  494. if (mdesc->reserve_lp1)
  495. request_resource(&ioport_resource, &lp1);
  496. if (mdesc->reserve_lp2)
  497. request_resource(&ioport_resource, &lp2);
  498. }
  499. /*
  500. * Tag parsing.
  501. *
  502. * This is the new way of passing data to the kernel at boot time. Rather
  503. * than passing a fixed inflexible structure to the kernel, we pass a list
  504. * of variable-sized tags to the kernel. The first tag must be a ATAG_CORE
  505. * tag for the list to be recognised (to distinguish the tagged list from
  506. * a param_struct). The list is terminated with a zero-length tag (this tag
  507. * is not parsed in any way).
  508. */
  509. static int __init parse_tag_core(const struct tag *tag)
  510. {
  511. if (tag->hdr.size > 2) {
  512. if ((tag->u.core.flags & 1) == 0)
  513. root_mountflags &= ~MS_RDONLY;
  514. ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
  515. }
  516. return 0;
  517. }
  518. __tagtable(ATAG_CORE, parse_tag_core);
  519. static int __init parse_tag_mem32(const struct tag *tag)
  520. {
  521. return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
  522. }
  523. __tagtable(ATAG_MEM, parse_tag_mem32);
  524. #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  525. struct screen_info screen_info = {
  526. .orig_video_lines = 30,
  527. .orig_video_cols = 80,
  528. .orig_video_mode = 0,
  529. .orig_video_ega_bx = 0,
  530. .orig_video_isVGA = 1,
  531. .orig_video_points = 8
  532. };
  533. static int __init parse_tag_videotext(const struct tag *tag)
  534. {
  535. screen_info.orig_x = tag->u.videotext.x;
  536. screen_info.orig_y = tag->u.videotext.y;
  537. screen_info.orig_video_page = tag->u.videotext.video_page;
  538. screen_info.orig_video_mode = tag->u.videotext.video_mode;
  539. screen_info.orig_video_cols = tag->u.videotext.video_cols;
  540. screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx;
  541. screen_info.orig_video_lines = tag->u.videotext.video_lines;
  542. screen_info.orig_video_isVGA = tag->u.videotext.video_isvga;
  543. screen_info.orig_video_points = tag->u.videotext.video_points;
  544. return 0;
  545. }
  546. __tagtable(ATAG_VIDEOTEXT, parse_tag_videotext);
  547. #endif
  548. static int __init parse_tag_ramdisk(const struct tag *tag)
  549. {
  550. setup_ramdisk((tag->u.ramdisk.flags & 1) == 0,
  551. (tag->u.ramdisk.flags & 2) == 0,
  552. tag->u.ramdisk.start, tag->u.ramdisk.size);
  553. return 0;
  554. }
  555. __tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
  556. static int __init parse_tag_serialnr(const struct tag *tag)
  557. {
  558. system_serial_low = tag->u.serialnr.low;
  559. system_serial_high = tag->u.serialnr.high;
  560. return 0;
  561. }
  562. __tagtable(ATAG_SERIAL, parse_tag_serialnr);
  563. static int __init parse_tag_revision(const struct tag *tag)
  564. {
  565. system_rev = tag->u.revision.rev;
  566. return 0;
  567. }
  568. __tagtable(ATAG_REVISION, parse_tag_revision);
  569. static int __init parse_tag_cmdline(const struct tag *tag)
  570. {
  571. #if defined(CONFIG_CMDLINE_EXTEND)
  572. strlcat(default_command_line, " ", COMMAND_LINE_SIZE);
  573. strlcat(default_command_line, tag->u.cmdline.cmdline,
  574. COMMAND_LINE_SIZE);
  575. #elif defined(CONFIG_CMDLINE_FORCE)
  576. pr_warning("Ignoring tag cmdline (using the default kernel command line)\n");
  577. #else
  578. strlcpy(default_command_line, tag->u.cmdline.cmdline,
  579. COMMAND_LINE_SIZE);
  580. #endif
  581. return 0;
  582. }
  583. __tagtable(ATAG_CMDLINE, parse_tag_cmdline);
  584. /*
  585. * Scan the tag table for this tag, and call its parse function.
  586. * The tag table is built by the linker from all the __tagtable
  587. * declarations.
  588. */
  589. static int __init parse_tag(const struct tag *tag)
  590. {
  591. extern struct tagtable __tagtable_begin, __tagtable_end;
  592. struct tagtable *t;
  593. for (t = &__tagtable_begin; t < &__tagtable_end; t++)
  594. if (tag->hdr.tag == t->tag) {
  595. t->parse(tag);
  596. break;
  597. }
  598. return t < &__tagtable_end;
  599. }
  600. /*
  601. * Parse all tags in the list, checking both the global and architecture
  602. * specific tag tables.
  603. */
  604. static void __init parse_tags(const struct tag *t)
  605. {
  606. for (; t->hdr.size; t = tag_next(t))
  607. if (!parse_tag(t))
  608. printk(KERN_WARNING
  609. "Ignoring unrecognised tag 0x%08x\n",
  610. t->hdr.tag);
  611. }
  612. /*
  613. * This holds our defaults.
  614. */
  615. static struct init_tags {
  616. struct tag_header hdr1;
  617. struct tag_core core;
  618. struct tag_header hdr2;
  619. struct tag_mem32 mem;
  620. struct tag_header hdr3;
  621. } init_tags __initdata = {
  622. { tag_size(tag_core), ATAG_CORE },
  623. { 1, PAGE_SIZE, 0xff },
  624. { tag_size(tag_mem32), ATAG_MEM },
  625. { MEM_SIZE },
  626. { 0, ATAG_NONE }
  627. };
  628. static int __init customize_machine(void)
  629. {
  630. /* customizes platform devices, or adds new ones */
  631. if (machine_desc->init_machine)
  632. machine_desc->init_machine();
  633. return 0;
  634. }
  635. arch_initcall(customize_machine);
  636. #ifdef CONFIG_KEXEC
  637. static inline unsigned long long get_total_mem(void)
  638. {
  639. unsigned long total;
  640. total = max_low_pfn - min_low_pfn;
  641. return total << PAGE_SHIFT;
  642. }
  643. /**
  644. * reserve_crashkernel() - reserves memory are for crash kernel
  645. *
  646. * This function reserves memory area given in "crashkernel=" kernel command
  647. * line parameter. The memory reserved is used by a dump capture kernel when
  648. * primary kernel is crashing.
  649. */
  650. static void __init reserve_crashkernel(void)
  651. {
  652. unsigned long long crash_size, crash_base;
  653. unsigned long long total_mem;
  654. int ret;
  655. total_mem = get_total_mem();
  656. ret = parse_crashkernel(boot_command_line, total_mem,
  657. &crash_size, &crash_base);
  658. if (ret)
  659. return;
  660. ret = reserve_bootmem(crash_base, crash_size, BOOTMEM_EXCLUSIVE);
  661. if (ret < 0) {
  662. printk(KERN_WARNING "crashkernel reservation failed - "
  663. "memory is in use (0x%lx)\n", (unsigned long)crash_base);
  664. return;
  665. }
  666. printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
  667. "for crashkernel (System RAM: %ldMB)\n",
  668. (unsigned long)(crash_size >> 20),
  669. (unsigned long)(crash_base >> 20),
  670. (unsigned long)(total_mem >> 20));
  671. crashk_res.start = crash_base;
  672. crashk_res.end = crash_base + crash_size - 1;
  673. insert_resource(&iomem_resource, &crashk_res);
  674. }
  675. #else
  676. static inline void reserve_crashkernel(void) {}
  677. #endif /* CONFIG_KEXEC */
  678. static void __init squash_mem_tags(struct tag *tag)
  679. {
  680. for (; tag->hdr.size; tag = tag_next(tag))
  681. if (tag->hdr.tag == ATAG_MEM)
  682. tag->hdr.tag = ATAG_NONE;
  683. }
  684. static struct machine_desc * __init setup_machine_tags(unsigned int nr)
  685. {
  686. struct tag *tags = (struct tag *)&init_tags;
  687. struct machine_desc *mdesc = NULL, *p;
  688. char *from = default_command_line;
  689. init_tags.mem.start = PHYS_OFFSET;
  690. /*
  691. * locate machine in the list of supported machines.
  692. */
  693. for_each_machine_desc(p)
  694. if (nr == p->nr) {
  695. printk("Machine: %s\n", p->name);
  696. mdesc = p;
  697. break;
  698. }
  699. if (!mdesc) {
  700. early_print("\nError: unrecognized/unsupported machine ID"
  701. " (r1 = 0x%08x).\n\n", nr);
  702. dump_machine_table(); /* does not return */
  703. }
  704. if (__atags_pointer)
  705. tags = phys_to_virt(__atags_pointer);
  706. else if (mdesc->boot_params) {
  707. #ifdef CONFIG_MMU
  708. /*
  709. * We still are executing with a minimal MMU mapping created
  710. * with the presumption that the machine default for this
  711. * is located in the first MB of RAM. Anything else will
  712. * fault and silently hang the kernel at this point.
  713. */
  714. if (mdesc->boot_params < PHYS_OFFSET ||
  715. mdesc->boot_params >= PHYS_OFFSET + SZ_1M) {
  716. printk(KERN_WARNING
  717. "Default boot params at physical 0x%08lx out of reach\n",
  718. mdesc->boot_params);
  719. } else
  720. #endif
  721. {
  722. tags = phys_to_virt(mdesc->boot_params);
  723. }
  724. }
  725. #if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
  726. /*
  727. * If we have the old style parameters, convert them to
  728. * a tag list.
  729. */
  730. if (tags->hdr.tag != ATAG_CORE)
  731. convert_to_tag_list(tags);
  732. #endif
  733. if (tags->hdr.tag != ATAG_CORE) {
  734. #if defined(CONFIG_OF)
  735. /*
  736. * If CONFIG_OF is set, then assume this is a reasonably
  737. * modern system that should pass boot parameters
  738. */
  739. early_print("Warning: Neither atags nor dtb found\n");
  740. #endif
  741. tags = (struct tag *)&init_tags;
  742. }
  743. if (mdesc->fixup)
  744. mdesc->fixup(mdesc, tags, &from, &meminfo);
  745. if (tags->hdr.tag == ATAG_CORE) {
  746. if (meminfo.nr_banks != 0)
  747. squash_mem_tags(tags);
  748. save_atags(tags);
  749. parse_tags(tags);
  750. }
  751. /* parse_early_param needs a boot_command_line */
  752. strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
  753. return mdesc;
  754. }
  755. void __init setup_arch(char **cmdline_p)
  756. {
  757. struct machine_desc *mdesc;
  758. unwind_init();
  759. setup_processor();
  760. mdesc = setup_machine_fdt(__atags_pointer);
  761. if (!mdesc)
  762. mdesc = setup_machine_tags(machine_arch_type);
  763. machine_desc = mdesc;
  764. machine_name = mdesc->name;
  765. if (mdesc->soft_reboot)
  766. reboot_setup("s");
  767. init_mm.start_code = (unsigned long) _text;
  768. init_mm.end_code = (unsigned long) _etext;
  769. init_mm.end_data = (unsigned long) _edata;
  770. init_mm.brk = (unsigned long) _end;
  771. /* populate cmd_line too for later use, preserving boot_command_line */
  772. strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
  773. *cmdline_p = cmd_line;
  774. parse_early_param();
  775. sanity_check_meminfo();
  776. arm_memblock_init(&meminfo, mdesc);
  777. paging_init(mdesc);
  778. request_standard_resources(mdesc);
  779. unflatten_device_tree();
  780. #ifdef CONFIG_SMP
  781. if (is_smp())
  782. smp_init_cpus();
  783. #endif
  784. reserve_crashkernel();
  785. cpu_init();
  786. tcm_init();
  787. #ifdef CONFIG_MULTI_IRQ_HANDLER
  788. handle_arch_irq = mdesc->handle_irq;
  789. #endif
  790. #ifdef CONFIG_VT
  791. #if defined(CONFIG_VGA_CONSOLE)
  792. conswitchp = &vga_con;
  793. #elif defined(CONFIG_DUMMY_CONSOLE)
  794. conswitchp = &dummy_con;
  795. #endif
  796. #endif
  797. early_trap_init();
  798. if (mdesc->init_early)
  799. mdesc->init_early();
  800. }
  801. static int __init topology_init(void)
  802. {
  803. int cpu;
  804. for_each_possible_cpu(cpu) {
  805. struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
  806. cpuinfo->cpu.hotpluggable = 1;
  807. register_cpu(&cpuinfo->cpu, cpu);
  808. }
  809. return 0;
  810. }
  811. subsys_initcall(topology_init);
  812. #ifdef CONFIG_HAVE_PROC_CPU
  813. static int __init proc_cpu_init(void)
  814. {
  815. struct proc_dir_entry *res;
  816. res = proc_mkdir("cpu", NULL);
  817. if (!res)
  818. return -ENOMEM;
  819. return 0;
  820. }
  821. fs_initcall(proc_cpu_init);
  822. #endif
  823. static const char *hwcap_str[] = {
  824. "swp",
  825. "half",
  826. "thumb",
  827. "26bit",
  828. "fastmult",
  829. "fpa",
  830. "vfp",
  831. "edsp",
  832. "java",
  833. "iwmmxt",
  834. "crunch",
  835. "thumbee",
  836. "neon",
  837. "vfpv3",
  838. "vfpv3d16",
  839. "tls",
  840. "vfpv4",
  841. "idiva",
  842. "idivt",
  843. NULL
  844. };
  845. static int c_show(struct seq_file *m, void *v)
  846. {
  847. int i;
  848. seq_printf(m, "Processor\t: %s rev %d (%s)\n",
  849. cpu_name, read_cpuid_id() & 15, elf_platform);
  850. #if defined(CONFIG_SMP)
  851. for_each_online_cpu(i) {
  852. /*
  853. * glibc reads /proc/cpuinfo to determine the number of
  854. * online processors, looking for lines beginning with
  855. * "processor". Give glibc what it expects.
  856. */
  857. seq_printf(m, "processor\t: %d\n", i);
  858. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
  859. per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
  860. (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);
  861. }
  862. #else /* CONFIG_SMP */
  863. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
  864. loops_per_jiffy / (500000/HZ),
  865. (loops_per_jiffy / (5000/HZ)) % 100);
  866. #endif
  867. /* dump out the processor features */
  868. seq_puts(m, "Features\t: ");
  869. for (i = 0; hwcap_str[i]; i++)
  870. if (elf_hwcap & (1 << i))
  871. seq_printf(m, "%s ", hwcap_str[i]);
  872. seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
  873. seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]);
  874. if ((read_cpuid_id() & 0x0008f000) == 0x00000000) {
  875. /* pre-ARM7 */
  876. seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4);
  877. } else {
  878. if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  879. /* ARM7 */
  880. seq_printf(m, "CPU variant\t: 0x%02x\n",
  881. (read_cpuid_id() >> 16) & 127);
  882. } else {
  883. /* post-ARM7 */
  884. seq_printf(m, "CPU variant\t: 0x%x\n",
  885. (read_cpuid_id() >> 20) & 15);
  886. }
  887. seq_printf(m, "CPU part\t: 0x%03x\n",
  888. (read_cpuid_id() >> 4) & 0xfff);
  889. }
  890. seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
  891. seq_puts(m, "\n");
  892. seq_printf(m, "Hardware\t: %s\n", machine_name);
  893. seq_printf(m, "Revision\t: %04x\n", system_rev);
  894. seq_printf(m, "Serial\t\t: %08x%08x\n",
  895. system_serial_high, system_serial_low);
  896. return 0;
  897. }
  898. static void *c_start(struct seq_file *m, loff_t *pos)
  899. {
  900. return *pos < 1 ? (void *)1 : NULL;
  901. }
  902. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  903. {
  904. ++*pos;
  905. return NULL;
  906. }
  907. static void c_stop(struct seq_file *m, void *v)
  908. {
  909. }
  910. const struct seq_operations cpuinfo_op = {
  911. .start = c_start,
  912. .next = c_next,
  913. .stop = c_stop,
  914. .show = c_show
  915. };