omap_hwmod.c 116 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk-provider.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include <linux/bootmem.h>
  140. #include "clock.h"
  141. #include "omap_hwmod.h"
  142. #include "soc.h"
  143. #include "common.h"
  144. #include "clockdomain.h"
  145. #include "powerdomain.h"
  146. #include "cm2xxx.h"
  147. #include "cm3xxx.h"
  148. #include "cminst44xx.h"
  149. #include "cm33xx.h"
  150. #include "prm.h"
  151. #include "prm3xxx.h"
  152. #include "prm44xx.h"
  153. #include "prm33xx.h"
  154. #include "prminst44xx.h"
  155. #include "mux.h"
  156. #include "pm.h"
  157. /* Name of the OMAP hwmod for the MPU */
  158. #define MPU_INITIATOR_NAME "mpu"
  159. /*
  160. * Number of struct omap_hwmod_link records per struct
  161. * omap_hwmod_ocp_if record (master->slave and slave->master)
  162. */
  163. #define LINKS_PER_OCP_IF 2
  164. /**
  165. * struct omap_hwmod_soc_ops - fn ptrs for some SoC-specific operations
  166. * @enable_module: function to enable a module (via MODULEMODE)
  167. * @disable_module: function to disable a module (via MODULEMODE)
  168. *
  169. * XXX Eventually this functionality will be hidden inside the PRM/CM
  170. * device drivers. Until then, this should avoid huge blocks of cpu_is_*()
  171. * conditionals in this code.
  172. */
  173. struct omap_hwmod_soc_ops {
  174. void (*enable_module)(struct omap_hwmod *oh);
  175. int (*disable_module)(struct omap_hwmod *oh);
  176. int (*wait_target_ready)(struct omap_hwmod *oh);
  177. int (*assert_hardreset)(struct omap_hwmod *oh,
  178. struct omap_hwmod_rst_info *ohri);
  179. int (*deassert_hardreset)(struct omap_hwmod *oh,
  180. struct omap_hwmod_rst_info *ohri);
  181. int (*is_hardreset_asserted)(struct omap_hwmod *oh,
  182. struct omap_hwmod_rst_info *ohri);
  183. int (*init_clkdm)(struct omap_hwmod *oh);
  184. };
  185. /* soc_ops: adapts the omap_hwmod code to the currently-booted SoC */
  186. static struct omap_hwmod_soc_ops soc_ops;
  187. /* omap_hwmod_list contains all registered struct omap_hwmods */
  188. static LIST_HEAD(omap_hwmod_list);
  189. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  190. static struct omap_hwmod *mpu_oh;
  191. /* io_chain_lock: used to serialize reconfigurations of the I/O chain */
  192. static DEFINE_SPINLOCK(io_chain_lock);
  193. /*
  194. * linkspace: ptr to a buffer that struct omap_hwmod_link records are
  195. * allocated from - used to reduce the number of small memory
  196. * allocations, which has a significant impact on performance
  197. */
  198. static struct omap_hwmod_link *linkspace;
  199. /*
  200. * free_ls, max_ls: array indexes into linkspace; representing the
  201. * next free struct omap_hwmod_link index, and the maximum number of
  202. * struct omap_hwmod_link records allocated (respectively)
  203. */
  204. static unsigned short free_ls, max_ls, ls_supp;
  205. /* inited: set to true once the hwmod code is initialized */
  206. static bool inited;
  207. /* Private functions */
  208. /**
  209. * _fetch_next_ocp_if - return the next OCP interface in a list
  210. * @p: ptr to a ptr to the list_head inside the ocp_if to return
  211. * @i: pointer to the index of the element pointed to by @p in the list
  212. *
  213. * Return a pointer to the struct omap_hwmod_ocp_if record
  214. * containing the struct list_head pointed to by @p, and increment
  215. * @p such that a future call to this routine will return the next
  216. * record.
  217. */
  218. static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
  219. int *i)
  220. {
  221. struct omap_hwmod_ocp_if *oi;
  222. oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
  223. *p = (*p)->next;
  224. *i = *i + 1;
  225. return oi;
  226. }
  227. /**
  228. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  229. * @oh: struct omap_hwmod *
  230. *
  231. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  232. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  233. * OCP_SYSCONFIG register or 0 upon success.
  234. */
  235. static int _update_sysc_cache(struct omap_hwmod *oh)
  236. {
  237. if (!oh->class->sysc) {
  238. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  239. return -EINVAL;
  240. }
  241. /* XXX ensure module interface clock is up */
  242. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  243. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  244. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  245. return 0;
  246. }
  247. /**
  248. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  249. * @v: OCP_SYSCONFIG value to write
  250. * @oh: struct omap_hwmod *
  251. *
  252. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  253. * one. No return value.
  254. */
  255. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  256. {
  257. if (!oh->class->sysc) {
  258. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  259. return;
  260. }
  261. /* XXX ensure module interface clock is up */
  262. /* Module might have lost context, always update cache and register */
  263. oh->_sysc_cache = v;
  264. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  265. }
  266. /**
  267. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  268. * @oh: struct omap_hwmod *
  269. * @standbymode: MIDLEMODE field bits
  270. * @v: pointer to register contents to modify
  271. *
  272. * Update the master standby mode bits in @v to be @standbymode for
  273. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  274. * upon error or 0 upon success.
  275. */
  276. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  277. u32 *v)
  278. {
  279. u32 mstandby_mask;
  280. u8 mstandby_shift;
  281. if (!oh->class->sysc ||
  282. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  283. return -EINVAL;
  284. if (!oh->class->sysc->sysc_fields) {
  285. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  286. return -EINVAL;
  287. }
  288. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  289. mstandby_mask = (0x3 << mstandby_shift);
  290. *v &= ~mstandby_mask;
  291. *v |= __ffs(standbymode) << mstandby_shift;
  292. return 0;
  293. }
  294. /**
  295. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  296. * @oh: struct omap_hwmod *
  297. * @idlemode: SIDLEMODE field bits
  298. * @v: pointer to register contents to modify
  299. *
  300. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  301. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  302. * or 0 upon success.
  303. */
  304. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  305. {
  306. u32 sidle_mask;
  307. u8 sidle_shift;
  308. if (!oh->class->sysc ||
  309. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  310. return -EINVAL;
  311. if (!oh->class->sysc->sysc_fields) {
  312. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  313. return -EINVAL;
  314. }
  315. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  316. sidle_mask = (0x3 << sidle_shift);
  317. *v &= ~sidle_mask;
  318. *v |= __ffs(idlemode) << sidle_shift;
  319. return 0;
  320. }
  321. /**
  322. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  323. * @oh: struct omap_hwmod *
  324. * @clockact: CLOCKACTIVITY field bits
  325. * @v: pointer to register contents to modify
  326. *
  327. * Update the clockactivity mode bits in @v to be @clockact for the
  328. * @oh hwmod. Used for additional powersaving on some modules. Does
  329. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  330. * success.
  331. */
  332. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  333. {
  334. u32 clkact_mask;
  335. u8 clkact_shift;
  336. if (!oh->class->sysc ||
  337. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  338. return -EINVAL;
  339. if (!oh->class->sysc->sysc_fields) {
  340. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  341. return -EINVAL;
  342. }
  343. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  344. clkact_mask = (0x3 << clkact_shift);
  345. *v &= ~clkact_mask;
  346. *v |= clockact << clkact_shift;
  347. return 0;
  348. }
  349. /**
  350. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  351. * @oh: struct omap_hwmod *
  352. * @v: pointer to register contents to modify
  353. *
  354. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  355. * error or 0 upon success.
  356. */
  357. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  358. {
  359. u32 softrst_mask;
  360. if (!oh->class->sysc ||
  361. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  362. return -EINVAL;
  363. if (!oh->class->sysc->sysc_fields) {
  364. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  365. return -EINVAL;
  366. }
  367. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  368. *v |= softrst_mask;
  369. return 0;
  370. }
  371. /**
  372. * _wait_softreset_complete - wait for an OCP softreset to complete
  373. * @oh: struct omap_hwmod * to wait on
  374. *
  375. * Wait until the IP block represented by @oh reports that its OCP
  376. * softreset is complete. This can be triggered by software (see
  377. * _ocp_softreset()) or by hardware upon returning from off-mode (one
  378. * example is HSMMC). Waits for up to MAX_MODULE_SOFTRESET_WAIT
  379. * microseconds. Returns the number of microseconds waited.
  380. */
  381. static int _wait_softreset_complete(struct omap_hwmod *oh)
  382. {
  383. struct omap_hwmod_class_sysconfig *sysc;
  384. u32 softrst_mask;
  385. int c = 0;
  386. sysc = oh->class->sysc;
  387. if (sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  388. omap_test_timeout((omap_hwmod_read(oh, sysc->syss_offs)
  389. & SYSS_RESETDONE_MASK),
  390. MAX_MODULE_SOFTRESET_WAIT, c);
  391. else if (sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  392. softrst_mask = (0x1 << sysc->sysc_fields->srst_shift);
  393. omap_test_timeout(!(omap_hwmod_read(oh, sysc->sysc_offs)
  394. & softrst_mask),
  395. MAX_MODULE_SOFTRESET_WAIT, c);
  396. }
  397. return c;
  398. }
  399. /**
  400. * _set_dmadisable: set OCP_SYSCONFIG.DMADISABLE bit in @v
  401. * @oh: struct omap_hwmod *
  402. *
  403. * The DMADISABLE bit is a semi-automatic bit present in sysconfig register
  404. * of some modules. When the DMA must perform read/write accesses, the
  405. * DMADISABLE bit is cleared by the hardware. But when the DMA must stop
  406. * for power management, software must set the DMADISABLE bit back to 1.
  407. *
  408. * Set the DMADISABLE bit in @v for hwmod @oh. Returns -EINVAL upon
  409. * error or 0 upon success.
  410. */
  411. static int _set_dmadisable(struct omap_hwmod *oh)
  412. {
  413. u32 v;
  414. u32 dmadisable_mask;
  415. if (!oh->class->sysc ||
  416. !(oh->class->sysc->sysc_flags & SYSC_HAS_DMADISABLE))
  417. return -EINVAL;
  418. if (!oh->class->sysc->sysc_fields) {
  419. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  420. return -EINVAL;
  421. }
  422. /* clocks must be on for this operation */
  423. if (oh->_state != _HWMOD_STATE_ENABLED) {
  424. pr_warn("omap_hwmod: %s: dma can be disabled only from enabled state\n", oh->name);
  425. return -EINVAL;
  426. }
  427. pr_debug("omap_hwmod: %s: setting DMADISABLE\n", oh->name);
  428. v = oh->_sysc_cache;
  429. dmadisable_mask =
  430. (0x1 << oh->class->sysc->sysc_fields->dmadisable_shift);
  431. v |= dmadisable_mask;
  432. _write_sysconfig(v, oh);
  433. return 0;
  434. }
  435. /**
  436. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  437. * @oh: struct omap_hwmod *
  438. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  439. * @v: pointer to register contents to modify
  440. *
  441. * Update the module autoidle bit in @v to be @autoidle for the @oh
  442. * hwmod. The autoidle bit controls whether the module can gate
  443. * internal clocks automatically when it isn't doing anything; the
  444. * exact function of this bit varies on a per-module basis. This
  445. * function does not write to the hardware. Returns -EINVAL upon
  446. * error or 0 upon success.
  447. */
  448. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  449. u32 *v)
  450. {
  451. u32 autoidle_mask;
  452. u8 autoidle_shift;
  453. if (!oh->class->sysc ||
  454. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  455. return -EINVAL;
  456. if (!oh->class->sysc->sysc_fields) {
  457. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  458. return -EINVAL;
  459. }
  460. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  461. autoidle_mask = (0x1 << autoidle_shift);
  462. *v &= ~autoidle_mask;
  463. *v |= autoidle << autoidle_shift;
  464. return 0;
  465. }
  466. /**
  467. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  468. * @oh: struct omap_hwmod *
  469. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  470. *
  471. * Set or clear the I/O pad wakeup flag in the mux entries for the
  472. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  473. * in memory. If the hwmod is currently idled, and the new idle
  474. * values don't match the previous ones, this function will also
  475. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  476. * currently idled, this function won't touch the hardware: the new
  477. * mux settings are written to the SCM PADCTRL registers when the
  478. * hwmod is idled. No return value.
  479. */
  480. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  481. {
  482. struct omap_device_pad *pad;
  483. bool change = false;
  484. u16 prev_idle;
  485. int j;
  486. if (!oh->mux || !oh->mux->enabled)
  487. return;
  488. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  489. pad = oh->mux->pads_dynamic[j];
  490. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  491. continue;
  492. prev_idle = pad->idle;
  493. if (set_wake)
  494. pad->idle |= OMAP_WAKEUP_EN;
  495. else
  496. pad->idle &= ~OMAP_WAKEUP_EN;
  497. if (prev_idle != pad->idle)
  498. change = true;
  499. }
  500. if (change && oh->_state == _HWMOD_STATE_IDLE)
  501. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  502. }
  503. /**
  504. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  505. * @oh: struct omap_hwmod *
  506. *
  507. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  508. * upon error or 0 upon success.
  509. */
  510. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  511. {
  512. if (!oh->class->sysc ||
  513. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  514. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  515. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  516. return -EINVAL;
  517. if (!oh->class->sysc->sysc_fields) {
  518. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  519. return -EINVAL;
  520. }
  521. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  522. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  523. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  524. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  525. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  526. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  527. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  528. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  529. return 0;
  530. }
  531. /**
  532. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  533. * @oh: struct omap_hwmod *
  534. *
  535. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  536. * upon error or 0 upon success.
  537. */
  538. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  539. {
  540. if (!oh->class->sysc ||
  541. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  542. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  543. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  544. return -EINVAL;
  545. if (!oh->class->sysc->sysc_fields) {
  546. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  547. return -EINVAL;
  548. }
  549. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  550. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  551. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  552. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  553. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  554. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART, v);
  555. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  556. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  557. return 0;
  558. }
  559. static struct clockdomain *_get_clkdm(struct omap_hwmod *oh)
  560. {
  561. struct clk_hw_omap *clk;
  562. if (oh->clkdm) {
  563. return oh->clkdm;
  564. } else if (oh->_clk) {
  565. clk = to_clk_hw_omap(__clk_get_hw(oh->_clk));
  566. return clk->clkdm;
  567. }
  568. return NULL;
  569. }
  570. /**
  571. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  572. * @oh: struct omap_hwmod *
  573. *
  574. * Prevent the hardware module @oh from entering idle while the
  575. * hardare module initiator @init_oh is active. Useful when a module
  576. * will be accessed by a particular initiator (e.g., if a module will
  577. * be accessed by the IVA, there should be a sleepdep between the IVA
  578. * initiator and the module). Only applies to modules in smart-idle
  579. * mode. If the clockdomain is marked as not needing autodeps, return
  580. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  581. * passes along clkdm_add_sleepdep() value upon success.
  582. */
  583. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  584. {
  585. struct clockdomain *clkdm, *init_clkdm;
  586. clkdm = _get_clkdm(oh);
  587. init_clkdm = _get_clkdm(init_oh);
  588. if (!clkdm || !init_clkdm)
  589. return -EINVAL;
  590. if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
  591. return 0;
  592. return clkdm_add_sleepdep(clkdm, init_clkdm);
  593. }
  594. /**
  595. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  596. * @oh: struct omap_hwmod *
  597. *
  598. * Allow the hardware module @oh to enter idle while the hardare
  599. * module initiator @init_oh is active. Useful when a module will not
  600. * be accessed by a particular initiator (e.g., if a module will not
  601. * be accessed by the IVA, there should be no sleepdep between the IVA
  602. * initiator and the module). Only applies to modules in smart-idle
  603. * mode. If the clockdomain is marked as not needing autodeps, return
  604. * 0 without doing anything. Returns -EINVAL upon error or passes
  605. * along clkdm_del_sleepdep() value upon success.
  606. */
  607. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  608. {
  609. struct clockdomain *clkdm, *init_clkdm;
  610. clkdm = _get_clkdm(oh);
  611. init_clkdm = _get_clkdm(init_oh);
  612. if (!clkdm || !init_clkdm)
  613. return -EINVAL;
  614. if (clkdm && clkdm->flags & CLKDM_NO_AUTODEPS)
  615. return 0;
  616. return clkdm_del_sleepdep(clkdm, init_clkdm);
  617. }
  618. /**
  619. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  620. * @oh: struct omap_hwmod *
  621. *
  622. * Called from _init_clocks(). Populates the @oh _clk (main
  623. * functional clock pointer) if a main_clk is present. Returns 0 on
  624. * success or -EINVAL on error.
  625. */
  626. static int _init_main_clk(struct omap_hwmod *oh)
  627. {
  628. int ret = 0;
  629. if (!oh->main_clk)
  630. return 0;
  631. oh->_clk = clk_get(NULL, oh->main_clk);
  632. if (IS_ERR(oh->_clk)) {
  633. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  634. oh->name, oh->main_clk);
  635. return -EINVAL;
  636. }
  637. /*
  638. * HACK: This needs a re-visit once clk_prepare() is implemented
  639. * to do something meaningful. Today its just a no-op.
  640. * If clk_prepare() is used at some point to do things like
  641. * voltage scaling etc, then this would have to be moved to
  642. * some point where subsystems like i2c and pmic become
  643. * available.
  644. */
  645. clk_prepare(oh->_clk);
  646. if (!_get_clkdm(oh))
  647. pr_debug("omap_hwmod: %s: missing clockdomain for %s.\n",
  648. oh->name, oh->main_clk);
  649. return ret;
  650. }
  651. /**
  652. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  653. * @oh: struct omap_hwmod *
  654. *
  655. * Called from _init_clocks(). Populates the @oh OCP slave interface
  656. * clock pointers. Returns 0 on success or -EINVAL on error.
  657. */
  658. static int _init_interface_clks(struct omap_hwmod *oh)
  659. {
  660. struct omap_hwmod_ocp_if *os;
  661. struct list_head *p;
  662. struct clk *c;
  663. int i = 0;
  664. int ret = 0;
  665. p = oh->slave_ports.next;
  666. while (i < oh->slaves_cnt) {
  667. os = _fetch_next_ocp_if(&p, &i);
  668. if (!os->clk)
  669. continue;
  670. c = clk_get(NULL, os->clk);
  671. if (IS_ERR(c)) {
  672. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  673. oh->name, os->clk);
  674. ret = -EINVAL;
  675. }
  676. os->_clk = c;
  677. /*
  678. * HACK: This needs a re-visit once clk_prepare() is implemented
  679. * to do something meaningful. Today its just a no-op.
  680. * If clk_prepare() is used at some point to do things like
  681. * voltage scaling etc, then this would have to be moved to
  682. * some point where subsystems like i2c and pmic become
  683. * available.
  684. */
  685. clk_prepare(os->_clk);
  686. }
  687. return ret;
  688. }
  689. /**
  690. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  691. * @oh: struct omap_hwmod *
  692. *
  693. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  694. * clock pointers. Returns 0 on success or -EINVAL on error.
  695. */
  696. static int _init_opt_clks(struct omap_hwmod *oh)
  697. {
  698. struct omap_hwmod_opt_clk *oc;
  699. struct clk *c;
  700. int i;
  701. int ret = 0;
  702. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  703. c = clk_get(NULL, oc->clk);
  704. if (IS_ERR(c)) {
  705. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  706. oh->name, oc->clk);
  707. ret = -EINVAL;
  708. }
  709. oc->_clk = c;
  710. /*
  711. * HACK: This needs a re-visit once clk_prepare() is implemented
  712. * to do something meaningful. Today its just a no-op.
  713. * If clk_prepare() is used at some point to do things like
  714. * voltage scaling etc, then this would have to be moved to
  715. * some point where subsystems like i2c and pmic become
  716. * available.
  717. */
  718. clk_prepare(oc->_clk);
  719. }
  720. return ret;
  721. }
  722. /**
  723. * _enable_clocks - enable hwmod main clock and interface clocks
  724. * @oh: struct omap_hwmod *
  725. *
  726. * Enables all clocks necessary for register reads and writes to succeed
  727. * on the hwmod @oh. Returns 0.
  728. */
  729. static int _enable_clocks(struct omap_hwmod *oh)
  730. {
  731. struct omap_hwmod_ocp_if *os;
  732. struct list_head *p;
  733. int i = 0;
  734. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  735. if (oh->_clk)
  736. clk_enable(oh->_clk);
  737. p = oh->slave_ports.next;
  738. while (i < oh->slaves_cnt) {
  739. os = _fetch_next_ocp_if(&p, &i);
  740. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  741. clk_enable(os->_clk);
  742. }
  743. /* The opt clocks are controlled by the device driver. */
  744. return 0;
  745. }
  746. /**
  747. * _disable_clocks - disable hwmod main clock and interface clocks
  748. * @oh: struct omap_hwmod *
  749. *
  750. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  751. */
  752. static int _disable_clocks(struct omap_hwmod *oh)
  753. {
  754. struct omap_hwmod_ocp_if *os;
  755. struct list_head *p;
  756. int i = 0;
  757. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  758. if (oh->_clk)
  759. clk_disable(oh->_clk);
  760. p = oh->slave_ports.next;
  761. while (i < oh->slaves_cnt) {
  762. os = _fetch_next_ocp_if(&p, &i);
  763. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  764. clk_disable(os->_clk);
  765. }
  766. /* The opt clocks are controlled by the device driver. */
  767. return 0;
  768. }
  769. static void _enable_optional_clocks(struct omap_hwmod *oh)
  770. {
  771. struct omap_hwmod_opt_clk *oc;
  772. int i;
  773. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  774. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  775. if (oc->_clk) {
  776. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  777. __clk_get_name(oc->_clk));
  778. clk_enable(oc->_clk);
  779. }
  780. }
  781. static void _disable_optional_clocks(struct omap_hwmod *oh)
  782. {
  783. struct omap_hwmod_opt_clk *oc;
  784. int i;
  785. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  786. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  787. if (oc->_clk) {
  788. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  789. __clk_get_name(oc->_clk));
  790. clk_disable(oc->_clk);
  791. }
  792. }
  793. /**
  794. * _omap4_enable_module - enable CLKCTRL modulemode on OMAP4
  795. * @oh: struct omap_hwmod *
  796. *
  797. * Enables the PRCM module mode related to the hwmod @oh.
  798. * No return value.
  799. */
  800. static void _omap4_enable_module(struct omap_hwmod *oh)
  801. {
  802. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  803. return;
  804. pr_debug("omap_hwmod: %s: %s: %d\n",
  805. oh->name, __func__, oh->prcm.omap4.modulemode);
  806. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  807. oh->clkdm->prcm_partition,
  808. oh->clkdm->cm_inst,
  809. oh->clkdm->clkdm_offs,
  810. oh->prcm.omap4.clkctrl_offs);
  811. }
  812. /**
  813. * _am33xx_enable_module - enable CLKCTRL modulemode on AM33XX
  814. * @oh: struct omap_hwmod *
  815. *
  816. * Enables the PRCM module mode related to the hwmod @oh.
  817. * No return value.
  818. */
  819. static void _am33xx_enable_module(struct omap_hwmod *oh)
  820. {
  821. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  822. return;
  823. pr_debug("omap_hwmod: %s: %s: %d\n",
  824. oh->name, __func__, oh->prcm.omap4.modulemode);
  825. am33xx_cm_module_enable(oh->prcm.omap4.modulemode, oh->clkdm->cm_inst,
  826. oh->clkdm->clkdm_offs,
  827. oh->prcm.omap4.clkctrl_offs);
  828. }
  829. /**
  830. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  831. * @oh: struct omap_hwmod *
  832. *
  833. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  834. * does not have an IDLEST bit or if the module successfully enters
  835. * slave idle; otherwise, pass along the return value of the
  836. * appropriate *_cm*_wait_module_idle() function.
  837. */
  838. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  839. {
  840. if (!oh)
  841. return -EINVAL;
  842. if (oh->_int_flags & _HWMOD_NO_MPU_PORT || !oh->clkdm)
  843. return 0;
  844. if (oh->flags & HWMOD_NO_IDLEST)
  845. return 0;
  846. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  847. oh->clkdm->cm_inst,
  848. oh->clkdm->clkdm_offs,
  849. oh->prcm.omap4.clkctrl_offs);
  850. }
  851. /**
  852. * _am33xx_wait_target_disable - wait for a module to be disabled on AM33XX
  853. * @oh: struct omap_hwmod *
  854. *
  855. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  856. * does not have an IDLEST bit or if the module successfully enters
  857. * slave idle; otherwise, pass along the return value of the
  858. * appropriate *_cm*_wait_module_idle() function.
  859. */
  860. static int _am33xx_wait_target_disable(struct omap_hwmod *oh)
  861. {
  862. if (!oh)
  863. return -EINVAL;
  864. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  865. return 0;
  866. if (oh->flags & HWMOD_NO_IDLEST)
  867. return 0;
  868. return am33xx_cm_wait_module_idle(oh->clkdm->cm_inst,
  869. oh->clkdm->clkdm_offs,
  870. oh->prcm.omap4.clkctrl_offs);
  871. }
  872. /**
  873. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  874. * @oh: struct omap_hwmod *oh
  875. *
  876. * Count and return the number of MPU IRQs associated with the hwmod
  877. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  878. * NULL.
  879. */
  880. static int _count_mpu_irqs(struct omap_hwmod *oh)
  881. {
  882. struct omap_hwmod_irq_info *ohii;
  883. int i = 0;
  884. if (!oh || !oh->mpu_irqs)
  885. return 0;
  886. do {
  887. ohii = &oh->mpu_irqs[i++];
  888. } while (ohii->irq != -1);
  889. return i-1;
  890. }
  891. /**
  892. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  893. * @oh: struct omap_hwmod *oh
  894. *
  895. * Count and return the number of SDMA request lines associated with
  896. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  897. * if @oh is NULL.
  898. */
  899. static int _count_sdma_reqs(struct omap_hwmod *oh)
  900. {
  901. struct omap_hwmod_dma_info *ohdi;
  902. int i = 0;
  903. if (!oh || !oh->sdma_reqs)
  904. return 0;
  905. do {
  906. ohdi = &oh->sdma_reqs[i++];
  907. } while (ohdi->dma_req != -1);
  908. return i-1;
  909. }
  910. /**
  911. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  912. * @oh: struct omap_hwmod *oh
  913. *
  914. * Count and return the number of address space ranges associated with
  915. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  916. * if @oh is NULL.
  917. */
  918. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  919. {
  920. struct omap_hwmod_addr_space *mem;
  921. int i = 0;
  922. if (!os || !os->addr)
  923. return 0;
  924. do {
  925. mem = &os->addr[i++];
  926. } while (mem->pa_start != mem->pa_end);
  927. return i-1;
  928. }
  929. /**
  930. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  931. * @oh: struct omap_hwmod * to operate on
  932. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  933. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  934. *
  935. * Retrieve a MPU hardware IRQ line number named by @name associated
  936. * with the IP block pointed to by @oh. The IRQ number will be filled
  937. * into the address pointed to by @dma. When @name is non-null, the
  938. * IRQ line number associated with the named entry will be returned.
  939. * If @name is null, the first matching entry will be returned. Data
  940. * order is not meaningful in hwmod data, so callers are strongly
  941. * encouraged to use a non-null @name whenever possible to avoid
  942. * unpredictable effects if hwmod data is later added that causes data
  943. * ordering to change. Returns 0 upon success or a negative error
  944. * code upon error.
  945. */
  946. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  947. unsigned int *irq)
  948. {
  949. int i;
  950. bool found = false;
  951. if (!oh->mpu_irqs)
  952. return -ENOENT;
  953. i = 0;
  954. while (oh->mpu_irqs[i].irq != -1) {
  955. if (name == oh->mpu_irqs[i].name ||
  956. !strcmp(name, oh->mpu_irqs[i].name)) {
  957. found = true;
  958. break;
  959. }
  960. i++;
  961. }
  962. if (!found)
  963. return -ENOENT;
  964. *irq = oh->mpu_irqs[i].irq;
  965. return 0;
  966. }
  967. /**
  968. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  969. * @oh: struct omap_hwmod * to operate on
  970. * @name: pointer to the name of the SDMA request line to fetch (optional)
  971. * @dma: pointer to an unsigned int to store the request line ID to
  972. *
  973. * Retrieve an SDMA request line ID named by @name on the IP block
  974. * pointed to by @oh. The ID will be filled into the address pointed
  975. * to by @dma. When @name is non-null, the request line ID associated
  976. * with the named entry will be returned. If @name is null, the first
  977. * matching entry will be returned. Data order is not meaningful in
  978. * hwmod data, so callers are strongly encouraged to use a non-null
  979. * @name whenever possible to avoid unpredictable effects if hwmod
  980. * data is later added that causes data ordering to change. Returns 0
  981. * upon success or a negative error code upon error.
  982. */
  983. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  984. unsigned int *dma)
  985. {
  986. int i;
  987. bool found = false;
  988. if (!oh->sdma_reqs)
  989. return -ENOENT;
  990. i = 0;
  991. while (oh->sdma_reqs[i].dma_req != -1) {
  992. if (name == oh->sdma_reqs[i].name ||
  993. !strcmp(name, oh->sdma_reqs[i].name)) {
  994. found = true;
  995. break;
  996. }
  997. i++;
  998. }
  999. if (!found)
  1000. return -ENOENT;
  1001. *dma = oh->sdma_reqs[i].dma_req;
  1002. return 0;
  1003. }
  1004. /**
  1005. * _get_addr_space_by_name - fetch address space start & end by name
  1006. * @oh: struct omap_hwmod * to operate on
  1007. * @name: pointer to the name of the address space to fetch (optional)
  1008. * @pa_start: pointer to a u32 to store the starting address to
  1009. * @pa_end: pointer to a u32 to store the ending address to
  1010. *
  1011. * Retrieve address space start and end addresses for the IP block
  1012. * pointed to by @oh. The data will be filled into the addresses
  1013. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  1014. * address space data associated with the named entry will be
  1015. * returned. If @name is null, the first matching entry will be
  1016. * returned. Data order is not meaningful in hwmod data, so callers
  1017. * are strongly encouraged to use a non-null @name whenever possible
  1018. * to avoid unpredictable effects if hwmod data is later added that
  1019. * causes data ordering to change. Returns 0 upon success or a
  1020. * negative error code upon error.
  1021. */
  1022. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  1023. u32 *pa_start, u32 *pa_end)
  1024. {
  1025. int i, j;
  1026. struct omap_hwmod_ocp_if *os;
  1027. struct list_head *p = NULL;
  1028. bool found = false;
  1029. p = oh->slave_ports.next;
  1030. i = 0;
  1031. while (i < oh->slaves_cnt) {
  1032. os = _fetch_next_ocp_if(&p, &i);
  1033. if (!os->addr)
  1034. return -ENOENT;
  1035. j = 0;
  1036. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  1037. if (name == os->addr[j].name ||
  1038. !strcmp(name, os->addr[j].name)) {
  1039. found = true;
  1040. break;
  1041. }
  1042. j++;
  1043. }
  1044. if (found)
  1045. break;
  1046. }
  1047. if (!found)
  1048. return -ENOENT;
  1049. *pa_start = os->addr[j].pa_start;
  1050. *pa_end = os->addr[j].pa_end;
  1051. return 0;
  1052. }
  1053. /**
  1054. * _save_mpu_port_index - find and save the index to @oh's MPU port
  1055. * @oh: struct omap_hwmod *
  1056. *
  1057. * Determines the array index of the OCP slave port that the MPU uses
  1058. * to address the device, and saves it into the struct omap_hwmod.
  1059. * Intended to be called during hwmod registration only. No return
  1060. * value.
  1061. */
  1062. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  1063. {
  1064. struct omap_hwmod_ocp_if *os = NULL;
  1065. struct list_head *p;
  1066. int i = 0;
  1067. if (!oh)
  1068. return;
  1069. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  1070. p = oh->slave_ports.next;
  1071. while (i < oh->slaves_cnt) {
  1072. os = _fetch_next_ocp_if(&p, &i);
  1073. if (os->user & OCP_USER_MPU) {
  1074. oh->_mpu_port = os;
  1075. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  1076. break;
  1077. }
  1078. }
  1079. return;
  1080. }
  1081. /**
  1082. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  1083. * @oh: struct omap_hwmod *
  1084. *
  1085. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  1086. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  1087. * communicate with the IP block. This interface need not be directly
  1088. * connected to the MPU (and almost certainly is not), but is directly
  1089. * connected to the IP block represented by @oh. Returns a pointer
  1090. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  1091. * error or if there does not appear to be a path from the MPU to this
  1092. * IP block.
  1093. */
  1094. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  1095. {
  1096. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  1097. return NULL;
  1098. return oh->_mpu_port;
  1099. };
  1100. /**
  1101. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  1102. * @oh: struct omap_hwmod *
  1103. *
  1104. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  1105. * the register target MPU address space; or returns NULL upon error.
  1106. */
  1107. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  1108. {
  1109. struct omap_hwmod_ocp_if *os;
  1110. struct omap_hwmod_addr_space *mem;
  1111. int found = 0, i = 0;
  1112. os = _find_mpu_rt_port(oh);
  1113. if (!os || !os->addr)
  1114. return NULL;
  1115. do {
  1116. mem = &os->addr[i++];
  1117. if (mem->flags & ADDR_TYPE_RT)
  1118. found = 1;
  1119. } while (!found && mem->pa_start != mem->pa_end);
  1120. return (found) ? mem : NULL;
  1121. }
  1122. /**
  1123. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  1124. * @oh: struct omap_hwmod *
  1125. *
  1126. * Ensure that the OCP_SYSCONFIG register for the IP block represented
  1127. * by @oh is set to indicate to the PRCM that the IP block is active.
  1128. * Usually this means placing the module into smart-idle mode and
  1129. * smart-standby, but if there is a bug in the automatic idle handling
  1130. * for the IP block, it may need to be placed into the force-idle or
  1131. * no-idle variants of these modes. No return value.
  1132. */
  1133. static void _enable_sysc(struct omap_hwmod *oh)
  1134. {
  1135. u8 idlemode, sf;
  1136. u32 v;
  1137. bool clkdm_act;
  1138. struct clockdomain *clkdm;
  1139. if (!oh->class->sysc)
  1140. return;
  1141. /*
  1142. * Wait until reset has completed, this is needed as the IP
  1143. * block is reset automatically by hardware in some cases
  1144. * (off-mode for example), and the drivers require the
  1145. * IP to be ready when they access it
  1146. */
  1147. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1148. _enable_optional_clocks(oh);
  1149. _wait_softreset_complete(oh);
  1150. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1151. _disable_optional_clocks(oh);
  1152. v = oh->_sysc_cache;
  1153. sf = oh->class->sysc->sysc_flags;
  1154. clkdm = _get_clkdm(oh);
  1155. if (sf & SYSC_HAS_SIDLEMODE) {
  1156. clkdm_act = (clkdm && clkdm->flags & CLKDM_ACTIVE_WITH_MPU);
  1157. if (clkdm_act && !(oh->class->sysc->idlemodes &
  1158. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1159. idlemode = HWMOD_IDLEMODE_FORCE;
  1160. else
  1161. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  1162. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  1163. _set_slave_idlemode(oh, idlemode, &v);
  1164. }
  1165. if (sf & SYSC_HAS_MIDLEMODE) {
  1166. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1167. idlemode = HWMOD_IDLEMODE_NO;
  1168. } else {
  1169. if (sf & SYSC_HAS_ENAWAKEUP)
  1170. _enable_wakeup(oh, &v);
  1171. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1172. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1173. else
  1174. idlemode = HWMOD_IDLEMODE_SMART;
  1175. }
  1176. _set_master_standbymode(oh, idlemode, &v);
  1177. }
  1178. /*
  1179. * XXX The clock framework should handle this, by
  1180. * calling into this code. But this must wait until the
  1181. * clock structures are tagged with omap_hwmod entries
  1182. */
  1183. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  1184. (sf & SYSC_HAS_CLOCKACTIVITY))
  1185. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  1186. /* If slave is in SMARTIDLE, also enable wakeup */
  1187. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1188. _enable_wakeup(oh, &v);
  1189. _write_sysconfig(v, oh);
  1190. /*
  1191. * Set the autoidle bit only after setting the smartidle bit
  1192. * Setting this will not have any impact on the other modules.
  1193. */
  1194. if (sf & SYSC_HAS_AUTOIDLE) {
  1195. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  1196. 0 : 1;
  1197. _set_module_autoidle(oh, idlemode, &v);
  1198. _write_sysconfig(v, oh);
  1199. }
  1200. }
  1201. /**
  1202. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  1203. * @oh: struct omap_hwmod *
  1204. *
  1205. * If module is marked as SWSUP_SIDLE, force the module into slave
  1206. * idle; otherwise, configure it for smart-idle. If module is marked
  1207. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  1208. * configure it for smart-standby. No return value.
  1209. */
  1210. static void _idle_sysc(struct omap_hwmod *oh)
  1211. {
  1212. u8 idlemode, sf;
  1213. u32 v;
  1214. if (!oh->class->sysc)
  1215. return;
  1216. v = oh->_sysc_cache;
  1217. sf = oh->class->sysc->sysc_flags;
  1218. if (sf & SYSC_HAS_SIDLEMODE) {
  1219. /* XXX What about HWMOD_IDLEMODE_SMART_WKUP? */
  1220. if (oh->flags & HWMOD_SWSUP_SIDLE ||
  1221. !(oh->class->sysc->idlemodes &
  1222. (SIDLE_SMART | SIDLE_SMART_WKUP)))
  1223. idlemode = HWMOD_IDLEMODE_FORCE;
  1224. else
  1225. idlemode = HWMOD_IDLEMODE_SMART;
  1226. _set_slave_idlemode(oh, idlemode, &v);
  1227. }
  1228. if (sf & SYSC_HAS_MIDLEMODE) {
  1229. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1230. idlemode = HWMOD_IDLEMODE_FORCE;
  1231. } else {
  1232. if (sf & SYSC_HAS_ENAWAKEUP)
  1233. _enable_wakeup(oh, &v);
  1234. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1235. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1236. else
  1237. idlemode = HWMOD_IDLEMODE_SMART;
  1238. }
  1239. _set_master_standbymode(oh, idlemode, &v);
  1240. }
  1241. /* If slave is in SMARTIDLE, also enable wakeup */
  1242. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1243. _enable_wakeup(oh, &v);
  1244. _write_sysconfig(v, oh);
  1245. }
  1246. /**
  1247. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1248. * @oh: struct omap_hwmod *
  1249. *
  1250. * Force the module into slave idle and master suspend. No return
  1251. * value.
  1252. */
  1253. static void _shutdown_sysc(struct omap_hwmod *oh)
  1254. {
  1255. u32 v;
  1256. u8 sf;
  1257. if (!oh->class->sysc)
  1258. return;
  1259. v = oh->_sysc_cache;
  1260. sf = oh->class->sysc->sysc_flags;
  1261. if (sf & SYSC_HAS_SIDLEMODE)
  1262. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1263. if (sf & SYSC_HAS_MIDLEMODE)
  1264. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1265. if (sf & SYSC_HAS_AUTOIDLE)
  1266. _set_module_autoidle(oh, 1, &v);
  1267. _write_sysconfig(v, oh);
  1268. }
  1269. /**
  1270. * _lookup - find an omap_hwmod by name
  1271. * @name: find an omap_hwmod by name
  1272. *
  1273. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1274. */
  1275. static struct omap_hwmod *_lookup(const char *name)
  1276. {
  1277. struct omap_hwmod *oh, *temp_oh;
  1278. oh = NULL;
  1279. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1280. if (!strcmp(name, temp_oh->name)) {
  1281. oh = temp_oh;
  1282. break;
  1283. }
  1284. }
  1285. return oh;
  1286. }
  1287. /**
  1288. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1289. * @oh: struct omap_hwmod *
  1290. *
  1291. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1292. * clockdomain pointer, and save it into the struct omap_hwmod.
  1293. * Return -EINVAL if the clkdm_name lookup failed.
  1294. */
  1295. static int _init_clkdm(struct omap_hwmod *oh)
  1296. {
  1297. if (!oh->clkdm_name) {
  1298. pr_debug("omap_hwmod: %s: missing clockdomain\n", oh->name);
  1299. return 0;
  1300. }
  1301. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1302. if (!oh->clkdm) {
  1303. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  1304. oh->name, oh->clkdm_name);
  1305. return -EINVAL;
  1306. }
  1307. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1308. oh->name, oh->clkdm_name);
  1309. return 0;
  1310. }
  1311. /**
  1312. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1313. * well the clockdomain.
  1314. * @oh: struct omap_hwmod *
  1315. * @data: not used; pass NULL
  1316. *
  1317. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1318. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1319. * success, or a negative error code on failure.
  1320. */
  1321. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1322. {
  1323. int ret = 0;
  1324. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1325. return 0;
  1326. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1327. if (soc_ops.init_clkdm)
  1328. ret |= soc_ops.init_clkdm(oh);
  1329. ret |= _init_main_clk(oh);
  1330. ret |= _init_interface_clks(oh);
  1331. ret |= _init_opt_clks(oh);
  1332. if (!ret)
  1333. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1334. else
  1335. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1336. return ret;
  1337. }
  1338. /**
  1339. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1340. * @oh: struct omap_hwmod *
  1341. * @name: name of the reset line in the context of this hwmod
  1342. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1343. *
  1344. * Return the bit position of the reset line that match the
  1345. * input name. Return -ENOENT if not found.
  1346. */
  1347. static int _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1348. struct omap_hwmod_rst_info *ohri)
  1349. {
  1350. int i;
  1351. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1352. const char *rst_line = oh->rst_lines[i].name;
  1353. if (!strcmp(rst_line, name)) {
  1354. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1355. ohri->st_shift = oh->rst_lines[i].st_shift;
  1356. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1357. oh->name, __func__, rst_line, ohri->rst_shift,
  1358. ohri->st_shift);
  1359. return 0;
  1360. }
  1361. }
  1362. return -ENOENT;
  1363. }
  1364. /**
  1365. * _assert_hardreset - assert the HW reset line of submodules
  1366. * contained in the hwmod module.
  1367. * @oh: struct omap_hwmod *
  1368. * @name: name of the reset line to lookup and assert
  1369. *
  1370. * Some IP like dsp, ipu or iva contain processor that require an HW
  1371. * reset line to be assert / deassert in order to enable fully the IP.
  1372. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1373. * asserting the hardreset line on the currently-booted SoC, or passes
  1374. * along the return value from _lookup_hardreset() or the SoC's
  1375. * assert_hardreset code.
  1376. */
  1377. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1378. {
  1379. struct omap_hwmod_rst_info ohri;
  1380. int ret = -EINVAL;
  1381. if (!oh)
  1382. return -EINVAL;
  1383. if (!soc_ops.assert_hardreset)
  1384. return -ENOSYS;
  1385. ret = _lookup_hardreset(oh, name, &ohri);
  1386. if (ret < 0)
  1387. return ret;
  1388. ret = soc_ops.assert_hardreset(oh, &ohri);
  1389. return ret;
  1390. }
  1391. /**
  1392. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1393. * in the hwmod module.
  1394. * @oh: struct omap_hwmod *
  1395. * @name: name of the reset line to look up and deassert
  1396. *
  1397. * Some IP like dsp, ipu or iva contain processor that require an HW
  1398. * reset line to be assert / deassert in order to enable fully the IP.
  1399. * Returns -EINVAL if @oh is null, -ENOSYS if we have no way of
  1400. * deasserting the hardreset line on the currently-booted SoC, or passes
  1401. * along the return value from _lookup_hardreset() or the SoC's
  1402. * deassert_hardreset code.
  1403. */
  1404. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1405. {
  1406. struct omap_hwmod_rst_info ohri;
  1407. int ret = -EINVAL;
  1408. int hwsup = 0;
  1409. if (!oh)
  1410. return -EINVAL;
  1411. if (!soc_ops.deassert_hardreset)
  1412. return -ENOSYS;
  1413. ret = _lookup_hardreset(oh, name, &ohri);
  1414. if (IS_ERR_VALUE(ret))
  1415. return ret;
  1416. if (oh->clkdm) {
  1417. /*
  1418. * A clockdomain must be in SW_SUP otherwise reset
  1419. * might not be completed. The clockdomain can be set
  1420. * in HW_AUTO only when the module become ready.
  1421. */
  1422. hwsup = clkdm_in_hwsup(oh->clkdm);
  1423. ret = clkdm_hwmod_enable(oh->clkdm, oh);
  1424. if (ret) {
  1425. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1426. oh->name, oh->clkdm->name, ret);
  1427. return ret;
  1428. }
  1429. }
  1430. _enable_clocks(oh);
  1431. if (soc_ops.enable_module)
  1432. soc_ops.enable_module(oh);
  1433. ret = soc_ops.deassert_hardreset(oh, &ohri);
  1434. if (soc_ops.disable_module)
  1435. soc_ops.disable_module(oh);
  1436. _disable_clocks(oh);
  1437. if (ret == -EBUSY)
  1438. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1439. if (!ret) {
  1440. /*
  1441. * Set the clockdomain to HW_AUTO, assuming that the
  1442. * previous state was HW_AUTO.
  1443. */
  1444. if (oh->clkdm && hwsup)
  1445. clkdm_allow_idle(oh->clkdm);
  1446. } else {
  1447. if (oh->clkdm)
  1448. clkdm_hwmod_disable(oh->clkdm, oh);
  1449. }
  1450. return ret;
  1451. }
  1452. /**
  1453. * _read_hardreset - read the HW reset line state of submodules
  1454. * contained in the hwmod module
  1455. * @oh: struct omap_hwmod *
  1456. * @name: name of the reset line to look up and read
  1457. *
  1458. * Return the state of the reset line. Returns -EINVAL if @oh is
  1459. * null, -ENOSYS if we have no way of reading the hardreset line
  1460. * status on the currently-booted SoC, or passes along the return
  1461. * value from _lookup_hardreset() or the SoC's is_hardreset_asserted
  1462. * code.
  1463. */
  1464. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1465. {
  1466. struct omap_hwmod_rst_info ohri;
  1467. int ret = -EINVAL;
  1468. if (!oh)
  1469. return -EINVAL;
  1470. if (!soc_ops.is_hardreset_asserted)
  1471. return -ENOSYS;
  1472. ret = _lookup_hardreset(oh, name, &ohri);
  1473. if (ret < 0)
  1474. return ret;
  1475. return soc_ops.is_hardreset_asserted(oh, &ohri);
  1476. }
  1477. /**
  1478. * _are_all_hardreset_lines_asserted - return true if the @oh is hard-reset
  1479. * @oh: struct omap_hwmod *
  1480. *
  1481. * If all hardreset lines associated with @oh are asserted, then return true.
  1482. * Otherwise, if part of @oh is out hardreset or if no hardreset lines
  1483. * associated with @oh are asserted, then return false.
  1484. * This function is used to avoid executing some parts of the IP block
  1485. * enable/disable sequence if its hardreset line is set.
  1486. */
  1487. static bool _are_all_hardreset_lines_asserted(struct omap_hwmod *oh)
  1488. {
  1489. int i, rst_cnt = 0;
  1490. if (oh->rst_lines_cnt == 0)
  1491. return false;
  1492. for (i = 0; i < oh->rst_lines_cnt; i++)
  1493. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1494. rst_cnt++;
  1495. if (oh->rst_lines_cnt == rst_cnt)
  1496. return true;
  1497. return false;
  1498. }
  1499. /**
  1500. * _are_any_hardreset_lines_asserted - return true if any part of @oh is
  1501. * hard-reset
  1502. * @oh: struct omap_hwmod *
  1503. *
  1504. * If any hardreset lines associated with @oh are asserted, then
  1505. * return true. Otherwise, if no hardreset lines associated with @oh
  1506. * are asserted, or if @oh has no hardreset lines, then return false.
  1507. * This function is used to avoid executing some parts of the IP block
  1508. * enable/disable sequence if any hardreset line is set.
  1509. */
  1510. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1511. {
  1512. int rst_cnt = 0;
  1513. int i;
  1514. for (i = 0; i < oh->rst_lines_cnt && rst_cnt == 0; i++)
  1515. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1516. rst_cnt++;
  1517. return (rst_cnt) ? true : false;
  1518. }
  1519. /**
  1520. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1521. * @oh: struct omap_hwmod *
  1522. *
  1523. * Disable the PRCM module mode related to the hwmod @oh.
  1524. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1525. */
  1526. static int _omap4_disable_module(struct omap_hwmod *oh)
  1527. {
  1528. int v;
  1529. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1530. return -EINVAL;
  1531. /*
  1532. * Since integration code might still be doing something, only
  1533. * disable if all lines are under hardreset.
  1534. */
  1535. if (_are_any_hardreset_lines_asserted(oh))
  1536. return 0;
  1537. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1538. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1539. oh->clkdm->cm_inst,
  1540. oh->clkdm->clkdm_offs,
  1541. oh->prcm.omap4.clkctrl_offs);
  1542. v = _omap4_wait_target_disable(oh);
  1543. if (v)
  1544. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1545. oh->name);
  1546. return 0;
  1547. }
  1548. /**
  1549. * _am33xx_disable_module - enable CLKCTRL modulemode on AM33XX
  1550. * @oh: struct omap_hwmod *
  1551. *
  1552. * Disable the PRCM module mode related to the hwmod @oh.
  1553. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1554. */
  1555. static int _am33xx_disable_module(struct omap_hwmod *oh)
  1556. {
  1557. int v;
  1558. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1559. return -EINVAL;
  1560. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1561. if (_are_any_hardreset_lines_asserted(oh))
  1562. return 0;
  1563. am33xx_cm_module_disable(oh->clkdm->cm_inst, oh->clkdm->clkdm_offs,
  1564. oh->prcm.omap4.clkctrl_offs);
  1565. v = _am33xx_wait_target_disable(oh);
  1566. if (v)
  1567. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1568. oh->name);
  1569. return 0;
  1570. }
  1571. /**
  1572. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1573. * @oh: struct omap_hwmod *
  1574. *
  1575. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1576. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1577. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1578. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1579. *
  1580. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1581. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1582. * use the SYSCONFIG softreset bit to provide the status.
  1583. *
  1584. * Note that some IP like McBSP do have reset control but don't have
  1585. * reset status.
  1586. */
  1587. static int _ocp_softreset(struct omap_hwmod *oh)
  1588. {
  1589. u32 v;
  1590. int c = 0;
  1591. int ret = 0;
  1592. if (!oh->class->sysc ||
  1593. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1594. return -ENOENT;
  1595. /* clocks must be on for this operation */
  1596. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1597. pr_warn("omap_hwmod: %s: reset can only be entered from enabled state\n",
  1598. oh->name);
  1599. return -EINVAL;
  1600. }
  1601. /* For some modules, all optionnal clocks need to be enabled as well */
  1602. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1603. _enable_optional_clocks(oh);
  1604. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1605. v = oh->_sysc_cache;
  1606. ret = _set_softreset(oh, &v);
  1607. if (ret)
  1608. goto dis_opt_clks;
  1609. _write_sysconfig(v, oh);
  1610. if (oh->class->sysc->srst_udelay)
  1611. udelay(oh->class->sysc->srst_udelay);
  1612. c = _wait_softreset_complete(oh);
  1613. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1614. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1615. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1616. else
  1617. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1618. /*
  1619. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1620. * _wait_target_ready() or _reset()
  1621. */
  1622. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1623. dis_opt_clks:
  1624. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1625. _disable_optional_clocks(oh);
  1626. return ret;
  1627. }
  1628. /**
  1629. * _reset - reset an omap_hwmod
  1630. * @oh: struct omap_hwmod *
  1631. *
  1632. * Resets an omap_hwmod @oh. If the module has a custom reset
  1633. * function pointer defined, then call it to reset the IP block, and
  1634. * pass along its return value to the caller. Otherwise, if the IP
  1635. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1636. * associated with it, call a function to reset the IP block via that
  1637. * method, and pass along the return value to the caller. Finally, if
  1638. * the IP block has some hardreset lines associated with it, assert
  1639. * all of those, but do _not_ deassert them. (This is because driver
  1640. * authors have expressed an apparent requirement to control the
  1641. * deassertion of the hardreset lines themselves.)
  1642. *
  1643. * The default software reset mechanism for most OMAP IP blocks is
  1644. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1645. * hwmods cannot be reset via this method. Some are not targets and
  1646. * therefore have no OCP header registers to access. Others (like the
  1647. * IVA) have idiosyncratic reset sequences. So for these relatively
  1648. * rare cases, custom reset code can be supplied in the struct
  1649. * omap_hwmod_class .reset function pointer.
  1650. *
  1651. * _set_dmadisable() is called to set the DMADISABLE bit so that it
  1652. * does not prevent idling of the system. This is necessary for cases
  1653. * where ROMCODE/BOOTLOADER uses dma and transfers control to the
  1654. * kernel without disabling dma.
  1655. *
  1656. * Passes along the return value from either _ocp_softreset() or the
  1657. * custom reset function - these must return -EINVAL if the hwmod
  1658. * cannot be reset this way or if the hwmod is in the wrong state,
  1659. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1660. */
  1661. static int _reset(struct omap_hwmod *oh)
  1662. {
  1663. int i, r;
  1664. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1665. if (oh->class->reset) {
  1666. r = oh->class->reset(oh);
  1667. } else {
  1668. if (oh->rst_lines_cnt > 0) {
  1669. for (i = 0; i < oh->rst_lines_cnt; i++)
  1670. _assert_hardreset(oh, oh->rst_lines[i].name);
  1671. return 0;
  1672. } else {
  1673. r = _ocp_softreset(oh);
  1674. if (r == -ENOENT)
  1675. r = 0;
  1676. }
  1677. }
  1678. _set_dmadisable(oh);
  1679. /*
  1680. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1681. * softreset. The _enable() function should be split to avoid
  1682. * the rewrite of the OCP_SYSCONFIG register.
  1683. */
  1684. if (oh->class->sysc) {
  1685. _update_sysc_cache(oh);
  1686. _enable_sysc(oh);
  1687. }
  1688. return r;
  1689. }
  1690. /**
  1691. * _reconfigure_io_chain - clear any I/O chain wakeups and reconfigure chain
  1692. *
  1693. * Call the appropriate PRM function to clear any logged I/O chain
  1694. * wakeups and to reconfigure the chain. This apparently needs to be
  1695. * done upon every mux change. Since hwmods can be concurrently
  1696. * enabled and idled, hold a spinlock around the I/O chain
  1697. * reconfiguration sequence. No return value.
  1698. *
  1699. * XXX When the PRM code is moved to drivers, this function can be removed,
  1700. * as the PRM infrastructure should abstract this.
  1701. */
  1702. static void _reconfigure_io_chain(void)
  1703. {
  1704. unsigned long flags;
  1705. spin_lock_irqsave(&io_chain_lock, flags);
  1706. if (cpu_is_omap34xx() && omap3_has_io_chain_ctrl())
  1707. omap3xxx_prm_reconfigure_io_chain();
  1708. else if (cpu_is_omap44xx())
  1709. omap44xx_prm_reconfigure_io_chain();
  1710. spin_unlock_irqrestore(&io_chain_lock, flags);
  1711. }
  1712. /**
  1713. * _enable - enable an omap_hwmod
  1714. * @oh: struct omap_hwmod *
  1715. *
  1716. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1717. * register target. Returns -EINVAL if the hwmod is in the wrong
  1718. * state or passes along the return value of _wait_target_ready().
  1719. */
  1720. static int _enable(struct omap_hwmod *oh)
  1721. {
  1722. int r;
  1723. int hwsup = 0;
  1724. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1725. /*
  1726. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1727. * state at init. Now that someone is really trying to enable
  1728. * them, just ensure that the hwmod mux is set.
  1729. */
  1730. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1731. /*
  1732. * If the caller has mux data populated, do the mux'ing
  1733. * which wouldn't have been done as part of the _enable()
  1734. * done during setup.
  1735. */
  1736. if (oh->mux)
  1737. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1738. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1739. return 0;
  1740. }
  1741. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1742. oh->_state != _HWMOD_STATE_IDLE &&
  1743. oh->_state != _HWMOD_STATE_DISABLED) {
  1744. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1745. oh->name);
  1746. return -EINVAL;
  1747. }
  1748. /*
  1749. * If an IP block contains HW reset lines and all of them are
  1750. * asserted, we let integration code associated with that
  1751. * block handle the enable. We've received very little
  1752. * information on what those driver authors need, and until
  1753. * detailed information is provided and the driver code is
  1754. * posted to the public lists, this is probably the best we
  1755. * can do.
  1756. */
  1757. if (_are_all_hardreset_lines_asserted(oh))
  1758. return 0;
  1759. /* Mux pins for device runtime if populated */
  1760. if (oh->mux && (!oh->mux->enabled ||
  1761. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1762. oh->mux->pads_dynamic))) {
  1763. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1764. _reconfigure_io_chain();
  1765. }
  1766. _add_initiator_dep(oh, mpu_oh);
  1767. if (oh->clkdm) {
  1768. /*
  1769. * A clockdomain must be in SW_SUP before enabling
  1770. * completely the module. The clockdomain can be set
  1771. * in HW_AUTO only when the module become ready.
  1772. */
  1773. hwsup = clkdm_in_hwsup(oh->clkdm) &&
  1774. !clkdm_missing_idle_reporting(oh->clkdm);
  1775. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1776. if (r) {
  1777. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1778. oh->name, oh->clkdm->name, r);
  1779. return r;
  1780. }
  1781. }
  1782. _enable_clocks(oh);
  1783. if (soc_ops.enable_module)
  1784. soc_ops.enable_module(oh);
  1785. r = (soc_ops.wait_target_ready) ? soc_ops.wait_target_ready(oh) :
  1786. -EINVAL;
  1787. if (!r) {
  1788. /*
  1789. * Set the clockdomain to HW_AUTO only if the target is ready,
  1790. * assuming that the previous state was HW_AUTO
  1791. */
  1792. if (oh->clkdm && hwsup)
  1793. clkdm_allow_idle(oh->clkdm);
  1794. oh->_state = _HWMOD_STATE_ENABLED;
  1795. /* Access the sysconfig only if the target is ready */
  1796. if (oh->class->sysc) {
  1797. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1798. _update_sysc_cache(oh);
  1799. _enable_sysc(oh);
  1800. }
  1801. } else {
  1802. if (soc_ops.disable_module)
  1803. soc_ops.disable_module(oh);
  1804. _disable_clocks(oh);
  1805. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1806. oh->name, r);
  1807. if (oh->clkdm)
  1808. clkdm_hwmod_disable(oh->clkdm, oh);
  1809. }
  1810. return r;
  1811. }
  1812. /**
  1813. * _idle - idle an omap_hwmod
  1814. * @oh: struct omap_hwmod *
  1815. *
  1816. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1817. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1818. * state or returns 0.
  1819. */
  1820. static int _idle(struct omap_hwmod *oh)
  1821. {
  1822. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1823. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1824. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1825. oh->name);
  1826. return -EINVAL;
  1827. }
  1828. if (_are_all_hardreset_lines_asserted(oh))
  1829. return 0;
  1830. if (oh->class->sysc)
  1831. _idle_sysc(oh);
  1832. _del_initiator_dep(oh, mpu_oh);
  1833. if (soc_ops.disable_module)
  1834. soc_ops.disable_module(oh);
  1835. /*
  1836. * The module must be in idle mode before disabling any parents
  1837. * clocks. Otherwise, the parent clock might be disabled before
  1838. * the module transition is done, and thus will prevent the
  1839. * transition to complete properly.
  1840. */
  1841. _disable_clocks(oh);
  1842. if (oh->clkdm)
  1843. clkdm_hwmod_disable(oh->clkdm, oh);
  1844. /* Mux pins for device idle if populated */
  1845. if (oh->mux && oh->mux->pads_dynamic) {
  1846. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1847. _reconfigure_io_chain();
  1848. }
  1849. oh->_state = _HWMOD_STATE_IDLE;
  1850. return 0;
  1851. }
  1852. /**
  1853. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1854. * @oh: struct omap_hwmod *
  1855. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1856. *
  1857. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1858. * local copy. Intended to be used by drivers that require
  1859. * direct manipulation of the AUTOIDLE bits.
  1860. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1861. * along the return value from _set_module_autoidle().
  1862. *
  1863. * Any users of this function should be scrutinized carefully.
  1864. */
  1865. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1866. {
  1867. u32 v;
  1868. int retval = 0;
  1869. unsigned long flags;
  1870. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1871. return -EINVAL;
  1872. spin_lock_irqsave(&oh->_lock, flags);
  1873. v = oh->_sysc_cache;
  1874. retval = _set_module_autoidle(oh, autoidle, &v);
  1875. if (!retval)
  1876. _write_sysconfig(v, oh);
  1877. spin_unlock_irqrestore(&oh->_lock, flags);
  1878. return retval;
  1879. }
  1880. /**
  1881. * _shutdown - shutdown an omap_hwmod
  1882. * @oh: struct omap_hwmod *
  1883. *
  1884. * Shut down an omap_hwmod @oh. This should be called when the driver
  1885. * used for the hwmod is removed or unloaded or if the driver is not
  1886. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1887. * state or returns 0.
  1888. */
  1889. static int _shutdown(struct omap_hwmod *oh)
  1890. {
  1891. int ret, i;
  1892. u8 prev_state;
  1893. if (oh->_state != _HWMOD_STATE_IDLE &&
  1894. oh->_state != _HWMOD_STATE_ENABLED) {
  1895. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1896. oh->name);
  1897. return -EINVAL;
  1898. }
  1899. if (_are_all_hardreset_lines_asserted(oh))
  1900. return 0;
  1901. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1902. if (oh->class->pre_shutdown) {
  1903. prev_state = oh->_state;
  1904. if (oh->_state == _HWMOD_STATE_IDLE)
  1905. _enable(oh);
  1906. ret = oh->class->pre_shutdown(oh);
  1907. if (ret) {
  1908. if (prev_state == _HWMOD_STATE_IDLE)
  1909. _idle(oh);
  1910. return ret;
  1911. }
  1912. }
  1913. if (oh->class->sysc) {
  1914. if (oh->_state == _HWMOD_STATE_IDLE)
  1915. _enable(oh);
  1916. _shutdown_sysc(oh);
  1917. }
  1918. /* clocks and deps are already disabled in idle */
  1919. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1920. _del_initiator_dep(oh, mpu_oh);
  1921. /* XXX what about the other system initiators here? dma, dsp */
  1922. if (soc_ops.disable_module)
  1923. soc_ops.disable_module(oh);
  1924. _disable_clocks(oh);
  1925. if (oh->clkdm)
  1926. clkdm_hwmod_disable(oh->clkdm, oh);
  1927. }
  1928. /* XXX Should this code also force-disable the optional clocks? */
  1929. for (i = 0; i < oh->rst_lines_cnt; i++)
  1930. _assert_hardreset(oh, oh->rst_lines[i].name);
  1931. /* Mux pins to safe mode or use populated off mode values */
  1932. if (oh->mux)
  1933. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1934. oh->_state = _HWMOD_STATE_DISABLED;
  1935. return 0;
  1936. }
  1937. /**
  1938. * _init_mpu_rt_base - populate the virtual address for a hwmod
  1939. * @oh: struct omap_hwmod * to locate the virtual address
  1940. *
  1941. * Cache the virtual address used by the MPU to access this IP block's
  1942. * registers. This address is needed early so the OCP registers that
  1943. * are part of the device's address space can be ioremapped properly.
  1944. * No return value.
  1945. */
  1946. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1947. {
  1948. struct omap_hwmod_addr_space *mem;
  1949. void __iomem *va_start;
  1950. if (!oh)
  1951. return;
  1952. _save_mpu_port_index(oh);
  1953. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1954. return;
  1955. mem = _find_mpu_rt_addr_space(oh);
  1956. if (!mem) {
  1957. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  1958. oh->name);
  1959. return;
  1960. }
  1961. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  1962. if (!va_start) {
  1963. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  1964. return;
  1965. }
  1966. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  1967. oh->name, va_start);
  1968. oh->_mpu_rt_va = va_start;
  1969. }
  1970. /**
  1971. * _init - initialize internal data for the hwmod @oh
  1972. * @oh: struct omap_hwmod *
  1973. * @n: (unused)
  1974. *
  1975. * Look up the clocks and the address space used by the MPU to access
  1976. * registers belonging to the hwmod @oh. @oh must already be
  1977. * registered at this point. This is the first of two phases for
  1978. * hwmod initialization. Code called here does not touch any hardware
  1979. * registers, it simply prepares internal data structures. Returns 0
  1980. * upon success or if the hwmod isn't registered, or -EINVAL upon
  1981. * failure.
  1982. */
  1983. static int __init _init(struct omap_hwmod *oh, void *data)
  1984. {
  1985. int r;
  1986. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1987. return 0;
  1988. _init_mpu_rt_base(oh, NULL);
  1989. r = _init_clocks(oh, NULL);
  1990. if (IS_ERR_VALUE(r)) {
  1991. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  1992. return -EINVAL;
  1993. }
  1994. oh->_state = _HWMOD_STATE_INITIALIZED;
  1995. return 0;
  1996. }
  1997. /**
  1998. * _setup_iclk_autoidle - configure an IP block's interface clocks
  1999. * @oh: struct omap_hwmod *
  2000. *
  2001. * Set up the module's interface clocks. XXX This function is still mostly
  2002. * a stub; implementing this properly requires iclk autoidle usecounting in
  2003. * the clock code. No return value.
  2004. */
  2005. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  2006. {
  2007. struct omap_hwmod_ocp_if *os;
  2008. struct list_head *p;
  2009. int i = 0;
  2010. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2011. return;
  2012. p = oh->slave_ports.next;
  2013. while (i < oh->slaves_cnt) {
  2014. os = _fetch_next_ocp_if(&p, &i);
  2015. if (!os->_clk)
  2016. continue;
  2017. if (os->flags & OCPIF_SWSUP_IDLE) {
  2018. /* XXX omap_iclk_deny_idle(c); */
  2019. } else {
  2020. /* XXX omap_iclk_allow_idle(c); */
  2021. clk_enable(os->_clk);
  2022. }
  2023. }
  2024. return;
  2025. }
  2026. /**
  2027. * _setup_reset - reset an IP block during the setup process
  2028. * @oh: struct omap_hwmod *
  2029. *
  2030. * Reset the IP block corresponding to the hwmod @oh during the setup
  2031. * process. The IP block is first enabled so it can be successfully
  2032. * reset. Returns 0 upon success or a negative error code upon
  2033. * failure.
  2034. */
  2035. static int __init _setup_reset(struct omap_hwmod *oh)
  2036. {
  2037. int r;
  2038. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2039. return -EINVAL;
  2040. if (oh->flags & HWMOD_EXT_OPT_MAIN_CLK)
  2041. return -EPERM;
  2042. if (oh->rst_lines_cnt == 0) {
  2043. r = _enable(oh);
  2044. if (r) {
  2045. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  2046. oh->name, oh->_state);
  2047. return -EINVAL;
  2048. }
  2049. }
  2050. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  2051. r = _reset(oh);
  2052. return r;
  2053. }
  2054. /**
  2055. * _setup_postsetup - transition to the appropriate state after _setup
  2056. * @oh: struct omap_hwmod *
  2057. *
  2058. * Place an IP block represented by @oh into a "post-setup" state --
  2059. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  2060. * this function is called at the end of _setup().) The postsetup
  2061. * state for an IP block can be changed by calling
  2062. * omap_hwmod_enter_postsetup_state() early in the boot process,
  2063. * before one of the omap_hwmod_setup*() functions are called for the
  2064. * IP block.
  2065. *
  2066. * The IP block stays in this state until a PM runtime-based driver is
  2067. * loaded for that IP block. A post-setup state of IDLE is
  2068. * appropriate for almost all IP blocks with runtime PM-enabled
  2069. * drivers, since those drivers are able to enable the IP block. A
  2070. * post-setup state of ENABLED is appropriate for kernels with PM
  2071. * runtime disabled. The DISABLED state is appropriate for unusual IP
  2072. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  2073. * included, since the WDTIMER starts running on reset and will reset
  2074. * the MPU if left active.
  2075. *
  2076. * This post-setup mechanism is deprecated. Once all of the OMAP
  2077. * drivers have been converted to use PM runtime, and all of the IP
  2078. * block data and interconnect data is available to the hwmod code, it
  2079. * should be possible to replace this mechanism with a "lazy reset"
  2080. * arrangement. In a "lazy reset" setup, each IP block is enabled
  2081. * when the driver first probes, then all remaining IP blocks without
  2082. * drivers are either shut down or enabled after the drivers have
  2083. * loaded. However, this cannot take place until the above
  2084. * preconditions have been met, since otherwise the late reset code
  2085. * has no way of knowing which IP blocks are in use by drivers, and
  2086. * which ones are unused.
  2087. *
  2088. * No return value.
  2089. */
  2090. static void __init _setup_postsetup(struct omap_hwmod *oh)
  2091. {
  2092. u8 postsetup_state;
  2093. if (oh->rst_lines_cnt > 0)
  2094. return;
  2095. postsetup_state = oh->_postsetup_state;
  2096. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  2097. postsetup_state = _HWMOD_STATE_ENABLED;
  2098. /*
  2099. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  2100. * it should be set by the core code as a runtime flag during startup
  2101. */
  2102. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  2103. (postsetup_state == _HWMOD_STATE_IDLE)) {
  2104. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  2105. postsetup_state = _HWMOD_STATE_ENABLED;
  2106. }
  2107. if (postsetup_state == _HWMOD_STATE_IDLE)
  2108. _idle(oh);
  2109. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  2110. _shutdown(oh);
  2111. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  2112. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  2113. oh->name, postsetup_state);
  2114. return;
  2115. }
  2116. /**
  2117. * _setup - prepare IP block hardware for use
  2118. * @oh: struct omap_hwmod *
  2119. * @n: (unused, pass NULL)
  2120. *
  2121. * Configure the IP block represented by @oh. This may include
  2122. * enabling the IP block, resetting it, and placing it into a
  2123. * post-setup state, depending on the type of IP block and applicable
  2124. * flags. IP blocks are reset to prevent any previous configuration
  2125. * by the bootloader or previous operating system from interfering
  2126. * with power management or other parts of the system. The reset can
  2127. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  2128. * two phases for hwmod initialization. Code called here generally
  2129. * affects the IP block hardware, or system integration hardware
  2130. * associated with the IP block. Returns 0.
  2131. */
  2132. static int __init _setup(struct omap_hwmod *oh, void *data)
  2133. {
  2134. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  2135. return 0;
  2136. _setup_iclk_autoidle(oh);
  2137. if (!_setup_reset(oh))
  2138. _setup_postsetup(oh);
  2139. return 0;
  2140. }
  2141. /**
  2142. * _register - register a struct omap_hwmod
  2143. * @oh: struct omap_hwmod *
  2144. *
  2145. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  2146. * already has been registered by the same name; -EINVAL if the
  2147. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  2148. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  2149. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  2150. * success.
  2151. *
  2152. * XXX The data should be copied into bootmem, so the original data
  2153. * should be marked __initdata and freed after init. This would allow
  2154. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  2155. * that the copy process would be relatively complex due to the large number
  2156. * of substructures.
  2157. */
  2158. static int __init _register(struct omap_hwmod *oh)
  2159. {
  2160. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  2161. (oh->_state != _HWMOD_STATE_UNKNOWN))
  2162. return -EINVAL;
  2163. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  2164. if (_lookup(oh->name))
  2165. return -EEXIST;
  2166. list_add_tail(&oh->node, &omap_hwmod_list);
  2167. INIT_LIST_HEAD(&oh->master_ports);
  2168. INIT_LIST_HEAD(&oh->slave_ports);
  2169. spin_lock_init(&oh->_lock);
  2170. oh->_state = _HWMOD_STATE_REGISTERED;
  2171. /*
  2172. * XXX Rather than doing a strcmp(), this should test a flag
  2173. * set in the hwmod data, inserted by the autogenerator code.
  2174. */
  2175. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  2176. mpu_oh = oh;
  2177. return 0;
  2178. }
  2179. /**
  2180. * _alloc_links - return allocated memory for hwmod links
  2181. * @ml: pointer to a struct omap_hwmod_link * for the master link
  2182. * @sl: pointer to a struct omap_hwmod_link * for the slave link
  2183. *
  2184. * Return pointers to two struct omap_hwmod_link records, via the
  2185. * addresses pointed to by @ml and @sl. Will first attempt to return
  2186. * memory allocated as part of a large initial block, but if that has
  2187. * been exhausted, will allocate memory itself. Since ideally this
  2188. * second allocation path will never occur, the number of these
  2189. * 'supplemental' allocations will be logged when debugging is
  2190. * enabled. Returns 0.
  2191. */
  2192. static int __init _alloc_links(struct omap_hwmod_link **ml,
  2193. struct omap_hwmod_link **sl)
  2194. {
  2195. unsigned int sz;
  2196. if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
  2197. *ml = &linkspace[free_ls++];
  2198. *sl = &linkspace[free_ls++];
  2199. return 0;
  2200. }
  2201. sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
  2202. *sl = NULL;
  2203. *ml = alloc_bootmem(sz);
  2204. memset(*ml, 0, sz);
  2205. *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
  2206. ls_supp++;
  2207. pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
  2208. ls_supp * LINKS_PER_OCP_IF);
  2209. return 0;
  2210. };
  2211. /**
  2212. * _add_link - add an interconnect between two IP blocks
  2213. * @oi: pointer to a struct omap_hwmod_ocp_if record
  2214. *
  2215. * Add struct omap_hwmod_link records connecting the master IP block
  2216. * specified in @oi->master to @oi, and connecting the slave IP block
  2217. * specified in @oi->slave to @oi. This code is assumed to run before
  2218. * preemption or SMP has been enabled, thus avoiding the need for
  2219. * locking in this code. Changes to this assumption will require
  2220. * additional locking. Returns 0.
  2221. */
  2222. static int __init _add_link(struct omap_hwmod_ocp_if *oi)
  2223. {
  2224. struct omap_hwmod_link *ml, *sl;
  2225. pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
  2226. oi->slave->name);
  2227. _alloc_links(&ml, &sl);
  2228. ml->ocp_if = oi;
  2229. INIT_LIST_HEAD(&ml->node);
  2230. list_add(&ml->node, &oi->master->master_ports);
  2231. oi->master->masters_cnt++;
  2232. sl->ocp_if = oi;
  2233. INIT_LIST_HEAD(&sl->node);
  2234. list_add(&sl->node, &oi->slave->slave_ports);
  2235. oi->slave->slaves_cnt++;
  2236. return 0;
  2237. }
  2238. /**
  2239. * _register_link - register a struct omap_hwmod_ocp_if
  2240. * @oi: struct omap_hwmod_ocp_if *
  2241. *
  2242. * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
  2243. * has already been registered; -EINVAL if @oi is NULL or if the
  2244. * record pointed to by @oi is missing required fields; or 0 upon
  2245. * success.
  2246. *
  2247. * XXX The data should be copied into bootmem, so the original data
  2248. * should be marked __initdata and freed after init. This would allow
  2249. * unneeded omap_hwmods to be freed on multi-OMAP configurations.
  2250. */
  2251. static int __init _register_link(struct omap_hwmod_ocp_if *oi)
  2252. {
  2253. if (!oi || !oi->master || !oi->slave || !oi->user)
  2254. return -EINVAL;
  2255. if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
  2256. return -EEXIST;
  2257. pr_debug("omap_hwmod: registering link from %s to %s\n",
  2258. oi->master->name, oi->slave->name);
  2259. /*
  2260. * Register the connected hwmods, if they haven't been
  2261. * registered already
  2262. */
  2263. if (oi->master->_state != _HWMOD_STATE_REGISTERED)
  2264. _register(oi->master);
  2265. if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
  2266. _register(oi->slave);
  2267. _add_link(oi);
  2268. oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
  2269. return 0;
  2270. }
  2271. /**
  2272. * _alloc_linkspace - allocate large block of hwmod links
  2273. * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
  2274. *
  2275. * Allocate a large block of struct omap_hwmod_link records. This
  2276. * improves boot time significantly by avoiding the need to allocate
  2277. * individual records one by one. If the number of records to
  2278. * allocate in the block hasn't been manually specified, this function
  2279. * will count the number of struct omap_hwmod_ocp_if records in @ois
  2280. * and use that to determine the allocation size. For SoC families
  2281. * that require multiple list registrations, such as OMAP3xxx, this
  2282. * estimation process isn't optimal, so manual estimation is advised
  2283. * in those cases. Returns -EEXIST if the allocation has already occurred
  2284. * or 0 upon success.
  2285. */
  2286. static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  2287. {
  2288. unsigned int i = 0;
  2289. unsigned int sz;
  2290. if (linkspace) {
  2291. WARN(1, "linkspace already allocated\n");
  2292. return -EEXIST;
  2293. }
  2294. if (max_ls == 0)
  2295. while (ois[i++])
  2296. max_ls += LINKS_PER_OCP_IF;
  2297. sz = sizeof(struct omap_hwmod_link) * max_ls;
  2298. pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
  2299. __func__, sz, max_ls);
  2300. linkspace = alloc_bootmem(sz);
  2301. memset(linkspace, 0, sz);
  2302. return 0;
  2303. }
  2304. /* Static functions intended only for use in soc_ops field function pointers */
  2305. /**
  2306. * _omap2xxx_wait_target_ready - wait for a module to leave slave idle
  2307. * @oh: struct omap_hwmod *
  2308. *
  2309. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2310. * does not have an IDLEST bit or if the module successfully leaves
  2311. * slave idle; otherwise, pass along the return value of the
  2312. * appropriate *_cm*_wait_module_ready() function.
  2313. */
  2314. static int _omap2xxx_wait_target_ready(struct omap_hwmod *oh)
  2315. {
  2316. if (!oh)
  2317. return -EINVAL;
  2318. if (oh->flags & HWMOD_NO_IDLEST)
  2319. return 0;
  2320. if (!_find_mpu_rt_port(oh))
  2321. return 0;
  2322. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2323. return omap2xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2324. oh->prcm.omap2.idlest_reg_id,
  2325. oh->prcm.omap2.idlest_idle_bit);
  2326. }
  2327. /**
  2328. * _omap3xxx_wait_target_ready - wait for a module to leave slave idle
  2329. * @oh: struct omap_hwmod *
  2330. *
  2331. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2332. * does not have an IDLEST bit or if the module successfully leaves
  2333. * slave idle; otherwise, pass along the return value of the
  2334. * appropriate *_cm*_wait_module_ready() function.
  2335. */
  2336. static int _omap3xxx_wait_target_ready(struct omap_hwmod *oh)
  2337. {
  2338. if (!oh)
  2339. return -EINVAL;
  2340. if (oh->flags & HWMOD_NO_IDLEST)
  2341. return 0;
  2342. if (!_find_mpu_rt_port(oh))
  2343. return 0;
  2344. /* XXX check module SIDLEMODE, hardreset status, enabled clocks */
  2345. return omap3xxx_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  2346. oh->prcm.omap2.idlest_reg_id,
  2347. oh->prcm.omap2.idlest_idle_bit);
  2348. }
  2349. /**
  2350. * _omap4_wait_target_ready - wait for a module to leave slave idle
  2351. * @oh: struct omap_hwmod *
  2352. *
  2353. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2354. * does not have an IDLEST bit or if the module successfully leaves
  2355. * slave idle; otherwise, pass along the return value of the
  2356. * appropriate *_cm*_wait_module_ready() function.
  2357. */
  2358. static int _omap4_wait_target_ready(struct omap_hwmod *oh)
  2359. {
  2360. if (!oh)
  2361. return -EINVAL;
  2362. if (oh->flags & HWMOD_NO_IDLEST || !oh->clkdm)
  2363. return 0;
  2364. if (!_find_mpu_rt_port(oh))
  2365. return 0;
  2366. /* XXX check module SIDLEMODE, hardreset status */
  2367. return omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  2368. oh->clkdm->cm_inst,
  2369. oh->clkdm->clkdm_offs,
  2370. oh->prcm.omap4.clkctrl_offs);
  2371. }
  2372. /**
  2373. * _am33xx_wait_target_ready - wait for a module to leave slave idle
  2374. * @oh: struct omap_hwmod *
  2375. *
  2376. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  2377. * does not have an IDLEST bit or if the module successfully leaves
  2378. * slave idle; otherwise, pass along the return value of the
  2379. * appropriate *_cm*_wait_module_ready() function.
  2380. */
  2381. static int _am33xx_wait_target_ready(struct omap_hwmod *oh)
  2382. {
  2383. if (!oh || !oh->clkdm)
  2384. return -EINVAL;
  2385. if (oh->flags & HWMOD_NO_IDLEST)
  2386. return 0;
  2387. if (!_find_mpu_rt_port(oh))
  2388. return 0;
  2389. /* XXX check module SIDLEMODE, hardreset status */
  2390. return am33xx_cm_wait_module_ready(oh->clkdm->cm_inst,
  2391. oh->clkdm->clkdm_offs,
  2392. oh->prcm.omap4.clkctrl_offs);
  2393. }
  2394. /**
  2395. * _omap2_assert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2396. * @oh: struct omap_hwmod * to assert hardreset
  2397. * @ohri: hardreset line data
  2398. *
  2399. * Call omap2_prm_assert_hardreset() with parameters extracted from
  2400. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2401. * use as an soc_ops function pointer. Passes along the return value
  2402. * from omap2_prm_assert_hardreset(). XXX This function is scheduled
  2403. * for removal when the PRM code is moved into drivers/.
  2404. */
  2405. static int _omap2_assert_hardreset(struct omap_hwmod *oh,
  2406. struct omap_hwmod_rst_info *ohri)
  2407. {
  2408. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  2409. ohri->rst_shift);
  2410. }
  2411. /**
  2412. * _omap2_deassert_hardreset - call OMAP2 PRM hardreset fn with hwmod args
  2413. * @oh: struct omap_hwmod * to deassert hardreset
  2414. * @ohri: hardreset line data
  2415. *
  2416. * Call omap2_prm_deassert_hardreset() with parameters extracted from
  2417. * the hwmod @oh and the hardreset line data @ohri. Only intended for
  2418. * use as an soc_ops function pointer. Passes along the return value
  2419. * from omap2_prm_deassert_hardreset(). XXX This function is
  2420. * scheduled for removal when the PRM code is moved into drivers/.
  2421. */
  2422. static int _omap2_deassert_hardreset(struct omap_hwmod *oh,
  2423. struct omap_hwmod_rst_info *ohri)
  2424. {
  2425. return omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  2426. ohri->rst_shift,
  2427. ohri->st_shift);
  2428. }
  2429. /**
  2430. * _omap2_is_hardreset_asserted - call OMAP2 PRM hardreset fn with hwmod args
  2431. * @oh: struct omap_hwmod * to test hardreset
  2432. * @ohri: hardreset line data
  2433. *
  2434. * Call omap2_prm_is_hardreset_asserted() with parameters extracted
  2435. * from the hwmod @oh and the hardreset line data @ohri. Only
  2436. * intended for use as an soc_ops function pointer. Passes along the
  2437. * return value from omap2_prm_is_hardreset_asserted(). XXX This
  2438. * function is scheduled for removal when the PRM code is moved into
  2439. * drivers/.
  2440. */
  2441. static int _omap2_is_hardreset_asserted(struct omap_hwmod *oh,
  2442. struct omap_hwmod_rst_info *ohri)
  2443. {
  2444. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  2445. ohri->st_shift);
  2446. }
  2447. /**
  2448. * _omap4_assert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2449. * @oh: struct omap_hwmod * to assert hardreset
  2450. * @ohri: hardreset line data
  2451. *
  2452. * Call omap4_prminst_assert_hardreset() with parameters extracted
  2453. * from the hwmod @oh and the hardreset line data @ohri. Only
  2454. * intended for use as an soc_ops function pointer. Passes along the
  2455. * return value from omap4_prminst_assert_hardreset(). XXX This
  2456. * function is scheduled for removal when the PRM code is moved into
  2457. * drivers/.
  2458. */
  2459. static int _omap4_assert_hardreset(struct omap_hwmod *oh,
  2460. struct omap_hwmod_rst_info *ohri)
  2461. {
  2462. if (!oh->clkdm)
  2463. return -EINVAL;
  2464. return omap4_prminst_assert_hardreset(ohri->rst_shift,
  2465. oh->clkdm->pwrdm.ptr->prcm_partition,
  2466. oh->clkdm->pwrdm.ptr->prcm_offs,
  2467. oh->prcm.omap4.rstctrl_offs);
  2468. }
  2469. /**
  2470. * _omap4_deassert_hardreset - call OMAP4 PRM hardreset fn with hwmod args
  2471. * @oh: struct omap_hwmod * to deassert hardreset
  2472. * @ohri: hardreset line data
  2473. *
  2474. * Call omap4_prminst_deassert_hardreset() with parameters extracted
  2475. * from the hwmod @oh and the hardreset line data @ohri. Only
  2476. * intended for use as an soc_ops function pointer. Passes along the
  2477. * return value from omap4_prminst_deassert_hardreset(). XXX This
  2478. * function is scheduled for removal when the PRM code is moved into
  2479. * drivers/.
  2480. */
  2481. static int _omap4_deassert_hardreset(struct omap_hwmod *oh,
  2482. struct omap_hwmod_rst_info *ohri)
  2483. {
  2484. if (!oh->clkdm)
  2485. return -EINVAL;
  2486. if (ohri->st_shift)
  2487. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  2488. oh->name, ohri->name);
  2489. return omap4_prminst_deassert_hardreset(ohri->rst_shift,
  2490. oh->clkdm->pwrdm.ptr->prcm_partition,
  2491. oh->clkdm->pwrdm.ptr->prcm_offs,
  2492. oh->prcm.omap4.rstctrl_offs);
  2493. }
  2494. /**
  2495. * _omap4_is_hardreset_asserted - call OMAP4 PRM hardreset fn with hwmod args
  2496. * @oh: struct omap_hwmod * to test hardreset
  2497. * @ohri: hardreset line data
  2498. *
  2499. * Call omap4_prminst_is_hardreset_asserted() with parameters
  2500. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2501. * Only intended for use as an soc_ops function pointer. Passes along
  2502. * the return value from omap4_prminst_is_hardreset_asserted(). XXX
  2503. * This function is scheduled for removal when the PRM code is moved
  2504. * into drivers/.
  2505. */
  2506. static int _omap4_is_hardreset_asserted(struct omap_hwmod *oh,
  2507. struct omap_hwmod_rst_info *ohri)
  2508. {
  2509. if (!oh->clkdm)
  2510. return -EINVAL;
  2511. return omap4_prminst_is_hardreset_asserted(ohri->rst_shift,
  2512. oh->clkdm->pwrdm.ptr->prcm_partition,
  2513. oh->clkdm->pwrdm.ptr->prcm_offs,
  2514. oh->prcm.omap4.rstctrl_offs);
  2515. }
  2516. /**
  2517. * _am33xx_assert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2518. * @oh: struct omap_hwmod * to assert hardreset
  2519. * @ohri: hardreset line data
  2520. *
  2521. * Call am33xx_prminst_assert_hardreset() with parameters extracted
  2522. * from the hwmod @oh and the hardreset line data @ohri. Only
  2523. * intended for use as an soc_ops function pointer. Passes along the
  2524. * return value from am33xx_prminst_assert_hardreset(). XXX This
  2525. * function is scheduled for removal when the PRM code is moved into
  2526. * drivers/.
  2527. */
  2528. static int _am33xx_assert_hardreset(struct omap_hwmod *oh,
  2529. struct omap_hwmod_rst_info *ohri)
  2530. {
  2531. return am33xx_prm_assert_hardreset(ohri->rst_shift,
  2532. oh->clkdm->pwrdm.ptr->prcm_offs,
  2533. oh->prcm.omap4.rstctrl_offs);
  2534. }
  2535. /**
  2536. * _am33xx_deassert_hardreset - call AM33XX PRM hardreset fn with hwmod args
  2537. * @oh: struct omap_hwmod * to deassert hardreset
  2538. * @ohri: hardreset line data
  2539. *
  2540. * Call am33xx_prminst_deassert_hardreset() with parameters extracted
  2541. * from the hwmod @oh and the hardreset line data @ohri. Only
  2542. * intended for use as an soc_ops function pointer. Passes along the
  2543. * return value from am33xx_prminst_deassert_hardreset(). XXX This
  2544. * function is scheduled for removal when the PRM code is moved into
  2545. * drivers/.
  2546. */
  2547. static int _am33xx_deassert_hardreset(struct omap_hwmod *oh,
  2548. struct omap_hwmod_rst_info *ohri)
  2549. {
  2550. if (ohri->st_shift)
  2551. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  2552. oh->name, ohri->name);
  2553. return am33xx_prm_deassert_hardreset(ohri->rst_shift,
  2554. oh->clkdm->pwrdm.ptr->prcm_offs,
  2555. oh->prcm.omap4.rstctrl_offs,
  2556. oh->prcm.omap4.rstst_offs);
  2557. }
  2558. /**
  2559. * _am33xx_is_hardreset_asserted - call AM33XX PRM hardreset fn with hwmod args
  2560. * @oh: struct omap_hwmod * to test hardreset
  2561. * @ohri: hardreset line data
  2562. *
  2563. * Call am33xx_prminst_is_hardreset_asserted() with parameters
  2564. * extracted from the hwmod @oh and the hardreset line data @ohri.
  2565. * Only intended for use as an soc_ops function pointer. Passes along
  2566. * the return value from am33xx_prminst_is_hardreset_asserted(). XXX
  2567. * This function is scheduled for removal when the PRM code is moved
  2568. * into drivers/.
  2569. */
  2570. static int _am33xx_is_hardreset_asserted(struct omap_hwmod *oh,
  2571. struct omap_hwmod_rst_info *ohri)
  2572. {
  2573. return am33xx_prm_is_hardreset_asserted(ohri->rst_shift,
  2574. oh->clkdm->pwrdm.ptr->prcm_offs,
  2575. oh->prcm.omap4.rstctrl_offs);
  2576. }
  2577. /* Public functions */
  2578. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  2579. {
  2580. if (oh->flags & HWMOD_16BIT_REG)
  2581. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  2582. else
  2583. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  2584. }
  2585. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  2586. {
  2587. if (oh->flags & HWMOD_16BIT_REG)
  2588. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  2589. else
  2590. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  2591. }
  2592. /**
  2593. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  2594. * @oh: struct omap_hwmod *
  2595. *
  2596. * This is a public function exposed to drivers. Some drivers may need to do
  2597. * some settings before and after resetting the device. Those drivers after
  2598. * doing the necessary settings could use this function to start a reset by
  2599. * setting the SYSCONFIG.SOFTRESET bit.
  2600. */
  2601. int omap_hwmod_softreset(struct omap_hwmod *oh)
  2602. {
  2603. u32 v;
  2604. int ret;
  2605. if (!oh || !(oh->_sysc_cache))
  2606. return -EINVAL;
  2607. v = oh->_sysc_cache;
  2608. ret = _set_softreset(oh, &v);
  2609. if (ret)
  2610. goto error;
  2611. _write_sysconfig(v, oh);
  2612. error:
  2613. return ret;
  2614. }
  2615. /**
  2616. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  2617. * @oh: struct omap_hwmod *
  2618. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  2619. *
  2620. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  2621. * local copy. Intended to be used by drivers that have some erratum
  2622. * that requires direct manipulation of the SIDLEMODE bits. Returns
  2623. * -EINVAL if @oh is null, or passes along the return value from
  2624. * _set_slave_idlemode().
  2625. *
  2626. * XXX Does this function have any current users? If not, we should
  2627. * remove it; it is better to let the rest of the hwmod code handle this.
  2628. * Any users of this function should be scrutinized carefully.
  2629. */
  2630. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  2631. {
  2632. u32 v;
  2633. int retval = 0;
  2634. if (!oh)
  2635. return -EINVAL;
  2636. v = oh->_sysc_cache;
  2637. retval = _set_slave_idlemode(oh, idlemode, &v);
  2638. if (!retval)
  2639. _write_sysconfig(v, oh);
  2640. return retval;
  2641. }
  2642. /**
  2643. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  2644. * @name: name of the omap_hwmod to look up
  2645. *
  2646. * Given a @name of an omap_hwmod, return a pointer to the registered
  2647. * struct omap_hwmod *, or NULL upon error.
  2648. */
  2649. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  2650. {
  2651. struct omap_hwmod *oh;
  2652. if (!name)
  2653. return NULL;
  2654. oh = _lookup(name);
  2655. return oh;
  2656. }
  2657. /**
  2658. * omap_hwmod_for_each - call function for each registered omap_hwmod
  2659. * @fn: pointer to a callback function
  2660. * @data: void * data to pass to callback function
  2661. *
  2662. * Call @fn for each registered omap_hwmod, passing @data to each
  2663. * function. @fn must return 0 for success or any other value for
  2664. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  2665. * will stop and the non-zero return value will be passed to the
  2666. * caller of omap_hwmod_for_each(). @fn is called with
  2667. * omap_hwmod_for_each() held.
  2668. */
  2669. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  2670. void *data)
  2671. {
  2672. struct omap_hwmod *temp_oh;
  2673. int ret = 0;
  2674. if (!fn)
  2675. return -EINVAL;
  2676. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2677. ret = (*fn)(temp_oh, data);
  2678. if (ret)
  2679. break;
  2680. }
  2681. return ret;
  2682. }
  2683. /**
  2684. * omap_hwmod_register_links - register an array of hwmod links
  2685. * @ois: pointer to an array of omap_hwmod_ocp_if to register
  2686. *
  2687. * Intended to be called early in boot before the clock framework is
  2688. * initialized. If @ois is not null, will register all omap_hwmods
  2689. * listed in @ois that are valid for this chip. Returns -EINVAL if
  2690. * omap_hwmod_init() hasn't been called before calling this function,
  2691. * -ENOMEM if the link memory area can't be allocated, or 0 upon
  2692. * success.
  2693. */
  2694. int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
  2695. {
  2696. int r, i;
  2697. if (!inited)
  2698. return -EINVAL;
  2699. if (!ois)
  2700. return 0;
  2701. if (!linkspace) {
  2702. if (_alloc_linkspace(ois)) {
  2703. pr_err("omap_hwmod: could not allocate link space\n");
  2704. return -ENOMEM;
  2705. }
  2706. }
  2707. i = 0;
  2708. do {
  2709. r = _register_link(ois[i]);
  2710. WARN(r && r != -EEXIST,
  2711. "omap_hwmod: _register_link(%s -> %s) returned %d\n",
  2712. ois[i]->master->name, ois[i]->slave->name, r);
  2713. } while (ois[++i]);
  2714. return 0;
  2715. }
  2716. /**
  2717. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2718. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2719. *
  2720. * If the hwmod data corresponding to the MPU subsystem IP block
  2721. * hasn't been initialized and set up yet, do so now. This must be
  2722. * done first since sleep dependencies may be added from other hwmods
  2723. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2724. * return value.
  2725. */
  2726. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2727. {
  2728. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2729. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2730. __func__, MPU_INITIATOR_NAME);
  2731. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2732. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2733. }
  2734. /**
  2735. * omap_hwmod_setup_one - set up a single hwmod
  2736. * @oh_name: const char * name of the already-registered hwmod to set up
  2737. *
  2738. * Initialize and set up a single hwmod. Intended to be used for a
  2739. * small number of early devices, such as the timer IP blocks used for
  2740. * the scheduler clock. Must be called after omap2_clk_init().
  2741. * Resolves the struct clk names to struct clk pointers for each
  2742. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2743. * -EINVAL upon error or 0 upon success.
  2744. */
  2745. int __init omap_hwmod_setup_one(const char *oh_name)
  2746. {
  2747. struct omap_hwmod *oh;
  2748. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2749. oh = _lookup(oh_name);
  2750. if (!oh) {
  2751. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2752. return -EINVAL;
  2753. }
  2754. _ensure_mpu_hwmod_is_setup(oh);
  2755. _init(oh, NULL);
  2756. _setup(oh, NULL);
  2757. return 0;
  2758. }
  2759. /**
  2760. * omap_hwmod_setup_all - set up all registered IP blocks
  2761. *
  2762. * Initialize and set up all IP blocks registered with the hwmod code.
  2763. * Must be called after omap2_clk_init(). Resolves the struct clk
  2764. * names to struct clk pointers for each registered omap_hwmod. Also
  2765. * calls _setup() on each hwmod. Returns 0 upon success.
  2766. */
  2767. static int __init omap_hwmod_setup_all(void)
  2768. {
  2769. _ensure_mpu_hwmod_is_setup(NULL);
  2770. omap_hwmod_for_each(_init, NULL);
  2771. omap_hwmod_for_each(_setup, NULL);
  2772. return 0;
  2773. }
  2774. core_initcall(omap_hwmod_setup_all);
  2775. /**
  2776. * omap_hwmod_enable - enable an omap_hwmod
  2777. * @oh: struct omap_hwmod *
  2778. *
  2779. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2780. * Returns -EINVAL on error or passes along the return value from _enable().
  2781. */
  2782. int omap_hwmod_enable(struct omap_hwmod *oh)
  2783. {
  2784. int r;
  2785. unsigned long flags;
  2786. if (!oh)
  2787. return -EINVAL;
  2788. spin_lock_irqsave(&oh->_lock, flags);
  2789. r = _enable(oh);
  2790. spin_unlock_irqrestore(&oh->_lock, flags);
  2791. return r;
  2792. }
  2793. /**
  2794. * omap_hwmod_idle - idle an omap_hwmod
  2795. * @oh: struct omap_hwmod *
  2796. *
  2797. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2798. * Returns -EINVAL on error or passes along the return value from _idle().
  2799. */
  2800. int omap_hwmod_idle(struct omap_hwmod *oh)
  2801. {
  2802. unsigned long flags;
  2803. if (!oh)
  2804. return -EINVAL;
  2805. spin_lock_irqsave(&oh->_lock, flags);
  2806. _idle(oh);
  2807. spin_unlock_irqrestore(&oh->_lock, flags);
  2808. return 0;
  2809. }
  2810. /**
  2811. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2812. * @oh: struct omap_hwmod *
  2813. *
  2814. * Shutdown an omap_hwmod @oh. Intended to be called by
  2815. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2816. * the return value from _shutdown().
  2817. */
  2818. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2819. {
  2820. unsigned long flags;
  2821. if (!oh)
  2822. return -EINVAL;
  2823. spin_lock_irqsave(&oh->_lock, flags);
  2824. _shutdown(oh);
  2825. spin_unlock_irqrestore(&oh->_lock, flags);
  2826. return 0;
  2827. }
  2828. /**
  2829. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  2830. * @oh: struct omap_hwmod *oh
  2831. *
  2832. * Intended to be called by the omap_device code.
  2833. */
  2834. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  2835. {
  2836. unsigned long flags;
  2837. spin_lock_irqsave(&oh->_lock, flags);
  2838. _enable_clocks(oh);
  2839. spin_unlock_irqrestore(&oh->_lock, flags);
  2840. return 0;
  2841. }
  2842. /**
  2843. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2844. * @oh: struct omap_hwmod *oh
  2845. *
  2846. * Intended to be called by the omap_device code.
  2847. */
  2848. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2849. {
  2850. unsigned long flags;
  2851. spin_lock_irqsave(&oh->_lock, flags);
  2852. _disable_clocks(oh);
  2853. spin_unlock_irqrestore(&oh->_lock, flags);
  2854. return 0;
  2855. }
  2856. /**
  2857. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2858. * @oh: struct omap_hwmod *oh
  2859. *
  2860. * Intended to be called by drivers and core code when all posted
  2861. * writes to a device must complete before continuing further
  2862. * execution (for example, after clearing some device IRQSTATUS
  2863. * register bits)
  2864. *
  2865. * XXX what about targets with multiple OCP threads?
  2866. */
  2867. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2868. {
  2869. BUG_ON(!oh);
  2870. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2871. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2872. oh->name);
  2873. return;
  2874. }
  2875. /*
  2876. * Forces posted writes to complete on the OCP thread handling
  2877. * register writes
  2878. */
  2879. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2880. }
  2881. /**
  2882. * omap_hwmod_reset - reset the hwmod
  2883. * @oh: struct omap_hwmod *
  2884. *
  2885. * Under some conditions, a driver may wish to reset the entire device.
  2886. * Called from omap_device code. Returns -EINVAL on error or passes along
  2887. * the return value from _reset().
  2888. */
  2889. int omap_hwmod_reset(struct omap_hwmod *oh)
  2890. {
  2891. int r;
  2892. unsigned long flags;
  2893. if (!oh)
  2894. return -EINVAL;
  2895. spin_lock_irqsave(&oh->_lock, flags);
  2896. r = _reset(oh);
  2897. spin_unlock_irqrestore(&oh->_lock, flags);
  2898. return r;
  2899. }
  2900. /*
  2901. * IP block data retrieval functions
  2902. */
  2903. /**
  2904. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2905. * @oh: struct omap_hwmod *
  2906. * @res: pointer to the first element of an array of struct resource to fill
  2907. *
  2908. * Count the number of struct resource array elements necessary to
  2909. * contain omap_hwmod @oh resources. Intended to be called by code
  2910. * that registers omap_devices. Intended to be used to determine the
  2911. * size of a dynamically-allocated struct resource array, before
  2912. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2913. * resource array elements needed.
  2914. *
  2915. * XXX This code is not optimized. It could attempt to merge adjacent
  2916. * resource IDs.
  2917. *
  2918. */
  2919. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  2920. {
  2921. struct omap_hwmod_ocp_if *os;
  2922. struct list_head *p;
  2923. int ret;
  2924. int i = 0;
  2925. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  2926. p = oh->slave_ports.next;
  2927. while (i < oh->slaves_cnt) {
  2928. os = _fetch_next_ocp_if(&p, &i);
  2929. ret += _count_ocp_if_addr_spaces(os);
  2930. }
  2931. return ret;
  2932. }
  2933. /**
  2934. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2935. * @oh: struct omap_hwmod *
  2936. * @res: pointer to the first element of an array of struct resource to fill
  2937. *
  2938. * Fill the struct resource array @res with resource data from the
  2939. * omap_hwmod @oh. Intended to be called by code that registers
  2940. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2941. * number of array elements filled.
  2942. */
  2943. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  2944. {
  2945. struct omap_hwmod_ocp_if *os;
  2946. struct list_head *p;
  2947. int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
  2948. int r = 0;
  2949. /* For each IRQ, DMA, memory area, fill in array.*/
  2950. mpu_irqs_cnt = _count_mpu_irqs(oh);
  2951. for (i = 0; i < mpu_irqs_cnt; i++) {
  2952. (res + r)->name = (oh->mpu_irqs + i)->name;
  2953. (res + r)->start = (oh->mpu_irqs + i)->irq;
  2954. (res + r)->end = (oh->mpu_irqs + i)->irq;
  2955. (res + r)->flags = IORESOURCE_IRQ;
  2956. r++;
  2957. }
  2958. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2959. for (i = 0; i < sdma_reqs_cnt; i++) {
  2960. (res + r)->name = (oh->sdma_reqs + i)->name;
  2961. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2962. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  2963. (res + r)->flags = IORESOURCE_DMA;
  2964. r++;
  2965. }
  2966. p = oh->slave_ports.next;
  2967. i = 0;
  2968. while (i < oh->slaves_cnt) {
  2969. os = _fetch_next_ocp_if(&p, &i);
  2970. addr_cnt = _count_ocp_if_addr_spaces(os);
  2971. for (j = 0; j < addr_cnt; j++) {
  2972. (res + r)->name = (os->addr + j)->name;
  2973. (res + r)->start = (os->addr + j)->pa_start;
  2974. (res + r)->end = (os->addr + j)->pa_end;
  2975. (res + r)->flags = IORESOURCE_MEM;
  2976. r++;
  2977. }
  2978. }
  2979. return r;
  2980. }
  2981. /**
  2982. * omap_hwmod_fill_dma_resources - fill struct resource array with dma data
  2983. * @oh: struct omap_hwmod *
  2984. * @res: pointer to the array of struct resource to fill
  2985. *
  2986. * Fill the struct resource array @res with dma resource data from the
  2987. * omap_hwmod @oh. Intended to be called by code that registers
  2988. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2989. * number of array elements filled.
  2990. */
  2991. int omap_hwmod_fill_dma_resources(struct omap_hwmod *oh, struct resource *res)
  2992. {
  2993. int i, sdma_reqs_cnt;
  2994. int r = 0;
  2995. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2996. for (i = 0; i < sdma_reqs_cnt; i++) {
  2997. (res + r)->name = (oh->sdma_reqs + i)->name;
  2998. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2999. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  3000. (res + r)->flags = IORESOURCE_DMA;
  3001. r++;
  3002. }
  3003. return r;
  3004. }
  3005. /**
  3006. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  3007. * @oh: struct omap_hwmod * to operate on
  3008. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  3009. * @name: pointer to the name of the data to fetch (optional)
  3010. * @rsrc: pointer to a struct resource, allocated by the caller
  3011. *
  3012. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  3013. * data for the IP block pointed to by @oh. The data will be filled
  3014. * into a struct resource record pointed to by @rsrc. The struct
  3015. * resource must be allocated by the caller. When @name is non-null,
  3016. * the data associated with the matching entry in the IRQ/SDMA/address
  3017. * space hwmod data arrays will be returned. If @name is null, the
  3018. * first array entry will be returned. Data order is not meaningful
  3019. * in hwmod data, so callers are strongly encouraged to use a non-null
  3020. * @name whenever possible to avoid unpredictable effects if hwmod
  3021. * data is later added that causes data ordering to change. This
  3022. * function is only intended for use by OMAP core code. Device
  3023. * drivers should not call this function - the appropriate bus-related
  3024. * data accessor functions should be used instead. Returns 0 upon
  3025. * success or a negative error code upon error.
  3026. */
  3027. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  3028. const char *name, struct resource *rsrc)
  3029. {
  3030. int r;
  3031. unsigned int irq, dma;
  3032. u32 pa_start, pa_end;
  3033. if (!oh || !rsrc)
  3034. return -EINVAL;
  3035. if (type == IORESOURCE_IRQ) {
  3036. r = _get_mpu_irq_by_name(oh, name, &irq);
  3037. if (r)
  3038. return r;
  3039. rsrc->start = irq;
  3040. rsrc->end = irq;
  3041. } else if (type == IORESOURCE_DMA) {
  3042. r = _get_sdma_req_by_name(oh, name, &dma);
  3043. if (r)
  3044. return r;
  3045. rsrc->start = dma;
  3046. rsrc->end = dma;
  3047. } else if (type == IORESOURCE_MEM) {
  3048. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  3049. if (r)
  3050. return r;
  3051. rsrc->start = pa_start;
  3052. rsrc->end = pa_end;
  3053. } else {
  3054. return -EINVAL;
  3055. }
  3056. rsrc->flags = type;
  3057. rsrc->name = name;
  3058. return 0;
  3059. }
  3060. /**
  3061. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  3062. * @oh: struct omap_hwmod *
  3063. *
  3064. * Return the powerdomain pointer associated with the OMAP module
  3065. * @oh's main clock. If @oh does not have a main clk, return the
  3066. * powerdomain associated with the interface clock associated with the
  3067. * module's MPU port. (XXX Perhaps this should use the SDMA port
  3068. * instead?) Returns NULL on error, or a struct powerdomain * on
  3069. * success.
  3070. */
  3071. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  3072. {
  3073. struct clk *c;
  3074. struct omap_hwmod_ocp_if *oi;
  3075. struct clockdomain *clkdm;
  3076. struct clk_hw_omap *clk;
  3077. if (!oh)
  3078. return NULL;
  3079. if (oh->clkdm)
  3080. return oh->clkdm->pwrdm.ptr;
  3081. if (oh->_clk) {
  3082. c = oh->_clk;
  3083. } else {
  3084. oi = _find_mpu_rt_port(oh);
  3085. if (!oi)
  3086. return NULL;
  3087. c = oi->_clk;
  3088. }
  3089. clk = to_clk_hw_omap(__clk_get_hw(c));
  3090. clkdm = clk->clkdm;
  3091. if (!clkdm)
  3092. return NULL;
  3093. return clkdm->pwrdm.ptr;
  3094. }
  3095. /**
  3096. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  3097. * @oh: struct omap_hwmod *
  3098. *
  3099. * Returns the virtual address corresponding to the beginning of the
  3100. * module's register target, in the address range that is intended to
  3101. * be used by the MPU. Returns the virtual address upon success or NULL
  3102. * upon error.
  3103. */
  3104. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  3105. {
  3106. if (!oh)
  3107. return NULL;
  3108. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  3109. return NULL;
  3110. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  3111. return NULL;
  3112. return oh->_mpu_rt_va;
  3113. }
  3114. /**
  3115. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  3116. * @oh: struct omap_hwmod *
  3117. * @init_oh: struct omap_hwmod * (initiator)
  3118. *
  3119. * Add a sleep dependency between the initiator @init_oh and @oh.
  3120. * Intended to be called by DSP/Bridge code via platform_data for the
  3121. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  3122. * code needs to add/del initiator dependencies dynamically
  3123. * before/after accessing a device. Returns the return value from
  3124. * _add_initiator_dep().
  3125. *
  3126. * XXX Keep a usecount in the clockdomain code
  3127. */
  3128. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  3129. struct omap_hwmod *init_oh)
  3130. {
  3131. return _add_initiator_dep(oh, init_oh);
  3132. }
  3133. /*
  3134. * XXX what about functions for drivers to save/restore ocp_sysconfig
  3135. * for context save/restore operations?
  3136. */
  3137. /**
  3138. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  3139. * @oh: struct omap_hwmod *
  3140. * @init_oh: struct omap_hwmod * (initiator)
  3141. *
  3142. * Remove a sleep dependency between the initiator @init_oh and @oh.
  3143. * Intended to be called by DSP/Bridge code via platform_data for the
  3144. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  3145. * code needs to add/del initiator dependencies dynamically
  3146. * before/after accessing a device. Returns the return value from
  3147. * _del_initiator_dep().
  3148. *
  3149. * XXX Keep a usecount in the clockdomain code
  3150. */
  3151. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  3152. struct omap_hwmod *init_oh)
  3153. {
  3154. return _del_initiator_dep(oh, init_oh);
  3155. }
  3156. /**
  3157. * omap_hwmod_enable_wakeup - allow device to wake up the system
  3158. * @oh: struct omap_hwmod *
  3159. *
  3160. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  3161. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  3162. * this IP block if it has dynamic mux entries. Eventually this
  3163. * should set PRCM wakeup registers to cause the PRCM to receive
  3164. * wakeup events from the module. Does not set any wakeup routing
  3165. * registers beyond this point - if the module is to wake up any other
  3166. * module or subsystem, that must be set separately. Called by
  3167. * omap_device code. Returns -EINVAL on error or 0 upon success.
  3168. */
  3169. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  3170. {
  3171. unsigned long flags;
  3172. u32 v;
  3173. spin_lock_irqsave(&oh->_lock, flags);
  3174. if (oh->class->sysc &&
  3175. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  3176. v = oh->_sysc_cache;
  3177. _enable_wakeup(oh, &v);
  3178. _write_sysconfig(v, oh);
  3179. }
  3180. _set_idle_ioring_wakeup(oh, true);
  3181. spin_unlock_irqrestore(&oh->_lock, flags);
  3182. return 0;
  3183. }
  3184. /**
  3185. * omap_hwmod_disable_wakeup - prevent device from waking the system
  3186. * @oh: struct omap_hwmod *
  3187. *
  3188. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  3189. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  3190. * events for this IP block if it has dynamic mux entries. Eventually
  3191. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  3192. * wakeup events from the module. Does not set any wakeup routing
  3193. * registers beyond this point - if the module is to wake up any other
  3194. * module or subsystem, that must be set separately. Called by
  3195. * omap_device code. Returns -EINVAL on error or 0 upon success.
  3196. */
  3197. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  3198. {
  3199. unsigned long flags;
  3200. u32 v;
  3201. spin_lock_irqsave(&oh->_lock, flags);
  3202. if (oh->class->sysc &&
  3203. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  3204. v = oh->_sysc_cache;
  3205. _disable_wakeup(oh, &v);
  3206. _write_sysconfig(v, oh);
  3207. }
  3208. _set_idle_ioring_wakeup(oh, false);
  3209. spin_unlock_irqrestore(&oh->_lock, flags);
  3210. return 0;
  3211. }
  3212. /**
  3213. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  3214. * contained in the hwmod module.
  3215. * @oh: struct omap_hwmod *
  3216. * @name: name of the reset line to lookup and assert
  3217. *
  3218. * Some IP like dsp, ipu or iva contain processor that require
  3219. * an HW reset line to be assert / deassert in order to enable fully
  3220. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3221. * yet supported on this OMAP; otherwise, passes along the return value
  3222. * from _assert_hardreset().
  3223. */
  3224. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  3225. {
  3226. int ret;
  3227. unsigned long flags;
  3228. if (!oh)
  3229. return -EINVAL;
  3230. spin_lock_irqsave(&oh->_lock, flags);
  3231. ret = _assert_hardreset(oh, name);
  3232. spin_unlock_irqrestore(&oh->_lock, flags);
  3233. return ret;
  3234. }
  3235. /**
  3236. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  3237. * contained in the hwmod module.
  3238. * @oh: struct omap_hwmod *
  3239. * @name: name of the reset line to look up and deassert
  3240. *
  3241. * Some IP like dsp, ipu or iva contain processor that require
  3242. * an HW reset line to be assert / deassert in order to enable fully
  3243. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  3244. * yet supported on this OMAP; otherwise, passes along the return value
  3245. * from _deassert_hardreset().
  3246. */
  3247. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  3248. {
  3249. int ret;
  3250. unsigned long flags;
  3251. if (!oh)
  3252. return -EINVAL;
  3253. spin_lock_irqsave(&oh->_lock, flags);
  3254. ret = _deassert_hardreset(oh, name);
  3255. spin_unlock_irqrestore(&oh->_lock, flags);
  3256. return ret;
  3257. }
  3258. /**
  3259. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  3260. * contained in the hwmod module
  3261. * @oh: struct omap_hwmod *
  3262. * @name: name of the reset line to look up and read
  3263. *
  3264. * Return the current state of the hwmod @oh's reset line named @name:
  3265. * returns -EINVAL upon parameter error or if this operation
  3266. * is unsupported on the current OMAP; otherwise, passes along the return
  3267. * value from _read_hardreset().
  3268. */
  3269. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  3270. {
  3271. int ret;
  3272. unsigned long flags;
  3273. if (!oh)
  3274. return -EINVAL;
  3275. spin_lock_irqsave(&oh->_lock, flags);
  3276. ret = _read_hardreset(oh, name);
  3277. spin_unlock_irqrestore(&oh->_lock, flags);
  3278. return ret;
  3279. }
  3280. /**
  3281. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  3282. * @classname: struct omap_hwmod_class name to search for
  3283. * @fn: callback function pointer to call for each hwmod in class @classname
  3284. * @user: arbitrary context data to pass to the callback function
  3285. *
  3286. * For each omap_hwmod of class @classname, call @fn.
  3287. * If the callback function returns something other than
  3288. * zero, the iterator is terminated, and the callback function's return
  3289. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  3290. * if @classname or @fn are NULL, or passes back the error code from @fn.
  3291. */
  3292. int omap_hwmod_for_each_by_class(const char *classname,
  3293. int (*fn)(struct omap_hwmod *oh,
  3294. void *user),
  3295. void *user)
  3296. {
  3297. struct omap_hwmod *temp_oh;
  3298. int ret = 0;
  3299. if (!classname || !fn)
  3300. return -EINVAL;
  3301. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  3302. __func__, classname);
  3303. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  3304. if (!strcmp(temp_oh->class->name, classname)) {
  3305. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  3306. __func__, temp_oh->name);
  3307. ret = (*fn)(temp_oh, user);
  3308. if (ret)
  3309. break;
  3310. }
  3311. }
  3312. if (ret)
  3313. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  3314. __func__, ret);
  3315. return ret;
  3316. }
  3317. /**
  3318. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  3319. * @oh: struct omap_hwmod *
  3320. * @state: state that _setup() should leave the hwmod in
  3321. *
  3322. * Sets the hwmod state that @oh will enter at the end of _setup()
  3323. * (called by omap_hwmod_setup_*()). See also the documentation
  3324. * for _setup_postsetup(), above. Returns 0 upon success or
  3325. * -EINVAL if there is a problem with the arguments or if the hwmod is
  3326. * in the wrong state.
  3327. */
  3328. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  3329. {
  3330. int ret;
  3331. unsigned long flags;
  3332. if (!oh)
  3333. return -EINVAL;
  3334. if (state != _HWMOD_STATE_DISABLED &&
  3335. state != _HWMOD_STATE_ENABLED &&
  3336. state != _HWMOD_STATE_IDLE)
  3337. return -EINVAL;
  3338. spin_lock_irqsave(&oh->_lock, flags);
  3339. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3340. ret = -EINVAL;
  3341. goto ohsps_unlock;
  3342. }
  3343. oh->_postsetup_state = state;
  3344. ret = 0;
  3345. ohsps_unlock:
  3346. spin_unlock_irqrestore(&oh->_lock, flags);
  3347. return ret;
  3348. }
  3349. /**
  3350. * omap_hwmod_get_context_loss_count - get lost context count
  3351. * @oh: struct omap_hwmod *
  3352. *
  3353. * Query the powerdomain of of @oh to get the context loss
  3354. * count for this device.
  3355. *
  3356. * Returns the context loss count of the powerdomain assocated with @oh
  3357. * upon success, or zero if no powerdomain exists for @oh.
  3358. */
  3359. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  3360. {
  3361. struct powerdomain *pwrdm;
  3362. int ret = 0;
  3363. pwrdm = omap_hwmod_get_pwrdm(oh);
  3364. if (pwrdm)
  3365. ret = pwrdm_get_context_loss_count(pwrdm);
  3366. return ret;
  3367. }
  3368. /**
  3369. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  3370. * @oh: struct omap_hwmod *
  3371. *
  3372. * Prevent the hwmod @oh from being reset during the setup process.
  3373. * Intended for use by board-*.c files on boards with devices that
  3374. * cannot tolerate being reset. Must be called before the hwmod has
  3375. * been set up. Returns 0 upon success or negative error code upon
  3376. * failure.
  3377. */
  3378. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  3379. {
  3380. if (!oh)
  3381. return -EINVAL;
  3382. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  3383. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  3384. oh->name);
  3385. return -EINVAL;
  3386. }
  3387. oh->flags |= HWMOD_INIT_NO_RESET;
  3388. return 0;
  3389. }
  3390. /**
  3391. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  3392. * @oh: struct omap_hwmod * containing hwmod mux entries
  3393. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  3394. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  3395. *
  3396. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  3397. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  3398. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  3399. * this function is not called for a given pad_idx, then the ISR
  3400. * associated with @oh's first MPU IRQ will be triggered when an I/O
  3401. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  3402. * the _dynamic or wakeup_ entry: if there are other entries not
  3403. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  3404. * entries are NOT COUNTED in the dynamic pad index. This function
  3405. * must be called separately for each pad that requires its interrupt
  3406. * to be re-routed this way. Returns -EINVAL if there is an argument
  3407. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  3408. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  3409. *
  3410. * XXX This function interface is fragile. Rather than using array
  3411. * indexes, which are subject to unpredictable change, it should be
  3412. * using hwmod IRQ names, and some other stable key for the hwmod mux
  3413. * pad records.
  3414. */
  3415. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  3416. {
  3417. int nr_irqs;
  3418. might_sleep();
  3419. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  3420. pad_idx >= oh->mux->nr_pads_dynamic)
  3421. return -EINVAL;
  3422. /* Check the number of available mpu_irqs */
  3423. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  3424. ;
  3425. if (irq_idx >= nr_irqs)
  3426. return -EINVAL;
  3427. if (!oh->mux->irqs) {
  3428. /* XXX What frees this? */
  3429. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  3430. GFP_KERNEL);
  3431. if (!oh->mux->irqs)
  3432. return -ENOMEM;
  3433. }
  3434. oh->mux->irqs[pad_idx] = irq_idx;
  3435. return 0;
  3436. }
  3437. /**
  3438. * omap_hwmod_init - initialize the hwmod code
  3439. *
  3440. * Sets up some function pointers needed by the hwmod code to operate on the
  3441. * currently-booted SoC. Intended to be called once during kernel init
  3442. * before any hwmods are registered. No return value.
  3443. */
  3444. void __init omap_hwmod_init(void)
  3445. {
  3446. if (cpu_is_omap24xx()) {
  3447. soc_ops.wait_target_ready = _omap2xxx_wait_target_ready;
  3448. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3449. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3450. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3451. } else if (cpu_is_omap34xx()) {
  3452. soc_ops.wait_target_ready = _omap3xxx_wait_target_ready;
  3453. soc_ops.assert_hardreset = _omap2_assert_hardreset;
  3454. soc_ops.deassert_hardreset = _omap2_deassert_hardreset;
  3455. soc_ops.is_hardreset_asserted = _omap2_is_hardreset_asserted;
  3456. } else if (cpu_is_omap44xx() || soc_is_omap54xx()) {
  3457. soc_ops.enable_module = _omap4_enable_module;
  3458. soc_ops.disable_module = _omap4_disable_module;
  3459. soc_ops.wait_target_ready = _omap4_wait_target_ready;
  3460. soc_ops.assert_hardreset = _omap4_assert_hardreset;
  3461. soc_ops.deassert_hardreset = _omap4_deassert_hardreset;
  3462. soc_ops.is_hardreset_asserted = _omap4_is_hardreset_asserted;
  3463. soc_ops.init_clkdm = _init_clkdm;
  3464. } else if (soc_is_am33xx()) {
  3465. soc_ops.enable_module = _am33xx_enable_module;
  3466. soc_ops.disable_module = _am33xx_disable_module;
  3467. soc_ops.wait_target_ready = _am33xx_wait_target_ready;
  3468. soc_ops.assert_hardreset = _am33xx_assert_hardreset;
  3469. soc_ops.deassert_hardreset = _am33xx_deassert_hardreset;
  3470. soc_ops.is_hardreset_asserted = _am33xx_is_hardreset_asserted;
  3471. soc_ops.init_clkdm = _init_clkdm;
  3472. } else {
  3473. WARN(1, "omap_hwmod: unknown SoC type\n");
  3474. }
  3475. inited = true;
  3476. }
  3477. /**
  3478. * omap_hwmod_get_main_clk - get pointer to main clock name
  3479. * @oh: struct omap_hwmod *
  3480. *
  3481. * Returns the main clock name assocated with @oh upon success,
  3482. * or NULL if @oh is NULL.
  3483. */
  3484. const char *omap_hwmod_get_main_clk(struct omap_hwmod *oh)
  3485. {
  3486. if (!oh)
  3487. return NULL;
  3488. return oh->main_clk;
  3489. }