iwl-4965.c 103 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. *****************************************************************************/
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/version.h>
  29. #include <linux/init.h>
  30. #include <linux/pci.h>
  31. #include <linux/dma-mapping.h>
  32. #include <linux/delay.h>
  33. #include <linux/skbuff.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/wireless.h>
  36. #include <net/mac80211.h>
  37. #include <linux/etherdevice.h>
  38. #include <asm/unaligned.h>
  39. #include "iwl-eeprom.h"
  40. #include "iwl-dev.h"
  41. #include "iwl-core.h"
  42. #include "iwl-io.h"
  43. #include "iwl-helpers.h"
  44. #include "iwl-calib.h"
  45. /* module parameters */
  46. static struct iwl_mod_params iwl4965_mod_params = {
  47. .num_of_queues = IWL49_NUM_QUEUES,
  48. .enable_qos = 1,
  49. .amsdu_size_8K = 1,
  50. .restart_fw = 1,
  51. /* the rest are 0 by default */
  52. };
  53. #ifdef CONFIG_IWL4965_HT
  54. static const u16 default_tid_to_tx_fifo[] = {
  55. IWL_TX_FIFO_AC1,
  56. IWL_TX_FIFO_AC0,
  57. IWL_TX_FIFO_AC0,
  58. IWL_TX_FIFO_AC1,
  59. IWL_TX_FIFO_AC2,
  60. IWL_TX_FIFO_AC2,
  61. IWL_TX_FIFO_AC3,
  62. IWL_TX_FIFO_AC3,
  63. IWL_TX_FIFO_NONE,
  64. IWL_TX_FIFO_NONE,
  65. IWL_TX_FIFO_NONE,
  66. IWL_TX_FIFO_NONE,
  67. IWL_TX_FIFO_NONE,
  68. IWL_TX_FIFO_NONE,
  69. IWL_TX_FIFO_NONE,
  70. IWL_TX_FIFO_NONE,
  71. IWL_TX_FIFO_AC3
  72. };
  73. #endif /*CONFIG_IWL4965_HT */
  74. /* check contents of special bootstrap uCode SRAM */
  75. static int iwl4965_verify_bsm(struct iwl_priv *priv)
  76. {
  77. __le32 *image = priv->ucode_boot.v_addr;
  78. u32 len = priv->ucode_boot.len;
  79. u32 reg;
  80. u32 val;
  81. IWL_DEBUG_INFO("Begin verify bsm\n");
  82. /* verify BSM SRAM contents */
  83. val = iwl_read_prph(priv, BSM_WR_DWCOUNT_REG);
  84. for (reg = BSM_SRAM_LOWER_BOUND;
  85. reg < BSM_SRAM_LOWER_BOUND + len;
  86. reg += sizeof(u32), image++) {
  87. val = iwl_read_prph(priv, reg);
  88. if (val != le32_to_cpu(*image)) {
  89. IWL_ERROR("BSM uCode verification failed at "
  90. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  91. BSM_SRAM_LOWER_BOUND,
  92. reg - BSM_SRAM_LOWER_BOUND, len,
  93. val, le32_to_cpu(*image));
  94. return -EIO;
  95. }
  96. }
  97. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  98. return 0;
  99. }
  100. /**
  101. * iwl4965_load_bsm - Load bootstrap instructions
  102. *
  103. * BSM operation:
  104. *
  105. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  106. * in special SRAM that does not power down during RFKILL. When powering back
  107. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  108. * the bootstrap program into the on-board processor, and starts it.
  109. *
  110. * The bootstrap program loads (via DMA) instructions and data for a new
  111. * program from host DRAM locations indicated by the host driver in the
  112. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  113. * automatically.
  114. *
  115. * When initializing the NIC, the host driver points the BSM to the
  116. * "initialize" uCode image. This uCode sets up some internal data, then
  117. * notifies host via "initialize alive" that it is complete.
  118. *
  119. * The host then replaces the BSM_DRAM_* pointer values to point to the
  120. * normal runtime uCode instructions and a backup uCode data cache buffer
  121. * (filled initially with starting data values for the on-board processor),
  122. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  123. * which begins normal operation.
  124. *
  125. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  126. * the backup data cache in DRAM before SRAM is powered down.
  127. *
  128. * When powering back up, the BSM loads the bootstrap program. This reloads
  129. * the runtime uCode instructions and the backup data cache into SRAM,
  130. * and re-launches the runtime uCode from where it left off.
  131. */
  132. static int iwl4965_load_bsm(struct iwl_priv *priv)
  133. {
  134. __le32 *image = priv->ucode_boot.v_addr;
  135. u32 len = priv->ucode_boot.len;
  136. dma_addr_t pinst;
  137. dma_addr_t pdata;
  138. u32 inst_len;
  139. u32 data_len;
  140. int i;
  141. u32 done;
  142. u32 reg_offset;
  143. int ret;
  144. IWL_DEBUG_INFO("Begin load bsm\n");
  145. /* make sure bootstrap program is no larger than BSM's SRAM size */
  146. if (len > IWL_MAX_BSM_SIZE)
  147. return -EINVAL;
  148. /* Tell bootstrap uCode where to find the "Initialize" uCode
  149. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  150. * NOTE: iwl_init_alive_start() will replace these values,
  151. * after the "initialize" uCode has run, to point to
  152. * runtime/protocol instructions and backup data cache.
  153. */
  154. pinst = priv->ucode_init.p_addr >> 4;
  155. pdata = priv->ucode_init_data.p_addr >> 4;
  156. inst_len = priv->ucode_init.len;
  157. data_len = priv->ucode_init_data.len;
  158. ret = iwl_grab_nic_access(priv);
  159. if (ret)
  160. return ret;
  161. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  162. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  163. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  164. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  165. /* Fill BSM memory with bootstrap instructions */
  166. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  167. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  168. reg_offset += sizeof(u32), image++)
  169. _iwl_write_prph(priv, reg_offset, le32_to_cpu(*image));
  170. ret = iwl4965_verify_bsm(priv);
  171. if (ret) {
  172. iwl_release_nic_access(priv);
  173. return ret;
  174. }
  175. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  176. iwl_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  177. iwl_write_prph(priv, BSM_WR_MEM_DST_REG, RTC_INST_LOWER_BOUND);
  178. iwl_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  179. /* Load bootstrap code into instruction SRAM now,
  180. * to prepare to load "initialize" uCode */
  181. iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START);
  182. /* Wait for load of bootstrap uCode to finish */
  183. for (i = 0; i < 100; i++) {
  184. done = iwl_read_prph(priv, BSM_WR_CTRL_REG);
  185. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  186. break;
  187. udelay(10);
  188. }
  189. if (i < 100)
  190. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  191. else {
  192. IWL_ERROR("BSM write did not complete!\n");
  193. return -EIO;
  194. }
  195. /* Enable future boot loads whenever power management unit triggers it
  196. * (e.g. when powering back up after power-save shutdown) */
  197. iwl_write_prph(priv, BSM_WR_CTRL_REG, BSM_WR_CTRL_REG_BIT_START_EN);
  198. iwl_release_nic_access(priv);
  199. priv->ucode_type = UCODE_INIT;
  200. return 0;
  201. }
  202. /**
  203. * iwl4965_set_ucode_ptrs - Set uCode address location
  204. *
  205. * Tell initialization uCode where to find runtime uCode.
  206. *
  207. * BSM registers initially contain pointers to initialization uCode.
  208. * We need to replace them to load runtime uCode inst and data,
  209. * and to save runtime data when powering down.
  210. */
  211. static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
  212. {
  213. dma_addr_t pinst;
  214. dma_addr_t pdata;
  215. unsigned long flags;
  216. int ret = 0;
  217. /* bits 35:4 for 4965 */
  218. pinst = priv->ucode_code.p_addr >> 4;
  219. pdata = priv->ucode_data_backup.p_addr >> 4;
  220. spin_lock_irqsave(&priv->lock, flags);
  221. ret = iwl_grab_nic_access(priv);
  222. if (ret) {
  223. spin_unlock_irqrestore(&priv->lock, flags);
  224. return ret;
  225. }
  226. /* Tell bootstrap uCode where to find image to load */
  227. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  228. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  229. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  230. priv->ucode_data.len);
  231. /* Inst bytecount must be last to set up, bit 31 signals uCode
  232. * that all new ptr/size info is in place */
  233. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  234. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  235. iwl_release_nic_access(priv);
  236. spin_unlock_irqrestore(&priv->lock, flags);
  237. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  238. priv->ucode_type = UCODE_RT;
  239. return ret;
  240. }
  241. /**
  242. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  243. *
  244. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  245. *
  246. * The 4965 "initialize" ALIVE reply contains calibration data for:
  247. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  248. * (3945 does not contain this data).
  249. *
  250. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  251. */
  252. static void iwl4965_init_alive_start(struct iwl_priv *priv)
  253. {
  254. /* Check alive response for "valid" sign from uCode */
  255. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  256. /* We had an error bringing up the hardware, so take it
  257. * all the way back down so we can try again */
  258. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  259. goto restart;
  260. }
  261. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  262. * This is a paranoid check, because we would not have gotten the
  263. * "initialize" alive if code weren't properly loaded. */
  264. if (iwl_verify_ucode(priv)) {
  265. /* Runtime instruction load was bad;
  266. * take it all the way back down so we can try again */
  267. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  268. goto restart;
  269. }
  270. /* Calculate temperature */
  271. priv->temperature = iwl4965_get_temperature(priv);
  272. /* Send pointers to protocol/runtime uCode image ... init code will
  273. * load and launch runtime uCode, which will send us another "Alive"
  274. * notification. */
  275. IWL_DEBUG_INFO("Initialization Alive received.\n");
  276. if (iwl4965_set_ucode_ptrs(priv)) {
  277. /* Runtime instruction load won't happen;
  278. * take it all the way back down so we can try again */
  279. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  280. goto restart;
  281. }
  282. return;
  283. restart:
  284. queue_work(priv->workqueue, &priv->restart);
  285. }
  286. static int is_fat_channel(__le32 rxon_flags)
  287. {
  288. return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
  289. (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
  290. }
  291. int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
  292. {
  293. int idx = 0;
  294. /* 4965 HT rate format */
  295. if (rate_n_flags & RATE_MCS_HT_MSK) {
  296. idx = (rate_n_flags & 0xff);
  297. if (idx >= IWL_RATE_MIMO2_6M_PLCP)
  298. idx = idx - IWL_RATE_MIMO2_6M_PLCP;
  299. idx += IWL_FIRST_OFDM_RATE;
  300. /* skip 9M not supported in ht*/
  301. if (idx >= IWL_RATE_9M_INDEX)
  302. idx += 1;
  303. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  304. return idx;
  305. /* 4965 legacy rate format, search for match in table */
  306. } else {
  307. for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
  308. if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
  309. return idx;
  310. }
  311. return -1;
  312. }
  313. /**
  314. * translate ucode response to mac80211 tx status control values
  315. */
  316. void iwl4965_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
  317. struct ieee80211_tx_info *control)
  318. {
  319. int rate_index;
  320. control->antenna_sel_tx =
  321. ((rate_n_flags & RATE_MCS_ANT_ABC_MSK) >> RATE_MCS_ANT_POS);
  322. if (rate_n_flags & RATE_MCS_HT_MSK)
  323. control->flags |= IEEE80211_TX_CTL_OFDM_HT;
  324. if (rate_n_flags & RATE_MCS_GF_MSK)
  325. control->flags |= IEEE80211_TX_CTL_GREEN_FIELD;
  326. if (rate_n_flags & RATE_MCS_FAT_MSK)
  327. control->flags |= IEEE80211_TX_CTL_40_MHZ_WIDTH;
  328. if (rate_n_flags & RATE_MCS_DUP_MSK)
  329. control->flags |= IEEE80211_TX_CTL_DUP_DATA;
  330. if (rate_n_flags & RATE_MCS_SGI_MSK)
  331. control->flags |= IEEE80211_TX_CTL_SHORT_GI;
  332. rate_index = iwl4965_hwrate_to_plcp_idx(rate_n_flags);
  333. if (control->band == IEEE80211_BAND_5GHZ)
  334. rate_index -= IWL_FIRST_OFDM_RATE;
  335. control->tx_rate_idx = rate_index;
  336. }
  337. int iwl4965_hw_rxq_stop(struct iwl_priv *priv)
  338. {
  339. int rc;
  340. unsigned long flags;
  341. spin_lock_irqsave(&priv->lock, flags);
  342. rc = iwl_grab_nic_access(priv);
  343. if (rc) {
  344. spin_unlock_irqrestore(&priv->lock, flags);
  345. return rc;
  346. }
  347. /* stop Rx DMA */
  348. iwl_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
  349. rc = iwl_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
  350. (1 << 24), 1000);
  351. if (rc < 0)
  352. IWL_ERROR("Can't stop Rx DMA.\n");
  353. iwl_release_nic_access(priv);
  354. spin_unlock_irqrestore(&priv->lock, flags);
  355. return 0;
  356. }
  357. /*
  358. * EEPROM handlers
  359. */
  360. static int iwl4965_eeprom_check_version(struct iwl_priv *priv)
  361. {
  362. u16 eeprom_ver;
  363. u16 calib_ver;
  364. eeprom_ver = iwl_eeprom_query16(priv, EEPROM_VERSION);
  365. calib_ver = iwl_eeprom_query16(priv, EEPROM_4965_CALIB_VERSION_OFFSET);
  366. if (eeprom_ver < EEPROM_4965_EEPROM_VERSION ||
  367. calib_ver < EEPROM_4965_TX_POWER_VERSION)
  368. goto err;
  369. return 0;
  370. err:
  371. IWL_ERROR("Unsuported EEPROM VER=0x%x < 0x%x CALIB=0x%x < 0x%x\n",
  372. eeprom_ver, EEPROM_4965_EEPROM_VERSION,
  373. calib_ver, EEPROM_4965_TX_POWER_VERSION);
  374. return -EINVAL;
  375. }
  376. int iwl4965_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
  377. {
  378. int ret;
  379. unsigned long flags;
  380. spin_lock_irqsave(&priv->lock, flags);
  381. ret = iwl_grab_nic_access(priv);
  382. if (ret) {
  383. spin_unlock_irqrestore(&priv->lock, flags);
  384. return ret;
  385. }
  386. if (src == IWL_PWR_SRC_VAUX) {
  387. u32 val;
  388. ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
  389. &val);
  390. if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
  391. iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  392. APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
  393. ~APMG_PS_CTRL_MSK_PWR_SRC);
  394. }
  395. } else {
  396. iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  397. APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
  398. ~APMG_PS_CTRL_MSK_PWR_SRC);
  399. }
  400. iwl_release_nic_access(priv);
  401. spin_unlock_irqrestore(&priv->lock, flags);
  402. return ret;
  403. }
  404. static int iwl4965_disable_tx_fifo(struct iwl_priv *priv)
  405. {
  406. unsigned long flags;
  407. int ret;
  408. spin_lock_irqsave(&priv->lock, flags);
  409. ret = iwl_grab_nic_access(priv);
  410. if (unlikely(ret)) {
  411. IWL_ERROR("Tx fifo reset failed");
  412. spin_unlock_irqrestore(&priv->lock, flags);
  413. return ret;
  414. }
  415. iwl_write_prph(priv, IWL49_SCD_TXFACT, 0);
  416. iwl_release_nic_access(priv);
  417. spin_unlock_irqrestore(&priv->lock, flags);
  418. return 0;
  419. }
  420. static int iwl4965_apm_init(struct iwl_priv *priv)
  421. {
  422. int ret = 0;
  423. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  424. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  425. /* set "initialization complete" bit to move adapter
  426. * D0U* --> D0A* state */
  427. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  428. /* wait for clock stabilization */
  429. ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
  430. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  431. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  432. if (ret < 0) {
  433. IWL_DEBUG_INFO("Failed to init the card\n");
  434. goto out;
  435. }
  436. ret = iwl_grab_nic_access(priv);
  437. if (ret)
  438. goto out;
  439. /* enable DMA */
  440. iwl_write_prph(priv, APMG_CLK_CTRL_REG,
  441. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  442. udelay(20);
  443. iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  444. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  445. iwl_release_nic_access(priv);
  446. out:
  447. return ret;
  448. }
  449. static void iwl4965_nic_config(struct iwl_priv *priv)
  450. {
  451. unsigned long flags;
  452. u32 val;
  453. u16 radio_cfg;
  454. u8 val_link;
  455. spin_lock_irqsave(&priv->lock, flags);
  456. if ((priv->rev_id & 0x80) == 0x80 && (priv->rev_id & 0x7f) < 8) {
  457. pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
  458. /* Enable No Snoop field */
  459. pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
  460. val & ~(1 << 11));
  461. }
  462. pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
  463. /* disable L1 entry -- workaround for pre-B1 */
  464. pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
  465. radio_cfg = iwl_eeprom_query16(priv, EEPROM_RADIO_CONFIG);
  466. /* write radio config values to register */
  467. if (EEPROM_RF_CFG_TYPE_MSK(radio_cfg) == EEPROM_4965_RF_CFG_TYPE_MAX)
  468. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  469. EEPROM_RF_CFG_TYPE_MSK(radio_cfg) |
  470. EEPROM_RF_CFG_STEP_MSK(radio_cfg) |
  471. EEPROM_RF_CFG_DASH_MSK(radio_cfg));
  472. /* set CSR_HW_CONFIG_REG for uCode use */
  473. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  474. CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI |
  475. CSR_HW_IF_CONFIG_REG_BIT_MAC_SI);
  476. priv->calib_info = (struct iwl_eeprom_calib_info *)
  477. iwl_eeprom_query_addr(priv, EEPROM_4965_CALIB_TXPOWER_OFFSET);
  478. spin_unlock_irqrestore(&priv->lock, flags);
  479. }
  480. int iwl4965_hw_nic_stop_master(struct iwl_priv *priv)
  481. {
  482. int rc = 0;
  483. u32 reg_val;
  484. unsigned long flags;
  485. spin_lock_irqsave(&priv->lock, flags);
  486. /* set stop master bit */
  487. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  488. reg_val = iwl_read32(priv, CSR_GP_CNTRL);
  489. if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
  490. (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
  491. IWL_DEBUG_INFO("Card in power save, master is already "
  492. "stopped\n");
  493. else {
  494. rc = iwl_poll_bit(priv, CSR_RESET,
  495. CSR_RESET_REG_FLAG_MASTER_DISABLED,
  496. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  497. if (rc < 0) {
  498. spin_unlock_irqrestore(&priv->lock, flags);
  499. return rc;
  500. }
  501. }
  502. spin_unlock_irqrestore(&priv->lock, flags);
  503. IWL_DEBUG_INFO("stop master\n");
  504. return rc;
  505. }
  506. /**
  507. * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
  508. */
  509. void iwl4965_hw_txq_ctx_stop(struct iwl_priv *priv)
  510. {
  511. int txq_id;
  512. unsigned long flags;
  513. /* Stop each Tx DMA channel, and wait for it to be idle */
  514. for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++) {
  515. spin_lock_irqsave(&priv->lock, flags);
  516. if (iwl_grab_nic_access(priv)) {
  517. spin_unlock_irqrestore(&priv->lock, flags);
  518. continue;
  519. }
  520. iwl_write_direct32(priv,
  521. FH_TCSR_CHNL_TX_CONFIG_REG(txq_id), 0x0);
  522. iwl_poll_direct_bit(priv, FH_TSSR_TX_STATUS_REG,
  523. FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
  524. (txq_id), 200);
  525. iwl_release_nic_access(priv);
  526. spin_unlock_irqrestore(&priv->lock, flags);
  527. }
  528. /* Deallocate memory for all Tx queues */
  529. iwl_hw_txq_ctx_free(priv);
  530. }
  531. int iwl4965_hw_nic_reset(struct iwl_priv *priv)
  532. {
  533. int rc = 0;
  534. unsigned long flags;
  535. iwl4965_hw_nic_stop_master(priv);
  536. spin_lock_irqsave(&priv->lock, flags);
  537. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  538. udelay(10);
  539. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  540. rc = iwl_poll_bit(priv, CSR_RESET,
  541. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  542. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
  543. udelay(10);
  544. rc = iwl_grab_nic_access(priv);
  545. if (!rc) {
  546. iwl_write_prph(priv, APMG_CLK_EN_REG,
  547. APMG_CLK_VAL_DMA_CLK_RQT |
  548. APMG_CLK_VAL_BSM_CLK_RQT);
  549. udelay(10);
  550. iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  551. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  552. iwl_release_nic_access(priv);
  553. }
  554. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  555. wake_up_interruptible(&priv->wait_command_queue);
  556. spin_unlock_irqrestore(&priv->lock, flags);
  557. return rc;
  558. }
  559. #define REG_RECALIB_PERIOD (60)
  560. /**
  561. * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
  562. *
  563. * This callback is provided in order to send a statistics request.
  564. *
  565. * This timer function is continually reset to execute within
  566. * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
  567. * was received. We need to ensure we receive the statistics in order
  568. * to update the temperature used for calibrating the TXPOWER.
  569. */
  570. static void iwl4965_bg_statistics_periodic(unsigned long data)
  571. {
  572. struct iwl_priv *priv = (struct iwl_priv *)data;
  573. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  574. return;
  575. iwl_send_statistics_request(priv, CMD_ASYNC);
  576. }
  577. void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
  578. {
  579. struct iwl4965_ct_kill_config cmd;
  580. unsigned long flags;
  581. int ret = 0;
  582. spin_lock_irqsave(&priv->lock, flags);
  583. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  584. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  585. spin_unlock_irqrestore(&priv->lock, flags);
  586. cmd.critical_temperature_R =
  587. cpu_to_le32(priv->hw_params.ct_kill_threshold);
  588. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  589. sizeof(cmd), &cmd);
  590. if (ret)
  591. IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
  592. else
  593. IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded, "
  594. "critical temperature is %d\n",
  595. cmd.critical_temperature_R);
  596. }
  597. #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
  598. /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
  599. * Called after every association, but this runs only once!
  600. * ... once chain noise is calibrated the first time, it's good forever. */
  601. static void iwl4965_chain_noise_reset(struct iwl_priv *priv)
  602. {
  603. struct iwl_chain_noise_data *data = &(priv->chain_noise_data);
  604. if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl_is_associated(priv)) {
  605. struct iwl4965_calibration_cmd cmd;
  606. memset(&cmd, 0, sizeof(cmd));
  607. cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
  608. cmd.diff_gain_a = 0;
  609. cmd.diff_gain_b = 0;
  610. cmd.diff_gain_c = 0;
  611. if (iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
  612. sizeof(cmd), &cmd))
  613. IWL_ERROR("Could not send REPLY_PHY_CALIBRATION_CMD\n");
  614. data->state = IWL_CHAIN_NOISE_ACCUMULATE;
  615. IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
  616. }
  617. }
  618. static void iwl4965_gain_computation(struct iwl_priv *priv,
  619. u32 *average_noise,
  620. u16 min_average_noise_antenna_i,
  621. u32 min_average_noise)
  622. {
  623. int i, ret;
  624. struct iwl_chain_noise_data *data = &priv->chain_noise_data;
  625. data->delta_gain_code[min_average_noise_antenna_i] = 0;
  626. for (i = 0; i < NUM_RX_CHAINS; i++) {
  627. s32 delta_g = 0;
  628. if (!(data->disconn_array[i]) &&
  629. (data->delta_gain_code[i] ==
  630. CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
  631. delta_g = average_noise[i] - min_average_noise;
  632. data->delta_gain_code[i] = (u8)((delta_g * 10) / 15);
  633. data->delta_gain_code[i] =
  634. min(data->delta_gain_code[i],
  635. (u8) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
  636. data->delta_gain_code[i] =
  637. (data->delta_gain_code[i] | (1 << 2));
  638. } else {
  639. data->delta_gain_code[i] = 0;
  640. }
  641. }
  642. IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
  643. data->delta_gain_code[0],
  644. data->delta_gain_code[1],
  645. data->delta_gain_code[2]);
  646. /* Differential gain gets sent to uCode only once */
  647. if (!data->radio_write) {
  648. struct iwl4965_calibration_cmd cmd;
  649. data->radio_write = 1;
  650. memset(&cmd, 0, sizeof(cmd));
  651. cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
  652. cmd.diff_gain_a = data->delta_gain_code[0];
  653. cmd.diff_gain_b = data->delta_gain_code[1];
  654. cmd.diff_gain_c = data->delta_gain_code[2];
  655. ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
  656. sizeof(cmd), &cmd);
  657. if (ret)
  658. IWL_DEBUG_CALIB("fail sending cmd "
  659. "REPLY_PHY_CALIBRATION_CMD \n");
  660. /* TODO we might want recalculate
  661. * rx_chain in rxon cmd */
  662. /* Mark so we run this algo only once! */
  663. data->state = IWL_CHAIN_NOISE_CALIBRATED;
  664. }
  665. data->chain_noise_a = 0;
  666. data->chain_noise_b = 0;
  667. data->chain_noise_c = 0;
  668. data->chain_signal_a = 0;
  669. data->chain_signal_b = 0;
  670. data->chain_signal_c = 0;
  671. data->beacon_count = 0;
  672. }
  673. static void iwl4965_bg_sensitivity_work(struct work_struct *work)
  674. {
  675. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  676. sensitivity_work);
  677. mutex_lock(&priv->mutex);
  678. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  679. test_bit(STATUS_SCANNING, &priv->status)) {
  680. mutex_unlock(&priv->mutex);
  681. return;
  682. }
  683. if (priv->start_calib) {
  684. iwl_chain_noise_calibration(priv, &priv->statistics);
  685. iwl_sensitivity_calibration(priv, &priv->statistics);
  686. }
  687. mutex_unlock(&priv->mutex);
  688. return;
  689. }
  690. #endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
  691. static void iwl4965_bg_txpower_work(struct work_struct *work)
  692. {
  693. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  694. txpower_work);
  695. /* If a scan happened to start before we got here
  696. * then just return; the statistics notification will
  697. * kick off another scheduled work to compensate for
  698. * any temperature delta we missed here. */
  699. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  700. test_bit(STATUS_SCANNING, &priv->status))
  701. return;
  702. mutex_lock(&priv->mutex);
  703. /* Regardless of if we are assocaited, we must reconfigure the
  704. * TX power since frames can be sent on non-radar channels while
  705. * not associated */
  706. iwl4965_hw_reg_send_txpower(priv);
  707. /* Update last_temperature to keep is_calib_needed from running
  708. * when it isn't needed... */
  709. priv->last_temperature = priv->temperature;
  710. mutex_unlock(&priv->mutex);
  711. }
  712. /*
  713. * Acquire priv->lock before calling this function !
  714. */
  715. static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
  716. {
  717. iwl_write_direct32(priv, HBUS_TARG_WRPTR,
  718. (index & 0xff) | (txq_id << 8));
  719. iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(txq_id), index);
  720. }
  721. /**
  722. * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
  723. * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
  724. * @scd_retry: (1) Indicates queue will be used in aggregation mode
  725. *
  726. * NOTE: Acquire priv->lock before calling this function !
  727. */
  728. static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
  729. struct iwl_tx_queue *txq,
  730. int tx_fifo_id, int scd_retry)
  731. {
  732. int txq_id = txq->q.id;
  733. /* Find out whether to activate Tx queue */
  734. int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
  735. /* Set up and activate */
  736. iwl_write_prph(priv, IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
  737. (active << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE) |
  738. (tx_fifo_id << IWL49_SCD_QUEUE_STTS_REG_POS_TXF) |
  739. (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_WSL) |
  740. (scd_retry << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
  741. IWL49_SCD_QUEUE_STTS_REG_MSK);
  742. txq->sched_retry = scd_retry;
  743. IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
  744. active ? "Activate" : "Deactivate",
  745. scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
  746. }
  747. static const u16 default_queue_to_tx_fifo[] = {
  748. IWL_TX_FIFO_AC3,
  749. IWL_TX_FIFO_AC2,
  750. IWL_TX_FIFO_AC1,
  751. IWL_TX_FIFO_AC0,
  752. IWL49_CMD_FIFO_NUM,
  753. IWL_TX_FIFO_HCCA_1,
  754. IWL_TX_FIFO_HCCA_2
  755. };
  756. int iwl4965_alive_notify(struct iwl_priv *priv)
  757. {
  758. u32 a;
  759. int i = 0;
  760. unsigned long flags;
  761. int ret;
  762. spin_lock_irqsave(&priv->lock, flags);
  763. ret = iwl_grab_nic_access(priv);
  764. if (ret) {
  765. spin_unlock_irqrestore(&priv->lock, flags);
  766. return ret;
  767. }
  768. /* Clear 4965's internal Tx Scheduler data base */
  769. priv->scd_base_addr = iwl_read_prph(priv, IWL49_SCD_SRAM_BASE_ADDR);
  770. a = priv->scd_base_addr + IWL49_SCD_CONTEXT_DATA_OFFSET;
  771. for (; a < priv->scd_base_addr + IWL49_SCD_TX_STTS_BITMAP_OFFSET; a += 4)
  772. iwl_write_targ_mem(priv, a, 0);
  773. for (; a < priv->scd_base_addr + IWL49_SCD_TRANSLATE_TBL_OFFSET; a += 4)
  774. iwl_write_targ_mem(priv, a, 0);
  775. for (; a < sizeof(u16) * priv->hw_params.max_txq_num; a += 4)
  776. iwl_write_targ_mem(priv, a, 0);
  777. /* Tel 4965 where to find Tx byte count tables */
  778. iwl_write_prph(priv, IWL49_SCD_DRAM_BASE_ADDR,
  779. (priv->shared_phys +
  780. offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
  781. /* Disable chain mode for all queues */
  782. iwl_write_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, 0);
  783. /* Initialize each Tx queue (including the command queue) */
  784. for (i = 0; i < priv->hw_params.max_txq_num; i++) {
  785. /* TFD circular buffer read/write indexes */
  786. iwl_write_prph(priv, IWL49_SCD_QUEUE_RDPTR(i), 0);
  787. iwl_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
  788. /* Max Tx Window size for Scheduler-ACK mode */
  789. iwl_write_targ_mem(priv, priv->scd_base_addr +
  790. IWL49_SCD_CONTEXT_QUEUE_OFFSET(i),
  791. (SCD_WIN_SIZE <<
  792. IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
  793. IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
  794. /* Frame limit */
  795. iwl_write_targ_mem(priv, priv->scd_base_addr +
  796. IWL49_SCD_CONTEXT_QUEUE_OFFSET(i) +
  797. sizeof(u32),
  798. (SCD_FRAME_LIMIT <<
  799. IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
  800. IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
  801. }
  802. iwl_write_prph(priv, IWL49_SCD_INTERRUPT_MASK,
  803. (1 << priv->hw_params.max_txq_num) - 1);
  804. /* Activate all Tx DMA/FIFO channels */
  805. iwl_write_prph(priv, IWL49_SCD_TXFACT,
  806. SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
  807. iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
  808. /* Map each Tx/cmd queue to its corresponding fifo */
  809. for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
  810. int ac = default_queue_to_tx_fifo[i];
  811. iwl_txq_ctx_activate(priv, i);
  812. iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
  813. }
  814. iwl_release_nic_access(priv);
  815. spin_unlock_irqrestore(&priv->lock, flags);
  816. return ret;
  817. }
  818. #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
  819. static struct iwl_sensitivity_ranges iwl4965_sensitivity = {
  820. .min_nrg_cck = 97,
  821. .max_nrg_cck = 0,
  822. .auto_corr_min_ofdm = 85,
  823. .auto_corr_min_ofdm_mrc = 170,
  824. .auto_corr_min_ofdm_x1 = 105,
  825. .auto_corr_min_ofdm_mrc_x1 = 220,
  826. .auto_corr_max_ofdm = 120,
  827. .auto_corr_max_ofdm_mrc = 210,
  828. .auto_corr_max_ofdm_x1 = 140,
  829. .auto_corr_max_ofdm_mrc_x1 = 270,
  830. .auto_corr_min_cck = 125,
  831. .auto_corr_max_cck = 200,
  832. .auto_corr_min_cck_mrc = 200,
  833. .auto_corr_max_cck_mrc = 400,
  834. .nrg_th_cck = 100,
  835. .nrg_th_ofdm = 100,
  836. };
  837. #endif
  838. /**
  839. * iwl4965_hw_set_hw_params
  840. *
  841. * Called when initializing driver
  842. */
  843. int iwl4965_hw_set_hw_params(struct iwl_priv *priv)
  844. {
  845. if ((priv->cfg->mod_params->num_of_queues > IWL49_NUM_QUEUES) ||
  846. (priv->cfg->mod_params->num_of_queues < IWL_MIN_NUM_QUEUES)) {
  847. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  848. IWL_MIN_NUM_QUEUES, IWL49_NUM_QUEUES);
  849. return -EINVAL;
  850. }
  851. priv->hw_params.max_txq_num = priv->cfg->mod_params->num_of_queues;
  852. priv->hw_params.sw_crypto = priv->cfg->mod_params->sw_crypto;
  853. priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
  854. priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
  855. if (priv->cfg->mod_params->amsdu_size_8K)
  856. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_8K;
  857. else
  858. priv->hw_params.rx_buf_size = IWL_RX_BUF_SIZE_4K;
  859. priv->hw_params.max_pkt_size = priv->hw_params.rx_buf_size - 256;
  860. priv->hw_params.max_stations = IWL4965_STATION_COUNT;
  861. priv->hw_params.bcast_sta_id = IWL4965_BROADCAST_ID;
  862. priv->hw_params.max_data_size = IWL49_RTC_DATA_SIZE;
  863. priv->hw_params.max_inst_size = IWL49_RTC_INST_SIZE;
  864. priv->hw_params.max_bsm_size = BSM_SRAM_SIZE;
  865. priv->hw_params.fat_channel = BIT(IEEE80211_BAND_5GHZ);
  866. priv->hw_params.tx_chains_num = 2;
  867. priv->hw_params.rx_chains_num = 2;
  868. priv->hw_params.valid_tx_ant = ANT_A | ANT_B;
  869. priv->hw_params.valid_rx_ant = ANT_A | ANT_B;
  870. priv->hw_params.ct_kill_threshold = CELSIUS_TO_KELVIN(CT_KILL_THRESHOLD);
  871. #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
  872. priv->hw_params.sens = &iwl4965_sensitivity;
  873. #endif
  874. return 0;
  875. }
  876. /* set card power command */
  877. static int iwl4965_set_power(struct iwl_priv *priv,
  878. void *cmd)
  879. {
  880. int ret = 0;
  881. ret = iwl_send_cmd_pdu_async(priv, POWER_TABLE_CMD,
  882. sizeof(struct iwl4965_powertable_cmd),
  883. cmd, NULL);
  884. return ret;
  885. }
  886. int iwl4965_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
  887. {
  888. IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
  889. return -EINVAL;
  890. }
  891. static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
  892. {
  893. s32 sign = 1;
  894. if (num < 0) {
  895. sign = -sign;
  896. num = -num;
  897. }
  898. if (denom < 0) {
  899. sign = -sign;
  900. denom = -denom;
  901. }
  902. *res = 1;
  903. *res = ((num * 2 + denom) / (denom * 2)) * sign;
  904. return 1;
  905. }
  906. /**
  907. * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
  908. *
  909. * Determines power supply voltage compensation for txpower calculations.
  910. * Returns number of 1/2-dB steps to subtract from gain table index,
  911. * to compensate for difference between power supply voltage during
  912. * factory measurements, vs. current power supply voltage.
  913. *
  914. * Voltage indication is higher for lower voltage.
  915. * Lower voltage requires more gain (lower gain table index).
  916. */
  917. static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
  918. s32 current_voltage)
  919. {
  920. s32 comp = 0;
  921. if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
  922. (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
  923. return 0;
  924. iwl4965_math_div_round(current_voltage - eeprom_voltage,
  925. TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
  926. if (current_voltage > eeprom_voltage)
  927. comp *= 2;
  928. if ((comp < -2) || (comp > 2))
  929. comp = 0;
  930. return comp;
  931. }
  932. static const struct iwl_channel_info *
  933. iwl4965_get_channel_txpower_info(struct iwl_priv *priv,
  934. enum ieee80211_band band, u16 channel)
  935. {
  936. const struct iwl_channel_info *ch_info;
  937. ch_info = iwl_get_channel_info(priv, band, channel);
  938. if (!is_channel_valid(ch_info))
  939. return NULL;
  940. return ch_info;
  941. }
  942. static s32 iwl4965_get_tx_atten_grp(u16 channel)
  943. {
  944. if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
  945. channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
  946. return CALIB_CH_GROUP_5;
  947. if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
  948. channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
  949. return CALIB_CH_GROUP_1;
  950. if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
  951. channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
  952. return CALIB_CH_GROUP_2;
  953. if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
  954. channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
  955. return CALIB_CH_GROUP_3;
  956. if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
  957. channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
  958. return CALIB_CH_GROUP_4;
  959. IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
  960. return -1;
  961. }
  962. static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
  963. {
  964. s32 b = -1;
  965. for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
  966. if (priv->calib_info->band_info[b].ch_from == 0)
  967. continue;
  968. if ((channel >= priv->calib_info->band_info[b].ch_from)
  969. && (channel <= priv->calib_info->band_info[b].ch_to))
  970. break;
  971. }
  972. return b;
  973. }
  974. static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
  975. {
  976. s32 val;
  977. if (x2 == x1)
  978. return y1;
  979. else {
  980. iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
  981. return val + y2;
  982. }
  983. }
  984. /**
  985. * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
  986. *
  987. * Interpolates factory measurements from the two sample channels within a
  988. * sub-band, to apply to channel of interest. Interpolation is proportional to
  989. * differences in channel frequencies, which is proportional to differences
  990. * in channel number.
  991. */
  992. static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
  993. struct iwl_eeprom_calib_ch_info *chan_info)
  994. {
  995. s32 s = -1;
  996. u32 c;
  997. u32 m;
  998. const struct iwl_eeprom_calib_measure *m1;
  999. const struct iwl_eeprom_calib_measure *m2;
  1000. struct iwl_eeprom_calib_measure *omeas;
  1001. u32 ch_i1;
  1002. u32 ch_i2;
  1003. s = iwl4965_get_sub_band(priv, channel);
  1004. if (s >= EEPROM_TX_POWER_BANDS) {
  1005. IWL_ERROR("Tx Power can not find channel %d ", channel);
  1006. return -1;
  1007. }
  1008. ch_i1 = priv->calib_info->band_info[s].ch1.ch_num;
  1009. ch_i2 = priv->calib_info->band_info[s].ch2.ch_num;
  1010. chan_info->ch_num = (u8) channel;
  1011. IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
  1012. channel, s, ch_i1, ch_i2);
  1013. for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
  1014. for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
  1015. m1 = &(priv->calib_info->band_info[s].ch1.
  1016. measurements[c][m]);
  1017. m2 = &(priv->calib_info->band_info[s].ch2.
  1018. measurements[c][m]);
  1019. omeas = &(chan_info->measurements[c][m]);
  1020. omeas->actual_pow =
  1021. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1022. m1->actual_pow,
  1023. ch_i2,
  1024. m2->actual_pow);
  1025. omeas->gain_idx =
  1026. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1027. m1->gain_idx, ch_i2,
  1028. m2->gain_idx);
  1029. omeas->temperature =
  1030. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1031. m1->temperature,
  1032. ch_i2,
  1033. m2->temperature);
  1034. omeas->pa_det =
  1035. (s8) iwl4965_interpolate_value(channel, ch_i1,
  1036. m1->pa_det, ch_i2,
  1037. m2->pa_det);
  1038. IWL_DEBUG_TXPOWER
  1039. ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
  1040. m1->actual_pow, m2->actual_pow, omeas->actual_pow);
  1041. IWL_DEBUG_TXPOWER
  1042. ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
  1043. m1->gain_idx, m2->gain_idx, omeas->gain_idx);
  1044. IWL_DEBUG_TXPOWER
  1045. ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
  1046. m1->pa_det, m2->pa_det, omeas->pa_det);
  1047. IWL_DEBUG_TXPOWER
  1048. ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
  1049. m1->temperature, m2->temperature,
  1050. omeas->temperature);
  1051. }
  1052. }
  1053. return 0;
  1054. }
  1055. /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
  1056. * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
  1057. static s32 back_off_table[] = {
  1058. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
  1059. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
  1060. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
  1061. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
  1062. 10 /* CCK */
  1063. };
  1064. /* Thermal compensation values for txpower for various frequency ranges ...
  1065. * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
  1066. static struct iwl4965_txpower_comp_entry {
  1067. s32 degrees_per_05db_a;
  1068. s32 degrees_per_05db_a_denom;
  1069. } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
  1070. {9, 2}, /* group 0 5.2, ch 34-43 */
  1071. {4, 1}, /* group 1 5.2, ch 44-70 */
  1072. {4, 1}, /* group 2 5.2, ch 71-124 */
  1073. {4, 1}, /* group 3 5.2, ch 125-200 */
  1074. {3, 1} /* group 4 2.4, ch all */
  1075. };
  1076. static s32 get_min_power_index(s32 rate_power_index, u32 band)
  1077. {
  1078. if (!band) {
  1079. if ((rate_power_index & 7) <= 4)
  1080. return MIN_TX_GAIN_INDEX_52GHZ_EXT;
  1081. }
  1082. return MIN_TX_GAIN_INDEX;
  1083. }
  1084. struct gain_entry {
  1085. u8 dsp;
  1086. u8 radio;
  1087. };
  1088. static const struct gain_entry gain_table[2][108] = {
  1089. /* 5.2GHz power gain index table */
  1090. {
  1091. {123, 0x3F}, /* highest txpower */
  1092. {117, 0x3F},
  1093. {110, 0x3F},
  1094. {104, 0x3F},
  1095. {98, 0x3F},
  1096. {110, 0x3E},
  1097. {104, 0x3E},
  1098. {98, 0x3E},
  1099. {110, 0x3D},
  1100. {104, 0x3D},
  1101. {98, 0x3D},
  1102. {110, 0x3C},
  1103. {104, 0x3C},
  1104. {98, 0x3C},
  1105. {110, 0x3B},
  1106. {104, 0x3B},
  1107. {98, 0x3B},
  1108. {110, 0x3A},
  1109. {104, 0x3A},
  1110. {98, 0x3A},
  1111. {110, 0x39},
  1112. {104, 0x39},
  1113. {98, 0x39},
  1114. {110, 0x38},
  1115. {104, 0x38},
  1116. {98, 0x38},
  1117. {110, 0x37},
  1118. {104, 0x37},
  1119. {98, 0x37},
  1120. {110, 0x36},
  1121. {104, 0x36},
  1122. {98, 0x36},
  1123. {110, 0x35},
  1124. {104, 0x35},
  1125. {98, 0x35},
  1126. {110, 0x34},
  1127. {104, 0x34},
  1128. {98, 0x34},
  1129. {110, 0x33},
  1130. {104, 0x33},
  1131. {98, 0x33},
  1132. {110, 0x32},
  1133. {104, 0x32},
  1134. {98, 0x32},
  1135. {110, 0x31},
  1136. {104, 0x31},
  1137. {98, 0x31},
  1138. {110, 0x30},
  1139. {104, 0x30},
  1140. {98, 0x30},
  1141. {110, 0x25},
  1142. {104, 0x25},
  1143. {98, 0x25},
  1144. {110, 0x24},
  1145. {104, 0x24},
  1146. {98, 0x24},
  1147. {110, 0x23},
  1148. {104, 0x23},
  1149. {98, 0x23},
  1150. {110, 0x22},
  1151. {104, 0x18},
  1152. {98, 0x18},
  1153. {110, 0x17},
  1154. {104, 0x17},
  1155. {98, 0x17},
  1156. {110, 0x16},
  1157. {104, 0x16},
  1158. {98, 0x16},
  1159. {110, 0x15},
  1160. {104, 0x15},
  1161. {98, 0x15},
  1162. {110, 0x14},
  1163. {104, 0x14},
  1164. {98, 0x14},
  1165. {110, 0x13},
  1166. {104, 0x13},
  1167. {98, 0x13},
  1168. {110, 0x12},
  1169. {104, 0x08},
  1170. {98, 0x08},
  1171. {110, 0x07},
  1172. {104, 0x07},
  1173. {98, 0x07},
  1174. {110, 0x06},
  1175. {104, 0x06},
  1176. {98, 0x06},
  1177. {110, 0x05},
  1178. {104, 0x05},
  1179. {98, 0x05},
  1180. {110, 0x04},
  1181. {104, 0x04},
  1182. {98, 0x04},
  1183. {110, 0x03},
  1184. {104, 0x03},
  1185. {98, 0x03},
  1186. {110, 0x02},
  1187. {104, 0x02},
  1188. {98, 0x02},
  1189. {110, 0x01},
  1190. {104, 0x01},
  1191. {98, 0x01},
  1192. {110, 0x00},
  1193. {104, 0x00},
  1194. {98, 0x00},
  1195. {93, 0x00},
  1196. {88, 0x00},
  1197. {83, 0x00},
  1198. {78, 0x00},
  1199. },
  1200. /* 2.4GHz power gain index table */
  1201. {
  1202. {110, 0x3f}, /* highest txpower */
  1203. {104, 0x3f},
  1204. {98, 0x3f},
  1205. {110, 0x3e},
  1206. {104, 0x3e},
  1207. {98, 0x3e},
  1208. {110, 0x3d},
  1209. {104, 0x3d},
  1210. {98, 0x3d},
  1211. {110, 0x3c},
  1212. {104, 0x3c},
  1213. {98, 0x3c},
  1214. {110, 0x3b},
  1215. {104, 0x3b},
  1216. {98, 0x3b},
  1217. {110, 0x3a},
  1218. {104, 0x3a},
  1219. {98, 0x3a},
  1220. {110, 0x39},
  1221. {104, 0x39},
  1222. {98, 0x39},
  1223. {110, 0x38},
  1224. {104, 0x38},
  1225. {98, 0x38},
  1226. {110, 0x37},
  1227. {104, 0x37},
  1228. {98, 0x37},
  1229. {110, 0x36},
  1230. {104, 0x36},
  1231. {98, 0x36},
  1232. {110, 0x35},
  1233. {104, 0x35},
  1234. {98, 0x35},
  1235. {110, 0x34},
  1236. {104, 0x34},
  1237. {98, 0x34},
  1238. {110, 0x33},
  1239. {104, 0x33},
  1240. {98, 0x33},
  1241. {110, 0x32},
  1242. {104, 0x32},
  1243. {98, 0x32},
  1244. {110, 0x31},
  1245. {104, 0x31},
  1246. {98, 0x31},
  1247. {110, 0x30},
  1248. {104, 0x30},
  1249. {98, 0x30},
  1250. {110, 0x6},
  1251. {104, 0x6},
  1252. {98, 0x6},
  1253. {110, 0x5},
  1254. {104, 0x5},
  1255. {98, 0x5},
  1256. {110, 0x4},
  1257. {104, 0x4},
  1258. {98, 0x4},
  1259. {110, 0x3},
  1260. {104, 0x3},
  1261. {98, 0x3},
  1262. {110, 0x2},
  1263. {104, 0x2},
  1264. {98, 0x2},
  1265. {110, 0x1},
  1266. {104, 0x1},
  1267. {98, 0x1},
  1268. {110, 0x0},
  1269. {104, 0x0},
  1270. {98, 0x0},
  1271. {97, 0},
  1272. {96, 0},
  1273. {95, 0},
  1274. {94, 0},
  1275. {93, 0},
  1276. {92, 0},
  1277. {91, 0},
  1278. {90, 0},
  1279. {89, 0},
  1280. {88, 0},
  1281. {87, 0},
  1282. {86, 0},
  1283. {85, 0},
  1284. {84, 0},
  1285. {83, 0},
  1286. {82, 0},
  1287. {81, 0},
  1288. {80, 0},
  1289. {79, 0},
  1290. {78, 0},
  1291. {77, 0},
  1292. {76, 0},
  1293. {75, 0},
  1294. {74, 0},
  1295. {73, 0},
  1296. {72, 0},
  1297. {71, 0},
  1298. {70, 0},
  1299. {69, 0},
  1300. {68, 0},
  1301. {67, 0},
  1302. {66, 0},
  1303. {65, 0},
  1304. {64, 0},
  1305. {63, 0},
  1306. {62, 0},
  1307. {61, 0},
  1308. {60, 0},
  1309. {59, 0},
  1310. }
  1311. };
  1312. static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
  1313. u8 is_fat, u8 ctrl_chan_high,
  1314. struct iwl4965_tx_power_db *tx_power_tbl)
  1315. {
  1316. u8 saturation_power;
  1317. s32 target_power;
  1318. s32 user_target_power;
  1319. s32 power_limit;
  1320. s32 current_temp;
  1321. s32 reg_limit;
  1322. s32 current_regulatory;
  1323. s32 txatten_grp = CALIB_CH_GROUP_MAX;
  1324. int i;
  1325. int c;
  1326. const struct iwl_channel_info *ch_info = NULL;
  1327. struct iwl_eeprom_calib_ch_info ch_eeprom_info;
  1328. const struct iwl_eeprom_calib_measure *measurement;
  1329. s16 voltage;
  1330. s32 init_voltage;
  1331. s32 voltage_compensation;
  1332. s32 degrees_per_05db_num;
  1333. s32 degrees_per_05db_denom;
  1334. s32 factory_temp;
  1335. s32 temperature_comp[2];
  1336. s32 factory_gain_index[2];
  1337. s32 factory_actual_pwr[2];
  1338. s32 power_index;
  1339. /* Sanity check requested level (dBm) */
  1340. if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
  1341. IWL_WARNING("Requested user TXPOWER %d below limit.\n",
  1342. priv->user_txpower_limit);
  1343. return -EINVAL;
  1344. }
  1345. if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
  1346. IWL_WARNING("Requested user TXPOWER %d above limit.\n",
  1347. priv->user_txpower_limit);
  1348. return -EINVAL;
  1349. }
  1350. /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
  1351. * are used for indexing into txpower table) */
  1352. user_target_power = 2 * priv->user_txpower_limit;
  1353. /* Get current (RXON) channel, band, width */
  1354. ch_info =
  1355. iwl4965_get_channel_txpower_info(priv, priv->band, channel);
  1356. IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
  1357. is_fat);
  1358. if (!ch_info)
  1359. return -EINVAL;
  1360. /* get txatten group, used to select 1) thermal txpower adjustment
  1361. * and 2) mimo txpower balance between Tx chains. */
  1362. txatten_grp = iwl4965_get_tx_atten_grp(channel);
  1363. if (txatten_grp < 0)
  1364. return -EINVAL;
  1365. IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
  1366. channel, txatten_grp);
  1367. if (is_fat) {
  1368. if (ctrl_chan_high)
  1369. channel -= 2;
  1370. else
  1371. channel += 2;
  1372. }
  1373. /* hardware txpower limits ...
  1374. * saturation (clipping distortion) txpowers are in half-dBm */
  1375. if (band)
  1376. saturation_power = priv->calib_info->saturation_power24;
  1377. else
  1378. saturation_power = priv->calib_info->saturation_power52;
  1379. if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
  1380. saturation_power > IWL_TX_POWER_SATURATION_MAX) {
  1381. if (band)
  1382. saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
  1383. else
  1384. saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
  1385. }
  1386. /* regulatory txpower limits ... reg_limit values are in half-dBm,
  1387. * max_power_avg values are in dBm, convert * 2 */
  1388. if (is_fat)
  1389. reg_limit = ch_info->fat_max_power_avg * 2;
  1390. else
  1391. reg_limit = ch_info->max_power_avg * 2;
  1392. if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
  1393. (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
  1394. if (band)
  1395. reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
  1396. else
  1397. reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
  1398. }
  1399. /* Interpolate txpower calibration values for this channel,
  1400. * based on factory calibration tests on spaced channels. */
  1401. iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
  1402. /* calculate tx gain adjustment based on power supply voltage */
  1403. voltage = priv->calib_info->voltage;
  1404. init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
  1405. voltage_compensation =
  1406. iwl4965_get_voltage_compensation(voltage, init_voltage);
  1407. IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
  1408. init_voltage,
  1409. voltage, voltage_compensation);
  1410. /* get current temperature (Celsius) */
  1411. current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
  1412. current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
  1413. current_temp = KELVIN_TO_CELSIUS(current_temp);
  1414. /* select thermal txpower adjustment params, based on channel group
  1415. * (same frequency group used for mimo txatten adjustment) */
  1416. degrees_per_05db_num =
  1417. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
  1418. degrees_per_05db_denom =
  1419. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
  1420. /* get per-chain txpower values from factory measurements */
  1421. for (c = 0; c < 2; c++) {
  1422. measurement = &ch_eeprom_info.measurements[c][1];
  1423. /* txgain adjustment (in half-dB steps) based on difference
  1424. * between factory and current temperature */
  1425. factory_temp = measurement->temperature;
  1426. iwl4965_math_div_round((current_temp - factory_temp) *
  1427. degrees_per_05db_denom,
  1428. degrees_per_05db_num,
  1429. &temperature_comp[c]);
  1430. factory_gain_index[c] = measurement->gain_idx;
  1431. factory_actual_pwr[c] = measurement->actual_pow;
  1432. IWL_DEBUG_TXPOWER("chain = %d\n", c);
  1433. IWL_DEBUG_TXPOWER("fctry tmp %d, "
  1434. "curr tmp %d, comp %d steps\n",
  1435. factory_temp, current_temp,
  1436. temperature_comp[c]);
  1437. IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
  1438. factory_gain_index[c],
  1439. factory_actual_pwr[c]);
  1440. }
  1441. /* for each of 33 bit-rates (including 1 for CCK) */
  1442. for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
  1443. u8 is_mimo_rate;
  1444. union iwl4965_tx_power_dual_stream tx_power;
  1445. /* for mimo, reduce each chain's txpower by half
  1446. * (3dB, 6 steps), so total output power is regulatory
  1447. * compliant. */
  1448. if (i & 0x8) {
  1449. current_regulatory = reg_limit -
  1450. IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
  1451. is_mimo_rate = 1;
  1452. } else {
  1453. current_regulatory = reg_limit;
  1454. is_mimo_rate = 0;
  1455. }
  1456. /* find txpower limit, either hardware or regulatory */
  1457. power_limit = saturation_power - back_off_table[i];
  1458. if (power_limit > current_regulatory)
  1459. power_limit = current_regulatory;
  1460. /* reduce user's txpower request if necessary
  1461. * for this rate on this channel */
  1462. target_power = user_target_power;
  1463. if (target_power > power_limit)
  1464. target_power = power_limit;
  1465. IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
  1466. i, saturation_power - back_off_table[i],
  1467. current_regulatory, user_target_power,
  1468. target_power);
  1469. /* for each of 2 Tx chains (radio transmitters) */
  1470. for (c = 0; c < 2; c++) {
  1471. s32 atten_value;
  1472. if (is_mimo_rate)
  1473. atten_value =
  1474. (s32)le32_to_cpu(priv->card_alive_init.
  1475. tx_atten[txatten_grp][c]);
  1476. else
  1477. atten_value = 0;
  1478. /* calculate index; higher index means lower txpower */
  1479. power_index = (u8) (factory_gain_index[c] -
  1480. (target_power -
  1481. factory_actual_pwr[c]) -
  1482. temperature_comp[c] -
  1483. voltage_compensation +
  1484. atten_value);
  1485. /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
  1486. power_index); */
  1487. if (power_index < get_min_power_index(i, band))
  1488. power_index = get_min_power_index(i, band);
  1489. /* adjust 5 GHz index to support negative indexes */
  1490. if (!band)
  1491. power_index += 9;
  1492. /* CCK, rate 32, reduce txpower for CCK */
  1493. if (i == POWER_TABLE_CCK_ENTRY)
  1494. power_index +=
  1495. IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
  1496. /* stay within the table! */
  1497. if (power_index > 107) {
  1498. IWL_WARNING("txpower index %d > 107\n",
  1499. power_index);
  1500. power_index = 107;
  1501. }
  1502. if (power_index < 0) {
  1503. IWL_WARNING("txpower index %d < 0\n",
  1504. power_index);
  1505. power_index = 0;
  1506. }
  1507. /* fill txpower command for this rate/chain */
  1508. tx_power.s.radio_tx_gain[c] =
  1509. gain_table[band][power_index].radio;
  1510. tx_power.s.dsp_predis_atten[c] =
  1511. gain_table[band][power_index].dsp;
  1512. IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
  1513. "gain 0x%02x dsp %d\n",
  1514. c, atten_value, power_index,
  1515. tx_power.s.radio_tx_gain[c],
  1516. tx_power.s.dsp_predis_atten[c]);
  1517. }/* for each chain */
  1518. tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
  1519. }/* for each rate */
  1520. return 0;
  1521. }
  1522. /**
  1523. * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
  1524. *
  1525. * Uses the active RXON for channel, band, and characteristics (fat, high)
  1526. * The power limit is taken from priv->user_txpower_limit.
  1527. */
  1528. int iwl4965_hw_reg_send_txpower(struct iwl_priv *priv)
  1529. {
  1530. struct iwl4965_txpowertable_cmd cmd = { 0 };
  1531. int ret;
  1532. u8 band = 0;
  1533. u8 is_fat = 0;
  1534. u8 ctrl_chan_high = 0;
  1535. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1536. /* If this gets hit a lot, switch it to a BUG() and catch
  1537. * the stack trace to find out who is calling this during
  1538. * a scan. */
  1539. IWL_WARNING("TX Power requested while scanning!\n");
  1540. return -EAGAIN;
  1541. }
  1542. band = priv->band == IEEE80211_BAND_2GHZ;
  1543. is_fat = is_fat_channel(priv->active_rxon.flags);
  1544. if (is_fat &&
  1545. (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  1546. ctrl_chan_high = 1;
  1547. cmd.band = band;
  1548. cmd.channel = priv->active_rxon.channel;
  1549. ret = iwl4965_fill_txpower_tbl(priv, band,
  1550. le16_to_cpu(priv->active_rxon.channel),
  1551. is_fat, ctrl_chan_high, &cmd.tx_power);
  1552. if (ret)
  1553. goto out;
  1554. ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
  1555. out:
  1556. return ret;
  1557. }
  1558. static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
  1559. {
  1560. int ret = 0;
  1561. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  1562. const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
  1563. const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
  1564. if ((rxon1->flags == rxon2->flags) &&
  1565. (rxon1->filter_flags == rxon2->filter_flags) &&
  1566. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  1567. (rxon1->ofdm_ht_single_stream_basic_rates ==
  1568. rxon2->ofdm_ht_single_stream_basic_rates) &&
  1569. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  1570. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  1571. (rxon1->rx_chain == rxon2->rx_chain) &&
  1572. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  1573. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  1574. return 0;
  1575. }
  1576. rxon_assoc.flags = priv->staging_rxon.flags;
  1577. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  1578. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  1579. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  1580. rxon_assoc.reserved = 0;
  1581. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  1582. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  1583. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  1584. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  1585. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  1586. ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
  1587. sizeof(rxon_assoc), &rxon_assoc, NULL);
  1588. if (ret)
  1589. return ret;
  1590. return ret;
  1591. }
  1592. int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
  1593. {
  1594. int rc;
  1595. u8 band = 0;
  1596. u8 is_fat = 0;
  1597. u8 ctrl_chan_high = 0;
  1598. struct iwl4965_channel_switch_cmd cmd = { 0 };
  1599. const struct iwl_channel_info *ch_info;
  1600. band = priv->band == IEEE80211_BAND_2GHZ;
  1601. ch_info = iwl_get_channel_info(priv, priv->band, channel);
  1602. is_fat = is_fat_channel(priv->staging_rxon.flags);
  1603. if (is_fat &&
  1604. (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  1605. ctrl_chan_high = 1;
  1606. cmd.band = band;
  1607. cmd.expect_beacon = 0;
  1608. cmd.channel = cpu_to_le16(channel);
  1609. cmd.rxon_flags = priv->active_rxon.flags;
  1610. cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
  1611. cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
  1612. if (ch_info)
  1613. cmd.expect_beacon = is_channel_radar(ch_info);
  1614. else
  1615. cmd.expect_beacon = 1;
  1616. rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
  1617. ctrl_chan_high, &cmd.tx_power);
  1618. if (rc) {
  1619. IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
  1620. return rc;
  1621. }
  1622. rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
  1623. return rc;
  1624. }
  1625. static int iwl4965_shared_mem_rx_idx(struct iwl_priv *priv)
  1626. {
  1627. struct iwl4965_shared *s = priv->shared_virt;
  1628. return le32_to_cpu(s->rb_closed) & 0xFFF;
  1629. }
  1630. int iwl4965_hw_get_temperature(struct iwl_priv *priv)
  1631. {
  1632. return priv->temperature;
  1633. }
  1634. unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
  1635. struct iwl_frame *frame, u8 rate)
  1636. {
  1637. struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
  1638. unsigned int frame_size;
  1639. tx_beacon_cmd = &frame->u.beacon;
  1640. memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
  1641. tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id;
  1642. tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1643. frame_size = iwl4965_fill_beacon_frame(priv,
  1644. tx_beacon_cmd->frame,
  1645. iwl_bcast_addr,
  1646. sizeof(frame->u) - sizeof(*tx_beacon_cmd));
  1647. BUG_ON(frame_size > MAX_MPDU_SIZE);
  1648. tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
  1649. if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
  1650. tx_beacon_cmd->tx.rate_n_flags =
  1651. iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
  1652. else
  1653. tx_beacon_cmd->tx.rate_n_flags =
  1654. iwl4965_hw_set_rate_n_flags(rate, 0);
  1655. tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
  1656. TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
  1657. return (sizeof(*tx_beacon_cmd) + frame_size);
  1658. }
  1659. static int iwl4965_alloc_shared_mem(struct iwl_priv *priv)
  1660. {
  1661. priv->shared_virt = pci_alloc_consistent(priv->pci_dev,
  1662. sizeof(struct iwl4965_shared),
  1663. &priv->shared_phys);
  1664. if (!priv->shared_virt)
  1665. return -ENOMEM;
  1666. memset(priv->shared_virt, 0, sizeof(struct iwl4965_shared));
  1667. priv->rb_closed_offset = offsetof(struct iwl4965_shared, rb_closed);
  1668. return 0;
  1669. }
  1670. static void iwl4965_free_shared_mem(struct iwl_priv *priv)
  1671. {
  1672. if (priv->shared_virt)
  1673. pci_free_consistent(priv->pci_dev,
  1674. sizeof(struct iwl4965_shared),
  1675. priv->shared_virt,
  1676. priv->shared_phys);
  1677. }
  1678. /**
  1679. * iwl4965_txq_update_byte_cnt_tbl - Set up entry in Tx byte-count array
  1680. */
  1681. static void iwl4965_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
  1682. struct iwl_tx_queue *txq,
  1683. u16 byte_cnt)
  1684. {
  1685. int len;
  1686. int txq_id = txq->q.id;
  1687. struct iwl4965_shared *shared_data = priv->shared_virt;
  1688. len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
  1689. /* Set up byte count within first 256 entries */
  1690. IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
  1691. tfd_offset[txq->q.write_ptr], byte_cnt, len);
  1692. /* If within first 64 entries, duplicate at end */
  1693. if (txq->q.write_ptr < IWL49_MAX_WIN_SIZE)
  1694. IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
  1695. tfd_offset[IWL49_QUEUE_SIZE + txq->q.write_ptr],
  1696. byte_cnt, len);
  1697. }
  1698. /**
  1699. * sign_extend - Sign extend a value using specified bit as sign-bit
  1700. *
  1701. * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
  1702. * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
  1703. *
  1704. * @param oper value to sign extend
  1705. * @param index 0 based bit index (0<=index<32) to sign bit
  1706. */
  1707. static s32 sign_extend(u32 oper, int index)
  1708. {
  1709. u8 shift = 31 - index;
  1710. return (s32)(oper << shift) >> shift;
  1711. }
  1712. /**
  1713. * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
  1714. * @statistics: Provides the temperature reading from the uCode
  1715. *
  1716. * A return of <0 indicates bogus data in the statistics
  1717. */
  1718. int iwl4965_get_temperature(const struct iwl_priv *priv)
  1719. {
  1720. s32 temperature;
  1721. s32 vt;
  1722. s32 R1, R2, R3;
  1723. u32 R4;
  1724. if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
  1725. (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
  1726. IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
  1727. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
  1728. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
  1729. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
  1730. R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
  1731. } else {
  1732. IWL_DEBUG_TEMP("Running temperature calibration\n");
  1733. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
  1734. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
  1735. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
  1736. R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
  1737. }
  1738. /*
  1739. * Temperature is only 23 bits, so sign extend out to 32.
  1740. *
  1741. * NOTE If we haven't received a statistics notification yet
  1742. * with an updated temperature, use R4 provided to us in the
  1743. * "initialize" ALIVE response.
  1744. */
  1745. if (!test_bit(STATUS_TEMPERATURE, &priv->status))
  1746. vt = sign_extend(R4, 23);
  1747. else
  1748. vt = sign_extend(
  1749. le32_to_cpu(priv->statistics.general.temperature), 23);
  1750. IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
  1751. R1, R2, R3, vt);
  1752. if (R3 == R1) {
  1753. IWL_ERROR("Calibration conflict R1 == R3\n");
  1754. return -1;
  1755. }
  1756. /* Calculate temperature in degrees Kelvin, adjust by 97%.
  1757. * Add offset to center the adjustment around 0 degrees Centigrade. */
  1758. temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
  1759. temperature /= (R3 - R1);
  1760. temperature = (temperature * 97) / 100 +
  1761. TEMPERATURE_CALIB_KELVIN_OFFSET;
  1762. IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
  1763. KELVIN_TO_CELSIUS(temperature));
  1764. return temperature;
  1765. }
  1766. /* Adjust Txpower only if temperature variance is greater than threshold. */
  1767. #define IWL_TEMPERATURE_THRESHOLD 3
  1768. /**
  1769. * iwl4965_is_temp_calib_needed - determines if new calibration is needed
  1770. *
  1771. * If the temperature changed has changed sufficiently, then a recalibration
  1772. * is needed.
  1773. *
  1774. * Assumes caller will replace priv->last_temperature once calibration
  1775. * executed.
  1776. */
  1777. static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
  1778. {
  1779. int temp_diff;
  1780. if (!test_bit(STATUS_STATISTICS, &priv->status)) {
  1781. IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
  1782. return 0;
  1783. }
  1784. temp_diff = priv->temperature - priv->last_temperature;
  1785. /* get absolute value */
  1786. if (temp_diff < 0) {
  1787. IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
  1788. temp_diff = -temp_diff;
  1789. } else if (temp_diff == 0)
  1790. IWL_DEBUG_POWER("Same temp, \n");
  1791. else
  1792. IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
  1793. if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
  1794. IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
  1795. return 0;
  1796. }
  1797. IWL_DEBUG_POWER("Thermal txpower calib needed\n");
  1798. return 1;
  1799. }
  1800. /* Calculate noise level, based on measurements during network silence just
  1801. * before arriving beacon. This measurement can be done only if we know
  1802. * exactly when to expect beacons, therefore only when we're associated. */
  1803. static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
  1804. {
  1805. struct statistics_rx_non_phy *rx_info
  1806. = &(priv->statistics.rx.general);
  1807. int num_active_rx = 0;
  1808. int total_silence = 0;
  1809. int bcn_silence_a =
  1810. le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
  1811. int bcn_silence_b =
  1812. le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
  1813. int bcn_silence_c =
  1814. le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
  1815. if (bcn_silence_a) {
  1816. total_silence += bcn_silence_a;
  1817. num_active_rx++;
  1818. }
  1819. if (bcn_silence_b) {
  1820. total_silence += bcn_silence_b;
  1821. num_active_rx++;
  1822. }
  1823. if (bcn_silence_c) {
  1824. total_silence += bcn_silence_c;
  1825. num_active_rx++;
  1826. }
  1827. /* Average among active antennas */
  1828. if (num_active_rx)
  1829. priv->last_rx_noise = (total_silence / num_active_rx) - 107;
  1830. else
  1831. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  1832. IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
  1833. bcn_silence_a, bcn_silence_b, bcn_silence_c,
  1834. priv->last_rx_noise);
  1835. }
  1836. void iwl4965_hw_rx_statistics(struct iwl_priv *priv,
  1837. struct iwl_rx_mem_buffer *rxb)
  1838. {
  1839. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1840. int change;
  1841. s32 temp;
  1842. IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
  1843. (int)sizeof(priv->statistics), pkt->len);
  1844. change = ((priv->statistics.general.temperature !=
  1845. pkt->u.stats.general.temperature) ||
  1846. ((priv->statistics.flag &
  1847. STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
  1848. (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
  1849. memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
  1850. set_bit(STATUS_STATISTICS, &priv->status);
  1851. /* Reschedule the statistics timer to occur in
  1852. * REG_RECALIB_PERIOD seconds to ensure we get a
  1853. * thermal update even if the uCode doesn't give
  1854. * us one */
  1855. mod_timer(&priv->statistics_periodic, jiffies +
  1856. msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
  1857. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  1858. (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
  1859. iwl4965_rx_calc_noise(priv);
  1860. #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
  1861. queue_work(priv->workqueue, &priv->sensitivity_work);
  1862. #endif
  1863. }
  1864. iwl_leds_background(priv);
  1865. /* If the hardware hasn't reported a change in
  1866. * temperature then don't bother computing a
  1867. * calibrated temperature value */
  1868. if (!change)
  1869. return;
  1870. temp = iwl4965_get_temperature(priv);
  1871. if (temp < 0)
  1872. return;
  1873. if (priv->temperature != temp) {
  1874. if (priv->temperature)
  1875. IWL_DEBUG_TEMP("Temperature changed "
  1876. "from %dC to %dC\n",
  1877. KELVIN_TO_CELSIUS(priv->temperature),
  1878. KELVIN_TO_CELSIUS(temp));
  1879. else
  1880. IWL_DEBUG_TEMP("Temperature "
  1881. "initialized to %dC\n",
  1882. KELVIN_TO_CELSIUS(temp));
  1883. }
  1884. priv->temperature = temp;
  1885. set_bit(STATUS_TEMPERATURE, &priv->status);
  1886. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  1887. iwl4965_is_temp_calib_needed(priv))
  1888. queue_work(priv->workqueue, &priv->txpower_work);
  1889. }
  1890. static void iwl4965_add_radiotap(struct iwl_priv *priv,
  1891. struct sk_buff *skb,
  1892. struct iwl4965_rx_phy_res *rx_start,
  1893. struct ieee80211_rx_status *stats,
  1894. u32 ampdu_status)
  1895. {
  1896. s8 signal = stats->signal;
  1897. s8 noise = 0;
  1898. int rate = stats->rate_idx;
  1899. u64 tsf = stats->mactime;
  1900. __le16 antenna;
  1901. __le16 phy_flags_hw = rx_start->phy_flags;
  1902. struct iwl4965_rt_rx_hdr {
  1903. struct ieee80211_radiotap_header rt_hdr;
  1904. __le64 rt_tsf; /* TSF */
  1905. u8 rt_flags; /* radiotap packet flags */
  1906. u8 rt_rate; /* rate in 500kb/s */
  1907. __le16 rt_channelMHz; /* channel in MHz */
  1908. __le16 rt_chbitmask; /* channel bitfield */
  1909. s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
  1910. s8 rt_dbmnoise;
  1911. u8 rt_antenna; /* antenna number */
  1912. } __attribute__ ((packed)) *iwl4965_rt;
  1913. /* TODO: We won't have enough headroom for HT frames. Fix it later. */
  1914. if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
  1915. if (net_ratelimit())
  1916. printk(KERN_ERR "not enough headroom [%d] for "
  1917. "radiotap head [%zd]\n",
  1918. skb_headroom(skb), sizeof(*iwl4965_rt));
  1919. return;
  1920. }
  1921. /* put radiotap header in front of 802.11 header and data */
  1922. iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
  1923. /* initialise radiotap header */
  1924. iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  1925. iwl4965_rt->rt_hdr.it_pad = 0;
  1926. /* total header + data */
  1927. put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
  1928. &iwl4965_rt->rt_hdr.it_len);
  1929. /* Indicate all the fields we add to the radiotap header */
  1930. put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  1931. (1 << IEEE80211_RADIOTAP_FLAGS) |
  1932. (1 << IEEE80211_RADIOTAP_RATE) |
  1933. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  1934. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  1935. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  1936. (1 << IEEE80211_RADIOTAP_ANTENNA)),
  1937. &iwl4965_rt->rt_hdr.it_present);
  1938. /* Zero the flags, we'll add to them as we go */
  1939. iwl4965_rt->rt_flags = 0;
  1940. put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
  1941. iwl4965_rt->rt_dbmsignal = signal;
  1942. iwl4965_rt->rt_dbmnoise = noise;
  1943. /* Convert the channel frequency and set the flags */
  1944. put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
  1945. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  1946. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  1947. IEEE80211_CHAN_5GHZ),
  1948. &iwl4965_rt->rt_chbitmask);
  1949. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  1950. put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
  1951. IEEE80211_CHAN_2GHZ),
  1952. &iwl4965_rt->rt_chbitmask);
  1953. else /* 802.11g */
  1954. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  1955. IEEE80211_CHAN_2GHZ),
  1956. &iwl4965_rt->rt_chbitmask);
  1957. if (rate == -1)
  1958. iwl4965_rt->rt_rate = 0;
  1959. else
  1960. iwl4965_rt->rt_rate = iwl_rates[rate].ieee;
  1961. /*
  1962. * "antenna number"
  1963. *
  1964. * It seems that the antenna field in the phy flags value
  1965. * is actually a bitfield. This is undefined by radiotap,
  1966. * it wants an actual antenna number but I always get "7"
  1967. * for most legacy frames I receive indicating that the
  1968. * same frame was received on all three RX chains.
  1969. *
  1970. * I think this field should be removed in favour of a
  1971. * new 802.11n radiotap field "RX chains" that is defined
  1972. * as a bitmask.
  1973. */
  1974. antenna = phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK;
  1975. iwl4965_rt->rt_antenna = le16_to_cpu(antenna) >> 4;
  1976. /* set the preamble flag if appropriate */
  1977. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  1978. iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  1979. stats->flag |= RX_FLAG_RADIOTAP;
  1980. }
  1981. static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  1982. {
  1983. /* 0 - mgmt, 1 - cnt, 2 - data */
  1984. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  1985. priv->rx_stats[idx].cnt++;
  1986. priv->rx_stats[idx].bytes += len;
  1987. }
  1988. /*
  1989. * returns non-zero if packet should be dropped
  1990. */
  1991. static int iwl4965_set_decrypted_flag(struct iwl_priv *priv,
  1992. struct ieee80211_hdr *hdr,
  1993. u32 decrypt_res,
  1994. struct ieee80211_rx_status *stats)
  1995. {
  1996. u16 fc = le16_to_cpu(hdr->frame_control);
  1997. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  1998. return 0;
  1999. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2000. return 0;
  2001. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2002. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2003. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2004. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2005. * Decryption will be done in SW. */
  2006. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2007. RX_RES_STATUS_BAD_KEY_TTAK)
  2008. break;
  2009. case RX_RES_STATUS_SEC_TYPE_WEP:
  2010. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2011. RX_RES_STATUS_BAD_ICV_MIC) {
  2012. /* bad ICV, the packet is destroyed since the
  2013. * decryption is inplace, drop it */
  2014. IWL_DEBUG_RX("Packet destroyed\n");
  2015. return -1;
  2016. }
  2017. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2018. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2019. RX_RES_STATUS_DECRYPT_OK) {
  2020. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2021. stats->flag |= RX_FLAG_DECRYPTED;
  2022. }
  2023. break;
  2024. default:
  2025. break;
  2026. }
  2027. return 0;
  2028. }
  2029. static u32 iwl4965_translate_rx_status(struct iwl_priv *priv, u32 decrypt_in)
  2030. {
  2031. u32 decrypt_out = 0;
  2032. if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
  2033. RX_RES_STATUS_STATION_FOUND)
  2034. decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
  2035. RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
  2036. decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
  2037. /* packet was not encrypted */
  2038. if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
  2039. RX_RES_STATUS_SEC_TYPE_NONE)
  2040. return decrypt_out;
  2041. /* packet was encrypted with unknown alg */
  2042. if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
  2043. RX_RES_STATUS_SEC_TYPE_ERR)
  2044. return decrypt_out;
  2045. /* decryption was not done in HW */
  2046. if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
  2047. RX_MPDU_RES_STATUS_DEC_DONE_MSK)
  2048. return decrypt_out;
  2049. switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
  2050. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2051. /* alg is CCM: check MIC only */
  2052. if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
  2053. /* Bad MIC */
  2054. decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
  2055. else
  2056. decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
  2057. break;
  2058. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2059. if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
  2060. /* Bad TTAK */
  2061. decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
  2062. break;
  2063. }
  2064. /* fall through if TTAK OK */
  2065. default:
  2066. if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
  2067. decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
  2068. else
  2069. decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
  2070. break;
  2071. };
  2072. IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
  2073. decrypt_in, decrypt_out);
  2074. return decrypt_out;
  2075. }
  2076. static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
  2077. int include_phy,
  2078. struct iwl_rx_mem_buffer *rxb,
  2079. struct ieee80211_rx_status *stats)
  2080. {
  2081. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2082. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  2083. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
  2084. struct ieee80211_hdr *hdr;
  2085. u16 len;
  2086. __le32 *rx_end;
  2087. unsigned int skblen;
  2088. u32 ampdu_status;
  2089. u32 ampdu_status_legacy;
  2090. if (!include_phy && priv->last_phy_res[0])
  2091. rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  2092. if (!rx_start) {
  2093. IWL_ERROR("MPDU frame without a PHY data\n");
  2094. return;
  2095. }
  2096. if (include_phy) {
  2097. hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
  2098. rx_start->cfg_phy_cnt);
  2099. len = le16_to_cpu(rx_start->byte_count);
  2100. rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
  2101. sizeof(struct iwl4965_rx_phy_res) +
  2102. rx_start->cfg_phy_cnt + len);
  2103. } else {
  2104. struct iwl4965_rx_mpdu_res_start *amsdu =
  2105. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  2106. hdr = (struct ieee80211_hdr *)(pkt->u.raw +
  2107. sizeof(struct iwl4965_rx_mpdu_res_start));
  2108. len = le16_to_cpu(amsdu->byte_count);
  2109. rx_start->byte_count = amsdu->byte_count;
  2110. rx_end = (__le32 *) (((u8 *) hdr) + len);
  2111. }
  2112. /* In monitor mode allow 802.11 ACk frames (10 bytes) */
  2113. if (len > priv->hw_params.max_pkt_size ||
  2114. len < ((priv->iw_mode == IEEE80211_IF_TYPE_MNTR) ? 10 : 16)) {
  2115. IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
  2116. return;
  2117. }
  2118. ampdu_status = le32_to_cpu(*rx_end);
  2119. skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
  2120. if (!include_phy) {
  2121. /* New status scheme, need to translate */
  2122. ampdu_status_legacy = ampdu_status;
  2123. ampdu_status = iwl4965_translate_rx_status(priv, ampdu_status);
  2124. }
  2125. /* start from MAC */
  2126. skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
  2127. skb_put(rxb->skb, len); /* end where data ends */
  2128. /* We only process data packets if the interface is open */
  2129. if (unlikely(!priv->is_open)) {
  2130. IWL_DEBUG_DROP_LIMIT
  2131. ("Dropping packet while interface is not open.\n");
  2132. return;
  2133. }
  2134. stats->flag = 0;
  2135. hdr = (struct ieee80211_hdr *)rxb->skb->data;
  2136. /* in case of HW accelerated crypto and bad decryption, drop */
  2137. if (!priv->hw_params.sw_crypto &&
  2138. iwl4965_set_decrypted_flag(priv, hdr, ampdu_status, stats))
  2139. return;
  2140. if (priv->add_radiotap)
  2141. iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
  2142. iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
  2143. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2144. priv->alloc_rxb_skb--;
  2145. rxb->skb = NULL;
  2146. }
  2147. /* Calc max signal level (dBm) among 3 possible receivers */
  2148. static int iwl4965_calc_rssi(struct iwl_priv *priv,
  2149. struct iwl4965_rx_phy_res *rx_resp)
  2150. {
  2151. /* data from PHY/DSP regarding signal strength, etc.,
  2152. * contents are always there, not configurable by host. */
  2153. struct iwl4965_rx_non_cfg_phy *ncphy =
  2154. (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
  2155. u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
  2156. >> IWL_AGC_DB_POS;
  2157. u32 valid_antennae =
  2158. (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
  2159. >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
  2160. u8 max_rssi = 0;
  2161. u32 i;
  2162. /* Find max rssi among 3 possible receivers.
  2163. * These values are measured by the digital signal processor (DSP).
  2164. * They should stay fairly constant even as the signal strength varies,
  2165. * if the radio's automatic gain control (AGC) is working right.
  2166. * AGC value (see below) will provide the "interesting" info. */
  2167. for (i = 0; i < 3; i++)
  2168. if (valid_antennae & (1 << i))
  2169. max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
  2170. IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
  2171. ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
  2172. max_rssi, agc);
  2173. /* dBm = max_rssi dB - agc dB - constant.
  2174. * Higher AGC (higher radio gain) means lower signal. */
  2175. return (max_rssi - agc - IWL_RSSI_OFFSET);
  2176. }
  2177. static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
  2178. {
  2179. unsigned long flags;
  2180. spin_lock_irqsave(&priv->sta_lock, flags);
  2181. priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
  2182. priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
  2183. priv->stations[sta_id].sta.sta.modify_mask = 0;
  2184. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  2185. spin_unlock_irqrestore(&priv->sta_lock, flags);
  2186. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  2187. }
  2188. static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
  2189. {
  2190. /* FIXME: need locking over ps_status ??? */
  2191. u8 sta_id = iwl_find_station(priv, addr);
  2192. if (sta_id != IWL_INVALID_STATION) {
  2193. u8 sta_awake = priv->stations[sta_id].
  2194. ps_status == STA_PS_STATUS_WAKE;
  2195. if (sta_awake && ps_bit)
  2196. priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
  2197. else if (!sta_awake && !ps_bit) {
  2198. iwl4965_sta_modify_ps_wake(priv, sta_id);
  2199. priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
  2200. }
  2201. }
  2202. }
  2203. #ifdef CONFIG_IWLWIFI_DEBUG
  2204. /**
  2205. * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
  2206. *
  2207. * You may hack this function to show different aspects of received frames,
  2208. * including selective frame dumps.
  2209. * group100 parameter selects whether to show 1 out of 100 good frames.
  2210. *
  2211. * TODO: This was originally written for 3945, need to audit for
  2212. * proper operation with 4965.
  2213. */
  2214. static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
  2215. struct iwl_rx_packet *pkt,
  2216. struct ieee80211_hdr *header, int group100)
  2217. {
  2218. u32 to_us;
  2219. u32 print_summary = 0;
  2220. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  2221. u32 hundred = 0;
  2222. u32 dataframe = 0;
  2223. u16 fc;
  2224. u16 seq_ctl;
  2225. u16 channel;
  2226. u16 phy_flags;
  2227. int rate_sym;
  2228. u16 length;
  2229. u16 status;
  2230. u16 bcn_tmr;
  2231. u32 tsf_low;
  2232. u64 tsf;
  2233. u8 rssi;
  2234. u8 agc;
  2235. u16 sig_avg;
  2236. u16 noise_diff;
  2237. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  2238. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  2239. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  2240. u8 *data = IWL_RX_DATA(pkt);
  2241. if (likely(!(priv->debug_level & IWL_DL_RX)))
  2242. return;
  2243. /* MAC header */
  2244. fc = le16_to_cpu(header->frame_control);
  2245. seq_ctl = le16_to_cpu(header->seq_ctrl);
  2246. /* metadata */
  2247. channel = le16_to_cpu(rx_hdr->channel);
  2248. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  2249. rate_sym = rx_hdr->rate;
  2250. length = le16_to_cpu(rx_hdr->len);
  2251. /* end-of-frame status and timestamp */
  2252. status = le32_to_cpu(rx_end->status);
  2253. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  2254. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  2255. tsf = le64_to_cpu(rx_end->timestamp);
  2256. /* signal statistics */
  2257. rssi = rx_stats->rssi;
  2258. agc = rx_stats->agc;
  2259. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  2260. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  2261. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  2262. /* if data frame is to us and all is good,
  2263. * (optionally) print summary for only 1 out of every 100 */
  2264. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  2265. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  2266. dataframe = 1;
  2267. if (!group100)
  2268. print_summary = 1; /* print each frame */
  2269. else if (priv->framecnt_to_us < 100) {
  2270. priv->framecnt_to_us++;
  2271. print_summary = 0;
  2272. } else {
  2273. priv->framecnt_to_us = 0;
  2274. print_summary = 1;
  2275. hundred = 1;
  2276. }
  2277. } else {
  2278. /* print summary for all other frames */
  2279. print_summary = 1;
  2280. }
  2281. if (print_summary) {
  2282. char *title;
  2283. int rate_idx;
  2284. u32 bitrate;
  2285. if (hundred)
  2286. title = "100Frames";
  2287. else if (fc & IEEE80211_FCTL_RETRY)
  2288. title = "Retry";
  2289. else if (ieee80211_is_assoc_response(fc))
  2290. title = "AscRsp";
  2291. else if (ieee80211_is_reassoc_response(fc))
  2292. title = "RasRsp";
  2293. else if (ieee80211_is_probe_response(fc)) {
  2294. title = "PrbRsp";
  2295. print_dump = 1; /* dump frame contents */
  2296. } else if (ieee80211_is_beacon(fc)) {
  2297. title = "Beacon";
  2298. print_dump = 1; /* dump frame contents */
  2299. } else if (ieee80211_is_atim(fc))
  2300. title = "ATIM";
  2301. else if (ieee80211_is_auth(fc))
  2302. title = "Auth";
  2303. else if (ieee80211_is_deauth(fc))
  2304. title = "DeAuth";
  2305. else if (ieee80211_is_disassoc(fc))
  2306. title = "DisAssoc";
  2307. else
  2308. title = "Frame";
  2309. rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
  2310. if (unlikely(rate_idx == -1))
  2311. bitrate = 0;
  2312. else
  2313. bitrate = iwl_rates[rate_idx].ieee / 2;
  2314. /* print frame summary.
  2315. * MAC addresses show just the last byte (for brevity),
  2316. * but you can hack it to show more, if you'd like to. */
  2317. if (dataframe)
  2318. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  2319. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  2320. title, fc, header->addr1[5],
  2321. length, rssi, channel, bitrate);
  2322. else {
  2323. /* src/dst addresses assume managed mode */
  2324. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  2325. "src=0x%02x, rssi=%u, tim=%lu usec, "
  2326. "phy=0x%02x, chnl=%d\n",
  2327. title, fc, header->addr1[5],
  2328. header->addr3[5], rssi,
  2329. tsf_low - priv->scan_start_tsf,
  2330. phy_flags, channel);
  2331. }
  2332. }
  2333. if (print_dump)
  2334. iwl_print_hex_dump(priv, IWL_DL_RX, data, length);
  2335. }
  2336. #else
  2337. static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
  2338. struct iwl_rx_packet *pkt,
  2339. struct ieee80211_hdr *header,
  2340. int group100)
  2341. {
  2342. }
  2343. #endif
  2344. /* Called for REPLY_RX (legacy ABG frames), or
  2345. * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
  2346. static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
  2347. struct iwl_rx_mem_buffer *rxb)
  2348. {
  2349. struct ieee80211_hdr *header;
  2350. struct ieee80211_rx_status rx_status;
  2351. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2352. /* Use phy data (Rx signal strength, etc.) contained within
  2353. * this rx packet for legacy frames,
  2354. * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
  2355. int include_phy = (pkt->hdr.cmd == REPLY_RX);
  2356. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  2357. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
  2358. (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  2359. __le32 *rx_end;
  2360. unsigned int len = 0;
  2361. u16 fc;
  2362. u8 network_packet;
  2363. rx_status.mactime = le64_to_cpu(rx_start->timestamp);
  2364. rx_status.freq =
  2365. ieee80211_channel_to_frequency(le16_to_cpu(rx_start->channel));
  2366. rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
  2367. IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  2368. rx_status.rate_idx =
  2369. iwl4965_hwrate_to_plcp_idx(le32_to_cpu(rx_start->rate_n_flags));
  2370. if (rx_status.band == IEEE80211_BAND_5GHZ)
  2371. rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
  2372. rx_status.antenna = 0;
  2373. rx_status.flag = 0;
  2374. if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
  2375. IWL_DEBUG_DROP("dsp size out of range [0,20]: %d/n",
  2376. rx_start->cfg_phy_cnt);
  2377. return;
  2378. }
  2379. if (!include_phy) {
  2380. if (priv->last_phy_res[0])
  2381. rx_start = (struct iwl4965_rx_phy_res *)
  2382. &priv->last_phy_res[1];
  2383. else
  2384. rx_start = NULL;
  2385. }
  2386. if (!rx_start) {
  2387. IWL_ERROR("MPDU frame without a PHY data\n");
  2388. return;
  2389. }
  2390. if (include_phy) {
  2391. header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
  2392. + rx_start->cfg_phy_cnt);
  2393. len = le16_to_cpu(rx_start->byte_count);
  2394. rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
  2395. sizeof(struct iwl4965_rx_phy_res) + len);
  2396. } else {
  2397. struct iwl4965_rx_mpdu_res_start *amsdu =
  2398. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  2399. header = (void *)(pkt->u.raw +
  2400. sizeof(struct iwl4965_rx_mpdu_res_start));
  2401. len = le16_to_cpu(amsdu->byte_count);
  2402. rx_end = (__le32 *) (pkt->u.raw +
  2403. sizeof(struct iwl4965_rx_mpdu_res_start) + len);
  2404. }
  2405. if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
  2406. !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
  2407. IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
  2408. le32_to_cpu(*rx_end));
  2409. return;
  2410. }
  2411. priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
  2412. /* Find max signal strength (dBm) among 3 antenna/receiver chains */
  2413. rx_status.signal = iwl4965_calc_rssi(priv, rx_start);
  2414. /* Meaningful noise values are available only from beacon statistics,
  2415. * which are gathered only when associated, and indicate noise
  2416. * only for the associated network channel ...
  2417. * Ignore these noise values while scanning (other channels) */
  2418. if (iwl_is_associated(priv) &&
  2419. !test_bit(STATUS_SCANNING, &priv->status)) {
  2420. rx_status.noise = priv->last_rx_noise;
  2421. rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal,
  2422. rx_status.noise);
  2423. } else {
  2424. rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  2425. rx_status.qual = iwl4965_calc_sig_qual(rx_status.signal, 0);
  2426. }
  2427. /* Reset beacon noise level if not associated. */
  2428. if (!iwl_is_associated(priv))
  2429. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  2430. /* Set "1" to report good data frames in groups of 100 */
  2431. /* FIXME: need to optimze the call: */
  2432. iwl4965_dbg_report_frame(priv, pkt, header, 1);
  2433. IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
  2434. rx_status.signal, rx_status.noise, rx_status.signal,
  2435. (unsigned long long)rx_status.mactime);
  2436. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  2437. iwl4965_handle_data_packet(priv, 1, include_phy,
  2438. rxb, &rx_status);
  2439. return;
  2440. }
  2441. network_packet = iwl4965_is_network_packet(priv, header);
  2442. if (network_packet) {
  2443. priv->last_rx_rssi = rx_status.signal;
  2444. priv->last_beacon_time = priv->ucode_beacon_time;
  2445. priv->last_tsf = le64_to_cpu(rx_start->timestamp);
  2446. }
  2447. fc = le16_to_cpu(header->frame_control);
  2448. switch (fc & IEEE80211_FCTL_FTYPE) {
  2449. case IEEE80211_FTYPE_MGMT:
  2450. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  2451. iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
  2452. header->addr2);
  2453. iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
  2454. break;
  2455. case IEEE80211_FTYPE_CTL:
  2456. #ifdef CONFIG_IWL4965_HT
  2457. switch (fc & IEEE80211_FCTL_STYPE) {
  2458. case IEEE80211_STYPE_BACK_REQ:
  2459. IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
  2460. iwl4965_handle_data_packet(priv, 0, include_phy,
  2461. rxb, &rx_status);
  2462. break;
  2463. default:
  2464. break;
  2465. }
  2466. #endif
  2467. break;
  2468. case IEEE80211_FTYPE_DATA: {
  2469. DECLARE_MAC_BUF(mac1);
  2470. DECLARE_MAC_BUF(mac2);
  2471. DECLARE_MAC_BUF(mac3);
  2472. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  2473. iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
  2474. header->addr2);
  2475. if (unlikely(!network_packet))
  2476. IWL_DEBUG_DROP("Dropping (non network): "
  2477. "%s, %s, %s\n",
  2478. print_mac(mac1, header->addr1),
  2479. print_mac(mac2, header->addr2),
  2480. print_mac(mac3, header->addr3));
  2481. else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
  2482. IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
  2483. print_mac(mac1, header->addr1),
  2484. print_mac(mac2, header->addr2),
  2485. print_mac(mac3, header->addr3));
  2486. else
  2487. iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
  2488. &rx_status);
  2489. break;
  2490. }
  2491. default:
  2492. break;
  2493. }
  2494. }
  2495. /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
  2496. * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
  2497. static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv,
  2498. struct iwl_rx_mem_buffer *rxb)
  2499. {
  2500. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2501. priv->last_phy_res[0] = 1;
  2502. memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
  2503. sizeof(struct iwl4965_rx_phy_res));
  2504. }
  2505. static void iwl4965_rx_missed_beacon_notif(struct iwl_priv *priv,
  2506. struct iwl_rx_mem_buffer *rxb)
  2507. {
  2508. #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
  2509. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2510. struct iwl4965_missed_beacon_notif *missed_beacon;
  2511. missed_beacon = &pkt->u.missed_beacon;
  2512. if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
  2513. IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
  2514. le32_to_cpu(missed_beacon->consequtive_missed_beacons),
  2515. le32_to_cpu(missed_beacon->total_missed_becons),
  2516. le32_to_cpu(missed_beacon->num_recvd_beacons),
  2517. le32_to_cpu(missed_beacon->num_expected_beacons));
  2518. if (!test_bit(STATUS_SCANNING, &priv->status))
  2519. iwl_init_sensitivity(priv);
  2520. }
  2521. #endif /*CONFIG_IWL4965_RUN_TIME_CALIB*/
  2522. }
  2523. #ifdef CONFIG_IWL4965_HT
  2524. /**
  2525. * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
  2526. */
  2527. static void iwl4965_sta_modify_enable_tid_tx(struct iwl_priv *priv,
  2528. int sta_id, int tid)
  2529. {
  2530. unsigned long flags;
  2531. /* Remove "disable" flag, to enable Tx for this TID */
  2532. spin_lock_irqsave(&priv->sta_lock, flags);
  2533. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
  2534. priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
  2535. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  2536. spin_unlock_irqrestore(&priv->sta_lock, flags);
  2537. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  2538. }
  2539. /**
  2540. * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
  2541. *
  2542. * Go through block-ack's bitmap of ACK'd frames, update driver's record of
  2543. * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
  2544. */
  2545. static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
  2546. struct iwl_ht_agg *agg,
  2547. struct iwl4965_compressed_ba_resp*
  2548. ba_resp)
  2549. {
  2550. int i, sh, ack;
  2551. u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
  2552. u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
  2553. u64 bitmap;
  2554. int successes = 0;
  2555. struct ieee80211_tx_info *info;
  2556. if (unlikely(!agg->wait_for_ba)) {
  2557. IWL_ERROR("Received BA when not expected\n");
  2558. return -EINVAL;
  2559. }
  2560. /* Mark that the expected block-ack response arrived */
  2561. agg->wait_for_ba = 0;
  2562. IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
  2563. /* Calculate shift to align block-ack bits with our Tx window bits */
  2564. sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
  2565. if (sh < 0) /* tbw something is wrong with indices */
  2566. sh += 0x100;
  2567. /* don't use 64-bit values for now */
  2568. bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
  2569. if (agg->frame_count > (64 - sh)) {
  2570. IWL_DEBUG_TX_REPLY("more frames than bitmap size");
  2571. return -1;
  2572. }
  2573. /* check for success or failure according to the
  2574. * transmitted bitmap and block-ack bitmap */
  2575. bitmap &= agg->bitmap;
  2576. /* For each frame attempted in aggregation,
  2577. * update driver's record of tx frame's status. */
  2578. for (i = 0; i < agg->frame_count ; i++) {
  2579. ack = bitmap & (1 << i);
  2580. successes += !!ack;
  2581. IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
  2582. ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
  2583. agg->start_idx + i);
  2584. }
  2585. info = IEEE80211_SKB_CB(priv->txq[scd_flow].txb[agg->start_idx].skb[0]);
  2586. memset(&info->status, 0, sizeof(info->status));
  2587. info->flags = IEEE80211_TX_STAT_ACK;
  2588. info->flags |= IEEE80211_TX_STAT_AMPDU;
  2589. info->status.ampdu_ack_map = successes;
  2590. info->status.ampdu_ack_len = agg->frame_count;
  2591. iwl4965_hwrate_to_tx_control(priv, agg->rate_n_flags, info);
  2592. IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
  2593. return 0;
  2594. }
  2595. /**
  2596. * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
  2597. */
  2598. static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
  2599. u16 txq_id)
  2600. {
  2601. /* Simply stop the queue, but don't change any configuration;
  2602. * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
  2603. iwl_write_prph(priv,
  2604. IWL49_SCD_QUEUE_STATUS_BITS(txq_id),
  2605. (0 << IWL49_SCD_QUEUE_STTS_REG_POS_ACTIVE)|
  2606. (1 << IWL49_SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
  2607. }
  2608. /**
  2609. * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
  2610. * priv->lock must be held by the caller
  2611. */
  2612. static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
  2613. u16 ssn_idx, u8 tx_fifo)
  2614. {
  2615. int ret = 0;
  2616. if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
  2617. IWL_WARNING("queue number too small: %d, must be > %d\n",
  2618. txq_id, IWL_BACK_QUEUE_FIRST_ID);
  2619. return -EINVAL;
  2620. }
  2621. ret = iwl_grab_nic_access(priv);
  2622. if (ret)
  2623. return ret;
  2624. iwl4965_tx_queue_stop_scheduler(priv, txq_id);
  2625. iwl_clear_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
  2626. priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
  2627. priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
  2628. /* supposes that ssn_idx is valid (!= 0xFFF) */
  2629. iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
  2630. iwl_clear_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
  2631. iwl_txq_ctx_deactivate(priv, txq_id);
  2632. iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
  2633. iwl_release_nic_access(priv);
  2634. return 0;
  2635. }
  2636. int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id,
  2637. u8 tid, int txq_id)
  2638. {
  2639. struct iwl_queue *q = &priv->txq[txq_id].q;
  2640. u8 *addr = priv->stations[sta_id].sta.sta.addr;
  2641. struct iwl_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
  2642. switch (priv->stations[sta_id].tid[tid].agg.state) {
  2643. case IWL_EMPTYING_HW_QUEUE_DELBA:
  2644. /* We are reclaiming the last packet of the */
  2645. /* aggregated HW queue */
  2646. if (txq_id == tid_data->agg.txq_id &&
  2647. q->read_ptr == q->write_ptr) {
  2648. u16 ssn = SEQ_TO_SN(tid_data->seq_number);
  2649. int tx_fifo = default_tid_to_tx_fifo[tid];
  2650. IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
  2651. iwl4965_tx_queue_agg_disable(priv, txq_id,
  2652. ssn, tx_fifo);
  2653. tid_data->agg.state = IWL_AGG_OFF;
  2654. ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
  2655. }
  2656. break;
  2657. case IWL_EMPTYING_HW_QUEUE_ADDBA:
  2658. /* We are reclaiming the last packet of the queue */
  2659. if (tid_data->tfds_in_queue == 0) {
  2660. IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
  2661. tid_data->agg.state = IWL_AGG_ON;
  2662. ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
  2663. }
  2664. break;
  2665. }
  2666. return 0;
  2667. }
  2668. /**
  2669. * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
  2670. *
  2671. * Handles block-acknowledge notification from device, which reports success
  2672. * of frames sent via aggregation.
  2673. */
  2674. static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
  2675. struct iwl_rx_mem_buffer *rxb)
  2676. {
  2677. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2678. struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
  2679. int index;
  2680. struct iwl_tx_queue *txq = NULL;
  2681. struct iwl_ht_agg *agg;
  2682. DECLARE_MAC_BUF(mac);
  2683. /* "flow" corresponds to Tx queue */
  2684. u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
  2685. /* "ssn" is start of block-ack Tx window, corresponds to index
  2686. * (in Tx queue's circular buffer) of first TFD/frame in window */
  2687. u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
  2688. if (scd_flow >= priv->hw_params.max_txq_num) {
  2689. IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
  2690. return;
  2691. }
  2692. txq = &priv->txq[scd_flow];
  2693. agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
  2694. /* Find index just before block-ack window */
  2695. index = iwl_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
  2696. /* TODO: Need to get this copy more safely - now good for debug */
  2697. IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
  2698. "sta_id = %d\n",
  2699. agg->wait_for_ba,
  2700. print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
  2701. ba_resp->sta_id);
  2702. IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
  2703. "%d, scd_ssn = %d\n",
  2704. ba_resp->tid,
  2705. ba_resp->seq_ctl,
  2706. (unsigned long long)le64_to_cpu(ba_resp->bitmap),
  2707. ba_resp->scd_flow,
  2708. ba_resp->scd_ssn);
  2709. IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
  2710. agg->start_idx,
  2711. (unsigned long long)agg->bitmap);
  2712. /* Update driver's record of ACK vs. not for each frame in window */
  2713. iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
  2714. /* Release all TFDs before the SSN, i.e. all TFDs in front of
  2715. * block-ack window (we assume that they've been successfully
  2716. * transmitted ... if not, it's too late anyway). */
  2717. if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
  2718. /* calculate mac80211 ampdu sw queue to wake */
  2719. int ampdu_q =
  2720. scd_flow - IWL_BACK_QUEUE_FIRST_ID + priv->hw->queues;
  2721. int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
  2722. priv->stations[ba_resp->sta_id].
  2723. tid[ba_resp->tid].tfds_in_queue -= freed;
  2724. if (iwl_queue_space(&txq->q) > txq->q.low_mark &&
  2725. priv->mac80211_registered &&
  2726. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2727. ieee80211_wake_queue(priv->hw, ampdu_q);
  2728. iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
  2729. ba_resp->tid, scd_flow);
  2730. }
  2731. }
  2732. /**
  2733. * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
  2734. */
  2735. static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
  2736. u16 txq_id)
  2737. {
  2738. u32 tbl_dw_addr;
  2739. u32 tbl_dw;
  2740. u16 scd_q2ratid;
  2741. scd_q2ratid = ra_tid & IWL49_SCD_QUEUE_RA_TID_MAP_RATID_MSK;
  2742. tbl_dw_addr = priv->scd_base_addr +
  2743. IWL49_SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
  2744. tbl_dw = iwl_read_targ_mem(priv, tbl_dw_addr);
  2745. if (txq_id & 0x1)
  2746. tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
  2747. else
  2748. tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
  2749. iwl_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
  2750. return 0;
  2751. }
  2752. /**
  2753. * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
  2754. *
  2755. * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
  2756. * i.e. it must be one of the higher queues used for aggregation
  2757. */
  2758. static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
  2759. int tx_fifo, int sta_id, int tid,
  2760. u16 ssn_idx)
  2761. {
  2762. unsigned long flags;
  2763. int rc;
  2764. u16 ra_tid;
  2765. if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
  2766. IWL_WARNING("queue number too small: %d, must be > %d\n",
  2767. txq_id, IWL_BACK_QUEUE_FIRST_ID);
  2768. ra_tid = BUILD_RAxTID(sta_id, tid);
  2769. /* Modify device's station table to Tx this TID */
  2770. iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
  2771. spin_lock_irqsave(&priv->lock, flags);
  2772. rc = iwl_grab_nic_access(priv);
  2773. if (rc) {
  2774. spin_unlock_irqrestore(&priv->lock, flags);
  2775. return rc;
  2776. }
  2777. /* Stop this Tx queue before configuring it */
  2778. iwl4965_tx_queue_stop_scheduler(priv, txq_id);
  2779. /* Map receiver-address / traffic-ID to this queue */
  2780. iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
  2781. /* Set this queue as a chain-building queue */
  2782. iwl_set_bits_prph(priv, IWL49_SCD_QUEUECHAIN_SEL, (1 << txq_id));
  2783. /* Place first TFD at index corresponding to start sequence number.
  2784. * Assumes that ssn_idx is valid (!= 0xFFF) */
  2785. priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
  2786. priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
  2787. iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
  2788. /* Set up Tx window size and frame limit for this queue */
  2789. iwl_write_targ_mem(priv,
  2790. priv->scd_base_addr + IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id),
  2791. (SCD_WIN_SIZE << IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
  2792. IWL49_SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
  2793. iwl_write_targ_mem(priv, priv->scd_base_addr +
  2794. IWL49_SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
  2795. (SCD_FRAME_LIMIT << IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
  2796. & IWL49_SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
  2797. iwl_set_bits_prph(priv, IWL49_SCD_INTERRUPT_MASK, (1 << txq_id));
  2798. /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
  2799. iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
  2800. iwl_release_nic_access(priv);
  2801. spin_unlock_irqrestore(&priv->lock, flags);
  2802. return 0;
  2803. }
  2804. #endif /* CONFIG_IWL4965_HT */
  2805. #ifdef CONFIG_IWL4965_HT
  2806. static int iwl4965_rx_agg_start(struct iwl_priv *priv,
  2807. const u8 *addr, int tid, u16 ssn)
  2808. {
  2809. unsigned long flags;
  2810. int sta_id;
  2811. sta_id = iwl_find_station(priv, addr);
  2812. if (sta_id == IWL_INVALID_STATION)
  2813. return -ENXIO;
  2814. spin_lock_irqsave(&priv->sta_lock, flags);
  2815. priv->stations[sta_id].sta.station_flags_msk = 0;
  2816. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
  2817. priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
  2818. priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
  2819. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  2820. spin_unlock_irqrestore(&priv->sta_lock, flags);
  2821. return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
  2822. CMD_ASYNC);
  2823. }
  2824. static int iwl4965_rx_agg_stop(struct iwl_priv *priv,
  2825. const u8 *addr, int tid)
  2826. {
  2827. unsigned long flags;
  2828. int sta_id;
  2829. sta_id = iwl_find_station(priv, addr);
  2830. if (sta_id == IWL_INVALID_STATION)
  2831. return -ENXIO;
  2832. spin_lock_irqsave(&priv->sta_lock, flags);
  2833. priv->stations[sta_id].sta.station_flags_msk = 0;
  2834. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
  2835. priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
  2836. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  2837. spin_unlock_irqrestore(&priv->sta_lock, flags);
  2838. return iwl_send_add_sta(priv, &priv->stations[sta_id].sta,
  2839. CMD_ASYNC);
  2840. }
  2841. /*
  2842. * Find first available (lowest unused) Tx Queue, mark it "active".
  2843. * Called only when finding queue for aggregation.
  2844. * Should never return anything < 7, because they should already
  2845. * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
  2846. */
  2847. static int iwl4965_txq_ctx_activate_free(struct iwl_priv *priv)
  2848. {
  2849. int txq_id;
  2850. for (txq_id = 0; txq_id < priv->hw_params.max_txq_num; txq_id++)
  2851. if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
  2852. return txq_id;
  2853. return -1;
  2854. }
  2855. static int iwl4965_tx_agg_start(struct ieee80211_hw *hw, const u8 *ra,
  2856. u16 tid, u16 *start_seq_num)
  2857. {
  2858. struct iwl_priv *priv = hw->priv;
  2859. int sta_id;
  2860. int tx_fifo;
  2861. int txq_id;
  2862. int ssn = -1;
  2863. int ret = 0;
  2864. unsigned long flags;
  2865. struct iwl_tid_data *tid_data;
  2866. DECLARE_MAC_BUF(mac);
  2867. if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
  2868. tx_fifo = default_tid_to_tx_fifo[tid];
  2869. else
  2870. return -EINVAL;
  2871. IWL_WARNING("%s on ra = %s tid = %d\n",
  2872. __func__, print_mac(mac, ra), tid);
  2873. sta_id = iwl_find_station(priv, ra);
  2874. if (sta_id == IWL_INVALID_STATION)
  2875. return -ENXIO;
  2876. if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
  2877. IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
  2878. return -ENXIO;
  2879. }
  2880. txq_id = iwl4965_txq_ctx_activate_free(priv);
  2881. if (txq_id == -1)
  2882. return -ENXIO;
  2883. spin_lock_irqsave(&priv->sta_lock, flags);
  2884. tid_data = &priv->stations[sta_id].tid[tid];
  2885. ssn = SEQ_TO_SN(tid_data->seq_number);
  2886. tid_data->agg.txq_id = txq_id;
  2887. spin_unlock_irqrestore(&priv->sta_lock, flags);
  2888. *start_seq_num = ssn;
  2889. ret = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
  2890. sta_id, tid, ssn);
  2891. if (ret)
  2892. return ret;
  2893. ret = 0;
  2894. if (tid_data->tfds_in_queue == 0) {
  2895. printk(KERN_ERR "HW queue is empty\n");
  2896. tid_data->agg.state = IWL_AGG_ON;
  2897. ieee80211_start_tx_ba_cb_irqsafe(hw, ra, tid);
  2898. } else {
  2899. IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
  2900. tid_data->tfds_in_queue);
  2901. tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
  2902. }
  2903. return ret;
  2904. }
  2905. static int iwl4965_tx_agg_stop(struct ieee80211_hw *hw, const u8 *ra, u16 tid)
  2906. {
  2907. struct iwl_priv *priv = hw->priv;
  2908. int tx_fifo_id, txq_id, sta_id, ssn = -1;
  2909. struct iwl_tid_data *tid_data;
  2910. int ret, write_ptr, read_ptr;
  2911. unsigned long flags;
  2912. DECLARE_MAC_BUF(mac);
  2913. if (!ra) {
  2914. IWL_ERROR("ra = NULL\n");
  2915. return -EINVAL;
  2916. }
  2917. if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
  2918. tx_fifo_id = default_tid_to_tx_fifo[tid];
  2919. else
  2920. return -EINVAL;
  2921. sta_id = iwl_find_station(priv, ra);
  2922. if (sta_id == IWL_INVALID_STATION)
  2923. return -ENXIO;
  2924. if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
  2925. IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
  2926. tid_data = &priv->stations[sta_id].tid[tid];
  2927. ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
  2928. txq_id = tid_data->agg.txq_id;
  2929. write_ptr = priv->txq[txq_id].q.write_ptr;
  2930. read_ptr = priv->txq[txq_id].q.read_ptr;
  2931. /* The queue is not empty */
  2932. if (write_ptr != read_ptr) {
  2933. IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
  2934. priv->stations[sta_id].tid[tid].agg.state =
  2935. IWL_EMPTYING_HW_QUEUE_DELBA;
  2936. return 0;
  2937. }
  2938. IWL_DEBUG_HT("HW queue is empty\n");
  2939. priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
  2940. spin_lock_irqsave(&priv->lock, flags);
  2941. ret = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
  2942. spin_unlock_irqrestore(&priv->lock, flags);
  2943. if (ret)
  2944. return ret;
  2945. ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, ra, tid);
  2946. return 0;
  2947. }
  2948. int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
  2949. enum ieee80211_ampdu_mlme_action action,
  2950. const u8 *addr, u16 tid, u16 *ssn)
  2951. {
  2952. struct iwl_priv *priv = hw->priv;
  2953. DECLARE_MAC_BUF(mac);
  2954. IWL_DEBUG_HT("A-MPDU action on addr %s tid %d\n",
  2955. print_mac(mac, addr), tid);
  2956. switch (action) {
  2957. case IEEE80211_AMPDU_RX_START:
  2958. IWL_DEBUG_HT("start Rx\n");
  2959. return iwl4965_rx_agg_start(priv, addr, tid, *ssn);
  2960. case IEEE80211_AMPDU_RX_STOP:
  2961. IWL_DEBUG_HT("stop Rx\n");
  2962. return iwl4965_rx_agg_stop(priv, addr, tid);
  2963. case IEEE80211_AMPDU_TX_START:
  2964. IWL_DEBUG_HT("start Tx\n");
  2965. return iwl4965_tx_agg_start(hw, addr, tid, ssn);
  2966. case IEEE80211_AMPDU_TX_STOP:
  2967. IWL_DEBUG_HT("stop Tx\n");
  2968. return iwl4965_tx_agg_stop(hw, addr, tid);
  2969. default:
  2970. IWL_DEBUG_HT("unknown\n");
  2971. return -EINVAL;
  2972. break;
  2973. }
  2974. return 0;
  2975. }
  2976. #endif /* CONFIG_IWL4965_HT */
  2977. static u16 iwl4965_get_hcmd_size(u8 cmd_id, u16 len)
  2978. {
  2979. switch (cmd_id) {
  2980. case REPLY_RXON:
  2981. return (u16) sizeof(struct iwl4965_rxon_cmd);
  2982. default:
  2983. return len;
  2984. }
  2985. }
  2986. static u16 iwl4965_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd, u8 *data)
  2987. {
  2988. struct iwl4965_addsta_cmd *addsta = (struct iwl4965_addsta_cmd *)data;
  2989. addsta->mode = cmd->mode;
  2990. memcpy(&addsta->sta, &cmd->sta, sizeof(struct sta_id_modify));
  2991. memcpy(&addsta->key, &cmd->key, sizeof(struct iwl4965_keyinfo));
  2992. addsta->station_flags = cmd->station_flags;
  2993. addsta->station_flags_msk = cmd->station_flags_msk;
  2994. addsta->tid_disable_tx = cmd->tid_disable_tx;
  2995. addsta->add_immediate_ba_tid = cmd->add_immediate_ba_tid;
  2996. addsta->remove_immediate_ba_tid = cmd->remove_immediate_ba_tid;
  2997. addsta->add_immediate_ba_ssn = cmd->add_immediate_ba_ssn;
  2998. addsta->reserved1 = __constant_cpu_to_le16(0);
  2999. addsta->reserved2 = __constant_cpu_to_le32(0);
  3000. return (u16)sizeof(struct iwl4965_addsta_cmd);
  3001. }
  3002. /* Set up 4965-specific Rx frame reply handlers */
  3003. static void iwl4965_rx_handler_setup(struct iwl_priv *priv)
  3004. {
  3005. /* Legacy Rx frames */
  3006. priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
  3007. /* High-throughput (HT) Rx frames */
  3008. priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
  3009. priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
  3010. priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
  3011. iwl4965_rx_missed_beacon_notif;
  3012. #ifdef CONFIG_IWL4965_HT
  3013. priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
  3014. #endif /* CONFIG_IWL4965_HT */
  3015. }
  3016. void iwl4965_hw_setup_deferred_work(struct iwl_priv *priv)
  3017. {
  3018. INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
  3019. #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
  3020. INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
  3021. #endif
  3022. init_timer(&priv->statistics_periodic);
  3023. priv->statistics_periodic.data = (unsigned long)priv;
  3024. priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
  3025. }
  3026. void iwl4965_hw_cancel_deferred_work(struct iwl_priv *priv)
  3027. {
  3028. del_timer_sync(&priv->statistics_periodic);
  3029. cancel_delayed_work(&priv->init_alive_start);
  3030. }
  3031. static struct iwl_hcmd_ops iwl4965_hcmd = {
  3032. .rxon_assoc = iwl4965_send_rxon_assoc,
  3033. };
  3034. static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
  3035. .get_hcmd_size = iwl4965_get_hcmd_size,
  3036. .build_addsta_hcmd = iwl4965_build_addsta_hcmd,
  3037. #ifdef CONFIG_IWL4965_RUN_TIME_CALIB
  3038. .chain_noise_reset = iwl4965_chain_noise_reset,
  3039. .gain_computation = iwl4965_gain_computation,
  3040. #endif
  3041. };
  3042. static struct iwl_lib_ops iwl4965_lib = {
  3043. .set_hw_params = iwl4965_hw_set_hw_params,
  3044. .alloc_shared_mem = iwl4965_alloc_shared_mem,
  3045. .free_shared_mem = iwl4965_free_shared_mem,
  3046. .shared_mem_rx_idx = iwl4965_shared_mem_rx_idx,
  3047. .txq_update_byte_cnt_tbl = iwl4965_txq_update_byte_cnt_tbl,
  3048. .disable_tx_fifo = iwl4965_disable_tx_fifo,
  3049. .rx_handler_setup = iwl4965_rx_handler_setup,
  3050. .is_valid_rtc_data_addr = iwl4965_hw_valid_rtc_data_addr,
  3051. .alive_notify = iwl4965_alive_notify,
  3052. .init_alive_start = iwl4965_init_alive_start,
  3053. .load_ucode = iwl4965_load_bsm,
  3054. .apm_ops = {
  3055. .init = iwl4965_apm_init,
  3056. .config = iwl4965_nic_config,
  3057. .set_pwr_src = iwl4965_set_pwr_src,
  3058. },
  3059. .eeprom_ops = {
  3060. .regulatory_bands = {
  3061. EEPROM_REGULATORY_BAND_1_CHANNELS,
  3062. EEPROM_REGULATORY_BAND_2_CHANNELS,
  3063. EEPROM_REGULATORY_BAND_3_CHANNELS,
  3064. EEPROM_REGULATORY_BAND_4_CHANNELS,
  3065. EEPROM_REGULATORY_BAND_5_CHANNELS,
  3066. EEPROM_4965_REGULATORY_BAND_24_FAT_CHANNELS,
  3067. EEPROM_4965_REGULATORY_BAND_52_FAT_CHANNELS
  3068. },
  3069. .verify_signature = iwlcore_eeprom_verify_signature,
  3070. .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
  3071. .release_semaphore = iwlcore_eeprom_release_semaphore,
  3072. .check_version = iwl4965_eeprom_check_version,
  3073. .query_addr = iwlcore_eeprom_query_addr,
  3074. },
  3075. .radio_kill_sw = iwl4965_radio_kill_sw,
  3076. .set_power = iwl4965_set_power,
  3077. .update_chain_flags = iwl4965_update_chain_flags,
  3078. };
  3079. static struct iwl_ops iwl4965_ops = {
  3080. .lib = &iwl4965_lib,
  3081. .hcmd = &iwl4965_hcmd,
  3082. .utils = &iwl4965_hcmd_utils,
  3083. };
  3084. struct iwl_cfg iwl4965_agn_cfg = {
  3085. .name = "4965AGN",
  3086. .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
  3087. .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
  3088. .eeprom_size = IWL4965_EEPROM_IMG_SIZE,
  3089. .ops = &iwl4965_ops,
  3090. .mod_params = &iwl4965_mod_params,
  3091. };
  3092. module_param_named(antenna, iwl4965_mod_params.antenna, int, 0444);
  3093. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3094. module_param_named(disable, iwl4965_mod_params.disable, int, 0444);
  3095. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  3096. module_param_named(swcrypto, iwl4965_mod_params.sw_crypto, int, 0444);
  3097. MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])\n");
  3098. module_param_named(debug, iwl4965_mod_params.debug, int, 0444);
  3099. MODULE_PARM_DESC(debug, "debug output mask");
  3100. module_param_named(
  3101. disable_hw_scan, iwl4965_mod_params.disable_hw_scan, int, 0444);
  3102. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3103. module_param_named(queues_num, iwl4965_mod_params.num_of_queues, int, 0444);
  3104. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  3105. /* QoS */
  3106. module_param_named(qos_enable, iwl4965_mod_params.enable_qos, int, 0444);
  3107. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  3108. module_param_named(amsdu_size_8K, iwl4965_mod_params.amsdu_size_8K, int, 0444);
  3109. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  3110. module_param_named(fw_restart4965, iwl4965_mod_params.restart_fw, int, 0444);
  3111. MODULE_PARM_DESC(fw_restart4965, "restart firmware in case of error");