setup.c 19 KB

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  1. /*
  2. * Copyright (C) 2009 Renesas Solutions Corp.
  3. *
  4. * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/device.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/mtd/physmap.h>
  14. #include <linux/gpio.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/io.h>
  17. #include <linux/delay.h>
  18. #include <linux/usb/r8a66597.h>
  19. #include <linux/i2c.h>
  20. #include <linux/i2c/tsc2007.h>
  21. #include <linux/input.h>
  22. #include <video/sh_mobile_lcdc.h>
  23. #include <media/sh_mobile_ceu.h>
  24. #include <asm/heartbeat.h>
  25. #include <asm/sh_eth.h>
  26. #include <asm/sh_keysc.h>
  27. #include <asm/clock.h>
  28. #include <asm/suspend.h>
  29. #include <cpu/sh7724.h>
  30. /*
  31. * Address Interface BusWidth
  32. *-----------------------------------------
  33. * 0x0000_0000 uboot 16bit
  34. * 0x0004_0000 Linux romImage 16bit
  35. * 0x0014_0000 MTD for Linux 16bit
  36. * 0x0400_0000 Internal I/O 16/32bit
  37. * 0x0800_0000 DRAM 32bit
  38. * 0x1800_0000 MFI 16bit
  39. */
  40. /* SWITCH
  41. *------------------------------
  42. * DS2[1] = FlashROM write protect ON : write protect
  43. * OFF : No write protect
  44. * DS2[2] = RMII / TS, SCIF ON : RMII
  45. * OFF : TS, SCIF3
  46. * DS2[3] = Camera / Video ON : Camera
  47. * OFF : NTSC/PAL (IN)
  48. * DS2[5] = NTSC_OUT Clock ON : On board OSC
  49. * OFF : SH7724 DV_CLK
  50. * DS2[6-7] = MMC / SD ON-OFF : SD
  51. * OFF-ON : MMC
  52. */
  53. /* Heartbeat */
  54. static unsigned char led_pos[] = { 0, 1, 2, 3 };
  55. static struct heartbeat_data heartbeat_data = {
  56. .regsize = 8,
  57. .nr_bits = 4,
  58. .bit_pos = led_pos,
  59. };
  60. static struct resource heartbeat_resources[] = {
  61. [0] = {
  62. .start = 0xA405012C, /* PTG */
  63. .end = 0xA405012E - 1,
  64. .flags = IORESOURCE_MEM,
  65. },
  66. };
  67. static struct platform_device heartbeat_device = {
  68. .name = "heartbeat",
  69. .id = -1,
  70. .dev = {
  71. .platform_data = &heartbeat_data,
  72. },
  73. .num_resources = ARRAY_SIZE(heartbeat_resources),
  74. .resource = heartbeat_resources,
  75. };
  76. /* MTD */
  77. static struct mtd_partition nor_flash_partitions[] = {
  78. {
  79. .name = "boot loader",
  80. .offset = 0,
  81. .size = (5 * 1024 * 1024),
  82. .mask_flags = MTD_WRITEABLE, /* force read-only */
  83. }, {
  84. .name = "free-area",
  85. .offset = MTDPART_OFS_APPEND,
  86. .size = MTDPART_SIZ_FULL,
  87. },
  88. };
  89. static struct physmap_flash_data nor_flash_data = {
  90. .width = 2,
  91. .parts = nor_flash_partitions,
  92. .nr_parts = ARRAY_SIZE(nor_flash_partitions),
  93. };
  94. static struct resource nor_flash_resources[] = {
  95. [0] = {
  96. .name = "NOR Flash",
  97. .start = 0x00000000,
  98. .end = 0x03ffffff,
  99. .flags = IORESOURCE_MEM,
  100. }
  101. };
  102. static struct platform_device nor_flash_device = {
  103. .name = "physmap-flash",
  104. .resource = nor_flash_resources,
  105. .num_resources = ARRAY_SIZE(nor_flash_resources),
  106. .dev = {
  107. .platform_data = &nor_flash_data,
  108. },
  109. };
  110. /* SH Eth */
  111. #define SH_ETH_ADDR (0xA4600000)
  112. #define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0)
  113. #define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8)
  114. static struct resource sh_eth_resources[] = {
  115. [0] = {
  116. .start = SH_ETH_ADDR,
  117. .end = SH_ETH_ADDR + 0x1FC,
  118. .flags = IORESOURCE_MEM,
  119. },
  120. [1] = {
  121. .start = 91,
  122. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  123. },
  124. };
  125. struct sh_eth_plat_data sh_eth_plat = {
  126. .phy = 0x1f, /* SMSC LAN8700 */
  127. .edmac_endian = EDMAC_LITTLE_ENDIAN,
  128. .ether_link_active_low = 1
  129. };
  130. static struct platform_device sh_eth_device = {
  131. .name = "sh-eth",
  132. .id = 0,
  133. .dev = {
  134. .platform_data = &sh_eth_plat,
  135. },
  136. .num_resources = ARRAY_SIZE(sh_eth_resources),
  137. .resource = sh_eth_resources,
  138. .archdata = {
  139. .hwblk_id = HWBLK_ETHER,
  140. },
  141. };
  142. /* USB0 host */
  143. void usb0_port_power(int port, int power)
  144. {
  145. gpio_set_value(GPIO_PTB4, power);
  146. }
  147. static struct r8a66597_platdata usb0_host_data = {
  148. .on_chip = 1,
  149. .port_power = usb0_port_power,
  150. };
  151. static struct resource usb0_host_resources[] = {
  152. [0] = {
  153. .start = 0xa4d80000,
  154. .end = 0xa4d80124 - 1,
  155. .flags = IORESOURCE_MEM,
  156. },
  157. [1] = {
  158. .start = 65,
  159. .end = 65,
  160. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  161. },
  162. };
  163. static struct platform_device usb0_host_device = {
  164. .name = "r8a66597_hcd",
  165. .id = 0,
  166. .dev = {
  167. .dma_mask = NULL, /* not use dma */
  168. .coherent_dma_mask = 0xffffffff,
  169. .platform_data = &usb0_host_data,
  170. },
  171. .num_resources = ARRAY_SIZE(usb0_host_resources),
  172. .resource = usb0_host_resources,
  173. };
  174. /* USB1 host/function */
  175. void usb1_port_power(int port, int power)
  176. {
  177. gpio_set_value(GPIO_PTB5, power);
  178. }
  179. static struct r8a66597_platdata usb1_common_data = {
  180. .on_chip = 1,
  181. .port_power = usb1_port_power,
  182. };
  183. static struct resource usb1_common_resources[] = {
  184. [0] = {
  185. .start = 0xa4d90000,
  186. .end = 0xa4d90124 - 1,
  187. .flags = IORESOURCE_MEM,
  188. },
  189. [1] = {
  190. .start = 66,
  191. .end = 66,
  192. .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
  193. },
  194. };
  195. static struct platform_device usb1_common_device = {
  196. /* .name will be added in arch_setup */
  197. .id = 1,
  198. .dev = {
  199. .dma_mask = NULL, /* not use dma */
  200. .coherent_dma_mask = 0xffffffff,
  201. .platform_data = &usb1_common_data,
  202. },
  203. .num_resources = ARRAY_SIZE(usb1_common_resources),
  204. .resource = usb1_common_resources,
  205. };
  206. /* LCDC */
  207. static struct sh_mobile_lcdc_info lcdc_info = {
  208. .ch[0] = {
  209. .interface_type = RGB18,
  210. .chan = LCDC_CHAN_MAINLCD,
  211. .bpp = 16,
  212. .lcd_cfg = {
  213. .sync = 0, /* hsync and vsync are active low */
  214. },
  215. .lcd_size_cfg = { /* 7.0 inch */
  216. .width = 152,
  217. .height = 91,
  218. },
  219. .board_cfg = {
  220. },
  221. }
  222. };
  223. static struct resource lcdc_resources[] = {
  224. [0] = {
  225. .name = "LCDC",
  226. .start = 0xfe940000,
  227. .end = 0xfe942fff,
  228. .flags = IORESOURCE_MEM,
  229. },
  230. [1] = {
  231. .start = 106,
  232. .flags = IORESOURCE_IRQ,
  233. },
  234. };
  235. static struct platform_device lcdc_device = {
  236. .name = "sh_mobile_lcdc_fb",
  237. .num_resources = ARRAY_SIZE(lcdc_resources),
  238. .resource = lcdc_resources,
  239. .dev = {
  240. .platform_data = &lcdc_info,
  241. },
  242. .archdata = {
  243. .hwblk_id = HWBLK_LCDC,
  244. },
  245. };
  246. /* CEU0 */
  247. static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
  248. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  249. };
  250. static struct resource ceu0_resources[] = {
  251. [0] = {
  252. .name = "CEU0",
  253. .start = 0xfe910000,
  254. .end = 0xfe91009f,
  255. .flags = IORESOURCE_MEM,
  256. },
  257. [1] = {
  258. .start = 52,
  259. .flags = IORESOURCE_IRQ,
  260. },
  261. [2] = {
  262. /* place holder for contiguous memory */
  263. },
  264. };
  265. static struct platform_device ceu0_device = {
  266. .name = "sh_mobile_ceu",
  267. .id = 0, /* "ceu0" clock */
  268. .num_resources = ARRAY_SIZE(ceu0_resources),
  269. .resource = ceu0_resources,
  270. .dev = {
  271. .platform_data = &sh_mobile_ceu0_info,
  272. },
  273. .archdata = {
  274. .hwblk_id = HWBLK_CEU0,
  275. },
  276. };
  277. /* CEU1 */
  278. static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
  279. .flags = SH_CEU_FLAG_USE_8BIT_BUS,
  280. };
  281. static struct resource ceu1_resources[] = {
  282. [0] = {
  283. .name = "CEU1",
  284. .start = 0xfe914000,
  285. .end = 0xfe91409f,
  286. .flags = IORESOURCE_MEM,
  287. },
  288. [1] = {
  289. .start = 63,
  290. .flags = IORESOURCE_IRQ,
  291. },
  292. [2] = {
  293. /* place holder for contiguous memory */
  294. },
  295. };
  296. static struct platform_device ceu1_device = {
  297. .name = "sh_mobile_ceu",
  298. .id = 1, /* "ceu1" clock */
  299. .num_resources = ARRAY_SIZE(ceu1_resources),
  300. .resource = ceu1_resources,
  301. .dev = {
  302. .platform_data = &sh_mobile_ceu1_info,
  303. },
  304. .archdata = {
  305. .hwblk_id = HWBLK_CEU1,
  306. },
  307. };
  308. /* I2C device */
  309. static struct i2c_board_info i2c1_devices[] = {
  310. {
  311. I2C_BOARD_INFO("r2025sd", 0x32),
  312. },
  313. };
  314. /* KEYSC */
  315. static struct sh_keysc_info keysc_info = {
  316. .mode = SH_KEYSC_MODE_1,
  317. .scan_timing = 3,
  318. .delay = 50,
  319. .kycr2_delay = 100,
  320. .keycodes = { KEY_1, 0, 0, 0, 0,
  321. KEY_2, 0, 0, 0, 0,
  322. KEY_3, 0, 0, 0, 0,
  323. KEY_4, 0, 0, 0, 0,
  324. KEY_5, 0, 0, 0, 0,
  325. KEY_6, 0, 0, 0, 0, },
  326. };
  327. static struct resource keysc_resources[] = {
  328. [0] = {
  329. .name = "KEYSC",
  330. .start = 0x044b0000,
  331. .end = 0x044b000f,
  332. .flags = IORESOURCE_MEM,
  333. },
  334. [1] = {
  335. .start = 79,
  336. .flags = IORESOURCE_IRQ,
  337. },
  338. };
  339. static struct platform_device keysc_device = {
  340. .name = "sh_keysc",
  341. .id = 0, /* keysc0 clock */
  342. .num_resources = ARRAY_SIZE(keysc_resources),
  343. .resource = keysc_resources,
  344. .dev = {
  345. .platform_data = &keysc_info,
  346. },
  347. .archdata = {
  348. .hwblk_id = HWBLK_KEYSC,
  349. },
  350. };
  351. /* TouchScreen */
  352. #define IRQ0 32
  353. static int ts_get_pendown_state(void)
  354. {
  355. int val = 0;
  356. gpio_free(GPIO_FN_INTC_IRQ0);
  357. gpio_request(GPIO_PTZ0, NULL);
  358. gpio_direction_input(GPIO_PTZ0);
  359. val = gpio_get_value(GPIO_PTZ0);
  360. gpio_free(GPIO_PTZ0);
  361. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  362. return val ? 0 : 1;
  363. }
  364. static int ts_init(void)
  365. {
  366. gpio_request(GPIO_FN_INTC_IRQ0, NULL);
  367. return 0;
  368. }
  369. struct tsc2007_platform_data tsc2007_info = {
  370. .model = 2007,
  371. .x_plate_ohms = 180,
  372. .get_pendown_state = ts_get_pendown_state,
  373. .init_platform_hw = ts_init,
  374. };
  375. static struct i2c_board_info ts_i2c_clients = {
  376. I2C_BOARD_INFO("tsc2007", 0x48),
  377. .type = "tsc2007",
  378. .platform_data = &tsc2007_info,
  379. .irq = IRQ0,
  380. };
  381. /* SHDI0 */
  382. static struct resource sdhi0_resources[] = {
  383. [0] = {
  384. .name = "SDHI0",
  385. .start = 0x04ce0000,
  386. .end = 0x04ce01ff,
  387. .flags = IORESOURCE_MEM,
  388. },
  389. [1] = {
  390. .start = 101,
  391. .flags = IORESOURCE_IRQ,
  392. },
  393. };
  394. static struct platform_device sdhi0_device = {
  395. .name = "sh_mobile_sdhi",
  396. .num_resources = ARRAY_SIZE(sdhi0_resources),
  397. .resource = sdhi0_resources,
  398. .id = 0,
  399. .archdata = {
  400. .hwblk_id = HWBLK_SDHI0,
  401. },
  402. };
  403. /* SHDI1 */
  404. static struct resource sdhi1_resources[] = {
  405. [0] = {
  406. .name = "SDHI1",
  407. .start = 0x04cf0000,
  408. .end = 0x04cf01ff,
  409. .flags = IORESOURCE_MEM,
  410. },
  411. [1] = {
  412. .start = 24,
  413. .flags = IORESOURCE_IRQ,
  414. },
  415. };
  416. static struct platform_device sdhi1_device = {
  417. .name = "sh_mobile_sdhi",
  418. .num_resources = ARRAY_SIZE(sdhi1_resources),
  419. .resource = sdhi1_resources,
  420. .id = 1,
  421. .archdata = {
  422. .hwblk_id = HWBLK_SDHI1,
  423. },
  424. };
  425. static struct platform_device *ecovec_devices[] __initdata = {
  426. &heartbeat_device,
  427. &nor_flash_device,
  428. &sh_eth_device,
  429. &usb0_host_device,
  430. &usb1_common_device,
  431. &lcdc_device,
  432. &ceu0_device,
  433. &ceu1_device,
  434. &keysc_device,
  435. &sdhi0_device,
  436. &sdhi1_device,
  437. };
  438. #define EEPROM_ADDR 0x50
  439. static u8 mac_read(struct i2c_adapter *a, u8 command)
  440. {
  441. struct i2c_msg msg[2];
  442. u8 buf;
  443. int ret;
  444. msg[0].addr = EEPROM_ADDR;
  445. msg[0].flags = 0;
  446. msg[0].len = 1;
  447. msg[0].buf = &command;
  448. msg[1].addr = EEPROM_ADDR;
  449. msg[1].flags = I2C_M_RD;
  450. msg[1].len = 1;
  451. msg[1].buf = &buf;
  452. ret = i2c_transfer(a, msg, 2);
  453. if (ret < 0) {
  454. printk(KERN_ERR "error %d\n", ret);
  455. buf = 0xff;
  456. }
  457. return buf;
  458. }
  459. static void __init sh_eth_init(struct sh_eth_plat_data *pd)
  460. {
  461. struct i2c_adapter *a = i2c_get_adapter(1);
  462. int i;
  463. if (!a) {
  464. pr_err("can not get I2C 1\n");
  465. return;
  466. }
  467. /* read MAC address frome EEPROM */
  468. for (i = 0; i < sizeof(pd->mac_addr); i++) {
  469. pd->mac_addr[i] = mac_read(a, 0x10 + i);
  470. msleep(10);
  471. }
  472. }
  473. #define PORT_HIZA 0xA4050158
  474. #define IODRIVEA 0xA405018A
  475. extern char ecovec24_sdram_enter_start;
  476. extern char ecovec24_sdram_enter_end;
  477. extern char ecovec24_sdram_leave_start;
  478. extern char ecovec24_sdram_leave_end;
  479. static int __init arch_setup(void)
  480. {
  481. /* register board specific self-refresh code */
  482. sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
  483. &ecovec24_sdram_enter_start,
  484. &ecovec24_sdram_enter_end,
  485. &ecovec24_sdram_leave_start,
  486. &ecovec24_sdram_leave_end);
  487. /* enable STATUS0, STATUS2 and PDSTATUS */
  488. gpio_request(GPIO_FN_STATUS0, NULL);
  489. gpio_request(GPIO_FN_STATUS2, NULL);
  490. gpio_request(GPIO_FN_PDSTATUS, NULL);
  491. /* enable SCIFA0 */
  492. gpio_request(GPIO_FN_SCIF0_TXD, NULL);
  493. gpio_request(GPIO_FN_SCIF0_RXD, NULL);
  494. /* enable debug LED */
  495. gpio_request(GPIO_PTG0, NULL);
  496. gpio_request(GPIO_PTG1, NULL);
  497. gpio_request(GPIO_PTG2, NULL);
  498. gpio_request(GPIO_PTG3, NULL);
  499. gpio_direction_output(GPIO_PTG0, 0);
  500. gpio_direction_output(GPIO_PTG1, 0);
  501. gpio_direction_output(GPIO_PTG2, 0);
  502. gpio_direction_output(GPIO_PTG3, 0);
  503. ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
  504. /* enable SH-Eth */
  505. gpio_request(GPIO_PTA1, NULL);
  506. gpio_direction_output(GPIO_PTA1, 1);
  507. mdelay(20);
  508. gpio_request(GPIO_FN_RMII_RXD0, NULL);
  509. gpio_request(GPIO_FN_RMII_RXD1, NULL);
  510. gpio_request(GPIO_FN_RMII_TXD0, NULL);
  511. gpio_request(GPIO_FN_RMII_TXD1, NULL);
  512. gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
  513. gpio_request(GPIO_FN_RMII_TX_EN, NULL);
  514. gpio_request(GPIO_FN_RMII_RX_ER, NULL);
  515. gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
  516. gpio_request(GPIO_FN_MDIO, NULL);
  517. gpio_request(GPIO_FN_MDC, NULL);
  518. gpio_request(GPIO_FN_LNKSTA, NULL);
  519. /* enable USB */
  520. ctrl_outw(0x0000, 0xA4D80000);
  521. ctrl_outw(0x0000, 0xA4D90000);
  522. gpio_request(GPIO_PTB3, NULL);
  523. gpio_request(GPIO_PTB4, NULL);
  524. gpio_request(GPIO_PTB5, NULL);
  525. gpio_direction_input(GPIO_PTB3);
  526. gpio_direction_output(GPIO_PTB4, 0);
  527. gpio_direction_output(GPIO_PTB5, 0);
  528. ctrl_outw(0x0600, 0xa40501d4);
  529. ctrl_outw(0x0600, 0xa4050192);
  530. if (gpio_get_value(GPIO_PTB3)) {
  531. printk(KERN_INFO "USB1 function is selected\n");
  532. usb1_common_device.name = "r8a66597_udc";
  533. } else {
  534. printk(KERN_INFO "USB1 host is selected\n");
  535. usb1_common_device.name = "r8a66597_hcd";
  536. }
  537. /* enable LCDC */
  538. gpio_request(GPIO_FN_LCDD23, NULL);
  539. gpio_request(GPIO_FN_LCDD22, NULL);
  540. gpio_request(GPIO_FN_LCDD21, NULL);
  541. gpio_request(GPIO_FN_LCDD20, NULL);
  542. gpio_request(GPIO_FN_LCDD19, NULL);
  543. gpio_request(GPIO_FN_LCDD18, NULL);
  544. gpio_request(GPIO_FN_LCDD17, NULL);
  545. gpio_request(GPIO_FN_LCDD16, NULL);
  546. gpio_request(GPIO_FN_LCDD15, NULL);
  547. gpio_request(GPIO_FN_LCDD14, NULL);
  548. gpio_request(GPIO_FN_LCDD13, NULL);
  549. gpio_request(GPIO_FN_LCDD12, NULL);
  550. gpio_request(GPIO_FN_LCDD11, NULL);
  551. gpio_request(GPIO_FN_LCDD10, NULL);
  552. gpio_request(GPIO_FN_LCDD9, NULL);
  553. gpio_request(GPIO_FN_LCDD8, NULL);
  554. gpio_request(GPIO_FN_LCDD7, NULL);
  555. gpio_request(GPIO_FN_LCDD6, NULL);
  556. gpio_request(GPIO_FN_LCDD5, NULL);
  557. gpio_request(GPIO_FN_LCDD4, NULL);
  558. gpio_request(GPIO_FN_LCDD3, NULL);
  559. gpio_request(GPIO_FN_LCDD2, NULL);
  560. gpio_request(GPIO_FN_LCDD1, NULL);
  561. gpio_request(GPIO_FN_LCDD0, NULL);
  562. gpio_request(GPIO_FN_LCDDISP, NULL);
  563. gpio_request(GPIO_FN_LCDHSYN, NULL);
  564. gpio_request(GPIO_FN_LCDDCK, NULL);
  565. gpio_request(GPIO_FN_LCDVSYN, NULL);
  566. gpio_request(GPIO_FN_LCDDON, NULL);
  567. gpio_request(GPIO_FN_LCDLCLK, NULL);
  568. ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
  569. gpio_request(GPIO_PTE6, NULL);
  570. gpio_request(GPIO_PTU1, NULL);
  571. gpio_request(GPIO_PTR1, NULL);
  572. gpio_request(GPIO_PTA2, NULL);
  573. gpio_direction_input(GPIO_PTE6);
  574. gpio_direction_output(GPIO_PTU1, 0);
  575. gpio_direction_output(GPIO_PTR1, 0);
  576. gpio_direction_output(GPIO_PTA2, 0);
  577. /* I/O buffer drive ability is low */
  578. ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA);
  579. if (gpio_get_value(GPIO_PTE6)) {
  580. /* DVI */
  581. lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
  582. lcdc_info.ch[0].clock_divider = 1,
  583. lcdc_info.ch[0].lcd_cfg.name = "DVI";
  584. lcdc_info.ch[0].lcd_cfg.xres = 1280;
  585. lcdc_info.ch[0].lcd_cfg.yres = 720;
  586. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  587. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  588. lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
  589. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  590. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  591. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  592. gpio_set_value(GPIO_PTA2, 1);
  593. gpio_set_value(GPIO_PTU1, 1);
  594. } else {
  595. /* Panel */
  596. lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
  597. lcdc_info.ch[0].clock_divider = 2,
  598. lcdc_info.ch[0].lcd_cfg.name = "Panel";
  599. lcdc_info.ch[0].lcd_cfg.xres = 800;
  600. lcdc_info.ch[0].lcd_cfg.yres = 480;
  601. lcdc_info.ch[0].lcd_cfg.left_margin = 220;
  602. lcdc_info.ch[0].lcd_cfg.right_margin = 110;
  603. lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
  604. lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
  605. lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
  606. lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
  607. gpio_set_value(GPIO_PTR1, 1);
  608. /* FIXME
  609. *
  610. * LCDDON control is needed for Panel,
  611. * but current sh_mobile_lcdc driver doesn't control it.
  612. * It is temporary correspondence
  613. */
  614. gpio_request(GPIO_PTF4, NULL);
  615. gpio_direction_output(GPIO_PTF4, 1);
  616. /* enable TouchScreen */
  617. i2c_register_board_info(0, &ts_i2c_clients, 1);
  618. set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW);
  619. }
  620. /* enable CEU0 */
  621. gpio_request(GPIO_FN_VIO0_D15, NULL);
  622. gpio_request(GPIO_FN_VIO0_D14, NULL);
  623. gpio_request(GPIO_FN_VIO0_D13, NULL);
  624. gpio_request(GPIO_FN_VIO0_D12, NULL);
  625. gpio_request(GPIO_FN_VIO0_D11, NULL);
  626. gpio_request(GPIO_FN_VIO0_D10, NULL);
  627. gpio_request(GPIO_FN_VIO0_D9, NULL);
  628. gpio_request(GPIO_FN_VIO0_D8, NULL);
  629. gpio_request(GPIO_FN_VIO0_D7, NULL);
  630. gpio_request(GPIO_FN_VIO0_D6, NULL);
  631. gpio_request(GPIO_FN_VIO0_D5, NULL);
  632. gpio_request(GPIO_FN_VIO0_D4, NULL);
  633. gpio_request(GPIO_FN_VIO0_D3, NULL);
  634. gpio_request(GPIO_FN_VIO0_D2, NULL);
  635. gpio_request(GPIO_FN_VIO0_D1, NULL);
  636. gpio_request(GPIO_FN_VIO0_D0, NULL);
  637. gpio_request(GPIO_FN_VIO0_VD, NULL);
  638. gpio_request(GPIO_FN_VIO0_CLK, NULL);
  639. gpio_request(GPIO_FN_VIO0_FLD, NULL);
  640. gpio_request(GPIO_FN_VIO0_HD, NULL);
  641. platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
  642. /* enable CEU1 */
  643. gpio_request(GPIO_FN_VIO1_D7, NULL);
  644. gpio_request(GPIO_FN_VIO1_D6, NULL);
  645. gpio_request(GPIO_FN_VIO1_D5, NULL);
  646. gpio_request(GPIO_FN_VIO1_D4, NULL);
  647. gpio_request(GPIO_FN_VIO1_D3, NULL);
  648. gpio_request(GPIO_FN_VIO1_D2, NULL);
  649. gpio_request(GPIO_FN_VIO1_D1, NULL);
  650. gpio_request(GPIO_FN_VIO1_D0, NULL);
  651. gpio_request(GPIO_FN_VIO1_FLD, NULL);
  652. gpio_request(GPIO_FN_VIO1_HD, NULL);
  653. gpio_request(GPIO_FN_VIO1_VD, NULL);
  654. gpio_request(GPIO_FN_VIO1_CLK, NULL);
  655. platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
  656. /* enable KEYSC */
  657. gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
  658. gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
  659. gpio_request(GPIO_FN_KEYOUT3, NULL);
  660. gpio_request(GPIO_FN_KEYOUT2, NULL);
  661. gpio_request(GPIO_FN_KEYOUT1, NULL);
  662. gpio_request(GPIO_FN_KEYOUT0, NULL);
  663. gpio_request(GPIO_FN_KEYIN0, NULL);
  664. /* enable user debug switch */
  665. gpio_request(GPIO_PTR0, NULL);
  666. gpio_request(GPIO_PTR4, NULL);
  667. gpio_request(GPIO_PTR5, NULL);
  668. gpio_request(GPIO_PTR6, NULL);
  669. gpio_direction_input(GPIO_PTR0);
  670. gpio_direction_input(GPIO_PTR4);
  671. gpio_direction_input(GPIO_PTR5);
  672. gpio_direction_input(GPIO_PTR6);
  673. /* enable SDHI0 */
  674. gpio_request(GPIO_FN_SDHI0CD, NULL);
  675. gpio_request(GPIO_FN_SDHI0WP, NULL);
  676. gpio_request(GPIO_FN_SDHI0CMD, NULL);
  677. gpio_request(GPIO_FN_SDHI0CLK, NULL);
  678. gpio_request(GPIO_FN_SDHI0D3, NULL);
  679. gpio_request(GPIO_FN_SDHI0D2, NULL);
  680. gpio_request(GPIO_FN_SDHI0D1, NULL);
  681. gpio_request(GPIO_FN_SDHI0D0, NULL);
  682. /* enable SDHI1 */
  683. gpio_request(GPIO_FN_SDHI1CD, NULL);
  684. gpio_request(GPIO_FN_SDHI1WP, NULL);
  685. gpio_request(GPIO_FN_SDHI1CMD, NULL);
  686. gpio_request(GPIO_FN_SDHI1CLK, NULL);
  687. gpio_request(GPIO_FN_SDHI1D3, NULL);
  688. gpio_request(GPIO_FN_SDHI1D2, NULL);
  689. gpio_request(GPIO_FN_SDHI1D1, NULL);
  690. gpio_request(GPIO_FN_SDHI1D0, NULL);
  691. gpio_request(GPIO_PTB6, NULL);
  692. gpio_request(GPIO_PTB7, NULL);
  693. gpio_direction_output(GPIO_PTB6, 1);
  694. gpio_direction_output(GPIO_PTB7, 1);
  695. /* I/O buffer drive ability is high for SDHI1 */
  696. ctrl_outw((ctrl_inw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA);
  697. /* enable I2C device */
  698. i2c_register_board_info(1, i2c1_devices,
  699. ARRAY_SIZE(i2c1_devices));
  700. return platform_add_devices(ecovec_devices,
  701. ARRAY_SIZE(ecovec_devices));
  702. }
  703. arch_initcall(arch_setup);
  704. static int __init devices_setup(void)
  705. {
  706. sh_eth_init(&sh_eth_plat);
  707. return 0;
  708. }
  709. device_initcall(devices_setup);
  710. static struct sh_machine_vector mv_ecovec __initmv = {
  711. .mv_name = "R0P7724 (EcoVec)",
  712. };