iwl4965-base.c 224 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-eeprom.h"
  45. #include "iwl-4965.h"
  46. #include "iwl-core.h"
  47. #include "iwl-io.h"
  48. #include "iwl-helpers.h"
  49. #include "iwl-sta.h"
  50. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  51. struct iwl4965_tx_queue *txq);
  52. /******************************************************************************
  53. *
  54. * module boiler plate
  55. *
  56. ******************************************************************************/
  57. /*
  58. * module name, copyright, version, etc.
  59. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  60. */
  61. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  62. #ifdef CONFIG_IWLWIFI_DEBUG
  63. #define VD "d"
  64. #else
  65. #define VD
  66. #endif
  67. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  68. #define VS "s"
  69. #else
  70. #define VS
  71. #endif
  72. #define DRV_VERSION IWLWIFI_VERSION VD VS
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT);
  76. MODULE_LICENSE("GPL");
  77. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  78. {
  79. u16 fc = le16_to_cpu(hdr->frame_control);
  80. int hdr_len = ieee80211_get_hdrlen(fc);
  81. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  82. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  83. return NULL;
  84. }
  85. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  86. struct iwl_priv *priv, enum ieee80211_band band)
  87. {
  88. return priv->hw->wiphy->bands[band];
  89. }
  90. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  91. {
  92. /* Single white space is for Linksys APs */
  93. if (essid_len == 1 && essid[0] == ' ')
  94. return 1;
  95. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  96. while (essid_len) {
  97. essid_len--;
  98. if (essid[essid_len] != '\0')
  99. return 0;
  100. }
  101. return 1;
  102. }
  103. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  104. {
  105. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  106. const char *s = essid;
  107. char *d = escaped;
  108. if (iwl4965_is_empty_essid(essid, essid_len)) {
  109. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  110. return escaped;
  111. }
  112. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  113. while (essid_len--) {
  114. if (*s == '\0') {
  115. *d++ = '\\';
  116. *d++ = '0';
  117. s++;
  118. } else
  119. *d++ = *s++;
  120. }
  121. *d = '\0';
  122. return escaped;
  123. }
  124. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  125. * DMA services
  126. *
  127. * Theory of operation
  128. *
  129. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  130. * of buffer descriptors, each of which points to one or more data buffers for
  131. * the device to read from or fill. Driver and device exchange status of each
  132. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  133. * entries in each circular buffer, to protect against confusing empty and full
  134. * queue states.
  135. *
  136. * The device reads or writes the data in the queues via the device's several
  137. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  138. *
  139. * For Tx queue, there are low mark and high mark limits. If, after queuing
  140. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  141. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  142. * Tx queue resumed.
  143. *
  144. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  145. * queue (#4) for sending commands to the device firmware, and 15 other
  146. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  147. *
  148. * See more detailed info in iwl-4965-hw.h.
  149. ***************************************************/
  150. int iwl4965_queue_space(const struct iwl4965_queue *q)
  151. {
  152. int s = q->read_ptr - q->write_ptr;
  153. if (q->read_ptr > q->write_ptr)
  154. s -= q->n_bd;
  155. if (s <= 0)
  156. s += q->n_window;
  157. /* keep some reserve to not confuse empty and full situations */
  158. s -= 2;
  159. if (s < 0)
  160. s = 0;
  161. return s;
  162. }
  163. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  164. {
  165. return q->write_ptr > q->read_ptr ?
  166. (i >= q->read_ptr && i < q->write_ptr) :
  167. !(i < q->read_ptr && i >= q->write_ptr);
  168. }
  169. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  170. {
  171. /* This is for scan command, the big buffer at end of command array */
  172. if (is_huge)
  173. return q->n_window; /* must be power of 2 */
  174. /* Otherwise, use normal size buffers */
  175. return index & (q->n_window - 1);
  176. }
  177. /**
  178. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  179. */
  180. static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
  181. int count, int slots_num, u32 id)
  182. {
  183. q->n_bd = count;
  184. q->n_window = slots_num;
  185. q->id = id;
  186. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  187. * and iwl_queue_dec_wrap are broken. */
  188. BUG_ON(!is_power_of_2(count));
  189. /* slots_num must be power-of-two size, otherwise
  190. * get_cmd_index is broken. */
  191. BUG_ON(!is_power_of_2(slots_num));
  192. q->low_mark = q->n_window / 4;
  193. if (q->low_mark < 4)
  194. q->low_mark = 4;
  195. q->high_mark = q->n_window / 8;
  196. if (q->high_mark < 2)
  197. q->high_mark = 2;
  198. q->write_ptr = q->read_ptr = 0;
  199. return 0;
  200. }
  201. /**
  202. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  203. */
  204. static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
  205. struct iwl4965_tx_queue *txq, u32 id)
  206. {
  207. struct pci_dev *dev = priv->pci_dev;
  208. /* Driver private data, only for Tx (not command) queues,
  209. * not shared with device. */
  210. if (id != IWL_CMD_QUEUE_NUM) {
  211. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  212. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  213. if (!txq->txb) {
  214. IWL_ERROR("kmalloc for auxiliary BD "
  215. "structures failed\n");
  216. goto error;
  217. }
  218. } else
  219. txq->txb = NULL;
  220. /* Circular buffer of transmit frame descriptors (TFDs),
  221. * shared with device */
  222. txq->bd = pci_alloc_consistent(dev,
  223. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  224. &txq->q.dma_addr);
  225. if (!txq->bd) {
  226. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  227. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  228. goto error;
  229. }
  230. txq->q.id = id;
  231. return 0;
  232. error:
  233. if (txq->txb) {
  234. kfree(txq->txb);
  235. txq->txb = NULL;
  236. }
  237. return -ENOMEM;
  238. }
  239. /**
  240. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  241. */
  242. int iwl4965_tx_queue_init(struct iwl_priv *priv,
  243. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  244. {
  245. struct pci_dev *dev = priv->pci_dev;
  246. int len;
  247. int rc = 0;
  248. /*
  249. * Alloc buffer array for commands (Tx or other types of commands).
  250. * For the command queue (#4), allocate command space + one big
  251. * command for scan, since scan command is very huge; the system will
  252. * not have two scans at the same time, so only one is needed.
  253. * For normal Tx queues (all other queues), no super-size command
  254. * space is needed.
  255. */
  256. len = sizeof(struct iwl_cmd) * slots_num;
  257. if (txq_id == IWL_CMD_QUEUE_NUM)
  258. len += IWL_MAX_SCAN_SIZE;
  259. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  260. if (!txq->cmd)
  261. return -ENOMEM;
  262. /* Alloc driver data array and TFD circular buffer */
  263. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  264. if (rc) {
  265. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  266. return -ENOMEM;
  267. }
  268. txq->need_update = 0;
  269. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  270. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  271. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  272. /* Initialize queue's high/low-water marks, and head/tail indexes */
  273. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  274. /* Tell device where to find queue */
  275. iwl4965_hw_tx_queue_init(priv, txq);
  276. return 0;
  277. }
  278. /**
  279. * iwl4965_tx_queue_free - Deallocate DMA queue.
  280. * @txq: Transmit queue to deallocate.
  281. *
  282. * Empty queue by removing and destroying all BD's.
  283. * Free all buffers.
  284. * 0-fill, but do not free "txq" descriptor structure.
  285. */
  286. void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
  287. {
  288. struct iwl4965_queue *q = &txq->q;
  289. struct pci_dev *dev = priv->pci_dev;
  290. int len;
  291. if (q->n_bd == 0)
  292. return;
  293. /* first, empty all BD's */
  294. for (; q->write_ptr != q->read_ptr;
  295. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  296. iwl4965_hw_txq_free_tfd(priv, txq);
  297. len = sizeof(struct iwl_cmd) * q->n_window;
  298. if (q->id == IWL_CMD_QUEUE_NUM)
  299. len += IWL_MAX_SCAN_SIZE;
  300. /* De-alloc array of command/tx buffers */
  301. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  302. /* De-alloc circular buffer of TFDs */
  303. if (txq->q.n_bd)
  304. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  305. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  306. /* De-alloc array of per-TFD driver data */
  307. if (txq->txb) {
  308. kfree(txq->txb);
  309. txq->txb = NULL;
  310. }
  311. /* 0-fill queue descriptor structure */
  312. memset(txq, 0, sizeof(*txq));
  313. }
  314. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  315. /*************** STATION TABLE MANAGEMENT ****
  316. * mac80211 should be examined to determine if sta_info is duplicating
  317. * the functionality provided here
  318. */
  319. /**************************************************************/
  320. #if 0 /* temporary disable till we add real remove station */
  321. /**
  322. * iwl4965_remove_station - Remove driver's knowledge of station.
  323. *
  324. * NOTE: This does not remove station from device's station table.
  325. */
  326. static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  327. {
  328. int index = IWL_INVALID_STATION;
  329. int i;
  330. unsigned long flags;
  331. spin_lock_irqsave(&priv->sta_lock, flags);
  332. if (is_ap)
  333. index = IWL_AP_ID;
  334. else if (is_broadcast_ether_addr(addr))
  335. index = priv->hw_setting.bcast_sta_id;
  336. else
  337. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  338. if (priv->stations[i].used &&
  339. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  340. addr)) {
  341. index = i;
  342. break;
  343. }
  344. if (unlikely(index == IWL_INVALID_STATION))
  345. goto out;
  346. if (priv->stations[index].used) {
  347. priv->stations[index].used = 0;
  348. priv->num_stations--;
  349. }
  350. BUG_ON(priv->num_stations < 0);
  351. out:
  352. spin_unlock_irqrestore(&priv->sta_lock, flags);
  353. return 0;
  354. }
  355. #endif
  356. /**
  357. * iwl4965_add_station_flags - Add station to tables in driver and device
  358. */
  359. u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
  360. int is_ap, u8 flags, void *ht_data)
  361. {
  362. int i;
  363. int index = IWL_INVALID_STATION;
  364. struct iwl4965_station_entry *station;
  365. unsigned long flags_spin;
  366. DECLARE_MAC_BUF(mac);
  367. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  368. if (is_ap)
  369. index = IWL_AP_ID;
  370. else if (is_broadcast_ether_addr(addr))
  371. index = priv->hw_setting.bcast_sta_id;
  372. else
  373. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  374. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  375. addr)) {
  376. index = i;
  377. break;
  378. }
  379. if (!priv->stations[i].used &&
  380. index == IWL_INVALID_STATION)
  381. index = i;
  382. }
  383. /* These two conditions have the same outcome, but keep them separate
  384. since they have different meanings */
  385. if (unlikely(index == IWL_INVALID_STATION)) {
  386. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  387. return index;
  388. }
  389. if (priv->stations[index].used &&
  390. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  391. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  392. return index;
  393. }
  394. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  395. station = &priv->stations[index];
  396. station->used = 1;
  397. priv->num_stations++;
  398. /* Set up the REPLY_ADD_STA command to send to device */
  399. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  400. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  401. station->sta.mode = 0;
  402. station->sta.sta.sta_id = index;
  403. station->sta.station_flags = 0;
  404. #ifdef CONFIG_IWL4965_HT
  405. /* BCAST station and IBSS stations do not work in HT mode */
  406. if (index != priv->hw_setting.bcast_sta_id &&
  407. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  408. iwl4965_set_ht_add_station(priv, index,
  409. (struct ieee80211_ht_info *) ht_data);
  410. #endif /*CONFIG_IWL4965_HT*/
  411. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  412. /* Add station to device's station table */
  413. iwl4965_send_add_station(priv, &station->sta, flags);
  414. return index;
  415. }
  416. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  417. /**
  418. * iwl4965_enqueue_hcmd - enqueue a uCode command
  419. * @priv: device private data point
  420. * @cmd: a point to the ucode command structure
  421. *
  422. * The function returns < 0 values to indicate the operation is
  423. * failed. On success, it turns the index (> 0) of command in the
  424. * command queue.
  425. */
  426. int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  427. {
  428. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  429. struct iwl4965_queue *q = &txq->q;
  430. struct iwl4965_tfd_frame *tfd;
  431. u32 *control_flags;
  432. struct iwl_cmd *out_cmd;
  433. u32 idx;
  434. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  435. dma_addr_t phys_addr;
  436. int ret;
  437. unsigned long flags;
  438. /* If any of the command structures end up being larger than
  439. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  440. * we will need to increase the size of the TFD entries */
  441. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  442. !(cmd->meta.flags & CMD_SIZE_HUGE));
  443. if (iwl_is_rfkill(priv)) {
  444. IWL_DEBUG_INFO("Not sending command - RF KILL");
  445. return -EIO;
  446. }
  447. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  448. IWL_ERROR("No space for Tx\n");
  449. return -ENOSPC;
  450. }
  451. spin_lock_irqsave(&priv->hcmd_lock, flags);
  452. tfd = &txq->bd[q->write_ptr];
  453. memset(tfd, 0, sizeof(*tfd));
  454. control_flags = (u32 *) tfd;
  455. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  456. out_cmd = &txq->cmd[idx];
  457. out_cmd->hdr.cmd = cmd->id;
  458. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  459. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  460. /* At this point, the out_cmd now has all of the incoming cmd
  461. * information */
  462. out_cmd->hdr.flags = 0;
  463. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  464. INDEX_TO_SEQ(q->write_ptr));
  465. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  466. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  467. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  468. offsetof(struct iwl_cmd, hdr);
  469. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  470. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  471. "%d bytes at %d[%d]:%d\n",
  472. get_cmd_string(out_cmd->hdr.cmd),
  473. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  474. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  475. txq->need_update = 1;
  476. /* Set up entry in queue's byte count circular buffer */
  477. priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0);
  478. /* Increment and update queue's write index */
  479. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  480. ret = iwl4965_tx_queue_update_write_ptr(priv, txq);
  481. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  482. return ret ? ret : idx;
  483. }
  484. static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  485. {
  486. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  487. if (hw_decrypt)
  488. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  489. else
  490. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  491. }
  492. /**
  493. * iwl4965_rxon_add_station - add station into station table.
  494. *
  495. * there is only one AP station with id= IWL_AP_ID
  496. * NOTE: mutex must be held before calling this fnction
  497. */
  498. static int iwl4965_rxon_add_station(struct iwl_priv *priv,
  499. const u8 *addr, int is_ap)
  500. {
  501. u8 sta_id;
  502. /* Add station to device's station table */
  503. #ifdef CONFIG_IWL4965_HT
  504. struct ieee80211_conf *conf = &priv->hw->conf;
  505. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  506. if ((is_ap) &&
  507. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  508. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  509. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  510. 0, cur_ht_config);
  511. else
  512. #endif /* CONFIG_IWL4965_HT */
  513. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  514. 0, NULL);
  515. /* Set up default rate scaling table in device's station table */
  516. iwl4965_add_station(priv, addr, is_ap);
  517. return sta_id;
  518. }
  519. /**
  520. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  521. *
  522. * NOTE: This is really only useful during development and can eventually
  523. * be #ifdef'd out once the driver is stable and folks aren't actively
  524. * making changes
  525. */
  526. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  527. {
  528. int error = 0;
  529. int counter = 1;
  530. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  531. error |= le32_to_cpu(rxon->flags &
  532. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  533. RXON_FLG_RADAR_DETECT_MSK));
  534. if (error)
  535. IWL_WARNING("check 24G fields %d | %d\n",
  536. counter++, error);
  537. } else {
  538. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  539. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  540. if (error)
  541. IWL_WARNING("check 52 fields %d | %d\n",
  542. counter++, error);
  543. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  544. if (error)
  545. IWL_WARNING("check 52 CCK %d | %d\n",
  546. counter++, error);
  547. }
  548. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  549. if (error)
  550. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  551. /* make sure basic rates 6Mbps and 1Mbps are supported */
  552. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  553. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  554. if (error)
  555. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  556. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  557. if (error)
  558. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  559. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  560. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  561. if (error)
  562. IWL_WARNING("check CCK and short slot %d | %d\n",
  563. counter++, error);
  564. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  565. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  566. if (error)
  567. IWL_WARNING("check CCK & auto detect %d | %d\n",
  568. counter++, error);
  569. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  570. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  571. if (error)
  572. IWL_WARNING("check TGG and auto detect %d | %d\n",
  573. counter++, error);
  574. if (error)
  575. IWL_WARNING("Tuning to channel %d\n",
  576. le16_to_cpu(rxon->channel));
  577. if (error) {
  578. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  579. return -1;
  580. }
  581. return 0;
  582. }
  583. /**
  584. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  585. * @priv: staging_rxon is compared to active_rxon
  586. *
  587. * If the RXON structure is changing enough to require a new tune,
  588. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  589. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  590. */
  591. static int iwl4965_full_rxon_required(struct iwl_priv *priv)
  592. {
  593. /* These items are only settable from the full RXON command */
  594. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  595. compare_ether_addr(priv->staging_rxon.bssid_addr,
  596. priv->active_rxon.bssid_addr) ||
  597. compare_ether_addr(priv->staging_rxon.node_addr,
  598. priv->active_rxon.node_addr) ||
  599. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  600. priv->active_rxon.wlap_bssid_addr) ||
  601. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  602. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  603. (priv->staging_rxon.air_propagation !=
  604. priv->active_rxon.air_propagation) ||
  605. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  606. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  607. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  608. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  609. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  610. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  611. return 1;
  612. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  613. * be updated with the RXON_ASSOC command -- however only some
  614. * flag transitions are allowed using RXON_ASSOC */
  615. /* Check if we are not switching bands */
  616. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  617. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  618. return 1;
  619. /* Check if we are switching association toggle */
  620. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  621. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  622. return 1;
  623. return 0;
  624. }
  625. static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
  626. {
  627. int ret = 0;
  628. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  629. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  630. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  631. if ((rxon1->flags == rxon2->flags) &&
  632. (rxon1->filter_flags == rxon2->filter_flags) &&
  633. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  634. (rxon1->ofdm_ht_single_stream_basic_rates ==
  635. rxon2->ofdm_ht_single_stream_basic_rates) &&
  636. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  637. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  638. (rxon1->rx_chain == rxon2->rx_chain) &&
  639. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  640. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  641. return 0;
  642. }
  643. rxon_assoc.flags = priv->staging_rxon.flags;
  644. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  645. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  646. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  647. rxon_assoc.reserved = 0;
  648. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  649. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  650. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  651. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  652. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  653. ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
  654. sizeof(rxon_assoc), &rxon_assoc, NULL);
  655. if (ret)
  656. return ret;
  657. return ret;
  658. }
  659. /**
  660. * iwl4965_commit_rxon - commit staging_rxon to hardware
  661. *
  662. * The RXON command in staging_rxon is committed to the hardware and
  663. * the active_rxon structure is updated with the new data. This
  664. * function correctly transitions out of the RXON_ASSOC_MSK state if
  665. * a HW tune is required based on the RXON structure changes.
  666. */
  667. static int iwl4965_commit_rxon(struct iwl_priv *priv)
  668. {
  669. /* cast away the const for active_rxon in this function */
  670. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  671. DECLARE_MAC_BUF(mac);
  672. int rc = 0;
  673. if (!iwl_is_alive(priv))
  674. return -1;
  675. /* always get timestamp with Rx frame */
  676. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  677. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  678. if (rc) {
  679. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  680. return -EINVAL;
  681. }
  682. /* If we don't need to send a full RXON, we can use
  683. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  684. * and other flags for the current radio configuration. */
  685. if (!iwl4965_full_rxon_required(priv)) {
  686. rc = iwl4965_send_rxon_assoc(priv);
  687. if (rc) {
  688. IWL_ERROR("Error setting RXON_ASSOC "
  689. "configuration (%d).\n", rc);
  690. return rc;
  691. }
  692. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  693. return 0;
  694. }
  695. /* station table will be cleared */
  696. priv->assoc_station_added = 0;
  697. #ifdef CONFIG_IWL4965_SENSITIVITY
  698. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  699. if (!priv->error_recovering)
  700. priv->start_calib = 0;
  701. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  702. #endif /* CONFIG_IWL4965_SENSITIVITY */
  703. /* If we are currently associated and the new config requires
  704. * an RXON_ASSOC and the new config wants the associated mask enabled,
  705. * we must clear the associated from the active configuration
  706. * before we apply the new config */
  707. if (iwl_is_associated(priv) &&
  708. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  709. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  710. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  711. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  712. sizeof(struct iwl4965_rxon_cmd),
  713. &priv->active_rxon);
  714. /* If the mask clearing failed then we set
  715. * active_rxon back to what it was previously */
  716. if (rc) {
  717. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  718. IWL_ERROR("Error clearing ASSOC_MSK on current "
  719. "configuration (%d).\n", rc);
  720. return rc;
  721. }
  722. }
  723. IWL_DEBUG_INFO("Sending RXON\n"
  724. "* with%s RXON_FILTER_ASSOC_MSK\n"
  725. "* channel = %d\n"
  726. "* bssid = %s\n",
  727. ((priv->staging_rxon.filter_flags &
  728. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  729. le16_to_cpu(priv->staging_rxon.channel),
  730. print_mac(mac, priv->staging_rxon.bssid_addr));
  731. iwl4965_set_rxon_hwcrypto(priv, priv->cfg->mod_params->hw_crypto);
  732. /* Apply the new configuration */
  733. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  734. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  735. if (rc) {
  736. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  737. return rc;
  738. }
  739. iwlcore_clear_stations_table(priv);
  740. #ifdef CONFIG_IWL4965_SENSITIVITY
  741. if (!priv->error_recovering)
  742. priv->start_calib = 0;
  743. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  744. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  745. #endif /* CONFIG_IWL4965_SENSITIVITY */
  746. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  747. /* If we issue a new RXON command which required a tune then we must
  748. * send a new TXPOWER command or we won't be able to Tx any frames */
  749. rc = iwl4965_hw_reg_send_txpower(priv);
  750. if (rc) {
  751. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  752. return rc;
  753. }
  754. /* Add the broadcast address so we can send broadcast frames */
  755. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  756. IWL_INVALID_STATION) {
  757. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  758. return -EIO;
  759. }
  760. /* If we have set the ASSOC_MSK and we are in BSS mode then
  761. * add the IWL_AP_ID to the station rate table */
  762. if (iwl_is_associated(priv) &&
  763. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  764. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  765. == IWL_INVALID_STATION) {
  766. IWL_ERROR("Error adding AP address for transmit.\n");
  767. return -EIO;
  768. }
  769. priv->assoc_station_added = 1;
  770. if (priv->default_wep_key &&
  771. iwl_send_static_wepkey_cmd(priv, 0))
  772. IWL_ERROR("Could not send WEP static key.\n");
  773. }
  774. return 0;
  775. }
  776. static int iwl4965_send_bt_config(struct iwl_priv *priv)
  777. {
  778. struct iwl4965_bt_cmd bt_cmd = {
  779. .flags = 3,
  780. .lead_time = 0xAA,
  781. .max_kill = 1,
  782. .kill_ack_mask = 0,
  783. .kill_cts_mask = 0,
  784. };
  785. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  786. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  787. }
  788. static int iwl4965_send_scan_abort(struct iwl_priv *priv)
  789. {
  790. int rc = 0;
  791. struct iwl4965_rx_packet *res;
  792. struct iwl_host_cmd cmd = {
  793. .id = REPLY_SCAN_ABORT_CMD,
  794. .meta.flags = CMD_WANT_SKB,
  795. };
  796. /* If there isn't a scan actively going on in the hardware
  797. * then we are in between scan bands and not actually
  798. * actively scanning, so don't send the abort command */
  799. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  800. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  801. return 0;
  802. }
  803. rc = iwl_send_cmd_sync(priv, &cmd);
  804. if (rc) {
  805. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  806. return rc;
  807. }
  808. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  809. if (res->u.status != CAN_ABORT_STATUS) {
  810. /* The scan abort will return 1 for success or
  811. * 2 for "failure". A failure condition can be
  812. * due to simply not being in an active scan which
  813. * can occur if we send the scan abort before we
  814. * the microcode has notified us that a scan is
  815. * completed. */
  816. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  817. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  818. clear_bit(STATUS_SCAN_HW, &priv->status);
  819. }
  820. dev_kfree_skb_any(cmd.meta.u.skb);
  821. return rc;
  822. }
  823. static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
  824. struct iwl_cmd *cmd,
  825. struct sk_buff *skb)
  826. {
  827. return 1;
  828. }
  829. /*
  830. * CARD_STATE_CMD
  831. *
  832. * Use: Sets the device's internal card state to enable, disable, or halt
  833. *
  834. * When in the 'enable' state the card operates as normal.
  835. * When in the 'disable' state, the card enters into a low power mode.
  836. * When in the 'halt' state, the card is shut down and must be fully
  837. * restarted to come back on.
  838. */
  839. static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  840. {
  841. struct iwl_host_cmd cmd = {
  842. .id = REPLY_CARD_STATE_CMD,
  843. .len = sizeof(u32),
  844. .data = &flags,
  845. .meta.flags = meta_flag,
  846. };
  847. if (meta_flag & CMD_ASYNC)
  848. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  849. return iwl_send_cmd(priv, &cmd);
  850. }
  851. static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
  852. struct iwl_cmd *cmd, struct sk_buff *skb)
  853. {
  854. struct iwl4965_rx_packet *res = NULL;
  855. if (!skb) {
  856. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  857. return 1;
  858. }
  859. res = (struct iwl4965_rx_packet *)skb->data;
  860. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  861. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  862. res->hdr.flags);
  863. return 1;
  864. }
  865. switch (res->u.add_sta.status) {
  866. case ADD_STA_SUCCESS_MSK:
  867. break;
  868. default:
  869. break;
  870. }
  871. /* We didn't cache the SKB; let the caller free it */
  872. return 1;
  873. }
  874. int iwl4965_send_add_station(struct iwl_priv *priv,
  875. struct iwl4965_addsta_cmd *sta, u8 flags)
  876. {
  877. struct iwl4965_rx_packet *res = NULL;
  878. int rc = 0;
  879. struct iwl_host_cmd cmd = {
  880. .id = REPLY_ADD_STA,
  881. .len = sizeof(struct iwl4965_addsta_cmd),
  882. .meta.flags = flags,
  883. .data = sta,
  884. };
  885. if (flags & CMD_ASYNC)
  886. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  887. else
  888. cmd.meta.flags |= CMD_WANT_SKB;
  889. rc = iwl_send_cmd(priv, &cmd);
  890. if (rc || (flags & CMD_ASYNC))
  891. return rc;
  892. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  893. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  894. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  895. res->hdr.flags);
  896. rc = -EIO;
  897. }
  898. if (rc == 0) {
  899. switch (res->u.add_sta.status) {
  900. case ADD_STA_SUCCESS_MSK:
  901. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  902. break;
  903. default:
  904. rc = -EIO;
  905. IWL_WARNING("REPLY_ADD_STA failed\n");
  906. break;
  907. }
  908. }
  909. priv->alloc_rxb_skb--;
  910. dev_kfree_skb_any(cmd.meta.u.skb);
  911. return rc;
  912. }
  913. static void iwl4965_clear_free_frames(struct iwl_priv *priv)
  914. {
  915. struct list_head *element;
  916. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  917. priv->frames_count);
  918. while (!list_empty(&priv->free_frames)) {
  919. element = priv->free_frames.next;
  920. list_del(element);
  921. kfree(list_entry(element, struct iwl4965_frame, list));
  922. priv->frames_count--;
  923. }
  924. if (priv->frames_count) {
  925. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  926. priv->frames_count);
  927. priv->frames_count = 0;
  928. }
  929. }
  930. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
  931. {
  932. struct iwl4965_frame *frame;
  933. struct list_head *element;
  934. if (list_empty(&priv->free_frames)) {
  935. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  936. if (!frame) {
  937. IWL_ERROR("Could not allocate frame!\n");
  938. return NULL;
  939. }
  940. priv->frames_count++;
  941. return frame;
  942. }
  943. element = priv->free_frames.next;
  944. list_del(element);
  945. return list_entry(element, struct iwl4965_frame, list);
  946. }
  947. static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
  948. {
  949. memset(frame, 0, sizeof(*frame));
  950. list_add(&frame->list, &priv->free_frames);
  951. }
  952. unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
  953. struct ieee80211_hdr *hdr,
  954. const u8 *dest, int left)
  955. {
  956. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  957. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  958. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  959. return 0;
  960. if (priv->ibss_beacon->len > left)
  961. return 0;
  962. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  963. return priv->ibss_beacon->len;
  964. }
  965. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  966. {
  967. u8 i;
  968. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  969. i = iwl4965_rates[i].next_ieee) {
  970. if (rate_mask & (1 << i))
  971. return iwl4965_rates[i].plcp;
  972. }
  973. return IWL_RATE_INVALID;
  974. }
  975. static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
  976. {
  977. struct iwl4965_frame *frame;
  978. unsigned int frame_size;
  979. int rc;
  980. u8 rate;
  981. frame = iwl4965_get_free_frame(priv);
  982. if (!frame) {
  983. IWL_ERROR("Could not obtain free frame buffer for beacon "
  984. "command.\n");
  985. return -ENOMEM;
  986. }
  987. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  988. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  989. 0xFF0);
  990. if (rate == IWL_INVALID_RATE)
  991. rate = IWL_RATE_6M_PLCP;
  992. } else {
  993. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  994. if (rate == IWL_INVALID_RATE)
  995. rate = IWL_RATE_1M_PLCP;
  996. }
  997. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  998. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  999. &frame->u.cmd[0]);
  1000. iwl4965_free_frame(priv, frame);
  1001. return rc;
  1002. }
  1003. /******************************************************************************
  1004. *
  1005. * Misc. internal state and helper functions
  1006. *
  1007. ******************************************************************************/
  1008. static void iwl4965_unset_hw_setting(struct iwl_priv *priv)
  1009. {
  1010. if (priv->shared_virt)
  1011. pci_free_consistent(priv->pci_dev,
  1012. sizeof(struct iwl4965_shared),
  1013. priv->shared_virt,
  1014. priv->shared_phys);
  1015. }
  1016. /**
  1017. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1018. *
  1019. * return : set the bit for each supported rate insert in ie
  1020. */
  1021. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1022. u16 basic_rate, int *left)
  1023. {
  1024. u16 ret_rates = 0, bit;
  1025. int i;
  1026. u8 *cnt = ie;
  1027. u8 *rates = ie + 1;
  1028. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1029. if (bit & supported_rate) {
  1030. ret_rates |= bit;
  1031. rates[*cnt] = iwl4965_rates[i].ieee |
  1032. ((bit & basic_rate) ? 0x80 : 0x00);
  1033. (*cnt)++;
  1034. (*left)--;
  1035. if ((*left <= 0) ||
  1036. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1037. break;
  1038. }
  1039. }
  1040. return ret_rates;
  1041. }
  1042. /**
  1043. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1044. */
  1045. static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
  1046. enum ieee80211_band band,
  1047. struct ieee80211_mgmt *frame,
  1048. int left, int is_direct)
  1049. {
  1050. int len = 0;
  1051. u8 *pos = NULL;
  1052. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1053. #ifdef CONFIG_IWL4965_HT
  1054. const struct ieee80211_supported_band *sband =
  1055. iwl4965_get_hw_mode(priv, band);
  1056. #endif /* CONFIG_IWL4965_HT */
  1057. /* Make sure there is enough space for the probe request,
  1058. * two mandatory IEs and the data */
  1059. left -= 24;
  1060. if (left < 0)
  1061. return 0;
  1062. len += 24;
  1063. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1064. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1065. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1066. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1067. frame->seq_ctrl = 0;
  1068. /* fill in our indirect SSID IE */
  1069. /* ...next IE... */
  1070. left -= 2;
  1071. if (left < 0)
  1072. return 0;
  1073. len += 2;
  1074. pos = &(frame->u.probe_req.variable[0]);
  1075. *pos++ = WLAN_EID_SSID;
  1076. *pos++ = 0;
  1077. /* fill in our direct SSID IE... */
  1078. if (is_direct) {
  1079. /* ...next IE... */
  1080. left -= 2 + priv->essid_len;
  1081. if (left < 0)
  1082. return 0;
  1083. /* ... fill it in... */
  1084. *pos++ = WLAN_EID_SSID;
  1085. *pos++ = priv->essid_len;
  1086. memcpy(pos, priv->essid, priv->essid_len);
  1087. pos += priv->essid_len;
  1088. len += 2 + priv->essid_len;
  1089. }
  1090. /* fill in supported rate */
  1091. /* ...next IE... */
  1092. left -= 2;
  1093. if (left < 0)
  1094. return 0;
  1095. /* ... fill it in... */
  1096. *pos++ = WLAN_EID_SUPP_RATES;
  1097. *pos = 0;
  1098. /* exclude 60M rate */
  1099. active_rates = priv->rates_mask;
  1100. active_rates &= ~IWL_RATE_60M_MASK;
  1101. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1102. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1103. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1104. active_rate_basic, &left);
  1105. active_rates &= ~ret_rates;
  1106. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1107. active_rate_basic, &left);
  1108. active_rates &= ~ret_rates;
  1109. len += 2 + *pos;
  1110. pos += (*pos) + 1;
  1111. if (active_rates == 0)
  1112. goto fill_end;
  1113. /* fill in supported extended rate */
  1114. /* ...next IE... */
  1115. left -= 2;
  1116. if (left < 0)
  1117. return 0;
  1118. /* ... fill it in... */
  1119. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1120. *pos = 0;
  1121. iwl4965_supported_rate_to_ie(pos, active_rates,
  1122. active_rate_basic, &left);
  1123. if (*pos > 0)
  1124. len += 2 + *pos;
  1125. #ifdef CONFIG_IWL4965_HT
  1126. if (sband && sband->ht_info.ht_supported) {
  1127. struct ieee80211_ht_cap *ht_cap;
  1128. pos += (*pos) + 1;
  1129. *pos++ = WLAN_EID_HT_CAPABILITY;
  1130. *pos++ = sizeof(struct ieee80211_ht_cap);
  1131. ht_cap = (struct ieee80211_ht_cap *)pos;
  1132. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1133. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1134. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1135. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1136. ((sband->ht_info.ampdu_density << 2) &
  1137. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1138. len += 2 + sizeof(struct ieee80211_ht_cap);
  1139. }
  1140. #endif /*CONFIG_IWL4965_HT */
  1141. fill_end:
  1142. return (u16)len;
  1143. }
  1144. /*
  1145. * QoS support
  1146. */
  1147. static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
  1148. struct iwl4965_qosparam_cmd *qos)
  1149. {
  1150. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1151. sizeof(struct iwl4965_qosparam_cmd), qos);
  1152. }
  1153. static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
  1154. {
  1155. unsigned long flags;
  1156. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1157. return;
  1158. if (!priv->qos_data.qos_enable)
  1159. return;
  1160. spin_lock_irqsave(&priv->lock, flags);
  1161. priv->qos_data.def_qos_parm.qos_flags = 0;
  1162. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1163. !priv->qos_data.qos_cap.q_AP.txop_request)
  1164. priv->qos_data.def_qos_parm.qos_flags |=
  1165. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1166. if (priv->qos_data.qos_active)
  1167. priv->qos_data.def_qos_parm.qos_flags |=
  1168. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1169. #ifdef CONFIG_IWL4965_HT
  1170. if (priv->current_ht_config.is_ht)
  1171. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1172. #endif /* CONFIG_IWL4965_HT */
  1173. spin_unlock_irqrestore(&priv->lock, flags);
  1174. if (force || iwl_is_associated(priv)) {
  1175. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1176. priv->qos_data.qos_active,
  1177. priv->qos_data.def_qos_parm.qos_flags);
  1178. iwl4965_send_qos_params_command(priv,
  1179. &(priv->qos_data.def_qos_parm));
  1180. }
  1181. }
  1182. /*
  1183. * Power management (not Tx power!) functions
  1184. */
  1185. #define MSEC_TO_USEC 1024
  1186. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1187. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1188. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1189. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1190. __constant_cpu_to_le32(X1), \
  1191. __constant_cpu_to_le32(X2), \
  1192. __constant_cpu_to_le32(X3), \
  1193. __constant_cpu_to_le32(X4)}
  1194. /* default power management (not Tx power) table values */
  1195. /* for tim 0-10 */
  1196. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1197. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1198. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1199. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1200. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1201. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1202. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1203. };
  1204. /* for tim > 10 */
  1205. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1206. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1207. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1208. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1209. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1210. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1211. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1212. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1213. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1214. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1215. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1216. };
  1217. int iwl4965_power_init_handle(struct iwl_priv *priv)
  1218. {
  1219. int rc = 0, i;
  1220. struct iwl4965_power_mgr *pow_data;
  1221. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1222. u16 pci_pm;
  1223. IWL_DEBUG_POWER("Initialize power \n");
  1224. pow_data = &(priv->power_data);
  1225. memset(pow_data, 0, sizeof(*pow_data));
  1226. pow_data->active_index = IWL_POWER_RANGE_0;
  1227. pow_data->dtim_val = 0xffff;
  1228. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1229. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1230. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1231. if (rc != 0)
  1232. return 0;
  1233. else {
  1234. struct iwl4965_powertable_cmd *cmd;
  1235. IWL_DEBUG_POWER("adjust power command flags\n");
  1236. for (i = 0; i < IWL_POWER_AC; i++) {
  1237. cmd = &pow_data->pwr_range_0[i].cmd;
  1238. if (pci_pm & 0x1)
  1239. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1240. else
  1241. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1242. }
  1243. }
  1244. return rc;
  1245. }
  1246. static int iwl4965_update_power_cmd(struct iwl_priv *priv,
  1247. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1248. {
  1249. int rc = 0, i;
  1250. u8 skip;
  1251. u32 max_sleep = 0;
  1252. struct iwl4965_power_vec_entry *range;
  1253. u8 period = 0;
  1254. struct iwl4965_power_mgr *pow_data;
  1255. if (mode > IWL_POWER_INDEX_5) {
  1256. IWL_DEBUG_POWER("Error invalid power mode \n");
  1257. return -1;
  1258. }
  1259. pow_data = &(priv->power_data);
  1260. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1261. range = &pow_data->pwr_range_0[0];
  1262. else
  1263. range = &pow_data->pwr_range_1[1];
  1264. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1265. #ifdef IWL_MAC80211_DISABLE
  1266. if (priv->assoc_network != NULL) {
  1267. unsigned long flags;
  1268. period = priv->assoc_network->tim.tim_period;
  1269. }
  1270. #endif /*IWL_MAC80211_DISABLE */
  1271. skip = range[mode].no_dtim;
  1272. if (period == 0) {
  1273. period = 1;
  1274. skip = 0;
  1275. }
  1276. if (skip == 0) {
  1277. max_sleep = period;
  1278. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1279. } else {
  1280. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1281. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1282. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1283. }
  1284. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1285. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1286. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1287. }
  1288. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1289. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1290. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1291. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1292. le32_to_cpu(cmd->sleep_interval[0]),
  1293. le32_to_cpu(cmd->sleep_interval[1]),
  1294. le32_to_cpu(cmd->sleep_interval[2]),
  1295. le32_to_cpu(cmd->sleep_interval[3]),
  1296. le32_to_cpu(cmd->sleep_interval[4]));
  1297. return rc;
  1298. }
  1299. static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
  1300. {
  1301. u32 uninitialized_var(final_mode);
  1302. int rc;
  1303. struct iwl4965_powertable_cmd cmd;
  1304. /* If on battery, set to 3,
  1305. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1306. * else user level */
  1307. switch (mode) {
  1308. case IWL_POWER_BATTERY:
  1309. final_mode = IWL_POWER_INDEX_3;
  1310. break;
  1311. case IWL_POWER_AC:
  1312. final_mode = IWL_POWER_MODE_CAM;
  1313. break;
  1314. default:
  1315. final_mode = mode;
  1316. break;
  1317. }
  1318. cmd.keep_alive_beacons = 0;
  1319. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1320. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1321. if (final_mode == IWL_POWER_MODE_CAM)
  1322. clear_bit(STATUS_POWER_PMI, &priv->status);
  1323. else
  1324. set_bit(STATUS_POWER_PMI, &priv->status);
  1325. return rc;
  1326. }
  1327. int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1328. {
  1329. /* Filter incoming packets to determine if they are targeted toward
  1330. * this network, discarding packets coming from ourselves */
  1331. switch (priv->iw_mode) {
  1332. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1333. /* packets from our adapter are dropped (echo) */
  1334. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1335. return 0;
  1336. /* {broad,multi}cast packets to our IBSS go through */
  1337. if (is_multicast_ether_addr(header->addr1))
  1338. return !compare_ether_addr(header->addr3, priv->bssid);
  1339. /* packets to our adapter go through */
  1340. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1341. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1342. /* packets from our adapter are dropped (echo) */
  1343. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1344. return 0;
  1345. /* {broad,multi}cast packets to our BSS go through */
  1346. if (is_multicast_ether_addr(header->addr1))
  1347. return !compare_ether_addr(header->addr2, priv->bssid);
  1348. /* packets to our adapter go through */
  1349. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1350. default:
  1351. break;
  1352. }
  1353. return 1;
  1354. }
  1355. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1356. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1357. {
  1358. switch (status & TX_STATUS_MSK) {
  1359. case TX_STATUS_SUCCESS:
  1360. return "SUCCESS";
  1361. TX_STATUS_ENTRY(SHORT_LIMIT);
  1362. TX_STATUS_ENTRY(LONG_LIMIT);
  1363. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1364. TX_STATUS_ENTRY(MGMNT_ABORT);
  1365. TX_STATUS_ENTRY(NEXT_FRAG);
  1366. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1367. TX_STATUS_ENTRY(DEST_PS);
  1368. TX_STATUS_ENTRY(ABORTED);
  1369. TX_STATUS_ENTRY(BT_RETRY);
  1370. TX_STATUS_ENTRY(STA_INVALID);
  1371. TX_STATUS_ENTRY(FRAG_DROPPED);
  1372. TX_STATUS_ENTRY(TID_DISABLE);
  1373. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1374. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1375. TX_STATUS_ENTRY(TX_LOCKED);
  1376. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1377. }
  1378. return "UNKNOWN";
  1379. }
  1380. /**
  1381. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1382. *
  1383. * NOTE: priv->mutex is not required before calling this function
  1384. */
  1385. static int iwl4965_scan_cancel(struct iwl_priv *priv)
  1386. {
  1387. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1388. clear_bit(STATUS_SCANNING, &priv->status);
  1389. return 0;
  1390. }
  1391. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1392. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1393. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1394. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1395. queue_work(priv->workqueue, &priv->abort_scan);
  1396. } else
  1397. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1398. return test_bit(STATUS_SCANNING, &priv->status);
  1399. }
  1400. return 0;
  1401. }
  1402. /**
  1403. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1404. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1405. *
  1406. * NOTE: priv->mutex must be held before calling this function
  1407. */
  1408. static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1409. {
  1410. unsigned long now = jiffies;
  1411. int ret;
  1412. ret = iwl4965_scan_cancel(priv);
  1413. if (ret && ms) {
  1414. mutex_unlock(&priv->mutex);
  1415. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1416. test_bit(STATUS_SCANNING, &priv->status))
  1417. msleep(1);
  1418. mutex_lock(&priv->mutex);
  1419. return test_bit(STATUS_SCANNING, &priv->status);
  1420. }
  1421. return ret;
  1422. }
  1423. static void iwl4965_sequence_reset(struct iwl_priv *priv)
  1424. {
  1425. /* Reset ieee stats */
  1426. /* We don't reset the net_device_stats (ieee->stats) on
  1427. * re-association */
  1428. priv->last_seq_num = -1;
  1429. priv->last_frag_num = -1;
  1430. priv->last_packet_time = 0;
  1431. iwl4965_scan_cancel(priv);
  1432. }
  1433. #define MAX_UCODE_BEACON_INTERVAL 4096
  1434. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1435. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1436. {
  1437. u16 new_val = 0;
  1438. u16 beacon_factor = 0;
  1439. beacon_factor =
  1440. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1441. / MAX_UCODE_BEACON_INTERVAL;
  1442. new_val = beacon_val / beacon_factor;
  1443. return cpu_to_le16(new_val);
  1444. }
  1445. static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
  1446. {
  1447. u64 interval_tm_unit;
  1448. u64 tsf, result;
  1449. unsigned long flags;
  1450. struct ieee80211_conf *conf = NULL;
  1451. u16 beacon_int = 0;
  1452. conf = ieee80211_get_hw_conf(priv->hw);
  1453. spin_lock_irqsave(&priv->lock, flags);
  1454. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
  1455. priv->rxon_timing.timestamp.dw[0] =
  1456. cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
  1457. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1458. tsf = priv->timestamp;
  1459. beacon_int = priv->beacon_int;
  1460. spin_unlock_irqrestore(&priv->lock, flags);
  1461. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1462. if (beacon_int == 0) {
  1463. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1464. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1465. } else {
  1466. priv->rxon_timing.beacon_interval =
  1467. cpu_to_le16(beacon_int);
  1468. priv->rxon_timing.beacon_interval =
  1469. iwl4965_adjust_beacon_interval(
  1470. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1471. }
  1472. priv->rxon_timing.atim_window = 0;
  1473. } else {
  1474. priv->rxon_timing.beacon_interval =
  1475. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1476. /* TODO: we need to get atim_window from upper stack
  1477. * for now we set to 0 */
  1478. priv->rxon_timing.atim_window = 0;
  1479. }
  1480. interval_tm_unit =
  1481. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1482. result = do_div(tsf, interval_tm_unit);
  1483. priv->rxon_timing.beacon_init_val =
  1484. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1485. IWL_DEBUG_ASSOC
  1486. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1487. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1488. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1489. le16_to_cpu(priv->rxon_timing.atim_window));
  1490. }
  1491. static int iwl4965_scan_initiate(struct iwl_priv *priv)
  1492. {
  1493. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1494. IWL_ERROR("APs don't scan.\n");
  1495. return 0;
  1496. }
  1497. if (!iwl_is_ready_rf(priv)) {
  1498. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1499. return -EIO;
  1500. }
  1501. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1502. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1503. return -EAGAIN;
  1504. }
  1505. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1506. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1507. "Queuing.\n");
  1508. return -EAGAIN;
  1509. }
  1510. IWL_DEBUG_INFO("Starting scan...\n");
  1511. priv->scan_bands = 2;
  1512. set_bit(STATUS_SCANNING, &priv->status);
  1513. priv->scan_start = jiffies;
  1514. priv->scan_pass_start = priv->scan_start;
  1515. queue_work(priv->workqueue, &priv->request_scan);
  1516. return 0;
  1517. }
  1518. static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
  1519. enum ieee80211_band band)
  1520. {
  1521. if (band == IEEE80211_BAND_5GHZ) {
  1522. priv->staging_rxon.flags &=
  1523. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1524. | RXON_FLG_CCK_MSK);
  1525. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1526. } else {
  1527. /* Copied from iwl4965_post_associate() */
  1528. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1529. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1530. else
  1531. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1532. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  1533. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1534. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1535. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1536. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1537. }
  1538. }
  1539. /*
  1540. * initialize rxon structure with default values from eeprom
  1541. */
  1542. static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
  1543. {
  1544. const struct iwl_channel_info *ch_info;
  1545. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  1546. switch (priv->iw_mode) {
  1547. case IEEE80211_IF_TYPE_AP:
  1548. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  1549. break;
  1550. case IEEE80211_IF_TYPE_STA:
  1551. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1552. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1553. break;
  1554. case IEEE80211_IF_TYPE_IBSS:
  1555. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1556. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1557. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1558. RXON_FILTER_ACCEPT_GRP_MSK;
  1559. break;
  1560. case IEEE80211_IF_TYPE_MNTR:
  1561. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1562. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1563. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1564. break;
  1565. default:
  1566. IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
  1567. break;
  1568. }
  1569. #if 0
  1570. /* TODO: Figure out when short_preamble would be set and cache from
  1571. * that */
  1572. if (!hw_to_local(priv->hw)->short_preamble)
  1573. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1574. else
  1575. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1576. #endif
  1577. ch_info = iwl_get_channel_info(priv, priv->band,
  1578. le16_to_cpu(priv->staging_rxon.channel));
  1579. if (!ch_info)
  1580. ch_info = &priv->channel_info[0];
  1581. /*
  1582. * in some case A channels are all non IBSS
  1583. * in this case force B/G channel
  1584. */
  1585. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  1586. !(is_channel_ibss(ch_info)))
  1587. ch_info = &priv->channel_info[0];
  1588. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1589. priv->band = ch_info->band;
  1590. iwl4965_set_flags_for_phymode(priv, priv->band);
  1591. priv->staging_rxon.ofdm_basic_rates =
  1592. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1593. priv->staging_rxon.cck_basic_rates =
  1594. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1595. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  1596. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  1597. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1598. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1599. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1600. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1601. iwl4965_set_rxon_chain(priv);
  1602. }
  1603. static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
  1604. {
  1605. if (mode == IEEE80211_IF_TYPE_IBSS) {
  1606. const struct iwl_channel_info *ch_info;
  1607. ch_info = iwl_get_channel_info(priv,
  1608. priv->band,
  1609. le16_to_cpu(priv->staging_rxon.channel));
  1610. if (!ch_info || !is_channel_ibss(ch_info)) {
  1611. IWL_ERROR("channel %d not IBSS channel\n",
  1612. le16_to_cpu(priv->staging_rxon.channel));
  1613. return -EINVAL;
  1614. }
  1615. }
  1616. priv->iw_mode = mode;
  1617. iwl4965_connection_init_rx_config(priv);
  1618. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1619. iwlcore_clear_stations_table(priv);
  1620. /* dont commit rxon if rf-kill is on*/
  1621. if (!iwl_is_ready_rf(priv))
  1622. return -EAGAIN;
  1623. cancel_delayed_work(&priv->scan_check);
  1624. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  1625. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  1626. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1627. return -EAGAIN;
  1628. }
  1629. iwl4965_commit_rxon(priv);
  1630. return 0;
  1631. }
  1632. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1633. struct ieee80211_tx_control *ctl,
  1634. struct iwl_cmd *cmd,
  1635. struct sk_buff *skb_frag,
  1636. int sta_id)
  1637. {
  1638. struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  1639. struct iwl_wep_key *wepkey;
  1640. int keyidx = 0;
  1641. BUG_ON(ctl->key_idx > 3);
  1642. switch (keyinfo->alg) {
  1643. case ALG_CCMP:
  1644. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  1645. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  1646. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1647. cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
  1648. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  1649. break;
  1650. case ALG_TKIP:
  1651. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  1652. ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
  1653. IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
  1654. IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
  1655. break;
  1656. case ALG_WEP:
  1657. wepkey = &priv->wep_keys[ctl->key_idx];
  1658. cmd->cmd.tx.sec_ctl = 0;
  1659. if (priv->default_wep_key) {
  1660. /* the WEP key was sent as static */
  1661. keyidx = ctl->key_idx;
  1662. memcpy(&cmd->cmd.tx.key[3], wepkey->key,
  1663. wepkey->key_size);
  1664. if (wepkey->key_size == WEP_KEY_LEN_128)
  1665. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  1666. } else {
  1667. /* the WEP key was sent as dynamic */
  1668. keyidx = keyinfo->keyidx;
  1669. memcpy(&cmd->cmd.tx.key[3], keyinfo->key,
  1670. keyinfo->keylen);
  1671. if (keyinfo->keylen == WEP_KEY_LEN_128)
  1672. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  1673. }
  1674. cmd->cmd.tx.sec_ctl |= (TX_CMD_SEC_WEP |
  1675. (keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT);
  1676. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1677. "with key %d\n", keyidx);
  1678. break;
  1679. default:
  1680. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  1681. break;
  1682. }
  1683. }
  1684. /*
  1685. * handle build REPLY_TX command notification.
  1686. */
  1687. static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
  1688. struct iwl_cmd *cmd,
  1689. struct ieee80211_tx_control *ctrl,
  1690. struct ieee80211_hdr *hdr,
  1691. int is_unicast, u8 std_id)
  1692. {
  1693. __le16 *qc;
  1694. u16 fc = le16_to_cpu(hdr->frame_control);
  1695. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  1696. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1697. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  1698. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1699. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  1700. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1701. if (ieee80211_is_probe_response(fc) &&
  1702. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1703. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1704. } else {
  1705. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1706. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1707. }
  1708. if (ieee80211_is_back_request(fc))
  1709. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  1710. cmd->cmd.tx.sta_id = std_id;
  1711. if (ieee80211_get_morefrag(hdr))
  1712. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1713. qc = ieee80211_get_qos_ctrl(hdr);
  1714. if (qc) {
  1715. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  1716. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1717. } else
  1718. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1719. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  1720. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1721. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1722. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  1723. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1724. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1725. }
  1726. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1727. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1728. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1729. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  1730. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  1731. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  1732. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  1733. else
  1734. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  1735. } else {
  1736. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  1737. }
  1738. cmd->cmd.tx.driver_txop = 0;
  1739. cmd->cmd.tx.tx_flags = tx_flags;
  1740. cmd->cmd.tx.next_frame_len = 0;
  1741. }
  1742. static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  1743. {
  1744. /* 0 - mgmt, 1 - cnt, 2 - data */
  1745. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  1746. priv->tx_stats[idx].cnt++;
  1747. priv->tx_stats[idx].bytes += len;
  1748. }
  1749. /**
  1750. * iwl4965_get_sta_id - Find station's index within station table
  1751. *
  1752. * If new IBSS station, create new entry in station table
  1753. */
  1754. static int iwl4965_get_sta_id(struct iwl_priv *priv,
  1755. struct ieee80211_hdr *hdr)
  1756. {
  1757. int sta_id;
  1758. u16 fc = le16_to_cpu(hdr->frame_control);
  1759. DECLARE_MAC_BUF(mac);
  1760. /* If this frame is broadcast or management, use broadcast station id */
  1761. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1762. is_multicast_ether_addr(hdr->addr1))
  1763. return priv->hw_setting.bcast_sta_id;
  1764. switch (priv->iw_mode) {
  1765. /* If we are a client station in a BSS network, use the special
  1766. * AP station entry (that's the only station we communicate with) */
  1767. case IEEE80211_IF_TYPE_STA:
  1768. return IWL_AP_ID;
  1769. /* If we are an AP, then find the station, or use BCAST */
  1770. case IEEE80211_IF_TYPE_AP:
  1771. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1772. if (sta_id != IWL_INVALID_STATION)
  1773. return sta_id;
  1774. return priv->hw_setting.bcast_sta_id;
  1775. /* If this frame is going out to an IBSS network, find the station,
  1776. * or create a new station table entry */
  1777. case IEEE80211_IF_TYPE_IBSS:
  1778. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1779. if (sta_id != IWL_INVALID_STATION)
  1780. return sta_id;
  1781. /* Create new station table entry */
  1782. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  1783. 0, CMD_ASYNC, NULL);
  1784. if (sta_id != IWL_INVALID_STATION)
  1785. return sta_id;
  1786. IWL_DEBUG_DROP("Station %s not in station map. "
  1787. "Defaulting to broadcast...\n",
  1788. print_mac(mac, hdr->addr1));
  1789. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1790. return priv->hw_setting.bcast_sta_id;
  1791. default:
  1792. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  1793. return priv->hw_setting.bcast_sta_id;
  1794. }
  1795. }
  1796. /*
  1797. * start REPLY_TX command process
  1798. */
  1799. static int iwl4965_tx_skb(struct iwl_priv *priv,
  1800. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  1801. {
  1802. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1803. struct iwl4965_tfd_frame *tfd;
  1804. u32 *control_flags;
  1805. int txq_id = ctl->queue;
  1806. struct iwl4965_tx_queue *txq = NULL;
  1807. struct iwl4965_queue *q = NULL;
  1808. dma_addr_t phys_addr;
  1809. dma_addr_t txcmd_phys;
  1810. dma_addr_t scratch_phys;
  1811. struct iwl_cmd *out_cmd = NULL;
  1812. u16 len, idx, len_org;
  1813. u8 id, hdr_len, unicast;
  1814. u8 sta_id;
  1815. u16 seq_number = 0;
  1816. u16 fc;
  1817. __le16 *qc;
  1818. u8 wait_write_ptr = 0;
  1819. unsigned long flags;
  1820. int rc;
  1821. spin_lock_irqsave(&priv->lock, flags);
  1822. if (iwl_is_rfkill(priv)) {
  1823. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1824. goto drop_unlock;
  1825. }
  1826. if (!priv->vif) {
  1827. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  1828. goto drop_unlock;
  1829. }
  1830. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1831. IWL_ERROR("ERROR: No TX rate available.\n");
  1832. goto drop_unlock;
  1833. }
  1834. unicast = !is_multicast_ether_addr(hdr->addr1);
  1835. id = 0;
  1836. fc = le16_to_cpu(hdr->frame_control);
  1837. #ifdef CONFIG_IWLWIFI_DEBUG
  1838. if (ieee80211_is_auth(fc))
  1839. IWL_DEBUG_TX("Sending AUTH frame\n");
  1840. else if (ieee80211_is_assoc_request(fc))
  1841. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1842. else if (ieee80211_is_reassoc_request(fc))
  1843. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1844. #endif
  1845. /* drop all data frame if we are not associated */
  1846. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  1847. (!iwl_is_associated(priv) ||
  1848. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  1849. !priv->assoc_station_added)) {
  1850. IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
  1851. goto drop_unlock;
  1852. }
  1853. spin_unlock_irqrestore(&priv->lock, flags);
  1854. hdr_len = ieee80211_get_hdrlen(fc);
  1855. /* Find (or create) index into station table for destination station */
  1856. sta_id = iwl4965_get_sta_id(priv, hdr);
  1857. if (sta_id == IWL_INVALID_STATION) {
  1858. DECLARE_MAC_BUF(mac);
  1859. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  1860. print_mac(mac, hdr->addr1));
  1861. goto drop;
  1862. }
  1863. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1864. qc = ieee80211_get_qos_ctrl(hdr);
  1865. if (qc) {
  1866. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  1867. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  1868. IEEE80211_SCTL_SEQ;
  1869. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1870. (hdr->seq_ctrl &
  1871. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1872. seq_number += 0x10;
  1873. #ifdef CONFIG_IWL4965_HT
  1874. /* aggregation is on for this <sta,tid> */
  1875. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1876. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  1877. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  1878. #endif /* CONFIG_IWL4965_HT */
  1879. }
  1880. /* Descriptor for chosen Tx queue */
  1881. txq = &priv->txq[txq_id];
  1882. q = &txq->q;
  1883. spin_lock_irqsave(&priv->lock, flags);
  1884. /* Set up first empty TFD within this queue's circular TFD buffer */
  1885. tfd = &txq->bd[q->write_ptr];
  1886. memset(tfd, 0, sizeof(*tfd));
  1887. control_flags = (u32 *) tfd;
  1888. idx = get_cmd_index(q, q->write_ptr, 0);
  1889. /* Set up driver data for this TFD */
  1890. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  1891. txq->txb[q->write_ptr].skb[0] = skb;
  1892. memcpy(&(txq->txb[q->write_ptr].status.control),
  1893. ctl, sizeof(struct ieee80211_tx_control));
  1894. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  1895. out_cmd = &txq->cmd[idx];
  1896. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  1897. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  1898. /*
  1899. * Set up the Tx-command (not MAC!) header.
  1900. * Store the chosen Tx queue and TFD index within the sequence field;
  1901. * after Tx, uCode's Tx response will return this value so driver can
  1902. * locate the frame within the tx queue and do post-tx processing.
  1903. */
  1904. out_cmd->hdr.cmd = REPLY_TX;
  1905. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  1906. INDEX_TO_SEQ(q->write_ptr)));
  1907. /* Copy MAC header from skb into command buffer */
  1908. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  1909. /*
  1910. * Use the first empty entry in this queue's command buffer array
  1911. * to contain the Tx command and MAC header concatenated together
  1912. * (payload data will be in another buffer).
  1913. * Size of this varies, due to varying MAC header length.
  1914. * If end is not dword aligned, we'll have 2 extra bytes at the end
  1915. * of the MAC header (device reads on dword boundaries).
  1916. * We'll tell device about this padding later.
  1917. */
  1918. len = priv->hw_setting.tx_cmd_len +
  1919. sizeof(struct iwl_cmd_header) + hdr_len;
  1920. len_org = len;
  1921. len = (len + 3) & ~3;
  1922. if (len_org != len)
  1923. len_org = 1;
  1924. else
  1925. len_org = 0;
  1926. /* Physical address of this Tx command's header (not MAC header!),
  1927. * within command buffer array. */
  1928. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  1929. offsetof(struct iwl_cmd, hdr);
  1930. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1931. * first entry */
  1932. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  1933. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  1934. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
  1935. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  1936. * if any (802.11 null frames have no payload). */
  1937. len = skb->len - hdr_len;
  1938. if (len) {
  1939. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  1940. len, PCI_DMA_TODEVICE);
  1941. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  1942. }
  1943. /* Tell 4965 about any 2-byte padding after MAC header */
  1944. if (len_org)
  1945. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  1946. /* Total # bytes to be transmitted */
  1947. len = (u16)skb->len;
  1948. out_cmd->cmd.tx.len = cpu_to_le16(len);
  1949. /* TODO need this for burst mode later on */
  1950. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  1951. /* set is_hcca to 0; it probably will never be implemented */
  1952. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  1953. iwl_update_tx_stats(priv, fc, len);
  1954. scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
  1955. offsetof(struct iwl4965_tx_cmd, scratch);
  1956. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  1957. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  1958. if (!ieee80211_get_morefrag(hdr)) {
  1959. txq->need_update = 1;
  1960. if (qc) {
  1961. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  1962. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  1963. }
  1964. } else {
  1965. wait_write_ptr = 1;
  1966. txq->need_update = 0;
  1967. }
  1968. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  1969. sizeof(out_cmd->cmd.tx));
  1970. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  1971. ieee80211_get_hdrlen(fc));
  1972. /* Set up entry for this TFD in Tx byte-count array */
  1973. priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, len);
  1974. /* Tell device the write index *just past* this latest filled TFD */
  1975. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  1976. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  1977. spin_unlock_irqrestore(&priv->lock, flags);
  1978. if (rc)
  1979. return rc;
  1980. if ((iwl4965_queue_space(q) < q->high_mark)
  1981. && priv->mac80211_registered) {
  1982. if (wait_write_ptr) {
  1983. spin_lock_irqsave(&priv->lock, flags);
  1984. txq->need_update = 1;
  1985. iwl4965_tx_queue_update_write_ptr(priv, txq);
  1986. spin_unlock_irqrestore(&priv->lock, flags);
  1987. }
  1988. ieee80211_stop_queue(priv->hw, ctl->queue);
  1989. }
  1990. return 0;
  1991. drop_unlock:
  1992. spin_unlock_irqrestore(&priv->lock, flags);
  1993. drop:
  1994. return -1;
  1995. }
  1996. static void iwl4965_set_rate(struct iwl_priv *priv)
  1997. {
  1998. const struct ieee80211_supported_band *hw = NULL;
  1999. struct ieee80211_rate *rate;
  2000. int i;
  2001. hw = iwl4965_get_hw_mode(priv, priv->band);
  2002. if (!hw) {
  2003. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2004. return;
  2005. }
  2006. priv->active_rate = 0;
  2007. priv->active_rate_basic = 0;
  2008. for (i = 0; i < hw->n_bitrates; i++) {
  2009. rate = &(hw->bitrates[i]);
  2010. if (rate->hw_value < IWL_RATE_COUNT)
  2011. priv->active_rate |= (1 << rate->hw_value);
  2012. }
  2013. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2014. priv->active_rate, priv->active_rate_basic);
  2015. /*
  2016. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2017. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2018. * OFDM
  2019. */
  2020. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2021. priv->staging_rxon.cck_basic_rates =
  2022. ((priv->active_rate_basic &
  2023. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2024. else
  2025. priv->staging_rxon.cck_basic_rates =
  2026. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2027. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2028. priv->staging_rxon.ofdm_basic_rates =
  2029. ((priv->active_rate_basic &
  2030. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2031. IWL_FIRST_OFDM_RATE) & 0xFF;
  2032. else
  2033. priv->staging_rxon.ofdm_basic_rates =
  2034. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2035. }
  2036. void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2037. {
  2038. unsigned long flags;
  2039. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2040. return;
  2041. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2042. disable_radio ? "OFF" : "ON");
  2043. if (disable_radio) {
  2044. iwl4965_scan_cancel(priv);
  2045. /* FIXME: This is a workaround for AP */
  2046. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2047. spin_lock_irqsave(&priv->lock, flags);
  2048. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2049. CSR_UCODE_SW_BIT_RFKILL);
  2050. spin_unlock_irqrestore(&priv->lock, flags);
  2051. /* call the host command only if no hw rf-kill set */
  2052. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  2053. iwl4965_send_card_state(priv,
  2054. CARD_STATE_CMD_DISABLE,
  2055. 0);
  2056. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2057. /* make sure mac80211 stop sending Tx frame */
  2058. if (priv->mac80211_registered)
  2059. ieee80211_stop_queues(priv->hw);
  2060. }
  2061. return;
  2062. }
  2063. spin_lock_irqsave(&priv->lock, flags);
  2064. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2065. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2066. spin_unlock_irqrestore(&priv->lock, flags);
  2067. /* wake up ucode */
  2068. msleep(10);
  2069. spin_lock_irqsave(&priv->lock, flags);
  2070. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2071. if (!iwl_grab_nic_access(priv))
  2072. iwl_release_nic_access(priv);
  2073. spin_unlock_irqrestore(&priv->lock, flags);
  2074. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2075. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2076. "disabled by HW switch\n");
  2077. return;
  2078. }
  2079. queue_work(priv->workqueue, &priv->restart);
  2080. return;
  2081. }
  2082. void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2083. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2084. {
  2085. u16 fc =
  2086. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2087. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2088. return;
  2089. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2090. return;
  2091. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2092. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2093. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2094. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2095. * Decryption will be done in SW. */
  2096. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2097. RX_RES_STATUS_BAD_KEY_TTAK)
  2098. break;
  2099. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2100. RX_RES_STATUS_BAD_ICV_MIC)
  2101. stats->flag |= RX_FLAG_MMIC_ERROR;
  2102. case RX_RES_STATUS_SEC_TYPE_WEP:
  2103. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2104. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2105. RX_RES_STATUS_DECRYPT_OK) {
  2106. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2107. stats->flag |= RX_FLAG_DECRYPTED;
  2108. }
  2109. break;
  2110. default:
  2111. break;
  2112. }
  2113. }
  2114. #define IWL_PACKET_RETRY_TIME HZ
  2115. int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2116. {
  2117. u16 sc = le16_to_cpu(header->seq_ctrl);
  2118. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2119. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2120. u16 *last_seq, *last_frag;
  2121. unsigned long *last_time;
  2122. switch (priv->iw_mode) {
  2123. case IEEE80211_IF_TYPE_IBSS:{
  2124. struct list_head *p;
  2125. struct iwl4965_ibss_seq *entry = NULL;
  2126. u8 *mac = header->addr2;
  2127. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2128. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2129. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2130. if (!compare_ether_addr(entry->mac, mac))
  2131. break;
  2132. }
  2133. if (p == &priv->ibss_mac_hash[index]) {
  2134. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2135. if (!entry) {
  2136. IWL_ERROR("Cannot malloc new mac entry\n");
  2137. return 0;
  2138. }
  2139. memcpy(entry->mac, mac, ETH_ALEN);
  2140. entry->seq_num = seq;
  2141. entry->frag_num = frag;
  2142. entry->packet_time = jiffies;
  2143. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2144. return 0;
  2145. }
  2146. last_seq = &entry->seq_num;
  2147. last_frag = &entry->frag_num;
  2148. last_time = &entry->packet_time;
  2149. break;
  2150. }
  2151. case IEEE80211_IF_TYPE_STA:
  2152. last_seq = &priv->last_seq_num;
  2153. last_frag = &priv->last_frag_num;
  2154. last_time = &priv->last_packet_time;
  2155. break;
  2156. default:
  2157. return 0;
  2158. }
  2159. if ((*last_seq == seq) &&
  2160. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2161. if (*last_frag == frag)
  2162. goto drop;
  2163. if (*last_frag + 1 != frag)
  2164. /* out-of-order fragment */
  2165. goto drop;
  2166. } else
  2167. *last_seq = seq;
  2168. *last_frag = frag;
  2169. *last_time = jiffies;
  2170. return 0;
  2171. drop:
  2172. return 1;
  2173. }
  2174. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2175. #include "iwl-spectrum.h"
  2176. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2177. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2178. #define TIME_UNIT 1024
  2179. /*
  2180. * extended beacon time format
  2181. * time in usec will be changed into a 32-bit value in 8:24 format
  2182. * the high 1 byte is the beacon counts
  2183. * the lower 3 bytes is the time in usec within one beacon interval
  2184. */
  2185. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2186. {
  2187. u32 quot;
  2188. u32 rem;
  2189. u32 interval = beacon_interval * 1024;
  2190. if (!interval || !usec)
  2191. return 0;
  2192. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2193. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2194. return (quot << 24) + rem;
  2195. }
  2196. /* base is usually what we get from ucode with each received frame,
  2197. * the same as HW timer counter counting down
  2198. */
  2199. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2200. {
  2201. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2202. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2203. u32 interval = beacon_interval * TIME_UNIT;
  2204. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2205. (addon & BEACON_TIME_MASK_HIGH);
  2206. if (base_low > addon_low)
  2207. res += base_low - addon_low;
  2208. else if (base_low < addon_low) {
  2209. res += interval + base_low - addon_low;
  2210. res += (1 << 24);
  2211. } else
  2212. res += (1 << 24);
  2213. return cpu_to_le32(res);
  2214. }
  2215. static int iwl4965_get_measurement(struct iwl_priv *priv,
  2216. struct ieee80211_measurement_params *params,
  2217. u8 type)
  2218. {
  2219. struct iwl4965_spectrum_cmd spectrum;
  2220. struct iwl4965_rx_packet *res;
  2221. struct iwl_host_cmd cmd = {
  2222. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2223. .data = (void *)&spectrum,
  2224. .meta.flags = CMD_WANT_SKB,
  2225. };
  2226. u32 add_time = le64_to_cpu(params->start_time);
  2227. int rc;
  2228. int spectrum_resp_status;
  2229. int duration = le16_to_cpu(params->duration);
  2230. if (iwl_is_associated(priv))
  2231. add_time =
  2232. iwl4965_usecs_to_beacons(
  2233. le64_to_cpu(params->start_time) - priv->last_tsf,
  2234. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2235. memset(&spectrum, 0, sizeof(spectrum));
  2236. spectrum.channel_count = cpu_to_le16(1);
  2237. spectrum.flags =
  2238. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2239. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2240. cmd.len = sizeof(spectrum);
  2241. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2242. if (iwl_is_associated(priv))
  2243. spectrum.start_time =
  2244. iwl4965_add_beacon_time(priv->last_beacon_time,
  2245. add_time,
  2246. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2247. else
  2248. spectrum.start_time = 0;
  2249. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2250. spectrum.channels[0].channel = params->channel;
  2251. spectrum.channels[0].type = type;
  2252. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2253. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2254. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2255. rc = iwl_send_cmd_sync(priv, &cmd);
  2256. if (rc)
  2257. return rc;
  2258. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2259. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2260. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2261. rc = -EIO;
  2262. }
  2263. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2264. switch (spectrum_resp_status) {
  2265. case 0: /* Command will be handled */
  2266. if (res->u.spectrum.id != 0xff) {
  2267. IWL_DEBUG_INFO
  2268. ("Replaced existing measurement: %d\n",
  2269. res->u.spectrum.id);
  2270. priv->measurement_status &= ~MEASUREMENT_READY;
  2271. }
  2272. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2273. rc = 0;
  2274. break;
  2275. case 1: /* Command will not be handled */
  2276. rc = -EAGAIN;
  2277. break;
  2278. }
  2279. dev_kfree_skb_any(cmd.meta.u.skb);
  2280. return rc;
  2281. }
  2282. #endif
  2283. static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
  2284. struct iwl4965_tx_info *tx_sta)
  2285. {
  2286. tx_sta->status.ack_signal = 0;
  2287. tx_sta->status.excessive_retries = 0;
  2288. tx_sta->status.queue_length = 0;
  2289. tx_sta->status.queue_number = 0;
  2290. if (in_interrupt())
  2291. ieee80211_tx_status_irqsafe(priv->hw,
  2292. tx_sta->skb[0], &(tx_sta->status));
  2293. else
  2294. ieee80211_tx_status(priv->hw,
  2295. tx_sta->skb[0], &(tx_sta->status));
  2296. tx_sta->skb[0] = NULL;
  2297. }
  2298. /**
  2299. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2300. *
  2301. * When FW advances 'R' index, all entries between old and new 'R' index
  2302. * need to be reclaimed. As result, some free space forms. If there is
  2303. * enough free space (> low mark), wake the stack that feeds us.
  2304. */
  2305. int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2306. {
  2307. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2308. struct iwl4965_queue *q = &txq->q;
  2309. int nfreed = 0;
  2310. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2311. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2312. "is out of range [0-%d] %d %d.\n", txq_id,
  2313. index, q->n_bd, q->write_ptr, q->read_ptr);
  2314. return 0;
  2315. }
  2316. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2317. q->read_ptr != index;
  2318. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2319. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2320. iwl4965_txstatus_to_ieee(priv,
  2321. &(txq->txb[txq->q.read_ptr]));
  2322. iwl4965_hw_txq_free_tfd(priv, txq);
  2323. } else if (nfreed > 1) {
  2324. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2325. q->write_ptr, q->read_ptr);
  2326. queue_work(priv->workqueue, &priv->restart);
  2327. }
  2328. nfreed++;
  2329. }
  2330. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2331. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2332. priv->mac80211_registered)
  2333. ieee80211_wake_queue(priv->hw, txq_id); */
  2334. return nfreed;
  2335. }
  2336. static int iwl4965_is_tx_success(u32 status)
  2337. {
  2338. status &= TX_STATUS_MSK;
  2339. return (status == TX_STATUS_SUCCESS)
  2340. || (status == TX_STATUS_DIRECT_DONE);
  2341. }
  2342. /******************************************************************************
  2343. *
  2344. * Generic RX handler implementations
  2345. *
  2346. ******************************************************************************/
  2347. #ifdef CONFIG_IWL4965_HT
  2348. static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
  2349. struct ieee80211_hdr *hdr)
  2350. {
  2351. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2352. return IWL_AP_ID;
  2353. else {
  2354. u8 *da = ieee80211_get_DA(hdr);
  2355. return iwl4965_hw_find_station(priv, da);
  2356. }
  2357. }
  2358. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2359. struct iwl_priv *priv, int txq_id, int idx)
  2360. {
  2361. if (priv->txq[txq_id].txb[idx].skb[0])
  2362. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2363. txb[idx].skb[0]->data;
  2364. return NULL;
  2365. }
  2366. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2367. {
  2368. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2369. tx_resp->frame_count);
  2370. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2371. }
  2372. /**
  2373. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2374. */
  2375. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2376. struct iwl4965_ht_agg *agg,
  2377. struct iwl4965_tx_resp_agg *tx_resp,
  2378. u16 start_idx)
  2379. {
  2380. u16 status;
  2381. struct agg_tx_status *frame_status = &tx_resp->status;
  2382. struct ieee80211_tx_status *tx_status = NULL;
  2383. struct ieee80211_hdr *hdr = NULL;
  2384. int i, sh;
  2385. int txq_id, idx;
  2386. u16 seq;
  2387. if (agg->wait_for_ba)
  2388. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2389. agg->frame_count = tx_resp->frame_count;
  2390. agg->start_idx = start_idx;
  2391. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2392. agg->bitmap = 0;
  2393. /* # frames attempted by Tx command */
  2394. if (agg->frame_count == 1) {
  2395. /* Only one frame was attempted; no block-ack will arrive */
  2396. status = le16_to_cpu(frame_status[0].status);
  2397. seq = le16_to_cpu(frame_status[0].sequence);
  2398. idx = SEQ_TO_INDEX(seq);
  2399. txq_id = SEQ_TO_QUEUE(seq);
  2400. /* FIXME: code repetition */
  2401. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2402. agg->frame_count, agg->start_idx, idx);
  2403. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2404. tx_status->retry_count = tx_resp->failure_frame;
  2405. tx_status->queue_number = status & 0xff;
  2406. tx_status->queue_length = tx_resp->failure_rts;
  2407. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2408. tx_status->flags = iwl4965_is_tx_success(status)?
  2409. IEEE80211_TX_STATUS_ACK : 0;
  2410. iwl4965_hwrate_to_tx_control(priv,
  2411. le32_to_cpu(tx_resp->rate_n_flags),
  2412. &tx_status->control);
  2413. /* FIXME: code repetition end */
  2414. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2415. status & 0xff, tx_resp->failure_frame);
  2416. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2417. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2418. agg->wait_for_ba = 0;
  2419. } else {
  2420. /* Two or more frames were attempted; expect block-ack */
  2421. u64 bitmap = 0;
  2422. int start = agg->start_idx;
  2423. /* Construct bit-map of pending frames within Tx window */
  2424. for (i = 0; i < agg->frame_count; i++) {
  2425. u16 sc;
  2426. status = le16_to_cpu(frame_status[i].status);
  2427. seq = le16_to_cpu(frame_status[i].sequence);
  2428. idx = SEQ_TO_INDEX(seq);
  2429. txq_id = SEQ_TO_QUEUE(seq);
  2430. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2431. AGG_TX_STATE_ABORT_MSK))
  2432. continue;
  2433. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2434. agg->frame_count, txq_id, idx);
  2435. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2436. sc = le16_to_cpu(hdr->seq_ctrl);
  2437. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2438. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2439. " idx=%d, seq_idx=%d, seq=%d\n",
  2440. idx, SEQ_TO_SN(sc),
  2441. hdr->seq_ctrl);
  2442. return -1;
  2443. }
  2444. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2445. i, idx, SEQ_TO_SN(sc));
  2446. sh = idx - start;
  2447. if (sh > 64) {
  2448. sh = (start - idx) + 0xff;
  2449. bitmap = bitmap << sh;
  2450. sh = 0;
  2451. start = idx;
  2452. } else if (sh < -64)
  2453. sh = 0xff - (start - idx);
  2454. else if (sh < 0) {
  2455. sh = start - idx;
  2456. start = idx;
  2457. bitmap = bitmap << sh;
  2458. sh = 0;
  2459. }
  2460. bitmap |= (1 << sh);
  2461. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2462. start, (u32)(bitmap & 0xFFFFFFFF));
  2463. }
  2464. agg->bitmap = bitmap;
  2465. agg->start_idx = start;
  2466. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2467. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2468. agg->frame_count, agg->start_idx,
  2469. (unsigned long long)agg->bitmap);
  2470. if (bitmap)
  2471. agg->wait_for_ba = 1;
  2472. }
  2473. return 0;
  2474. }
  2475. #endif
  2476. /**
  2477. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2478. */
  2479. static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
  2480. struct iwl4965_rx_mem_buffer *rxb)
  2481. {
  2482. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2483. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2484. int txq_id = SEQ_TO_QUEUE(sequence);
  2485. int index = SEQ_TO_INDEX(sequence);
  2486. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2487. struct ieee80211_tx_status *tx_status;
  2488. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2489. u32 status = le32_to_cpu(tx_resp->status);
  2490. #ifdef CONFIG_IWL4965_HT
  2491. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2492. struct ieee80211_hdr *hdr;
  2493. __le16 *qc;
  2494. #endif
  2495. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2496. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2497. "is out of range [0-%d] %d %d\n", txq_id,
  2498. index, txq->q.n_bd, txq->q.write_ptr,
  2499. txq->q.read_ptr);
  2500. return;
  2501. }
  2502. #ifdef CONFIG_IWL4965_HT
  2503. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2504. qc = ieee80211_get_qos_ctrl(hdr);
  2505. if (qc)
  2506. tid = le16_to_cpu(*qc) & 0xf;
  2507. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2508. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2509. IWL_ERROR("Station not known\n");
  2510. return;
  2511. }
  2512. if (txq->sched_retry) {
  2513. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2514. struct iwl4965_ht_agg *agg = NULL;
  2515. if (!qc)
  2516. return;
  2517. agg = &priv->stations[sta_id].tid[tid].agg;
  2518. iwl4965_tx_status_reply_tx(priv, agg,
  2519. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2520. if ((tx_resp->frame_count == 1) &&
  2521. !iwl4965_is_tx_success(status)) {
  2522. /* TODO: send BAR */
  2523. }
  2524. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2525. int freed;
  2526. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2527. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2528. "%d index %d\n", scd_ssn , index);
  2529. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2530. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2531. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2532. txq_id >= 0 && priv->mac80211_registered &&
  2533. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2534. ieee80211_wake_queue(priv->hw, txq_id);
  2535. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2536. }
  2537. } else {
  2538. #endif /* CONFIG_IWL4965_HT */
  2539. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2540. tx_status->retry_count = tx_resp->failure_frame;
  2541. tx_status->queue_number = status;
  2542. tx_status->queue_length = tx_resp->bt_kill_count;
  2543. tx_status->queue_length |= tx_resp->failure_rts;
  2544. tx_status->flags =
  2545. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2546. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2547. &tx_status->control);
  2548. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2549. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2550. status, le32_to_cpu(tx_resp->rate_n_flags),
  2551. tx_resp->failure_frame);
  2552. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2553. if (index != -1) {
  2554. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2555. #ifdef CONFIG_IWL4965_HT
  2556. if (tid != MAX_TID_COUNT)
  2557. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2558. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2559. (txq_id >= 0) &&
  2560. priv->mac80211_registered)
  2561. ieee80211_wake_queue(priv->hw, txq_id);
  2562. if (tid != MAX_TID_COUNT)
  2563. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2564. #endif
  2565. }
  2566. #ifdef CONFIG_IWL4965_HT
  2567. }
  2568. #endif /* CONFIG_IWL4965_HT */
  2569. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2570. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2571. }
  2572. static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
  2573. struct iwl4965_rx_mem_buffer *rxb)
  2574. {
  2575. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2576. struct iwl4965_alive_resp *palive;
  2577. struct delayed_work *pwork;
  2578. palive = &pkt->u.alive_frame;
  2579. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2580. "0x%01X 0x%01X\n",
  2581. palive->is_valid, palive->ver_type,
  2582. palive->ver_subtype);
  2583. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2584. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2585. memcpy(&priv->card_alive_init,
  2586. &pkt->u.alive_frame,
  2587. sizeof(struct iwl4965_init_alive_resp));
  2588. pwork = &priv->init_alive_start;
  2589. } else {
  2590. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2591. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2592. sizeof(struct iwl4965_alive_resp));
  2593. pwork = &priv->alive_start;
  2594. }
  2595. /* We delay the ALIVE response by 5ms to
  2596. * give the HW RF Kill time to activate... */
  2597. if (palive->is_valid == UCODE_VALID_OK)
  2598. queue_delayed_work(priv->workqueue, pwork,
  2599. msecs_to_jiffies(5));
  2600. else
  2601. IWL_WARNING("uCode did not respond OK.\n");
  2602. }
  2603. static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
  2604. struct iwl4965_rx_mem_buffer *rxb)
  2605. {
  2606. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2607. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2608. return;
  2609. }
  2610. static void iwl4965_rx_reply_error(struct iwl_priv *priv,
  2611. struct iwl4965_rx_mem_buffer *rxb)
  2612. {
  2613. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2614. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2615. "seq 0x%04X ser 0x%08X\n",
  2616. le32_to_cpu(pkt->u.err_resp.error_type),
  2617. get_cmd_string(pkt->u.err_resp.cmd_id),
  2618. pkt->u.err_resp.cmd_id,
  2619. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2620. le32_to_cpu(pkt->u.err_resp.error_info));
  2621. }
  2622. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2623. static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2624. {
  2625. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2626. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2627. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  2628. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2629. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2630. rxon->channel = csa->channel;
  2631. priv->staging_rxon.channel = csa->channel;
  2632. }
  2633. static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2634. struct iwl4965_rx_mem_buffer *rxb)
  2635. {
  2636. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2637. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2638. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2639. if (!report->state) {
  2640. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2641. "Spectrum Measure Notification: Start\n");
  2642. return;
  2643. }
  2644. memcpy(&priv->measure_report, report, sizeof(*report));
  2645. priv->measurement_status |= MEASUREMENT_READY;
  2646. #endif
  2647. }
  2648. static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
  2649. struct iwl4965_rx_mem_buffer *rxb)
  2650. {
  2651. #ifdef CONFIG_IWLWIFI_DEBUG
  2652. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2653. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2654. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2655. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2656. #endif
  2657. }
  2658. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2659. struct iwl4965_rx_mem_buffer *rxb)
  2660. {
  2661. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2662. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2663. "notification for %s:\n",
  2664. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2665. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  2666. }
  2667. static void iwl4965_bg_beacon_update(struct work_struct *work)
  2668. {
  2669. struct iwl_priv *priv =
  2670. container_of(work, struct iwl_priv, beacon_update);
  2671. struct sk_buff *beacon;
  2672. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2673. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  2674. if (!beacon) {
  2675. IWL_ERROR("update beacon failed\n");
  2676. return;
  2677. }
  2678. mutex_lock(&priv->mutex);
  2679. /* new beacon skb is allocated every time; dispose previous.*/
  2680. if (priv->ibss_beacon)
  2681. dev_kfree_skb(priv->ibss_beacon);
  2682. priv->ibss_beacon = beacon;
  2683. mutex_unlock(&priv->mutex);
  2684. iwl4965_send_beacon_cmd(priv);
  2685. }
  2686. static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
  2687. struct iwl4965_rx_mem_buffer *rxb)
  2688. {
  2689. #ifdef CONFIG_IWLWIFI_DEBUG
  2690. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2691. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  2692. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  2693. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  2694. "tsf %d %d rate %d\n",
  2695. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  2696. beacon->beacon_notify_hdr.failure_frame,
  2697. le32_to_cpu(beacon->ibss_mgr_status),
  2698. le32_to_cpu(beacon->high_tsf),
  2699. le32_to_cpu(beacon->low_tsf), rate);
  2700. #endif
  2701. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  2702. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  2703. queue_work(priv->workqueue, &priv->beacon_update);
  2704. }
  2705. /* Service response to REPLY_SCAN_CMD (0x80) */
  2706. static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
  2707. struct iwl4965_rx_mem_buffer *rxb)
  2708. {
  2709. #ifdef CONFIG_IWLWIFI_DEBUG
  2710. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2711. struct iwl4965_scanreq_notification *notif =
  2712. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  2713. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  2714. #endif
  2715. }
  2716. /* Service SCAN_START_NOTIFICATION (0x82) */
  2717. static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
  2718. struct iwl4965_rx_mem_buffer *rxb)
  2719. {
  2720. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2721. struct iwl4965_scanstart_notification *notif =
  2722. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  2723. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  2724. IWL_DEBUG_SCAN("Scan start: "
  2725. "%d [802.11%s] "
  2726. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  2727. notif->channel,
  2728. notif->band ? "bg" : "a",
  2729. notif->tsf_high,
  2730. notif->tsf_low, notif->status, notif->beacon_timer);
  2731. }
  2732. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  2733. static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
  2734. struct iwl4965_rx_mem_buffer *rxb)
  2735. {
  2736. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2737. struct iwl4965_scanresults_notification *notif =
  2738. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  2739. IWL_DEBUG_SCAN("Scan ch.res: "
  2740. "%d [802.11%s] "
  2741. "(TSF: 0x%08X:%08X) - %d "
  2742. "elapsed=%lu usec (%dms since last)\n",
  2743. notif->channel,
  2744. notif->band ? "bg" : "a",
  2745. le32_to_cpu(notif->tsf_high),
  2746. le32_to_cpu(notif->tsf_low),
  2747. le32_to_cpu(notif->statistics[0]),
  2748. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  2749. jiffies_to_msecs(elapsed_jiffies
  2750. (priv->last_scan_jiffies, jiffies)));
  2751. priv->last_scan_jiffies = jiffies;
  2752. priv->next_scan_jiffies = 0;
  2753. }
  2754. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  2755. static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
  2756. struct iwl4965_rx_mem_buffer *rxb)
  2757. {
  2758. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2759. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  2760. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  2761. scan_notif->scanned_channels,
  2762. scan_notif->tsf_low,
  2763. scan_notif->tsf_high, scan_notif->status);
  2764. /* The HW is no longer scanning */
  2765. clear_bit(STATUS_SCAN_HW, &priv->status);
  2766. /* The scan completion notification came in, so kill that timer... */
  2767. cancel_delayed_work(&priv->scan_check);
  2768. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  2769. (priv->scan_bands == 2) ? "2.4" : "5.2",
  2770. jiffies_to_msecs(elapsed_jiffies
  2771. (priv->scan_pass_start, jiffies)));
  2772. /* Remove this scanned band from the list
  2773. * of pending bands to scan */
  2774. priv->scan_bands--;
  2775. /* If a request to abort was given, or the scan did not succeed
  2776. * then we reset the scan state machine and terminate,
  2777. * re-queuing another scan if one has been requested */
  2778. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2779. IWL_DEBUG_INFO("Aborted scan completed.\n");
  2780. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  2781. } else {
  2782. /* If there are more bands on this scan pass reschedule */
  2783. if (priv->scan_bands > 0)
  2784. goto reschedule;
  2785. }
  2786. priv->last_scan_jiffies = jiffies;
  2787. priv->next_scan_jiffies = 0;
  2788. IWL_DEBUG_INFO("Setting scan to off\n");
  2789. clear_bit(STATUS_SCANNING, &priv->status);
  2790. IWL_DEBUG_INFO("Scan took %dms\n",
  2791. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  2792. queue_work(priv->workqueue, &priv->scan_completed);
  2793. return;
  2794. reschedule:
  2795. priv->scan_pass_start = jiffies;
  2796. queue_work(priv->workqueue, &priv->request_scan);
  2797. }
  2798. /* Handle notification from uCode that card's power state is changing
  2799. * due to software, hardware, or critical temperature RFKILL */
  2800. static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
  2801. struct iwl4965_rx_mem_buffer *rxb)
  2802. {
  2803. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2804. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  2805. unsigned long status = priv->status;
  2806. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  2807. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  2808. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  2809. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  2810. RF_CARD_DISABLED)) {
  2811. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2812. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2813. if (!iwl_grab_nic_access(priv)) {
  2814. iwl_write_direct32(
  2815. priv, HBUS_TARG_MBX_C,
  2816. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2817. iwl_release_nic_access(priv);
  2818. }
  2819. if (!(flags & RXON_CARD_DISABLED)) {
  2820. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2821. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2822. if (!iwl_grab_nic_access(priv)) {
  2823. iwl_write_direct32(
  2824. priv, HBUS_TARG_MBX_C,
  2825. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2826. iwl_release_nic_access(priv);
  2827. }
  2828. }
  2829. if (flags & RF_CARD_DISABLED) {
  2830. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2831. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  2832. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2833. if (!iwl_grab_nic_access(priv))
  2834. iwl_release_nic_access(priv);
  2835. }
  2836. }
  2837. if (flags & HW_CARD_DISABLED)
  2838. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2839. else
  2840. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2841. if (flags & SW_CARD_DISABLED)
  2842. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2843. else
  2844. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2845. if (!(flags & RXON_CARD_DISABLED))
  2846. iwl4965_scan_cancel(priv);
  2847. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  2848. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  2849. (test_bit(STATUS_RF_KILL_SW, &status) !=
  2850. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  2851. queue_work(priv->workqueue, &priv->rf_kill);
  2852. else
  2853. wake_up_interruptible(&priv->wait_command_queue);
  2854. }
  2855. /**
  2856. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  2857. *
  2858. * Setup the RX handlers for each of the reply types sent from the uCode
  2859. * to the host.
  2860. *
  2861. * This function chains into the hardware specific files for them to setup
  2862. * any hardware specific handlers as well.
  2863. */
  2864. static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
  2865. {
  2866. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  2867. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  2868. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  2869. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  2870. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  2871. iwl4965_rx_spectrum_measure_notif;
  2872. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  2873. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  2874. iwl4965_rx_pm_debug_statistics_notif;
  2875. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  2876. /*
  2877. * The same handler is used for both the REPLY to a discrete
  2878. * statistics request from the host as well as for the periodic
  2879. * statistics notifications (after received beacons) from the uCode.
  2880. */
  2881. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  2882. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  2883. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  2884. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  2885. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  2886. iwl4965_rx_scan_results_notif;
  2887. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  2888. iwl4965_rx_scan_complete_notif;
  2889. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  2890. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  2891. /* Set up hardware specific Rx handlers */
  2892. iwl4965_hw_rx_handler_setup(priv);
  2893. }
  2894. /**
  2895. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2896. * @rxb: Rx buffer to reclaim
  2897. *
  2898. * If an Rx buffer has an async callback associated with it the callback
  2899. * will be executed. The attached skb (if present) will only be freed
  2900. * if the callback returns 1
  2901. */
  2902. static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
  2903. struct iwl4965_rx_mem_buffer *rxb)
  2904. {
  2905. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  2906. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2907. int txq_id = SEQ_TO_QUEUE(sequence);
  2908. int index = SEQ_TO_INDEX(sequence);
  2909. int huge = sequence & SEQ_HUGE_FRAME;
  2910. int cmd_index;
  2911. struct iwl_cmd *cmd;
  2912. /* If a Tx command is being handled and it isn't in the actual
  2913. * command queue then there a command routing bug has been introduced
  2914. * in the queue management code. */
  2915. if (txq_id != IWL_CMD_QUEUE_NUM)
  2916. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  2917. txq_id, pkt->hdr.cmd);
  2918. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  2919. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  2920. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  2921. /* Input error checking is done when commands are added to queue. */
  2922. if (cmd->meta.flags & CMD_WANT_SKB) {
  2923. cmd->meta.source->u.skb = rxb->skb;
  2924. rxb->skb = NULL;
  2925. } else if (cmd->meta.u.callback &&
  2926. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  2927. rxb->skb = NULL;
  2928. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2929. if (!(cmd->meta.flags & CMD_ASYNC)) {
  2930. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  2931. wake_up_interruptible(&priv->wait_command_queue);
  2932. }
  2933. }
  2934. /************************** RX-FUNCTIONS ****************************/
  2935. /*
  2936. * Rx theory of operation
  2937. *
  2938. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  2939. * each of which point to Receive Buffers to be filled by 4965. These get
  2940. * used not only for Rx frames, but for any command response or notification
  2941. * from the 4965. The driver and 4965 manage the Rx buffers by means
  2942. * of indexes into the circular buffer.
  2943. *
  2944. * Rx Queue Indexes
  2945. * The host/firmware share two index registers for managing the Rx buffers.
  2946. *
  2947. * The READ index maps to the first position that the firmware may be writing
  2948. * to -- the driver can read up to (but not including) this position and get
  2949. * good data.
  2950. * The READ index is managed by the firmware once the card is enabled.
  2951. *
  2952. * The WRITE index maps to the last position the driver has read from -- the
  2953. * position preceding WRITE is the last slot the firmware can place a packet.
  2954. *
  2955. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2956. * WRITE = READ.
  2957. *
  2958. * During initialization, the host sets up the READ queue position to the first
  2959. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  2960. *
  2961. * When the firmware places a packet in a buffer, it will advance the READ index
  2962. * and fire the RX interrupt. The driver can then query the READ index and
  2963. * process as many packets as possible, moving the WRITE index forward as it
  2964. * resets the Rx queue buffers with new memory.
  2965. *
  2966. * The management in the driver is as follows:
  2967. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2968. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2969. * to replenish the iwl->rxq->rx_free.
  2970. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  2971. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  2972. * 'processed' and 'read' driver indexes as well)
  2973. * + A received packet is processed and handed to the kernel network stack,
  2974. * detached from the iwl->rxq. The driver 'processed' index is updated.
  2975. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2976. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2977. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  2978. * were enough free buffers and RX_STALLED is set it is cleared.
  2979. *
  2980. *
  2981. * Driver sequence:
  2982. *
  2983. * iwl4965_rx_queue_alloc() Allocates rx_free
  2984. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2985. * iwl4965_rx_queue_restock
  2986. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  2987. * queue, updates firmware pointers, and updates
  2988. * the WRITE index. If insufficient rx_free buffers
  2989. * are available, schedules iwl4965_rx_replenish
  2990. *
  2991. * -- enable interrupts --
  2992. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  2993. * READ INDEX, detaching the SKB from the pool.
  2994. * Moves the packet buffer from queue to rx_used.
  2995. * Calls iwl4965_rx_queue_restock to refill any empty
  2996. * slots.
  2997. * ...
  2998. *
  2999. */
  3000. /**
  3001. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3002. */
  3003. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3004. {
  3005. int s = q->read - q->write;
  3006. if (s <= 0)
  3007. s += RX_QUEUE_SIZE;
  3008. /* keep some buffer to not confuse full and empty queue */
  3009. s -= 2;
  3010. if (s < 0)
  3011. s = 0;
  3012. return s;
  3013. }
  3014. /**
  3015. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3016. */
  3017. int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
  3018. {
  3019. u32 reg = 0;
  3020. int rc = 0;
  3021. unsigned long flags;
  3022. spin_lock_irqsave(&q->lock, flags);
  3023. if (q->need_update == 0)
  3024. goto exit_unlock;
  3025. /* If power-saving is in use, make sure device is awake */
  3026. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3027. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3028. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3029. iwl_set_bit(priv, CSR_GP_CNTRL,
  3030. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3031. goto exit_unlock;
  3032. }
  3033. rc = iwl_grab_nic_access(priv);
  3034. if (rc)
  3035. goto exit_unlock;
  3036. /* Device expects a multiple of 8 */
  3037. iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3038. q->write & ~0x7);
  3039. iwl_release_nic_access(priv);
  3040. /* Else device is assumed to be awake */
  3041. } else
  3042. /* Device expects a multiple of 8 */
  3043. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3044. q->need_update = 0;
  3045. exit_unlock:
  3046. spin_unlock_irqrestore(&q->lock, flags);
  3047. return rc;
  3048. }
  3049. /**
  3050. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3051. */
  3052. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3053. dma_addr_t dma_addr)
  3054. {
  3055. return cpu_to_le32((u32)(dma_addr >> 8));
  3056. }
  3057. /**
  3058. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3059. *
  3060. * If there are slots in the RX queue that need to be restocked,
  3061. * and we have free pre-allocated buffers, fill the ranks as much
  3062. * as we can, pulling from rx_free.
  3063. *
  3064. * This moves the 'write' index forward to catch up with 'processed', and
  3065. * also updates the memory address in the firmware to reference the new
  3066. * target buffer.
  3067. */
  3068. static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
  3069. {
  3070. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3071. struct list_head *element;
  3072. struct iwl4965_rx_mem_buffer *rxb;
  3073. unsigned long flags;
  3074. int write, rc;
  3075. spin_lock_irqsave(&rxq->lock, flags);
  3076. write = rxq->write & ~0x7;
  3077. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3078. /* Get next free Rx buffer, remove from free list */
  3079. element = rxq->rx_free.next;
  3080. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3081. list_del(element);
  3082. /* Point to Rx buffer via next RBD in circular buffer */
  3083. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3084. rxq->queue[rxq->write] = rxb;
  3085. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3086. rxq->free_count--;
  3087. }
  3088. spin_unlock_irqrestore(&rxq->lock, flags);
  3089. /* If the pre-allocated buffer pool is dropping low, schedule to
  3090. * refill it */
  3091. if (rxq->free_count <= RX_LOW_WATERMARK)
  3092. queue_work(priv->workqueue, &priv->rx_replenish);
  3093. /* If we've added more space for the firmware to place data, tell it.
  3094. * Increment device's write pointer in multiples of 8. */
  3095. if ((write != (rxq->write & ~0x7))
  3096. || (abs(rxq->write - rxq->read) > 7)) {
  3097. spin_lock_irqsave(&rxq->lock, flags);
  3098. rxq->need_update = 1;
  3099. spin_unlock_irqrestore(&rxq->lock, flags);
  3100. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3101. if (rc)
  3102. return rc;
  3103. }
  3104. return 0;
  3105. }
  3106. /**
  3107. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3108. *
  3109. * When moving to rx_free an SKB is allocated for the slot.
  3110. *
  3111. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3112. * This is called as a scheduled work item (except for during initialization)
  3113. */
  3114. static void iwl4965_rx_allocate(struct iwl_priv *priv)
  3115. {
  3116. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3117. struct list_head *element;
  3118. struct iwl4965_rx_mem_buffer *rxb;
  3119. unsigned long flags;
  3120. spin_lock_irqsave(&rxq->lock, flags);
  3121. while (!list_empty(&rxq->rx_used)) {
  3122. element = rxq->rx_used.next;
  3123. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3124. /* Alloc a new receive buffer */
  3125. rxb->skb =
  3126. alloc_skb(priv->hw_setting.rx_buf_size,
  3127. __GFP_NOWARN | GFP_ATOMIC);
  3128. if (!rxb->skb) {
  3129. if (net_ratelimit())
  3130. printk(KERN_CRIT DRV_NAME
  3131. ": Can not allocate SKB buffers\n");
  3132. /* We don't reschedule replenish work here -- we will
  3133. * call the restock method and if it still needs
  3134. * more buffers it will schedule replenish */
  3135. break;
  3136. }
  3137. priv->alloc_rxb_skb++;
  3138. list_del(element);
  3139. /* Get physical address of RB/SKB */
  3140. rxb->dma_addr =
  3141. pci_map_single(priv->pci_dev, rxb->skb->data,
  3142. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3143. list_add_tail(&rxb->list, &rxq->rx_free);
  3144. rxq->free_count++;
  3145. }
  3146. spin_unlock_irqrestore(&rxq->lock, flags);
  3147. }
  3148. /*
  3149. * this should be called while priv->lock is locked
  3150. */
  3151. static void __iwl4965_rx_replenish(void *data)
  3152. {
  3153. struct iwl_priv *priv = data;
  3154. iwl4965_rx_allocate(priv);
  3155. iwl4965_rx_queue_restock(priv);
  3156. }
  3157. void iwl4965_rx_replenish(void *data)
  3158. {
  3159. struct iwl_priv *priv = data;
  3160. unsigned long flags;
  3161. iwl4965_rx_allocate(priv);
  3162. spin_lock_irqsave(&priv->lock, flags);
  3163. iwl4965_rx_queue_restock(priv);
  3164. spin_unlock_irqrestore(&priv->lock, flags);
  3165. }
  3166. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3167. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3168. * This free routine walks the list of POOL entries and if SKB is set to
  3169. * non NULL it is unmapped and freed
  3170. */
  3171. static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3172. {
  3173. int i;
  3174. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3175. if (rxq->pool[i].skb != NULL) {
  3176. pci_unmap_single(priv->pci_dev,
  3177. rxq->pool[i].dma_addr,
  3178. priv->hw_setting.rx_buf_size,
  3179. PCI_DMA_FROMDEVICE);
  3180. dev_kfree_skb(rxq->pool[i].skb);
  3181. }
  3182. }
  3183. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3184. rxq->dma_addr);
  3185. rxq->bd = NULL;
  3186. }
  3187. int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
  3188. {
  3189. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3190. struct pci_dev *dev = priv->pci_dev;
  3191. int i;
  3192. spin_lock_init(&rxq->lock);
  3193. INIT_LIST_HEAD(&rxq->rx_free);
  3194. INIT_LIST_HEAD(&rxq->rx_used);
  3195. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3196. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3197. if (!rxq->bd)
  3198. return -ENOMEM;
  3199. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3200. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3201. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3202. /* Set us so that we have processed and used all buffers, but have
  3203. * not restocked the Rx queue with fresh buffers */
  3204. rxq->read = rxq->write = 0;
  3205. rxq->free_count = 0;
  3206. rxq->need_update = 0;
  3207. return 0;
  3208. }
  3209. void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3210. {
  3211. unsigned long flags;
  3212. int i;
  3213. spin_lock_irqsave(&rxq->lock, flags);
  3214. INIT_LIST_HEAD(&rxq->rx_free);
  3215. INIT_LIST_HEAD(&rxq->rx_used);
  3216. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3217. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3218. /* In the reset function, these buffers may have been allocated
  3219. * to an SKB, so we need to unmap and free potential storage */
  3220. if (rxq->pool[i].skb != NULL) {
  3221. pci_unmap_single(priv->pci_dev,
  3222. rxq->pool[i].dma_addr,
  3223. priv->hw_setting.rx_buf_size,
  3224. PCI_DMA_FROMDEVICE);
  3225. priv->alloc_rxb_skb--;
  3226. dev_kfree_skb(rxq->pool[i].skb);
  3227. rxq->pool[i].skb = NULL;
  3228. }
  3229. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3230. }
  3231. /* Set us so that we have processed and used all buffers, but have
  3232. * not restocked the Rx queue with fresh buffers */
  3233. rxq->read = rxq->write = 0;
  3234. rxq->free_count = 0;
  3235. spin_unlock_irqrestore(&rxq->lock, flags);
  3236. }
  3237. /* Convert linear signal-to-noise ratio into dB */
  3238. static u8 ratio2dB[100] = {
  3239. /* 0 1 2 3 4 5 6 7 8 9 */
  3240. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3241. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3242. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3243. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3244. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3245. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3246. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3247. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3248. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3249. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3250. };
  3251. /* Calculates a relative dB value from a ratio of linear
  3252. * (i.e. not dB) signal levels.
  3253. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3254. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3255. {
  3256. /* 1000:1 or higher just report as 60 dB */
  3257. if (sig_ratio >= 1000)
  3258. return 60;
  3259. /* 100:1 or higher, divide by 10 and use table,
  3260. * add 20 dB to make up for divide by 10 */
  3261. if (sig_ratio >= 100)
  3262. return (20 + (int)ratio2dB[sig_ratio/10]);
  3263. /* We shouldn't see this */
  3264. if (sig_ratio < 1)
  3265. return 0;
  3266. /* Use table for ratios 1:1 - 99:1 */
  3267. return (int)ratio2dB[sig_ratio];
  3268. }
  3269. #define PERFECT_RSSI (-20) /* dBm */
  3270. #define WORST_RSSI (-95) /* dBm */
  3271. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3272. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3273. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3274. * about formulas used below. */
  3275. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3276. {
  3277. int sig_qual;
  3278. int degradation = PERFECT_RSSI - rssi_dbm;
  3279. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3280. * as indicator; formula is (signal dbm - noise dbm).
  3281. * SNR at or above 40 is a great signal (100%).
  3282. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3283. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3284. if (noise_dbm) {
  3285. if (rssi_dbm - noise_dbm >= 40)
  3286. return 100;
  3287. else if (rssi_dbm < noise_dbm)
  3288. return 0;
  3289. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3290. /* Else use just the signal level.
  3291. * This formula is a least squares fit of data points collected and
  3292. * compared with a reference system that had a percentage (%) display
  3293. * for signal quality. */
  3294. } else
  3295. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3296. (15 * RSSI_RANGE + 62 * degradation)) /
  3297. (RSSI_RANGE * RSSI_RANGE);
  3298. if (sig_qual > 100)
  3299. sig_qual = 100;
  3300. else if (sig_qual < 1)
  3301. sig_qual = 0;
  3302. return sig_qual;
  3303. }
  3304. /**
  3305. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3306. *
  3307. * Uses the priv->rx_handlers callback function array to invoke
  3308. * the appropriate handlers, including command responses,
  3309. * frame-received notifications, and other notifications.
  3310. */
  3311. static void iwl4965_rx_handle(struct iwl_priv *priv)
  3312. {
  3313. struct iwl4965_rx_mem_buffer *rxb;
  3314. struct iwl4965_rx_packet *pkt;
  3315. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3316. u32 r, i;
  3317. int reclaim;
  3318. unsigned long flags;
  3319. u8 fill_rx = 0;
  3320. u32 count = 8;
  3321. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3322. * buffer that the driver may process (last buffer filled by ucode). */
  3323. r = iwl4965_hw_get_rx_read(priv);
  3324. i = rxq->read;
  3325. /* Rx interrupt, but nothing sent from uCode */
  3326. if (i == r)
  3327. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3328. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3329. fill_rx = 1;
  3330. while (i != r) {
  3331. rxb = rxq->queue[i];
  3332. /* If an RXB doesn't have a Rx queue slot associated with it,
  3333. * then a bug has been introduced in the queue refilling
  3334. * routines -- catch it here */
  3335. BUG_ON(rxb == NULL);
  3336. rxq->queue[i] = NULL;
  3337. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3338. priv->hw_setting.rx_buf_size,
  3339. PCI_DMA_FROMDEVICE);
  3340. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3341. /* Reclaim a command buffer only if this packet is a response
  3342. * to a (driver-originated) command.
  3343. * If the packet (e.g. Rx frame) originated from uCode,
  3344. * there is no command buffer to reclaim.
  3345. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3346. * but apparently a few don't get set; catch them here. */
  3347. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3348. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3349. (pkt->hdr.cmd != REPLY_RX) &&
  3350. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3351. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3352. (pkt->hdr.cmd != REPLY_TX);
  3353. /* Based on type of command response or notification,
  3354. * handle those that need handling via function in
  3355. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3356. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3357. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3358. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3359. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3360. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3361. } else {
  3362. /* No handling needed */
  3363. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3364. "r %d i %d No handler needed for %s, 0x%02x\n",
  3365. r, i, get_cmd_string(pkt->hdr.cmd),
  3366. pkt->hdr.cmd);
  3367. }
  3368. if (reclaim) {
  3369. /* Invoke any callbacks, transfer the skb to caller, and
  3370. * fire off the (possibly) blocking iwl_send_cmd()
  3371. * as we reclaim the driver command queue */
  3372. if (rxb && rxb->skb)
  3373. iwl4965_tx_cmd_complete(priv, rxb);
  3374. else
  3375. IWL_WARNING("Claim null rxb?\n");
  3376. }
  3377. /* For now we just don't re-use anything. We can tweak this
  3378. * later to try and re-use notification packets and SKBs that
  3379. * fail to Rx correctly */
  3380. if (rxb->skb != NULL) {
  3381. priv->alloc_rxb_skb--;
  3382. dev_kfree_skb_any(rxb->skb);
  3383. rxb->skb = NULL;
  3384. }
  3385. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3386. priv->hw_setting.rx_buf_size,
  3387. PCI_DMA_FROMDEVICE);
  3388. spin_lock_irqsave(&rxq->lock, flags);
  3389. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3390. spin_unlock_irqrestore(&rxq->lock, flags);
  3391. i = (i + 1) & RX_QUEUE_MASK;
  3392. /* If there are a lot of unused frames,
  3393. * restock the Rx queue so ucode wont assert. */
  3394. if (fill_rx) {
  3395. count++;
  3396. if (count >= 8) {
  3397. priv->rxq.read = i;
  3398. __iwl4965_rx_replenish(priv);
  3399. count = 0;
  3400. }
  3401. }
  3402. }
  3403. /* Backtrack one entry */
  3404. priv->rxq.read = i;
  3405. iwl4965_rx_queue_restock(priv);
  3406. }
  3407. /**
  3408. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3409. */
  3410. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3411. struct iwl4965_tx_queue *txq)
  3412. {
  3413. u32 reg = 0;
  3414. int rc = 0;
  3415. int txq_id = txq->q.id;
  3416. if (txq->need_update == 0)
  3417. return rc;
  3418. /* if we're trying to save power */
  3419. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3420. /* wake up nic if it's powered down ...
  3421. * uCode will wake up, and interrupt us again, so next
  3422. * time we'll skip this part. */
  3423. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3424. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3425. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3426. iwl_set_bit(priv, CSR_GP_CNTRL,
  3427. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3428. return rc;
  3429. }
  3430. /* restore this queue's parameters in nic hardware. */
  3431. rc = iwl_grab_nic_access(priv);
  3432. if (rc)
  3433. return rc;
  3434. iwl_write_direct32(priv, HBUS_TARG_WRPTR,
  3435. txq->q.write_ptr | (txq_id << 8));
  3436. iwl_release_nic_access(priv);
  3437. /* else not in power-save mode, uCode will never sleep when we're
  3438. * trying to tx (during RFKILL, we're not trying to tx). */
  3439. } else
  3440. iwl_write32(priv, HBUS_TARG_WRPTR,
  3441. txq->q.write_ptr | (txq_id << 8));
  3442. txq->need_update = 0;
  3443. return rc;
  3444. }
  3445. #ifdef CONFIG_IWLWIFI_DEBUG
  3446. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3447. {
  3448. DECLARE_MAC_BUF(mac);
  3449. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3450. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3451. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3452. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3453. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3454. le32_to_cpu(rxon->filter_flags));
  3455. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3456. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3457. rxon->ofdm_basic_rates);
  3458. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3459. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3460. print_mac(mac, rxon->node_addr));
  3461. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3462. print_mac(mac, rxon->bssid_addr));
  3463. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3464. }
  3465. #endif
  3466. static void iwl4965_enable_interrupts(struct iwl_priv *priv)
  3467. {
  3468. IWL_DEBUG_ISR("Enabling interrupts\n");
  3469. set_bit(STATUS_INT_ENABLED, &priv->status);
  3470. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3471. }
  3472. /* call this function to flush any scheduled tasklet */
  3473. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  3474. {
  3475. /* wait to make sure we flush pedding tasklet*/
  3476. synchronize_irq(priv->pci_dev->irq);
  3477. tasklet_kill(&priv->irq_tasklet);
  3478. }
  3479. static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
  3480. {
  3481. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3482. /* disable interrupts from uCode/NIC to host */
  3483. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3484. /* acknowledge/clear/reset any interrupts still pending
  3485. * from uCode or flow handler (Rx/Tx DMA) */
  3486. iwl_write32(priv, CSR_INT, 0xffffffff);
  3487. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3488. IWL_DEBUG_ISR("Disabled interrupts\n");
  3489. }
  3490. static const char *desc_lookup(int i)
  3491. {
  3492. switch (i) {
  3493. case 1:
  3494. return "FAIL";
  3495. case 2:
  3496. return "BAD_PARAM";
  3497. case 3:
  3498. return "BAD_CHECKSUM";
  3499. case 4:
  3500. return "NMI_INTERRUPT";
  3501. case 5:
  3502. return "SYSASSERT";
  3503. case 6:
  3504. return "FATAL_ERROR";
  3505. }
  3506. return "UNKNOWN";
  3507. }
  3508. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3509. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3510. static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
  3511. {
  3512. u32 data2, line;
  3513. u32 desc, time, count, base, data1;
  3514. u32 blink1, blink2, ilink1, ilink2;
  3515. int rc;
  3516. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3517. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  3518. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3519. return;
  3520. }
  3521. rc = iwl_grab_nic_access(priv);
  3522. if (rc) {
  3523. IWL_WARNING("Can not read from adapter at this time.\n");
  3524. return;
  3525. }
  3526. count = iwl_read_targ_mem(priv, base);
  3527. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3528. IWL_ERROR("Start IWL Error Log Dump:\n");
  3529. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3530. }
  3531. desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
  3532. blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
  3533. blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
  3534. ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
  3535. ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
  3536. data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
  3537. data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
  3538. line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
  3539. time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
  3540. IWL_ERROR("Desc Time "
  3541. "data1 data2 line\n");
  3542. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3543. desc_lookup(desc), desc, time, data1, data2, line);
  3544. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3545. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3546. ilink1, ilink2);
  3547. iwl_release_nic_access(priv);
  3548. }
  3549. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3550. /**
  3551. * iwl4965_print_event_log - Dump error event log to syslog
  3552. *
  3553. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  3554. */
  3555. static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3556. u32 num_events, u32 mode)
  3557. {
  3558. u32 i;
  3559. u32 base; /* SRAM byte address of event log header */
  3560. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3561. u32 ptr; /* SRAM byte address of log data */
  3562. u32 ev, time, data; /* event log data */
  3563. if (num_events == 0)
  3564. return;
  3565. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3566. if (mode == 0)
  3567. event_size = 2 * sizeof(u32);
  3568. else
  3569. event_size = 3 * sizeof(u32);
  3570. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3571. /* "time" is actually "data" for mode 0 (no timestamp).
  3572. * place event id # at far right for easier visual parsing. */
  3573. for (i = 0; i < num_events; i++) {
  3574. ev = iwl_read_targ_mem(priv, ptr);
  3575. ptr += sizeof(u32);
  3576. time = iwl_read_targ_mem(priv, ptr);
  3577. ptr += sizeof(u32);
  3578. if (mode == 0)
  3579. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3580. else {
  3581. data = iwl_read_targ_mem(priv, ptr);
  3582. ptr += sizeof(u32);
  3583. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3584. }
  3585. }
  3586. }
  3587. static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
  3588. {
  3589. int rc;
  3590. u32 base; /* SRAM byte address of event log header */
  3591. u32 capacity; /* event log capacity in # entries */
  3592. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3593. u32 num_wraps; /* # times uCode wrapped to top of log */
  3594. u32 next_entry; /* index of next entry to be written by uCode */
  3595. u32 size; /* # entries that we'll print */
  3596. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3597. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  3598. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3599. return;
  3600. }
  3601. rc = iwl_grab_nic_access(priv);
  3602. if (rc) {
  3603. IWL_WARNING("Can not read from adapter at this time.\n");
  3604. return;
  3605. }
  3606. /* event log header */
  3607. capacity = iwl_read_targ_mem(priv, base);
  3608. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  3609. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  3610. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  3611. size = num_wraps ? capacity : next_entry;
  3612. /* bail out if nothing in log */
  3613. if (size == 0) {
  3614. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3615. iwl_release_nic_access(priv);
  3616. return;
  3617. }
  3618. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3619. size, num_wraps);
  3620. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3621. * i.e the next one that uCode would fill. */
  3622. if (num_wraps)
  3623. iwl4965_print_event_log(priv, next_entry,
  3624. capacity - next_entry, mode);
  3625. /* (then/else) start at top of log */
  3626. iwl4965_print_event_log(priv, 0, next_entry, mode);
  3627. iwl_release_nic_access(priv);
  3628. }
  3629. /**
  3630. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  3631. */
  3632. static void iwl4965_irq_handle_error(struct iwl_priv *priv)
  3633. {
  3634. /* Set the FW error flag -- cleared on iwl4965_down */
  3635. set_bit(STATUS_FW_ERROR, &priv->status);
  3636. /* Cancel currently queued command. */
  3637. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3638. #ifdef CONFIG_IWLWIFI_DEBUG
  3639. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3640. iwl4965_dump_nic_error_log(priv);
  3641. iwl4965_dump_nic_event_log(priv);
  3642. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  3643. }
  3644. #endif
  3645. wake_up_interruptible(&priv->wait_command_queue);
  3646. /* Keep the restart process from trying to send host
  3647. * commands by clearing the INIT status bit */
  3648. clear_bit(STATUS_READY, &priv->status);
  3649. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3650. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3651. "Restarting adapter due to uCode error.\n");
  3652. if (iwl_is_associated(priv)) {
  3653. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3654. sizeof(priv->recovery_rxon));
  3655. priv->error_recovering = 1;
  3656. }
  3657. queue_work(priv->workqueue, &priv->restart);
  3658. }
  3659. }
  3660. static void iwl4965_error_recovery(struct iwl_priv *priv)
  3661. {
  3662. unsigned long flags;
  3663. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  3664. sizeof(priv->staging_rxon));
  3665. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3666. iwl4965_commit_rxon(priv);
  3667. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  3668. spin_lock_irqsave(&priv->lock, flags);
  3669. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  3670. priv->error_recovering = 0;
  3671. spin_unlock_irqrestore(&priv->lock, flags);
  3672. }
  3673. static void iwl4965_irq_tasklet(struct iwl_priv *priv)
  3674. {
  3675. u32 inta, handled = 0;
  3676. u32 inta_fh;
  3677. unsigned long flags;
  3678. #ifdef CONFIG_IWLWIFI_DEBUG
  3679. u32 inta_mask;
  3680. #endif
  3681. spin_lock_irqsave(&priv->lock, flags);
  3682. /* Ack/clear/reset pending uCode interrupts.
  3683. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3684. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3685. inta = iwl_read32(priv, CSR_INT);
  3686. iwl_write32(priv, CSR_INT, inta);
  3687. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3688. * Any new interrupts that happen after this, either while we're
  3689. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3690. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3691. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3692. #ifdef CONFIG_IWLWIFI_DEBUG
  3693. if (iwl_debug_level & IWL_DL_ISR) {
  3694. /* just for debug */
  3695. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3696. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3697. inta, inta_mask, inta_fh);
  3698. }
  3699. #endif
  3700. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3701. * atomic, make sure that inta covers all the interrupts that
  3702. * we've discovered, even if FH interrupt came in just after
  3703. * reading CSR_INT. */
  3704. if (inta_fh & CSR49_FH_INT_RX_MASK)
  3705. inta |= CSR_INT_BIT_FH_RX;
  3706. if (inta_fh & CSR49_FH_INT_TX_MASK)
  3707. inta |= CSR_INT_BIT_FH_TX;
  3708. /* Now service all interrupt bits discovered above. */
  3709. if (inta & CSR_INT_BIT_HW_ERR) {
  3710. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  3711. /* Tell the device to stop sending interrupts */
  3712. iwl4965_disable_interrupts(priv);
  3713. iwl4965_irq_handle_error(priv);
  3714. handled |= CSR_INT_BIT_HW_ERR;
  3715. spin_unlock_irqrestore(&priv->lock, flags);
  3716. return;
  3717. }
  3718. #ifdef CONFIG_IWLWIFI_DEBUG
  3719. if (iwl_debug_level & (IWL_DL_ISR)) {
  3720. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3721. if (inta & CSR_INT_BIT_SCD)
  3722. IWL_DEBUG_ISR("Scheduler finished to transmit "
  3723. "the frame/frames.\n");
  3724. /* Alive notification via Rx interrupt will do the real work */
  3725. if (inta & CSR_INT_BIT_ALIVE)
  3726. IWL_DEBUG_ISR("Alive interrupt\n");
  3727. }
  3728. #endif
  3729. /* Safely ignore these bits for debug checks below */
  3730. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  3731. /* HW RF KILL switch toggled */
  3732. if (inta & CSR_INT_BIT_RF_KILL) {
  3733. int hw_rf_kill = 0;
  3734. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  3735. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  3736. hw_rf_kill = 1;
  3737. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  3738. "RF_KILL bit toggled to %s.\n",
  3739. hw_rf_kill ? "disable radio":"enable radio");
  3740. /* Queue restart only if RF_KILL switch was set to "kill"
  3741. * when we loaded driver, and is now set to "enable".
  3742. * After we're Alive, RF_KILL gets handled by
  3743. * iwl4965_rx_card_state_notif() */
  3744. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  3745. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3746. queue_work(priv->workqueue, &priv->restart);
  3747. }
  3748. handled |= CSR_INT_BIT_RF_KILL;
  3749. }
  3750. /* Chip got too hot and stopped itself */
  3751. if (inta & CSR_INT_BIT_CT_KILL) {
  3752. IWL_ERROR("Microcode CT kill error detected.\n");
  3753. handled |= CSR_INT_BIT_CT_KILL;
  3754. }
  3755. /* Error detected by uCode */
  3756. if (inta & CSR_INT_BIT_SW_ERR) {
  3757. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  3758. inta);
  3759. iwl4965_irq_handle_error(priv);
  3760. handled |= CSR_INT_BIT_SW_ERR;
  3761. }
  3762. /* uCode wakes up after power-down sleep */
  3763. if (inta & CSR_INT_BIT_WAKEUP) {
  3764. IWL_DEBUG_ISR("Wakeup interrupt\n");
  3765. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  3766. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  3767. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  3768. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  3769. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  3770. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  3771. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  3772. handled |= CSR_INT_BIT_WAKEUP;
  3773. }
  3774. /* All uCode command responses, including Tx command responses,
  3775. * Rx "responses" (frame-received notification), and other
  3776. * notifications from uCode come through here*/
  3777. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  3778. iwl4965_rx_handle(priv);
  3779. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  3780. }
  3781. if (inta & CSR_INT_BIT_FH_TX) {
  3782. IWL_DEBUG_ISR("Tx interrupt\n");
  3783. handled |= CSR_INT_BIT_FH_TX;
  3784. }
  3785. if (inta & ~handled)
  3786. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  3787. if (inta & ~CSR_INI_SET_MASK) {
  3788. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  3789. inta & ~CSR_INI_SET_MASK);
  3790. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  3791. }
  3792. /* Re-enable all interrupts */
  3793. /* only Re-enable if diabled by irq */
  3794. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3795. iwl4965_enable_interrupts(priv);
  3796. #ifdef CONFIG_IWLWIFI_DEBUG
  3797. if (iwl_debug_level & (IWL_DL_ISR)) {
  3798. inta = iwl_read32(priv, CSR_INT);
  3799. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3800. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3801. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  3802. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  3803. }
  3804. #endif
  3805. spin_unlock_irqrestore(&priv->lock, flags);
  3806. }
  3807. static irqreturn_t iwl4965_isr(int irq, void *data)
  3808. {
  3809. struct iwl_priv *priv = data;
  3810. u32 inta, inta_mask;
  3811. u32 inta_fh;
  3812. if (!priv)
  3813. return IRQ_NONE;
  3814. spin_lock(&priv->lock);
  3815. /* Disable (but don't clear!) interrupts here to avoid
  3816. * back-to-back ISRs and sporadic interrupts from our NIC.
  3817. * If we have something to service, the tasklet will re-enable ints.
  3818. * If we *don't* have something, we'll re-enable before leaving here. */
  3819. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3820. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3821. /* Discover which interrupts are active/pending */
  3822. inta = iwl_read32(priv, CSR_INT);
  3823. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3824. /* Ignore interrupt if there's nothing in NIC to service.
  3825. * This may be due to IRQ shared with another device,
  3826. * or due to sporadic interrupts thrown from our NIC. */
  3827. if (!inta && !inta_fh) {
  3828. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  3829. goto none;
  3830. }
  3831. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  3832. /* Hardware disappeared. It might have already raised
  3833. * an interrupt */
  3834. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  3835. goto unplugged;
  3836. }
  3837. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3838. inta, inta_mask, inta_fh);
  3839. inta &= ~CSR_INT_BIT_SCD;
  3840. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  3841. if (likely(inta || inta_fh))
  3842. tasklet_schedule(&priv->irq_tasklet);
  3843. unplugged:
  3844. spin_unlock(&priv->lock);
  3845. return IRQ_HANDLED;
  3846. none:
  3847. /* re-enable interrupts here since we don't have anything to service. */
  3848. /* only Re-enable if diabled by irq */
  3849. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3850. iwl4965_enable_interrupts(priv);
  3851. spin_unlock(&priv->lock);
  3852. return IRQ_NONE;
  3853. }
  3854. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  3855. * sending probe req. This should be set long enough to hear probe responses
  3856. * from more than one AP. */
  3857. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  3858. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  3859. /* For faster active scanning, scan will move to the next channel if fewer than
  3860. * PLCP_QUIET_THRESH packets are heard on this channel within
  3861. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  3862. * time if it's a quiet channel (nothing responded to our probe, and there's
  3863. * no other traffic).
  3864. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  3865. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  3866. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  3867. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  3868. * Must be set longer than active dwell time.
  3869. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  3870. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  3871. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  3872. #define IWL_PASSIVE_DWELL_BASE (100)
  3873. #define IWL_CHANNEL_TUNE_TIME 5
  3874. static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
  3875. enum ieee80211_band band)
  3876. {
  3877. if (band == IEEE80211_BAND_5GHZ)
  3878. return IWL_ACTIVE_DWELL_TIME_52;
  3879. else
  3880. return IWL_ACTIVE_DWELL_TIME_24;
  3881. }
  3882. static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
  3883. enum ieee80211_band band)
  3884. {
  3885. u16 active = iwl4965_get_active_dwell_time(priv, band);
  3886. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  3887. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  3888. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  3889. if (iwl_is_associated(priv)) {
  3890. /* If we're associated, we clamp the maximum passive
  3891. * dwell time to be 98% of the beacon interval (minus
  3892. * 2 * channel tune time) */
  3893. passive = priv->beacon_int;
  3894. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  3895. passive = IWL_PASSIVE_DWELL_BASE;
  3896. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  3897. }
  3898. if (passive <= active)
  3899. passive = active + 1;
  3900. return passive;
  3901. }
  3902. static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
  3903. enum ieee80211_band band,
  3904. u8 is_active, u8 direct_mask,
  3905. struct iwl4965_scan_channel *scan_ch)
  3906. {
  3907. const struct ieee80211_channel *channels = NULL;
  3908. const struct ieee80211_supported_band *sband;
  3909. const struct iwl_channel_info *ch_info;
  3910. u16 passive_dwell = 0;
  3911. u16 active_dwell = 0;
  3912. int added, i;
  3913. sband = iwl4965_get_hw_mode(priv, band);
  3914. if (!sband)
  3915. return 0;
  3916. channels = sband->channels;
  3917. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  3918. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  3919. for (i = 0, added = 0; i < sband->n_channels; i++) {
  3920. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  3921. continue;
  3922. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  3923. le16_to_cpu(priv->active_rxon.channel)) {
  3924. if (iwl_is_associated(priv)) {
  3925. IWL_DEBUG_SCAN
  3926. ("Skipping current channel %d\n",
  3927. le16_to_cpu(priv->active_rxon.channel));
  3928. continue;
  3929. }
  3930. } else if (priv->only_active_channel)
  3931. continue;
  3932. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  3933. ch_info = iwl_get_channel_info(priv, band,
  3934. scan_ch->channel);
  3935. if (!is_channel_valid(ch_info)) {
  3936. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  3937. scan_ch->channel);
  3938. continue;
  3939. }
  3940. if (!is_active || is_channel_passive(ch_info) ||
  3941. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  3942. scan_ch->type = 0; /* passive */
  3943. else
  3944. scan_ch->type = 1; /* active */
  3945. if (scan_ch->type & 1)
  3946. scan_ch->type |= (direct_mask << 1);
  3947. if (is_channel_narrow(ch_info))
  3948. scan_ch->type |= (1 << 7);
  3949. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  3950. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  3951. /* Set txpower levels to defaults */
  3952. scan_ch->tpc.dsp_atten = 110;
  3953. /* scan_pwr_info->tpc.dsp_atten; */
  3954. /*scan_pwr_info->tpc.tx_gain; */
  3955. if (band == IEEE80211_BAND_5GHZ)
  3956. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  3957. else {
  3958. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  3959. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  3960. * power level:
  3961. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  3962. */
  3963. }
  3964. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  3965. scan_ch->channel,
  3966. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  3967. (scan_ch->type & 1) ?
  3968. active_dwell : passive_dwell);
  3969. scan_ch++;
  3970. added++;
  3971. }
  3972. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  3973. return added;
  3974. }
  3975. static void iwl4965_init_hw_rates(struct iwl_priv *priv,
  3976. struct ieee80211_rate *rates)
  3977. {
  3978. int i;
  3979. for (i = 0; i < IWL_RATE_COUNT; i++) {
  3980. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  3981. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  3982. rates[i].hw_value_short = i;
  3983. rates[i].flags = 0;
  3984. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  3985. /*
  3986. * If CCK != 1M then set short preamble rate flag.
  3987. */
  3988. rates[i].flags |=
  3989. (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  3990. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  3991. }
  3992. }
  3993. }
  3994. /**
  3995. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  3996. */
  3997. int iwl4965_init_geos(struct iwl_priv *priv)
  3998. {
  3999. struct iwl_channel_info *ch;
  4000. struct ieee80211_supported_band *sband;
  4001. struct ieee80211_channel *channels;
  4002. struct ieee80211_channel *geo_ch;
  4003. struct ieee80211_rate *rates;
  4004. int i = 0;
  4005. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4006. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4007. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4008. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4009. return 0;
  4010. }
  4011. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4012. priv->channel_count, GFP_KERNEL);
  4013. if (!channels)
  4014. return -ENOMEM;
  4015. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4016. GFP_KERNEL);
  4017. if (!rates) {
  4018. kfree(channels);
  4019. return -ENOMEM;
  4020. }
  4021. /* 5.2GHz channels start after the 2.4GHz channels */
  4022. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4023. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4024. /* just OFDM */
  4025. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4026. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4027. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_5GHZ);
  4028. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4029. sband->channels = channels;
  4030. /* OFDM & CCK */
  4031. sband->bitrates = rates;
  4032. sband->n_bitrates = IWL_RATE_COUNT;
  4033. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_2GHZ);
  4034. priv->ieee_channels = channels;
  4035. priv->ieee_rates = rates;
  4036. iwl4965_init_hw_rates(priv, rates);
  4037. for (i = 0; i < priv->channel_count; i++) {
  4038. ch = &priv->channel_info[i];
  4039. /* FIXME: might be removed if scan is OK */
  4040. if (!is_channel_valid(ch))
  4041. continue;
  4042. if (is_channel_a_band(ch))
  4043. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4044. else
  4045. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4046. geo_ch = &sband->channels[sband->n_channels++];
  4047. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4048. geo_ch->max_power = ch->max_power_avg;
  4049. geo_ch->max_antenna_gain = 0xff;
  4050. geo_ch->hw_value = ch->channel;
  4051. if (is_channel_valid(ch)) {
  4052. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4053. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4054. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4055. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4056. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4057. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4058. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4059. priv->max_channel_txpower_limit =
  4060. ch->max_power_avg;
  4061. } else {
  4062. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4063. }
  4064. /* Save flags for reg domain usage */
  4065. geo_ch->orig_flags = geo_ch->flags;
  4066. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4067. ch->channel, geo_ch->center_freq,
  4068. is_channel_a_band(ch) ? "5.2" : "2.4",
  4069. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4070. "restricted" : "valid",
  4071. geo_ch->flags);
  4072. }
  4073. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4074. priv->cfg->sku & IWL_SKU_A) {
  4075. printk(KERN_INFO DRV_NAME
  4076. ": Incorrectly detected BG card as ABG. Please send "
  4077. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4078. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4079. priv->cfg->sku &= ~IWL_SKU_A;
  4080. }
  4081. printk(KERN_INFO DRV_NAME
  4082. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4083. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4084. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4085. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  4086. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  4087. &priv->bands[IEEE80211_BAND_2GHZ];
  4088. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  4089. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  4090. &priv->bands[IEEE80211_BAND_5GHZ];
  4091. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4092. return 0;
  4093. }
  4094. /*
  4095. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4096. */
  4097. void iwl4965_free_geos(struct iwl_priv *priv)
  4098. {
  4099. kfree(priv->ieee_channels);
  4100. kfree(priv->ieee_rates);
  4101. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4102. }
  4103. /******************************************************************************
  4104. *
  4105. * uCode download functions
  4106. *
  4107. ******************************************************************************/
  4108. static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
  4109. {
  4110. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4111. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4112. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4113. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4114. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4115. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4116. }
  4117. /**
  4118. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4119. * looking at all data.
  4120. */
  4121. static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  4122. u32 len)
  4123. {
  4124. u32 val;
  4125. u32 save_len = len;
  4126. int rc = 0;
  4127. u32 errcnt;
  4128. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4129. rc = iwl_grab_nic_access(priv);
  4130. if (rc)
  4131. return rc;
  4132. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4133. errcnt = 0;
  4134. for (; len > 0; len -= sizeof(u32), image++) {
  4135. /* read data comes through single port, auto-incr addr */
  4136. /* NOTE: Use the debugless read so we don't flood kernel log
  4137. * if IWL_DL_IO is set */
  4138. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4139. if (val != le32_to_cpu(*image)) {
  4140. IWL_ERROR("uCode INST section is invalid at "
  4141. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4142. save_len - len, val, le32_to_cpu(*image));
  4143. rc = -EIO;
  4144. errcnt++;
  4145. if (errcnt >= 20)
  4146. break;
  4147. }
  4148. }
  4149. iwl_release_nic_access(priv);
  4150. if (!errcnt)
  4151. IWL_DEBUG_INFO
  4152. ("ucode image in INSTRUCTION memory is good\n");
  4153. return rc;
  4154. }
  4155. /**
  4156. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4157. * using sample data 100 bytes apart. If these sample points are good,
  4158. * it's a pretty good bet that everything between them is good, too.
  4159. */
  4160. static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4161. {
  4162. u32 val;
  4163. int rc = 0;
  4164. u32 errcnt = 0;
  4165. u32 i;
  4166. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4167. rc = iwl_grab_nic_access(priv);
  4168. if (rc)
  4169. return rc;
  4170. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4171. /* read data comes through single port, auto-incr addr */
  4172. /* NOTE: Use the debugless read so we don't flood kernel log
  4173. * if IWL_DL_IO is set */
  4174. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4175. i + RTC_INST_LOWER_BOUND);
  4176. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4177. if (val != le32_to_cpu(*image)) {
  4178. #if 0 /* Enable this if you want to see details */
  4179. IWL_ERROR("uCode INST section is invalid at "
  4180. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4181. i, val, *image);
  4182. #endif
  4183. rc = -EIO;
  4184. errcnt++;
  4185. if (errcnt >= 3)
  4186. break;
  4187. }
  4188. }
  4189. iwl_release_nic_access(priv);
  4190. return rc;
  4191. }
  4192. /**
  4193. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4194. * and verify its contents
  4195. */
  4196. static int iwl4965_verify_ucode(struct iwl_priv *priv)
  4197. {
  4198. __le32 *image;
  4199. u32 len;
  4200. int rc = 0;
  4201. /* Try bootstrap */
  4202. image = (__le32 *)priv->ucode_boot.v_addr;
  4203. len = priv->ucode_boot.len;
  4204. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4205. if (rc == 0) {
  4206. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4207. return 0;
  4208. }
  4209. /* Try initialize */
  4210. image = (__le32 *)priv->ucode_init.v_addr;
  4211. len = priv->ucode_init.len;
  4212. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4213. if (rc == 0) {
  4214. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4215. return 0;
  4216. }
  4217. /* Try runtime/protocol */
  4218. image = (__le32 *)priv->ucode_code.v_addr;
  4219. len = priv->ucode_code.len;
  4220. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4221. if (rc == 0) {
  4222. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4223. return 0;
  4224. }
  4225. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4226. /* Since nothing seems to match, show first several data entries in
  4227. * instruction SRAM, so maybe visual inspection will give a clue.
  4228. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4229. image = (__le32 *)priv->ucode_boot.v_addr;
  4230. len = priv->ucode_boot.len;
  4231. rc = iwl4965_verify_inst_full(priv, image, len);
  4232. return rc;
  4233. }
  4234. static void iwl4965_nic_start(struct iwl_priv *priv)
  4235. {
  4236. /* Remove all resets to allow NIC to operate */
  4237. iwl_write32(priv, CSR_RESET, 0);
  4238. }
  4239. /**
  4240. * iwl4965_read_ucode - Read uCode images from disk file.
  4241. *
  4242. * Copy into buffers for card to fetch via bus-mastering
  4243. */
  4244. static int iwl4965_read_ucode(struct iwl_priv *priv)
  4245. {
  4246. struct iwl4965_ucode *ucode;
  4247. int ret;
  4248. const struct firmware *ucode_raw;
  4249. const char *name = priv->cfg->fw_name;
  4250. u8 *src;
  4251. size_t len;
  4252. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4253. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4254. * request_firmware() is synchronous, file is in memory on return. */
  4255. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4256. if (ret < 0) {
  4257. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  4258. name, ret);
  4259. goto error;
  4260. }
  4261. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4262. name, ucode_raw->size);
  4263. /* Make sure that we got at least our header! */
  4264. if (ucode_raw->size < sizeof(*ucode)) {
  4265. IWL_ERROR("File size way too small!\n");
  4266. ret = -EINVAL;
  4267. goto err_release;
  4268. }
  4269. /* Data from ucode file: header followed by uCode images */
  4270. ucode = (void *)ucode_raw->data;
  4271. ver = le32_to_cpu(ucode->ver);
  4272. inst_size = le32_to_cpu(ucode->inst_size);
  4273. data_size = le32_to_cpu(ucode->data_size);
  4274. init_size = le32_to_cpu(ucode->init_size);
  4275. init_data_size = le32_to_cpu(ucode->init_data_size);
  4276. boot_size = le32_to_cpu(ucode->boot_size);
  4277. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  4278. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  4279. inst_size);
  4280. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  4281. data_size);
  4282. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  4283. init_size);
  4284. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  4285. init_data_size);
  4286. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  4287. boot_size);
  4288. /* Verify size of file vs. image size info in file's header */
  4289. if (ucode_raw->size < sizeof(*ucode) +
  4290. inst_size + data_size + init_size +
  4291. init_data_size + boot_size) {
  4292. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4293. (int)ucode_raw->size);
  4294. ret = -EINVAL;
  4295. goto err_release;
  4296. }
  4297. /* Verify that uCode images will fit in card's SRAM */
  4298. if (inst_size > IWL_MAX_INST_SIZE) {
  4299. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  4300. inst_size);
  4301. ret = -EINVAL;
  4302. goto err_release;
  4303. }
  4304. if (data_size > IWL_MAX_DATA_SIZE) {
  4305. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  4306. data_size);
  4307. ret = -EINVAL;
  4308. goto err_release;
  4309. }
  4310. if (init_size > IWL_MAX_INST_SIZE) {
  4311. IWL_DEBUG_INFO
  4312. ("uCode init instr len %d too large to fit in\n",
  4313. init_size);
  4314. ret = -EINVAL;
  4315. goto err_release;
  4316. }
  4317. if (init_data_size > IWL_MAX_DATA_SIZE) {
  4318. IWL_DEBUG_INFO
  4319. ("uCode init data len %d too large to fit in\n",
  4320. init_data_size);
  4321. ret = -EINVAL;
  4322. goto err_release;
  4323. }
  4324. if (boot_size > IWL_MAX_BSM_SIZE) {
  4325. IWL_DEBUG_INFO
  4326. ("uCode boot instr len %d too large to fit in\n",
  4327. boot_size);
  4328. ret = -EINVAL;
  4329. goto err_release;
  4330. }
  4331. /* Allocate ucode buffers for card's bus-master loading ... */
  4332. /* Runtime instructions and 2 copies of data:
  4333. * 1) unmodified from disk
  4334. * 2) backup cache for save/restore during power-downs */
  4335. priv->ucode_code.len = inst_size;
  4336. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  4337. priv->ucode_data.len = data_size;
  4338. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  4339. priv->ucode_data_backup.len = data_size;
  4340. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4341. /* Initialization instructions and data */
  4342. if (init_size && init_data_size) {
  4343. priv->ucode_init.len = init_size;
  4344. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  4345. priv->ucode_init_data.len = init_data_size;
  4346. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4347. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  4348. goto err_pci_alloc;
  4349. }
  4350. /* Bootstrap (instructions only, no data) */
  4351. if (boot_size) {
  4352. priv->ucode_boot.len = boot_size;
  4353. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4354. if (!priv->ucode_boot.v_addr)
  4355. goto err_pci_alloc;
  4356. }
  4357. /* Copy images into buffers for card's bus-master reads ... */
  4358. /* Runtime instructions (first block of data in file) */
  4359. src = &ucode->data[0];
  4360. len = priv->ucode_code.len;
  4361. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  4362. memcpy(priv->ucode_code.v_addr, src, len);
  4363. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  4364. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  4365. /* Runtime data (2nd block)
  4366. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  4367. src = &ucode->data[inst_size];
  4368. len = priv->ucode_data.len;
  4369. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  4370. memcpy(priv->ucode_data.v_addr, src, len);
  4371. memcpy(priv->ucode_data_backup.v_addr, src, len);
  4372. /* Initialization instructions (3rd block) */
  4373. if (init_size) {
  4374. src = &ucode->data[inst_size + data_size];
  4375. len = priv->ucode_init.len;
  4376. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  4377. len);
  4378. memcpy(priv->ucode_init.v_addr, src, len);
  4379. }
  4380. /* Initialization data (4th block) */
  4381. if (init_data_size) {
  4382. src = &ucode->data[inst_size + data_size + init_size];
  4383. len = priv->ucode_init_data.len;
  4384. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  4385. len);
  4386. memcpy(priv->ucode_init_data.v_addr, src, len);
  4387. }
  4388. /* Bootstrap instructions (5th block) */
  4389. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  4390. len = priv->ucode_boot.len;
  4391. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  4392. memcpy(priv->ucode_boot.v_addr, src, len);
  4393. /* We have our copies now, allow OS release its copies */
  4394. release_firmware(ucode_raw);
  4395. return 0;
  4396. err_pci_alloc:
  4397. IWL_ERROR("failed to allocate pci memory\n");
  4398. ret = -ENOMEM;
  4399. iwl4965_dealloc_ucode_pci(priv);
  4400. err_release:
  4401. release_firmware(ucode_raw);
  4402. error:
  4403. return ret;
  4404. }
  4405. /**
  4406. * iwl4965_set_ucode_ptrs - Set uCode address location
  4407. *
  4408. * Tell initialization uCode where to find runtime uCode.
  4409. *
  4410. * BSM registers initially contain pointers to initialization uCode.
  4411. * We need to replace them to load runtime uCode inst and data,
  4412. * and to save runtime data when powering down.
  4413. */
  4414. static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
  4415. {
  4416. dma_addr_t pinst;
  4417. dma_addr_t pdata;
  4418. int rc = 0;
  4419. unsigned long flags;
  4420. /* bits 35:4 for 4965 */
  4421. pinst = priv->ucode_code.p_addr >> 4;
  4422. pdata = priv->ucode_data_backup.p_addr >> 4;
  4423. spin_lock_irqsave(&priv->lock, flags);
  4424. rc = iwl_grab_nic_access(priv);
  4425. if (rc) {
  4426. spin_unlock_irqrestore(&priv->lock, flags);
  4427. return rc;
  4428. }
  4429. /* Tell bootstrap uCode where to find image to load */
  4430. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4431. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4432. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  4433. priv->ucode_data.len);
  4434. /* Inst bytecount must be last to set up, bit 31 signals uCode
  4435. * that all new ptr/size info is in place */
  4436. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  4437. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  4438. iwl_release_nic_access(priv);
  4439. spin_unlock_irqrestore(&priv->lock, flags);
  4440. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  4441. return rc;
  4442. }
  4443. /**
  4444. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  4445. *
  4446. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  4447. *
  4448. * The 4965 "initialize" ALIVE reply contains calibration data for:
  4449. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  4450. * (3945 does not contain this data).
  4451. *
  4452. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  4453. */
  4454. static void iwl4965_init_alive_start(struct iwl_priv *priv)
  4455. {
  4456. /* Check alive response for "valid" sign from uCode */
  4457. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  4458. /* We had an error bringing up the hardware, so take it
  4459. * all the way back down so we can try again */
  4460. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  4461. goto restart;
  4462. }
  4463. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  4464. * This is a paranoid check, because we would not have gotten the
  4465. * "initialize" alive if code weren't properly loaded. */
  4466. if (iwl4965_verify_ucode(priv)) {
  4467. /* Runtime instruction load was bad;
  4468. * take it all the way back down so we can try again */
  4469. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  4470. goto restart;
  4471. }
  4472. /* Calculate temperature */
  4473. priv->temperature = iwl4965_get_temperature(priv);
  4474. /* Send pointers to protocol/runtime uCode image ... init code will
  4475. * load and launch runtime uCode, which will send us another "Alive"
  4476. * notification. */
  4477. IWL_DEBUG_INFO("Initialization Alive received.\n");
  4478. if (iwl4965_set_ucode_ptrs(priv)) {
  4479. /* Runtime instruction load won't happen;
  4480. * take it all the way back down so we can try again */
  4481. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  4482. goto restart;
  4483. }
  4484. return;
  4485. restart:
  4486. queue_work(priv->workqueue, &priv->restart);
  4487. }
  4488. /**
  4489. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  4490. * from protocol/runtime uCode (initialization uCode's
  4491. * Alive gets handled by iwl4965_init_alive_start()).
  4492. */
  4493. static void iwl4965_alive_start(struct iwl_priv *priv)
  4494. {
  4495. int ret = 0;
  4496. IWL_DEBUG_INFO("Runtime Alive received.\n");
  4497. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  4498. /* We had an error bringing up the hardware, so take it
  4499. * all the way back down so we can try again */
  4500. IWL_DEBUG_INFO("Alive failed.\n");
  4501. goto restart;
  4502. }
  4503. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  4504. * This is a paranoid check, because we would not have gotten the
  4505. * "runtime" alive if code weren't properly loaded. */
  4506. if (iwl4965_verify_ucode(priv)) {
  4507. /* Runtime instruction load was bad;
  4508. * take it all the way back down so we can try again */
  4509. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  4510. goto restart;
  4511. }
  4512. iwlcore_clear_stations_table(priv);
  4513. ret = priv->cfg->ops->lib->alive_notify(priv);
  4514. if (ret) {
  4515. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  4516. ret);
  4517. goto restart;
  4518. }
  4519. /* After the ALIVE response, we can send host commands to 4965 uCode */
  4520. set_bit(STATUS_ALIVE, &priv->status);
  4521. /* Clear out the uCode error bit if it is set */
  4522. clear_bit(STATUS_FW_ERROR, &priv->status);
  4523. if (iwl_is_rfkill(priv))
  4524. return;
  4525. ieee80211_start_queues(priv->hw);
  4526. priv->active_rate = priv->rates_mask;
  4527. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  4528. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  4529. if (iwl_is_associated(priv)) {
  4530. struct iwl4965_rxon_cmd *active_rxon =
  4531. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  4532. memcpy(&priv->staging_rxon, &priv->active_rxon,
  4533. sizeof(priv->staging_rxon));
  4534. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4535. } else {
  4536. /* Initialize our rx_config data */
  4537. iwl4965_connection_init_rx_config(priv);
  4538. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  4539. }
  4540. /* Configure Bluetooth device coexistence support */
  4541. iwl4965_send_bt_config(priv);
  4542. /* Configure the adapter for unassociated operation */
  4543. iwl4965_commit_rxon(priv);
  4544. /* At this point, the NIC is initialized and operational */
  4545. priv->notif_missed_beacons = 0;
  4546. iwl4965_rf_kill_ct_config(priv);
  4547. iwl_leds_register(priv);
  4548. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  4549. set_bit(STATUS_READY, &priv->status);
  4550. wake_up_interruptible(&priv->wait_command_queue);
  4551. if (priv->error_recovering)
  4552. iwl4965_error_recovery(priv);
  4553. iwlcore_low_level_notify(priv, IWLCORE_START_EVT);
  4554. ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
  4555. return;
  4556. restart:
  4557. queue_work(priv->workqueue, &priv->restart);
  4558. }
  4559. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
  4560. static void __iwl4965_down(struct iwl_priv *priv)
  4561. {
  4562. unsigned long flags;
  4563. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  4564. struct ieee80211_conf *conf = NULL;
  4565. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  4566. conf = ieee80211_get_hw_conf(priv->hw);
  4567. if (!exit_pending)
  4568. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4569. iwl_leds_unregister(priv);
  4570. iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT);
  4571. iwlcore_clear_stations_table(priv);
  4572. /* Unblock any waiting calls */
  4573. wake_up_interruptible_all(&priv->wait_command_queue);
  4574. /* Wipe out the EXIT_PENDING status bit if we are not actually
  4575. * exiting the module */
  4576. if (!exit_pending)
  4577. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4578. /* stop and reset the on-board processor */
  4579. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  4580. /* tell the device to stop sending interrupts */
  4581. spin_lock_irqsave(&priv->lock, flags);
  4582. iwl4965_disable_interrupts(priv);
  4583. spin_unlock_irqrestore(&priv->lock, flags);
  4584. iwl_synchronize_irq(priv);
  4585. if (priv->mac80211_registered)
  4586. ieee80211_stop_queues(priv->hw);
  4587. /* If we have not previously called iwl4965_init() then
  4588. * clear all bits but the RF Kill and SUSPEND bits and return */
  4589. if (!iwl_is_init(priv)) {
  4590. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4591. STATUS_RF_KILL_HW |
  4592. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4593. STATUS_RF_KILL_SW |
  4594. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4595. STATUS_GEO_CONFIGURED |
  4596. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4597. STATUS_IN_SUSPEND;
  4598. goto exit;
  4599. }
  4600. /* ...otherwise clear out all the status bits but the RF Kill and
  4601. * SUSPEND bits and continue taking the NIC down. */
  4602. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4603. STATUS_RF_KILL_HW |
  4604. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4605. STATUS_RF_KILL_SW |
  4606. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4607. STATUS_GEO_CONFIGURED |
  4608. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4609. STATUS_IN_SUSPEND |
  4610. test_bit(STATUS_FW_ERROR, &priv->status) <<
  4611. STATUS_FW_ERROR;
  4612. spin_lock_irqsave(&priv->lock, flags);
  4613. iwl_clear_bit(priv, CSR_GP_CNTRL,
  4614. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4615. spin_unlock_irqrestore(&priv->lock, flags);
  4616. iwl4965_hw_txq_ctx_stop(priv);
  4617. iwl4965_hw_rxq_stop(priv);
  4618. spin_lock_irqsave(&priv->lock, flags);
  4619. if (!iwl_grab_nic_access(priv)) {
  4620. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  4621. APMG_CLK_VAL_DMA_CLK_RQT);
  4622. iwl_release_nic_access(priv);
  4623. }
  4624. spin_unlock_irqrestore(&priv->lock, flags);
  4625. udelay(5);
  4626. iwl4965_hw_nic_stop_master(priv);
  4627. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  4628. iwl4965_hw_nic_reset(priv);
  4629. exit:
  4630. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  4631. if (priv->ibss_beacon)
  4632. dev_kfree_skb(priv->ibss_beacon);
  4633. priv->ibss_beacon = NULL;
  4634. /* clear out any free frames */
  4635. iwl4965_clear_free_frames(priv);
  4636. }
  4637. static void iwl4965_down(struct iwl_priv *priv)
  4638. {
  4639. mutex_lock(&priv->mutex);
  4640. __iwl4965_down(priv);
  4641. mutex_unlock(&priv->mutex);
  4642. iwl4965_cancel_deferred_work(priv);
  4643. }
  4644. #define MAX_HW_RESTARTS 5
  4645. static int __iwl4965_up(struct iwl_priv *priv)
  4646. {
  4647. int i;
  4648. int ret;
  4649. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4650. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  4651. return -EIO;
  4652. }
  4653. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  4654. IWL_WARNING("Radio disabled by SW RF kill (module "
  4655. "parameter)\n");
  4656. iwl_rfkill_set_hw_state(priv);
  4657. return -ENODEV;
  4658. }
  4659. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  4660. IWL_ERROR("ucode not available for device bringup\n");
  4661. return -EIO;
  4662. }
  4663. /* If platform's RF_KILL switch is NOT set to KILL */
  4664. if (iwl_read32(priv, CSR_GP_CNTRL) &
  4665. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4666. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4667. else {
  4668. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4669. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  4670. iwl_rfkill_set_hw_state(priv);
  4671. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  4672. return -ENODEV;
  4673. }
  4674. }
  4675. iwl_rfkill_set_hw_state(priv);
  4676. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4677. ret = priv->cfg->ops->lib->hw_nic_init(priv);
  4678. if (ret) {
  4679. IWL_ERROR("Unable to init nic\n");
  4680. return ret;
  4681. }
  4682. /* make sure rfkill handshake bits are cleared */
  4683. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4684. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  4685. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  4686. /* clear (again), then enable host interrupts */
  4687. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4688. iwl4965_enable_interrupts(priv);
  4689. /* really make sure rfkill handshake bits are cleared */
  4690. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4691. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4692. /* Copy original ucode data image from disk into backup cache.
  4693. * This will be used to initialize the on-board processor's
  4694. * data SRAM for a clean start when the runtime program first loads. */
  4695. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  4696. priv->ucode_data.len);
  4697. /* We return success when we resume from suspend and rf_kill is on. */
  4698. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  4699. return 0;
  4700. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  4701. iwlcore_clear_stations_table(priv);
  4702. /* load bootstrap state machine,
  4703. * load bootstrap program into processor's memory,
  4704. * prepare to load the "initialize" uCode */
  4705. ret = priv->cfg->ops->lib->load_ucode(priv);
  4706. if (ret) {
  4707. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
  4708. continue;
  4709. }
  4710. /* start card; "initialize" will load runtime ucode */
  4711. iwl4965_nic_start(priv);
  4712. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  4713. return 0;
  4714. }
  4715. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4716. __iwl4965_down(priv);
  4717. /* tried to restart and config the device for as long as our
  4718. * patience could withstand */
  4719. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  4720. return -EIO;
  4721. }
  4722. /*****************************************************************************
  4723. *
  4724. * Workqueue callbacks
  4725. *
  4726. *****************************************************************************/
  4727. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  4728. {
  4729. struct iwl_priv *priv =
  4730. container_of(data, struct iwl_priv, init_alive_start.work);
  4731. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4732. return;
  4733. mutex_lock(&priv->mutex);
  4734. iwl4965_init_alive_start(priv);
  4735. mutex_unlock(&priv->mutex);
  4736. }
  4737. static void iwl4965_bg_alive_start(struct work_struct *data)
  4738. {
  4739. struct iwl_priv *priv =
  4740. container_of(data, struct iwl_priv, alive_start.work);
  4741. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4742. return;
  4743. mutex_lock(&priv->mutex);
  4744. iwl4965_alive_start(priv);
  4745. mutex_unlock(&priv->mutex);
  4746. }
  4747. static void iwl4965_bg_rf_kill(struct work_struct *work)
  4748. {
  4749. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  4750. wake_up_interruptible(&priv->wait_command_queue);
  4751. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4752. return;
  4753. mutex_lock(&priv->mutex);
  4754. if (!iwl_is_rfkill(priv)) {
  4755. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  4756. "HW and/or SW RF Kill no longer active, restarting "
  4757. "device\n");
  4758. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4759. queue_work(priv->workqueue, &priv->restart);
  4760. } else {
  4761. /* make sure mac80211 stop sending Tx frame */
  4762. if (priv->mac80211_registered)
  4763. ieee80211_stop_queues(priv->hw);
  4764. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  4765. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  4766. "disabled by SW switch\n");
  4767. else
  4768. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  4769. "Kill switch must be turned off for "
  4770. "wireless networking to work.\n");
  4771. }
  4772. iwl_rfkill_set_hw_state(priv);
  4773. mutex_unlock(&priv->mutex);
  4774. }
  4775. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  4776. static void iwl4965_bg_scan_check(struct work_struct *data)
  4777. {
  4778. struct iwl_priv *priv =
  4779. container_of(data, struct iwl_priv, scan_check.work);
  4780. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4781. return;
  4782. mutex_lock(&priv->mutex);
  4783. if (test_bit(STATUS_SCANNING, &priv->status) ||
  4784. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4785. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  4786. "Scan completion watchdog resetting adapter (%dms)\n",
  4787. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  4788. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4789. iwl4965_send_scan_abort(priv);
  4790. }
  4791. mutex_unlock(&priv->mutex);
  4792. }
  4793. static void iwl4965_bg_request_scan(struct work_struct *data)
  4794. {
  4795. struct iwl_priv *priv =
  4796. container_of(data, struct iwl_priv, request_scan);
  4797. struct iwl_host_cmd cmd = {
  4798. .id = REPLY_SCAN_CMD,
  4799. .len = sizeof(struct iwl4965_scan_cmd),
  4800. .meta.flags = CMD_SIZE_HUGE,
  4801. };
  4802. struct iwl4965_scan_cmd *scan;
  4803. struct ieee80211_conf *conf = NULL;
  4804. u16 cmd_len;
  4805. enum ieee80211_band band;
  4806. u8 direct_mask;
  4807. int ret = 0;
  4808. conf = ieee80211_get_hw_conf(priv->hw);
  4809. mutex_lock(&priv->mutex);
  4810. if (!iwl_is_ready(priv)) {
  4811. IWL_WARNING("request scan called when driver not ready.\n");
  4812. goto done;
  4813. }
  4814. /* Make sure the scan wasn't cancelled before this queued work
  4815. * was given the chance to run... */
  4816. if (!test_bit(STATUS_SCANNING, &priv->status))
  4817. goto done;
  4818. /* This should never be called or scheduled if there is currently
  4819. * a scan active in the hardware. */
  4820. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  4821. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  4822. "Ignoring second request.\n");
  4823. ret = -EIO;
  4824. goto done;
  4825. }
  4826. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4827. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  4828. goto done;
  4829. }
  4830. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4831. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  4832. goto done;
  4833. }
  4834. if (iwl_is_rfkill(priv)) {
  4835. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  4836. goto done;
  4837. }
  4838. if (!test_bit(STATUS_READY, &priv->status)) {
  4839. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  4840. goto done;
  4841. }
  4842. if (!priv->scan_bands) {
  4843. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  4844. goto done;
  4845. }
  4846. if (!priv->scan) {
  4847. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  4848. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  4849. if (!priv->scan) {
  4850. ret = -ENOMEM;
  4851. goto done;
  4852. }
  4853. }
  4854. scan = priv->scan;
  4855. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  4856. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  4857. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  4858. if (iwl_is_associated(priv)) {
  4859. u16 interval = 0;
  4860. u32 extra;
  4861. u32 suspend_time = 100;
  4862. u32 scan_suspend_time = 100;
  4863. unsigned long flags;
  4864. IWL_DEBUG_INFO("Scanning while associated...\n");
  4865. spin_lock_irqsave(&priv->lock, flags);
  4866. interval = priv->beacon_int;
  4867. spin_unlock_irqrestore(&priv->lock, flags);
  4868. scan->suspend_time = 0;
  4869. scan->max_out_time = cpu_to_le32(200 * 1024);
  4870. if (!interval)
  4871. interval = suspend_time;
  4872. extra = (suspend_time / interval) << 22;
  4873. scan_suspend_time = (extra |
  4874. ((suspend_time % interval) * 1024));
  4875. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  4876. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  4877. scan_suspend_time, interval);
  4878. }
  4879. /* We should add the ability for user to lock to PASSIVE ONLY */
  4880. if (priv->one_direct_scan) {
  4881. IWL_DEBUG_SCAN
  4882. ("Kicking off one direct scan for '%s'\n",
  4883. iwl4965_escape_essid(priv->direct_ssid,
  4884. priv->direct_ssid_len));
  4885. scan->direct_scan[0].id = WLAN_EID_SSID;
  4886. scan->direct_scan[0].len = priv->direct_ssid_len;
  4887. memcpy(scan->direct_scan[0].ssid,
  4888. priv->direct_ssid, priv->direct_ssid_len);
  4889. direct_mask = 1;
  4890. } else if (!iwl_is_associated(priv) && priv->essid_len) {
  4891. scan->direct_scan[0].id = WLAN_EID_SSID;
  4892. scan->direct_scan[0].len = priv->essid_len;
  4893. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  4894. direct_mask = 1;
  4895. } else {
  4896. direct_mask = 0;
  4897. }
  4898. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  4899. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  4900. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  4901. switch (priv->scan_bands) {
  4902. case 2:
  4903. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  4904. scan->tx_cmd.rate_n_flags =
  4905. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  4906. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  4907. scan->good_CRC_th = 0;
  4908. band = IEEE80211_BAND_2GHZ;
  4909. break;
  4910. case 1:
  4911. scan->tx_cmd.rate_n_flags =
  4912. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  4913. RATE_MCS_ANT_B_MSK);
  4914. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  4915. band = IEEE80211_BAND_5GHZ;
  4916. break;
  4917. default:
  4918. IWL_WARNING("Invalid scan band count\n");
  4919. goto done;
  4920. }
  4921. /* We don't build a direct scan probe request; the uCode will do
  4922. * that based on the direct_mask added to each channel entry */
  4923. cmd_len = iwl4965_fill_probe_req(priv, band,
  4924. (struct ieee80211_mgmt *)scan->data,
  4925. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  4926. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  4927. /* select Rx chains */
  4928. /* Force use of chains B and C (0x6) for scan Rx.
  4929. * Avoid A (0x1) because of its off-channel reception on A-band.
  4930. * MIMO is not used here, but value is required to make uCode happy. */
  4931. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  4932. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  4933. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  4934. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  4935. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  4936. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  4937. if (direct_mask) {
  4938. IWL_DEBUG_SCAN
  4939. ("Initiating direct scan for %s.\n",
  4940. iwl4965_escape_essid(priv->essid, priv->essid_len));
  4941. scan->channel_count =
  4942. iwl4965_get_channels_for_scan(
  4943. priv, band, 1, /* active */
  4944. direct_mask,
  4945. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  4946. } else {
  4947. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  4948. scan->channel_count =
  4949. iwl4965_get_channels_for_scan(
  4950. priv, band, 0, /* passive */
  4951. direct_mask,
  4952. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  4953. }
  4954. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  4955. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  4956. cmd.data = scan;
  4957. scan->len = cpu_to_le16(cmd.len);
  4958. set_bit(STATUS_SCAN_HW, &priv->status);
  4959. ret = iwl_send_cmd_sync(priv, &cmd);
  4960. if (ret)
  4961. goto done;
  4962. queue_delayed_work(priv->workqueue, &priv->scan_check,
  4963. IWL_SCAN_CHECK_WATCHDOG);
  4964. mutex_unlock(&priv->mutex);
  4965. return;
  4966. done:
  4967. /* inform mac80211 scan aborted */
  4968. queue_work(priv->workqueue, &priv->scan_completed);
  4969. mutex_unlock(&priv->mutex);
  4970. }
  4971. static void iwl4965_bg_up(struct work_struct *data)
  4972. {
  4973. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  4974. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4975. return;
  4976. mutex_lock(&priv->mutex);
  4977. __iwl4965_up(priv);
  4978. mutex_unlock(&priv->mutex);
  4979. }
  4980. static void iwl4965_bg_restart(struct work_struct *data)
  4981. {
  4982. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  4983. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4984. return;
  4985. iwl4965_down(priv);
  4986. queue_work(priv->workqueue, &priv->up);
  4987. }
  4988. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  4989. {
  4990. struct iwl_priv *priv =
  4991. container_of(data, struct iwl_priv, rx_replenish);
  4992. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4993. return;
  4994. mutex_lock(&priv->mutex);
  4995. iwl4965_rx_replenish(priv);
  4996. mutex_unlock(&priv->mutex);
  4997. }
  4998. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  4999. static void iwl4965_post_associate(struct iwl_priv *priv)
  5000. {
  5001. struct ieee80211_conf *conf = NULL;
  5002. int ret = 0;
  5003. DECLARE_MAC_BUF(mac);
  5004. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5005. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5006. return;
  5007. }
  5008. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5009. priv->assoc_id,
  5010. print_mac(mac, priv->active_rxon.bssid_addr));
  5011. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5012. return;
  5013. if (!priv->vif || !priv->is_open)
  5014. return;
  5015. iwl4965_scan_cancel_timeout(priv, 200);
  5016. conf = ieee80211_get_hw_conf(priv->hw);
  5017. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5018. iwl4965_commit_rxon(priv);
  5019. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5020. iwl4965_setup_rxon_timing(priv);
  5021. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5022. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5023. if (ret)
  5024. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5025. "Attempting to continue.\n");
  5026. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5027. #ifdef CONFIG_IWL4965_HT
  5028. if (priv->current_ht_config.is_ht)
  5029. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5030. #endif /* CONFIG_IWL4965_HT*/
  5031. iwl4965_set_rxon_chain(priv);
  5032. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5033. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5034. priv->assoc_id, priv->beacon_int);
  5035. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5036. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5037. else
  5038. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5039. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5040. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5041. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5042. else
  5043. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5044. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5045. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5046. }
  5047. iwl4965_commit_rxon(priv);
  5048. switch (priv->iw_mode) {
  5049. case IEEE80211_IF_TYPE_STA:
  5050. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5051. break;
  5052. case IEEE80211_IF_TYPE_IBSS:
  5053. /* clear out the station table */
  5054. iwlcore_clear_stations_table(priv);
  5055. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5056. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5057. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5058. iwl4965_send_beacon_cmd(priv);
  5059. break;
  5060. default:
  5061. IWL_ERROR("%s Should not be called in %d mode\n",
  5062. __FUNCTION__, priv->iw_mode);
  5063. break;
  5064. }
  5065. iwl4965_sequence_reset(priv);
  5066. #ifdef CONFIG_IWL4965_SENSITIVITY
  5067. /* Enable Rx differential gain and sensitivity calibrations */
  5068. iwl4965_chain_noise_reset(priv);
  5069. priv->start_calib = 1;
  5070. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5071. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5072. priv->assoc_station_added = 1;
  5073. iwl4965_activate_qos(priv, 0);
  5074. /* we have just associated, don't start scan too early */
  5075. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5076. }
  5077. static void iwl4965_bg_post_associate(struct work_struct *data)
  5078. {
  5079. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5080. post_associate.work);
  5081. mutex_lock(&priv->mutex);
  5082. iwl4965_post_associate(priv);
  5083. mutex_unlock(&priv->mutex);
  5084. }
  5085. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5086. {
  5087. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  5088. if (!iwl_is_ready(priv))
  5089. return;
  5090. mutex_lock(&priv->mutex);
  5091. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5092. iwl4965_send_scan_abort(priv);
  5093. mutex_unlock(&priv->mutex);
  5094. }
  5095. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5096. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5097. {
  5098. struct iwl_priv *priv =
  5099. container_of(work, struct iwl_priv, scan_completed);
  5100. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5101. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5102. return;
  5103. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5104. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5105. ieee80211_scan_completed(priv->hw);
  5106. /* Since setting the TXPOWER may have been deferred while
  5107. * performing the scan, fire one off */
  5108. mutex_lock(&priv->mutex);
  5109. iwl4965_hw_reg_send_txpower(priv);
  5110. mutex_unlock(&priv->mutex);
  5111. }
  5112. /*****************************************************************************
  5113. *
  5114. * mac80211 entry point functions
  5115. *
  5116. *****************************************************************************/
  5117. #define UCODE_READY_TIMEOUT (2 * HZ)
  5118. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5119. {
  5120. struct iwl_priv *priv = hw->priv;
  5121. int ret;
  5122. IWL_DEBUG_MAC80211("enter\n");
  5123. if (pci_enable_device(priv->pci_dev)) {
  5124. IWL_ERROR("Fail to pci_enable_device\n");
  5125. return -ENODEV;
  5126. }
  5127. pci_restore_state(priv->pci_dev);
  5128. pci_enable_msi(priv->pci_dev);
  5129. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5130. DRV_NAME, priv);
  5131. if (ret) {
  5132. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5133. goto out_disable_msi;
  5134. }
  5135. /* we should be verifying the device is ready to be opened */
  5136. mutex_lock(&priv->mutex);
  5137. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5138. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5139. * ucode filename and max sizes are card-specific. */
  5140. if (!priv->ucode_code.len) {
  5141. ret = iwl4965_read_ucode(priv);
  5142. if (ret) {
  5143. IWL_ERROR("Could not read microcode: %d\n", ret);
  5144. mutex_unlock(&priv->mutex);
  5145. goto out_release_irq;
  5146. }
  5147. }
  5148. ret = __iwl4965_up(priv);
  5149. mutex_unlock(&priv->mutex);
  5150. if (ret)
  5151. goto out_release_irq;
  5152. IWL_DEBUG_INFO("Start UP work done.\n");
  5153. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5154. return 0;
  5155. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5156. * mac80211 will not be run successfully. */
  5157. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5158. test_bit(STATUS_READY, &priv->status),
  5159. UCODE_READY_TIMEOUT);
  5160. if (!ret) {
  5161. if (!test_bit(STATUS_READY, &priv->status)) {
  5162. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5163. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5164. ret = -ETIMEDOUT;
  5165. goto out_release_irq;
  5166. }
  5167. }
  5168. priv->is_open = 1;
  5169. IWL_DEBUG_MAC80211("leave\n");
  5170. return 0;
  5171. out_release_irq:
  5172. free_irq(priv->pci_dev->irq, priv);
  5173. out_disable_msi:
  5174. pci_disable_msi(priv->pci_dev);
  5175. pci_disable_device(priv->pci_dev);
  5176. priv->is_open = 0;
  5177. IWL_DEBUG_MAC80211("leave - failed\n");
  5178. return ret;
  5179. }
  5180. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5181. {
  5182. struct iwl_priv *priv = hw->priv;
  5183. IWL_DEBUG_MAC80211("enter\n");
  5184. if (!priv->is_open) {
  5185. IWL_DEBUG_MAC80211("leave - skip\n");
  5186. return;
  5187. }
  5188. priv->is_open = 0;
  5189. if (iwl_is_ready_rf(priv)) {
  5190. /* stop mac, cancel any scan request and clear
  5191. * RXON_FILTER_ASSOC_MSK BIT
  5192. */
  5193. mutex_lock(&priv->mutex);
  5194. iwl4965_scan_cancel_timeout(priv, 100);
  5195. cancel_delayed_work(&priv->post_associate);
  5196. mutex_unlock(&priv->mutex);
  5197. }
  5198. iwl4965_down(priv);
  5199. flush_workqueue(priv->workqueue);
  5200. free_irq(priv->pci_dev->irq, priv);
  5201. pci_disable_msi(priv->pci_dev);
  5202. pci_save_state(priv->pci_dev);
  5203. pci_disable_device(priv->pci_dev);
  5204. IWL_DEBUG_MAC80211("leave\n");
  5205. }
  5206. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5207. struct ieee80211_tx_control *ctl)
  5208. {
  5209. struct iwl_priv *priv = hw->priv;
  5210. IWL_DEBUG_MAC80211("enter\n");
  5211. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5212. IWL_DEBUG_MAC80211("leave - monitor\n");
  5213. return -1;
  5214. }
  5215. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5216. ctl->tx_rate->bitrate);
  5217. if (iwl4965_tx_skb(priv, skb, ctl))
  5218. dev_kfree_skb_any(skb);
  5219. IWL_DEBUG_MAC80211("leave\n");
  5220. return 0;
  5221. }
  5222. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  5223. struct ieee80211_if_init_conf *conf)
  5224. {
  5225. struct iwl_priv *priv = hw->priv;
  5226. unsigned long flags;
  5227. DECLARE_MAC_BUF(mac);
  5228. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  5229. if (priv->vif) {
  5230. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  5231. return -EOPNOTSUPP;
  5232. }
  5233. spin_lock_irqsave(&priv->lock, flags);
  5234. priv->vif = conf->vif;
  5235. spin_unlock_irqrestore(&priv->lock, flags);
  5236. mutex_lock(&priv->mutex);
  5237. if (conf->mac_addr) {
  5238. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  5239. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  5240. }
  5241. if (iwl_is_ready(priv))
  5242. iwl4965_set_mode(priv, conf->type);
  5243. mutex_unlock(&priv->mutex);
  5244. IWL_DEBUG_MAC80211("leave\n");
  5245. return 0;
  5246. }
  5247. /**
  5248. * iwl4965_mac_config - mac80211 config callback
  5249. *
  5250. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5251. * be set inappropriately and the driver currently sets the hardware up to
  5252. * use it whenever needed.
  5253. */
  5254. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5255. {
  5256. struct iwl_priv *priv = hw->priv;
  5257. const struct iwl_channel_info *ch_info;
  5258. unsigned long flags;
  5259. int ret = 0;
  5260. mutex_lock(&priv->mutex);
  5261. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  5262. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  5263. if (!iwl_is_ready(priv)) {
  5264. IWL_DEBUG_MAC80211("leave - not ready\n");
  5265. ret = -EIO;
  5266. goto out;
  5267. }
  5268. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  5269. test_bit(STATUS_SCANNING, &priv->status))) {
  5270. IWL_DEBUG_MAC80211("leave - scanning\n");
  5271. set_bit(STATUS_CONF_PENDING, &priv->status);
  5272. mutex_unlock(&priv->mutex);
  5273. return 0;
  5274. }
  5275. spin_lock_irqsave(&priv->lock, flags);
  5276. ch_info = iwl_get_channel_info(priv, conf->channel->band,
  5277. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5278. if (!is_channel_valid(ch_info)) {
  5279. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5280. spin_unlock_irqrestore(&priv->lock, flags);
  5281. ret = -EINVAL;
  5282. goto out;
  5283. }
  5284. #ifdef CONFIG_IWL4965_HT
  5285. /* if we are switching from ht to 2.4 clear flags
  5286. * from any ht related info since 2.4 does not
  5287. * support ht */
  5288. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  5289. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5290. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  5291. #endif
  5292. )
  5293. priv->staging_rxon.flags = 0;
  5294. #endif /* CONFIG_IWL4965_HT */
  5295. iwlcore_set_rxon_channel(priv, conf->channel->band,
  5296. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5297. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  5298. /* The list of supported rates and rate mask can be different
  5299. * for each band; since the band may have changed, reset
  5300. * the rate mask to what mac80211 lists */
  5301. iwl4965_set_rate(priv);
  5302. spin_unlock_irqrestore(&priv->lock, flags);
  5303. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5304. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5305. iwl4965_hw_channel_switch(priv, conf->channel);
  5306. goto out;
  5307. }
  5308. #endif
  5309. if (priv->cfg->ops->lib->radio_kill_sw)
  5310. priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled);
  5311. if (!conf->radio_enabled) {
  5312. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5313. goto out;
  5314. }
  5315. if (iwl_is_rfkill(priv)) {
  5316. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5317. ret = -EIO;
  5318. goto out;
  5319. }
  5320. iwl4965_set_rate(priv);
  5321. if (memcmp(&priv->active_rxon,
  5322. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  5323. iwl4965_commit_rxon(priv);
  5324. else
  5325. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5326. IWL_DEBUG_MAC80211("leave\n");
  5327. out:
  5328. clear_bit(STATUS_CONF_PENDING, &priv->status);
  5329. mutex_unlock(&priv->mutex);
  5330. return ret;
  5331. }
  5332. static void iwl4965_config_ap(struct iwl_priv *priv)
  5333. {
  5334. int ret = 0;
  5335. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5336. return;
  5337. /* The following should be done only at AP bring up */
  5338. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  5339. /* RXON - unassoc (to set timing command) */
  5340. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5341. iwl4965_commit_rxon(priv);
  5342. /* RXON Timing */
  5343. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5344. iwl4965_setup_rxon_timing(priv);
  5345. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5346. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5347. if (ret)
  5348. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5349. "Attempting to continue.\n");
  5350. iwl4965_set_rxon_chain(priv);
  5351. /* FIXME: what should be the assoc_id for AP? */
  5352. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5353. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5354. priv->staging_rxon.flags |=
  5355. RXON_FLG_SHORT_PREAMBLE_MSK;
  5356. else
  5357. priv->staging_rxon.flags &=
  5358. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5359. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5360. if (priv->assoc_capability &
  5361. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5362. priv->staging_rxon.flags |=
  5363. RXON_FLG_SHORT_SLOT_MSK;
  5364. else
  5365. priv->staging_rxon.flags &=
  5366. ~RXON_FLG_SHORT_SLOT_MSK;
  5367. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5368. priv->staging_rxon.flags &=
  5369. ~RXON_FLG_SHORT_SLOT_MSK;
  5370. }
  5371. /* restore RXON assoc */
  5372. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5373. iwl4965_commit_rxon(priv);
  5374. iwl4965_activate_qos(priv, 1);
  5375. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5376. }
  5377. iwl4965_send_beacon_cmd(priv);
  5378. /* FIXME - we need to add code here to detect a totally new
  5379. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5380. * clear sta table, add BCAST sta... */
  5381. }
  5382. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  5383. struct ieee80211_vif *vif,
  5384. struct ieee80211_if_conf *conf)
  5385. {
  5386. struct iwl_priv *priv = hw->priv;
  5387. DECLARE_MAC_BUF(mac);
  5388. unsigned long flags;
  5389. int rc;
  5390. if (conf == NULL)
  5391. return -EIO;
  5392. if (priv->vif != vif) {
  5393. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  5394. mutex_unlock(&priv->mutex);
  5395. return 0;
  5396. }
  5397. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  5398. (!conf->beacon || !conf->ssid_len)) {
  5399. IWL_DEBUG_MAC80211
  5400. ("Leaving in AP mode because HostAPD is not ready.\n");
  5401. return 0;
  5402. }
  5403. if (!iwl_is_alive(priv))
  5404. return -EAGAIN;
  5405. mutex_lock(&priv->mutex);
  5406. if (conf->bssid)
  5407. IWL_DEBUG_MAC80211("bssid: %s\n",
  5408. print_mac(mac, conf->bssid));
  5409. /*
  5410. * very dubious code was here; the probe filtering flag is never set:
  5411. *
  5412. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5413. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5414. */
  5415. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5416. if (!conf->bssid) {
  5417. conf->bssid = priv->mac_addr;
  5418. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5419. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  5420. print_mac(mac, conf->bssid));
  5421. }
  5422. if (priv->ibss_beacon)
  5423. dev_kfree_skb(priv->ibss_beacon);
  5424. priv->ibss_beacon = conf->beacon;
  5425. }
  5426. if (iwl_is_rfkill(priv))
  5427. goto done;
  5428. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5429. !is_multicast_ether_addr(conf->bssid)) {
  5430. /* If there is currently a HW scan going on in the background
  5431. * then we need to cancel it else the RXON below will fail. */
  5432. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  5433. IWL_WARNING("Aborted scan still in progress "
  5434. "after 100ms\n");
  5435. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5436. mutex_unlock(&priv->mutex);
  5437. return -EAGAIN;
  5438. }
  5439. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5440. /* TODO: Audit driver for usage of these members and see
  5441. * if mac80211 deprecates them (priv->bssid looks like it
  5442. * shouldn't be there, but I haven't scanned the IBSS code
  5443. * to verify) - jpk */
  5444. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5445. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5446. iwl4965_config_ap(priv);
  5447. else {
  5448. rc = iwl4965_commit_rxon(priv);
  5449. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  5450. iwl4965_rxon_add_station(
  5451. priv, priv->active_rxon.bssid_addr, 1);
  5452. }
  5453. } else {
  5454. iwl4965_scan_cancel_timeout(priv, 100);
  5455. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5456. iwl4965_commit_rxon(priv);
  5457. }
  5458. done:
  5459. spin_lock_irqsave(&priv->lock, flags);
  5460. if (!conf->ssid_len)
  5461. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5462. else
  5463. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  5464. priv->essid_len = conf->ssid_len;
  5465. spin_unlock_irqrestore(&priv->lock, flags);
  5466. IWL_DEBUG_MAC80211("leave\n");
  5467. mutex_unlock(&priv->mutex);
  5468. return 0;
  5469. }
  5470. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  5471. unsigned int changed_flags,
  5472. unsigned int *total_flags,
  5473. int mc_count, struct dev_addr_list *mc_list)
  5474. {
  5475. /*
  5476. * XXX: dummy
  5477. * see also iwl4965_connection_init_rx_config
  5478. */
  5479. *total_flags = 0;
  5480. }
  5481. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  5482. struct ieee80211_if_init_conf *conf)
  5483. {
  5484. struct iwl_priv *priv = hw->priv;
  5485. IWL_DEBUG_MAC80211("enter\n");
  5486. mutex_lock(&priv->mutex);
  5487. if (iwl_is_ready_rf(priv)) {
  5488. iwl4965_scan_cancel_timeout(priv, 100);
  5489. cancel_delayed_work(&priv->post_associate);
  5490. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5491. iwl4965_commit_rxon(priv);
  5492. }
  5493. if (priv->vif == conf->vif) {
  5494. priv->vif = NULL;
  5495. memset(priv->bssid, 0, ETH_ALEN);
  5496. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5497. priv->essid_len = 0;
  5498. }
  5499. mutex_unlock(&priv->mutex);
  5500. IWL_DEBUG_MAC80211("leave\n");
  5501. }
  5502. #ifdef CONFIG_IWL4965_HT
  5503. static void iwl4965_ht_conf(struct iwl_priv *priv,
  5504. struct ieee80211_bss_conf *bss_conf)
  5505. {
  5506. struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
  5507. struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
  5508. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  5509. IWL_DEBUG_MAC80211("enter: \n");
  5510. iwl_conf->is_ht = bss_conf->assoc_ht;
  5511. if (!iwl_conf->is_ht)
  5512. return;
  5513. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  5514. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  5515. iwl_conf->sgf |= 0x1;
  5516. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  5517. iwl_conf->sgf |= 0x2;
  5518. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  5519. iwl_conf->max_amsdu_size =
  5520. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  5521. iwl_conf->supported_chan_width =
  5522. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  5523. iwl_conf->extension_chan_offset =
  5524. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  5525. /* If no above or below channel supplied disable FAT channel */
  5526. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  5527. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  5528. iwl_conf->supported_chan_width = 0;
  5529. iwl_conf->tx_mimo_ps_mode =
  5530. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  5531. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  5532. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  5533. iwl_conf->tx_chan_width =
  5534. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  5535. iwl_conf->ht_protection =
  5536. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  5537. iwl_conf->non_GF_STA_present =
  5538. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  5539. IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
  5540. IWL_DEBUG_MAC80211("leave\n");
  5541. }
  5542. #else
  5543. static inline void iwl4965_ht_conf(struct iwl_priv *priv,
  5544. struct ieee80211_bss_conf *bss_conf)
  5545. {
  5546. }
  5547. #endif
  5548. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  5549. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  5550. struct ieee80211_vif *vif,
  5551. struct ieee80211_bss_conf *bss_conf,
  5552. u32 changes)
  5553. {
  5554. struct iwl_priv *priv = hw->priv;
  5555. IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
  5556. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  5557. IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
  5558. bss_conf->use_short_preamble);
  5559. if (bss_conf->use_short_preamble)
  5560. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5561. else
  5562. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5563. }
  5564. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  5565. IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  5566. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  5567. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  5568. else
  5569. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  5570. }
  5571. if (changes & BSS_CHANGED_HT) {
  5572. IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
  5573. iwl4965_ht_conf(priv, bss_conf);
  5574. iwl4965_set_rxon_chain(priv);
  5575. }
  5576. if (changes & BSS_CHANGED_ASSOC) {
  5577. IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
  5578. /* This should never happen as this function should
  5579. * never be called from interrupt context. */
  5580. if (WARN_ON_ONCE(in_interrupt()))
  5581. return;
  5582. if (bss_conf->assoc) {
  5583. priv->assoc_id = bss_conf->aid;
  5584. priv->beacon_int = bss_conf->beacon_int;
  5585. priv->timestamp = bss_conf->timestamp;
  5586. priv->assoc_capability = bss_conf->assoc_capability;
  5587. priv->next_scan_jiffies = jiffies +
  5588. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  5589. mutex_lock(&priv->mutex);
  5590. iwl4965_post_associate(priv);
  5591. mutex_unlock(&priv->mutex);
  5592. } else {
  5593. priv->assoc_id = 0;
  5594. IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
  5595. }
  5596. } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  5597. IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
  5598. iwl4965_send_rxon_assoc(priv);
  5599. }
  5600. }
  5601. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  5602. {
  5603. int rc = 0;
  5604. unsigned long flags;
  5605. struct iwl_priv *priv = hw->priv;
  5606. IWL_DEBUG_MAC80211("enter\n");
  5607. mutex_lock(&priv->mutex);
  5608. spin_lock_irqsave(&priv->lock, flags);
  5609. if (!iwl_is_ready_rf(priv)) {
  5610. rc = -EIO;
  5611. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  5612. goto out_unlock;
  5613. }
  5614. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  5615. rc = -EIO;
  5616. IWL_ERROR("ERROR: APs don't scan\n");
  5617. goto out_unlock;
  5618. }
  5619. /* we don't schedule scan within next_scan_jiffies period */
  5620. if (priv->next_scan_jiffies &&
  5621. time_after(priv->next_scan_jiffies, jiffies)) {
  5622. rc = -EAGAIN;
  5623. goto out_unlock;
  5624. }
  5625. /* if we just finished scan ask for delay */
  5626. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  5627. IWL_DELAY_NEXT_SCAN, jiffies)) {
  5628. rc = -EAGAIN;
  5629. goto out_unlock;
  5630. }
  5631. if (len) {
  5632. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  5633. iwl4965_escape_essid(ssid, len), (int)len);
  5634. priv->one_direct_scan = 1;
  5635. priv->direct_ssid_len = (u8)
  5636. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  5637. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  5638. } else
  5639. priv->one_direct_scan = 0;
  5640. rc = iwl4965_scan_initiate(priv);
  5641. IWL_DEBUG_MAC80211("leave\n");
  5642. out_unlock:
  5643. spin_unlock_irqrestore(&priv->lock, flags);
  5644. mutex_unlock(&priv->mutex);
  5645. return rc;
  5646. }
  5647. static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
  5648. struct ieee80211_key_conf *keyconf, const u8 *addr,
  5649. u32 iv32, u16 *phase1key)
  5650. {
  5651. struct iwl_priv *priv = hw->priv;
  5652. u8 sta_id = IWL_INVALID_STATION;
  5653. unsigned long flags;
  5654. __le16 key_flags = 0;
  5655. int i;
  5656. DECLARE_MAC_BUF(mac);
  5657. IWL_DEBUG_MAC80211("enter\n");
  5658. sta_id = iwl4965_hw_find_station(priv, addr);
  5659. if (sta_id == IWL_INVALID_STATION) {
  5660. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5661. print_mac(mac, addr));
  5662. return;
  5663. }
  5664. iwl4965_scan_cancel_timeout(priv, 100);
  5665. key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
  5666. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  5667. key_flags &= ~STA_KEY_FLG_INVALID;
  5668. if (sta_id == priv->hw_setting.bcast_sta_id)
  5669. key_flags |= STA_KEY_MULTICAST_MSK;
  5670. spin_lock_irqsave(&priv->sta_lock, flags);
  5671. priv->stations[sta_id].sta.key.key_offset =
  5672. iwl_get_free_ucode_key_index(priv);
  5673. priv->stations[sta_id].sta.key.key_flags = key_flags;
  5674. priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
  5675. for (i = 0; i < 5; i++)
  5676. priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
  5677. cpu_to_le16(phase1key[i]);
  5678. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  5679. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  5680. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  5681. spin_unlock_irqrestore(&priv->sta_lock, flags);
  5682. IWL_DEBUG_MAC80211("leave\n");
  5683. }
  5684. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  5685. const u8 *local_addr, const u8 *addr,
  5686. struct ieee80211_key_conf *key)
  5687. {
  5688. struct iwl_priv *priv = hw->priv;
  5689. DECLARE_MAC_BUF(mac);
  5690. int ret = 0;
  5691. u8 sta_id = IWL_INVALID_STATION;
  5692. u8 is_default_wep_key = 0;
  5693. IWL_DEBUG_MAC80211("enter\n");
  5694. if (!priv->cfg->mod_params->hw_crypto) {
  5695. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  5696. return -EOPNOTSUPP;
  5697. }
  5698. if (is_zero_ether_addr(addr))
  5699. /* only support pairwise keys */
  5700. return -EOPNOTSUPP;
  5701. sta_id = iwl4965_hw_find_station(priv, addr);
  5702. if (sta_id == IWL_INVALID_STATION) {
  5703. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5704. print_mac(mac, addr));
  5705. return -EINVAL;
  5706. }
  5707. mutex_lock(&priv->mutex);
  5708. iwl4965_scan_cancel_timeout(priv, 100);
  5709. mutex_unlock(&priv->mutex);
  5710. /* If we are getting WEP group key and we didn't receive any key mapping
  5711. * so far, we are in legacy wep mode (group key only), otherwise we are
  5712. * in 1X mode.
  5713. * In legacy wep mode, we use another host command to the uCode */
  5714. if (key->alg == ALG_WEP && sta_id == priv->hw_setting.bcast_sta_id &&
  5715. priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  5716. if (cmd == SET_KEY)
  5717. is_default_wep_key = !priv->key_mapping_key;
  5718. else
  5719. is_default_wep_key = priv->default_wep_key;
  5720. }
  5721. switch (cmd) {
  5722. case SET_KEY:
  5723. if (is_default_wep_key)
  5724. ret = iwl_set_default_wep_key(priv, key);
  5725. else
  5726. ret = iwl_set_dynamic_key(priv, key, sta_id);
  5727. IWL_DEBUG_MAC80211("enable hwcrypto key\n");
  5728. break;
  5729. case DISABLE_KEY:
  5730. if (is_default_wep_key)
  5731. ret = iwl_remove_default_wep_key(priv, key);
  5732. else
  5733. ret = iwl_remove_dynamic_key(priv, sta_id);
  5734. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  5735. break;
  5736. default:
  5737. ret = -EINVAL;
  5738. }
  5739. IWL_DEBUG_MAC80211("leave\n");
  5740. return ret;
  5741. }
  5742. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  5743. const struct ieee80211_tx_queue_params *params)
  5744. {
  5745. struct iwl_priv *priv = hw->priv;
  5746. unsigned long flags;
  5747. int q;
  5748. IWL_DEBUG_MAC80211("enter\n");
  5749. if (!iwl_is_ready_rf(priv)) {
  5750. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5751. return -EIO;
  5752. }
  5753. if (queue >= AC_NUM) {
  5754. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  5755. return 0;
  5756. }
  5757. if (!priv->qos_data.qos_enable) {
  5758. priv->qos_data.qos_active = 0;
  5759. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  5760. return 0;
  5761. }
  5762. q = AC_NUM - 1 - queue;
  5763. spin_lock_irqsave(&priv->lock, flags);
  5764. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  5765. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  5766. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  5767. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  5768. cpu_to_le16((params->txop * 32));
  5769. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  5770. priv->qos_data.qos_active = 1;
  5771. spin_unlock_irqrestore(&priv->lock, flags);
  5772. mutex_lock(&priv->mutex);
  5773. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5774. iwl4965_activate_qos(priv, 1);
  5775. else if (priv->assoc_id && iwl_is_associated(priv))
  5776. iwl4965_activate_qos(priv, 0);
  5777. mutex_unlock(&priv->mutex);
  5778. IWL_DEBUG_MAC80211("leave\n");
  5779. return 0;
  5780. }
  5781. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  5782. struct ieee80211_tx_queue_stats *stats)
  5783. {
  5784. struct iwl_priv *priv = hw->priv;
  5785. int i, avail;
  5786. struct iwl4965_tx_queue *txq;
  5787. struct iwl4965_queue *q;
  5788. unsigned long flags;
  5789. IWL_DEBUG_MAC80211("enter\n");
  5790. if (!iwl_is_ready_rf(priv)) {
  5791. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5792. return -EIO;
  5793. }
  5794. spin_lock_irqsave(&priv->lock, flags);
  5795. for (i = 0; i < AC_NUM; i++) {
  5796. txq = &priv->txq[i];
  5797. q = &txq->q;
  5798. avail = iwl4965_queue_space(q);
  5799. stats->data[i].len = q->n_window - avail;
  5800. stats->data[i].limit = q->n_window - q->high_mark;
  5801. stats->data[i].count = q->n_window;
  5802. }
  5803. spin_unlock_irqrestore(&priv->lock, flags);
  5804. IWL_DEBUG_MAC80211("leave\n");
  5805. return 0;
  5806. }
  5807. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  5808. struct ieee80211_low_level_stats *stats)
  5809. {
  5810. IWL_DEBUG_MAC80211("enter\n");
  5811. IWL_DEBUG_MAC80211("leave\n");
  5812. return 0;
  5813. }
  5814. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  5815. {
  5816. IWL_DEBUG_MAC80211("enter\n");
  5817. IWL_DEBUG_MAC80211("leave\n");
  5818. return 0;
  5819. }
  5820. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  5821. {
  5822. struct iwl_priv *priv = hw->priv;
  5823. unsigned long flags;
  5824. mutex_lock(&priv->mutex);
  5825. IWL_DEBUG_MAC80211("enter\n");
  5826. priv->lq_mngr.lq_ready = 0;
  5827. #ifdef CONFIG_IWL4965_HT
  5828. spin_lock_irqsave(&priv->lock, flags);
  5829. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  5830. spin_unlock_irqrestore(&priv->lock, flags);
  5831. #endif /* CONFIG_IWL4965_HT */
  5832. iwlcore_reset_qos(priv);
  5833. cancel_delayed_work(&priv->post_associate);
  5834. spin_lock_irqsave(&priv->lock, flags);
  5835. priv->assoc_id = 0;
  5836. priv->assoc_capability = 0;
  5837. priv->assoc_station_added = 0;
  5838. /* new association get rid of ibss beacon skb */
  5839. if (priv->ibss_beacon)
  5840. dev_kfree_skb(priv->ibss_beacon);
  5841. priv->ibss_beacon = NULL;
  5842. priv->beacon_int = priv->hw->conf.beacon_int;
  5843. priv->timestamp = 0;
  5844. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  5845. priv->beacon_int = 0;
  5846. spin_unlock_irqrestore(&priv->lock, flags);
  5847. if (!iwl_is_ready_rf(priv)) {
  5848. IWL_DEBUG_MAC80211("leave - not ready\n");
  5849. mutex_unlock(&priv->mutex);
  5850. return;
  5851. }
  5852. /* we are restarting association process
  5853. * clear RXON_FILTER_ASSOC_MSK bit
  5854. */
  5855. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  5856. iwl4965_scan_cancel_timeout(priv, 100);
  5857. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5858. iwl4965_commit_rxon(priv);
  5859. }
  5860. /* Per mac80211.h: This is only used in IBSS mode... */
  5861. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  5862. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  5863. mutex_unlock(&priv->mutex);
  5864. return;
  5865. }
  5866. priv->only_active_channel = 0;
  5867. iwl4965_set_rate(priv);
  5868. mutex_unlock(&priv->mutex);
  5869. IWL_DEBUG_MAC80211("leave\n");
  5870. }
  5871. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  5872. struct ieee80211_tx_control *control)
  5873. {
  5874. struct iwl_priv *priv = hw->priv;
  5875. unsigned long flags;
  5876. mutex_lock(&priv->mutex);
  5877. IWL_DEBUG_MAC80211("enter\n");
  5878. if (!iwl_is_ready_rf(priv)) {
  5879. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5880. mutex_unlock(&priv->mutex);
  5881. return -EIO;
  5882. }
  5883. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  5884. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  5885. mutex_unlock(&priv->mutex);
  5886. return -EIO;
  5887. }
  5888. spin_lock_irqsave(&priv->lock, flags);
  5889. if (priv->ibss_beacon)
  5890. dev_kfree_skb(priv->ibss_beacon);
  5891. priv->ibss_beacon = skb;
  5892. priv->assoc_id = 0;
  5893. IWL_DEBUG_MAC80211("leave\n");
  5894. spin_unlock_irqrestore(&priv->lock, flags);
  5895. iwlcore_reset_qos(priv);
  5896. queue_work(priv->workqueue, &priv->post_associate.work);
  5897. mutex_unlock(&priv->mutex);
  5898. return 0;
  5899. }
  5900. /*****************************************************************************
  5901. *
  5902. * sysfs attributes
  5903. *
  5904. *****************************************************************************/
  5905. #ifdef CONFIG_IWLWIFI_DEBUG
  5906. /*
  5907. * The following adds a new attribute to the sysfs representation
  5908. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  5909. * used for controlling the debug level.
  5910. *
  5911. * See the level definitions in iwl for details.
  5912. */
  5913. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  5914. {
  5915. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  5916. }
  5917. static ssize_t store_debug_level(struct device_driver *d,
  5918. const char *buf, size_t count)
  5919. {
  5920. char *p = (char *)buf;
  5921. u32 val;
  5922. val = simple_strtoul(p, &p, 0);
  5923. if (p == buf)
  5924. printk(KERN_INFO DRV_NAME
  5925. ": %s is not in hex or decimal form.\n", buf);
  5926. else
  5927. iwl_debug_level = val;
  5928. return strnlen(buf, count);
  5929. }
  5930. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  5931. show_debug_level, store_debug_level);
  5932. #endif /* CONFIG_IWLWIFI_DEBUG */
  5933. static ssize_t show_temperature(struct device *d,
  5934. struct device_attribute *attr, char *buf)
  5935. {
  5936. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5937. if (!iwl_is_alive(priv))
  5938. return -EAGAIN;
  5939. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  5940. }
  5941. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  5942. static ssize_t show_rs_window(struct device *d,
  5943. struct device_attribute *attr,
  5944. char *buf)
  5945. {
  5946. struct iwl_priv *priv = d->driver_data;
  5947. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  5948. }
  5949. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  5950. static ssize_t show_tx_power(struct device *d,
  5951. struct device_attribute *attr, char *buf)
  5952. {
  5953. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5954. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  5955. }
  5956. static ssize_t store_tx_power(struct device *d,
  5957. struct device_attribute *attr,
  5958. const char *buf, size_t count)
  5959. {
  5960. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5961. char *p = (char *)buf;
  5962. u32 val;
  5963. val = simple_strtoul(p, &p, 10);
  5964. if (p == buf)
  5965. printk(KERN_INFO DRV_NAME
  5966. ": %s is not in decimal form.\n", buf);
  5967. else
  5968. iwl4965_hw_reg_set_txpower(priv, val);
  5969. return count;
  5970. }
  5971. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  5972. static ssize_t show_flags(struct device *d,
  5973. struct device_attribute *attr, char *buf)
  5974. {
  5975. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5976. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  5977. }
  5978. static ssize_t store_flags(struct device *d,
  5979. struct device_attribute *attr,
  5980. const char *buf, size_t count)
  5981. {
  5982. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5983. u32 flags = simple_strtoul(buf, NULL, 0);
  5984. mutex_lock(&priv->mutex);
  5985. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  5986. /* Cancel any currently running scans... */
  5987. if (iwl4965_scan_cancel_timeout(priv, 100))
  5988. IWL_WARNING("Could not cancel scan.\n");
  5989. else {
  5990. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  5991. flags);
  5992. priv->staging_rxon.flags = cpu_to_le32(flags);
  5993. iwl4965_commit_rxon(priv);
  5994. }
  5995. }
  5996. mutex_unlock(&priv->mutex);
  5997. return count;
  5998. }
  5999. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6000. static ssize_t show_filter_flags(struct device *d,
  6001. struct device_attribute *attr, char *buf)
  6002. {
  6003. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6004. return sprintf(buf, "0x%04X\n",
  6005. le32_to_cpu(priv->active_rxon.filter_flags));
  6006. }
  6007. static ssize_t store_filter_flags(struct device *d,
  6008. struct device_attribute *attr,
  6009. const char *buf, size_t count)
  6010. {
  6011. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6012. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6013. mutex_lock(&priv->mutex);
  6014. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6015. /* Cancel any currently running scans... */
  6016. if (iwl4965_scan_cancel_timeout(priv, 100))
  6017. IWL_WARNING("Could not cancel scan.\n");
  6018. else {
  6019. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6020. "0x%04X\n", filter_flags);
  6021. priv->staging_rxon.filter_flags =
  6022. cpu_to_le32(filter_flags);
  6023. iwl4965_commit_rxon(priv);
  6024. }
  6025. }
  6026. mutex_unlock(&priv->mutex);
  6027. return count;
  6028. }
  6029. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6030. store_filter_flags);
  6031. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6032. static ssize_t show_measurement(struct device *d,
  6033. struct device_attribute *attr, char *buf)
  6034. {
  6035. struct iwl_priv *priv = dev_get_drvdata(d);
  6036. struct iwl4965_spectrum_notification measure_report;
  6037. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6038. u8 *data = (u8 *) & measure_report;
  6039. unsigned long flags;
  6040. spin_lock_irqsave(&priv->lock, flags);
  6041. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6042. spin_unlock_irqrestore(&priv->lock, flags);
  6043. return 0;
  6044. }
  6045. memcpy(&measure_report, &priv->measure_report, size);
  6046. priv->measurement_status = 0;
  6047. spin_unlock_irqrestore(&priv->lock, flags);
  6048. while (size && (PAGE_SIZE - len)) {
  6049. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6050. PAGE_SIZE - len, 1);
  6051. len = strlen(buf);
  6052. if (PAGE_SIZE - len)
  6053. buf[len++] = '\n';
  6054. ofs += 16;
  6055. size -= min(size, 16U);
  6056. }
  6057. return len;
  6058. }
  6059. static ssize_t store_measurement(struct device *d,
  6060. struct device_attribute *attr,
  6061. const char *buf, size_t count)
  6062. {
  6063. struct iwl_priv *priv = dev_get_drvdata(d);
  6064. struct ieee80211_measurement_params params = {
  6065. .channel = le16_to_cpu(priv->active_rxon.channel),
  6066. .start_time = cpu_to_le64(priv->last_tsf),
  6067. .duration = cpu_to_le16(1),
  6068. };
  6069. u8 type = IWL_MEASURE_BASIC;
  6070. u8 buffer[32];
  6071. u8 channel;
  6072. if (count) {
  6073. char *p = buffer;
  6074. strncpy(buffer, buf, min(sizeof(buffer), count));
  6075. channel = simple_strtoul(p, NULL, 0);
  6076. if (channel)
  6077. params.channel = channel;
  6078. p = buffer;
  6079. while (*p && *p != ' ')
  6080. p++;
  6081. if (*p)
  6082. type = simple_strtoul(p + 1, NULL, 0);
  6083. }
  6084. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6085. "channel %d (for '%s')\n", type, params.channel, buf);
  6086. iwl4965_get_measurement(priv, &params, type);
  6087. return count;
  6088. }
  6089. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6090. show_measurement, store_measurement);
  6091. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6092. static ssize_t store_retry_rate(struct device *d,
  6093. struct device_attribute *attr,
  6094. const char *buf, size_t count)
  6095. {
  6096. struct iwl_priv *priv = dev_get_drvdata(d);
  6097. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6098. if (priv->retry_rate <= 0)
  6099. priv->retry_rate = 1;
  6100. return count;
  6101. }
  6102. static ssize_t show_retry_rate(struct device *d,
  6103. struct device_attribute *attr, char *buf)
  6104. {
  6105. struct iwl_priv *priv = dev_get_drvdata(d);
  6106. return sprintf(buf, "%d", priv->retry_rate);
  6107. }
  6108. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6109. store_retry_rate);
  6110. static ssize_t store_power_level(struct device *d,
  6111. struct device_attribute *attr,
  6112. const char *buf, size_t count)
  6113. {
  6114. struct iwl_priv *priv = dev_get_drvdata(d);
  6115. int rc;
  6116. int mode;
  6117. mode = simple_strtoul(buf, NULL, 0);
  6118. mutex_lock(&priv->mutex);
  6119. if (!iwl_is_ready(priv)) {
  6120. rc = -EAGAIN;
  6121. goto out;
  6122. }
  6123. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6124. mode = IWL_POWER_AC;
  6125. else
  6126. mode |= IWL_POWER_ENABLED;
  6127. if (mode != priv->power_mode) {
  6128. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6129. if (rc) {
  6130. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6131. goto out;
  6132. }
  6133. priv->power_mode = mode;
  6134. }
  6135. rc = count;
  6136. out:
  6137. mutex_unlock(&priv->mutex);
  6138. return rc;
  6139. }
  6140. #define MAX_WX_STRING 80
  6141. /* Values are in microsecond */
  6142. static const s32 timeout_duration[] = {
  6143. 350000,
  6144. 250000,
  6145. 75000,
  6146. 37000,
  6147. 25000,
  6148. };
  6149. static const s32 period_duration[] = {
  6150. 400000,
  6151. 700000,
  6152. 1000000,
  6153. 1000000,
  6154. 1000000
  6155. };
  6156. static ssize_t show_power_level(struct device *d,
  6157. struct device_attribute *attr, char *buf)
  6158. {
  6159. struct iwl_priv *priv = dev_get_drvdata(d);
  6160. int level = IWL_POWER_LEVEL(priv->power_mode);
  6161. char *p = buf;
  6162. p += sprintf(p, "%d ", level);
  6163. switch (level) {
  6164. case IWL_POWER_MODE_CAM:
  6165. case IWL_POWER_AC:
  6166. p += sprintf(p, "(AC)");
  6167. break;
  6168. case IWL_POWER_BATTERY:
  6169. p += sprintf(p, "(BATTERY)");
  6170. break;
  6171. default:
  6172. p += sprintf(p,
  6173. "(Timeout %dms, Period %dms)",
  6174. timeout_duration[level - 1] / 1000,
  6175. period_duration[level - 1] / 1000);
  6176. }
  6177. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6178. p += sprintf(p, " OFF\n");
  6179. else
  6180. p += sprintf(p, " \n");
  6181. return (p - buf + 1);
  6182. }
  6183. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6184. store_power_level);
  6185. static ssize_t show_channels(struct device *d,
  6186. struct device_attribute *attr, char *buf)
  6187. {
  6188. /* all this shit doesn't belong into sysfs anyway */
  6189. return 0;
  6190. }
  6191. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6192. static ssize_t show_statistics(struct device *d,
  6193. struct device_attribute *attr, char *buf)
  6194. {
  6195. struct iwl_priv *priv = dev_get_drvdata(d);
  6196. u32 size = sizeof(struct iwl4965_notif_statistics);
  6197. u32 len = 0, ofs = 0;
  6198. u8 *data = (u8 *) & priv->statistics;
  6199. int rc = 0;
  6200. if (!iwl_is_alive(priv))
  6201. return -EAGAIN;
  6202. mutex_lock(&priv->mutex);
  6203. rc = iwl_send_statistics_request(priv, 0);
  6204. mutex_unlock(&priv->mutex);
  6205. if (rc) {
  6206. len = sprintf(buf,
  6207. "Error sending statistics request: 0x%08X\n", rc);
  6208. return len;
  6209. }
  6210. while (size && (PAGE_SIZE - len)) {
  6211. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6212. PAGE_SIZE - len, 1);
  6213. len = strlen(buf);
  6214. if (PAGE_SIZE - len)
  6215. buf[len++] = '\n';
  6216. ofs += 16;
  6217. size -= min(size, 16U);
  6218. }
  6219. return len;
  6220. }
  6221. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6222. static ssize_t show_antenna(struct device *d,
  6223. struct device_attribute *attr, char *buf)
  6224. {
  6225. struct iwl_priv *priv = dev_get_drvdata(d);
  6226. if (!iwl_is_alive(priv))
  6227. return -EAGAIN;
  6228. return sprintf(buf, "%d\n", priv->antenna);
  6229. }
  6230. static ssize_t store_antenna(struct device *d,
  6231. struct device_attribute *attr,
  6232. const char *buf, size_t count)
  6233. {
  6234. int ant;
  6235. struct iwl_priv *priv = dev_get_drvdata(d);
  6236. if (count == 0)
  6237. return 0;
  6238. if (sscanf(buf, "%1i", &ant) != 1) {
  6239. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6240. return count;
  6241. }
  6242. if ((ant >= 0) && (ant <= 2)) {
  6243. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6244. priv->antenna = (enum iwl4965_antenna)ant;
  6245. } else
  6246. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6247. return count;
  6248. }
  6249. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6250. static ssize_t show_status(struct device *d,
  6251. struct device_attribute *attr, char *buf)
  6252. {
  6253. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6254. if (!iwl_is_alive(priv))
  6255. return -EAGAIN;
  6256. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6257. }
  6258. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6259. static ssize_t dump_error_log(struct device *d,
  6260. struct device_attribute *attr,
  6261. const char *buf, size_t count)
  6262. {
  6263. char *p = (char *)buf;
  6264. if (p[0] == '1')
  6265. iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6266. return strnlen(buf, count);
  6267. }
  6268. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6269. static ssize_t dump_event_log(struct device *d,
  6270. struct device_attribute *attr,
  6271. const char *buf, size_t count)
  6272. {
  6273. char *p = (char *)buf;
  6274. if (p[0] == '1')
  6275. iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6276. return strnlen(buf, count);
  6277. }
  6278. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6279. /*****************************************************************************
  6280. *
  6281. * driver setup and teardown
  6282. *
  6283. *****************************************************************************/
  6284. static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
  6285. {
  6286. priv->workqueue = create_workqueue(DRV_NAME);
  6287. init_waitqueue_head(&priv->wait_command_queue);
  6288. INIT_WORK(&priv->up, iwl4965_bg_up);
  6289. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  6290. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  6291. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  6292. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  6293. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  6294. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  6295. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  6296. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  6297. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  6298. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  6299. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  6300. iwl4965_hw_setup_deferred_work(priv);
  6301. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6302. iwl4965_irq_tasklet, (unsigned long)priv);
  6303. }
  6304. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
  6305. {
  6306. iwl4965_hw_cancel_deferred_work(priv);
  6307. cancel_delayed_work_sync(&priv->init_alive_start);
  6308. cancel_delayed_work(&priv->scan_check);
  6309. cancel_delayed_work(&priv->alive_start);
  6310. cancel_delayed_work(&priv->post_associate);
  6311. cancel_work_sync(&priv->beacon_update);
  6312. }
  6313. static struct attribute *iwl4965_sysfs_entries[] = {
  6314. &dev_attr_antenna.attr,
  6315. &dev_attr_channels.attr,
  6316. &dev_attr_dump_errors.attr,
  6317. &dev_attr_dump_events.attr,
  6318. &dev_attr_flags.attr,
  6319. &dev_attr_filter_flags.attr,
  6320. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6321. &dev_attr_measurement.attr,
  6322. #endif
  6323. &dev_attr_power_level.attr,
  6324. &dev_attr_retry_rate.attr,
  6325. &dev_attr_rs_window.attr,
  6326. &dev_attr_statistics.attr,
  6327. &dev_attr_status.attr,
  6328. &dev_attr_temperature.attr,
  6329. &dev_attr_tx_power.attr,
  6330. NULL
  6331. };
  6332. static struct attribute_group iwl4965_attribute_group = {
  6333. .name = NULL, /* put in device directory */
  6334. .attrs = iwl4965_sysfs_entries,
  6335. };
  6336. static struct ieee80211_ops iwl4965_hw_ops = {
  6337. .tx = iwl4965_mac_tx,
  6338. .start = iwl4965_mac_start,
  6339. .stop = iwl4965_mac_stop,
  6340. .add_interface = iwl4965_mac_add_interface,
  6341. .remove_interface = iwl4965_mac_remove_interface,
  6342. .config = iwl4965_mac_config,
  6343. .config_interface = iwl4965_mac_config_interface,
  6344. .configure_filter = iwl4965_configure_filter,
  6345. .set_key = iwl4965_mac_set_key,
  6346. .update_tkip_key = iwl4965_mac_update_tkip_key,
  6347. .get_stats = iwl4965_mac_get_stats,
  6348. .get_tx_stats = iwl4965_mac_get_tx_stats,
  6349. .conf_tx = iwl4965_mac_conf_tx,
  6350. .get_tsf = iwl4965_mac_get_tsf,
  6351. .reset_tsf = iwl4965_mac_reset_tsf,
  6352. .beacon_update = iwl4965_mac_beacon_update,
  6353. .bss_info_changed = iwl4965_bss_info_changed,
  6354. #ifdef CONFIG_IWL4965_HT
  6355. .ampdu_action = iwl4965_mac_ampdu_action,
  6356. #endif /* CONFIG_IWL4965_HT */
  6357. .hw_scan = iwl4965_mac_hw_scan
  6358. };
  6359. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  6360. {
  6361. int err = 0;
  6362. struct iwl_priv *priv;
  6363. struct ieee80211_hw *hw;
  6364. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  6365. unsigned long flags;
  6366. DECLARE_MAC_BUF(mac);
  6367. /************************
  6368. * 1. Allocating HW data
  6369. ************************/
  6370. /* Disabling hardware scan means that mac80211 will perform scans
  6371. * "the hard way", rather than using device's scan. */
  6372. if (cfg->mod_params->disable_hw_scan) {
  6373. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6374. iwl4965_hw_ops.hw_scan = NULL;
  6375. }
  6376. hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
  6377. if (!hw) {
  6378. err = -ENOMEM;
  6379. goto out;
  6380. }
  6381. priv = hw->priv;
  6382. /* At this point both hw and priv are allocated. */
  6383. SET_IEEE80211_DEV(hw, &pdev->dev);
  6384. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6385. priv->cfg = cfg;
  6386. priv->pci_dev = pdev;
  6387. #ifdef CONFIG_IWLWIFI_DEBUG
  6388. iwl_debug_level = priv->cfg->mod_params->debug;
  6389. atomic_set(&priv->restrict_refcnt, 0);
  6390. #endif
  6391. /**************************
  6392. * 2. Initializing PCI bus
  6393. **************************/
  6394. if (pci_enable_device(pdev)) {
  6395. err = -ENODEV;
  6396. goto out_ieee80211_free_hw;
  6397. }
  6398. pci_set_master(pdev);
  6399. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6400. if (!err)
  6401. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6402. if (err) {
  6403. printk(KERN_WARNING DRV_NAME
  6404. ": No suitable DMA available.\n");
  6405. goto out_pci_disable_device;
  6406. }
  6407. err = pci_request_regions(pdev, DRV_NAME);
  6408. if (err)
  6409. goto out_pci_disable_device;
  6410. pci_set_drvdata(pdev, priv);
  6411. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6412. * PCI Tx retries from interfering with C3 CPU state */
  6413. pci_write_config_byte(pdev, 0x41, 0x00);
  6414. /***********************
  6415. * 3. Read REV register
  6416. ***********************/
  6417. priv->hw_base = pci_iomap(pdev, 0, 0);
  6418. if (!priv->hw_base) {
  6419. err = -ENODEV;
  6420. goto out_pci_release_regions;
  6421. }
  6422. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  6423. (unsigned long long) pci_resource_len(pdev, 0));
  6424. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  6425. printk(KERN_INFO DRV_NAME
  6426. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  6427. /*****************
  6428. * 4. Read EEPROM
  6429. *****************/
  6430. /* nic init */
  6431. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  6432. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  6433. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  6434. err = iwl_poll_bit(priv, CSR_GP_CNTRL,
  6435. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  6436. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  6437. if (err < 0) {
  6438. IWL_DEBUG_INFO("Failed to init the card\n");
  6439. goto out_iounmap;
  6440. }
  6441. /* Read the EEPROM */
  6442. err = iwl_eeprom_init(priv);
  6443. if (err) {
  6444. IWL_ERROR("Unable to init EEPROM\n");
  6445. goto out_iounmap;
  6446. }
  6447. /* MAC Address location in EEPROM same for 3945/4965 */
  6448. iwl_eeprom_get_mac(priv, priv->mac_addr);
  6449. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  6450. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  6451. /************************
  6452. * 5. Setup HW constants
  6453. ************************/
  6454. /* Device-specific setup */
  6455. if (iwl4965_hw_set_hw_setting(priv)) {
  6456. IWL_ERROR("failed to set hw settings\n");
  6457. goto out_iounmap;
  6458. }
  6459. /*******************
  6460. * 6. Setup hw/priv
  6461. *******************/
  6462. err = iwl_setup(priv);
  6463. if (err)
  6464. goto out_unset_hw_settings;
  6465. /* At this point both hw and priv are initialized. */
  6466. /**********************************
  6467. * 7. Initialize module parameters
  6468. **********************************/
  6469. /* Disable radio (SW RF KILL) via parameter when loading driver */
  6470. if (priv->cfg->mod_params->disable) {
  6471. set_bit(STATUS_RF_KILL_SW, &priv->status);
  6472. IWL_DEBUG_INFO("Radio disabled.\n");
  6473. }
  6474. if (priv->cfg->mod_params->enable_qos)
  6475. priv->qos_data.qos_enable = 1;
  6476. /********************
  6477. * 8. Setup services
  6478. ********************/
  6479. spin_lock_irqsave(&priv->lock, flags);
  6480. iwl4965_disable_interrupts(priv);
  6481. spin_unlock_irqrestore(&priv->lock, flags);
  6482. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6483. if (err) {
  6484. IWL_ERROR("failed to create sysfs device attributes\n");
  6485. goto out_unset_hw_settings;
  6486. }
  6487. err = iwl_dbgfs_register(priv, DRV_NAME);
  6488. if (err) {
  6489. IWL_ERROR("failed to create debugfs files\n");
  6490. goto out_remove_sysfs;
  6491. }
  6492. iwl4965_setup_deferred_work(priv);
  6493. iwl4965_setup_rx_handlers(priv);
  6494. /********************
  6495. * 9. Conclude
  6496. ********************/
  6497. pci_save_state(pdev);
  6498. pci_disable_device(pdev);
  6499. /* notify iwlcore to init */
  6500. iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT);
  6501. return 0;
  6502. out_remove_sysfs:
  6503. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6504. out_unset_hw_settings:
  6505. iwl4965_unset_hw_setting(priv);
  6506. out_iounmap:
  6507. pci_iounmap(pdev, priv->hw_base);
  6508. out_pci_release_regions:
  6509. pci_release_regions(pdev);
  6510. pci_set_drvdata(pdev, NULL);
  6511. out_pci_disable_device:
  6512. pci_disable_device(pdev);
  6513. out_ieee80211_free_hw:
  6514. ieee80211_free_hw(priv->hw);
  6515. out:
  6516. return err;
  6517. }
  6518. static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
  6519. {
  6520. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6521. struct list_head *p, *q;
  6522. int i;
  6523. unsigned long flags;
  6524. if (!priv)
  6525. return;
  6526. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  6527. if (priv->mac80211_registered) {
  6528. ieee80211_unregister_hw(priv->hw);
  6529. priv->mac80211_registered = 0;
  6530. }
  6531. set_bit(STATUS_EXIT_PENDING, &priv->status);
  6532. iwl4965_down(priv);
  6533. /* make sure we flush any pending irq or
  6534. * tasklet for the driver
  6535. */
  6536. spin_lock_irqsave(&priv->lock, flags);
  6537. iwl4965_disable_interrupts(priv);
  6538. spin_unlock_irqrestore(&priv->lock, flags);
  6539. iwl_synchronize_irq(priv);
  6540. /* Free MAC hash list for ADHOC */
  6541. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  6542. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  6543. list_del(p);
  6544. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  6545. }
  6546. }
  6547. iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT);
  6548. iwl_dbgfs_unregister(priv);
  6549. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6550. iwl4965_dealloc_ucode_pci(priv);
  6551. if (priv->rxq.bd)
  6552. iwl4965_rx_queue_free(priv, &priv->rxq);
  6553. iwl4965_hw_txq_ctx_free(priv);
  6554. iwl4965_unset_hw_setting(priv);
  6555. iwlcore_clear_stations_table(priv);
  6556. /*netif_stop_queue(dev); */
  6557. flush_workqueue(priv->workqueue);
  6558. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  6559. * priv->workqueue... so we can't take down the workqueue
  6560. * until now... */
  6561. destroy_workqueue(priv->workqueue);
  6562. priv->workqueue = NULL;
  6563. pci_iounmap(pdev, priv->hw_base);
  6564. pci_release_regions(pdev);
  6565. pci_disable_device(pdev);
  6566. pci_set_drvdata(pdev, NULL);
  6567. iwl_free_channel_map(priv);
  6568. iwl4965_free_geos(priv);
  6569. if (priv->ibss_beacon)
  6570. dev_kfree_skb(priv->ibss_beacon);
  6571. ieee80211_free_hw(priv->hw);
  6572. }
  6573. #ifdef CONFIG_PM
  6574. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  6575. {
  6576. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6577. if (priv->is_open) {
  6578. set_bit(STATUS_IN_SUSPEND, &priv->status);
  6579. iwl4965_mac_stop(priv->hw);
  6580. priv->is_open = 1;
  6581. }
  6582. pci_set_power_state(pdev, PCI_D3hot);
  6583. return 0;
  6584. }
  6585. static int iwl4965_pci_resume(struct pci_dev *pdev)
  6586. {
  6587. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6588. pci_set_power_state(pdev, PCI_D0);
  6589. if (priv->is_open)
  6590. iwl4965_mac_start(priv->hw);
  6591. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  6592. return 0;
  6593. }
  6594. #endif /* CONFIG_PM */
  6595. /*****************************************************************************
  6596. *
  6597. * driver and module entry point
  6598. *
  6599. *****************************************************************************/
  6600. static struct pci_driver iwl4965_driver = {
  6601. .name = DRV_NAME,
  6602. .id_table = iwl4965_hw_card_ids,
  6603. .probe = iwl4965_pci_probe,
  6604. .remove = __devexit_p(iwl4965_pci_remove),
  6605. #ifdef CONFIG_PM
  6606. .suspend = iwl4965_pci_suspend,
  6607. .resume = iwl4965_pci_resume,
  6608. #endif
  6609. };
  6610. static int __init iwl4965_init(void)
  6611. {
  6612. int ret;
  6613. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  6614. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  6615. ret = iwl4965_rate_control_register();
  6616. if (ret) {
  6617. IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
  6618. return ret;
  6619. }
  6620. ret = pci_register_driver(&iwl4965_driver);
  6621. if (ret) {
  6622. IWL_ERROR("Unable to initialize PCI module\n");
  6623. goto error_register;
  6624. }
  6625. #ifdef CONFIG_IWLWIFI_DEBUG
  6626. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6627. if (ret) {
  6628. IWL_ERROR("Unable to create driver sysfs file\n");
  6629. goto error_debug;
  6630. }
  6631. #endif
  6632. return ret;
  6633. #ifdef CONFIG_IWLWIFI_DEBUG
  6634. error_debug:
  6635. pci_unregister_driver(&iwl4965_driver);
  6636. #endif
  6637. error_register:
  6638. iwl4965_rate_control_unregister();
  6639. return ret;
  6640. }
  6641. static void __exit iwl4965_exit(void)
  6642. {
  6643. #ifdef CONFIG_IWLWIFI_DEBUG
  6644. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6645. #endif
  6646. pci_unregister_driver(&iwl4965_driver);
  6647. iwl4965_rate_control_unregister();
  6648. }
  6649. module_exit(iwl4965_exit);
  6650. module_init(iwl4965_init);