dma-mapping.h 10 KB

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  1. /*
  2. * Copyright (C) 2004 IBM
  3. *
  4. * Implements the generic device dma API for powerpc.
  5. * the pci and vio busses
  6. */
  7. #ifndef _ASM_DMA_MAPPING_H
  8. #define _ASM_DMA_MAPPING_H
  9. #ifdef __KERNEL__
  10. #include <linux/types.h>
  11. #include <linux/cache.h>
  12. /* need struct page definitions */
  13. #include <linux/mm.h>
  14. #include <asm/scatterlist.h>
  15. #include <asm/io.h>
  16. #define DMA_ERROR_CODE (~(dma_addr_t)0x0)
  17. #ifdef CONFIG_NOT_COHERENT_CACHE
  18. /*
  19. * DMA-consistent mapping functions for PowerPCs that don't support
  20. * cache snooping. These allocate/free a region of uncached mapped
  21. * memory space for use with DMA devices. Alternatively, you could
  22. * allocate the space "normally" and use the cache management functions
  23. * to ensure it is consistent.
  24. */
  25. extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp);
  26. extern void __dma_free_coherent(size_t size, void *vaddr);
  27. extern void __dma_sync(void *vaddr, size_t size, int direction);
  28. extern void __dma_sync_page(struct page *page, unsigned long offset,
  29. size_t size, int direction);
  30. #else /* ! CONFIG_NOT_COHERENT_CACHE */
  31. /*
  32. * Cache coherent cores.
  33. */
  34. #define __dma_alloc_coherent(gfp, size, handle) NULL
  35. #define __dma_free_coherent(size, addr) ((void)0)
  36. #define __dma_sync(addr, size, rw) ((void)0)
  37. #define __dma_sync_page(pg, off, sz, rw) ((void)0)
  38. #endif /* ! CONFIG_NOT_COHERENT_CACHE */
  39. #ifdef CONFIG_PPC64
  40. /*
  41. * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
  42. */
  43. struct dma_mapping_ops {
  44. void * (*alloc_coherent)(struct device *dev, size_t size,
  45. dma_addr_t *dma_handle, gfp_t flag);
  46. void (*free_coherent)(struct device *dev, size_t size,
  47. void *vaddr, dma_addr_t dma_handle);
  48. dma_addr_t (*map_single)(struct device *dev, void *ptr,
  49. size_t size, enum dma_data_direction direction);
  50. void (*unmap_single)(struct device *dev, dma_addr_t dma_addr,
  51. size_t size, enum dma_data_direction direction);
  52. int (*map_sg)(struct device *dev, struct scatterlist *sg,
  53. int nents, enum dma_data_direction direction);
  54. void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
  55. int nents, enum dma_data_direction direction);
  56. int (*dma_supported)(struct device *dev, u64 mask);
  57. int (*set_dma_mask)(struct device *dev, u64 dma_mask);
  58. };
  59. static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
  60. {
  61. /* We don't handle the NULL dev case for ISA for now. We could
  62. * do it via an out of line call but it is not needed for now. The
  63. * only ISA DMA device we support is the floppy and we have a hack
  64. * in the floppy driver directly to get a device for us.
  65. */
  66. if (unlikely(dev == NULL || dev->archdata.dma_ops == NULL))
  67. return NULL;
  68. return dev->archdata.dma_ops;
  69. }
  70. static inline int dma_supported(struct device *dev, u64 mask)
  71. {
  72. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  73. if (unlikely(dma_ops == NULL))
  74. return 0;
  75. if (dma_ops->dma_supported == NULL)
  76. return 1;
  77. return dma_ops->dma_supported(dev, mask);
  78. }
  79. static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  80. {
  81. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  82. if (unlikely(dma_ops == NULL))
  83. return -EIO;
  84. if (dma_ops->set_dma_mask != NULL)
  85. return dma_ops->set_dma_mask(dev, dma_mask);
  86. if (!dev->dma_mask || !dma_supported(dev, *dev->dma_mask))
  87. return -EIO;
  88. *dev->dma_mask = dma_mask;
  89. return 0;
  90. }
  91. static inline void *dma_alloc_coherent(struct device *dev, size_t size,
  92. dma_addr_t *dma_handle, gfp_t flag)
  93. {
  94. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  95. BUG_ON(!dma_ops);
  96. return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
  97. }
  98. static inline void dma_free_coherent(struct device *dev, size_t size,
  99. void *cpu_addr, dma_addr_t dma_handle)
  100. {
  101. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  102. BUG_ON(!dma_ops);
  103. dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
  104. }
  105. static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
  106. size_t size,
  107. enum dma_data_direction direction)
  108. {
  109. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  110. BUG_ON(!dma_ops);
  111. return dma_ops->map_single(dev, cpu_addr, size, direction);
  112. }
  113. static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
  114. size_t size,
  115. enum dma_data_direction direction)
  116. {
  117. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  118. BUG_ON(!dma_ops);
  119. dma_ops->unmap_single(dev, dma_addr, size, direction);
  120. }
  121. static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
  122. unsigned long offset, size_t size,
  123. enum dma_data_direction direction)
  124. {
  125. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  126. BUG_ON(!dma_ops);
  127. return dma_ops->map_single(dev, page_address(page) + offset, size,
  128. direction);
  129. }
  130. static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
  131. size_t size,
  132. enum dma_data_direction direction)
  133. {
  134. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  135. BUG_ON(!dma_ops);
  136. dma_ops->unmap_single(dev, dma_address, size, direction);
  137. }
  138. static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
  139. int nents, enum dma_data_direction direction)
  140. {
  141. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  142. BUG_ON(!dma_ops);
  143. return dma_ops->map_sg(dev, sg, nents, direction);
  144. }
  145. static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
  146. int nhwentries,
  147. enum dma_data_direction direction)
  148. {
  149. struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
  150. BUG_ON(!dma_ops);
  151. dma_ops->unmap_sg(dev, sg, nhwentries, direction);
  152. }
  153. /*
  154. * Available generic sets of operations
  155. */
  156. extern struct dma_mapping_ops dma_iommu_ops;
  157. extern struct dma_mapping_ops dma_direct_ops;
  158. extern unsigned long dma_direct_offset;
  159. #else /* CONFIG_PPC64 */
  160. #define dma_supported(dev, mask) (1)
  161. static inline int dma_set_mask(struct device *dev, u64 dma_mask)
  162. {
  163. if (!dev->dma_mask || !dma_supported(dev, mask))
  164. return -EIO;
  165. *dev->dma_mask = dma_mask;
  166. return 0;
  167. }
  168. static inline void *dma_alloc_coherent(struct device *dev, size_t size,
  169. dma_addr_t * dma_handle,
  170. gfp_t gfp)
  171. {
  172. #ifdef CONFIG_NOT_COHERENT_CACHE
  173. return __dma_alloc_coherent(size, dma_handle, gfp);
  174. #else
  175. void *ret;
  176. /* ignore region specifiers */
  177. gfp &= ~(__GFP_DMA | __GFP_HIGHMEM);
  178. if (dev == NULL || dev->coherent_dma_mask < 0xffffffff)
  179. gfp |= GFP_DMA;
  180. ret = (void *)__get_free_pages(gfp, get_order(size));
  181. if (ret != NULL) {
  182. memset(ret, 0, size);
  183. *dma_handle = virt_to_bus(ret);
  184. }
  185. return ret;
  186. #endif
  187. }
  188. static inline void
  189. dma_free_coherent(struct device *dev, size_t size, void *vaddr,
  190. dma_addr_t dma_handle)
  191. {
  192. #ifdef CONFIG_NOT_COHERENT_CACHE
  193. __dma_free_coherent(size, vaddr);
  194. #else
  195. free_pages((unsigned long)vaddr, get_order(size));
  196. #endif
  197. }
  198. static inline dma_addr_t
  199. dma_map_single(struct device *dev, void *ptr, size_t size,
  200. enum dma_data_direction direction)
  201. {
  202. BUG_ON(direction == DMA_NONE);
  203. __dma_sync(ptr, size, direction);
  204. return virt_to_bus(ptr);
  205. }
  206. /* We do nothing. */
  207. #define dma_unmap_single(dev, addr, size, dir) ((void)0)
  208. static inline dma_addr_t
  209. dma_map_page(struct device *dev, struct page *page,
  210. unsigned long offset, size_t size,
  211. enum dma_data_direction direction)
  212. {
  213. BUG_ON(direction == DMA_NONE);
  214. __dma_sync_page(page, offset, size, direction);
  215. return page_to_bus(page) + offset;
  216. }
  217. /* We do nothing. */
  218. #define dma_unmap_page(dev, handle, size, dir) ((void)0)
  219. static inline int
  220. dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
  221. enum dma_data_direction direction)
  222. {
  223. int i;
  224. BUG_ON(direction == DMA_NONE);
  225. for (i = 0; i < nents; i++, sg++) {
  226. BUG_ON(!sg->page);
  227. __dma_sync_page(sg->page, sg->offset, sg->length, direction);
  228. sg->dma_address = page_to_bus(sg->page) + sg->offset;
  229. }
  230. return nents;
  231. }
  232. /* We don't do anything here. */
  233. #define dma_unmap_sg(dev, sg, nents, dir) ((void)0)
  234. #endif /* CONFIG_PPC64 */
  235. static inline void dma_sync_single_for_cpu(struct device *dev,
  236. dma_addr_t dma_handle, size_t size,
  237. enum dma_data_direction direction)
  238. {
  239. BUG_ON(direction == DMA_NONE);
  240. __dma_sync(bus_to_virt(dma_handle), size, direction);
  241. }
  242. static inline void dma_sync_single_for_device(struct device *dev,
  243. dma_addr_t dma_handle, size_t size,
  244. enum dma_data_direction direction)
  245. {
  246. BUG_ON(direction == DMA_NONE);
  247. __dma_sync(bus_to_virt(dma_handle), size, direction);
  248. }
  249. static inline void dma_sync_sg_for_cpu(struct device *dev,
  250. struct scatterlist *sg, int nents,
  251. enum dma_data_direction direction)
  252. {
  253. int i;
  254. BUG_ON(direction == DMA_NONE);
  255. for (i = 0; i < nents; i++, sg++)
  256. __dma_sync_page(sg->page, sg->offset, sg->length, direction);
  257. }
  258. static inline void dma_sync_sg_for_device(struct device *dev,
  259. struct scatterlist *sg, int nents,
  260. enum dma_data_direction direction)
  261. {
  262. int i;
  263. BUG_ON(direction == DMA_NONE);
  264. for (i = 0; i < nents; i++, sg++)
  265. __dma_sync_page(sg->page, sg->offset, sg->length, direction);
  266. }
  267. static inline int dma_mapping_error(dma_addr_t dma_addr)
  268. {
  269. #ifdef CONFIG_PPC64
  270. return (dma_addr == DMA_ERROR_CODE);
  271. #else
  272. return 0;
  273. #endif
  274. }
  275. #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
  276. #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
  277. #ifdef CONFIG_NOT_COHERENT_CACHE
  278. #define dma_is_consistent(d, h) (0)
  279. #else
  280. #define dma_is_consistent(d, h) (1)
  281. #endif
  282. static inline int dma_get_cache_alignment(void)
  283. {
  284. #ifdef CONFIG_PPC64
  285. /* no easy way to get cache size on all processors, so return
  286. * the maximum possible, to be safe */
  287. return (1 << INTERNODE_CACHE_SHIFT);
  288. #else
  289. /*
  290. * Each processor family will define its own L1_CACHE_SHIFT,
  291. * L1_CACHE_BYTES wraps to this, so this is always safe.
  292. */
  293. return L1_CACHE_BYTES;
  294. #endif
  295. }
  296. static inline void dma_sync_single_range_for_cpu(struct device *dev,
  297. dma_addr_t dma_handle, unsigned long offset, size_t size,
  298. enum dma_data_direction direction)
  299. {
  300. /* just sync everything for now */
  301. dma_sync_single_for_cpu(dev, dma_handle, offset + size, direction);
  302. }
  303. static inline void dma_sync_single_range_for_device(struct device *dev,
  304. dma_addr_t dma_handle, unsigned long offset, size_t size,
  305. enum dma_data_direction direction)
  306. {
  307. /* just sync everything for now */
  308. dma_sync_single_for_device(dev, dma_handle, offset + size, direction);
  309. }
  310. static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
  311. enum dma_data_direction direction)
  312. {
  313. BUG_ON(direction == DMA_NONE);
  314. __dma_sync(vaddr, size, (int)direction);
  315. }
  316. #endif /* __KERNEL__ */
  317. #endif /* _ASM_DMA_MAPPING_H */