pgtable.h 7.0 KB

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  1. #ifndef _ASM_GENERIC_PGTABLE_H
  2. #define _ASM_GENERIC_PGTABLE_H
  3. #ifndef __ASSEMBLY__
  4. #ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
  5. /*
  6. * Largely same as above, but only sets the access flags (dirty,
  7. * accessed, and writable). Furthermore, we know it always gets set
  8. * to a "more permissive" setting, which allows most architectures
  9. * to optimize this. We return whether the PTE actually changed, which
  10. * in turn instructs the caller to do things like update__mmu_cache.
  11. * This used to be done in the caller, but sparc needs minor faults to
  12. * force that call on sun4c so we changed this macro slightly
  13. */
  14. #define ptep_set_access_flags(__vma, __address, __ptep, __entry, __dirty) \
  15. ({ \
  16. int __changed = !pte_same(*(__ptep), __entry); \
  17. if (__changed) { \
  18. set_pte_at((__vma)->vm_mm, (__address), __ptep, __entry); \
  19. flush_tlb_page(__vma, __address); \
  20. } \
  21. __changed; \
  22. })
  23. #endif
  24. #ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
  25. #define ptep_test_and_clear_young(__vma, __address, __ptep) \
  26. ({ \
  27. pte_t __pte = *(__ptep); \
  28. int r = 1; \
  29. if (!pte_young(__pte)) \
  30. r = 0; \
  31. else \
  32. set_pte_at((__vma)->vm_mm, (__address), \
  33. (__ptep), pte_mkold(__pte)); \
  34. r; \
  35. })
  36. #endif
  37. #ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
  38. #define ptep_clear_flush_young(__vma, __address, __ptep) \
  39. ({ \
  40. int __young; \
  41. __young = ptep_test_and_clear_young(__vma, __address, __ptep); \
  42. if (__young) \
  43. flush_tlb_page(__vma, __address); \
  44. __young; \
  45. })
  46. #endif
  47. #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
  48. #define ptep_get_and_clear(__mm, __address, __ptep) \
  49. ({ \
  50. pte_t __pte = *(__ptep); \
  51. pte_clear((__mm), (__address), (__ptep)); \
  52. __pte; \
  53. })
  54. #endif
  55. #ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
  56. #define ptep_get_and_clear_full(__mm, __address, __ptep, __full) \
  57. ({ \
  58. pte_t __pte; \
  59. __pte = ptep_get_and_clear((__mm), (__address), (__ptep)); \
  60. __pte; \
  61. })
  62. #endif
  63. /*
  64. * Some architectures may be able to avoid expensive synchronization
  65. * primitives when modifications are made to PTE's which are already
  66. * not present, or in the process of an address space destruction.
  67. */
  68. #ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
  69. #define pte_clear_not_present_full(__mm, __address, __ptep, __full) \
  70. do { \
  71. pte_clear((__mm), (__address), (__ptep)); \
  72. } while (0)
  73. #endif
  74. #ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
  75. #define ptep_clear_flush(__vma, __address, __ptep) \
  76. ({ \
  77. pte_t __pte; \
  78. __pte = ptep_get_and_clear((__vma)->vm_mm, __address, __ptep); \
  79. flush_tlb_page(__vma, __address); \
  80. __pte; \
  81. })
  82. #endif
  83. #ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
  84. struct mm_struct;
  85. static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
  86. {
  87. pte_t old_pte = *ptep;
  88. set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
  89. }
  90. #endif
  91. #ifndef __HAVE_ARCH_PTE_SAME
  92. #define pte_same(A,B) (pte_val(A) == pte_val(B))
  93. #endif
  94. #ifndef __HAVE_ARCH_PAGE_TEST_DIRTY
  95. #define page_test_dirty(page) (0)
  96. #endif
  97. #ifndef __HAVE_ARCH_PAGE_CLEAR_DIRTY
  98. #define page_clear_dirty(page) do { } while (0)
  99. #endif
  100. #ifndef __HAVE_ARCH_PAGE_TEST_DIRTY
  101. #define pte_maybe_dirty(pte) pte_dirty(pte)
  102. #else
  103. #define pte_maybe_dirty(pte) (1)
  104. #endif
  105. #ifndef __HAVE_ARCH_PAGE_TEST_AND_CLEAR_YOUNG
  106. #define page_test_and_clear_young(page) (0)
  107. #endif
  108. #ifndef __HAVE_ARCH_PGD_OFFSET_GATE
  109. #define pgd_offset_gate(mm, addr) pgd_offset(mm, addr)
  110. #endif
  111. #ifndef __HAVE_ARCH_LAZY_MMU_PROT_UPDATE
  112. #define lazy_mmu_prot_update(pte) do { } while (0)
  113. #endif
  114. #ifndef __HAVE_ARCH_MOVE_PTE
  115. #define move_pte(pte, prot, old_addr, new_addr) (pte)
  116. #endif
  117. /*
  118. * A facility to provide lazy MMU batching. This allows PTE updates and
  119. * page invalidations to be delayed until a call to leave lazy MMU mode
  120. * is issued. Some architectures may benefit from doing this, and it is
  121. * beneficial for both shadow and direct mode hypervisors, which may batch
  122. * the PTE updates which happen during this window. Note that using this
  123. * interface requires that read hazards be removed from the code. A read
  124. * hazard could result in the direct mode hypervisor case, since the actual
  125. * write to the page tables may not yet have taken place, so reads though
  126. * a raw PTE pointer after it has been modified are not guaranteed to be
  127. * up to date. This mode can only be entered and left under the protection of
  128. * the page table locks for all page tables which may be modified. In the UP
  129. * case, this is required so that preemption is disabled, and in the SMP case,
  130. * it must synchronize the delayed page table writes properly on other CPUs.
  131. */
  132. #ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
  133. #define arch_enter_lazy_mmu_mode() do {} while (0)
  134. #define arch_leave_lazy_mmu_mode() do {} while (0)
  135. #define arch_flush_lazy_mmu_mode() do {} while (0)
  136. #endif
  137. /*
  138. * A facility to provide batching of the reload of page tables with the
  139. * actual context switch code for paravirtualized guests. By convention,
  140. * only one of the lazy modes (CPU, MMU) should be active at any given
  141. * time, entry should never be nested, and entry and exits should always
  142. * be paired. This is for sanity of maintaining and reasoning about the
  143. * kernel code.
  144. */
  145. #ifndef __HAVE_ARCH_ENTER_LAZY_CPU_MODE
  146. #define arch_enter_lazy_cpu_mode() do {} while (0)
  147. #define arch_leave_lazy_cpu_mode() do {} while (0)
  148. #define arch_flush_lazy_cpu_mode() do {} while (0)
  149. #endif
  150. /*
  151. * When walking page tables, get the address of the next boundary,
  152. * or the end address of the range if that comes earlier. Although no
  153. * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
  154. */
  155. #define pgd_addr_end(addr, end) \
  156. ({ unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK; \
  157. (__boundary - 1 < (end) - 1)? __boundary: (end); \
  158. })
  159. #ifndef pud_addr_end
  160. #define pud_addr_end(addr, end) \
  161. ({ unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK; \
  162. (__boundary - 1 < (end) - 1)? __boundary: (end); \
  163. })
  164. #endif
  165. #ifndef pmd_addr_end
  166. #define pmd_addr_end(addr, end) \
  167. ({ unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK; \
  168. (__boundary - 1 < (end) - 1)? __boundary: (end); \
  169. })
  170. #endif
  171. /*
  172. * When walking page tables, we usually want to skip any p?d_none entries;
  173. * and any p?d_bad entries - reporting the error before resetting to none.
  174. * Do the tests inline, but report and clear the bad entry in mm/memory.c.
  175. */
  176. void pgd_clear_bad(pgd_t *);
  177. void pud_clear_bad(pud_t *);
  178. void pmd_clear_bad(pmd_t *);
  179. static inline int pgd_none_or_clear_bad(pgd_t *pgd)
  180. {
  181. if (pgd_none(*pgd))
  182. return 1;
  183. if (unlikely(pgd_bad(*pgd))) {
  184. pgd_clear_bad(pgd);
  185. return 1;
  186. }
  187. return 0;
  188. }
  189. static inline int pud_none_or_clear_bad(pud_t *pud)
  190. {
  191. if (pud_none(*pud))
  192. return 1;
  193. if (unlikely(pud_bad(*pud))) {
  194. pud_clear_bad(pud);
  195. return 1;
  196. }
  197. return 0;
  198. }
  199. static inline int pmd_none_or_clear_bad(pmd_t *pmd)
  200. {
  201. if (pmd_none(*pmd))
  202. return 1;
  203. if (unlikely(pmd_bad(*pmd))) {
  204. pmd_clear_bad(pmd);
  205. return 1;
  206. }
  207. return 0;
  208. }
  209. #endif /* !__ASSEMBLY__ */
  210. #endif /* _ASM_GENERIC_PGTABLE_H */