lpfc_sli.c 104 KB

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  1. /*******************************************************************
  2. * This file is part of the Emulex Linux Device Driver for *
  3. * Fibre Channel Host Bus Adapters. *
  4. * Copyright (C) 2004-2007 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * Portions Copyright (C) 2004-2005 Christoph Hellwig *
  8. * *
  9. * This program is free software; you can redistribute it and/or *
  10. * modify it under the terms of version 2 of the GNU General *
  11. * Public License as published by the Free Software Foundation. *
  12. * This program is distributed in the hope that it will be useful. *
  13. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  14. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  15. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  16. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  17. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  18. * more details, a copy of which can be found in the file COPYING *
  19. * included with this package. *
  20. *******************************************************************/
  21. #include <linux/blkdev.h>
  22. #include <linux/pci.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/delay.h>
  25. #include <scsi/scsi.h>
  26. #include <scsi/scsi_cmnd.h>
  27. #include <scsi/scsi_device.h>
  28. #include <scsi/scsi_host.h>
  29. #include <scsi/scsi_transport_fc.h>
  30. #include "lpfc_hw.h"
  31. #include "lpfc_sli.h"
  32. #include "lpfc_disc.h"
  33. #include "lpfc_scsi.h"
  34. #include "lpfc.h"
  35. #include "lpfc_crtn.h"
  36. #include "lpfc_logmsg.h"
  37. #include "lpfc_compat.h"
  38. #include "lpfc_debugfs.h"
  39. /*
  40. * Define macro to log: Mailbox command x%x cannot issue Data
  41. * This allows multiple uses of lpfc_msgBlk0311
  42. * w/o perturbing log msg utility.
  43. */
  44. #define LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag) \
  45. lpfc_printf_log(phba, \
  46. KERN_INFO, \
  47. LOG_MBOX | LOG_SLI, \
  48. "%d (%d):0311 Mailbox command x%x cannot " \
  49. "issue Data: x%x x%x x%x\n", \
  50. phba->brd_no, \
  51. pmbox->vport ? pmbox->vport->vpi : 0, \
  52. pmbox->mb.mbxCommand, \
  53. phba->pport->port_state, \
  54. psli->sli_flag, \
  55. flag)
  56. /* There are only four IOCB completion types. */
  57. typedef enum _lpfc_iocb_type {
  58. LPFC_UNKNOWN_IOCB,
  59. LPFC_UNSOL_IOCB,
  60. LPFC_SOL_IOCB,
  61. LPFC_ABORT_IOCB
  62. } lpfc_iocb_type;
  63. /* SLI-2/SLI-3 provide different sized iocbs. Given a pointer
  64. * to the start of the ring, and the slot number of the
  65. * desired iocb entry, calc a pointer to that entry.
  66. */
  67. static inline IOCB_t *
  68. lpfc_cmd_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  69. {
  70. return (IOCB_t *) (((char *) pring->cmdringaddr) +
  71. pring->cmdidx * phba->iocb_cmd_size);
  72. }
  73. static inline IOCB_t *
  74. lpfc_resp_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  75. {
  76. return (IOCB_t *) (((char *) pring->rspringaddr) +
  77. pring->rspidx * phba->iocb_rsp_size);
  78. }
  79. static struct lpfc_iocbq *
  80. __lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  81. {
  82. struct list_head *lpfc_iocb_list = &phba->lpfc_iocb_list;
  83. struct lpfc_iocbq * iocbq = NULL;
  84. list_remove_head(lpfc_iocb_list, iocbq, struct lpfc_iocbq, list);
  85. return iocbq;
  86. }
  87. struct lpfc_iocbq *
  88. lpfc_sli_get_iocbq(struct lpfc_hba *phba)
  89. {
  90. struct lpfc_iocbq * iocbq = NULL;
  91. unsigned long iflags;
  92. spin_lock_irqsave(&phba->hbalock, iflags);
  93. iocbq = __lpfc_sli_get_iocbq(phba);
  94. spin_unlock_irqrestore(&phba->hbalock, iflags);
  95. return iocbq;
  96. }
  97. void
  98. __lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  99. {
  100. size_t start_clean = offsetof(struct lpfc_iocbq, iocb);
  101. /*
  102. * Clean all volatile data fields, preserve iotag and node struct.
  103. */
  104. memset((char*)iocbq + start_clean, 0, sizeof(*iocbq) - start_clean);
  105. list_add_tail(&iocbq->list, &phba->lpfc_iocb_list);
  106. }
  107. void
  108. lpfc_sli_release_iocbq(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  109. {
  110. unsigned long iflags;
  111. /*
  112. * Clean all volatile data fields, preserve iotag and node struct.
  113. */
  114. spin_lock_irqsave(&phba->hbalock, iflags);
  115. __lpfc_sli_release_iocbq(phba, iocbq);
  116. spin_unlock_irqrestore(&phba->hbalock, iflags);
  117. }
  118. /*
  119. * Translate the iocb command to an iocb command type used to decide the final
  120. * disposition of each completed IOCB.
  121. */
  122. static lpfc_iocb_type
  123. lpfc_sli_iocb_cmd_type(uint8_t iocb_cmnd)
  124. {
  125. lpfc_iocb_type type = LPFC_UNKNOWN_IOCB;
  126. if (iocb_cmnd > CMD_MAX_IOCB_CMD)
  127. return 0;
  128. switch (iocb_cmnd) {
  129. case CMD_XMIT_SEQUENCE_CR:
  130. case CMD_XMIT_SEQUENCE_CX:
  131. case CMD_XMIT_BCAST_CN:
  132. case CMD_XMIT_BCAST_CX:
  133. case CMD_ELS_REQUEST_CR:
  134. case CMD_ELS_REQUEST_CX:
  135. case CMD_CREATE_XRI_CR:
  136. case CMD_CREATE_XRI_CX:
  137. case CMD_GET_RPI_CN:
  138. case CMD_XMIT_ELS_RSP_CX:
  139. case CMD_GET_RPI_CR:
  140. case CMD_FCP_IWRITE_CR:
  141. case CMD_FCP_IWRITE_CX:
  142. case CMD_FCP_IREAD_CR:
  143. case CMD_FCP_IREAD_CX:
  144. case CMD_FCP_ICMND_CR:
  145. case CMD_FCP_ICMND_CX:
  146. case CMD_FCP_TSEND_CX:
  147. case CMD_FCP_TRSP_CX:
  148. case CMD_FCP_TRECEIVE_CX:
  149. case CMD_FCP_AUTO_TRSP_CX:
  150. case CMD_ADAPTER_MSG:
  151. case CMD_ADAPTER_DUMP:
  152. case CMD_XMIT_SEQUENCE64_CR:
  153. case CMD_XMIT_SEQUENCE64_CX:
  154. case CMD_XMIT_BCAST64_CN:
  155. case CMD_XMIT_BCAST64_CX:
  156. case CMD_ELS_REQUEST64_CR:
  157. case CMD_ELS_REQUEST64_CX:
  158. case CMD_FCP_IWRITE64_CR:
  159. case CMD_FCP_IWRITE64_CX:
  160. case CMD_FCP_IREAD64_CR:
  161. case CMD_FCP_IREAD64_CX:
  162. case CMD_FCP_ICMND64_CR:
  163. case CMD_FCP_ICMND64_CX:
  164. case CMD_FCP_TSEND64_CX:
  165. case CMD_FCP_TRSP64_CX:
  166. case CMD_FCP_TRECEIVE64_CX:
  167. case CMD_GEN_REQUEST64_CR:
  168. case CMD_GEN_REQUEST64_CX:
  169. case CMD_XMIT_ELS_RSP64_CX:
  170. type = LPFC_SOL_IOCB;
  171. break;
  172. case CMD_ABORT_XRI_CN:
  173. case CMD_ABORT_XRI_CX:
  174. case CMD_CLOSE_XRI_CN:
  175. case CMD_CLOSE_XRI_CX:
  176. case CMD_XRI_ABORTED_CX:
  177. case CMD_ABORT_MXRI64_CN:
  178. type = LPFC_ABORT_IOCB;
  179. break;
  180. case CMD_RCV_SEQUENCE_CX:
  181. case CMD_RCV_ELS_REQ_CX:
  182. case CMD_RCV_SEQUENCE64_CX:
  183. case CMD_RCV_ELS_REQ64_CX:
  184. case CMD_IOCB_RCV_SEQ64_CX:
  185. case CMD_IOCB_RCV_ELS64_CX:
  186. case CMD_IOCB_RCV_CONT64_CX:
  187. type = LPFC_UNSOL_IOCB;
  188. break;
  189. default:
  190. type = LPFC_UNKNOWN_IOCB;
  191. break;
  192. }
  193. return type;
  194. }
  195. static int
  196. lpfc_sli_ring_map(struct lpfc_hba *phba)
  197. {
  198. struct lpfc_sli *psli = &phba->sli;
  199. LPFC_MBOXQ_t *pmb;
  200. MAILBOX_t *pmbox;
  201. int i, rc, ret = 0;
  202. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  203. if (!pmb)
  204. return -ENOMEM;
  205. pmbox = &pmb->mb;
  206. phba->link_state = LPFC_INIT_MBX_CMDS;
  207. for (i = 0; i < psli->num_rings; i++) {
  208. lpfc_config_ring(phba, i, pmb);
  209. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  210. if (rc != MBX_SUCCESS) {
  211. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  212. "%d:0446 Adapter failed to init (%d), "
  213. "mbxCmd x%x CFG_RING, mbxStatus x%x, "
  214. "ring %d\n",
  215. phba->brd_no, rc,
  216. pmbox->mbxCommand,
  217. pmbox->mbxStatus,
  218. i);
  219. phba->link_state = LPFC_HBA_ERROR;
  220. ret = -ENXIO;
  221. break;
  222. }
  223. }
  224. mempool_free(pmb, phba->mbox_mem_pool);
  225. return ret;
  226. }
  227. static int
  228. lpfc_sli_ringtxcmpl_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  229. struct lpfc_iocbq *piocb)
  230. {
  231. list_add_tail(&piocb->list, &pring->txcmplq);
  232. pring->txcmplq_cnt++;
  233. if ((unlikely(pring->ringno == LPFC_ELS_RING)) &&
  234. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  235. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  236. if (!piocb->vport)
  237. BUG();
  238. else
  239. mod_timer(&piocb->vport->els_tmofunc,
  240. jiffies + HZ * (phba->fc_ratov << 1));
  241. }
  242. return 0;
  243. }
  244. static struct lpfc_iocbq *
  245. lpfc_sli_ringtx_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  246. {
  247. struct lpfc_iocbq *cmd_iocb;
  248. list_remove_head((&pring->txq), cmd_iocb, struct lpfc_iocbq, list);
  249. if (cmd_iocb != NULL)
  250. pring->txq_cnt--;
  251. return cmd_iocb;
  252. }
  253. static IOCB_t *
  254. lpfc_sli_next_iocb_slot (struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  255. {
  256. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  257. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  258. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  259. uint32_t max_cmd_idx = pring->numCiocb;
  260. if ((pring->next_cmdidx == pring->cmdidx) &&
  261. (++pring->next_cmdidx >= max_cmd_idx))
  262. pring->next_cmdidx = 0;
  263. if (unlikely(pring->local_getidx == pring->next_cmdidx)) {
  264. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  265. if (unlikely(pring->local_getidx >= max_cmd_idx)) {
  266. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  267. "%d:0315 Ring %d issue: portCmdGet %d "
  268. "is bigger then cmd ring %d\n",
  269. phba->brd_no, pring->ringno,
  270. pring->local_getidx, max_cmd_idx);
  271. phba->link_state = LPFC_HBA_ERROR;
  272. /*
  273. * All error attention handlers are posted to
  274. * worker thread
  275. */
  276. phba->work_ha |= HA_ERATT;
  277. phba->work_hs = HS_FFER3;
  278. /* hbalock should already be held */
  279. if (phba->work_wait)
  280. lpfc_worker_wake_up(phba);
  281. return NULL;
  282. }
  283. if (pring->local_getidx == pring->next_cmdidx)
  284. return NULL;
  285. }
  286. return lpfc_cmd_iocb(phba, pring);
  287. }
  288. uint16_t
  289. lpfc_sli_next_iotag(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq)
  290. {
  291. struct lpfc_iocbq **new_arr;
  292. struct lpfc_iocbq **old_arr;
  293. size_t new_len;
  294. struct lpfc_sli *psli = &phba->sli;
  295. uint16_t iotag;
  296. spin_lock_irq(&phba->hbalock);
  297. iotag = psli->last_iotag;
  298. if(++iotag < psli->iocbq_lookup_len) {
  299. psli->last_iotag = iotag;
  300. psli->iocbq_lookup[iotag] = iocbq;
  301. spin_unlock_irq(&phba->hbalock);
  302. iocbq->iotag = iotag;
  303. return iotag;
  304. } else if (psli->iocbq_lookup_len < (0xffff
  305. - LPFC_IOCBQ_LOOKUP_INCREMENT)) {
  306. new_len = psli->iocbq_lookup_len + LPFC_IOCBQ_LOOKUP_INCREMENT;
  307. spin_unlock_irq(&phba->hbalock);
  308. new_arr = kzalloc(new_len * sizeof (struct lpfc_iocbq *),
  309. GFP_KERNEL);
  310. if (new_arr) {
  311. spin_lock_irq(&phba->hbalock);
  312. old_arr = psli->iocbq_lookup;
  313. if (new_len <= psli->iocbq_lookup_len) {
  314. /* highly unprobable case */
  315. kfree(new_arr);
  316. iotag = psli->last_iotag;
  317. if(++iotag < psli->iocbq_lookup_len) {
  318. psli->last_iotag = iotag;
  319. psli->iocbq_lookup[iotag] = iocbq;
  320. spin_unlock_irq(&phba->hbalock);
  321. iocbq->iotag = iotag;
  322. return iotag;
  323. }
  324. spin_unlock_irq(&phba->hbalock);
  325. return 0;
  326. }
  327. if (psli->iocbq_lookup)
  328. memcpy(new_arr, old_arr,
  329. ((psli->last_iotag + 1) *
  330. sizeof (struct lpfc_iocbq *)));
  331. psli->iocbq_lookup = new_arr;
  332. psli->iocbq_lookup_len = new_len;
  333. psli->last_iotag = iotag;
  334. psli->iocbq_lookup[iotag] = iocbq;
  335. spin_unlock_irq(&phba->hbalock);
  336. iocbq->iotag = iotag;
  337. kfree(old_arr);
  338. return iotag;
  339. }
  340. } else
  341. spin_unlock_irq(&phba->hbalock);
  342. lpfc_printf_log(phba, KERN_ERR,LOG_SLI,
  343. "%d:0318 Failed to allocate IOTAG.last IOTAG is %d\n",
  344. phba->brd_no, psli->last_iotag);
  345. return 0;
  346. }
  347. static void
  348. lpfc_sli_submit_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  349. IOCB_t *iocb, struct lpfc_iocbq *nextiocb)
  350. {
  351. /*
  352. * Set up an iotag
  353. */
  354. nextiocb->iocb.ulpIoTag = (nextiocb->iocb_cmpl) ? nextiocb->iotag : 0;
  355. /*
  356. * Issue iocb command to adapter
  357. */
  358. lpfc_sli_pcimem_bcopy(&nextiocb->iocb, iocb, phba->iocb_cmd_size);
  359. wmb();
  360. pring->stats.iocb_cmd++;
  361. /*
  362. * If there is no completion routine to call, we can release the
  363. * IOCB buffer back right now. For IOCBs, like QUE_RING_BUF,
  364. * that have no rsp ring completion, iocb_cmpl MUST be NULL.
  365. */
  366. if (nextiocb->iocb_cmpl)
  367. lpfc_sli_ringtxcmpl_put(phba, pring, nextiocb);
  368. else
  369. __lpfc_sli_release_iocbq(phba, nextiocb);
  370. /*
  371. * Let the HBA know what IOCB slot will be the next one the
  372. * driver will put a command into.
  373. */
  374. pring->cmdidx = pring->next_cmdidx;
  375. writel(pring->cmdidx, &phba->host_gp[pring->ringno].cmdPutInx);
  376. }
  377. static void
  378. lpfc_sli_update_full_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  379. {
  380. int ringno = pring->ringno;
  381. pring->flag |= LPFC_CALL_RING_AVAILABLE;
  382. wmb();
  383. /*
  384. * Set ring 'ringno' to SET R0CE_REQ in Chip Att register.
  385. * The HBA will tell us when an IOCB entry is available.
  386. */
  387. writel((CA_R0ATT|CA_R0CE_REQ) << (ringno*4), phba->CAregaddr);
  388. readl(phba->CAregaddr); /* flush */
  389. pring->stats.iocb_cmd_full++;
  390. }
  391. static void
  392. lpfc_sli_update_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  393. {
  394. int ringno = pring->ringno;
  395. /*
  396. * Tell the HBA that there is work to do in this ring.
  397. */
  398. wmb();
  399. writel(CA_R0ATT << (ringno * 4), phba->CAregaddr);
  400. readl(phba->CAregaddr); /* flush */
  401. }
  402. static void
  403. lpfc_sli_resume_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  404. {
  405. IOCB_t *iocb;
  406. struct lpfc_iocbq *nextiocb;
  407. /*
  408. * Check to see if:
  409. * (a) there is anything on the txq to send
  410. * (b) link is up
  411. * (c) link attention events can be processed (fcp ring only)
  412. * (d) IOCB processing is not blocked by the outstanding mbox command.
  413. */
  414. if (pring->txq_cnt &&
  415. lpfc_is_link_up(phba) &&
  416. (pring->ringno != phba->sli.fcp_ring ||
  417. phba->sli.sli_flag & LPFC_PROCESS_LA) &&
  418. !(pring->flag & LPFC_STOP_IOCB_MBX)) {
  419. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  420. (nextiocb = lpfc_sli_ringtx_get(phba, pring)))
  421. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  422. if (iocb)
  423. lpfc_sli_update_ring(phba, pring);
  424. else
  425. lpfc_sli_update_full_ring(phba, pring);
  426. }
  427. return;
  428. }
  429. /* lpfc_sli_turn_on_ring is only called by lpfc_sli_handle_mb_event below */
  430. static void
  431. lpfc_sli_turn_on_ring(struct lpfc_hba *phba, int ringno)
  432. {
  433. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  434. &phba->slim2p->mbx.us.s3_pgp.port[ringno] :
  435. &phba->slim2p->mbx.us.s2.port[ringno];
  436. unsigned long iflags;
  437. /* If the ring is active, flag it */
  438. spin_lock_irqsave(&phba->hbalock, iflags);
  439. if (phba->sli.ring[ringno].cmdringaddr) {
  440. if (phba->sli.ring[ringno].flag & LPFC_STOP_IOCB_MBX) {
  441. phba->sli.ring[ringno].flag &= ~LPFC_STOP_IOCB_MBX;
  442. /*
  443. * Force update of the local copy of cmdGetInx
  444. */
  445. phba->sli.ring[ringno].local_getidx
  446. = le32_to_cpu(pgp->cmdGetInx);
  447. lpfc_sli_resume_iocb(phba, &phba->sli.ring[ringno]);
  448. }
  449. }
  450. spin_unlock_irqrestore(&phba->hbalock, iflags);
  451. }
  452. struct lpfc_hbq_entry *
  453. lpfc_sli_next_hbq_slot(struct lpfc_hba *phba, uint32_t hbqno)
  454. {
  455. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  456. if (hbqp->next_hbqPutIdx == hbqp->hbqPutIdx &&
  457. ++hbqp->next_hbqPutIdx >= hbqp->entry_count)
  458. hbqp->next_hbqPutIdx = 0;
  459. if (unlikely(hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)) {
  460. uint32_t raw_index = phba->hbq_get[hbqno];
  461. uint32_t getidx = le32_to_cpu(raw_index);
  462. hbqp->local_hbqGetIdx = getidx;
  463. if (unlikely(hbqp->local_hbqGetIdx >= hbqp->entry_count)) {
  464. lpfc_printf_log(phba, KERN_ERR,
  465. LOG_SLI | LOG_VPORT,
  466. "%d:1802 HBQ %d: local_hbqGetIdx "
  467. "%u is > than hbqp->entry_count %u\n",
  468. phba->brd_no, hbqno,
  469. hbqp->local_hbqGetIdx,
  470. hbqp->entry_count);
  471. phba->link_state = LPFC_HBA_ERROR;
  472. return NULL;
  473. }
  474. if (hbqp->local_hbqGetIdx == hbqp->next_hbqPutIdx)
  475. return NULL;
  476. }
  477. return (struct lpfc_hbq_entry *) phba->hbqslimp.virt + hbqp->hbqPutIdx;
  478. }
  479. void
  480. lpfc_sli_hbqbuf_free_all(struct lpfc_hba *phba)
  481. {
  482. struct lpfc_dmabuf *dmabuf, *next_dmabuf;
  483. struct hbq_dmabuf *hbq_buf;
  484. /* Return all memory used by all HBQs */
  485. list_for_each_entry_safe(dmabuf, next_dmabuf,
  486. &phba->hbq_buffer_list, list) {
  487. hbq_buf = container_of(dmabuf, struct hbq_dmabuf, dbuf);
  488. list_del(&hbq_buf->dbuf.list);
  489. lpfc_hbq_free(phba, hbq_buf->dbuf.virt, hbq_buf->dbuf.phys);
  490. kfree(hbq_buf);
  491. }
  492. }
  493. static void
  494. lpfc_sli_hbq_to_firmware(struct lpfc_hba *phba, uint32_t hbqno,
  495. struct hbq_dmabuf *hbq_buf)
  496. {
  497. struct lpfc_hbq_entry *hbqe;
  498. dma_addr_t physaddr = hbq_buf->dbuf.phys;
  499. /* Get next HBQ entry slot to use */
  500. hbqe = lpfc_sli_next_hbq_slot(phba, hbqno);
  501. if (hbqe) {
  502. struct hbq_s *hbqp = &phba->hbqs[hbqno];
  503. hbqe->bde.addrHigh = le32_to_cpu(putPaddrHigh(physaddr));
  504. hbqe->bde.addrLow = le32_to_cpu(putPaddrLow(physaddr));
  505. hbqe->bde.tus.f.bdeSize = FCELSSIZE;
  506. hbqe->bde.tus.f.bdeFlags = 0;
  507. hbqe->bde.tus.w = le32_to_cpu(hbqe->bde.tus.w);
  508. hbqe->buffer_tag = le32_to_cpu(hbq_buf->tag);
  509. /* Sync SLIM */
  510. hbqp->hbqPutIdx = hbqp->next_hbqPutIdx;
  511. writel(hbqp->hbqPutIdx, phba->hbq_put + hbqno);
  512. /* flush */
  513. readl(phba->hbq_put + hbqno);
  514. list_add_tail(&hbq_buf->dbuf.list, &phba->hbq_buffer_list);
  515. }
  516. }
  517. static struct lpfc_hbq_init lpfc_els_hbq = {
  518. .rn = 1,
  519. .entry_count = 200,
  520. .mask_count = 0,
  521. .profile = 0,
  522. .ring_mask = 1 << LPFC_ELS_RING,
  523. .buffer_count = 0,
  524. .init_count = 20,
  525. .add_count = 5,
  526. };
  527. static struct lpfc_hbq_init *lpfc_hbq_defs[] = {
  528. &lpfc_els_hbq,
  529. };
  530. int
  531. lpfc_sli_hbqbuf_fill_hbqs(struct lpfc_hba *phba, uint32_t hbqno, uint32_t count)
  532. {
  533. uint32_t i, start, end;
  534. struct hbq_dmabuf *hbq_buffer;
  535. start = lpfc_hbq_defs[hbqno]->buffer_count;
  536. end = count + lpfc_hbq_defs[hbqno]->buffer_count;
  537. if (end > lpfc_hbq_defs[hbqno]->entry_count) {
  538. end = lpfc_hbq_defs[hbqno]->entry_count;
  539. }
  540. /* Populate HBQ entries */
  541. for (i = start; i < end; i++) {
  542. hbq_buffer = kmalloc(sizeof(struct hbq_dmabuf),
  543. GFP_KERNEL);
  544. if (!hbq_buffer)
  545. return 1;
  546. hbq_buffer->dbuf.virt = lpfc_hbq_alloc(phba, MEM_PRI,
  547. &hbq_buffer->dbuf.phys);
  548. if (hbq_buffer->dbuf.virt == NULL)
  549. return 1;
  550. hbq_buffer->tag = (i | (hbqno << 16));
  551. lpfc_sli_hbq_to_firmware(phba, hbqno, hbq_buffer);
  552. lpfc_hbq_defs[hbqno]->buffer_count++;
  553. }
  554. return 0;
  555. }
  556. int
  557. lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
  558. {
  559. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  560. lpfc_hbq_defs[qno]->add_count));
  561. }
  562. int
  563. lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
  564. {
  565. return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
  566. lpfc_hbq_defs[qno]->init_count));
  567. }
  568. struct hbq_dmabuf *
  569. lpfc_sli_hbqbuf_find(struct lpfc_hba *phba, uint32_t tag)
  570. {
  571. struct lpfc_dmabuf *d_buf;
  572. struct hbq_dmabuf *hbq_buf;
  573. list_for_each_entry(d_buf, &phba->hbq_buffer_list, list) {
  574. hbq_buf = container_of(d_buf, struct hbq_dmabuf, dbuf);
  575. if ((hbq_buf->tag & 0xffff) == tag) {
  576. return hbq_buf;
  577. }
  578. }
  579. lpfc_printf_log(phba, KERN_ERR, LOG_SLI | LOG_VPORT,
  580. "%d:1803 Bad hbq tag. Data: x%x x%x\n",
  581. phba->brd_no, tag,
  582. lpfc_hbq_defs[tag >> 16]->buffer_count);
  583. return NULL;
  584. }
  585. void
  586. lpfc_sli_free_hbq(struct lpfc_hba *phba, struct hbq_dmabuf *sp)
  587. {
  588. uint32_t hbqno;
  589. if (sp) {
  590. hbqno = sp->tag >> 16;
  591. lpfc_sli_hbq_to_firmware(phba, hbqno, sp);
  592. }
  593. }
  594. static int
  595. lpfc_sli_chk_mbx_command(uint8_t mbxCommand)
  596. {
  597. uint8_t ret;
  598. switch (mbxCommand) {
  599. case MBX_LOAD_SM:
  600. case MBX_READ_NV:
  601. case MBX_WRITE_NV:
  602. case MBX_RUN_BIU_DIAG:
  603. case MBX_INIT_LINK:
  604. case MBX_DOWN_LINK:
  605. case MBX_CONFIG_LINK:
  606. case MBX_CONFIG_RING:
  607. case MBX_RESET_RING:
  608. case MBX_READ_CONFIG:
  609. case MBX_READ_RCONFIG:
  610. case MBX_READ_SPARM:
  611. case MBX_READ_STATUS:
  612. case MBX_READ_RPI:
  613. case MBX_READ_XRI:
  614. case MBX_READ_REV:
  615. case MBX_READ_LNK_STAT:
  616. case MBX_REG_LOGIN:
  617. case MBX_UNREG_LOGIN:
  618. case MBX_READ_LA:
  619. case MBX_CLEAR_LA:
  620. case MBX_DUMP_MEMORY:
  621. case MBX_DUMP_CONTEXT:
  622. case MBX_RUN_DIAGS:
  623. case MBX_RESTART:
  624. case MBX_UPDATE_CFG:
  625. case MBX_DOWN_LOAD:
  626. case MBX_DEL_LD_ENTRY:
  627. case MBX_RUN_PROGRAM:
  628. case MBX_SET_MASK:
  629. case MBX_SET_SLIM:
  630. case MBX_UNREG_D_ID:
  631. case MBX_KILL_BOARD:
  632. case MBX_CONFIG_FARP:
  633. case MBX_BEACON:
  634. case MBX_LOAD_AREA:
  635. case MBX_RUN_BIU_DIAG64:
  636. case MBX_CONFIG_PORT:
  637. case MBX_READ_SPARM64:
  638. case MBX_READ_RPI64:
  639. case MBX_REG_LOGIN64:
  640. case MBX_READ_LA64:
  641. case MBX_FLASH_WR_ULA:
  642. case MBX_SET_DEBUG:
  643. case MBX_LOAD_EXP_ROM:
  644. case MBX_REG_VPI:
  645. case MBX_UNREG_VPI:
  646. case MBX_HEARTBEAT:
  647. ret = mbxCommand;
  648. break;
  649. default:
  650. ret = MBX_SHUTDOWN;
  651. break;
  652. }
  653. return ret;
  654. }
  655. static void
  656. lpfc_sli_wake_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq)
  657. {
  658. wait_queue_head_t *pdone_q;
  659. unsigned long drvr_flag;
  660. /*
  661. * If pdone_q is empty, the driver thread gave up waiting and
  662. * continued running.
  663. */
  664. pmboxq->mbox_flag |= LPFC_MBX_WAKE;
  665. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  666. pdone_q = (wait_queue_head_t *) pmboxq->context1;
  667. if (pdone_q)
  668. wake_up_interruptible(pdone_q);
  669. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  670. return;
  671. }
  672. void
  673. lpfc_sli_def_mbox_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
  674. {
  675. struct lpfc_dmabuf *mp;
  676. uint16_t rpi;
  677. int rc;
  678. mp = (struct lpfc_dmabuf *) (pmb->context1);
  679. if (mp) {
  680. lpfc_mbuf_free(phba, mp->virt, mp->phys);
  681. kfree(mp);
  682. }
  683. /*
  684. * If a REG_LOGIN succeeded after node is destroyed or node
  685. * is in re-discovery driver need to cleanup the RPI.
  686. */
  687. if (!(phba->pport->load_flag & FC_UNLOADING) &&
  688. pmb->mb.mbxCommand == MBX_REG_LOGIN64 &&
  689. !pmb->mb.mbxStatus) {
  690. rpi = pmb->mb.un.varWords[0];
  691. lpfc_unreg_login(phba, pmb->mb.un.varRegLogin.vpi, rpi, pmb);
  692. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  693. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  694. if (rc != MBX_NOT_FINISHED)
  695. return;
  696. }
  697. mempool_free(pmb, phba->mbox_mem_pool);
  698. return;
  699. }
  700. int
  701. lpfc_sli_handle_mb_event(struct lpfc_hba *phba)
  702. {
  703. MAILBOX_t *pmbox;
  704. LPFC_MBOXQ_t *pmb;
  705. int rc;
  706. LIST_HEAD(cmplq);
  707. phba->sli.slistat.mbox_event++;
  708. /* Get all completed mailboxe buffers into the cmplq */
  709. spin_lock_irq(&phba->hbalock);
  710. list_splice_init(&phba->sli.mboxq_cmpl, &cmplq);
  711. spin_unlock_irq(&phba->hbalock);
  712. /* Get a Mailbox buffer to setup mailbox commands for callback */
  713. do {
  714. list_remove_head(&cmplq, pmb, LPFC_MBOXQ_t, list);
  715. if (pmb == NULL)
  716. break;
  717. pmbox = &pmb->mb;
  718. if (pmbox->mbxCommand != MBX_HEARTBEAT) {
  719. if (pmb->vport) {
  720. lpfc_debugfs_disc_trc(pmb->vport,
  721. LPFC_DISC_TRC_MBOX_VPORT,
  722. "MBOX cmpl vport: cmd:x%x mb:x%x x%x",
  723. (uint32_t)pmbox->mbxCommand,
  724. pmbox->un.varWords[0],
  725. pmbox->un.varWords[1]);
  726. }
  727. else {
  728. lpfc_debugfs_disc_trc(phba->pport,
  729. LPFC_DISC_TRC_MBOX,
  730. "MBOX cmpl: cmd:x%x mb:x%x x%x",
  731. (uint32_t)pmbox->mbxCommand,
  732. pmbox->un.varWords[0],
  733. pmbox->un.varWords[1]);
  734. }
  735. }
  736. /*
  737. * It is a fatal error if unknown mbox command completion.
  738. */
  739. if (lpfc_sli_chk_mbx_command(pmbox->mbxCommand) ==
  740. MBX_SHUTDOWN) {
  741. /* Unknow mailbox command compl */
  742. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  743. "%d (%d):0323 Unknown Mailbox command "
  744. "%x Cmpl\n",
  745. phba->brd_no,
  746. pmb->vport ? pmb->vport->vpi : 0,
  747. pmbox->mbxCommand);
  748. phba->link_state = LPFC_HBA_ERROR;
  749. phba->work_hs = HS_FFER3;
  750. lpfc_handle_eratt(phba);
  751. continue;
  752. }
  753. if (pmbox->mbxStatus) {
  754. phba->sli.slistat.mbox_stat_err++;
  755. if (pmbox->mbxStatus == MBXERR_NO_RESOURCES) {
  756. /* Mbox cmd cmpl error - RETRYing */
  757. lpfc_printf_log(phba, KERN_INFO,
  758. LOG_MBOX | LOG_SLI,
  759. "%d (%d):0305 Mbox cmd cmpl "
  760. "error - RETRYing Data: x%x "
  761. "x%x x%x x%x\n",
  762. phba->brd_no,
  763. pmb->vport ? pmb->vport->vpi :0,
  764. pmbox->mbxCommand,
  765. pmbox->mbxStatus,
  766. pmbox->un.varWords[0],
  767. pmb->vport->port_state);
  768. pmbox->mbxStatus = 0;
  769. pmbox->mbxOwner = OWN_HOST;
  770. spin_lock_irq(&phba->hbalock);
  771. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  772. spin_unlock_irq(&phba->hbalock);
  773. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  774. if (rc == MBX_SUCCESS)
  775. continue;
  776. }
  777. }
  778. /* Mailbox cmd <cmd> Cmpl <cmpl> */
  779. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  780. "%d (%d):0307 Mailbox cmd x%x Cmpl x%p "
  781. "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x\n",
  782. phba->brd_no,
  783. pmb->vport ? pmb->vport->vpi : 0,
  784. pmbox->mbxCommand,
  785. pmb->mbox_cmpl,
  786. *((uint32_t *) pmbox),
  787. pmbox->un.varWords[0],
  788. pmbox->un.varWords[1],
  789. pmbox->un.varWords[2],
  790. pmbox->un.varWords[3],
  791. pmbox->un.varWords[4],
  792. pmbox->un.varWords[5],
  793. pmbox->un.varWords[6],
  794. pmbox->un.varWords[7]);
  795. if (pmb->mbox_cmpl)
  796. pmb->mbox_cmpl(phba,pmb);
  797. } while (1);
  798. return 0;
  799. }
  800. static struct lpfc_dmabuf *
  801. lpfc_sli_replace_hbqbuff(struct lpfc_hba *phba, uint32_t tag)
  802. {
  803. struct hbq_dmabuf *hbq_entry, *new_hbq_entry;
  804. hbq_entry = lpfc_sli_hbqbuf_find(phba, tag);
  805. if (hbq_entry == NULL)
  806. return NULL;
  807. list_del(&hbq_entry->dbuf.list);
  808. new_hbq_entry = kmalloc(sizeof(struct hbq_dmabuf), GFP_ATOMIC);
  809. if (new_hbq_entry == NULL)
  810. return &hbq_entry->dbuf;
  811. new_hbq_entry->dbuf = hbq_entry->dbuf;
  812. new_hbq_entry->tag = -1;
  813. hbq_entry->dbuf.virt = lpfc_hbq_alloc(phba, 0, &hbq_entry->dbuf.phys);
  814. if (hbq_entry->dbuf.virt == NULL) {
  815. kfree(new_hbq_entry);
  816. return &hbq_entry->dbuf;
  817. }
  818. lpfc_sli_free_hbq(phba, hbq_entry);
  819. return &new_hbq_entry->dbuf;
  820. }
  821. static int
  822. lpfc_sli_process_unsol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  823. struct lpfc_iocbq *saveq)
  824. {
  825. IOCB_t * irsp;
  826. WORD5 * w5p;
  827. uint32_t Rctl, Type;
  828. uint32_t match, i;
  829. match = 0;
  830. irsp = &(saveq->iocb);
  831. if ((irsp->ulpCommand == CMD_RCV_ELS_REQ64_CX)
  832. || (irsp->ulpCommand == CMD_RCV_ELS_REQ_CX)
  833. || (irsp->ulpCommand == CMD_IOCB_RCV_ELS64_CX)
  834. || (irsp->ulpCommand == CMD_IOCB_RCV_CONT64_CX)) {
  835. Rctl = FC_ELS_REQ;
  836. Type = FC_ELS_DATA;
  837. } else {
  838. w5p =
  839. (WORD5 *) & (saveq->iocb.un.
  840. ulpWord[5]);
  841. Rctl = w5p->hcsw.Rctl;
  842. Type = w5p->hcsw.Type;
  843. /* Firmware Workaround */
  844. if ((Rctl == 0) && (pring->ringno == LPFC_ELS_RING) &&
  845. (irsp->ulpCommand == CMD_RCV_SEQUENCE64_CX ||
  846. irsp->ulpCommand == CMD_IOCB_RCV_SEQ64_CX)) {
  847. Rctl = FC_ELS_REQ;
  848. Type = FC_ELS_DATA;
  849. w5p->hcsw.Rctl = Rctl;
  850. w5p->hcsw.Type = Type;
  851. }
  852. }
  853. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  854. if (irsp->ulpBdeCount != 0)
  855. saveq->context2 = lpfc_sli_replace_hbqbuff(phba,
  856. irsp->un.ulpWord[3]);
  857. if (irsp->ulpBdeCount == 2)
  858. saveq->context3 = lpfc_sli_replace_hbqbuff(phba,
  859. irsp->un.ulpWord[15]);
  860. }
  861. /* unSolicited Responses */
  862. if (pring->prt[0].profile) {
  863. if (pring->prt[0].lpfc_sli_rcv_unsol_event)
  864. (pring->prt[0].lpfc_sli_rcv_unsol_event) (phba, pring,
  865. saveq);
  866. match = 1;
  867. } else {
  868. /* We must search, based on rctl / type
  869. for the right routine */
  870. for (i = 0; i < pring->num_mask;
  871. i++) {
  872. if ((pring->prt[i].rctl ==
  873. Rctl)
  874. && (pring->prt[i].
  875. type == Type)) {
  876. if (pring->prt[i].lpfc_sli_rcv_unsol_event)
  877. (pring->prt[i].lpfc_sli_rcv_unsol_event)
  878. (phba, pring, saveq);
  879. match = 1;
  880. break;
  881. }
  882. }
  883. }
  884. if (match == 0) {
  885. /* Unexpected Rctl / Type received */
  886. /* Ring <ringno> handler: unexpected
  887. Rctl <Rctl> Type <Type> received */
  888. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  889. "%d:0313 Ring %d handler: unexpected Rctl x%x "
  890. "Type x%x received\n",
  891. phba->brd_no,
  892. pring->ringno,
  893. Rctl,
  894. Type);
  895. }
  896. return 1;
  897. }
  898. static struct lpfc_iocbq *
  899. lpfc_sli_iocbq_lookup(struct lpfc_hba *phba,
  900. struct lpfc_sli_ring *pring,
  901. struct lpfc_iocbq *prspiocb)
  902. {
  903. struct lpfc_iocbq *cmd_iocb = NULL;
  904. uint16_t iotag;
  905. iotag = prspiocb->iocb.ulpIoTag;
  906. if (iotag != 0 && iotag <= phba->sli.last_iotag) {
  907. cmd_iocb = phba->sli.iocbq_lookup[iotag];
  908. list_del_init(&cmd_iocb->list);
  909. pring->txcmplq_cnt--;
  910. return cmd_iocb;
  911. }
  912. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  913. "%d:0317 iotag x%x is out off "
  914. "range: max iotag x%x wd0 x%x\n",
  915. phba->brd_no, iotag,
  916. phba->sli.last_iotag,
  917. *(((uint32_t *) &prspiocb->iocb) + 7));
  918. return NULL;
  919. }
  920. static int
  921. lpfc_sli_process_sol_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  922. struct lpfc_iocbq *saveq)
  923. {
  924. struct lpfc_iocbq *cmdiocbp;
  925. int rc = 1;
  926. unsigned long iflag;
  927. /* Based on the iotag field, get the cmd IOCB from the txcmplq */
  928. spin_lock_irqsave(&phba->hbalock, iflag);
  929. cmdiocbp = lpfc_sli_iocbq_lookup(phba, pring, saveq);
  930. spin_unlock_irqrestore(&phba->hbalock, iflag);
  931. if (cmdiocbp) {
  932. if (cmdiocbp->iocb_cmpl) {
  933. /*
  934. * Post all ELS completions to the worker thread.
  935. * All other are passed to the completion callback.
  936. */
  937. if (pring->ringno == LPFC_ELS_RING) {
  938. if (cmdiocbp->iocb_flag & LPFC_DRIVER_ABORTED) {
  939. cmdiocbp->iocb_flag &=
  940. ~LPFC_DRIVER_ABORTED;
  941. saveq->iocb.ulpStatus =
  942. IOSTAT_LOCAL_REJECT;
  943. saveq->iocb.un.ulpWord[4] =
  944. IOERR_SLI_ABORTED;
  945. }
  946. }
  947. (cmdiocbp->iocb_cmpl) (phba, cmdiocbp, saveq);
  948. } else
  949. lpfc_sli_release_iocbq(phba, cmdiocbp);
  950. } else {
  951. /*
  952. * Unknown initiating command based on the response iotag.
  953. * This could be the case on the ELS ring because of
  954. * lpfc_els_abort().
  955. */
  956. if (pring->ringno != LPFC_ELS_RING) {
  957. /*
  958. * Ring <ringno> handler: unexpected completion IoTag
  959. * <IoTag>
  960. */
  961. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  962. "%d (%d):0322 Ring %d handler: "
  963. "unexpected completion IoTag x%x "
  964. "Data: x%x x%x x%x x%x\n",
  965. phba->brd_no,
  966. cmdiocbp->vport->vpi,
  967. pring->ringno,
  968. saveq->iocb.ulpIoTag,
  969. saveq->iocb.ulpStatus,
  970. saveq->iocb.un.ulpWord[4],
  971. saveq->iocb.ulpCommand,
  972. saveq->iocb.ulpContext);
  973. }
  974. }
  975. return rc;
  976. }
  977. static void
  978. lpfc_sli_rsp_pointers_error(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  979. {
  980. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  981. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  982. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  983. /*
  984. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  985. * rsp ring <portRspMax>
  986. */
  987. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  988. "%d:0312 Ring %d handler: portRspPut %d "
  989. "is bigger then rsp ring %d\n",
  990. phba->brd_no, pring->ringno,
  991. le32_to_cpu(pgp->rspPutInx),
  992. pring->numRiocb);
  993. phba->link_state = LPFC_HBA_ERROR;
  994. /*
  995. * All error attention handlers are posted to
  996. * worker thread
  997. */
  998. phba->work_ha |= HA_ERATT;
  999. phba->work_hs = HS_FFER3;
  1000. /* hbalock should already be held */
  1001. if (phba->work_wait)
  1002. lpfc_worker_wake_up(phba);
  1003. return;
  1004. }
  1005. void lpfc_sli_poll_fcp_ring(struct lpfc_hba *phba)
  1006. {
  1007. struct lpfc_sli *psli = &phba->sli;
  1008. struct lpfc_sli_ring *pring = &psli->ring[LPFC_FCP_RING];
  1009. IOCB_t *irsp = NULL;
  1010. IOCB_t *entry = NULL;
  1011. struct lpfc_iocbq *cmdiocbq = NULL;
  1012. struct lpfc_iocbq rspiocbq;
  1013. struct lpfc_pgp *pgp;
  1014. uint32_t status;
  1015. uint32_t portRspPut, portRspMax;
  1016. int type;
  1017. uint32_t rsp_cmpl = 0;
  1018. uint32_t ha_copy;
  1019. unsigned long iflags;
  1020. pring->stats.iocb_event++;
  1021. pgp = (phba->sli_rev == 3) ?
  1022. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1023. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1024. /*
  1025. * The next available response entry should never exceed the maximum
  1026. * entries. If it does, treat it as an adapter hardware error.
  1027. */
  1028. portRspMax = pring->numRiocb;
  1029. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1030. if (unlikely(portRspPut >= portRspMax)) {
  1031. lpfc_sli_rsp_pointers_error(phba, pring);
  1032. return;
  1033. }
  1034. rmb();
  1035. while (pring->rspidx != portRspPut) {
  1036. entry = lpfc_resp_iocb(phba, pring);
  1037. if (++pring->rspidx >= portRspMax)
  1038. pring->rspidx = 0;
  1039. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1040. (uint32_t *) &rspiocbq.iocb,
  1041. phba->iocb_rsp_size);
  1042. irsp = &rspiocbq.iocb;
  1043. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1044. pring->stats.iocb_rsp++;
  1045. rsp_cmpl++;
  1046. if (unlikely(irsp->ulpStatus)) {
  1047. /* Rsp ring <ringno> error: IOCB */
  1048. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1049. "%d:0326 Rsp Ring %d error: IOCB Data: "
  1050. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1051. phba->brd_no, pring->ringno,
  1052. irsp->un.ulpWord[0],
  1053. irsp->un.ulpWord[1],
  1054. irsp->un.ulpWord[2],
  1055. irsp->un.ulpWord[3],
  1056. irsp->un.ulpWord[4],
  1057. irsp->un.ulpWord[5],
  1058. *(((uint32_t *) irsp) + 6),
  1059. *(((uint32_t *) irsp) + 7));
  1060. }
  1061. switch (type) {
  1062. case LPFC_ABORT_IOCB:
  1063. case LPFC_SOL_IOCB:
  1064. /*
  1065. * Idle exchange closed via ABTS from port. No iocb
  1066. * resources need to be recovered.
  1067. */
  1068. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1069. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1070. "%d:0314 IOCB cmd 0x%x"
  1071. " processed. Skipping"
  1072. " completion", phba->brd_no,
  1073. irsp->ulpCommand);
  1074. break;
  1075. }
  1076. spin_lock_irqsave(&phba->hbalock, iflags);
  1077. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1078. &rspiocbq);
  1079. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1080. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1081. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1082. &rspiocbq);
  1083. }
  1084. break;
  1085. default:
  1086. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1087. char adaptermsg[LPFC_MAX_ADPTMSG];
  1088. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1089. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1090. MAX_MSG_DATA);
  1091. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  1092. phba->brd_no, adaptermsg);
  1093. } else {
  1094. /* Unknown IOCB command */
  1095. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1096. "%d:0321 Unknown IOCB command "
  1097. "Data: x%x, x%x x%x x%x x%x\n",
  1098. phba->brd_no, type,
  1099. irsp->ulpCommand,
  1100. irsp->ulpStatus,
  1101. irsp->ulpIoTag,
  1102. irsp->ulpContext);
  1103. }
  1104. break;
  1105. }
  1106. /*
  1107. * The response IOCB has been processed. Update the ring
  1108. * pointer in SLIM. If the port response put pointer has not
  1109. * been updated, sync the pgp->rspPutInx and fetch the new port
  1110. * response put pointer.
  1111. */
  1112. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1113. if (pring->rspidx == portRspPut)
  1114. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1115. }
  1116. ha_copy = readl(phba->HAregaddr);
  1117. ha_copy >>= (LPFC_FCP_RING * 4);
  1118. if ((rsp_cmpl > 0) && (ha_copy & HA_R0RE_REQ)) {
  1119. spin_lock_irqsave(&phba->hbalock, iflags);
  1120. pring->stats.iocb_rsp_full++;
  1121. status = ((CA_R0ATT | CA_R0RE_RSP) << (LPFC_FCP_RING * 4));
  1122. writel(status, phba->CAregaddr);
  1123. readl(phba->CAregaddr);
  1124. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1125. }
  1126. if ((ha_copy & HA_R0CE_RSP) &&
  1127. (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1128. spin_lock_irqsave(&phba->hbalock, iflags);
  1129. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1130. pring->stats.iocb_cmd_empty++;
  1131. /* Force update of the local copy of cmdGetInx */
  1132. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1133. lpfc_sli_resume_iocb(phba, pring);
  1134. if ((pring->lpfc_sli_cmd_available))
  1135. (pring->lpfc_sli_cmd_available) (phba, pring);
  1136. spin_unlock_irqrestore(&phba->hbalock, iflags);
  1137. }
  1138. return;
  1139. }
  1140. /*
  1141. * This routine presumes LPFC_FCP_RING handling and doesn't bother
  1142. * to check it explicitly.
  1143. */
  1144. static int
  1145. lpfc_sli_handle_fast_ring_event(struct lpfc_hba *phba,
  1146. struct lpfc_sli_ring *pring, uint32_t mask)
  1147. {
  1148. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1149. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1150. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1151. IOCB_t *irsp = NULL;
  1152. IOCB_t *entry = NULL;
  1153. struct lpfc_iocbq *cmdiocbq = NULL;
  1154. struct lpfc_iocbq rspiocbq;
  1155. uint32_t status;
  1156. uint32_t portRspPut, portRspMax;
  1157. int rc = 1;
  1158. lpfc_iocb_type type;
  1159. unsigned long iflag;
  1160. uint32_t rsp_cmpl = 0;
  1161. spin_lock_irqsave(&phba->hbalock, iflag);
  1162. pring->stats.iocb_event++;
  1163. /*
  1164. * The next available response entry should never exceed the maximum
  1165. * entries. If it does, treat it as an adapter hardware error.
  1166. */
  1167. portRspMax = pring->numRiocb;
  1168. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1169. if (unlikely(portRspPut >= portRspMax)) {
  1170. lpfc_sli_rsp_pointers_error(phba, pring);
  1171. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1172. return 1;
  1173. }
  1174. rmb();
  1175. while (pring->rspidx != portRspPut) {
  1176. /*
  1177. * Fetch an entry off the ring and copy it into a local data
  1178. * structure. The copy involves a byte-swap since the
  1179. * network byte order and pci byte orders are different.
  1180. */
  1181. entry = lpfc_resp_iocb(phba, pring);
  1182. phba->last_completion_time = jiffies;
  1183. if (++pring->rspidx >= portRspMax)
  1184. pring->rspidx = 0;
  1185. lpfc_sli_pcimem_bcopy((uint32_t *) entry,
  1186. (uint32_t *) &rspiocbq.iocb,
  1187. phba->iocb_rsp_size);
  1188. INIT_LIST_HEAD(&(rspiocbq.list));
  1189. irsp = &rspiocbq.iocb;
  1190. type = lpfc_sli_iocb_cmd_type(irsp->ulpCommand & CMD_IOCB_MASK);
  1191. pring->stats.iocb_rsp++;
  1192. rsp_cmpl++;
  1193. if (unlikely(irsp->ulpStatus)) {
  1194. /*
  1195. * If resource errors reported from HBA, reduce
  1196. * queuedepths of the SCSI device.
  1197. */
  1198. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1199. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1200. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1201. lpfc_adjust_queue_depth(phba);
  1202. spin_lock_irqsave(&phba->hbalock, iflag);
  1203. }
  1204. /* Rsp ring <ringno> error: IOCB */
  1205. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1206. "%d:0336 Rsp Ring %d error: IOCB Data: "
  1207. "x%x x%x x%x x%x x%x x%x x%x x%x\n",
  1208. phba->brd_no, pring->ringno,
  1209. irsp->un.ulpWord[0],
  1210. irsp->un.ulpWord[1],
  1211. irsp->un.ulpWord[2],
  1212. irsp->un.ulpWord[3],
  1213. irsp->un.ulpWord[4],
  1214. irsp->un.ulpWord[5],
  1215. *(((uint32_t *) irsp) + 6),
  1216. *(((uint32_t *) irsp) + 7));
  1217. }
  1218. switch (type) {
  1219. case LPFC_ABORT_IOCB:
  1220. case LPFC_SOL_IOCB:
  1221. /*
  1222. * Idle exchange closed via ABTS from port. No iocb
  1223. * resources need to be recovered.
  1224. */
  1225. if (unlikely(irsp->ulpCommand == CMD_XRI_ABORTED_CX)) {
  1226. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1227. "%d:0333 IOCB cmd 0x%x"
  1228. " processed. Skipping"
  1229. " completion\n",
  1230. phba->brd_no,
  1231. irsp->ulpCommand);
  1232. break;
  1233. }
  1234. cmdiocbq = lpfc_sli_iocbq_lookup(phba, pring,
  1235. &rspiocbq);
  1236. if ((cmdiocbq) && (cmdiocbq->iocb_cmpl)) {
  1237. if (phba->cfg_poll & ENABLE_FCP_RING_POLLING) {
  1238. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1239. &rspiocbq);
  1240. } else {
  1241. spin_unlock_irqrestore(&phba->hbalock,
  1242. iflag);
  1243. (cmdiocbq->iocb_cmpl)(phba, cmdiocbq,
  1244. &rspiocbq);
  1245. spin_lock_irqsave(&phba->hbalock,
  1246. iflag);
  1247. }
  1248. }
  1249. break;
  1250. case LPFC_UNSOL_IOCB:
  1251. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1252. lpfc_sli_process_unsol_iocb(phba, pring, &rspiocbq);
  1253. spin_lock_irqsave(&phba->hbalock, iflag);
  1254. break;
  1255. default:
  1256. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1257. char adaptermsg[LPFC_MAX_ADPTMSG];
  1258. memset(adaptermsg, 0, LPFC_MAX_ADPTMSG);
  1259. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1260. MAX_MSG_DATA);
  1261. dev_warn(&((phba->pcidev)->dev), "lpfc%d: %s",
  1262. phba->brd_no, adaptermsg);
  1263. } else {
  1264. /* Unknown IOCB command */
  1265. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1266. "%d:0334 Unknown IOCB command "
  1267. "Data: x%x, x%x x%x x%x x%x\n",
  1268. phba->brd_no, type,
  1269. irsp->ulpCommand,
  1270. irsp->ulpStatus,
  1271. irsp->ulpIoTag,
  1272. irsp->ulpContext);
  1273. }
  1274. break;
  1275. }
  1276. /*
  1277. * The response IOCB has been processed. Update the ring
  1278. * pointer in SLIM. If the port response put pointer has not
  1279. * been updated, sync the pgp->rspPutInx and fetch the new port
  1280. * response put pointer.
  1281. */
  1282. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1283. if (pring->rspidx == portRspPut)
  1284. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1285. }
  1286. if ((rsp_cmpl > 0) && (mask & HA_R0RE_REQ)) {
  1287. pring->stats.iocb_rsp_full++;
  1288. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1289. writel(status, phba->CAregaddr);
  1290. readl(phba->CAregaddr);
  1291. }
  1292. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1293. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1294. pring->stats.iocb_cmd_empty++;
  1295. /* Force update of the local copy of cmdGetInx */
  1296. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1297. lpfc_sli_resume_iocb(phba, pring);
  1298. if ((pring->lpfc_sli_cmd_available))
  1299. (pring->lpfc_sli_cmd_available) (phba, pring);
  1300. }
  1301. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1302. return rc;
  1303. }
  1304. int
  1305. lpfc_sli_handle_slow_ring_event(struct lpfc_hba *phba,
  1306. struct lpfc_sli_ring *pring, uint32_t mask)
  1307. {
  1308. struct lpfc_pgp *pgp = (phba->sli_rev == 3) ?
  1309. &phba->slim2p->mbx.us.s3_pgp.port[pring->ringno] :
  1310. &phba->slim2p->mbx.us.s2.port[pring->ringno];
  1311. IOCB_t *entry;
  1312. IOCB_t *irsp = NULL;
  1313. struct lpfc_iocbq *rspiocbp = NULL;
  1314. struct lpfc_iocbq *next_iocb;
  1315. struct lpfc_iocbq *cmdiocbp;
  1316. struct lpfc_iocbq *saveq;
  1317. uint8_t iocb_cmd_type;
  1318. lpfc_iocb_type type;
  1319. uint32_t status, free_saveq;
  1320. uint32_t portRspPut, portRspMax;
  1321. int rc = 1;
  1322. unsigned long iflag;
  1323. spin_lock_irqsave(&phba->hbalock, iflag);
  1324. pring->stats.iocb_event++;
  1325. /*
  1326. * The next available response entry should never exceed the maximum
  1327. * entries. If it does, treat it as an adapter hardware error.
  1328. */
  1329. portRspMax = pring->numRiocb;
  1330. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1331. if (portRspPut >= portRspMax) {
  1332. /*
  1333. * Ring <ringno> handler: portRspPut <portRspPut> is bigger then
  1334. * rsp ring <portRspMax>
  1335. */
  1336. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1337. "%d:0303 Ring %d handler: portRspPut %d "
  1338. "is bigger then rsp ring %d\n",
  1339. phba->brd_no, pring->ringno, portRspPut,
  1340. portRspMax);
  1341. phba->link_state = LPFC_HBA_ERROR;
  1342. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1343. phba->work_hs = HS_FFER3;
  1344. lpfc_handle_eratt(phba);
  1345. return 1;
  1346. }
  1347. rmb();
  1348. while (pring->rspidx != portRspPut) {
  1349. /*
  1350. * Build a completion list and call the appropriate handler.
  1351. * The process is to get the next available response iocb, get
  1352. * a free iocb from the list, copy the response data into the
  1353. * free iocb, insert to the continuation list, and update the
  1354. * next response index to slim. This process makes response
  1355. * iocb's in the ring available to DMA as fast as possible but
  1356. * pays a penalty for a copy operation. Since the iocb is
  1357. * only 32 bytes, this penalty is considered small relative to
  1358. * the PCI reads for register values and a slim write. When
  1359. * the ulpLe field is set, the entire Command has been
  1360. * received.
  1361. */
  1362. entry = lpfc_resp_iocb(phba, pring);
  1363. phba->last_completion_time = jiffies;
  1364. rspiocbp = __lpfc_sli_get_iocbq(phba);
  1365. if (rspiocbp == NULL) {
  1366. printk(KERN_ERR "%s: out of buffers! Failing "
  1367. "completion.\n", __FUNCTION__);
  1368. break;
  1369. }
  1370. lpfc_sli_pcimem_bcopy(entry, &rspiocbp->iocb,
  1371. phba->iocb_rsp_size);
  1372. irsp = &rspiocbp->iocb;
  1373. if (++pring->rspidx >= portRspMax)
  1374. pring->rspidx = 0;
  1375. writel(pring->rspidx, &phba->host_gp[pring->ringno].rspGetInx);
  1376. if (list_empty(&(pring->iocb_continueq))) {
  1377. list_add(&rspiocbp->list, &(pring->iocb_continueq));
  1378. } else {
  1379. list_add_tail(&rspiocbp->list,
  1380. &(pring->iocb_continueq));
  1381. }
  1382. pring->iocb_continueq_cnt++;
  1383. if (irsp->ulpLe) {
  1384. /*
  1385. * By default, the driver expects to free all resources
  1386. * associated with this iocb completion.
  1387. */
  1388. free_saveq = 1;
  1389. saveq = list_get_first(&pring->iocb_continueq,
  1390. struct lpfc_iocbq, list);
  1391. irsp = &(saveq->iocb);
  1392. list_del_init(&pring->iocb_continueq);
  1393. pring->iocb_continueq_cnt = 0;
  1394. pring->stats.iocb_rsp++;
  1395. /*
  1396. * If resource errors reported from HBA, reduce
  1397. * queuedepths of the SCSI device.
  1398. */
  1399. if ((irsp->ulpStatus == IOSTAT_LOCAL_REJECT) &&
  1400. (irsp->un.ulpWord[4] == IOERR_NO_RESOURCES)) {
  1401. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1402. lpfc_adjust_queue_depth(phba);
  1403. spin_lock_irqsave(&phba->hbalock, iflag);
  1404. }
  1405. if (irsp->ulpStatus) {
  1406. /* Rsp ring <ringno> error: IOCB */
  1407. lpfc_printf_log(phba, KERN_WARNING, LOG_SLI,
  1408. "%d:0328 Rsp Ring %d error: "
  1409. "IOCB Data: "
  1410. "x%x x%x x%x x%x "
  1411. "x%x x%x x%x x%x "
  1412. "x%x x%x x%x x%x "
  1413. "x%x x%x x%x x%x\n",
  1414. phba->brd_no,
  1415. pring->ringno,
  1416. irsp->un.ulpWord[0],
  1417. irsp->un.ulpWord[1],
  1418. irsp->un.ulpWord[2],
  1419. irsp->un.ulpWord[3],
  1420. irsp->un.ulpWord[4],
  1421. irsp->un.ulpWord[5],
  1422. *(((uint32_t *) irsp) + 6),
  1423. *(((uint32_t *) irsp) + 7),
  1424. *(((uint32_t *) irsp) + 8),
  1425. *(((uint32_t *) irsp) + 9),
  1426. *(((uint32_t *) irsp) + 10),
  1427. *(((uint32_t *) irsp) + 11),
  1428. *(((uint32_t *) irsp) + 12),
  1429. *(((uint32_t *) irsp) + 13),
  1430. *(((uint32_t *) irsp) + 14),
  1431. *(((uint32_t *) irsp) + 15));
  1432. }
  1433. /*
  1434. * Fetch the IOCB command type and call the correct
  1435. * completion routine. Solicited and Unsolicited
  1436. * IOCBs on the ELS ring get freed back to the
  1437. * lpfc_iocb_list by the discovery kernel thread.
  1438. */
  1439. iocb_cmd_type = irsp->ulpCommand & CMD_IOCB_MASK;
  1440. type = lpfc_sli_iocb_cmd_type(iocb_cmd_type);
  1441. if (type == LPFC_SOL_IOCB) {
  1442. spin_unlock_irqrestore(&phba->hbalock,
  1443. iflag);
  1444. rc = lpfc_sli_process_sol_iocb(phba, pring,
  1445. saveq);
  1446. spin_lock_irqsave(&phba->hbalock, iflag);
  1447. } else if (type == LPFC_UNSOL_IOCB) {
  1448. spin_unlock_irqrestore(&phba->hbalock,
  1449. iflag);
  1450. rc = lpfc_sli_process_unsol_iocb(phba, pring,
  1451. saveq);
  1452. spin_lock_irqsave(&phba->hbalock, iflag);
  1453. } else if (type == LPFC_ABORT_IOCB) {
  1454. if ((irsp->ulpCommand != CMD_XRI_ABORTED_CX) &&
  1455. ((cmdiocbp =
  1456. lpfc_sli_iocbq_lookup(phba, pring,
  1457. saveq)))) {
  1458. /* Call the specified completion
  1459. routine */
  1460. if (cmdiocbp->iocb_cmpl) {
  1461. spin_unlock_irqrestore(
  1462. &phba->hbalock,
  1463. iflag);
  1464. (cmdiocbp->iocb_cmpl) (phba,
  1465. cmdiocbp, saveq);
  1466. spin_lock_irqsave(
  1467. &phba->hbalock,
  1468. iflag);
  1469. } else
  1470. __lpfc_sli_release_iocbq(phba,
  1471. cmdiocbp);
  1472. }
  1473. } else if (type == LPFC_UNKNOWN_IOCB) {
  1474. if (irsp->ulpCommand == CMD_ADAPTER_MSG) {
  1475. char adaptermsg[LPFC_MAX_ADPTMSG];
  1476. memset(adaptermsg, 0,
  1477. LPFC_MAX_ADPTMSG);
  1478. memcpy(&adaptermsg[0], (uint8_t *) irsp,
  1479. MAX_MSG_DATA);
  1480. dev_warn(&((phba->pcidev)->dev),
  1481. "lpfc%d: %s",
  1482. phba->brd_no, adaptermsg);
  1483. } else {
  1484. /* Unknown IOCB command */
  1485. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  1486. "%d:0335 Unknown IOCB "
  1487. "command Data: x%x "
  1488. "x%x x%x x%x\n",
  1489. phba->brd_no,
  1490. irsp->ulpCommand,
  1491. irsp->ulpStatus,
  1492. irsp->ulpIoTag,
  1493. irsp->ulpContext);
  1494. }
  1495. }
  1496. if (free_saveq) {
  1497. list_for_each_entry_safe(rspiocbp, next_iocb,
  1498. &saveq->list, list) {
  1499. list_del(&rspiocbp->list);
  1500. __lpfc_sli_release_iocbq(phba,
  1501. rspiocbp);
  1502. }
  1503. __lpfc_sli_release_iocbq(phba, saveq);
  1504. }
  1505. rspiocbp = NULL;
  1506. }
  1507. /*
  1508. * If the port response put pointer has not been updated, sync
  1509. * the pgp->rspPutInx in the MAILBOX_tand fetch the new port
  1510. * response put pointer.
  1511. */
  1512. if (pring->rspidx == portRspPut) {
  1513. portRspPut = le32_to_cpu(pgp->rspPutInx);
  1514. }
  1515. } /* while (pring->rspidx != portRspPut) */
  1516. if ((rspiocbp != NULL) && (mask & HA_R0RE_REQ)) {
  1517. /* At least one response entry has been freed */
  1518. pring->stats.iocb_rsp_full++;
  1519. /* SET RxRE_RSP in Chip Att register */
  1520. status = ((CA_R0ATT | CA_R0RE_RSP) << (pring->ringno * 4));
  1521. writel(status, phba->CAregaddr);
  1522. readl(phba->CAregaddr); /* flush */
  1523. }
  1524. if ((mask & HA_R0CE_RSP) && (pring->flag & LPFC_CALL_RING_AVAILABLE)) {
  1525. pring->flag &= ~LPFC_CALL_RING_AVAILABLE;
  1526. pring->stats.iocb_cmd_empty++;
  1527. /* Force update of the local copy of cmdGetInx */
  1528. pring->local_getidx = le32_to_cpu(pgp->cmdGetInx);
  1529. lpfc_sli_resume_iocb(phba, pring);
  1530. if ((pring->lpfc_sli_cmd_available))
  1531. (pring->lpfc_sli_cmd_available) (phba, pring);
  1532. }
  1533. spin_unlock_irqrestore(&phba->hbalock, iflag);
  1534. return rc;
  1535. }
  1536. void
  1537. lpfc_sli_abort_iocb_ring(struct lpfc_hba *phba, struct lpfc_sli_ring *pring)
  1538. {
  1539. LIST_HEAD(completions);
  1540. struct lpfc_iocbq *iocb, *next_iocb;
  1541. IOCB_t *cmd = NULL;
  1542. if (pring->ringno == LPFC_ELS_RING) {
  1543. lpfc_fabric_abort_hba(phba);
  1544. }
  1545. /* Error everything on txq and txcmplq
  1546. * First do the txq.
  1547. */
  1548. spin_lock_irq(&phba->hbalock);
  1549. list_splice_init(&pring->txq, &completions);
  1550. pring->txq_cnt = 0;
  1551. /* Next issue ABTS for everything on the txcmplq */
  1552. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq, list)
  1553. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  1554. spin_unlock_irq(&phba->hbalock);
  1555. while (!list_empty(&completions)) {
  1556. iocb = list_get_first(&completions, struct lpfc_iocbq, list);
  1557. cmd = &iocb->iocb;
  1558. list_del_init(&iocb->list);
  1559. if (!iocb->iocb_cmpl)
  1560. lpfc_sli_release_iocbq(phba, iocb);
  1561. else {
  1562. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  1563. cmd->un.ulpWord[4] = IOERR_SLI_ABORTED;
  1564. (iocb->iocb_cmpl) (phba, iocb, iocb);
  1565. }
  1566. }
  1567. }
  1568. int
  1569. lpfc_sli_brdready(struct lpfc_hba *phba, uint32_t mask)
  1570. {
  1571. uint32_t status;
  1572. int i = 0;
  1573. int retval = 0;
  1574. /* Read the HBA Host Status Register */
  1575. status = readl(phba->HSregaddr);
  1576. /*
  1577. * Check status register every 100ms for 5 retries, then every
  1578. * 500ms for 5, then every 2.5 sec for 5, then reset board and
  1579. * every 2.5 sec for 4.
  1580. * Break our of the loop if errors occurred during init.
  1581. */
  1582. while (((status & mask) != mask) &&
  1583. !(status & HS_FFERM) &&
  1584. i++ < 20) {
  1585. if (i <= 5)
  1586. msleep(10);
  1587. else if (i <= 10)
  1588. msleep(500);
  1589. else
  1590. msleep(2500);
  1591. if (i == 15) {
  1592. /* Do post */
  1593. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1594. lpfc_sli_brdrestart(phba);
  1595. }
  1596. /* Read the HBA Host Status Register */
  1597. status = readl(phba->HSregaddr);
  1598. }
  1599. /* Check to see if any errors occurred during init */
  1600. if ((status & HS_FFERM) || (i >= 20)) {
  1601. phba->link_state = LPFC_HBA_ERROR;
  1602. retval = 1;
  1603. }
  1604. return retval;
  1605. }
  1606. #define BARRIER_TEST_PATTERN (0xdeadbeef)
  1607. void lpfc_reset_barrier(struct lpfc_hba *phba)
  1608. {
  1609. uint32_t __iomem *resp_buf;
  1610. uint32_t __iomem *mbox_buf;
  1611. volatile uint32_t mbox;
  1612. uint32_t hc_copy;
  1613. int i;
  1614. uint8_t hdrtype;
  1615. pci_read_config_byte(phba->pcidev, PCI_HEADER_TYPE, &hdrtype);
  1616. if (hdrtype != 0x80 ||
  1617. (FC_JEDEC_ID(phba->vpd.rev.biuRev) != HELIOS_JEDEC_ID &&
  1618. FC_JEDEC_ID(phba->vpd.rev.biuRev) != THOR_JEDEC_ID))
  1619. return;
  1620. /*
  1621. * Tell the other part of the chip to suspend temporarily all
  1622. * its DMA activity.
  1623. */
  1624. resp_buf = phba->MBslimaddr;
  1625. /* Disable the error attention */
  1626. hc_copy = readl(phba->HCregaddr);
  1627. writel((hc_copy & ~HC_ERINT_ENA), phba->HCregaddr);
  1628. readl(phba->HCregaddr); /* flush */
  1629. phba->link_flag |= LS_IGNORE_ERATT;
  1630. if (readl(phba->HAregaddr) & HA_ERATT) {
  1631. /* Clear Chip error bit */
  1632. writel(HA_ERATT, phba->HAregaddr);
  1633. phba->pport->stopped = 1;
  1634. }
  1635. mbox = 0;
  1636. ((MAILBOX_t *)&mbox)->mbxCommand = MBX_KILL_BOARD;
  1637. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_CHIP;
  1638. writel(BARRIER_TEST_PATTERN, (resp_buf + 1));
  1639. mbox_buf = phba->MBslimaddr;
  1640. writel(mbox, mbox_buf);
  1641. for (i = 0;
  1642. readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN) && i < 50; i++)
  1643. mdelay(1);
  1644. if (readl(resp_buf + 1) != ~(BARRIER_TEST_PATTERN)) {
  1645. if (phba->sli.sli_flag & LPFC_SLI2_ACTIVE ||
  1646. phba->pport->stopped)
  1647. goto restore_hc;
  1648. else
  1649. goto clear_errat;
  1650. }
  1651. ((MAILBOX_t *)&mbox)->mbxOwner = OWN_HOST;
  1652. for (i = 0; readl(resp_buf) != mbox && i < 500; i++)
  1653. mdelay(1);
  1654. clear_errat:
  1655. while (!(readl(phba->HAregaddr) & HA_ERATT) && ++i < 500)
  1656. mdelay(1);
  1657. if (readl(phba->HAregaddr) & HA_ERATT) {
  1658. writel(HA_ERATT, phba->HAregaddr);
  1659. phba->pport->stopped = 1;
  1660. }
  1661. restore_hc:
  1662. phba->link_flag &= ~LS_IGNORE_ERATT;
  1663. writel(hc_copy, phba->HCregaddr);
  1664. readl(phba->HCregaddr); /* flush */
  1665. }
  1666. int
  1667. lpfc_sli_brdkill(struct lpfc_hba *phba)
  1668. {
  1669. struct lpfc_sli *psli;
  1670. LPFC_MBOXQ_t *pmb;
  1671. uint32_t status;
  1672. uint32_t ha_copy;
  1673. int retval;
  1674. int i = 0;
  1675. psli = &phba->sli;
  1676. /* Kill HBA */
  1677. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1678. "%d:0329 Kill HBA Data: x%x x%x\n",
  1679. phba->brd_no, phba->pport->port_state, psli->sli_flag);
  1680. if ((pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool,
  1681. GFP_KERNEL)) == 0)
  1682. return 1;
  1683. /* Disable the error attention */
  1684. spin_lock_irq(&phba->hbalock);
  1685. status = readl(phba->HCregaddr);
  1686. status &= ~HC_ERINT_ENA;
  1687. writel(status, phba->HCregaddr);
  1688. readl(phba->HCregaddr); /* flush */
  1689. phba->link_flag |= LS_IGNORE_ERATT;
  1690. spin_unlock_irq(&phba->hbalock);
  1691. lpfc_kill_board(phba, pmb);
  1692. pmb->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  1693. retval = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  1694. if (retval != MBX_SUCCESS) {
  1695. if (retval != MBX_BUSY)
  1696. mempool_free(pmb, phba->mbox_mem_pool);
  1697. spin_lock_irq(&phba->hbalock);
  1698. phba->link_flag &= ~LS_IGNORE_ERATT;
  1699. spin_unlock_irq(&phba->hbalock);
  1700. return 1;
  1701. }
  1702. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  1703. mempool_free(pmb, phba->mbox_mem_pool);
  1704. /* There is no completion for a KILL_BOARD mbox cmd. Check for an error
  1705. * attention every 100ms for 3 seconds. If we don't get ERATT after
  1706. * 3 seconds we still set HBA_ERROR state because the status of the
  1707. * board is now undefined.
  1708. */
  1709. ha_copy = readl(phba->HAregaddr);
  1710. while ((i++ < 30) && !(ha_copy & HA_ERATT)) {
  1711. mdelay(100);
  1712. ha_copy = readl(phba->HAregaddr);
  1713. }
  1714. del_timer_sync(&psli->mbox_tmo);
  1715. if (ha_copy & HA_ERATT) {
  1716. writel(HA_ERATT, phba->HAregaddr);
  1717. phba->pport->stopped = 1;
  1718. }
  1719. spin_lock_irq(&phba->hbalock);
  1720. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1721. phba->link_flag &= ~LS_IGNORE_ERATT;
  1722. spin_unlock_irq(&phba->hbalock);
  1723. psli->mbox_active = NULL;
  1724. lpfc_hba_down_post(phba);
  1725. phba->link_state = LPFC_HBA_ERROR;
  1726. return ha_copy & HA_ERATT ? 0 : 1;
  1727. }
  1728. int
  1729. lpfc_sli_brdreset(struct lpfc_hba *phba)
  1730. {
  1731. struct lpfc_sli *psli;
  1732. struct lpfc_sli_ring *pring;
  1733. uint16_t cfg_value;
  1734. int i;
  1735. psli = &phba->sli;
  1736. /* Reset HBA */
  1737. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1738. "%d:0325 Reset HBA Data: x%x x%x\n", phba->brd_no,
  1739. phba->pport->port_state, psli->sli_flag);
  1740. /* perform board reset */
  1741. phba->fc_eventTag = 0;
  1742. phba->pport->fc_myDID = 0;
  1743. phba->pport->fc_prevDID = 0;
  1744. /* Turn off parity checking and serr during the physical reset */
  1745. pci_read_config_word(phba->pcidev, PCI_COMMAND, &cfg_value);
  1746. pci_write_config_word(phba->pcidev, PCI_COMMAND,
  1747. (cfg_value &
  1748. ~(PCI_COMMAND_PARITY | PCI_COMMAND_SERR)));
  1749. psli->sli_flag &= ~(LPFC_SLI2_ACTIVE | LPFC_PROCESS_LA);
  1750. /* Now toggle INITFF bit in the Host Control Register */
  1751. writel(HC_INITFF, phba->HCregaddr);
  1752. mdelay(1);
  1753. readl(phba->HCregaddr); /* flush */
  1754. writel(0, phba->HCregaddr);
  1755. readl(phba->HCregaddr); /* flush */
  1756. /* Restore PCI cmd register */
  1757. pci_write_config_word(phba->pcidev, PCI_COMMAND, cfg_value);
  1758. /* Initialize relevant SLI info */
  1759. for (i = 0; i < psli->num_rings; i++) {
  1760. pring = &psli->ring[i];
  1761. pring->flag = 0;
  1762. pring->rspidx = 0;
  1763. pring->next_cmdidx = 0;
  1764. pring->local_getidx = 0;
  1765. pring->cmdidx = 0;
  1766. pring->missbufcnt = 0;
  1767. }
  1768. phba->link_state = LPFC_WARM_START;
  1769. return 0;
  1770. }
  1771. int
  1772. lpfc_sli_brdrestart(struct lpfc_hba *phba)
  1773. {
  1774. MAILBOX_t *mb;
  1775. struct lpfc_sli *psli;
  1776. uint16_t skip_post;
  1777. volatile uint32_t word0;
  1778. void __iomem *to_slim;
  1779. spin_lock_irq(&phba->hbalock);
  1780. psli = &phba->sli;
  1781. /* Restart HBA */
  1782. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  1783. "%d:0337 Restart HBA Data: x%x x%x\n", phba->brd_no,
  1784. phba->pport->port_state, psli->sli_flag);
  1785. word0 = 0;
  1786. mb = (MAILBOX_t *) &word0;
  1787. mb->mbxCommand = MBX_RESTART;
  1788. mb->mbxHc = 1;
  1789. lpfc_reset_barrier(phba);
  1790. to_slim = phba->MBslimaddr;
  1791. writel(*(uint32_t *) mb, to_slim);
  1792. readl(to_slim); /* flush */
  1793. /* Only skip post after fc_ffinit is completed */
  1794. if (phba->pport->port_state) {
  1795. skip_post = 1;
  1796. word0 = 1; /* This is really setting up word1 */
  1797. } else {
  1798. skip_post = 0;
  1799. word0 = 0; /* This is really setting up word1 */
  1800. }
  1801. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  1802. writel(*(uint32_t *) mb, to_slim);
  1803. readl(to_slim); /* flush */
  1804. lpfc_sli_brdreset(phba);
  1805. phba->pport->stopped = 0;
  1806. phba->link_state = LPFC_INIT_START;
  1807. spin_unlock_irq(&phba->hbalock);
  1808. memset(&psli->lnk_stat_offsets, 0, sizeof(psli->lnk_stat_offsets));
  1809. psli->stats_start = get_seconds();
  1810. if (skip_post)
  1811. mdelay(100);
  1812. else
  1813. mdelay(2000);
  1814. lpfc_hba_down_post(phba);
  1815. return 0;
  1816. }
  1817. static int
  1818. lpfc_sli_chipset_init(struct lpfc_hba *phba)
  1819. {
  1820. uint32_t status, i = 0;
  1821. /* Read the HBA Host Status Register */
  1822. status = readl(phba->HSregaddr);
  1823. /* Check status register to see what current state is */
  1824. i = 0;
  1825. while ((status & (HS_FFRDY | HS_MBRDY)) != (HS_FFRDY | HS_MBRDY)) {
  1826. /* Check every 100ms for 5 retries, then every 500ms for 5, then
  1827. * every 2.5 sec for 5, then reset board and every 2.5 sec for
  1828. * 4.
  1829. */
  1830. if (i++ >= 20) {
  1831. /* Adapter failed to init, timeout, status reg
  1832. <status> */
  1833. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1834. "%d:0436 Adapter failed to init, "
  1835. "timeout, status reg x%x\n",
  1836. phba->brd_no, status);
  1837. phba->link_state = LPFC_HBA_ERROR;
  1838. return -ETIMEDOUT;
  1839. }
  1840. /* Check to see if any errors occurred during init */
  1841. if (status & HS_FFERM) {
  1842. /* ERROR: During chipset initialization */
  1843. /* Adapter failed to init, chipset, status reg
  1844. <status> */
  1845. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1846. "%d:0437 Adapter failed to init, "
  1847. "chipset, status reg x%x\n",
  1848. phba->brd_no,
  1849. status);
  1850. phba->link_state = LPFC_HBA_ERROR;
  1851. return -EIO;
  1852. }
  1853. if (i <= 5) {
  1854. msleep(10);
  1855. } else if (i <= 10) {
  1856. msleep(500);
  1857. } else {
  1858. msleep(2500);
  1859. }
  1860. if (i == 15) {
  1861. /* Do post */
  1862. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1863. lpfc_sli_brdrestart(phba);
  1864. }
  1865. /* Read the HBA Host Status Register */
  1866. status = readl(phba->HSregaddr);
  1867. }
  1868. /* Check to see if any errors occurred during init */
  1869. if (status & HS_FFERM) {
  1870. /* ERROR: During chipset initialization */
  1871. /* Adapter failed to init, chipset, status reg <status> */
  1872. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  1873. "%d:0438 Adapter failed to init, chipset, "
  1874. "status reg x%x\n",
  1875. phba->brd_no,
  1876. status);
  1877. phba->link_state = LPFC_HBA_ERROR;
  1878. return -EIO;
  1879. }
  1880. /* Clear all interrupt enable conditions */
  1881. writel(0, phba->HCregaddr);
  1882. readl(phba->HCregaddr); /* flush */
  1883. /* setup host attn register */
  1884. writel(0xffffffff, phba->HAregaddr);
  1885. readl(phba->HAregaddr); /* flush */
  1886. return 0;
  1887. }
  1888. static int
  1889. lpfc_sli_hbq_count(void)
  1890. {
  1891. return ARRAY_SIZE(lpfc_hbq_defs);
  1892. }
  1893. static int
  1894. lpfc_sli_hbq_entry_count(void)
  1895. {
  1896. int hbq_count = lpfc_sli_hbq_count();
  1897. int count = 0;
  1898. int i;
  1899. for (i = 0; i < hbq_count; ++i)
  1900. count += lpfc_hbq_defs[i]->entry_count;
  1901. return count;
  1902. }
  1903. int
  1904. lpfc_sli_hbq_size(void)
  1905. {
  1906. return lpfc_sli_hbq_entry_count() * sizeof(struct lpfc_hbq_entry);
  1907. }
  1908. static int
  1909. lpfc_sli_hbq_setup(struct lpfc_hba *phba)
  1910. {
  1911. int hbq_count = lpfc_sli_hbq_count();
  1912. LPFC_MBOXQ_t *pmb;
  1913. MAILBOX_t *pmbox;
  1914. uint32_t hbqno;
  1915. uint32_t hbq_entry_index;
  1916. /* Get a Mailbox buffer to setup mailbox
  1917. * commands for HBA initialization
  1918. */
  1919. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1920. if (!pmb)
  1921. return -ENOMEM;
  1922. pmbox = &pmb->mb;
  1923. /* Initialize the struct lpfc_sli_hbq structure for each hbq */
  1924. phba->link_state = LPFC_INIT_MBX_CMDS;
  1925. hbq_entry_index = 0;
  1926. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  1927. phba->hbqs[hbqno].next_hbqPutIdx = 0;
  1928. phba->hbqs[hbqno].hbqPutIdx = 0;
  1929. phba->hbqs[hbqno].local_hbqGetIdx = 0;
  1930. phba->hbqs[hbqno].entry_count =
  1931. lpfc_hbq_defs[hbqno]->entry_count;
  1932. lpfc_config_hbq(phba, lpfc_hbq_defs[hbqno], hbq_entry_index,
  1933. pmb);
  1934. hbq_entry_index += phba->hbqs[hbqno].entry_count;
  1935. if (lpfc_sli_issue_mbox(phba, pmb, MBX_POLL) != MBX_SUCCESS) {
  1936. /* Adapter failed to init, mbxCmd <cmd> CFG_RING,
  1937. mbxStatus <status>, ring <num> */
  1938. lpfc_printf_log(phba, KERN_ERR,
  1939. LOG_SLI | LOG_VPORT,
  1940. "%d:1805 Adapter failed to init. "
  1941. "Data: x%x x%x x%x\n",
  1942. phba->brd_no, pmbox->mbxCommand,
  1943. pmbox->mbxStatus, hbqno);
  1944. phba->link_state = LPFC_HBA_ERROR;
  1945. mempool_free(pmb, phba->mbox_mem_pool);
  1946. return ENXIO;
  1947. }
  1948. }
  1949. phba->hbq_count = hbq_count;
  1950. mempool_free(pmb, phba->mbox_mem_pool);
  1951. /* Initially populate or replenish the HBQs */
  1952. for (hbqno = 0; hbqno < hbq_count; ++hbqno) {
  1953. if (lpfc_sli_hbqbuf_init_hbqs(phba, hbqno))
  1954. return -ENOMEM;
  1955. }
  1956. return 0;
  1957. }
  1958. static int
  1959. lpfc_do_config_port(struct lpfc_hba *phba, int sli_mode)
  1960. {
  1961. LPFC_MBOXQ_t *pmb;
  1962. uint32_t resetcount = 0, rc = 0, done = 0;
  1963. pmb = (LPFC_MBOXQ_t *) mempool_alloc(phba->mbox_mem_pool, GFP_KERNEL);
  1964. if (!pmb) {
  1965. phba->link_state = LPFC_HBA_ERROR;
  1966. return -ENOMEM;
  1967. }
  1968. phba->sli_rev = sli_mode;
  1969. while (resetcount < 2 && !done) {
  1970. spin_lock_irq(&phba->hbalock);
  1971. phba->sli.sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  1972. spin_unlock_irq(&phba->hbalock);
  1973. phba->pport->port_state = LPFC_VPORT_UNKNOWN;
  1974. lpfc_sli_brdrestart(phba);
  1975. msleep(2500);
  1976. rc = lpfc_sli_chipset_init(phba);
  1977. if (rc)
  1978. break;
  1979. spin_lock_irq(&phba->hbalock);
  1980. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  1981. spin_unlock_irq(&phba->hbalock);
  1982. resetcount++;
  1983. /* Call pre CONFIG_PORT mailbox command initialization. A
  1984. * value of 0 means the call was successful. Any other
  1985. * nonzero value is a failure, but if ERESTART is returned,
  1986. * the driver may reset the HBA and try again.
  1987. */
  1988. rc = lpfc_config_port_prep(phba);
  1989. if (rc == -ERESTART) {
  1990. phba->link_state = LPFC_LINK_UNKNOWN;
  1991. continue;
  1992. } else if (rc) {
  1993. break;
  1994. }
  1995. phba->link_state = LPFC_INIT_MBX_CMDS;
  1996. lpfc_config_port(phba, pmb);
  1997. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_POLL);
  1998. if (rc != MBX_SUCCESS) {
  1999. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2000. "%d:0442 Adapter failed to init, mbxCmd x%x "
  2001. "CONFIG_PORT, mbxStatus x%x Data: x%x\n",
  2002. phba->brd_no, pmb->mb.mbxCommand,
  2003. pmb->mb.mbxStatus, 0);
  2004. spin_lock_irq(&phba->hbalock);
  2005. phba->sli.sli_flag &= ~LPFC_SLI2_ACTIVE;
  2006. spin_unlock_irq(&phba->hbalock);
  2007. rc = -ENXIO;
  2008. } else {
  2009. done = 1;
  2010. phba->max_vpi = (phba->max_vpi &&
  2011. pmb->mb.un.varCfgPort.gmv) != 0
  2012. ? pmb->mb.un.varCfgPort.max_vpi
  2013. : 0;
  2014. }
  2015. }
  2016. if (!done) {
  2017. rc = -EINVAL;
  2018. goto do_prep_failed;
  2019. }
  2020. if ((pmb->mb.un.varCfgPort.sli_mode == 3) &&
  2021. (!pmb->mb.un.varCfgPort.cMA)) {
  2022. rc = -ENXIO;
  2023. goto do_prep_failed;
  2024. }
  2025. return rc;
  2026. do_prep_failed:
  2027. mempool_free(pmb, phba->mbox_mem_pool);
  2028. return rc;
  2029. }
  2030. int
  2031. lpfc_sli_hba_setup(struct lpfc_hba *phba)
  2032. {
  2033. uint32_t rc;
  2034. int mode = 3;
  2035. switch (lpfc_sli_mode) {
  2036. case 2:
  2037. if (phba->cfg_npiv_enable) {
  2038. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2039. "%d:1824 NPIV enabled: Override lpfc_sli_mode "
  2040. "parameter (%d) to auto (0).\n",
  2041. phba->brd_no, lpfc_sli_mode);
  2042. break;
  2043. }
  2044. mode = 2;
  2045. break;
  2046. case 0:
  2047. case 3:
  2048. break;
  2049. default:
  2050. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2051. "%d:1819 Unrecognized lpfc_sli_mode "
  2052. "parameter: %d.\n",
  2053. phba->brd_no, lpfc_sli_mode);
  2054. break;
  2055. }
  2056. rc = lpfc_do_config_port(phba, mode);
  2057. if (rc && lpfc_sli_mode == 3)
  2058. lpfc_printf_log(phba, KERN_ERR, LOG_INIT | LOG_VPORT,
  2059. "%d:1820 Unable to select SLI-3. "
  2060. "Not supported by adapter.\n",
  2061. phba->brd_no);
  2062. if (rc && mode != 2)
  2063. rc = lpfc_do_config_port(phba, 2);
  2064. if (rc)
  2065. goto lpfc_sli_hba_setup_error;
  2066. if (phba->sli_rev == 3) {
  2067. phba->iocb_cmd_size = SLI3_IOCB_CMD_SIZE;
  2068. phba->iocb_rsp_size = SLI3_IOCB_RSP_SIZE;
  2069. phba->sli3_options |= LPFC_SLI3_ENABLED;
  2070. phba->sli3_options |= LPFC_SLI3_HBQ_ENABLED;
  2071. } else {
  2072. phba->iocb_cmd_size = SLI2_IOCB_CMD_SIZE;
  2073. phba->iocb_rsp_size = SLI2_IOCB_RSP_SIZE;
  2074. phba->sli3_options = 0;
  2075. }
  2076. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2077. "%d:0444 Firmware in SLI %x mode. Max_vpi %d\n",
  2078. phba->brd_no, phba->sli_rev, phba->max_vpi);
  2079. rc = lpfc_sli_ring_map(phba);
  2080. if (rc)
  2081. goto lpfc_sli_hba_setup_error;
  2082. /* Init HBQs */
  2083. if (phba->sli3_options & LPFC_SLI3_HBQ_ENABLED) {
  2084. rc = lpfc_sli_hbq_setup(phba);
  2085. if (rc)
  2086. goto lpfc_sli_hba_setup_error;
  2087. }
  2088. phba->sli.sli_flag |= LPFC_PROCESS_LA;
  2089. rc = lpfc_config_port_post(phba);
  2090. if (rc)
  2091. goto lpfc_sli_hba_setup_error;
  2092. return rc;
  2093. lpfc_sli_hba_setup_error:
  2094. phba->link_state = LPFC_HBA_ERROR;
  2095. lpfc_printf_log(phba, KERN_INFO, LOG_INIT,
  2096. "%d:0445 Firmware initialization failed\n",
  2097. phba->brd_no);
  2098. return rc;
  2099. }
  2100. /*! lpfc_mbox_timeout
  2101. *
  2102. * \pre
  2103. * \post
  2104. * \param hba Pointer to per struct lpfc_hba structure
  2105. * \param l1 Pointer to the driver's mailbox queue.
  2106. * \return
  2107. * void
  2108. *
  2109. * \b Description:
  2110. *
  2111. * This routine handles mailbox timeout events at timer interrupt context.
  2112. */
  2113. void
  2114. lpfc_mbox_timeout(unsigned long ptr)
  2115. {
  2116. struct lpfc_hba *phba = (struct lpfc_hba *) ptr;
  2117. unsigned long iflag;
  2118. uint32_t tmo_posted;
  2119. spin_lock_irqsave(&phba->pport->work_port_lock, iflag);
  2120. tmo_posted = phba->pport->work_port_events & WORKER_MBOX_TMO;
  2121. if (!tmo_posted)
  2122. phba->pport->work_port_events |= WORKER_MBOX_TMO;
  2123. spin_unlock_irqrestore(&phba->pport->work_port_lock, iflag);
  2124. if (!tmo_posted) {
  2125. spin_lock_irqsave(&phba->hbalock, iflag);
  2126. if (phba->work_wait)
  2127. lpfc_worker_wake_up(phba);
  2128. spin_unlock_irqrestore(&phba->hbalock, iflag);
  2129. }
  2130. }
  2131. void
  2132. lpfc_mbox_timeout_handler(struct lpfc_hba *phba)
  2133. {
  2134. LPFC_MBOXQ_t *pmbox = phba->sli.mbox_active;
  2135. MAILBOX_t *mb = &pmbox->mb;
  2136. struct lpfc_sli *psli = &phba->sli;
  2137. struct lpfc_sli_ring *pring;
  2138. if (!(phba->pport->work_port_events & WORKER_MBOX_TMO)) {
  2139. return;
  2140. }
  2141. /* Mbox cmd <mbxCommand> timeout */
  2142. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2143. "%d:0310 Mailbox command x%x timeout Data: x%x x%x "
  2144. "x%p\n",
  2145. phba->brd_no,
  2146. mb->mbxCommand,
  2147. phba->pport->port_state,
  2148. phba->sli.sli_flag,
  2149. phba->sli.mbox_active);
  2150. /* Setting state unknown so lpfc_sli_abort_iocb_ring
  2151. * would get IOCB_ERROR from lpfc_sli_issue_iocb, allowing
  2152. * it to fail all oustanding SCSI IO.
  2153. */
  2154. spin_lock_irq(&phba->pport->work_port_lock);
  2155. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2156. spin_unlock_irq(&phba->pport->work_port_lock);
  2157. spin_lock_irq(&phba->hbalock);
  2158. phba->link_state = LPFC_LINK_UNKNOWN;
  2159. phba->pport->fc_flag |= FC_ESTABLISH_LINK;
  2160. psli->sli_flag &= ~LPFC_SLI2_ACTIVE;
  2161. spin_unlock_irq(&phba->hbalock);
  2162. pring = &psli->ring[psli->fcp_ring];
  2163. lpfc_sli_abort_iocb_ring(phba, pring);
  2164. lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI,
  2165. "%d:0316 Resetting board due to mailbox timeout\n",
  2166. phba->brd_no);
  2167. /*
  2168. * lpfc_offline calls lpfc_sli_hba_down which will clean up
  2169. * on oustanding mailbox commands.
  2170. */
  2171. lpfc_offline_prep(phba);
  2172. lpfc_offline(phba);
  2173. lpfc_sli_brdrestart(phba);
  2174. if (lpfc_online(phba) == 0) /* Initialize the HBA */
  2175. mod_timer(&phba->fc_estabtmo, jiffies + HZ * 60);
  2176. lpfc_unblock_mgmt_io(phba);
  2177. return;
  2178. }
  2179. int
  2180. lpfc_sli_issue_mbox(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmbox, uint32_t flag)
  2181. {
  2182. MAILBOX_t *mb;
  2183. struct lpfc_sli *psli = &phba->sli;
  2184. uint32_t status, evtctr;
  2185. uint32_t ha_copy;
  2186. int i;
  2187. unsigned long drvr_flag = 0;
  2188. volatile uint32_t word0, ldata;
  2189. void __iomem *to_slim;
  2190. if (pmbox->mbox_cmpl && pmbox->mbox_cmpl != lpfc_sli_def_mbox_cmpl &&
  2191. pmbox->mbox_cmpl != lpfc_sli_wake_mbox_wait) {
  2192. if(!pmbox->vport) {
  2193. lpfc_printf_log(phba, KERN_ERR,
  2194. LOG_MBOX | LOG_VPORT,
  2195. "%d:1806 Mbox x%x failed. No vport\n",
  2196. phba->brd_no,
  2197. pmbox->mb.mbxCommand);
  2198. dump_stack();
  2199. return MBXERR_ERROR;
  2200. }
  2201. }
  2202. /* If the PCI channel is in offline state, do not post mbox. */
  2203. if (unlikely(pci_channel_offline(phba->pcidev)))
  2204. return MBX_NOT_FINISHED;
  2205. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2206. psli = &phba->sli;
  2207. mb = &pmbox->mb;
  2208. status = MBX_SUCCESS;
  2209. if (phba->link_state == LPFC_HBA_ERROR) {
  2210. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2211. /* Mbox command <mbxCommand> cannot issue */
  2212. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
  2213. return MBX_NOT_FINISHED;
  2214. }
  2215. if (mb->mbxCommand != MBX_KILL_BOARD && flag & MBX_NOWAIT &&
  2216. !(readl(phba->HCregaddr) & HC_MBINT_ENA)) {
  2217. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2218. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag)
  2219. return MBX_NOT_FINISHED;
  2220. }
  2221. if (psli->sli_flag & LPFC_SLI_MBOX_ACTIVE) {
  2222. /* Polling for a mbox command when another one is already active
  2223. * is not allowed in SLI. Also, the driver must have established
  2224. * SLI2 mode to queue and process multiple mbox commands.
  2225. */
  2226. if (flag & MBX_POLL) {
  2227. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2228. /* Mbox command <mbxCommand> cannot issue */
  2229. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2230. return MBX_NOT_FINISHED;
  2231. }
  2232. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE)) {
  2233. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2234. /* Mbox command <mbxCommand> cannot issue */
  2235. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2236. return MBX_NOT_FINISHED;
  2237. }
  2238. /* Handle STOP IOCB processing flag. This is only meaningful
  2239. * if we are not polling for mbox completion.
  2240. */
  2241. if (flag & MBX_STOP_IOCB) {
  2242. flag &= ~MBX_STOP_IOCB;
  2243. /* Now flag each ring */
  2244. for (i = 0; i < psli->num_rings; i++) {
  2245. /* If the ring is active, flag it */
  2246. if (psli->ring[i].cmdringaddr) {
  2247. psli->ring[i].flag |=
  2248. LPFC_STOP_IOCB_MBX;
  2249. }
  2250. }
  2251. }
  2252. /* Another mailbox command is still being processed, queue this
  2253. * command to be processed later.
  2254. */
  2255. lpfc_mbox_put(phba, pmbox);
  2256. /* Mbox cmd issue - BUSY */
  2257. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2258. "%d (%d):0308 Mbox cmd issue - BUSY Data: "
  2259. "x%x x%x x%x x%x\n",
  2260. phba->brd_no,
  2261. pmbox->vport ? pmbox->vport->vpi : 0xffffff,
  2262. mb->mbxCommand, phba->pport->port_state,
  2263. psli->sli_flag, flag);
  2264. psli->slistat.mbox_busy++;
  2265. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2266. if (pmbox->vport) {
  2267. lpfc_debugfs_disc_trc(pmbox->vport,
  2268. LPFC_DISC_TRC_MBOX_VPORT,
  2269. "MBOX Bsy vport: cmd:x%x mb:x%x x%x",
  2270. (uint32_t)mb->mbxCommand,
  2271. mb->un.varWords[0], mb->un.varWords[1]);
  2272. }
  2273. else {
  2274. lpfc_debugfs_disc_trc(phba->pport,
  2275. LPFC_DISC_TRC_MBOX,
  2276. "MBOX Bsy: cmd:x%x mb:x%x x%x",
  2277. (uint32_t)mb->mbxCommand,
  2278. mb->un.varWords[0], mb->un.varWords[1]);
  2279. }
  2280. return MBX_BUSY;
  2281. }
  2282. /* Handle STOP IOCB processing flag. This is only meaningful
  2283. * if we are not polling for mbox completion.
  2284. */
  2285. if (flag & MBX_STOP_IOCB) {
  2286. flag &= ~MBX_STOP_IOCB;
  2287. if (flag == MBX_NOWAIT) {
  2288. /* Now flag each ring */
  2289. for (i = 0; i < psli->num_rings; i++) {
  2290. /* If the ring is active, flag it */
  2291. if (psli->ring[i].cmdringaddr) {
  2292. psli->ring[i].flag |=
  2293. LPFC_STOP_IOCB_MBX;
  2294. }
  2295. }
  2296. }
  2297. }
  2298. psli->sli_flag |= LPFC_SLI_MBOX_ACTIVE;
  2299. /* If we are not polling, we MUST be in SLI2 mode */
  2300. if (flag != MBX_POLL) {
  2301. if (!(psli->sli_flag & LPFC_SLI2_ACTIVE) &&
  2302. (mb->mbxCommand != MBX_KILL_BOARD)) {
  2303. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2304. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2305. /* Mbox command <mbxCommand> cannot issue */
  2306. LOG_MBOX_CANNOT_ISSUE_DATA(phba, pmbox, psli, flag);
  2307. return MBX_NOT_FINISHED;
  2308. }
  2309. /* timeout active mbox command */
  2310. mod_timer(&psli->mbox_tmo, (jiffies +
  2311. (HZ * lpfc_mbox_tmo_val(phba, mb->mbxCommand))));
  2312. }
  2313. /* Mailbox cmd <cmd> issue */
  2314. lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI,
  2315. "%d (%d):0309 Mailbox cmd x%x issue Data: x%x x%x "
  2316. "x%x\n",
  2317. phba->brd_no, pmbox->vport ? pmbox->vport->vpi : 0,
  2318. mb->mbxCommand, phba->pport->port_state,
  2319. psli->sli_flag, flag);
  2320. if (mb->mbxCommand != MBX_HEARTBEAT) {
  2321. if (pmbox->vport) {
  2322. lpfc_debugfs_disc_trc(pmbox->vport,
  2323. LPFC_DISC_TRC_MBOX_VPORT,
  2324. "MBOX Send vport: cmd:x%x mb:x%x x%x",
  2325. (uint32_t)mb->mbxCommand,
  2326. mb->un.varWords[0], mb->un.varWords[1]);
  2327. }
  2328. else {
  2329. lpfc_debugfs_disc_trc(phba->pport,
  2330. LPFC_DISC_TRC_MBOX,
  2331. "MBOX Send: cmd:x%x mb:x%x x%x",
  2332. (uint32_t)mb->mbxCommand,
  2333. mb->un.varWords[0], mb->un.varWords[1]);
  2334. }
  2335. }
  2336. psli->slistat.mbox_cmd++;
  2337. evtctr = psli->slistat.mbox_event;
  2338. /* next set own bit for the adapter and copy over command word */
  2339. mb->mbxOwner = OWN_CHIP;
  2340. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2341. /* First copy command data to host SLIM area */
  2342. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx, MAILBOX_CMD_SIZE);
  2343. } else {
  2344. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2345. /* copy command data into host mbox for cmpl */
  2346. lpfc_sli_pcimem_bcopy(mb, &phba->slim2p->mbx,
  2347. MAILBOX_CMD_SIZE);
  2348. }
  2349. /* First copy mbox command data to HBA SLIM, skip past first
  2350. word */
  2351. to_slim = phba->MBslimaddr + sizeof (uint32_t);
  2352. lpfc_memcpy_to_slim(to_slim, &mb->un.varWords[0],
  2353. MAILBOX_CMD_SIZE - sizeof (uint32_t));
  2354. /* Next copy over first word, with mbxOwner set */
  2355. ldata = *((volatile uint32_t *)mb);
  2356. to_slim = phba->MBslimaddr;
  2357. writel(ldata, to_slim);
  2358. readl(to_slim); /* flush */
  2359. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2360. /* switch over to host mailbox */
  2361. psli->sli_flag |= LPFC_SLI2_ACTIVE;
  2362. }
  2363. }
  2364. wmb();
  2365. /* interrupt board to doit right away */
  2366. writel(CA_MBATT, phba->CAregaddr);
  2367. readl(phba->CAregaddr); /* flush */
  2368. switch (flag) {
  2369. case MBX_NOWAIT:
  2370. /* Don't wait for it to finish, just return */
  2371. psli->mbox_active = pmbox;
  2372. break;
  2373. case MBX_POLL:
  2374. psli->mbox_active = NULL;
  2375. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2376. /* First read mbox status word */
  2377. word0 = *((volatile uint32_t *)&phba->slim2p->mbx);
  2378. word0 = le32_to_cpu(word0);
  2379. } else {
  2380. /* First read mbox status word */
  2381. word0 = readl(phba->MBslimaddr);
  2382. }
  2383. /* Read the HBA Host Attention Register */
  2384. ha_copy = readl(phba->HAregaddr);
  2385. i = lpfc_mbox_tmo_val(phba, mb->mbxCommand);
  2386. i *= 1000; /* Convert to ms */
  2387. /* Wait for command to complete */
  2388. while (((word0 & OWN_CHIP) == OWN_CHIP) ||
  2389. (!(ha_copy & HA_MBATT) &&
  2390. (phba->link_state > LPFC_WARM_START))) {
  2391. if (i-- <= 0) {
  2392. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2393. spin_unlock_irqrestore(&phba->hbalock,
  2394. drvr_flag);
  2395. return MBX_NOT_FINISHED;
  2396. }
  2397. /* Check if we took a mbox interrupt while we were
  2398. polling */
  2399. if (((word0 & OWN_CHIP) != OWN_CHIP)
  2400. && (evtctr != psli->slistat.mbox_event))
  2401. break;
  2402. spin_unlock_irqrestore(&phba->hbalock,
  2403. drvr_flag);
  2404. msleep(1);
  2405. spin_lock_irqsave(&phba->hbalock, drvr_flag);
  2406. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2407. /* First copy command data */
  2408. word0 = *((volatile uint32_t *)
  2409. &phba->slim2p->mbx);
  2410. word0 = le32_to_cpu(word0);
  2411. if (mb->mbxCommand == MBX_CONFIG_PORT) {
  2412. MAILBOX_t *slimmb;
  2413. volatile uint32_t slimword0;
  2414. /* Check real SLIM for any errors */
  2415. slimword0 = readl(phba->MBslimaddr);
  2416. slimmb = (MAILBOX_t *) & slimword0;
  2417. if (((slimword0 & OWN_CHIP) != OWN_CHIP)
  2418. && slimmb->mbxStatus) {
  2419. psli->sli_flag &=
  2420. ~LPFC_SLI2_ACTIVE;
  2421. word0 = slimword0;
  2422. }
  2423. }
  2424. } else {
  2425. /* First copy command data */
  2426. word0 = readl(phba->MBslimaddr);
  2427. }
  2428. /* Read the HBA Host Attention Register */
  2429. ha_copy = readl(phba->HAregaddr);
  2430. }
  2431. if (psli->sli_flag & LPFC_SLI2_ACTIVE) {
  2432. /* copy results back to user */
  2433. lpfc_sli_pcimem_bcopy(&phba->slim2p->mbx, mb,
  2434. MAILBOX_CMD_SIZE);
  2435. } else {
  2436. /* First copy command data */
  2437. lpfc_memcpy_from_slim(mb, phba->MBslimaddr,
  2438. MAILBOX_CMD_SIZE);
  2439. if ((mb->mbxCommand == MBX_DUMP_MEMORY) &&
  2440. pmbox->context2) {
  2441. lpfc_memcpy_from_slim((void *)pmbox->context2,
  2442. phba->MBslimaddr + DMP_RSP_OFFSET,
  2443. mb->un.varDmp.word_cnt);
  2444. }
  2445. }
  2446. writel(HA_MBATT, phba->HAregaddr);
  2447. readl(phba->HAregaddr); /* flush */
  2448. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2449. status = mb->mbxStatus;
  2450. }
  2451. spin_unlock_irqrestore(&phba->hbalock, drvr_flag);
  2452. return status;
  2453. }
  2454. /*
  2455. * Caller needs to hold lock.
  2456. */
  2457. static void
  2458. __lpfc_sli_ringtx_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2459. struct lpfc_iocbq *piocb)
  2460. {
  2461. /* Insert the caller's iocb in the txq tail for later processing. */
  2462. list_add_tail(&piocb->list, &pring->txq);
  2463. pring->txq_cnt++;
  2464. }
  2465. static struct lpfc_iocbq *
  2466. lpfc_sli_next_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2467. struct lpfc_iocbq **piocb)
  2468. {
  2469. struct lpfc_iocbq * nextiocb;
  2470. nextiocb = lpfc_sli_ringtx_get(phba, pring);
  2471. if (!nextiocb) {
  2472. nextiocb = *piocb;
  2473. *piocb = NULL;
  2474. }
  2475. return nextiocb;
  2476. }
  2477. /*
  2478. * Lockless version of lpfc_sli_issue_iocb.
  2479. */
  2480. int
  2481. __lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2482. struct lpfc_iocbq *piocb, uint32_t flag)
  2483. {
  2484. struct lpfc_iocbq *nextiocb;
  2485. IOCB_t *iocb;
  2486. if (piocb->iocb_cmpl && (!piocb->vport) &&
  2487. (piocb->iocb.ulpCommand != CMD_ABORT_XRI_CN) &&
  2488. (piocb->iocb.ulpCommand != CMD_CLOSE_XRI_CN)) {
  2489. lpfc_printf_log(phba, KERN_ERR,
  2490. LOG_SLI | LOG_VPORT,
  2491. "%d:1807 IOCB x%x failed. No vport\n",
  2492. phba->brd_no,
  2493. piocb->iocb.ulpCommand);
  2494. dump_stack();
  2495. return IOCB_ERROR;
  2496. }
  2497. /* If the PCI channel is in offline state, do not post iocbs. */
  2498. if (unlikely(pci_channel_offline(phba->pcidev)))
  2499. return IOCB_ERROR;
  2500. /*
  2501. * We should never get an IOCB if we are in a < LINK_DOWN state
  2502. */
  2503. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  2504. return IOCB_ERROR;
  2505. /*
  2506. * Check to see if we are blocking IOCB processing because of a
  2507. * outstanding mbox command.
  2508. */
  2509. if (unlikely(pring->flag & LPFC_STOP_IOCB_MBX))
  2510. goto iocb_busy;
  2511. if (unlikely(phba->link_state == LPFC_LINK_DOWN)) {
  2512. /*
  2513. * Only CREATE_XRI, CLOSE_XRI, and QUE_RING_BUF
  2514. * can be issued if the link is not up.
  2515. */
  2516. switch (piocb->iocb.ulpCommand) {
  2517. case CMD_QUE_RING_BUF_CN:
  2518. case CMD_QUE_RING_BUF64_CN:
  2519. /*
  2520. * For IOCBs, like QUE_RING_BUF, that have no rsp ring
  2521. * completion, iocb_cmpl MUST be 0.
  2522. */
  2523. if (piocb->iocb_cmpl)
  2524. piocb->iocb_cmpl = NULL;
  2525. /*FALLTHROUGH*/
  2526. case CMD_CREATE_XRI_CR:
  2527. case CMD_CLOSE_XRI_CN:
  2528. case CMD_CLOSE_XRI_CX:
  2529. break;
  2530. default:
  2531. goto iocb_busy;
  2532. }
  2533. /*
  2534. * For FCP commands, we must be in a state where we can process link
  2535. * attention events.
  2536. */
  2537. } else if (unlikely(pring->ringno == phba->sli.fcp_ring &&
  2538. !(phba->sli.sli_flag & LPFC_PROCESS_LA))) {
  2539. goto iocb_busy;
  2540. }
  2541. while ((iocb = lpfc_sli_next_iocb_slot(phba, pring)) &&
  2542. (nextiocb = lpfc_sli_next_iocb(phba, pring, &piocb)))
  2543. lpfc_sli_submit_iocb(phba, pring, iocb, nextiocb);
  2544. if (iocb)
  2545. lpfc_sli_update_ring(phba, pring);
  2546. else
  2547. lpfc_sli_update_full_ring(phba, pring);
  2548. if (!piocb)
  2549. return IOCB_SUCCESS;
  2550. goto out_busy;
  2551. iocb_busy:
  2552. pring->stats.iocb_cmd_delay++;
  2553. out_busy:
  2554. if (!(flag & SLI_IOCB_RET_IOCB)) {
  2555. __lpfc_sli_ringtx_put(phba, pring, piocb);
  2556. return IOCB_SUCCESS;
  2557. }
  2558. return IOCB_BUSY;
  2559. }
  2560. int
  2561. lpfc_sli_issue_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2562. struct lpfc_iocbq *piocb, uint32_t flag)
  2563. {
  2564. unsigned long iflags;
  2565. int rc;
  2566. spin_lock_irqsave(&phba->hbalock, iflags);
  2567. rc = __lpfc_sli_issue_iocb(phba, pring, piocb, flag);
  2568. spin_unlock_irqrestore(&phba->hbalock, iflags);
  2569. return rc;
  2570. }
  2571. static int
  2572. lpfc_extra_ring_setup( struct lpfc_hba *phba)
  2573. {
  2574. struct lpfc_sli *psli;
  2575. struct lpfc_sli_ring *pring;
  2576. psli = &phba->sli;
  2577. /* Adjust cmd/rsp ring iocb entries more evenly */
  2578. /* Take some away from the FCP ring */
  2579. pring = &psli->ring[psli->fcp_ring];
  2580. pring->numCiocb -= SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2581. pring->numRiocb -= SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2582. pring->numCiocb -= SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2583. pring->numRiocb -= SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2584. /* and give them to the extra ring */
  2585. pring = &psli->ring[psli->extra_ring];
  2586. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2587. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2588. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2589. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2590. /* Setup default profile for this ring */
  2591. pring->iotag_max = 4096;
  2592. pring->num_mask = 1;
  2593. pring->prt[0].profile = 0; /* Mask 0 */
  2594. pring->prt[0].rctl = phba->cfg_multi_ring_rctl;
  2595. pring->prt[0].type = phba->cfg_multi_ring_type;
  2596. pring->prt[0].lpfc_sli_rcv_unsol_event = NULL;
  2597. return 0;
  2598. }
  2599. int
  2600. lpfc_sli_setup(struct lpfc_hba *phba)
  2601. {
  2602. int i, totiocbsize = 0;
  2603. struct lpfc_sli *psli = &phba->sli;
  2604. struct lpfc_sli_ring *pring;
  2605. psli->num_rings = MAX_CONFIGURED_RINGS;
  2606. psli->sli_flag = 0;
  2607. psli->fcp_ring = LPFC_FCP_RING;
  2608. psli->next_ring = LPFC_FCP_NEXT_RING;
  2609. psli->extra_ring = LPFC_EXTRA_RING;
  2610. psli->iocbq_lookup = NULL;
  2611. psli->iocbq_lookup_len = 0;
  2612. psli->last_iotag = 0;
  2613. for (i = 0; i < psli->num_rings; i++) {
  2614. pring = &psli->ring[i];
  2615. switch (i) {
  2616. case LPFC_FCP_RING: /* ring 0 - FCP */
  2617. /* numCiocb and numRiocb are used in config_port */
  2618. pring->numCiocb = SLI2_IOCB_CMD_R0_ENTRIES;
  2619. pring->numRiocb = SLI2_IOCB_RSP_R0_ENTRIES;
  2620. pring->numCiocb += SLI2_IOCB_CMD_R1XTRA_ENTRIES;
  2621. pring->numRiocb += SLI2_IOCB_RSP_R1XTRA_ENTRIES;
  2622. pring->numCiocb += SLI2_IOCB_CMD_R3XTRA_ENTRIES;
  2623. pring->numRiocb += SLI2_IOCB_RSP_R3XTRA_ENTRIES;
  2624. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2625. SLI3_IOCB_CMD_SIZE :
  2626. SLI2_IOCB_CMD_SIZE;
  2627. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2628. SLI3_IOCB_RSP_SIZE :
  2629. SLI2_IOCB_RSP_SIZE;
  2630. pring->iotag_ctr = 0;
  2631. pring->iotag_max =
  2632. (phba->cfg_hba_queue_depth * 2);
  2633. pring->fast_iotag = pring->iotag_max;
  2634. pring->num_mask = 0;
  2635. break;
  2636. case LPFC_EXTRA_RING: /* ring 1 - EXTRA */
  2637. /* numCiocb and numRiocb are used in config_port */
  2638. pring->numCiocb = SLI2_IOCB_CMD_R1_ENTRIES;
  2639. pring->numRiocb = SLI2_IOCB_RSP_R1_ENTRIES;
  2640. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2641. SLI3_IOCB_CMD_SIZE :
  2642. SLI2_IOCB_CMD_SIZE;
  2643. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2644. SLI3_IOCB_RSP_SIZE :
  2645. SLI2_IOCB_RSP_SIZE;
  2646. pring->iotag_max = phba->cfg_hba_queue_depth;
  2647. pring->num_mask = 0;
  2648. break;
  2649. case LPFC_ELS_RING: /* ring 2 - ELS / CT */
  2650. /* numCiocb and numRiocb are used in config_port */
  2651. pring->numCiocb = SLI2_IOCB_CMD_R2_ENTRIES;
  2652. pring->numRiocb = SLI2_IOCB_RSP_R2_ENTRIES;
  2653. pring->sizeCiocb = (phba->sli_rev == 3) ?
  2654. SLI3_IOCB_CMD_SIZE :
  2655. SLI2_IOCB_CMD_SIZE;
  2656. pring->sizeRiocb = (phba->sli_rev == 3) ?
  2657. SLI3_IOCB_RSP_SIZE :
  2658. SLI2_IOCB_RSP_SIZE;
  2659. pring->fast_iotag = 0;
  2660. pring->iotag_ctr = 0;
  2661. pring->iotag_max = 4096;
  2662. pring->num_mask = 4;
  2663. pring->prt[0].profile = 0; /* Mask 0 */
  2664. pring->prt[0].rctl = FC_ELS_REQ;
  2665. pring->prt[0].type = FC_ELS_DATA;
  2666. pring->prt[0].lpfc_sli_rcv_unsol_event =
  2667. lpfc_els_unsol_event;
  2668. pring->prt[1].profile = 0; /* Mask 1 */
  2669. pring->prt[1].rctl = FC_ELS_RSP;
  2670. pring->prt[1].type = FC_ELS_DATA;
  2671. pring->prt[1].lpfc_sli_rcv_unsol_event =
  2672. lpfc_els_unsol_event;
  2673. pring->prt[2].profile = 0; /* Mask 2 */
  2674. /* NameServer Inquiry */
  2675. pring->prt[2].rctl = FC_UNSOL_CTL;
  2676. /* NameServer */
  2677. pring->prt[2].type = FC_COMMON_TRANSPORT_ULP;
  2678. pring->prt[2].lpfc_sli_rcv_unsol_event =
  2679. lpfc_ct_unsol_event;
  2680. pring->prt[3].profile = 0; /* Mask 3 */
  2681. /* NameServer response */
  2682. pring->prt[3].rctl = FC_SOL_CTL;
  2683. /* NameServer */
  2684. pring->prt[3].type = FC_COMMON_TRANSPORT_ULP;
  2685. pring->prt[3].lpfc_sli_rcv_unsol_event =
  2686. lpfc_ct_unsol_event;
  2687. break;
  2688. }
  2689. totiocbsize += (pring->numCiocb * pring->sizeCiocb) +
  2690. (pring->numRiocb * pring->sizeRiocb);
  2691. }
  2692. if (totiocbsize > MAX_SLIM_IOCB_SIZE) {
  2693. /* Too many cmd / rsp ring entries in SLI2 SLIM */
  2694. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2695. "%d:0462 Too many cmd / rsp ring entries in "
  2696. "SLI2 SLIM Data: x%x x%lx\n",
  2697. phba->brd_no, totiocbsize,
  2698. (unsigned long) MAX_SLIM_IOCB_SIZE);
  2699. }
  2700. if (phba->cfg_multi_ring_support == 2)
  2701. lpfc_extra_ring_setup(phba);
  2702. return 0;
  2703. }
  2704. int
  2705. lpfc_sli_queue_setup(struct lpfc_hba *phba)
  2706. {
  2707. struct lpfc_sli *psli;
  2708. struct lpfc_sli_ring *pring;
  2709. int i;
  2710. psli = &phba->sli;
  2711. spin_lock_irq(&phba->hbalock);
  2712. INIT_LIST_HEAD(&psli->mboxq);
  2713. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2714. /* Initialize list headers for txq and txcmplq as double linked lists */
  2715. for (i = 0; i < psli->num_rings; i++) {
  2716. pring = &psli->ring[i];
  2717. pring->ringno = i;
  2718. pring->next_cmdidx = 0;
  2719. pring->local_getidx = 0;
  2720. pring->cmdidx = 0;
  2721. INIT_LIST_HEAD(&pring->txq);
  2722. INIT_LIST_HEAD(&pring->txcmplq);
  2723. INIT_LIST_HEAD(&pring->iocb_continueq);
  2724. INIT_LIST_HEAD(&pring->postbufq);
  2725. }
  2726. spin_unlock_irq(&phba->hbalock);
  2727. return 1;
  2728. }
  2729. int
  2730. lpfc_sli_host_down(struct lpfc_vport *vport)
  2731. {
  2732. LIST_HEAD(completions);
  2733. struct lpfc_hba *phba = vport->phba;
  2734. struct lpfc_sli *psli = &phba->sli;
  2735. struct lpfc_sli_ring *pring;
  2736. struct lpfc_iocbq *iocb, *next_iocb;
  2737. int i;
  2738. unsigned long flags = 0;
  2739. uint16_t prev_pring_flag;
  2740. lpfc_cleanup_discovery_resources(vport);
  2741. spin_lock_irqsave(&phba->hbalock, flags);
  2742. for (i = 0; i < psli->num_rings; i++) {
  2743. pring = &psli->ring[i];
  2744. prev_pring_flag = pring->flag;
  2745. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2746. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2747. /*
  2748. * Error everything on the txq since these iocbs have not been
  2749. * given to the FW yet.
  2750. */
  2751. list_for_each_entry_safe(iocb, next_iocb, &pring->txq, list) {
  2752. if (iocb->vport != vport)
  2753. continue;
  2754. list_move_tail(&iocb->list, &completions);
  2755. pring->txq_cnt--;
  2756. }
  2757. /* Next issue ABTS for everything on the txcmplq */
  2758. list_for_each_entry_safe(iocb, next_iocb, &pring->txcmplq,
  2759. list) {
  2760. if (iocb->vport != vport)
  2761. continue;
  2762. lpfc_sli_issue_abort_iotag(phba, pring, iocb);
  2763. }
  2764. pring->flag = prev_pring_flag;
  2765. }
  2766. spin_unlock_irqrestore(&phba->hbalock, flags);
  2767. while (!list_empty(&completions)) {
  2768. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2769. if (!iocb->iocb_cmpl)
  2770. lpfc_sli_release_iocbq(phba, iocb);
  2771. else {
  2772. iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  2773. iocb->iocb.un.ulpWord[4] = IOERR_SLI_DOWN;
  2774. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2775. }
  2776. }
  2777. return 1;
  2778. }
  2779. int
  2780. lpfc_sli_hba_down(struct lpfc_hba *phba)
  2781. {
  2782. LIST_HEAD(completions);
  2783. struct lpfc_sli *psli = &phba->sli;
  2784. struct lpfc_sli_ring *pring;
  2785. LPFC_MBOXQ_t *pmb;
  2786. struct lpfc_iocbq *iocb;
  2787. IOCB_t *cmd = NULL;
  2788. int i;
  2789. unsigned long flags = 0;
  2790. lpfc_hba_down_prep(phba);
  2791. lpfc_fabric_abort_hba(phba);
  2792. spin_lock_irqsave(&phba->hbalock, flags);
  2793. for (i = 0; i < psli->num_rings; i++) {
  2794. pring = &psli->ring[i];
  2795. if (pring->ringno == LPFC_ELS_RING) /* Only slow rings */
  2796. pring->flag |= LPFC_DEFERRED_RING_EVENT;
  2797. /*
  2798. * Error everything on the txq since these iocbs have not been
  2799. * given to the FW yet.
  2800. */
  2801. list_splice_init(&pring->txq, &completions);
  2802. pring->txq_cnt = 0;
  2803. }
  2804. spin_unlock_irqrestore(&phba->hbalock, flags);
  2805. while (!list_empty(&completions)) {
  2806. list_remove_head(&completions, iocb, struct lpfc_iocbq, list);
  2807. cmd = &iocb->iocb;
  2808. if (!iocb->iocb_cmpl)
  2809. lpfc_sli_release_iocbq(phba, iocb);
  2810. else {
  2811. cmd->ulpStatus = IOSTAT_LOCAL_REJECT;
  2812. cmd->un.ulpWord[4] = IOERR_SLI_DOWN;
  2813. (iocb->iocb_cmpl) (phba, iocb, iocb);
  2814. }
  2815. }
  2816. /* Return any active mbox cmds */
  2817. del_timer_sync(&psli->mbox_tmo);
  2818. spin_lock_irqsave(&phba->hbalock, flags);
  2819. spin_lock(&phba->pport->work_port_lock);
  2820. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  2821. spin_unlock(&phba->pport->work_port_lock);
  2822. if (psli->mbox_active) {
  2823. list_add_tail(&psli->mbox_active->list, &completions);
  2824. psli->mbox_active = NULL;
  2825. psli->sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  2826. }
  2827. /* Return any pending or completed mbox cmds */
  2828. list_splice_init(&phba->sli.mboxq, &completions);
  2829. list_splice_init(&phba->sli.mboxq_cmpl, &completions);
  2830. INIT_LIST_HEAD(&psli->mboxq);
  2831. INIT_LIST_HEAD(&psli->mboxq_cmpl);
  2832. spin_unlock_irqrestore(&phba->hbalock, flags);
  2833. while (!list_empty(&completions)) {
  2834. list_remove_head(&completions, pmb, LPFC_MBOXQ_t, list);
  2835. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  2836. if (pmb->mbox_cmpl) {
  2837. pmb->mbox_cmpl(phba,pmb);
  2838. }
  2839. }
  2840. return 1;
  2841. }
  2842. void
  2843. lpfc_sli_pcimem_bcopy(void *srcp, void *destp, uint32_t cnt)
  2844. {
  2845. uint32_t *src = srcp;
  2846. uint32_t *dest = destp;
  2847. uint32_t ldata;
  2848. int i;
  2849. for (i = 0; i < (int)cnt; i += sizeof (uint32_t)) {
  2850. ldata = *src;
  2851. ldata = le32_to_cpu(ldata);
  2852. *dest = ldata;
  2853. src++;
  2854. dest++;
  2855. }
  2856. }
  2857. int
  2858. lpfc_sli_ringpostbuf_put(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2859. struct lpfc_dmabuf *mp)
  2860. {
  2861. /* Stick struct lpfc_dmabuf at end of postbufq so driver can look it up
  2862. later */
  2863. spin_lock_irq(&phba->hbalock);
  2864. list_add_tail(&mp->list, &pring->postbufq);
  2865. pring->postbufq_cnt++;
  2866. spin_unlock_irq(&phba->hbalock);
  2867. return 0;
  2868. }
  2869. struct lpfc_dmabuf *
  2870. lpfc_sli_ringpostbuf_get(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2871. dma_addr_t phys)
  2872. {
  2873. struct lpfc_dmabuf *mp, *next_mp;
  2874. struct list_head *slp = &pring->postbufq;
  2875. /* Search postbufq, from the begining, looking for a match on phys */
  2876. spin_lock_irq(&phba->hbalock);
  2877. list_for_each_entry_safe(mp, next_mp, &pring->postbufq, list) {
  2878. if (mp->phys == phys) {
  2879. list_del_init(&mp->list);
  2880. pring->postbufq_cnt--;
  2881. spin_unlock_irq(&phba->hbalock);
  2882. return mp;
  2883. }
  2884. }
  2885. spin_unlock_irq(&phba->hbalock);
  2886. lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
  2887. "%d:0410 Cannot find virtual addr for mapped buf on "
  2888. "ring %d Data x%llx x%p x%p x%x\n",
  2889. phba->brd_no, pring->ringno, (unsigned long long)phys,
  2890. slp->next, slp->prev, pring->postbufq_cnt);
  2891. return NULL;
  2892. }
  2893. static void
  2894. lpfc_sli_abort_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  2895. struct lpfc_iocbq *rspiocb)
  2896. {
  2897. IOCB_t *irsp = &rspiocb->iocb;
  2898. uint16_t abort_iotag, abort_context;
  2899. struct lpfc_iocbq *abort_iocb;
  2900. struct lpfc_sli_ring *pring = &phba->sli.ring[LPFC_ELS_RING];
  2901. abort_iocb = NULL;
  2902. if (irsp->ulpStatus) {
  2903. abort_context = cmdiocb->iocb.un.acxri.abortContextTag;
  2904. abort_iotag = cmdiocb->iocb.un.acxri.abortIoTag;
  2905. spin_lock_irq(&phba->hbalock);
  2906. if (abort_iotag != 0 && abort_iotag <= phba->sli.last_iotag)
  2907. abort_iocb = phba->sli.iocbq_lookup[abort_iotag];
  2908. lpfc_printf_log(phba, KERN_INFO, LOG_ELS | LOG_SLI,
  2909. "%d:0327 Cannot abort els iocb %p "
  2910. "with tag %x context %x, abort status %x, "
  2911. "abort code %x\n",
  2912. phba->brd_no, abort_iocb, abort_iotag,
  2913. abort_context, irsp->ulpStatus,
  2914. irsp->un.ulpWord[4]);
  2915. /*
  2916. * make sure we have the right iocbq before taking it
  2917. * off the txcmplq and try to call completion routine.
  2918. */
  2919. if (!abort_iocb ||
  2920. abort_iocb->iocb.ulpContext != abort_context ||
  2921. (abort_iocb->iocb_flag & LPFC_DRIVER_ABORTED) == 0)
  2922. spin_unlock_irq(&phba->hbalock);
  2923. else {
  2924. list_del_init(&abort_iocb->list);
  2925. pring->txcmplq_cnt--;
  2926. spin_unlock_irq(&phba->hbalock);
  2927. abort_iocb->iocb_flag &= ~LPFC_DRIVER_ABORTED;
  2928. abort_iocb->iocb.ulpStatus = IOSTAT_LOCAL_REJECT;
  2929. abort_iocb->iocb.un.ulpWord[4] = IOERR_SLI_ABORTED;
  2930. (abort_iocb->iocb_cmpl)(phba, abort_iocb, abort_iocb);
  2931. }
  2932. }
  2933. lpfc_sli_release_iocbq(phba, cmdiocb);
  2934. return;
  2935. }
  2936. static void
  2937. lpfc_ignore_els_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  2938. struct lpfc_iocbq *rspiocb)
  2939. {
  2940. IOCB_t *irsp = &rspiocb->iocb;
  2941. /* ELS cmd tag <ulpIoTag> completes */
  2942. lpfc_printf_log(phba, KERN_INFO, LOG_ELS,
  2943. "%d (X):0133 Ignoring ELS cmd tag x%x completion Data: "
  2944. "x%x x%x x%x\n",
  2945. phba->brd_no, irsp->ulpIoTag, irsp->ulpStatus,
  2946. irsp->un.ulpWord[4], irsp->ulpTimeout);
  2947. if (cmdiocb->iocb.ulpCommand == CMD_GEN_REQUEST64_CR)
  2948. lpfc_ct_free_iocb(phba, cmdiocb);
  2949. else
  2950. lpfc_els_free_iocb(phba, cmdiocb);
  2951. return;
  2952. }
  2953. int
  2954. lpfc_sli_issue_abort_iotag(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  2955. struct lpfc_iocbq *cmdiocb)
  2956. {
  2957. struct lpfc_vport *vport = cmdiocb->vport;
  2958. struct lpfc_iocbq *abtsiocbp;
  2959. IOCB_t *icmd = NULL;
  2960. IOCB_t *iabt = NULL;
  2961. int retval = IOCB_ERROR;
  2962. /*
  2963. * There are certain command types we don't want to abort. And we
  2964. * don't want to abort commands that are already in the process of
  2965. * being aborted.
  2966. */
  2967. icmd = &cmdiocb->iocb;
  2968. if (icmd->ulpCommand == CMD_ABORT_XRI_CN ||
  2969. icmd->ulpCommand == CMD_CLOSE_XRI_CN ||
  2970. (cmdiocb->iocb_flag & LPFC_DRIVER_ABORTED) != 0)
  2971. return 0;
  2972. /* If we're unloading, don't abort iocb on the ELS ring, but change the
  2973. * callback so that nothing happens when it finishes.
  2974. */
  2975. if ((vport->load_flag & FC_UNLOADING) &&
  2976. (pring->ringno == LPFC_ELS_RING)) {
  2977. if (cmdiocb->iocb_flag & LPFC_IO_FABRIC)
  2978. cmdiocb->fabric_iocb_cmpl = lpfc_ignore_els_cmpl;
  2979. else
  2980. cmdiocb->iocb_cmpl = lpfc_ignore_els_cmpl;
  2981. goto abort_iotag_exit;
  2982. }
  2983. /* issue ABTS for this IOCB based on iotag */
  2984. abtsiocbp = __lpfc_sli_get_iocbq(phba);
  2985. if (abtsiocbp == NULL)
  2986. return 0;
  2987. /* This signals the response to set the correct status
  2988. * before calling the completion handler.
  2989. */
  2990. cmdiocb->iocb_flag |= LPFC_DRIVER_ABORTED;
  2991. iabt = &abtsiocbp->iocb;
  2992. iabt->un.acxri.abortType = ABORT_TYPE_ABTS;
  2993. iabt->un.acxri.abortContextTag = icmd->ulpContext;
  2994. iabt->un.acxri.abortIoTag = icmd->ulpIoTag;
  2995. iabt->ulpLe = 1;
  2996. iabt->ulpClass = icmd->ulpClass;
  2997. if (phba->link_state >= LPFC_LINK_UP)
  2998. iabt->ulpCommand = CMD_ABORT_XRI_CN;
  2999. else
  3000. iabt->ulpCommand = CMD_CLOSE_XRI_CN;
  3001. abtsiocbp->iocb_cmpl = lpfc_sli_abort_els_cmpl;
  3002. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3003. "%d (%d):0339 Abort xri x%x, original iotag x%x, "
  3004. "abort cmd iotag x%x\n",
  3005. phba->brd_no, vport->vpi,
  3006. iabt->un.acxri.abortContextTag,
  3007. iabt->un.acxri.abortIoTag, abtsiocbp->iotag);
  3008. retval = __lpfc_sli_issue_iocb(phba, pring, abtsiocbp, 0);
  3009. abort_iotag_exit:
  3010. /*
  3011. * Caller to this routine should check for IOCB_ERROR
  3012. * and handle it properly. This routine no longer removes
  3013. * iocb off txcmplq and call compl in case of IOCB_ERROR.
  3014. */
  3015. return retval;
  3016. }
  3017. static int
  3018. lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, uint16_t tgt_id,
  3019. uint64_t lun_id, uint32_t ctx,
  3020. lpfc_ctx_cmd ctx_cmd)
  3021. {
  3022. struct lpfc_scsi_buf *lpfc_cmd;
  3023. struct scsi_cmnd *cmnd;
  3024. int rc = 1;
  3025. if (!(iocbq->iocb_flag & LPFC_IO_FCP))
  3026. return rc;
  3027. lpfc_cmd = container_of(iocbq, struct lpfc_scsi_buf, cur_iocbq);
  3028. cmnd = lpfc_cmd->pCmd;
  3029. if (cmnd == NULL)
  3030. return rc;
  3031. switch (ctx_cmd) {
  3032. case LPFC_CTX_LUN:
  3033. if ((cmnd->device->id == tgt_id) &&
  3034. (cmnd->device->lun == lun_id))
  3035. rc = 0;
  3036. break;
  3037. case LPFC_CTX_TGT:
  3038. if (cmnd->device->id == tgt_id)
  3039. rc = 0;
  3040. break;
  3041. case LPFC_CTX_CTX:
  3042. if (iocbq->iocb.ulpContext == ctx)
  3043. rc = 0;
  3044. break;
  3045. case LPFC_CTX_HOST:
  3046. rc = 0;
  3047. break;
  3048. default:
  3049. printk(KERN_ERR "%s: Unknown context cmd type, value %d\n",
  3050. __FUNCTION__, ctx_cmd);
  3051. break;
  3052. }
  3053. return rc;
  3054. }
  3055. int
  3056. lpfc_sli_sum_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  3057. uint16_t tgt_id, uint64_t lun_id, lpfc_ctx_cmd ctx_cmd)
  3058. {
  3059. struct lpfc_iocbq *iocbq;
  3060. int sum, i;
  3061. for (i = 1, sum = 0; i <= phba->sli.last_iotag; i++) {
  3062. iocbq = phba->sli.iocbq_lookup[i];
  3063. if (lpfc_sli_validate_fcp_iocb (iocbq, tgt_id, lun_id,
  3064. 0, ctx_cmd) == 0)
  3065. sum++;
  3066. }
  3067. return sum;
  3068. }
  3069. void
  3070. lpfc_sli_abort_fcp_cmpl(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb,
  3071. struct lpfc_iocbq *rspiocb)
  3072. {
  3073. lpfc_sli_release_iocbq(phba, cmdiocb);
  3074. return;
  3075. }
  3076. int
  3077. lpfc_sli_abort_iocb(struct lpfc_hba *phba, struct lpfc_sli_ring *pring,
  3078. uint16_t tgt_id, uint64_t lun_id, uint32_t ctx,
  3079. lpfc_ctx_cmd abort_cmd)
  3080. {
  3081. struct lpfc_iocbq *iocbq;
  3082. struct lpfc_iocbq *abtsiocb;
  3083. IOCB_t *cmd = NULL;
  3084. int errcnt = 0, ret_val = 0;
  3085. int i;
  3086. for (i = 1; i <= phba->sli.last_iotag; i++) {
  3087. iocbq = phba->sli.iocbq_lookup[i];
  3088. if (lpfc_sli_validate_fcp_iocb(iocbq, tgt_id, lun_id, 0,
  3089. abort_cmd) != 0)
  3090. continue;
  3091. /* issue ABTS for this IOCB based on iotag */
  3092. abtsiocb = lpfc_sli_get_iocbq(phba);
  3093. if (abtsiocb == NULL) {
  3094. errcnt++;
  3095. continue;
  3096. }
  3097. cmd = &iocbq->iocb;
  3098. abtsiocb->iocb.un.acxri.abortType = ABORT_TYPE_ABTS;
  3099. abtsiocb->iocb.un.acxri.abortContextTag = cmd->ulpContext;
  3100. abtsiocb->iocb.un.acxri.abortIoTag = cmd->ulpIoTag;
  3101. abtsiocb->iocb.ulpLe = 1;
  3102. abtsiocb->iocb.ulpClass = cmd->ulpClass;
  3103. abtsiocb->vport = phba->pport;
  3104. if (lpfc_is_link_up(phba))
  3105. abtsiocb->iocb.ulpCommand = CMD_ABORT_XRI_CN;
  3106. else
  3107. abtsiocb->iocb.ulpCommand = CMD_CLOSE_XRI_CN;
  3108. /* Setup callback routine and issue the command. */
  3109. abtsiocb->iocb_cmpl = lpfc_sli_abort_fcp_cmpl;
  3110. ret_val = lpfc_sli_issue_iocb(phba, pring, abtsiocb, 0);
  3111. if (ret_val == IOCB_ERROR) {
  3112. lpfc_sli_release_iocbq(phba, abtsiocb);
  3113. errcnt++;
  3114. continue;
  3115. }
  3116. }
  3117. return errcnt;
  3118. }
  3119. static void
  3120. lpfc_sli_wake_iocb_wait(struct lpfc_hba *phba,
  3121. struct lpfc_iocbq *cmdiocbq,
  3122. struct lpfc_iocbq *rspiocbq)
  3123. {
  3124. wait_queue_head_t *pdone_q;
  3125. unsigned long iflags;
  3126. spin_lock_irqsave(&phba->hbalock, iflags);
  3127. cmdiocbq->iocb_flag |= LPFC_IO_WAKE;
  3128. if (cmdiocbq->context2 && rspiocbq)
  3129. memcpy(&((struct lpfc_iocbq *)cmdiocbq->context2)->iocb,
  3130. &rspiocbq->iocb, sizeof(IOCB_t));
  3131. pdone_q = cmdiocbq->context_un.wait_queue;
  3132. if (pdone_q)
  3133. wake_up(pdone_q);
  3134. spin_unlock_irqrestore(&phba->hbalock, iflags);
  3135. return;
  3136. }
  3137. /*
  3138. * Issue the caller's iocb and wait for its completion, but no longer than the
  3139. * caller's timeout. Note that iocb_flags is cleared before the
  3140. * lpfc_sli_issue_call since the wake routine sets a unique value and by
  3141. * definition this is a wait function.
  3142. */
  3143. int
  3144. lpfc_sli_issue_iocb_wait(struct lpfc_hba *phba,
  3145. struct lpfc_sli_ring *pring,
  3146. struct lpfc_iocbq *piocb,
  3147. struct lpfc_iocbq *prspiocbq,
  3148. uint32_t timeout)
  3149. {
  3150. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3151. long timeleft, timeout_req = 0;
  3152. int retval = IOCB_SUCCESS;
  3153. uint32_t creg_val;
  3154. /*
  3155. * If the caller has provided a response iocbq buffer, then context2
  3156. * is NULL or its an error.
  3157. */
  3158. if (prspiocbq) {
  3159. if (piocb->context2)
  3160. return IOCB_ERROR;
  3161. piocb->context2 = prspiocbq;
  3162. }
  3163. piocb->iocb_cmpl = lpfc_sli_wake_iocb_wait;
  3164. piocb->context_un.wait_queue = &done_q;
  3165. piocb->iocb_flag &= ~LPFC_IO_WAKE;
  3166. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3167. creg_val = readl(phba->HCregaddr);
  3168. creg_val |= (HC_R0INT_ENA << LPFC_FCP_RING);
  3169. writel(creg_val, phba->HCregaddr);
  3170. readl(phba->HCregaddr); /* flush */
  3171. }
  3172. retval = lpfc_sli_issue_iocb(phba, pring, piocb, 0);
  3173. if (retval == IOCB_SUCCESS) {
  3174. timeout_req = timeout * HZ;
  3175. timeleft = wait_event_timeout(done_q,
  3176. piocb->iocb_flag & LPFC_IO_WAKE,
  3177. timeout_req);
  3178. if (piocb->iocb_flag & LPFC_IO_WAKE) {
  3179. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3180. "%d:0331 IOCB wake signaled\n",
  3181. phba->brd_no);
  3182. } else if (timeleft == 0) {
  3183. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3184. "%d:0338 IOCB wait timeout error - no "
  3185. "wake response Data x%x\n",
  3186. phba->brd_no, timeout);
  3187. retval = IOCB_TIMEDOUT;
  3188. } else {
  3189. lpfc_printf_log(phba, KERN_ERR, LOG_SLI,
  3190. "%d:0330 IOCB wake NOT set, "
  3191. "Data x%x x%lx\n", phba->brd_no,
  3192. timeout, (timeleft / jiffies));
  3193. retval = IOCB_TIMEDOUT;
  3194. }
  3195. } else {
  3196. lpfc_printf_log(phba, KERN_INFO, LOG_SLI,
  3197. "%d:0332 IOCB wait issue failed, Data x%x\n",
  3198. phba->brd_no, retval);
  3199. retval = IOCB_ERROR;
  3200. }
  3201. if (phba->cfg_poll & DISABLE_FCP_RING_INT) {
  3202. creg_val = readl(phba->HCregaddr);
  3203. creg_val &= ~(HC_R0INT_ENA << LPFC_FCP_RING);
  3204. writel(creg_val, phba->HCregaddr);
  3205. readl(phba->HCregaddr); /* flush */
  3206. }
  3207. if (prspiocbq)
  3208. piocb->context2 = NULL;
  3209. piocb->context_un.wait_queue = NULL;
  3210. piocb->iocb_cmpl = NULL;
  3211. return retval;
  3212. }
  3213. int
  3214. lpfc_sli_issue_mbox_wait(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmboxq,
  3215. uint32_t timeout)
  3216. {
  3217. DECLARE_WAIT_QUEUE_HEAD_ONSTACK(done_q);
  3218. int retval;
  3219. unsigned long flag;
  3220. /* The caller must leave context1 empty. */
  3221. if (pmboxq->context1 != 0)
  3222. return MBX_NOT_FINISHED;
  3223. /* setup wake call as IOCB callback */
  3224. pmboxq->mbox_cmpl = lpfc_sli_wake_mbox_wait;
  3225. /* setup context field to pass wait_queue pointer to wake function */
  3226. pmboxq->context1 = &done_q;
  3227. /* now issue the command */
  3228. retval = lpfc_sli_issue_mbox(phba, pmboxq, MBX_NOWAIT);
  3229. if (retval == MBX_BUSY || retval == MBX_SUCCESS) {
  3230. wait_event_interruptible_timeout(done_q,
  3231. pmboxq->mbox_flag & LPFC_MBX_WAKE,
  3232. timeout * HZ);
  3233. spin_lock_irqsave(&phba->hbalock, flag);
  3234. pmboxq->context1 = NULL;
  3235. /*
  3236. * if LPFC_MBX_WAKE flag is set the mailbox is completed
  3237. * else do not free the resources.
  3238. */
  3239. if (pmboxq->mbox_flag & LPFC_MBX_WAKE)
  3240. retval = MBX_SUCCESS;
  3241. else {
  3242. retval = MBX_TIMEOUT;
  3243. pmboxq->mbox_cmpl = lpfc_sli_def_mbox_cmpl;
  3244. }
  3245. spin_unlock_irqrestore(&phba->hbalock, flag);
  3246. }
  3247. return retval;
  3248. }
  3249. int
  3250. lpfc_sli_flush_mbox_queue(struct lpfc_hba * phba)
  3251. {
  3252. struct lpfc_vport *vport = phba->pport;
  3253. int i = 0;
  3254. uint32_t ha_copy;
  3255. while (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE && !vport->stopped) {
  3256. if (i++ > LPFC_MBOX_TMO * 1000)
  3257. return 1;
  3258. /*
  3259. * Call lpfc_sli_handle_mb_event only if a mailbox cmd
  3260. * did finish. This way we won't get the misleading
  3261. * "Stray Mailbox Interrupt" message.
  3262. */
  3263. spin_lock_irq(&phba->hbalock);
  3264. ha_copy = phba->work_ha;
  3265. phba->work_ha &= ~HA_MBATT;
  3266. spin_unlock_irq(&phba->hbalock);
  3267. if (ha_copy & HA_MBATT)
  3268. if (lpfc_sli_handle_mb_event(phba) == 0)
  3269. i = 0;
  3270. msleep(1);
  3271. }
  3272. return (phba->sli.sli_flag & LPFC_SLI_MBOX_ACTIVE) ? 1 : 0;
  3273. }
  3274. irqreturn_t
  3275. lpfc_intr_handler(int irq, void *dev_id)
  3276. {
  3277. struct lpfc_hba *phba;
  3278. uint32_t ha_copy;
  3279. uint32_t work_ha_copy;
  3280. unsigned long status;
  3281. int i;
  3282. uint32_t control;
  3283. MAILBOX_t *mbox, *pmbox;
  3284. struct lpfc_vport *vport;
  3285. struct lpfc_nodelist *ndlp;
  3286. struct lpfc_dmabuf *mp;
  3287. LPFC_MBOXQ_t *pmb;
  3288. int rc;
  3289. /*
  3290. * Get the driver's phba structure from the dev_id and
  3291. * assume the HBA is not interrupting.
  3292. */
  3293. phba = (struct lpfc_hba *) dev_id;
  3294. if (unlikely(!phba))
  3295. return IRQ_NONE;
  3296. /* If the pci channel is offline, ignore all the interrupts. */
  3297. if (unlikely(pci_channel_offline(phba->pcidev)))
  3298. return IRQ_NONE;
  3299. phba->sli.slistat.sli_intr++;
  3300. /*
  3301. * Call the HBA to see if it is interrupting. If not, don't claim
  3302. * the interrupt
  3303. */
  3304. /* Ignore all interrupts during initialization. */
  3305. if (unlikely(phba->link_state < LPFC_LINK_DOWN))
  3306. return IRQ_NONE;
  3307. /*
  3308. * Read host attention register to determine interrupt source
  3309. * Clear Attention Sources, except Error Attention (to
  3310. * preserve status) and Link Attention
  3311. */
  3312. spin_lock(&phba->hbalock);
  3313. ha_copy = readl(phba->HAregaddr);
  3314. /* If somebody is waiting to handle an eratt don't process it
  3315. * here. The brdkill function will do this.
  3316. */
  3317. if (phba->link_flag & LS_IGNORE_ERATT)
  3318. ha_copy &= ~HA_ERATT;
  3319. writel((ha_copy & ~(HA_LATT | HA_ERATT)), phba->HAregaddr);
  3320. readl(phba->HAregaddr); /* flush */
  3321. spin_unlock(&phba->hbalock);
  3322. if (unlikely(!ha_copy))
  3323. return IRQ_NONE;
  3324. work_ha_copy = ha_copy & phba->work_ha_mask;
  3325. if (unlikely(work_ha_copy)) {
  3326. if (work_ha_copy & HA_LATT) {
  3327. if (phba->sli.sli_flag & LPFC_PROCESS_LA) {
  3328. /*
  3329. * Turn off Link Attention interrupts
  3330. * until CLEAR_LA done
  3331. */
  3332. spin_lock(&phba->hbalock);
  3333. phba->sli.sli_flag &= ~LPFC_PROCESS_LA;
  3334. control = readl(phba->HCregaddr);
  3335. control &= ~HC_LAINT_ENA;
  3336. writel(control, phba->HCregaddr);
  3337. readl(phba->HCregaddr); /* flush */
  3338. spin_unlock(&phba->hbalock);
  3339. }
  3340. else
  3341. work_ha_copy &= ~HA_LATT;
  3342. }
  3343. if (work_ha_copy & ~(HA_ERATT|HA_MBATT|HA_LATT)) {
  3344. /*
  3345. * Turn off Slow Rings interrupts, LPFC_ELS_RING is
  3346. * the only slow ring.
  3347. */
  3348. status = (work_ha_copy &
  3349. (HA_RXMASK << (4*LPFC_ELS_RING)));
  3350. status >>= (4*LPFC_ELS_RING);
  3351. if (status & HA_RXMASK) {
  3352. spin_lock(&phba->hbalock);
  3353. control = readl(phba->HCregaddr);
  3354. if (control & (HC_R0INT_ENA << LPFC_ELS_RING)) {
  3355. control &=
  3356. ~(HC_R0INT_ENA << LPFC_ELS_RING);
  3357. writel(control, phba->HCregaddr);
  3358. readl(phba->HCregaddr); /* flush */
  3359. }
  3360. spin_unlock(&phba->hbalock);
  3361. }
  3362. }
  3363. if (work_ha_copy & HA_ERATT) {
  3364. phba->link_state = LPFC_HBA_ERROR;
  3365. /*
  3366. * There was a link/board error. Read the
  3367. * status register to retrieve the error event
  3368. * and process it.
  3369. */
  3370. phba->sli.slistat.err_attn_event++;
  3371. /* Save status info */
  3372. phba->work_hs = readl(phba->HSregaddr);
  3373. phba->work_status[0] = readl(phba->MBslimaddr + 0xa8);
  3374. phba->work_status[1] = readl(phba->MBslimaddr + 0xac);
  3375. /* Clear Chip error bit */
  3376. writel(HA_ERATT, phba->HAregaddr);
  3377. readl(phba->HAregaddr); /* flush */
  3378. phba->pport->stopped = 1;
  3379. }
  3380. if ((work_ha_copy & HA_MBATT) &&
  3381. (phba->sli.mbox_active)) {
  3382. pmb = phba->sli.mbox_active;
  3383. pmbox = &pmb->mb;
  3384. mbox = &phba->slim2p->mbx;
  3385. vport = pmb->vport;
  3386. /* First check out the status word */
  3387. lpfc_sli_pcimem_bcopy(mbox, pmbox, sizeof(uint32_t));
  3388. if (pmbox->mbxOwner != OWN_HOST) {
  3389. /*
  3390. * Stray Mailbox Interrupt, mbxCommand <cmd>
  3391. * mbxStatus <status>
  3392. */
  3393. lpfc_printf_log(phba, KERN_WARNING, LOG_MBOX |
  3394. LOG_SLI,
  3395. "%d (%d):0304 Stray Mailbox "
  3396. "Interrupt mbxCommand x%x "
  3397. "mbxStatus x%x\n",
  3398. phba->brd_no,
  3399. (vport
  3400. ? vport->vpi : 0),
  3401. pmbox->mbxCommand,
  3402. pmbox->mbxStatus);
  3403. }
  3404. phba->last_completion_time = jiffies;
  3405. del_timer_sync(&phba->sli.mbox_tmo);
  3406. phba->sli.mbox_active = NULL;
  3407. if (pmb->mbox_cmpl) {
  3408. lpfc_sli_pcimem_bcopy(mbox, pmbox,
  3409. MAILBOX_CMD_SIZE);
  3410. }
  3411. if (pmb->mbox_flag & LPFC_MBX_IMED_UNREG) {
  3412. pmb->mbox_flag &= ~LPFC_MBX_IMED_UNREG;
  3413. lpfc_debugfs_disc_trc(vport,
  3414. LPFC_DISC_TRC_MBOX_VPORT,
  3415. "MBOX dflt rpi: : status:x%x rpi:x%x",
  3416. (uint32_t)pmbox->mbxStatus,
  3417. pmbox->un.varWords[0], 0);
  3418. if ( !pmbox->mbxStatus) {
  3419. mp = (struct lpfc_dmabuf *)
  3420. (pmb->context1);
  3421. ndlp = (struct lpfc_nodelist *)
  3422. pmb->context2;
  3423. /* Reg_LOGIN of dflt RPI was successful.
  3424. * new lets get rid of the RPI using the
  3425. * same mbox buffer.
  3426. */
  3427. lpfc_unreg_login(phba, vport->vpi,
  3428. pmbox->un.varWords[0], pmb);
  3429. pmb->mbox_cmpl = lpfc_mbx_cmpl_dflt_rpi;
  3430. pmb->context1 = mp;
  3431. pmb->context2 = ndlp;
  3432. pmb->vport = vport;
  3433. spin_lock(&phba->hbalock);
  3434. phba->sli.sli_flag &=
  3435. ~LPFC_SLI_MBOX_ACTIVE;
  3436. spin_unlock(&phba->hbalock);
  3437. goto send_current_mbox;
  3438. }
  3439. }
  3440. spin_lock(&phba->pport->work_port_lock);
  3441. phba->pport->work_port_events &= ~WORKER_MBOX_TMO;
  3442. spin_unlock(&phba->pport->work_port_lock);
  3443. lpfc_mbox_cmpl_put(phba, pmb);
  3444. }
  3445. if ((work_ha_copy & HA_MBATT) &&
  3446. (phba->sli.mbox_active == NULL)) {
  3447. send_next_mbox:
  3448. spin_lock(&phba->hbalock);
  3449. phba->sli.sli_flag &= ~LPFC_SLI_MBOX_ACTIVE;
  3450. pmb = lpfc_mbox_get(phba);
  3451. spin_unlock(&phba->hbalock);
  3452. send_current_mbox:
  3453. /* Process next mailbox command if there is one */
  3454. if (pmb != NULL) {
  3455. rc = lpfc_sli_issue_mbox(phba, pmb, MBX_NOWAIT);
  3456. if (rc == MBX_NOT_FINISHED) {
  3457. pmb->mb.mbxStatus = MBX_NOT_FINISHED;
  3458. lpfc_mbox_cmpl_put(phba, pmb);
  3459. goto send_next_mbox;
  3460. }
  3461. } else {
  3462. /* Turn on IOCB processing */
  3463. for (i = 0; i < phba->sli.num_rings; i++)
  3464. lpfc_sli_turn_on_ring(phba, i);
  3465. }
  3466. }
  3467. spin_lock(&phba->hbalock);
  3468. phba->work_ha |= work_ha_copy;
  3469. if (phba->work_wait)
  3470. lpfc_worker_wake_up(phba);
  3471. spin_unlock(&phba->hbalock);
  3472. }
  3473. ha_copy &= ~(phba->work_ha_mask);
  3474. /*
  3475. * Process all events on FCP ring. Take the optimized path for
  3476. * FCP IO. Any other IO is slow path and is handled by
  3477. * the worker thread.
  3478. */
  3479. status = (ha_copy & (HA_RXMASK << (4*LPFC_FCP_RING)));
  3480. status >>= (4*LPFC_FCP_RING);
  3481. if (status & HA_RXMASK)
  3482. lpfc_sli_handle_fast_ring_event(phba,
  3483. &phba->sli.ring[LPFC_FCP_RING],
  3484. status);
  3485. if (phba->cfg_multi_ring_support == 2) {
  3486. /*
  3487. * Process all events on extra ring. Take the optimized path
  3488. * for extra ring IO. Any other IO is slow path and is handled
  3489. * by the worker thread.
  3490. */
  3491. status = (ha_copy & (HA_RXMASK << (4*LPFC_EXTRA_RING)));
  3492. status >>= (4*LPFC_EXTRA_RING);
  3493. if (status & HA_RXMASK) {
  3494. lpfc_sli_handle_fast_ring_event(phba,
  3495. &phba->sli.ring[LPFC_EXTRA_RING],
  3496. status);
  3497. }
  3498. }
  3499. return IRQ_HANDLED;
  3500. } /* lpfc_intr_handler */