esp_scsi.c 64 KB

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  1. /* esp_scsi.c: ESP SCSI driver.
  2. *
  3. * Copyright (C) 2007 David S. Miller (davem@davemloft.net)
  4. */
  5. #include <linux/kernel.h>
  6. #include <linux/types.h>
  7. #include <linux/slab.h>
  8. #include <linux/delay.h>
  9. #include <linux/list.h>
  10. #include <linux/completion.h>
  11. #include <linux/kallsyms.h>
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/init.h>
  15. #include <linux/irqreturn.h>
  16. #include <asm/irq.h>
  17. #include <asm/io.h>
  18. #include <asm/dma.h>
  19. #include <scsi/scsi.h>
  20. #include <scsi/scsi_host.h>
  21. #include <scsi/scsi_cmnd.h>
  22. #include <scsi/scsi_device.h>
  23. #include <scsi/scsi_tcq.h>
  24. #include <scsi/scsi_dbg.h>
  25. #include <scsi/scsi_transport_spi.h>
  26. #include "esp_scsi.h"
  27. #define DRV_MODULE_NAME "esp"
  28. #define PFX DRV_MODULE_NAME ": "
  29. #define DRV_VERSION "2.000"
  30. #define DRV_MODULE_RELDATE "April 19, 2007"
  31. /* SCSI bus reset settle time in seconds. */
  32. static int esp_bus_reset_settle = 3;
  33. static u32 esp_debug;
  34. #define ESP_DEBUG_INTR 0x00000001
  35. #define ESP_DEBUG_SCSICMD 0x00000002
  36. #define ESP_DEBUG_RESET 0x00000004
  37. #define ESP_DEBUG_MSGIN 0x00000008
  38. #define ESP_DEBUG_MSGOUT 0x00000010
  39. #define ESP_DEBUG_CMDDONE 0x00000020
  40. #define ESP_DEBUG_DISCONNECT 0x00000040
  41. #define ESP_DEBUG_DATASTART 0x00000080
  42. #define ESP_DEBUG_DATADONE 0x00000100
  43. #define ESP_DEBUG_RECONNECT 0x00000200
  44. #define ESP_DEBUG_AUTOSENSE 0x00000400
  45. #define esp_log_intr(f, a...) \
  46. do { if (esp_debug & ESP_DEBUG_INTR) \
  47. printk(f, ## a); \
  48. } while (0)
  49. #define esp_log_reset(f, a...) \
  50. do { if (esp_debug & ESP_DEBUG_RESET) \
  51. printk(f, ## a); \
  52. } while (0)
  53. #define esp_log_msgin(f, a...) \
  54. do { if (esp_debug & ESP_DEBUG_MSGIN) \
  55. printk(f, ## a); \
  56. } while (0)
  57. #define esp_log_msgout(f, a...) \
  58. do { if (esp_debug & ESP_DEBUG_MSGOUT) \
  59. printk(f, ## a); \
  60. } while (0)
  61. #define esp_log_cmddone(f, a...) \
  62. do { if (esp_debug & ESP_DEBUG_CMDDONE) \
  63. printk(f, ## a); \
  64. } while (0)
  65. #define esp_log_disconnect(f, a...) \
  66. do { if (esp_debug & ESP_DEBUG_DISCONNECT) \
  67. printk(f, ## a); \
  68. } while (0)
  69. #define esp_log_datastart(f, a...) \
  70. do { if (esp_debug & ESP_DEBUG_DATASTART) \
  71. printk(f, ## a); \
  72. } while (0)
  73. #define esp_log_datadone(f, a...) \
  74. do { if (esp_debug & ESP_DEBUG_DATADONE) \
  75. printk(f, ## a); \
  76. } while (0)
  77. #define esp_log_reconnect(f, a...) \
  78. do { if (esp_debug & ESP_DEBUG_RECONNECT) \
  79. printk(f, ## a); \
  80. } while (0)
  81. #define esp_log_autosense(f, a...) \
  82. do { if (esp_debug & ESP_DEBUG_AUTOSENSE) \
  83. printk(f, ## a); \
  84. } while (0)
  85. #define esp_read8(REG) esp->ops->esp_read8(esp, REG)
  86. #define esp_write8(VAL,REG) esp->ops->esp_write8(esp, VAL, REG)
  87. static void esp_log_fill_regs(struct esp *esp,
  88. struct esp_event_ent *p)
  89. {
  90. p->sreg = esp->sreg;
  91. p->seqreg = esp->seqreg;
  92. p->sreg2 = esp->sreg2;
  93. p->ireg = esp->ireg;
  94. p->select_state = esp->select_state;
  95. p->event = esp->event;
  96. }
  97. void scsi_esp_cmd(struct esp *esp, u8 val)
  98. {
  99. struct esp_event_ent *p;
  100. int idx = esp->esp_event_cur;
  101. p = &esp->esp_event_log[idx];
  102. p->type = ESP_EVENT_TYPE_CMD;
  103. p->val = val;
  104. esp_log_fill_regs(esp, p);
  105. esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  106. esp_write8(val, ESP_CMD);
  107. }
  108. EXPORT_SYMBOL(scsi_esp_cmd);
  109. static void esp_event(struct esp *esp, u8 val)
  110. {
  111. struct esp_event_ent *p;
  112. int idx = esp->esp_event_cur;
  113. p = &esp->esp_event_log[idx];
  114. p->type = ESP_EVENT_TYPE_EVENT;
  115. p->val = val;
  116. esp_log_fill_regs(esp, p);
  117. esp->esp_event_cur = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  118. esp->event = val;
  119. }
  120. static void esp_dump_cmd_log(struct esp *esp)
  121. {
  122. int idx = esp->esp_event_cur;
  123. int stop = idx;
  124. printk(KERN_INFO PFX "esp%d: Dumping command log\n",
  125. esp->host->unique_id);
  126. do {
  127. struct esp_event_ent *p = &esp->esp_event_log[idx];
  128. printk(KERN_INFO PFX "esp%d: ent[%d] %s ",
  129. esp->host->unique_id, idx,
  130. p->type == ESP_EVENT_TYPE_CMD ? "CMD" : "EVENT");
  131. printk("val[%02x] sreg[%02x] seqreg[%02x] "
  132. "sreg2[%02x] ireg[%02x] ss[%02x] event[%02x]\n",
  133. p->val, p->sreg, p->seqreg,
  134. p->sreg2, p->ireg, p->select_state, p->event);
  135. idx = (idx + 1) & (ESP_EVENT_LOG_SZ - 1);
  136. } while (idx != stop);
  137. }
  138. static void esp_flush_fifo(struct esp *esp)
  139. {
  140. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  141. if (esp->rev == ESP236) {
  142. int lim = 1000;
  143. while (esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES) {
  144. if (--lim == 0) {
  145. printk(KERN_ALERT PFX "esp%d: ESP_FF_BYTES "
  146. "will not clear!\n",
  147. esp->host->unique_id);
  148. break;
  149. }
  150. udelay(1);
  151. }
  152. }
  153. }
  154. static void hme_read_fifo(struct esp *esp)
  155. {
  156. int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  157. int idx = 0;
  158. while (fcnt--) {
  159. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  160. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  161. }
  162. if (esp->sreg2 & ESP_STAT2_F1BYTE) {
  163. esp_write8(0, ESP_FDATA);
  164. esp->fifo[idx++] = esp_read8(ESP_FDATA);
  165. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  166. }
  167. esp->fifo_cnt = idx;
  168. }
  169. static void esp_set_all_config3(struct esp *esp, u8 val)
  170. {
  171. int i;
  172. for (i = 0; i < ESP_MAX_TARGET; i++)
  173. esp->target[i].esp_config3 = val;
  174. }
  175. /* Reset the ESP chip, _not_ the SCSI bus. */
  176. static void esp_reset_esp(struct esp *esp)
  177. {
  178. u8 family_code, version;
  179. /* Now reset the ESP chip */
  180. scsi_esp_cmd(esp, ESP_CMD_RC);
  181. scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  182. scsi_esp_cmd(esp, ESP_CMD_NULL | ESP_CMD_DMA);
  183. /* Reload the configuration registers */
  184. esp_write8(esp->cfact, ESP_CFACT);
  185. esp->prev_stp = 0;
  186. esp_write8(esp->prev_stp, ESP_STP);
  187. esp->prev_soff = 0;
  188. esp_write8(esp->prev_soff, ESP_SOFF);
  189. esp_write8(esp->neg_defp, ESP_TIMEO);
  190. /* This is the only point at which it is reliable to read
  191. * the ID-code for a fast ESP chip variants.
  192. */
  193. esp->max_period = ((35 * esp->ccycle) / 1000);
  194. if (esp->rev == FAST) {
  195. version = esp_read8(ESP_UID);
  196. family_code = (version & 0xf8) >> 3;
  197. if (family_code == 0x02)
  198. esp->rev = FAS236;
  199. else if (family_code == 0x0a)
  200. esp->rev = FASHME; /* Version is usually '5'. */
  201. else
  202. esp->rev = FAS100A;
  203. esp->min_period = ((4 * esp->ccycle) / 1000);
  204. } else {
  205. esp->min_period = ((5 * esp->ccycle) / 1000);
  206. }
  207. esp->max_period = (esp->max_period + 3)>>2;
  208. esp->min_period = (esp->min_period + 3)>>2;
  209. esp_write8(esp->config1, ESP_CFG1);
  210. switch (esp->rev) {
  211. case ESP100:
  212. /* nothing to do */
  213. break;
  214. case ESP100A:
  215. esp_write8(esp->config2, ESP_CFG2);
  216. break;
  217. case ESP236:
  218. /* Slow 236 */
  219. esp_write8(esp->config2, ESP_CFG2);
  220. esp->prev_cfg3 = esp->target[0].esp_config3;
  221. esp_write8(esp->prev_cfg3, ESP_CFG3);
  222. break;
  223. case FASHME:
  224. esp->config2 |= (ESP_CONFIG2_HME32 | ESP_CONFIG2_HMEFENAB);
  225. /* fallthrough... */
  226. case FAS236:
  227. /* Fast 236 or HME */
  228. esp_write8(esp->config2, ESP_CFG2);
  229. if (esp->rev == FASHME) {
  230. u8 cfg3 = esp->target[0].esp_config3;
  231. cfg3 |= ESP_CONFIG3_FCLOCK | ESP_CONFIG3_OBPUSH;
  232. if (esp->scsi_id >= 8)
  233. cfg3 |= ESP_CONFIG3_IDBIT3;
  234. esp_set_all_config3(esp, cfg3);
  235. } else {
  236. u32 cfg3 = esp->target[0].esp_config3;
  237. cfg3 |= ESP_CONFIG3_FCLK;
  238. esp_set_all_config3(esp, cfg3);
  239. }
  240. esp->prev_cfg3 = esp->target[0].esp_config3;
  241. esp_write8(esp->prev_cfg3, ESP_CFG3);
  242. if (esp->rev == FASHME) {
  243. esp->radelay = 80;
  244. } else {
  245. if (esp->flags & ESP_FLAG_DIFFERENTIAL)
  246. esp->radelay = 0;
  247. else
  248. esp->radelay = 96;
  249. }
  250. break;
  251. case FAS100A:
  252. /* Fast 100a */
  253. esp_write8(esp->config2, ESP_CFG2);
  254. esp_set_all_config3(esp,
  255. (esp->target[0].esp_config3 |
  256. ESP_CONFIG3_FCLOCK));
  257. esp->prev_cfg3 = esp->target[0].esp_config3;
  258. esp_write8(esp->prev_cfg3, ESP_CFG3);
  259. esp->radelay = 32;
  260. break;
  261. default:
  262. break;
  263. }
  264. /* Eat any bitrot in the chip */
  265. esp_read8(ESP_INTRPT);
  266. udelay(100);
  267. }
  268. static void esp_map_dma(struct esp *esp, struct scsi_cmnd *cmd)
  269. {
  270. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  271. struct scatterlist *sg = scsi_sglist(cmd);
  272. int dir = cmd->sc_data_direction;
  273. int total, i;
  274. if (dir == DMA_NONE)
  275. return;
  276. spriv->u.num_sg = esp->ops->map_sg(esp, sg, scsi_sg_count(cmd), dir);
  277. spriv->cur_residue = sg_dma_len(sg);
  278. spriv->cur_sg = sg;
  279. total = 0;
  280. for (i = 0; i < spriv->u.num_sg; i++)
  281. total += sg_dma_len(&sg[i]);
  282. spriv->tot_residue = total;
  283. }
  284. static dma_addr_t esp_cur_dma_addr(struct esp_cmd_entry *ent,
  285. struct scsi_cmnd *cmd)
  286. {
  287. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  288. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  289. return ent->sense_dma +
  290. (ent->sense_ptr - cmd->sense_buffer);
  291. }
  292. return sg_dma_address(p->cur_sg) +
  293. (sg_dma_len(p->cur_sg) -
  294. p->cur_residue);
  295. }
  296. static unsigned int esp_cur_dma_len(struct esp_cmd_entry *ent,
  297. struct scsi_cmnd *cmd)
  298. {
  299. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  300. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  301. return SCSI_SENSE_BUFFERSIZE -
  302. (ent->sense_ptr - cmd->sense_buffer);
  303. }
  304. return p->cur_residue;
  305. }
  306. static void esp_advance_dma(struct esp *esp, struct esp_cmd_entry *ent,
  307. struct scsi_cmnd *cmd, unsigned int len)
  308. {
  309. struct esp_cmd_priv *p = ESP_CMD_PRIV(cmd);
  310. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  311. ent->sense_ptr += len;
  312. return;
  313. }
  314. p->cur_residue -= len;
  315. p->tot_residue -= len;
  316. if (p->cur_residue < 0 || p->tot_residue < 0) {
  317. printk(KERN_ERR PFX "esp%d: Data transfer overflow.\n",
  318. esp->host->unique_id);
  319. printk(KERN_ERR PFX "esp%d: cur_residue[%d] tot_residue[%d] "
  320. "len[%u]\n",
  321. esp->host->unique_id,
  322. p->cur_residue, p->tot_residue, len);
  323. p->cur_residue = 0;
  324. p->tot_residue = 0;
  325. }
  326. if (!p->cur_residue && p->tot_residue) {
  327. p->cur_sg++;
  328. p->cur_residue = sg_dma_len(p->cur_sg);
  329. }
  330. }
  331. static void esp_unmap_dma(struct esp *esp, struct scsi_cmnd *cmd)
  332. {
  333. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  334. int dir = cmd->sc_data_direction;
  335. if (dir == DMA_NONE)
  336. return;
  337. esp->ops->unmap_sg(esp, scsi_sglist(cmd), spriv->u.num_sg, dir);
  338. }
  339. static void esp_save_pointers(struct esp *esp, struct esp_cmd_entry *ent)
  340. {
  341. struct scsi_cmnd *cmd = ent->cmd;
  342. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  343. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  344. ent->saved_sense_ptr = ent->sense_ptr;
  345. return;
  346. }
  347. ent->saved_cur_residue = spriv->cur_residue;
  348. ent->saved_cur_sg = spriv->cur_sg;
  349. ent->saved_tot_residue = spriv->tot_residue;
  350. }
  351. static void esp_restore_pointers(struct esp *esp, struct esp_cmd_entry *ent)
  352. {
  353. struct scsi_cmnd *cmd = ent->cmd;
  354. struct esp_cmd_priv *spriv = ESP_CMD_PRIV(cmd);
  355. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  356. ent->sense_ptr = ent->saved_sense_ptr;
  357. return;
  358. }
  359. spriv->cur_residue = ent->saved_cur_residue;
  360. spriv->cur_sg = ent->saved_cur_sg;
  361. spriv->tot_residue = ent->saved_tot_residue;
  362. }
  363. static void esp_check_command_len(struct esp *esp, struct scsi_cmnd *cmd)
  364. {
  365. if (cmd->cmd_len == 6 ||
  366. cmd->cmd_len == 10 ||
  367. cmd->cmd_len == 12) {
  368. esp->flags &= ~ESP_FLAG_DOING_SLOWCMD;
  369. } else {
  370. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  371. }
  372. }
  373. static void esp_write_tgt_config3(struct esp *esp, int tgt)
  374. {
  375. if (esp->rev > ESP100A) {
  376. u8 val = esp->target[tgt].esp_config3;
  377. if (val != esp->prev_cfg3) {
  378. esp->prev_cfg3 = val;
  379. esp_write8(val, ESP_CFG3);
  380. }
  381. }
  382. }
  383. static void esp_write_tgt_sync(struct esp *esp, int tgt)
  384. {
  385. u8 off = esp->target[tgt].esp_offset;
  386. u8 per = esp->target[tgt].esp_period;
  387. if (off != esp->prev_soff) {
  388. esp->prev_soff = off;
  389. esp_write8(off, ESP_SOFF);
  390. }
  391. if (per != esp->prev_stp) {
  392. esp->prev_stp = per;
  393. esp_write8(per, ESP_STP);
  394. }
  395. }
  396. static u32 esp_dma_length_limit(struct esp *esp, u32 dma_addr, u32 dma_len)
  397. {
  398. if (esp->rev == FASHME) {
  399. /* Arbitrary segment boundaries, 24-bit counts. */
  400. if (dma_len > (1U << 24))
  401. dma_len = (1U << 24);
  402. } else {
  403. u32 base, end;
  404. /* ESP chip limits other variants by 16-bits of transfer
  405. * count. Actually on FAS100A and FAS236 we could get
  406. * 24-bits of transfer count by enabling ESP_CONFIG2_FENAB
  407. * in the ESP_CFG2 register but that causes other unwanted
  408. * changes so we don't use it currently.
  409. */
  410. if (dma_len > (1U << 16))
  411. dma_len = (1U << 16);
  412. /* All of the DMA variants hooked up to these chips
  413. * cannot handle crossing a 24-bit address boundary.
  414. */
  415. base = dma_addr & ((1U << 24) - 1U);
  416. end = base + dma_len;
  417. if (end > (1U << 24))
  418. end = (1U <<24);
  419. dma_len = end - base;
  420. }
  421. return dma_len;
  422. }
  423. static int esp_need_to_nego_wide(struct esp_target_data *tp)
  424. {
  425. struct scsi_target *target = tp->starget;
  426. return spi_width(target) != tp->nego_goal_width;
  427. }
  428. static int esp_need_to_nego_sync(struct esp_target_data *tp)
  429. {
  430. struct scsi_target *target = tp->starget;
  431. /* When offset is zero, period is "don't care". */
  432. if (!spi_offset(target) && !tp->nego_goal_offset)
  433. return 0;
  434. if (spi_offset(target) == tp->nego_goal_offset &&
  435. spi_period(target) == tp->nego_goal_period)
  436. return 0;
  437. return 1;
  438. }
  439. static int esp_alloc_lun_tag(struct esp_cmd_entry *ent,
  440. struct esp_lun_data *lp)
  441. {
  442. if (!ent->tag[0]) {
  443. /* Non-tagged, slot already taken? */
  444. if (lp->non_tagged_cmd)
  445. return -EBUSY;
  446. if (lp->hold) {
  447. /* We are being held by active tagged
  448. * commands.
  449. */
  450. if (lp->num_tagged)
  451. return -EBUSY;
  452. /* Tagged commands completed, we can unplug
  453. * the queue and run this untagged command.
  454. */
  455. lp->hold = 0;
  456. } else if (lp->num_tagged) {
  457. /* Plug the queue until num_tagged decreases
  458. * to zero in esp_free_lun_tag.
  459. */
  460. lp->hold = 1;
  461. return -EBUSY;
  462. }
  463. lp->non_tagged_cmd = ent;
  464. return 0;
  465. } else {
  466. /* Tagged command, see if blocked by a
  467. * non-tagged one.
  468. */
  469. if (lp->non_tagged_cmd || lp->hold)
  470. return -EBUSY;
  471. }
  472. BUG_ON(lp->tagged_cmds[ent->tag[1]]);
  473. lp->tagged_cmds[ent->tag[1]] = ent;
  474. lp->num_tagged++;
  475. return 0;
  476. }
  477. static void esp_free_lun_tag(struct esp_cmd_entry *ent,
  478. struct esp_lun_data *lp)
  479. {
  480. if (ent->tag[0]) {
  481. BUG_ON(lp->tagged_cmds[ent->tag[1]] != ent);
  482. lp->tagged_cmds[ent->tag[1]] = NULL;
  483. lp->num_tagged--;
  484. } else {
  485. BUG_ON(lp->non_tagged_cmd != ent);
  486. lp->non_tagged_cmd = NULL;
  487. }
  488. }
  489. /* When a contingent allegiance conditon is created, we force feed a
  490. * REQUEST_SENSE command to the device to fetch the sense data. I
  491. * tried many other schemes, relying on the scsi error handling layer
  492. * to send out the REQUEST_SENSE automatically, but this was difficult
  493. * to get right especially in the presence of applications like smartd
  494. * which use SG_IO to send out their own REQUEST_SENSE commands.
  495. */
  496. static void esp_autosense(struct esp *esp, struct esp_cmd_entry *ent)
  497. {
  498. struct scsi_cmnd *cmd = ent->cmd;
  499. struct scsi_device *dev = cmd->device;
  500. int tgt, lun;
  501. u8 *p, val;
  502. tgt = dev->id;
  503. lun = dev->lun;
  504. if (!ent->sense_ptr) {
  505. esp_log_autosense("esp%d: Doing auto-sense for "
  506. "tgt[%d] lun[%d]\n",
  507. esp->host->unique_id, tgt, lun);
  508. ent->sense_ptr = cmd->sense_buffer;
  509. ent->sense_dma = esp->ops->map_single(esp,
  510. ent->sense_ptr,
  511. SCSI_SENSE_BUFFERSIZE,
  512. DMA_FROM_DEVICE);
  513. }
  514. ent->saved_sense_ptr = ent->sense_ptr;
  515. esp->active_cmd = ent;
  516. p = esp->command_block;
  517. esp->msg_out_len = 0;
  518. *p++ = IDENTIFY(0, lun);
  519. *p++ = REQUEST_SENSE;
  520. *p++ = ((dev->scsi_level <= SCSI_2) ?
  521. (lun << 5) : 0);
  522. *p++ = 0;
  523. *p++ = 0;
  524. *p++ = SCSI_SENSE_BUFFERSIZE;
  525. *p++ = 0;
  526. esp->select_state = ESP_SELECT_BASIC;
  527. val = tgt;
  528. if (esp->rev == FASHME)
  529. val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
  530. esp_write8(val, ESP_BUSID);
  531. esp_write_tgt_sync(esp, tgt);
  532. esp_write_tgt_config3(esp, tgt);
  533. val = (p - esp->command_block);
  534. if (esp->rev == FASHME)
  535. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  536. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  537. val, 16, 0, ESP_CMD_DMA | ESP_CMD_SELA);
  538. }
  539. static struct esp_cmd_entry *find_and_prep_issuable_command(struct esp *esp)
  540. {
  541. struct esp_cmd_entry *ent;
  542. list_for_each_entry(ent, &esp->queued_cmds, list) {
  543. struct scsi_cmnd *cmd = ent->cmd;
  544. struct scsi_device *dev = cmd->device;
  545. struct esp_lun_data *lp = dev->hostdata;
  546. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  547. ent->tag[0] = 0;
  548. ent->tag[1] = 0;
  549. return ent;
  550. }
  551. if (!scsi_populate_tag_msg(cmd, &ent->tag[0])) {
  552. ent->tag[0] = 0;
  553. ent->tag[1] = 0;
  554. }
  555. if (esp_alloc_lun_tag(ent, lp) < 0)
  556. continue;
  557. return ent;
  558. }
  559. return NULL;
  560. }
  561. static void esp_maybe_execute_command(struct esp *esp)
  562. {
  563. struct esp_target_data *tp;
  564. struct esp_lun_data *lp;
  565. struct scsi_device *dev;
  566. struct scsi_cmnd *cmd;
  567. struct esp_cmd_entry *ent;
  568. int tgt, lun, i;
  569. u32 val, start_cmd;
  570. u8 *p;
  571. if (esp->active_cmd ||
  572. (esp->flags & ESP_FLAG_RESETTING))
  573. return;
  574. ent = find_and_prep_issuable_command(esp);
  575. if (!ent)
  576. return;
  577. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  578. esp_autosense(esp, ent);
  579. return;
  580. }
  581. cmd = ent->cmd;
  582. dev = cmd->device;
  583. tgt = dev->id;
  584. lun = dev->lun;
  585. tp = &esp->target[tgt];
  586. lp = dev->hostdata;
  587. list_del(&ent->list);
  588. list_add(&ent->list, &esp->active_cmds);
  589. esp->active_cmd = ent;
  590. esp_map_dma(esp, cmd);
  591. esp_save_pointers(esp, ent);
  592. esp_check_command_len(esp, cmd);
  593. p = esp->command_block;
  594. esp->msg_out_len = 0;
  595. if (tp->flags & ESP_TGT_CHECK_NEGO) {
  596. /* Need to negotiate. If the target is broken
  597. * go for synchronous transfers and non-wide.
  598. */
  599. if (tp->flags & ESP_TGT_BROKEN) {
  600. tp->flags &= ~ESP_TGT_DISCONNECT;
  601. tp->nego_goal_period = 0;
  602. tp->nego_goal_offset = 0;
  603. tp->nego_goal_width = 0;
  604. tp->nego_goal_tags = 0;
  605. }
  606. /* If the settings are not changing, skip this. */
  607. if (spi_width(tp->starget) == tp->nego_goal_width &&
  608. spi_period(tp->starget) == tp->nego_goal_period &&
  609. spi_offset(tp->starget) == tp->nego_goal_offset) {
  610. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  611. goto build_identify;
  612. }
  613. if (esp->rev == FASHME && esp_need_to_nego_wide(tp)) {
  614. esp->msg_out_len =
  615. spi_populate_width_msg(&esp->msg_out[0],
  616. (tp->nego_goal_width ?
  617. 1 : 0));
  618. tp->flags |= ESP_TGT_NEGO_WIDE;
  619. } else if (esp_need_to_nego_sync(tp)) {
  620. esp->msg_out_len =
  621. spi_populate_sync_msg(&esp->msg_out[0],
  622. tp->nego_goal_period,
  623. tp->nego_goal_offset);
  624. tp->flags |= ESP_TGT_NEGO_SYNC;
  625. } else {
  626. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  627. }
  628. /* Process it like a slow command. */
  629. if (tp->flags & (ESP_TGT_NEGO_WIDE | ESP_TGT_NEGO_SYNC))
  630. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  631. }
  632. build_identify:
  633. /* If we don't have a lun-data struct yet, we're probing
  634. * so do not disconnect. Also, do not disconnect unless
  635. * we have a tag on this command.
  636. */
  637. if (lp && (tp->flags & ESP_TGT_DISCONNECT) && ent->tag[0])
  638. *p++ = IDENTIFY(1, lun);
  639. else
  640. *p++ = IDENTIFY(0, lun);
  641. if (ent->tag[0] && esp->rev == ESP100) {
  642. /* ESP100 lacks select w/atn3 command, use select
  643. * and stop instead.
  644. */
  645. esp->flags |= ESP_FLAG_DOING_SLOWCMD;
  646. }
  647. if (!(esp->flags & ESP_FLAG_DOING_SLOWCMD)) {
  648. start_cmd = ESP_CMD_DMA | ESP_CMD_SELA;
  649. if (ent->tag[0]) {
  650. *p++ = ent->tag[0];
  651. *p++ = ent->tag[1];
  652. start_cmd = ESP_CMD_DMA | ESP_CMD_SA3;
  653. }
  654. for (i = 0; i < cmd->cmd_len; i++)
  655. *p++ = cmd->cmnd[i];
  656. esp->select_state = ESP_SELECT_BASIC;
  657. } else {
  658. esp->cmd_bytes_left = cmd->cmd_len;
  659. esp->cmd_bytes_ptr = &cmd->cmnd[0];
  660. if (ent->tag[0]) {
  661. for (i = esp->msg_out_len - 1;
  662. i >= 0; i--)
  663. esp->msg_out[i + 2] = esp->msg_out[i];
  664. esp->msg_out[0] = ent->tag[0];
  665. esp->msg_out[1] = ent->tag[1];
  666. esp->msg_out_len += 2;
  667. }
  668. start_cmd = ESP_CMD_DMA | ESP_CMD_SELAS;
  669. esp->select_state = ESP_SELECT_MSGOUT;
  670. }
  671. val = tgt;
  672. if (esp->rev == FASHME)
  673. val |= ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT;
  674. esp_write8(val, ESP_BUSID);
  675. esp_write_tgt_sync(esp, tgt);
  676. esp_write_tgt_config3(esp, tgt);
  677. val = (p - esp->command_block);
  678. if (esp_debug & ESP_DEBUG_SCSICMD) {
  679. printk("ESP: tgt[%d] lun[%d] scsi_cmd [ ", tgt, lun);
  680. for (i = 0; i < cmd->cmd_len; i++)
  681. printk("%02x ", cmd->cmnd[i]);
  682. printk("]\n");
  683. }
  684. if (esp->rev == FASHME)
  685. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  686. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  687. val, 16, 0, start_cmd);
  688. }
  689. static struct esp_cmd_entry *esp_get_ent(struct esp *esp)
  690. {
  691. struct list_head *head = &esp->esp_cmd_pool;
  692. struct esp_cmd_entry *ret;
  693. if (list_empty(head)) {
  694. ret = kzalloc(sizeof(struct esp_cmd_entry), GFP_ATOMIC);
  695. } else {
  696. ret = list_entry(head->next, struct esp_cmd_entry, list);
  697. list_del(&ret->list);
  698. memset(ret, 0, sizeof(*ret));
  699. }
  700. return ret;
  701. }
  702. static void esp_put_ent(struct esp *esp, struct esp_cmd_entry *ent)
  703. {
  704. list_add(&ent->list, &esp->esp_cmd_pool);
  705. }
  706. static void esp_cmd_is_done(struct esp *esp, struct esp_cmd_entry *ent,
  707. struct scsi_cmnd *cmd, unsigned int result)
  708. {
  709. struct scsi_device *dev = cmd->device;
  710. int tgt = dev->id;
  711. int lun = dev->lun;
  712. esp->active_cmd = NULL;
  713. esp_unmap_dma(esp, cmd);
  714. esp_free_lun_tag(ent, dev->hostdata);
  715. cmd->result = result;
  716. if (ent->eh_done) {
  717. complete(ent->eh_done);
  718. ent->eh_done = NULL;
  719. }
  720. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  721. esp->ops->unmap_single(esp, ent->sense_dma,
  722. SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
  723. ent->sense_ptr = NULL;
  724. /* Restore the message/status bytes to what we actually
  725. * saw originally. Also, report that we are providing
  726. * the sense data.
  727. */
  728. cmd->result = ((DRIVER_SENSE << 24) |
  729. (DID_OK << 16) |
  730. (COMMAND_COMPLETE << 8) |
  731. (SAM_STAT_CHECK_CONDITION << 0));
  732. ent->flags &= ~ESP_CMD_FLAG_AUTOSENSE;
  733. if (esp_debug & ESP_DEBUG_AUTOSENSE) {
  734. int i;
  735. printk("esp%d: tgt[%d] lun[%d] AUTO SENSE[ ",
  736. esp->host->unique_id, tgt, lun);
  737. for (i = 0; i < 18; i++)
  738. printk("%02x ", cmd->sense_buffer[i]);
  739. printk("]\n");
  740. }
  741. }
  742. cmd->scsi_done(cmd);
  743. list_del(&ent->list);
  744. esp_put_ent(esp, ent);
  745. esp_maybe_execute_command(esp);
  746. }
  747. static unsigned int compose_result(unsigned int status, unsigned int message,
  748. unsigned int driver_code)
  749. {
  750. return (status | (message << 8) | (driver_code << 16));
  751. }
  752. static void esp_event_queue_full(struct esp *esp, struct esp_cmd_entry *ent)
  753. {
  754. struct scsi_device *dev = ent->cmd->device;
  755. struct esp_lun_data *lp = dev->hostdata;
  756. scsi_track_queue_full(dev, lp->num_tagged - 1);
  757. }
  758. static int esp_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  759. {
  760. struct scsi_device *dev = cmd->device;
  761. struct esp *esp = shost_priv(dev->host);
  762. struct esp_cmd_priv *spriv;
  763. struct esp_cmd_entry *ent;
  764. ent = esp_get_ent(esp);
  765. if (!ent)
  766. return SCSI_MLQUEUE_HOST_BUSY;
  767. ent->cmd = cmd;
  768. cmd->scsi_done = done;
  769. spriv = ESP_CMD_PRIV(cmd);
  770. spriv->u.dma_addr = ~(dma_addr_t)0x0;
  771. list_add_tail(&ent->list, &esp->queued_cmds);
  772. esp_maybe_execute_command(esp);
  773. return 0;
  774. }
  775. static int esp_check_gross_error(struct esp *esp)
  776. {
  777. if (esp->sreg & ESP_STAT_SPAM) {
  778. /* Gross Error, could be one of:
  779. * - top of fifo overwritten
  780. * - top of command register overwritten
  781. * - DMA programmed with wrong direction
  782. * - improper phase change
  783. */
  784. printk(KERN_ERR PFX "esp%d: Gross error sreg[%02x]\n",
  785. esp->host->unique_id, esp->sreg);
  786. /* XXX Reset the chip. XXX */
  787. return 1;
  788. }
  789. return 0;
  790. }
  791. static int esp_check_spur_intr(struct esp *esp)
  792. {
  793. switch (esp->rev) {
  794. case ESP100:
  795. case ESP100A:
  796. /* The interrupt pending bit of the status register cannot
  797. * be trusted on these revisions.
  798. */
  799. esp->sreg &= ~ESP_STAT_INTR;
  800. break;
  801. default:
  802. if (!(esp->sreg & ESP_STAT_INTR)) {
  803. esp->ireg = esp_read8(ESP_INTRPT);
  804. if (esp->ireg & ESP_INTR_SR)
  805. return 1;
  806. /* If the DMA is indicating interrupt pending and the
  807. * ESP is not, the only possibility is a DMA error.
  808. */
  809. if (!esp->ops->dma_error(esp)) {
  810. printk(KERN_ERR PFX "esp%d: Spurious irq, "
  811. "sreg=%x.\n",
  812. esp->host->unique_id, esp->sreg);
  813. return -1;
  814. }
  815. printk(KERN_ERR PFX "esp%d: DMA error\n",
  816. esp->host->unique_id);
  817. /* XXX Reset the chip. XXX */
  818. return -1;
  819. }
  820. break;
  821. }
  822. return 0;
  823. }
  824. static void esp_schedule_reset(struct esp *esp)
  825. {
  826. esp_log_reset("ESP: esp_schedule_reset() from %p\n",
  827. __builtin_return_address(0));
  828. esp->flags |= ESP_FLAG_RESETTING;
  829. esp_event(esp, ESP_EVENT_RESET);
  830. }
  831. /* In order to avoid having to add a special half-reconnected state
  832. * into the driver we just sit here and poll through the rest of
  833. * the reselection process to get the tag message bytes.
  834. */
  835. static struct esp_cmd_entry *esp_reconnect_with_tag(struct esp *esp,
  836. struct esp_lun_data *lp)
  837. {
  838. struct esp_cmd_entry *ent;
  839. int i;
  840. if (!lp->num_tagged) {
  841. printk(KERN_ERR PFX "esp%d: Reconnect w/num_tagged==0\n",
  842. esp->host->unique_id);
  843. return NULL;
  844. }
  845. esp_log_reconnect("ESP: reconnect tag, ");
  846. for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
  847. if (esp->ops->irq_pending(esp))
  848. break;
  849. }
  850. if (i == ESP_QUICKIRQ_LIMIT) {
  851. printk(KERN_ERR PFX "esp%d: Reconnect IRQ1 timeout\n",
  852. esp->host->unique_id);
  853. return NULL;
  854. }
  855. esp->sreg = esp_read8(ESP_STATUS);
  856. esp->ireg = esp_read8(ESP_INTRPT);
  857. esp_log_reconnect("IRQ(%d:%x:%x), ",
  858. i, esp->ireg, esp->sreg);
  859. if (esp->ireg & ESP_INTR_DC) {
  860. printk(KERN_ERR PFX "esp%d: Reconnect, got disconnect.\n",
  861. esp->host->unique_id);
  862. return NULL;
  863. }
  864. if ((esp->sreg & ESP_STAT_PMASK) != ESP_MIP) {
  865. printk(KERN_ERR PFX "esp%d: Reconnect, not MIP sreg[%02x].\n",
  866. esp->host->unique_id, esp->sreg);
  867. return NULL;
  868. }
  869. /* DMA in the tag bytes... */
  870. esp->command_block[0] = 0xff;
  871. esp->command_block[1] = 0xff;
  872. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  873. 2, 2, 1, ESP_CMD_DMA | ESP_CMD_TI);
  874. /* ACK the msssage. */
  875. scsi_esp_cmd(esp, ESP_CMD_MOK);
  876. for (i = 0; i < ESP_RESELECT_TAG_LIMIT; i++) {
  877. if (esp->ops->irq_pending(esp)) {
  878. esp->sreg = esp_read8(ESP_STATUS);
  879. esp->ireg = esp_read8(ESP_INTRPT);
  880. if (esp->ireg & ESP_INTR_FDONE)
  881. break;
  882. }
  883. udelay(1);
  884. }
  885. if (i == ESP_RESELECT_TAG_LIMIT) {
  886. printk(KERN_ERR PFX "esp%d: Reconnect IRQ2 timeout\n",
  887. esp->host->unique_id);
  888. return NULL;
  889. }
  890. esp->ops->dma_drain(esp);
  891. esp->ops->dma_invalidate(esp);
  892. esp_log_reconnect("IRQ2(%d:%x:%x) tag[%x:%x]\n",
  893. i, esp->ireg, esp->sreg,
  894. esp->command_block[0],
  895. esp->command_block[1]);
  896. if (esp->command_block[0] < SIMPLE_QUEUE_TAG ||
  897. esp->command_block[0] > ORDERED_QUEUE_TAG) {
  898. printk(KERN_ERR PFX "esp%d: Reconnect, bad tag "
  899. "type %02x.\n",
  900. esp->host->unique_id, esp->command_block[0]);
  901. return NULL;
  902. }
  903. ent = lp->tagged_cmds[esp->command_block[1]];
  904. if (!ent) {
  905. printk(KERN_ERR PFX "esp%d: Reconnect, no entry for "
  906. "tag %02x.\n",
  907. esp->host->unique_id, esp->command_block[1]);
  908. return NULL;
  909. }
  910. return ent;
  911. }
  912. static int esp_reconnect(struct esp *esp)
  913. {
  914. struct esp_cmd_entry *ent;
  915. struct esp_target_data *tp;
  916. struct esp_lun_data *lp;
  917. struct scsi_device *dev;
  918. int target, lun;
  919. BUG_ON(esp->active_cmd);
  920. if (esp->rev == FASHME) {
  921. /* FASHME puts the target and lun numbers directly
  922. * into the fifo.
  923. */
  924. target = esp->fifo[0];
  925. lun = esp->fifo[1] & 0x7;
  926. } else {
  927. u8 bits = esp_read8(ESP_FDATA);
  928. /* Older chips put the lun directly into the fifo, but
  929. * the target is given as a sample of the arbitration
  930. * lines on the bus at reselection time. So we should
  931. * see the ID of the ESP and the one reconnecting target
  932. * set in the bitmap.
  933. */
  934. if (!(bits & esp->scsi_id_mask))
  935. goto do_reset;
  936. bits &= ~esp->scsi_id_mask;
  937. if (!bits || (bits & (bits - 1)))
  938. goto do_reset;
  939. target = ffs(bits) - 1;
  940. lun = (esp_read8(ESP_FDATA) & 0x7);
  941. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  942. if (esp->rev == ESP100) {
  943. u8 ireg = esp_read8(ESP_INTRPT);
  944. /* This chip has a bug during reselection that can
  945. * cause a spurious illegal-command interrupt, which
  946. * we simply ACK here. Another possibility is a bus
  947. * reset so we must check for that.
  948. */
  949. if (ireg & ESP_INTR_SR)
  950. goto do_reset;
  951. }
  952. scsi_esp_cmd(esp, ESP_CMD_NULL);
  953. }
  954. esp_write_tgt_sync(esp, target);
  955. esp_write_tgt_config3(esp, target);
  956. scsi_esp_cmd(esp, ESP_CMD_MOK);
  957. if (esp->rev == FASHME)
  958. esp_write8(target | ESP_BUSID_RESELID | ESP_BUSID_CTR32BIT,
  959. ESP_BUSID);
  960. tp = &esp->target[target];
  961. dev = __scsi_device_lookup_by_target(tp->starget, lun);
  962. if (!dev) {
  963. printk(KERN_ERR PFX "esp%d: Reconnect, no lp "
  964. "tgt[%u] lun[%u]\n",
  965. esp->host->unique_id, target, lun);
  966. goto do_reset;
  967. }
  968. lp = dev->hostdata;
  969. ent = lp->non_tagged_cmd;
  970. if (!ent) {
  971. ent = esp_reconnect_with_tag(esp, lp);
  972. if (!ent)
  973. goto do_reset;
  974. }
  975. esp->active_cmd = ent;
  976. if (ent->flags & ESP_CMD_FLAG_ABORT) {
  977. esp->msg_out[0] = ABORT_TASK_SET;
  978. esp->msg_out_len = 1;
  979. scsi_esp_cmd(esp, ESP_CMD_SATN);
  980. }
  981. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  982. esp_restore_pointers(esp, ent);
  983. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  984. return 1;
  985. do_reset:
  986. esp_schedule_reset(esp);
  987. return 0;
  988. }
  989. static int esp_finish_select(struct esp *esp)
  990. {
  991. struct esp_cmd_entry *ent;
  992. struct scsi_cmnd *cmd;
  993. u8 orig_select_state;
  994. orig_select_state = esp->select_state;
  995. /* No longer selecting. */
  996. esp->select_state = ESP_SELECT_NONE;
  997. esp->seqreg = esp_read8(ESP_SSTEP) & ESP_STEP_VBITS;
  998. ent = esp->active_cmd;
  999. cmd = ent->cmd;
  1000. if (esp->ops->dma_error(esp)) {
  1001. /* If we see a DMA error during or as a result of selection,
  1002. * all bets are off.
  1003. */
  1004. esp_schedule_reset(esp);
  1005. esp_cmd_is_done(esp, ent, cmd, (DID_ERROR << 16));
  1006. return 0;
  1007. }
  1008. esp->ops->dma_invalidate(esp);
  1009. if (esp->ireg == (ESP_INTR_RSEL | ESP_INTR_FDONE)) {
  1010. struct esp_target_data *tp = &esp->target[cmd->device->id];
  1011. /* Carefully back out of the selection attempt. Release
  1012. * resources (such as DMA mapping & TAG) and reset state (such
  1013. * as message out and command delivery variables).
  1014. */
  1015. if (!(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
  1016. esp_unmap_dma(esp, cmd);
  1017. esp_free_lun_tag(ent, cmd->device->hostdata);
  1018. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_NEGO_WIDE);
  1019. esp->flags &= ~ESP_FLAG_DOING_SLOWCMD;
  1020. esp->cmd_bytes_ptr = NULL;
  1021. esp->cmd_bytes_left = 0;
  1022. } else {
  1023. esp->ops->unmap_single(esp, ent->sense_dma,
  1024. SCSI_SENSE_BUFFERSIZE,
  1025. DMA_FROM_DEVICE);
  1026. ent->sense_ptr = NULL;
  1027. }
  1028. /* Now that the state is unwound properly, put back onto
  1029. * the issue queue. This command is no longer active.
  1030. */
  1031. list_del(&ent->list);
  1032. list_add(&ent->list, &esp->queued_cmds);
  1033. esp->active_cmd = NULL;
  1034. /* Return value ignored by caller, it directly invokes
  1035. * esp_reconnect().
  1036. */
  1037. return 0;
  1038. }
  1039. if (esp->ireg == ESP_INTR_DC) {
  1040. struct scsi_device *dev = cmd->device;
  1041. /* Disconnect. Make sure we re-negotiate sync and
  1042. * wide parameters if this target starts responding
  1043. * again in the future.
  1044. */
  1045. esp->target[dev->id].flags |= ESP_TGT_CHECK_NEGO;
  1046. scsi_esp_cmd(esp, ESP_CMD_ESEL);
  1047. esp_cmd_is_done(esp, ent, cmd, (DID_BAD_TARGET << 16));
  1048. return 1;
  1049. }
  1050. if (esp->ireg == (ESP_INTR_FDONE | ESP_INTR_BSERV)) {
  1051. /* Selection successful. On pre-FAST chips we have
  1052. * to do a NOP and possibly clean out the FIFO.
  1053. */
  1054. if (esp->rev <= ESP236) {
  1055. int fcnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  1056. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1057. if (!fcnt &&
  1058. (!esp->prev_soff ||
  1059. ((esp->sreg & ESP_STAT_PMASK) != ESP_DIP)))
  1060. esp_flush_fifo(esp);
  1061. }
  1062. /* If we are doing a slow command, negotiation, etc.
  1063. * we'll do the right thing as we transition to the
  1064. * next phase.
  1065. */
  1066. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1067. return 0;
  1068. }
  1069. printk("ESP: Unexpected selection completion ireg[%x].\n",
  1070. esp->ireg);
  1071. esp_schedule_reset(esp);
  1072. return 0;
  1073. }
  1074. static int esp_data_bytes_sent(struct esp *esp, struct esp_cmd_entry *ent,
  1075. struct scsi_cmnd *cmd)
  1076. {
  1077. int fifo_cnt, ecount, bytes_sent, flush_fifo;
  1078. fifo_cnt = esp_read8(ESP_FFLAGS) & ESP_FF_FBYTES;
  1079. if (esp->prev_cfg3 & ESP_CONFIG3_EWIDE)
  1080. fifo_cnt <<= 1;
  1081. ecount = 0;
  1082. if (!(esp->sreg & ESP_STAT_TCNT)) {
  1083. ecount = ((unsigned int)esp_read8(ESP_TCLOW) |
  1084. (((unsigned int)esp_read8(ESP_TCMED)) << 8));
  1085. if (esp->rev == FASHME)
  1086. ecount |= ((unsigned int)esp_read8(FAS_RLO)) << 16;
  1087. }
  1088. bytes_sent = esp->data_dma_len;
  1089. bytes_sent -= ecount;
  1090. if (!(ent->flags & ESP_CMD_FLAG_WRITE))
  1091. bytes_sent -= fifo_cnt;
  1092. flush_fifo = 0;
  1093. if (!esp->prev_soff) {
  1094. /* Synchronous data transfer, always flush fifo. */
  1095. flush_fifo = 1;
  1096. } else {
  1097. if (esp->rev == ESP100) {
  1098. u32 fflags, phase;
  1099. /* ESP100 has a chip bug where in the synchronous data
  1100. * phase it can mistake a final long REQ pulse from the
  1101. * target as an extra data byte. Fun.
  1102. *
  1103. * To detect this case we resample the status register
  1104. * and fifo flags. If we're still in a data phase and
  1105. * we see spurious chunks in the fifo, we return error
  1106. * to the caller which should reset and set things up
  1107. * such that we only try future transfers to this
  1108. * target in synchronous mode.
  1109. */
  1110. esp->sreg = esp_read8(ESP_STATUS);
  1111. phase = esp->sreg & ESP_STAT_PMASK;
  1112. fflags = esp_read8(ESP_FFLAGS);
  1113. if ((phase == ESP_DOP &&
  1114. (fflags & ESP_FF_ONOTZERO)) ||
  1115. (phase == ESP_DIP &&
  1116. (fflags & ESP_FF_FBYTES)))
  1117. return -1;
  1118. }
  1119. if (!(ent->flags & ESP_CMD_FLAG_WRITE))
  1120. flush_fifo = 1;
  1121. }
  1122. if (flush_fifo)
  1123. esp_flush_fifo(esp);
  1124. return bytes_sent;
  1125. }
  1126. static void esp_setsync(struct esp *esp, struct esp_target_data *tp,
  1127. u8 scsi_period, u8 scsi_offset,
  1128. u8 esp_stp, u8 esp_soff)
  1129. {
  1130. spi_period(tp->starget) = scsi_period;
  1131. spi_offset(tp->starget) = scsi_offset;
  1132. spi_width(tp->starget) = (tp->flags & ESP_TGT_WIDE) ? 1 : 0;
  1133. if (esp_soff) {
  1134. esp_stp &= 0x1f;
  1135. esp_soff |= esp->radelay;
  1136. if (esp->rev >= FAS236) {
  1137. u8 bit = ESP_CONFIG3_FSCSI;
  1138. if (esp->rev >= FAS100A)
  1139. bit = ESP_CONFIG3_FAST;
  1140. if (scsi_period < 50) {
  1141. if (esp->rev == FASHME)
  1142. esp_soff &= ~esp->radelay;
  1143. tp->esp_config3 |= bit;
  1144. } else {
  1145. tp->esp_config3 &= ~bit;
  1146. }
  1147. esp->prev_cfg3 = tp->esp_config3;
  1148. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1149. }
  1150. }
  1151. tp->esp_period = esp->prev_stp = esp_stp;
  1152. tp->esp_offset = esp->prev_soff = esp_soff;
  1153. esp_write8(esp_soff, ESP_SOFF);
  1154. esp_write8(esp_stp, ESP_STP);
  1155. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
  1156. spi_display_xfer_agreement(tp->starget);
  1157. }
  1158. static void esp_msgin_reject(struct esp *esp)
  1159. {
  1160. struct esp_cmd_entry *ent = esp->active_cmd;
  1161. struct scsi_cmnd *cmd = ent->cmd;
  1162. struct esp_target_data *tp;
  1163. int tgt;
  1164. tgt = cmd->device->id;
  1165. tp = &esp->target[tgt];
  1166. if (tp->flags & ESP_TGT_NEGO_WIDE) {
  1167. tp->flags &= ~(ESP_TGT_NEGO_WIDE | ESP_TGT_WIDE);
  1168. if (!esp_need_to_nego_sync(tp)) {
  1169. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  1170. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1171. } else {
  1172. esp->msg_out_len =
  1173. spi_populate_sync_msg(&esp->msg_out[0],
  1174. tp->nego_goal_period,
  1175. tp->nego_goal_offset);
  1176. tp->flags |= ESP_TGT_NEGO_SYNC;
  1177. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1178. }
  1179. return;
  1180. }
  1181. if (tp->flags & ESP_TGT_NEGO_SYNC) {
  1182. tp->flags &= ~(ESP_TGT_NEGO_SYNC | ESP_TGT_CHECK_NEGO);
  1183. tp->esp_period = 0;
  1184. tp->esp_offset = 0;
  1185. esp_setsync(esp, tp, 0, 0, 0, 0);
  1186. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1187. return;
  1188. }
  1189. esp->msg_out[0] = ABORT_TASK_SET;
  1190. esp->msg_out_len = 1;
  1191. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1192. }
  1193. static void esp_msgin_sdtr(struct esp *esp, struct esp_target_data *tp)
  1194. {
  1195. u8 period = esp->msg_in[3];
  1196. u8 offset = esp->msg_in[4];
  1197. u8 stp;
  1198. if (!(tp->flags & ESP_TGT_NEGO_SYNC))
  1199. goto do_reject;
  1200. if (offset > 15)
  1201. goto do_reject;
  1202. if (offset) {
  1203. int rounded_up, one_clock;
  1204. if (period > esp->max_period) {
  1205. period = offset = 0;
  1206. goto do_sdtr;
  1207. }
  1208. if (period < esp->min_period)
  1209. goto do_reject;
  1210. one_clock = esp->ccycle / 1000;
  1211. rounded_up = (period << 2);
  1212. rounded_up = (rounded_up + one_clock - 1) / one_clock;
  1213. stp = rounded_up;
  1214. if (stp && esp->rev >= FAS236) {
  1215. if (stp >= 50)
  1216. stp--;
  1217. }
  1218. } else {
  1219. stp = 0;
  1220. }
  1221. esp_setsync(esp, tp, period, offset, stp, offset);
  1222. return;
  1223. do_reject:
  1224. esp->msg_out[0] = MESSAGE_REJECT;
  1225. esp->msg_out_len = 1;
  1226. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1227. return;
  1228. do_sdtr:
  1229. tp->nego_goal_period = period;
  1230. tp->nego_goal_offset = offset;
  1231. esp->msg_out_len =
  1232. spi_populate_sync_msg(&esp->msg_out[0],
  1233. tp->nego_goal_period,
  1234. tp->nego_goal_offset);
  1235. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1236. }
  1237. static void esp_msgin_wdtr(struct esp *esp, struct esp_target_data *tp)
  1238. {
  1239. int size = 8 << esp->msg_in[3];
  1240. u8 cfg3;
  1241. if (esp->rev != FASHME)
  1242. goto do_reject;
  1243. if (size != 8 && size != 16)
  1244. goto do_reject;
  1245. if (!(tp->flags & ESP_TGT_NEGO_WIDE))
  1246. goto do_reject;
  1247. cfg3 = tp->esp_config3;
  1248. if (size == 16) {
  1249. tp->flags |= ESP_TGT_WIDE;
  1250. cfg3 |= ESP_CONFIG3_EWIDE;
  1251. } else {
  1252. tp->flags &= ~ESP_TGT_WIDE;
  1253. cfg3 &= ~ESP_CONFIG3_EWIDE;
  1254. }
  1255. tp->esp_config3 = cfg3;
  1256. esp->prev_cfg3 = cfg3;
  1257. esp_write8(cfg3, ESP_CFG3);
  1258. tp->flags &= ~ESP_TGT_NEGO_WIDE;
  1259. spi_period(tp->starget) = 0;
  1260. spi_offset(tp->starget) = 0;
  1261. if (!esp_need_to_nego_sync(tp)) {
  1262. tp->flags &= ~ESP_TGT_CHECK_NEGO;
  1263. scsi_esp_cmd(esp, ESP_CMD_RATN);
  1264. } else {
  1265. esp->msg_out_len =
  1266. spi_populate_sync_msg(&esp->msg_out[0],
  1267. tp->nego_goal_period,
  1268. tp->nego_goal_offset);
  1269. tp->flags |= ESP_TGT_NEGO_SYNC;
  1270. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1271. }
  1272. return;
  1273. do_reject:
  1274. esp->msg_out[0] = MESSAGE_REJECT;
  1275. esp->msg_out_len = 1;
  1276. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1277. }
  1278. static void esp_msgin_extended(struct esp *esp)
  1279. {
  1280. struct esp_cmd_entry *ent = esp->active_cmd;
  1281. struct scsi_cmnd *cmd = ent->cmd;
  1282. struct esp_target_data *tp;
  1283. int tgt = cmd->device->id;
  1284. tp = &esp->target[tgt];
  1285. if (esp->msg_in[2] == EXTENDED_SDTR) {
  1286. esp_msgin_sdtr(esp, tp);
  1287. return;
  1288. }
  1289. if (esp->msg_in[2] == EXTENDED_WDTR) {
  1290. esp_msgin_wdtr(esp, tp);
  1291. return;
  1292. }
  1293. printk("ESP: Unexpected extended msg type %x\n",
  1294. esp->msg_in[2]);
  1295. esp->msg_out[0] = ABORT_TASK_SET;
  1296. esp->msg_out_len = 1;
  1297. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1298. }
  1299. /* Analyze msgin bytes received from target so far. Return non-zero
  1300. * if there are more bytes needed to complete the message.
  1301. */
  1302. static int esp_msgin_process(struct esp *esp)
  1303. {
  1304. u8 msg0 = esp->msg_in[0];
  1305. int len = esp->msg_in_len;
  1306. if (msg0 & 0x80) {
  1307. /* Identify */
  1308. printk("ESP: Unexpected msgin identify\n");
  1309. return 0;
  1310. }
  1311. switch (msg0) {
  1312. case EXTENDED_MESSAGE:
  1313. if (len == 1)
  1314. return 1;
  1315. if (len < esp->msg_in[1] + 2)
  1316. return 1;
  1317. esp_msgin_extended(esp);
  1318. return 0;
  1319. case IGNORE_WIDE_RESIDUE: {
  1320. struct esp_cmd_entry *ent;
  1321. struct esp_cmd_priv *spriv;
  1322. if (len == 1)
  1323. return 1;
  1324. if (esp->msg_in[1] != 1)
  1325. goto do_reject;
  1326. ent = esp->active_cmd;
  1327. spriv = ESP_CMD_PRIV(ent->cmd);
  1328. if (spriv->cur_residue == sg_dma_len(spriv->cur_sg)) {
  1329. spriv->cur_sg--;
  1330. spriv->cur_residue = 1;
  1331. } else
  1332. spriv->cur_residue++;
  1333. spriv->tot_residue++;
  1334. return 0;
  1335. }
  1336. case NOP:
  1337. return 0;
  1338. case RESTORE_POINTERS:
  1339. esp_restore_pointers(esp, esp->active_cmd);
  1340. return 0;
  1341. case SAVE_POINTERS:
  1342. esp_save_pointers(esp, esp->active_cmd);
  1343. return 0;
  1344. case COMMAND_COMPLETE:
  1345. case DISCONNECT: {
  1346. struct esp_cmd_entry *ent = esp->active_cmd;
  1347. ent->message = msg0;
  1348. esp_event(esp, ESP_EVENT_FREE_BUS);
  1349. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1350. return 0;
  1351. }
  1352. case MESSAGE_REJECT:
  1353. esp_msgin_reject(esp);
  1354. return 0;
  1355. default:
  1356. do_reject:
  1357. esp->msg_out[0] = MESSAGE_REJECT;
  1358. esp->msg_out_len = 1;
  1359. scsi_esp_cmd(esp, ESP_CMD_SATN);
  1360. return 0;
  1361. }
  1362. }
  1363. static int esp_process_event(struct esp *esp)
  1364. {
  1365. int write;
  1366. again:
  1367. write = 0;
  1368. switch (esp->event) {
  1369. case ESP_EVENT_CHECK_PHASE:
  1370. switch (esp->sreg & ESP_STAT_PMASK) {
  1371. case ESP_DOP:
  1372. esp_event(esp, ESP_EVENT_DATA_OUT);
  1373. break;
  1374. case ESP_DIP:
  1375. esp_event(esp, ESP_EVENT_DATA_IN);
  1376. break;
  1377. case ESP_STATP:
  1378. esp_flush_fifo(esp);
  1379. scsi_esp_cmd(esp, ESP_CMD_ICCSEQ);
  1380. esp_event(esp, ESP_EVENT_STATUS);
  1381. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1382. return 1;
  1383. case ESP_MOP:
  1384. esp_event(esp, ESP_EVENT_MSGOUT);
  1385. break;
  1386. case ESP_MIP:
  1387. esp_event(esp, ESP_EVENT_MSGIN);
  1388. break;
  1389. case ESP_CMDP:
  1390. esp_event(esp, ESP_EVENT_CMD_START);
  1391. break;
  1392. default:
  1393. printk("ESP: Unexpected phase, sreg=%02x\n",
  1394. esp->sreg);
  1395. esp_schedule_reset(esp);
  1396. return 0;
  1397. }
  1398. goto again;
  1399. break;
  1400. case ESP_EVENT_DATA_IN:
  1401. write = 1;
  1402. /* fallthru */
  1403. case ESP_EVENT_DATA_OUT: {
  1404. struct esp_cmd_entry *ent = esp->active_cmd;
  1405. struct scsi_cmnd *cmd = ent->cmd;
  1406. dma_addr_t dma_addr = esp_cur_dma_addr(ent, cmd);
  1407. unsigned int dma_len = esp_cur_dma_len(ent, cmd);
  1408. if (esp->rev == ESP100)
  1409. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1410. if (write)
  1411. ent->flags |= ESP_CMD_FLAG_WRITE;
  1412. else
  1413. ent->flags &= ~ESP_CMD_FLAG_WRITE;
  1414. dma_len = esp_dma_length_limit(esp, dma_addr, dma_len);
  1415. esp->data_dma_len = dma_len;
  1416. if (!dma_len) {
  1417. printk(KERN_ERR PFX "esp%d: DMA length is zero!\n",
  1418. esp->host->unique_id);
  1419. printk(KERN_ERR PFX "esp%d: cur adr[%08llx] len[%08x]\n",
  1420. esp->host->unique_id,
  1421. (unsigned long long)esp_cur_dma_addr(ent, cmd),
  1422. esp_cur_dma_len(ent, cmd));
  1423. esp_schedule_reset(esp);
  1424. return 0;
  1425. }
  1426. esp_log_datastart("ESP: start data addr[%08llx] len[%u] "
  1427. "write(%d)\n",
  1428. (unsigned long long)dma_addr, dma_len, write);
  1429. esp->ops->send_dma_cmd(esp, dma_addr, dma_len, dma_len,
  1430. write, ESP_CMD_DMA | ESP_CMD_TI);
  1431. esp_event(esp, ESP_EVENT_DATA_DONE);
  1432. break;
  1433. }
  1434. case ESP_EVENT_DATA_DONE: {
  1435. struct esp_cmd_entry *ent = esp->active_cmd;
  1436. struct scsi_cmnd *cmd = ent->cmd;
  1437. int bytes_sent;
  1438. if (esp->ops->dma_error(esp)) {
  1439. printk("ESP: data done, DMA error, resetting\n");
  1440. esp_schedule_reset(esp);
  1441. return 0;
  1442. }
  1443. if (ent->flags & ESP_CMD_FLAG_WRITE) {
  1444. /* XXX parity errors, etc. XXX */
  1445. esp->ops->dma_drain(esp);
  1446. }
  1447. esp->ops->dma_invalidate(esp);
  1448. if (esp->ireg != ESP_INTR_BSERV) {
  1449. /* We should always see exactly a bus-service
  1450. * interrupt at the end of a successful transfer.
  1451. */
  1452. printk("ESP: data done, not BSERV, resetting\n");
  1453. esp_schedule_reset(esp);
  1454. return 0;
  1455. }
  1456. bytes_sent = esp_data_bytes_sent(esp, ent, cmd);
  1457. esp_log_datadone("ESP: data done flgs[%x] sent[%d]\n",
  1458. ent->flags, bytes_sent);
  1459. if (bytes_sent < 0) {
  1460. /* XXX force sync mode for this target XXX */
  1461. esp_schedule_reset(esp);
  1462. return 0;
  1463. }
  1464. esp_advance_dma(esp, ent, cmd, bytes_sent);
  1465. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1466. goto again;
  1467. break;
  1468. }
  1469. case ESP_EVENT_STATUS: {
  1470. struct esp_cmd_entry *ent = esp->active_cmd;
  1471. if (esp->ireg & ESP_INTR_FDONE) {
  1472. ent->status = esp_read8(ESP_FDATA);
  1473. ent->message = esp_read8(ESP_FDATA);
  1474. scsi_esp_cmd(esp, ESP_CMD_MOK);
  1475. } else if (esp->ireg == ESP_INTR_BSERV) {
  1476. ent->status = esp_read8(ESP_FDATA);
  1477. ent->message = 0xff;
  1478. esp_event(esp, ESP_EVENT_MSGIN);
  1479. return 0;
  1480. }
  1481. if (ent->message != COMMAND_COMPLETE) {
  1482. printk("ESP: Unexpected message %x in status\n",
  1483. ent->message);
  1484. esp_schedule_reset(esp);
  1485. return 0;
  1486. }
  1487. esp_event(esp, ESP_EVENT_FREE_BUS);
  1488. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1489. break;
  1490. }
  1491. case ESP_EVENT_FREE_BUS: {
  1492. struct esp_cmd_entry *ent = esp->active_cmd;
  1493. struct scsi_cmnd *cmd = ent->cmd;
  1494. if (ent->message == COMMAND_COMPLETE ||
  1495. ent->message == DISCONNECT)
  1496. scsi_esp_cmd(esp, ESP_CMD_ESEL);
  1497. if (ent->message == COMMAND_COMPLETE) {
  1498. esp_log_cmddone("ESP: Command done status[%x] "
  1499. "message[%x]\n",
  1500. ent->status, ent->message);
  1501. if (ent->status == SAM_STAT_TASK_SET_FULL)
  1502. esp_event_queue_full(esp, ent);
  1503. if (ent->status == SAM_STAT_CHECK_CONDITION &&
  1504. !(ent->flags & ESP_CMD_FLAG_AUTOSENSE)) {
  1505. ent->flags |= ESP_CMD_FLAG_AUTOSENSE;
  1506. esp_autosense(esp, ent);
  1507. } else {
  1508. esp_cmd_is_done(esp, ent, cmd,
  1509. compose_result(ent->status,
  1510. ent->message,
  1511. DID_OK));
  1512. }
  1513. } else if (ent->message == DISCONNECT) {
  1514. esp_log_disconnect("ESP: Disconnecting tgt[%d] "
  1515. "tag[%x:%x]\n",
  1516. cmd->device->id,
  1517. ent->tag[0], ent->tag[1]);
  1518. esp->active_cmd = NULL;
  1519. esp_maybe_execute_command(esp);
  1520. } else {
  1521. printk("ESP: Unexpected message %x in freebus\n",
  1522. ent->message);
  1523. esp_schedule_reset(esp);
  1524. return 0;
  1525. }
  1526. if (esp->active_cmd)
  1527. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1528. break;
  1529. }
  1530. case ESP_EVENT_MSGOUT: {
  1531. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1532. if (esp_debug & ESP_DEBUG_MSGOUT) {
  1533. int i;
  1534. printk("ESP: Sending message [ ");
  1535. for (i = 0; i < esp->msg_out_len; i++)
  1536. printk("%02x ", esp->msg_out[i]);
  1537. printk("]\n");
  1538. }
  1539. if (esp->rev == FASHME) {
  1540. int i;
  1541. /* Always use the fifo. */
  1542. for (i = 0; i < esp->msg_out_len; i++) {
  1543. esp_write8(esp->msg_out[i], ESP_FDATA);
  1544. esp_write8(0, ESP_FDATA);
  1545. }
  1546. scsi_esp_cmd(esp, ESP_CMD_TI);
  1547. } else {
  1548. if (esp->msg_out_len == 1) {
  1549. esp_write8(esp->msg_out[0], ESP_FDATA);
  1550. scsi_esp_cmd(esp, ESP_CMD_TI);
  1551. } else {
  1552. /* Use DMA. */
  1553. memcpy(esp->command_block,
  1554. esp->msg_out,
  1555. esp->msg_out_len);
  1556. esp->ops->send_dma_cmd(esp,
  1557. esp->command_block_dma,
  1558. esp->msg_out_len,
  1559. esp->msg_out_len,
  1560. 0,
  1561. ESP_CMD_DMA|ESP_CMD_TI);
  1562. }
  1563. }
  1564. esp_event(esp, ESP_EVENT_MSGOUT_DONE);
  1565. break;
  1566. }
  1567. case ESP_EVENT_MSGOUT_DONE:
  1568. if (esp->rev == FASHME) {
  1569. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1570. } else {
  1571. if (esp->msg_out_len > 1)
  1572. esp->ops->dma_invalidate(esp);
  1573. }
  1574. if (!(esp->ireg & ESP_INTR_DC)) {
  1575. if (esp->rev != FASHME)
  1576. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1577. }
  1578. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1579. goto again;
  1580. case ESP_EVENT_MSGIN:
  1581. if (esp->ireg & ESP_INTR_BSERV) {
  1582. if (esp->rev == FASHME) {
  1583. if (!(esp_read8(ESP_STATUS2) &
  1584. ESP_STAT2_FEMPTY))
  1585. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1586. } else {
  1587. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1588. if (esp->rev == ESP100)
  1589. scsi_esp_cmd(esp, ESP_CMD_NULL);
  1590. }
  1591. scsi_esp_cmd(esp, ESP_CMD_TI);
  1592. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1593. return 1;
  1594. }
  1595. if (esp->ireg & ESP_INTR_FDONE) {
  1596. u8 val;
  1597. if (esp->rev == FASHME)
  1598. val = esp->fifo[0];
  1599. else
  1600. val = esp_read8(ESP_FDATA);
  1601. esp->msg_in[esp->msg_in_len++] = val;
  1602. esp_log_msgin("ESP: Got msgin byte %x\n", val);
  1603. if (!esp_msgin_process(esp))
  1604. esp->msg_in_len = 0;
  1605. if (esp->rev == FASHME)
  1606. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1607. scsi_esp_cmd(esp, ESP_CMD_MOK);
  1608. if (esp->event != ESP_EVENT_FREE_BUS)
  1609. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1610. } else {
  1611. printk("ESP: MSGIN neither BSERV not FDON, resetting");
  1612. esp_schedule_reset(esp);
  1613. return 0;
  1614. }
  1615. break;
  1616. case ESP_EVENT_CMD_START:
  1617. memcpy(esp->command_block, esp->cmd_bytes_ptr,
  1618. esp->cmd_bytes_left);
  1619. if (esp->rev == FASHME)
  1620. scsi_esp_cmd(esp, ESP_CMD_FLUSH);
  1621. esp->ops->send_dma_cmd(esp, esp->command_block_dma,
  1622. esp->cmd_bytes_left, 16, 0,
  1623. ESP_CMD_DMA | ESP_CMD_TI);
  1624. esp_event(esp, ESP_EVENT_CMD_DONE);
  1625. esp->flags |= ESP_FLAG_QUICKIRQ_CHECK;
  1626. break;
  1627. case ESP_EVENT_CMD_DONE:
  1628. esp->ops->dma_invalidate(esp);
  1629. if (esp->ireg & ESP_INTR_BSERV) {
  1630. esp_event(esp, ESP_EVENT_CHECK_PHASE);
  1631. goto again;
  1632. }
  1633. esp_schedule_reset(esp);
  1634. return 0;
  1635. break;
  1636. case ESP_EVENT_RESET:
  1637. scsi_esp_cmd(esp, ESP_CMD_RS);
  1638. break;
  1639. default:
  1640. printk("ESP: Unexpected event %x, resetting\n",
  1641. esp->event);
  1642. esp_schedule_reset(esp);
  1643. return 0;
  1644. break;
  1645. }
  1646. return 1;
  1647. }
  1648. static void esp_reset_cleanup_one(struct esp *esp, struct esp_cmd_entry *ent)
  1649. {
  1650. struct scsi_cmnd *cmd = ent->cmd;
  1651. esp_unmap_dma(esp, cmd);
  1652. esp_free_lun_tag(ent, cmd->device->hostdata);
  1653. cmd->result = DID_RESET << 16;
  1654. if (ent->flags & ESP_CMD_FLAG_AUTOSENSE) {
  1655. esp->ops->unmap_single(esp, ent->sense_dma,
  1656. SCSI_SENSE_BUFFERSIZE, DMA_FROM_DEVICE);
  1657. ent->sense_ptr = NULL;
  1658. }
  1659. cmd->scsi_done(cmd);
  1660. list_del(&ent->list);
  1661. esp_put_ent(esp, ent);
  1662. }
  1663. static void esp_clear_hold(struct scsi_device *dev, void *data)
  1664. {
  1665. struct esp_lun_data *lp = dev->hostdata;
  1666. BUG_ON(lp->num_tagged);
  1667. lp->hold = 0;
  1668. }
  1669. static void esp_reset_cleanup(struct esp *esp)
  1670. {
  1671. struct esp_cmd_entry *ent, *tmp;
  1672. int i;
  1673. list_for_each_entry_safe(ent, tmp, &esp->queued_cmds, list) {
  1674. struct scsi_cmnd *cmd = ent->cmd;
  1675. list_del(&ent->list);
  1676. cmd->result = DID_RESET << 16;
  1677. cmd->scsi_done(cmd);
  1678. esp_put_ent(esp, ent);
  1679. }
  1680. list_for_each_entry_safe(ent, tmp, &esp->active_cmds, list) {
  1681. if (ent == esp->active_cmd)
  1682. esp->active_cmd = NULL;
  1683. esp_reset_cleanup_one(esp, ent);
  1684. }
  1685. BUG_ON(esp->active_cmd != NULL);
  1686. /* Force renegotiation of sync/wide transfers. */
  1687. for (i = 0; i < ESP_MAX_TARGET; i++) {
  1688. struct esp_target_data *tp = &esp->target[i];
  1689. tp->esp_period = 0;
  1690. tp->esp_offset = 0;
  1691. tp->esp_config3 &= ~(ESP_CONFIG3_EWIDE |
  1692. ESP_CONFIG3_FSCSI |
  1693. ESP_CONFIG3_FAST);
  1694. tp->flags &= ~ESP_TGT_WIDE;
  1695. tp->flags |= ESP_TGT_CHECK_NEGO;
  1696. if (tp->starget)
  1697. starget_for_each_device(tp->starget, NULL,
  1698. esp_clear_hold);
  1699. }
  1700. esp->flags &= ~ESP_FLAG_RESETTING;
  1701. }
  1702. /* Runs under host->lock */
  1703. static void __esp_interrupt(struct esp *esp)
  1704. {
  1705. int finish_reset, intr_done;
  1706. u8 phase;
  1707. esp->sreg = esp_read8(ESP_STATUS);
  1708. if (esp->flags & ESP_FLAG_RESETTING) {
  1709. finish_reset = 1;
  1710. } else {
  1711. if (esp_check_gross_error(esp))
  1712. return;
  1713. finish_reset = esp_check_spur_intr(esp);
  1714. if (finish_reset < 0)
  1715. return;
  1716. }
  1717. esp->ireg = esp_read8(ESP_INTRPT);
  1718. if (esp->ireg & ESP_INTR_SR)
  1719. finish_reset = 1;
  1720. if (finish_reset) {
  1721. esp_reset_cleanup(esp);
  1722. if (esp->eh_reset) {
  1723. complete(esp->eh_reset);
  1724. esp->eh_reset = NULL;
  1725. }
  1726. return;
  1727. }
  1728. phase = (esp->sreg & ESP_STAT_PMASK);
  1729. if (esp->rev == FASHME) {
  1730. if (((phase != ESP_DIP && phase != ESP_DOP) &&
  1731. esp->select_state == ESP_SELECT_NONE &&
  1732. esp->event != ESP_EVENT_STATUS &&
  1733. esp->event != ESP_EVENT_DATA_DONE) ||
  1734. (esp->ireg & ESP_INTR_RSEL)) {
  1735. esp->sreg2 = esp_read8(ESP_STATUS2);
  1736. if (!(esp->sreg2 & ESP_STAT2_FEMPTY) ||
  1737. (esp->sreg2 & ESP_STAT2_F1BYTE))
  1738. hme_read_fifo(esp);
  1739. }
  1740. }
  1741. esp_log_intr("ESP: intr sreg[%02x] seqreg[%02x] "
  1742. "sreg2[%02x] ireg[%02x]\n",
  1743. esp->sreg, esp->seqreg, esp->sreg2, esp->ireg);
  1744. intr_done = 0;
  1745. if (esp->ireg & (ESP_INTR_S | ESP_INTR_SATN | ESP_INTR_IC)) {
  1746. printk("ESP: unexpected IREG %02x\n", esp->ireg);
  1747. if (esp->ireg & ESP_INTR_IC)
  1748. esp_dump_cmd_log(esp);
  1749. esp_schedule_reset(esp);
  1750. } else {
  1751. if (!(esp->ireg & ESP_INTR_RSEL)) {
  1752. /* Some combination of FDONE, BSERV, DC. */
  1753. if (esp->select_state != ESP_SELECT_NONE)
  1754. intr_done = esp_finish_select(esp);
  1755. } else if (esp->ireg & ESP_INTR_RSEL) {
  1756. if (esp->active_cmd)
  1757. (void) esp_finish_select(esp);
  1758. intr_done = esp_reconnect(esp);
  1759. }
  1760. }
  1761. while (!intr_done)
  1762. intr_done = esp_process_event(esp);
  1763. }
  1764. irqreturn_t scsi_esp_intr(int irq, void *dev_id)
  1765. {
  1766. struct esp *esp = dev_id;
  1767. unsigned long flags;
  1768. irqreturn_t ret;
  1769. spin_lock_irqsave(esp->host->host_lock, flags);
  1770. ret = IRQ_NONE;
  1771. if (esp->ops->irq_pending(esp)) {
  1772. ret = IRQ_HANDLED;
  1773. for (;;) {
  1774. int i;
  1775. __esp_interrupt(esp);
  1776. if (!(esp->flags & ESP_FLAG_QUICKIRQ_CHECK))
  1777. break;
  1778. esp->flags &= ~ESP_FLAG_QUICKIRQ_CHECK;
  1779. for (i = 0; i < ESP_QUICKIRQ_LIMIT; i++) {
  1780. if (esp->ops->irq_pending(esp))
  1781. break;
  1782. }
  1783. if (i == ESP_QUICKIRQ_LIMIT)
  1784. break;
  1785. }
  1786. }
  1787. spin_unlock_irqrestore(esp->host->host_lock, flags);
  1788. return ret;
  1789. }
  1790. EXPORT_SYMBOL(scsi_esp_intr);
  1791. static void __devinit esp_get_revision(struct esp *esp)
  1792. {
  1793. u8 val;
  1794. esp->config1 = (ESP_CONFIG1_PENABLE | (esp->scsi_id & 7));
  1795. esp->config2 = (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY);
  1796. esp_write8(esp->config2, ESP_CFG2);
  1797. val = esp_read8(ESP_CFG2);
  1798. val &= ~ESP_CONFIG2_MAGIC;
  1799. if (val != (ESP_CONFIG2_SCSI2ENAB | ESP_CONFIG2_REGPARITY)) {
  1800. /* If what we write to cfg2 does not come back, cfg2 is not
  1801. * implemented, therefore this must be a plain esp100.
  1802. */
  1803. esp->rev = ESP100;
  1804. } else {
  1805. esp->config2 = 0;
  1806. esp_set_all_config3(esp, 5);
  1807. esp->prev_cfg3 = 5;
  1808. esp_write8(esp->config2, ESP_CFG2);
  1809. esp_write8(0, ESP_CFG3);
  1810. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1811. val = esp_read8(ESP_CFG3);
  1812. if (val != 5) {
  1813. /* The cfg2 register is implemented, however
  1814. * cfg3 is not, must be esp100a.
  1815. */
  1816. esp->rev = ESP100A;
  1817. } else {
  1818. esp_set_all_config3(esp, 0);
  1819. esp->prev_cfg3 = 0;
  1820. esp_write8(esp->prev_cfg3, ESP_CFG3);
  1821. /* All of cfg{1,2,3} implemented, must be one of
  1822. * the fas variants, figure out which one.
  1823. */
  1824. if (esp->cfact == 0 || esp->cfact > ESP_CCF_F5) {
  1825. esp->rev = FAST;
  1826. esp->sync_defp = SYNC_DEFP_FAST;
  1827. } else {
  1828. esp->rev = ESP236;
  1829. }
  1830. esp->config2 = 0;
  1831. esp_write8(esp->config2, ESP_CFG2);
  1832. }
  1833. }
  1834. }
  1835. static void __devinit esp_init_swstate(struct esp *esp)
  1836. {
  1837. int i;
  1838. INIT_LIST_HEAD(&esp->queued_cmds);
  1839. INIT_LIST_HEAD(&esp->active_cmds);
  1840. INIT_LIST_HEAD(&esp->esp_cmd_pool);
  1841. /* Start with a clear state, domain validation (via ->slave_configure,
  1842. * spi_dv_device()) will attempt to enable SYNC, WIDE, and tagged
  1843. * commands.
  1844. */
  1845. for (i = 0 ; i < ESP_MAX_TARGET; i++) {
  1846. esp->target[i].flags = 0;
  1847. esp->target[i].nego_goal_period = 0;
  1848. esp->target[i].nego_goal_offset = 0;
  1849. esp->target[i].nego_goal_width = 0;
  1850. esp->target[i].nego_goal_tags = 0;
  1851. }
  1852. }
  1853. /* This places the ESP into a known state at boot time. */
  1854. static void esp_bootup_reset(struct esp *esp)
  1855. {
  1856. u8 val;
  1857. /* Reset the DMA */
  1858. esp->ops->reset_dma(esp);
  1859. /* Reset the ESP */
  1860. esp_reset_esp(esp);
  1861. /* Reset the SCSI bus, but tell ESP not to generate an irq */
  1862. val = esp_read8(ESP_CFG1);
  1863. val |= ESP_CONFIG1_SRRDISAB;
  1864. esp_write8(val, ESP_CFG1);
  1865. scsi_esp_cmd(esp, ESP_CMD_RS);
  1866. udelay(400);
  1867. esp_write8(esp->config1, ESP_CFG1);
  1868. /* Eat any bitrot in the chip and we are done... */
  1869. esp_read8(ESP_INTRPT);
  1870. }
  1871. static void __devinit esp_set_clock_params(struct esp *esp)
  1872. {
  1873. int fmhz;
  1874. u8 ccf;
  1875. /* This is getting messy but it has to be done correctly or else
  1876. * you get weird behavior all over the place. We are trying to
  1877. * basically figure out three pieces of information.
  1878. *
  1879. * a) Clock Conversion Factor
  1880. *
  1881. * This is a representation of the input crystal clock frequency
  1882. * going into the ESP on this machine. Any operation whose timing
  1883. * is longer than 400ns depends on this value being correct. For
  1884. * example, you'll get blips for arbitration/selection during high
  1885. * load or with multiple targets if this is not set correctly.
  1886. *
  1887. * b) Selection Time-Out
  1888. *
  1889. * The ESP isn't very bright and will arbitrate for the bus and try
  1890. * to select a target forever if you let it. This value tells the
  1891. * ESP when it has taken too long to negotiate and that it should
  1892. * interrupt the CPU so we can see what happened. The value is
  1893. * computed as follows (from NCR/Symbios chip docs).
  1894. *
  1895. * (Time Out Period) * (Input Clock)
  1896. * STO = ----------------------------------
  1897. * (8192) * (Clock Conversion Factor)
  1898. *
  1899. * We use a time out period of 250ms (ESP_BUS_TIMEOUT).
  1900. *
  1901. * c) Imperical constants for synchronous offset and transfer period
  1902. * register values
  1903. *
  1904. * This entails the smallest and largest sync period we could ever
  1905. * handle on this ESP.
  1906. */
  1907. fmhz = esp->cfreq;
  1908. ccf = ((fmhz / 1000000) + 4) / 5;
  1909. if (ccf == 1)
  1910. ccf = 2;
  1911. /* If we can't find anything reasonable, just assume 20MHZ.
  1912. * This is the clock frequency of the older sun4c's where I've
  1913. * been unable to find the clock-frequency PROM property. All
  1914. * other machines provide useful values it seems.
  1915. */
  1916. if (fmhz <= 5000000 || ccf < 1 || ccf > 8) {
  1917. fmhz = 20000000;
  1918. ccf = 4;
  1919. }
  1920. esp->cfact = (ccf == 8 ? 0 : ccf);
  1921. esp->cfreq = fmhz;
  1922. esp->ccycle = ESP_MHZ_TO_CYCLE(fmhz);
  1923. esp->ctick = ESP_TICK(ccf, esp->ccycle);
  1924. esp->neg_defp = ESP_NEG_DEFP(fmhz, ccf);
  1925. esp->sync_defp = SYNC_DEFP_SLOW;
  1926. }
  1927. static const char *esp_chip_names[] = {
  1928. "ESP100",
  1929. "ESP100A",
  1930. "ESP236",
  1931. "FAS236",
  1932. "FAS100A",
  1933. "FAST",
  1934. "FASHME",
  1935. };
  1936. static struct scsi_transport_template *esp_transport_template;
  1937. int __devinit scsi_esp_register(struct esp *esp, struct device *dev)
  1938. {
  1939. static int instance;
  1940. int err;
  1941. esp->host->transportt = esp_transport_template;
  1942. esp->host->max_lun = ESP_MAX_LUN;
  1943. esp->host->cmd_per_lun = 2;
  1944. esp_set_clock_params(esp);
  1945. esp_get_revision(esp);
  1946. esp_init_swstate(esp);
  1947. esp_bootup_reset(esp);
  1948. printk(KERN_INFO PFX "esp%u, regs[%1p:%1p] irq[%u]\n",
  1949. esp->host->unique_id, esp->regs, esp->dma_regs,
  1950. esp->host->irq);
  1951. printk(KERN_INFO PFX "esp%u is a %s, %u MHz (ccf=%u), SCSI ID %u\n",
  1952. esp->host->unique_id, esp_chip_names[esp->rev],
  1953. esp->cfreq / 1000000, esp->cfact, esp->scsi_id);
  1954. /* Let the SCSI bus reset settle. */
  1955. ssleep(esp_bus_reset_settle);
  1956. err = scsi_add_host(esp->host, dev);
  1957. if (err)
  1958. return err;
  1959. esp->host->unique_id = instance++;
  1960. scsi_scan_host(esp->host);
  1961. return 0;
  1962. }
  1963. EXPORT_SYMBOL(scsi_esp_register);
  1964. void __devexit scsi_esp_unregister(struct esp *esp)
  1965. {
  1966. scsi_remove_host(esp->host);
  1967. }
  1968. EXPORT_SYMBOL(scsi_esp_unregister);
  1969. static int esp_slave_alloc(struct scsi_device *dev)
  1970. {
  1971. struct esp *esp = shost_priv(dev->host);
  1972. struct esp_target_data *tp = &esp->target[dev->id];
  1973. struct esp_lun_data *lp;
  1974. lp = kzalloc(sizeof(*lp), GFP_KERNEL);
  1975. if (!lp)
  1976. return -ENOMEM;
  1977. dev->hostdata = lp;
  1978. tp->starget = dev->sdev_target;
  1979. spi_min_period(tp->starget) = esp->min_period;
  1980. spi_max_offset(tp->starget) = 15;
  1981. if (esp->flags & ESP_FLAG_WIDE_CAPABLE)
  1982. spi_max_width(tp->starget) = 1;
  1983. else
  1984. spi_max_width(tp->starget) = 0;
  1985. return 0;
  1986. }
  1987. static int esp_slave_configure(struct scsi_device *dev)
  1988. {
  1989. struct esp *esp = shost_priv(dev->host);
  1990. struct esp_target_data *tp = &esp->target[dev->id];
  1991. int goal_tags, queue_depth;
  1992. goal_tags = 0;
  1993. if (dev->tagged_supported) {
  1994. /* XXX make this configurable somehow XXX */
  1995. goal_tags = ESP_DEFAULT_TAGS;
  1996. if (goal_tags > ESP_MAX_TAG)
  1997. goal_tags = ESP_MAX_TAG;
  1998. }
  1999. queue_depth = goal_tags;
  2000. if (queue_depth < dev->host->cmd_per_lun)
  2001. queue_depth = dev->host->cmd_per_lun;
  2002. if (goal_tags) {
  2003. scsi_set_tag_type(dev, MSG_ORDERED_TAG);
  2004. scsi_activate_tcq(dev, queue_depth);
  2005. } else {
  2006. scsi_deactivate_tcq(dev, queue_depth);
  2007. }
  2008. tp->flags |= ESP_TGT_DISCONNECT;
  2009. if (!spi_initial_dv(dev->sdev_target))
  2010. spi_dv_device(dev);
  2011. return 0;
  2012. }
  2013. static void esp_slave_destroy(struct scsi_device *dev)
  2014. {
  2015. struct esp_lun_data *lp = dev->hostdata;
  2016. kfree(lp);
  2017. dev->hostdata = NULL;
  2018. }
  2019. static int esp_eh_abort_handler(struct scsi_cmnd *cmd)
  2020. {
  2021. struct esp *esp = shost_priv(cmd->device->host);
  2022. struct esp_cmd_entry *ent, *tmp;
  2023. struct completion eh_done;
  2024. unsigned long flags;
  2025. /* XXX This helps a lot with debugging but might be a bit
  2026. * XXX much for the final driver.
  2027. */
  2028. spin_lock_irqsave(esp->host->host_lock, flags);
  2029. printk(KERN_ERR PFX "esp%d: Aborting command [%p:%02x]\n",
  2030. esp->host->unique_id, cmd, cmd->cmnd[0]);
  2031. ent = esp->active_cmd;
  2032. if (ent)
  2033. printk(KERN_ERR PFX "esp%d: Current command [%p:%02x]\n",
  2034. esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
  2035. list_for_each_entry(ent, &esp->queued_cmds, list) {
  2036. printk(KERN_ERR PFX "esp%d: Queued command [%p:%02x]\n",
  2037. esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
  2038. }
  2039. list_for_each_entry(ent, &esp->active_cmds, list) {
  2040. printk(KERN_ERR PFX "esp%d: Active command [%p:%02x]\n",
  2041. esp->host->unique_id, ent->cmd, ent->cmd->cmnd[0]);
  2042. }
  2043. esp_dump_cmd_log(esp);
  2044. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2045. spin_lock_irqsave(esp->host->host_lock, flags);
  2046. ent = NULL;
  2047. list_for_each_entry(tmp, &esp->queued_cmds, list) {
  2048. if (tmp->cmd == cmd) {
  2049. ent = tmp;
  2050. break;
  2051. }
  2052. }
  2053. if (ent) {
  2054. /* Easiest case, we didn't even issue the command
  2055. * yet so it is trivial to abort.
  2056. */
  2057. list_del(&ent->list);
  2058. cmd->result = DID_ABORT << 16;
  2059. cmd->scsi_done(cmd);
  2060. esp_put_ent(esp, ent);
  2061. goto out_success;
  2062. }
  2063. init_completion(&eh_done);
  2064. ent = esp->active_cmd;
  2065. if (ent && ent->cmd == cmd) {
  2066. /* Command is the currently active command on
  2067. * the bus. If we already have an output message
  2068. * pending, no dice.
  2069. */
  2070. if (esp->msg_out_len)
  2071. goto out_failure;
  2072. /* Send out an abort, encouraging the target to
  2073. * go to MSGOUT phase by asserting ATN.
  2074. */
  2075. esp->msg_out[0] = ABORT_TASK_SET;
  2076. esp->msg_out_len = 1;
  2077. ent->eh_done = &eh_done;
  2078. scsi_esp_cmd(esp, ESP_CMD_SATN);
  2079. } else {
  2080. /* The command is disconnected. This is not easy to
  2081. * abort. For now we fail and let the scsi error
  2082. * handling layer go try a scsi bus reset or host
  2083. * reset.
  2084. *
  2085. * What we could do is put together a scsi command
  2086. * solely for the purpose of sending an abort message
  2087. * to the target. Coming up with all the code to
  2088. * cook up scsi commands, special case them everywhere,
  2089. * etc. is for questionable gain and it would be better
  2090. * if the generic scsi error handling layer could do at
  2091. * least some of that for us.
  2092. *
  2093. * Anyways this is an area for potential future improvement
  2094. * in this driver.
  2095. */
  2096. goto out_failure;
  2097. }
  2098. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2099. if (!wait_for_completion_timeout(&eh_done, 5 * HZ)) {
  2100. spin_lock_irqsave(esp->host->host_lock, flags);
  2101. ent->eh_done = NULL;
  2102. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2103. return FAILED;
  2104. }
  2105. return SUCCESS;
  2106. out_success:
  2107. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2108. return SUCCESS;
  2109. out_failure:
  2110. /* XXX This might be a good location to set ESP_TGT_BROKEN
  2111. * XXX since we know which target/lun in particular is
  2112. * XXX causing trouble.
  2113. */
  2114. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2115. return FAILED;
  2116. }
  2117. static int esp_eh_bus_reset_handler(struct scsi_cmnd *cmd)
  2118. {
  2119. struct esp *esp = shost_priv(cmd->device->host);
  2120. struct completion eh_reset;
  2121. unsigned long flags;
  2122. init_completion(&eh_reset);
  2123. spin_lock_irqsave(esp->host->host_lock, flags);
  2124. esp->eh_reset = &eh_reset;
  2125. /* XXX This is too simple... We should add lots of
  2126. * XXX checks here so that if we find that the chip is
  2127. * XXX very wedged we return failure immediately so
  2128. * XXX that we can perform a full chip reset.
  2129. */
  2130. esp->flags |= ESP_FLAG_RESETTING;
  2131. scsi_esp_cmd(esp, ESP_CMD_RS);
  2132. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2133. ssleep(esp_bus_reset_settle);
  2134. if (!wait_for_completion_timeout(&eh_reset, 5 * HZ)) {
  2135. spin_lock_irqsave(esp->host->host_lock, flags);
  2136. esp->eh_reset = NULL;
  2137. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2138. return FAILED;
  2139. }
  2140. return SUCCESS;
  2141. }
  2142. /* All bets are off, reset the entire device. */
  2143. static int esp_eh_host_reset_handler(struct scsi_cmnd *cmd)
  2144. {
  2145. struct esp *esp = shost_priv(cmd->device->host);
  2146. unsigned long flags;
  2147. spin_lock_irqsave(esp->host->host_lock, flags);
  2148. esp_bootup_reset(esp);
  2149. esp_reset_cleanup(esp);
  2150. spin_unlock_irqrestore(esp->host->host_lock, flags);
  2151. ssleep(esp_bus_reset_settle);
  2152. return SUCCESS;
  2153. }
  2154. static const char *esp_info(struct Scsi_Host *host)
  2155. {
  2156. return "esp";
  2157. }
  2158. struct scsi_host_template scsi_esp_template = {
  2159. .module = THIS_MODULE,
  2160. .name = "esp",
  2161. .info = esp_info,
  2162. .queuecommand = esp_queuecommand,
  2163. .slave_alloc = esp_slave_alloc,
  2164. .slave_configure = esp_slave_configure,
  2165. .slave_destroy = esp_slave_destroy,
  2166. .eh_abort_handler = esp_eh_abort_handler,
  2167. .eh_bus_reset_handler = esp_eh_bus_reset_handler,
  2168. .eh_host_reset_handler = esp_eh_host_reset_handler,
  2169. .can_queue = 7,
  2170. .this_id = 7,
  2171. .sg_tablesize = SG_ALL,
  2172. .use_clustering = ENABLE_CLUSTERING,
  2173. .max_sectors = 0xffff,
  2174. .skip_settle_delay = 1,
  2175. };
  2176. EXPORT_SYMBOL(scsi_esp_template);
  2177. static void esp_get_signalling(struct Scsi_Host *host)
  2178. {
  2179. struct esp *esp = shost_priv(host);
  2180. enum spi_signal_type type;
  2181. if (esp->flags & ESP_FLAG_DIFFERENTIAL)
  2182. type = SPI_SIGNAL_HVD;
  2183. else
  2184. type = SPI_SIGNAL_SE;
  2185. spi_signalling(host) = type;
  2186. }
  2187. static void esp_set_offset(struct scsi_target *target, int offset)
  2188. {
  2189. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2190. struct esp *esp = shost_priv(host);
  2191. struct esp_target_data *tp = &esp->target[target->id];
  2192. tp->nego_goal_offset = offset;
  2193. tp->flags |= ESP_TGT_CHECK_NEGO;
  2194. }
  2195. static void esp_set_period(struct scsi_target *target, int period)
  2196. {
  2197. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2198. struct esp *esp = shost_priv(host);
  2199. struct esp_target_data *tp = &esp->target[target->id];
  2200. tp->nego_goal_period = period;
  2201. tp->flags |= ESP_TGT_CHECK_NEGO;
  2202. }
  2203. static void esp_set_width(struct scsi_target *target, int width)
  2204. {
  2205. struct Scsi_Host *host = dev_to_shost(target->dev.parent);
  2206. struct esp *esp = shost_priv(host);
  2207. struct esp_target_data *tp = &esp->target[target->id];
  2208. tp->nego_goal_width = (width ? 1 : 0);
  2209. tp->flags |= ESP_TGT_CHECK_NEGO;
  2210. }
  2211. static struct spi_function_template esp_transport_ops = {
  2212. .set_offset = esp_set_offset,
  2213. .show_offset = 1,
  2214. .set_period = esp_set_period,
  2215. .show_period = 1,
  2216. .set_width = esp_set_width,
  2217. .show_width = 1,
  2218. .get_signalling = esp_get_signalling,
  2219. };
  2220. static int __init esp_init(void)
  2221. {
  2222. BUILD_BUG_ON(sizeof(struct scsi_pointer) <
  2223. sizeof(struct esp_cmd_priv));
  2224. esp_transport_template = spi_attach_transport(&esp_transport_ops);
  2225. if (!esp_transport_template)
  2226. return -ENODEV;
  2227. return 0;
  2228. }
  2229. static void __exit esp_exit(void)
  2230. {
  2231. spi_release_transport(esp_transport_template);
  2232. }
  2233. MODULE_DESCRIPTION("ESP SCSI driver core");
  2234. MODULE_AUTHOR("David S. Miller (davem@davemloft.net)");
  2235. MODULE_LICENSE("GPL");
  2236. MODULE_VERSION(DRV_VERSION);
  2237. module_param(esp_bus_reset_settle, int, 0);
  2238. MODULE_PARM_DESC(esp_bus_reset_settle,
  2239. "ESP scsi bus reset delay in seconds");
  2240. module_param(esp_debug, int, 0);
  2241. MODULE_PARM_DESC(esp_debug,
  2242. "ESP bitmapped debugging message enable value:\n"
  2243. " 0x00000001 Log interrupt events\n"
  2244. " 0x00000002 Log scsi commands\n"
  2245. " 0x00000004 Log resets\n"
  2246. " 0x00000008 Log message in events\n"
  2247. " 0x00000010 Log message out events\n"
  2248. " 0x00000020 Log command completion\n"
  2249. " 0x00000040 Log disconnects\n"
  2250. " 0x00000080 Log data start\n"
  2251. " 0x00000100 Log data done\n"
  2252. " 0x00000200 Log reconnects\n"
  2253. " 0x00000400 Log auto-sense data\n"
  2254. );
  2255. module_init(esp_init);
  2256. module_exit(esp_exit);