qeth_main.c 232 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911191219131914191519161917191819191920192119221923192419251926192719281929193019311932193319341935193619371938193919401941194219431944194519461947194819491950195119521953195419551956195719581959196019611962196319641965196619671968196919701971197219731974197519761977197819791980198119821983198419851986198719881989199019911992199319941995199619971998199920002001200220032004200520062007200820092010201120122013201420152016201720182019202020212022202320242025202620272028202920302031203220332034203520362037203820392040204120422043204420452046204720482049205020512052205320542055205620572058205920602061206220632064206520662067206820692070207120722073207420752076207720782079208020812082208320842085208620872088208920902091209220932094209520962097209820992100210121022103210421052106210721082109211021112112211321142115211621172118211921202121212221232124212521262127212821292130213121322133213421352136213721382139214021412142214321442145214621472148214921502151215221532154215521562157215821592160216121622163216421652166216721682169217021712172217321742175217621772178217921802181218221832184218521862187218821892190219121922193219421952196219721982199220022012202220322042205220622072208220922102211221222132214221522162217221822192220222122222223222422252226222722282229223022312232223322342235223622372238223922402241224222432244224522462247224822492250225122522253225422552256225722582259226022612262226322642265226622672268226922702271227222732274227522762277227822792280228122822283228422852286228722882289229022912292229322942295229622972298229923002301230223032304230523062307230823092310231123122313231423152316231723182319232023212322232323242325232623272328232923302331233223332334233523362337233823392340234123422343234423452346234723482349235023512352235323542355235623572358235923602361236223632364236523662367236823692370237123722373237423752376237723782379238023812382238323842385238623872388238923902391239223932394239523962397239823992400240124022403240424052406240724082409241024112412241324142415241624172418241924202421242224232424242524262427242824292430243124322433243424352436243724382439244024412442244324442445244624472448244924502451245224532454245524562457245824592460246124622463246424652466246724682469247024712472247324742475247624772478247924802481248224832484248524862487248824892490249124922493249424952496249724982499250025012502250325042505250625072508250925102511251225132514251525162517251825192520252125222523252425252526252725282529253025312532253325342535253625372538253925402541254225432544254525462547254825492550255125522553255425552556255725582559256025612562256325642565256625672568256925702571257225732574257525762577257825792580258125822583258425852586258725882589259025912592259325942595259625972598259926002601260226032604260526062607260826092610261126122613261426152616261726182619262026212622262326242625262626272628262926302631263226332634263526362637263826392640264126422643264426452646264726482649265026512652265326542655265626572658265926602661266226632664266526662667266826692670267126722673267426752676267726782679268026812682268326842685268626872688268926902691269226932694269526962697269826992700270127022703270427052706270727082709271027112712271327142715271627172718271927202721272227232724272527262727272827292730273127322733273427352736273727382739274027412742274327442745274627472748274927502751275227532754275527562757275827592760276127622763276427652766276727682769277027712772277327742775277627772778277927802781278227832784278527862787278827892790279127922793279427952796279727982799280028012802280328042805280628072808280928102811281228132814281528162817281828192820282128222823282428252826282728282829283028312832283328342835283628372838283928402841284228432844284528462847284828492850285128522853285428552856285728582859286028612862286328642865286628672868286928702871287228732874287528762877287828792880288128822883288428852886288728882889289028912892289328942895289628972898289929002901290229032904290529062907290829092910291129122913291429152916291729182919292029212922292329242925292629272928292929302931293229332934293529362937293829392940294129422943294429452946294729482949295029512952295329542955295629572958295929602961296229632964296529662967296829692970297129722973297429752976297729782979298029812982298329842985298629872988298929902991299229932994299529962997299829993000300130023003300430053006300730083009301030113012301330143015301630173018301930203021302230233024302530263027302830293030303130323033303430353036303730383039304030413042304330443045304630473048304930503051305230533054305530563057305830593060306130623063306430653066306730683069307030713072307330743075307630773078307930803081308230833084308530863087308830893090309130923093309430953096309730983099310031013102310331043105310631073108310931103111311231133114311531163117311831193120312131223123312431253126312731283129313031313132313331343135313631373138313931403141314231433144314531463147314831493150315131523153315431553156315731583159316031613162316331643165316631673168316931703171317231733174317531763177317831793180318131823183318431853186318731883189319031913192319331943195319631973198319932003201320232033204320532063207320832093210321132123213321432153216321732183219322032213222322332243225322632273228322932303231323232333234323532363237323832393240324132423243324432453246324732483249325032513252325332543255325632573258325932603261326232633264326532663267326832693270327132723273327432753276327732783279328032813282328332843285328632873288328932903291329232933294329532963297329832993300330133023303330433053306330733083309331033113312331333143315331633173318331933203321332233233324332533263327332833293330333133323333333433353336333733383339334033413342334333443345334633473348334933503351335233533354335533563357335833593360336133623363336433653366336733683369337033713372337333743375337633773378337933803381338233833384338533863387338833893390339133923393339433953396339733983399340034013402340334043405340634073408340934103411341234133414341534163417341834193420342134223423342434253426342734283429343034313432343334343435343634373438343934403441344234433444344534463447344834493450345134523453345434553456345734583459346034613462346334643465346634673468346934703471347234733474347534763477347834793480348134823483348434853486348734883489349034913492349334943495349634973498349935003501350235033504350535063507350835093510351135123513351435153516351735183519352035213522352335243525352635273528352935303531353235333534353535363537353835393540354135423543354435453546354735483549355035513552355335543555355635573558355935603561356235633564356535663567356835693570357135723573357435753576357735783579358035813582358335843585358635873588358935903591359235933594359535963597359835993600360136023603360436053606360736083609361036113612361336143615361636173618361936203621362236233624362536263627362836293630363136323633363436353636363736383639364036413642364336443645364636473648364936503651365236533654365536563657365836593660366136623663366436653666366736683669367036713672367336743675367636773678367936803681368236833684368536863687368836893690369136923693369436953696369736983699370037013702370337043705370637073708370937103711371237133714371537163717371837193720372137223723372437253726372737283729373037313732373337343735373637373738373937403741374237433744374537463747374837493750375137523753375437553756375737583759376037613762376337643765376637673768376937703771377237733774377537763777377837793780378137823783378437853786378737883789379037913792379337943795379637973798379938003801380238033804380538063807380838093810381138123813381438153816381738183819382038213822382338243825382638273828382938303831383238333834383538363837383838393840384138423843384438453846384738483849385038513852385338543855385638573858385938603861386238633864386538663867386838693870387138723873387438753876387738783879388038813882388338843885388638873888388938903891389238933894389538963897389838993900390139023903390439053906390739083909391039113912391339143915391639173918391939203921392239233924392539263927392839293930393139323933393439353936393739383939394039413942394339443945394639473948394939503951395239533954395539563957395839593960396139623963396439653966396739683969397039713972397339743975397639773978397939803981398239833984398539863987398839893990399139923993399439953996399739983999400040014002400340044005400640074008400940104011401240134014401540164017401840194020402140224023402440254026402740284029403040314032403340344035403640374038403940404041404240434044404540464047404840494050405140524053405440554056405740584059406040614062406340644065406640674068406940704071407240734074407540764077407840794080408140824083408440854086408740884089409040914092409340944095409640974098409941004101410241034104410541064107410841094110411141124113411441154116411741184119412041214122412341244125412641274128412941304131413241334134413541364137413841394140414141424143414441454146414741484149415041514152415341544155415641574158415941604161416241634164416541664167416841694170417141724173417441754176417741784179418041814182418341844185418641874188418941904191419241934194419541964197419841994200420142024203420442054206420742084209421042114212421342144215421642174218421942204221422242234224422542264227422842294230423142324233423442354236423742384239424042414242424342444245424642474248424942504251425242534254425542564257425842594260426142624263426442654266426742684269427042714272427342744275427642774278427942804281428242834284428542864287428842894290429142924293429442954296429742984299430043014302430343044305430643074308430943104311431243134314431543164317431843194320432143224323432443254326432743284329433043314332433343344335433643374338433943404341434243434344434543464347434843494350435143524353435443554356435743584359436043614362436343644365436643674368436943704371437243734374437543764377437843794380438143824383438443854386438743884389439043914392439343944395439643974398439944004401440244034404440544064407440844094410441144124413441444154416441744184419442044214422442344244425442644274428442944304431443244334434443544364437443844394440444144424443444444454446444744484449445044514452445344544455445644574458445944604461446244634464446544664467446844694470447144724473447444754476447744784479448044814482448344844485448644874488448944904491449244934494449544964497449844994500450145024503450445054506450745084509451045114512451345144515451645174518451945204521452245234524452545264527452845294530453145324533453445354536453745384539454045414542454345444545454645474548454945504551455245534554455545564557455845594560456145624563456445654566456745684569457045714572457345744575457645774578457945804581458245834584458545864587458845894590459145924593459445954596459745984599460046014602460346044605460646074608460946104611461246134614461546164617461846194620462146224623462446254626462746284629463046314632463346344635463646374638463946404641464246434644464546464647464846494650465146524653465446554656465746584659466046614662466346644665466646674668466946704671467246734674467546764677467846794680468146824683468446854686468746884689469046914692469346944695469646974698469947004701470247034704470547064707470847094710471147124713471447154716471747184719472047214722472347244725472647274728472947304731473247334734473547364737473847394740474147424743474447454746474747484749475047514752475347544755475647574758475947604761476247634764476547664767476847694770477147724773477447754776477747784779478047814782478347844785478647874788478947904791479247934794479547964797479847994800480148024803480448054806480748084809481048114812481348144815481648174818481948204821482248234824482548264827482848294830483148324833483448354836483748384839484048414842484348444845484648474848484948504851485248534854485548564857485848594860486148624863486448654866486748684869487048714872487348744875487648774878487948804881488248834884488548864887488848894890489148924893489448954896489748984899490049014902490349044905490649074908490949104911491249134914491549164917491849194920492149224923492449254926492749284929493049314932493349344935493649374938493949404941494249434944494549464947494849494950495149524953495449554956495749584959496049614962496349644965496649674968496949704971497249734974497549764977497849794980498149824983498449854986498749884989499049914992499349944995499649974998499950005001500250035004500550065007500850095010501150125013501450155016501750185019502050215022502350245025502650275028502950305031503250335034503550365037503850395040504150425043504450455046504750485049505050515052505350545055505650575058505950605061506250635064506550665067506850695070507150725073507450755076507750785079508050815082508350845085508650875088508950905091509250935094509550965097509850995100510151025103510451055106510751085109511051115112511351145115511651175118511951205121512251235124512551265127512851295130513151325133513451355136513751385139514051415142514351445145514651475148514951505151515251535154515551565157515851595160516151625163516451655166516751685169517051715172517351745175517651775178517951805181518251835184518551865187518851895190519151925193519451955196519751985199520052015202520352045205520652075208520952105211521252135214521552165217521852195220522152225223522452255226522752285229523052315232523352345235523652375238523952405241524252435244524552465247524852495250525152525253525452555256525752585259526052615262526352645265526652675268526952705271527252735274527552765277527852795280528152825283528452855286528752885289529052915292529352945295529652975298529953005301530253035304530553065307530853095310531153125313531453155316531753185319532053215322532353245325532653275328532953305331533253335334533553365337533853395340534153425343534453455346534753485349535053515352535353545355535653575358535953605361536253635364536553665367536853695370537153725373537453755376537753785379538053815382538353845385538653875388538953905391539253935394539553965397539853995400540154025403540454055406540754085409541054115412541354145415541654175418541954205421542254235424542554265427542854295430543154325433543454355436543754385439544054415442544354445445544654475448544954505451545254535454545554565457545854595460546154625463546454655466546754685469547054715472547354745475547654775478547954805481548254835484548554865487548854895490549154925493549454955496549754985499550055015502550355045505550655075508550955105511551255135514551555165517551855195520552155225523552455255526552755285529553055315532553355345535553655375538553955405541554255435544554555465547554855495550555155525553555455555556555755585559556055615562556355645565556655675568556955705571557255735574557555765577557855795580558155825583558455855586558755885589559055915592559355945595559655975598559956005601560256035604560556065607560856095610561156125613561456155616561756185619562056215622562356245625562656275628562956305631563256335634563556365637563856395640564156425643564456455646564756485649565056515652565356545655565656575658565956605661566256635664566556665667566856695670567156725673567456755676567756785679568056815682568356845685568656875688568956905691569256935694569556965697569856995700570157025703570457055706570757085709571057115712571357145715571657175718571957205721572257235724572557265727572857295730573157325733573457355736573757385739574057415742574357445745574657475748574957505751575257535754575557565757575857595760576157625763576457655766576757685769577057715772577357745775577657775778577957805781578257835784578557865787578857895790579157925793579457955796579757985799580058015802580358045805580658075808580958105811581258135814581558165817581858195820582158225823582458255826582758285829583058315832583358345835583658375838583958405841584258435844584558465847584858495850585158525853585458555856585758585859586058615862586358645865586658675868586958705871587258735874587558765877587858795880588158825883588458855886588758885889589058915892589358945895589658975898589959005901590259035904590559065907590859095910591159125913591459155916591759185919592059215922592359245925592659275928592959305931593259335934593559365937593859395940594159425943594459455946594759485949595059515952595359545955595659575958595959605961596259635964596559665967596859695970597159725973597459755976597759785979598059815982598359845985598659875988598959905991599259935994599559965997599859996000600160026003600460056006600760086009601060116012601360146015601660176018601960206021602260236024602560266027602860296030603160326033603460356036603760386039604060416042604360446045604660476048604960506051605260536054605560566057605860596060606160626063606460656066606760686069607060716072607360746075607660776078607960806081608260836084608560866087608860896090609160926093609460956096609760986099610061016102610361046105610661076108610961106111611261136114611561166117611861196120612161226123612461256126612761286129613061316132613361346135613661376138613961406141614261436144614561466147614861496150615161526153615461556156615761586159616061616162616361646165616661676168616961706171617261736174617561766177617861796180618161826183618461856186618761886189619061916192619361946195619661976198619962006201620262036204620562066207620862096210621162126213621462156216621762186219622062216222622362246225622662276228622962306231623262336234623562366237623862396240624162426243624462456246624762486249625062516252625362546255625662576258625962606261626262636264626562666267626862696270627162726273627462756276627762786279628062816282628362846285628662876288628962906291629262936294629562966297629862996300630163026303630463056306630763086309631063116312631363146315631663176318631963206321632263236324632563266327632863296330633163326333633463356336633763386339634063416342634363446345634663476348634963506351635263536354635563566357635863596360636163626363636463656366636763686369637063716372637363746375637663776378637963806381638263836384638563866387638863896390639163926393639463956396639763986399640064016402640364046405640664076408640964106411641264136414641564166417641864196420642164226423642464256426642764286429643064316432643364346435643664376438643964406441644264436444644564466447644864496450645164526453645464556456645764586459646064616462646364646465646664676468646964706471647264736474647564766477647864796480648164826483648464856486648764886489649064916492649364946495649664976498649965006501650265036504650565066507650865096510651165126513651465156516651765186519652065216522652365246525652665276528652965306531653265336534653565366537653865396540654165426543654465456546654765486549655065516552655365546555655665576558655965606561656265636564656565666567656865696570657165726573657465756576657765786579658065816582658365846585658665876588658965906591659265936594659565966597659865996600660166026603660466056606660766086609661066116612661366146615661666176618661966206621662266236624662566266627662866296630663166326633663466356636663766386639664066416642664366446645664666476648664966506651665266536654665566566657665866596660666166626663666466656666666766686669667066716672667366746675667666776678667966806681668266836684668566866687668866896690669166926693669466956696669766986699670067016702670367046705670667076708670967106711671267136714671567166717671867196720672167226723672467256726672767286729673067316732673367346735673667376738673967406741674267436744674567466747674867496750675167526753675467556756675767586759676067616762676367646765676667676768676967706771677267736774677567766777677867796780678167826783678467856786678767886789679067916792679367946795679667976798679968006801680268036804680568066807680868096810681168126813681468156816681768186819682068216822682368246825682668276828682968306831683268336834683568366837683868396840684168426843684468456846684768486849685068516852685368546855685668576858685968606861686268636864686568666867686868696870687168726873687468756876687768786879688068816882688368846885688668876888688968906891689268936894689568966897689868996900690169026903690469056906690769086909691069116912691369146915691669176918691969206921692269236924692569266927692869296930693169326933693469356936693769386939694069416942694369446945694669476948694969506951695269536954695569566957695869596960696169626963696469656966696769686969697069716972697369746975697669776978697969806981698269836984698569866987698869896990699169926993699469956996699769986999700070017002700370047005700670077008700970107011701270137014701570167017701870197020702170227023702470257026702770287029703070317032703370347035703670377038703970407041704270437044704570467047704870497050705170527053705470557056705770587059706070617062706370647065706670677068706970707071707270737074707570767077707870797080708170827083708470857086708770887089709070917092709370947095709670977098709971007101710271037104710571067107710871097110711171127113711471157116711771187119712071217122712371247125712671277128712971307131713271337134713571367137713871397140714171427143714471457146714771487149715071517152715371547155715671577158715971607161716271637164716571667167716871697170717171727173717471757176717771787179718071817182718371847185718671877188718971907191719271937194719571967197719871997200720172027203720472057206720772087209721072117212721372147215721672177218721972207221722272237224722572267227722872297230723172327233723472357236723772387239724072417242724372447245724672477248724972507251725272537254725572567257725872597260726172627263726472657266726772687269727072717272727372747275727672777278727972807281728272837284728572867287728872897290729172927293729472957296729772987299730073017302730373047305730673077308730973107311731273137314731573167317731873197320732173227323732473257326732773287329733073317332733373347335733673377338733973407341734273437344734573467347734873497350735173527353735473557356735773587359736073617362736373647365736673677368736973707371737273737374737573767377737873797380738173827383738473857386738773887389739073917392739373947395739673977398739974007401740274037404740574067407740874097410741174127413741474157416741774187419742074217422742374247425742674277428742974307431743274337434743574367437743874397440744174427443744474457446744774487449745074517452745374547455745674577458745974607461746274637464746574667467746874697470747174727473747474757476747774787479748074817482748374847485748674877488748974907491749274937494749574967497749874997500750175027503750475057506750775087509751075117512751375147515751675177518751975207521752275237524752575267527752875297530753175327533753475357536753775387539754075417542754375447545754675477548754975507551755275537554755575567557755875597560756175627563756475657566756775687569757075717572757375747575757675777578757975807581758275837584758575867587758875897590759175927593759475957596759775987599760076017602760376047605760676077608760976107611761276137614761576167617761876197620762176227623762476257626762776287629763076317632763376347635763676377638763976407641764276437644764576467647764876497650765176527653765476557656765776587659766076617662766376647665766676677668766976707671767276737674767576767677767876797680768176827683768476857686768776887689769076917692769376947695769676977698769977007701770277037704770577067707770877097710771177127713771477157716771777187719772077217722772377247725772677277728772977307731773277337734773577367737773877397740774177427743774477457746774777487749775077517752775377547755775677577758775977607761776277637764776577667767776877697770777177727773777477757776777777787779778077817782778377847785778677877788778977907791779277937794779577967797779877997800780178027803780478057806780778087809781078117812781378147815781678177818781978207821782278237824782578267827782878297830783178327833783478357836783778387839784078417842784378447845784678477848784978507851785278537854785578567857785878597860786178627863786478657866786778687869787078717872787378747875787678777878787978807881788278837884788578867887788878897890789178927893789478957896789778987899790079017902790379047905790679077908790979107911791279137914791579167917791879197920792179227923792479257926792779287929793079317932793379347935793679377938793979407941794279437944794579467947794879497950795179527953795479557956795779587959796079617962796379647965796679677968796979707971797279737974797579767977797879797980798179827983798479857986798779887989799079917992799379947995799679977998799980008001800280038004800580068007800880098010801180128013801480158016801780188019802080218022802380248025802680278028802980308031803280338034803580368037803880398040804180428043804480458046804780488049805080518052805380548055805680578058805980608061806280638064806580668067806880698070807180728073807480758076807780788079808080818082808380848085808680878088808980908091809280938094809580968097809880998100810181028103810481058106810781088109811081118112811381148115811681178118811981208121812281238124812581268127812881298130813181328133813481358136813781388139814081418142814381448145814681478148814981508151815281538154815581568157815881598160816181628163816481658166816781688169817081718172817381748175817681778178817981808181818281838184818581868187818881898190819181928193819481958196819781988199820082018202820382048205820682078208820982108211821282138214821582168217821882198220822182228223822482258226822782288229823082318232823382348235823682378238823982408241824282438244824582468247824882498250825182528253825482558256825782588259826082618262826382648265826682678268826982708271827282738274827582768277827882798280828182828283828482858286828782888289829082918292829382948295829682978298829983008301830283038304830583068307830883098310831183128313831483158316831783188319832083218322832383248325832683278328832983308331833283338334833583368337833883398340834183428343834483458346834783488349835083518352835383548355835683578358835983608361836283638364836583668367836883698370837183728373837483758376837783788379838083818382838383848385838683878388838983908391839283938394839583968397839883998400840184028403840484058406840784088409841084118412841384148415841684178418841984208421842284238424842584268427842884298430843184328433843484358436843784388439844084418442844384448445844684478448844984508451845284538454845584568457845884598460846184628463846484658466846784688469847084718472847384748475847684778478847984808481848284838484848584868487848884898490849184928493849484958496849784988499850085018502850385048505850685078508850985108511851285138514851585168517851885198520852185228523852485258526852785288529853085318532853385348535853685378538853985408541854285438544854585468547854885498550855185528553855485558556855785588559856085618562856385648565856685678568856985708571857285738574857585768577857885798580858185828583858485858586858785888589859085918592859385948595859685978598859986008601860286038604860586068607860886098610861186128613861486158616861786188619862086218622862386248625862686278628862986308631863286338634863586368637863886398640864186428643864486458646864786488649865086518652865386548655865686578658865986608661866286638664866586668667866886698670867186728673867486758676867786788679868086818682868386848685868686878688868986908691869286938694869586968697869886998700870187028703870487058706870787088709871087118712871387148715871687178718871987208721872287238724872587268727872887298730873187328733873487358736873787388739874087418742874387448745874687478748874987508751875287538754875587568757875887598760876187628763876487658766876787688769877087718772877387748775877687778778877987808781878287838784878587868787878887898790879187928793879487958796879787988799880088018802880388048805880688078808880988108811881288138814881588168817881888198820882188228823882488258826882788288829883088318832883388348835883688378838883988408841884288438844884588468847884888498850885188528853885488558856885788588859886088618862
  1. /*
  2. * linux/drivers/s390/net/qeth_main.c
  3. *
  4. * Linux on zSeries OSA Express and HiperSockets support
  5. *
  6. * Copyright 2000,2003 IBM Corporation
  7. *
  8. * Author(s): Original Code written by
  9. * Utz Bacher (utz.bacher@de.ibm.com)
  10. * Rewritten by
  11. * Frank Pavlic (fpavlic@de.ibm.com) and
  12. * Thomas Spatzier <tspat@de.ibm.com>
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2, or (at your option)
  17. * any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software
  26. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  27. */
  28. #include <linux/module.h>
  29. #include <linux/moduleparam.h>
  30. #include <linux/string.h>
  31. #include <linux/errno.h>
  32. #include <linux/mm.h>
  33. #include <linux/ip.h>
  34. #include <linux/inetdevice.h>
  35. #include <linux/netdevice.h>
  36. #include <linux/sched.h>
  37. #include <linux/workqueue.h>
  38. #include <linux/kernel.h>
  39. #include <linux/slab.h>
  40. #include <linux/interrupt.h>
  41. #include <linux/tcp.h>
  42. #include <linux/icmp.h>
  43. #include <linux/skbuff.h>
  44. #include <linux/in.h>
  45. #include <linux/igmp.h>
  46. #include <linux/init.h>
  47. #include <linux/reboot.h>
  48. #include <linux/mii.h>
  49. #include <linux/rcupdate.h>
  50. #include <linux/ethtool.h>
  51. #include <net/arp.h>
  52. #include <net/ip.h>
  53. #include <net/route.h>
  54. #include <asm/ebcdic.h>
  55. #include <asm/io.h>
  56. #include <asm/qeth.h>
  57. #include <asm/timex.h>
  58. #include <asm/semaphore.h>
  59. #include <asm/uaccess.h>
  60. #include <asm/s390_rdev.h>
  61. #include "qeth.h"
  62. #include "qeth_mpc.h"
  63. #include "qeth_fs.h"
  64. #include "qeth_eddp.h"
  65. #include "qeth_tso.h"
  66. static const char *version = "qeth S/390 OSA-Express driver";
  67. /**
  68. * Debug Facility Stuff
  69. */
  70. static debug_info_t *qeth_dbf_setup = NULL;
  71. static debug_info_t *qeth_dbf_data = NULL;
  72. static debug_info_t *qeth_dbf_misc = NULL;
  73. static debug_info_t *qeth_dbf_control = NULL;
  74. debug_info_t *qeth_dbf_trace = NULL;
  75. static debug_info_t *qeth_dbf_sense = NULL;
  76. static debug_info_t *qeth_dbf_qerr = NULL;
  77. DEFINE_PER_CPU(char[256], qeth_dbf_txt_buf);
  78. static struct lock_class_key qdio_out_skb_queue_key;
  79. /**
  80. * some more definitions and declarations
  81. */
  82. static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
  83. /* list of our cards */
  84. struct qeth_card_list_struct qeth_card_list;
  85. /*process list want to be notified*/
  86. spinlock_t qeth_notify_lock;
  87. struct list_head qeth_notify_list;
  88. static void qeth_send_control_data_cb(struct qeth_channel *,
  89. struct qeth_cmd_buffer *);
  90. /**
  91. * here we go with function implementation
  92. */
  93. static void
  94. qeth_init_qdio_info(struct qeth_card *card);
  95. static int
  96. qeth_init_qdio_queues(struct qeth_card *card);
  97. static int
  98. qeth_alloc_qdio_buffers(struct qeth_card *card);
  99. static void
  100. qeth_free_qdio_buffers(struct qeth_card *);
  101. static void
  102. qeth_clear_qdio_buffers(struct qeth_card *);
  103. static void
  104. qeth_clear_ip_list(struct qeth_card *, int, int);
  105. static void
  106. qeth_clear_ipacmd_list(struct qeth_card *);
  107. static int
  108. qeth_qdio_clear_card(struct qeth_card *, int);
  109. static void
  110. qeth_clear_working_pool_list(struct qeth_card *);
  111. static void
  112. qeth_clear_cmd_buffers(struct qeth_channel *);
  113. static int
  114. qeth_stop(struct net_device *);
  115. static void
  116. qeth_clear_ipato_list(struct qeth_card *);
  117. static int
  118. qeth_is_addr_covered_by_ipato(struct qeth_card *, struct qeth_ipaddr *);
  119. static void
  120. qeth_irq_tasklet(unsigned long);
  121. static int
  122. qeth_set_online(struct ccwgroup_device *);
  123. static int
  124. __qeth_set_online(struct ccwgroup_device *gdev, int recovery_mode);
  125. static struct qeth_ipaddr *
  126. qeth_get_addr_buffer(enum qeth_prot_versions);
  127. static void
  128. qeth_set_multicast_list(struct net_device *);
  129. static void
  130. qeth_setadp_promisc_mode(struct qeth_card *);
  131. static void
  132. qeth_notify_processes(void)
  133. {
  134. /*notify all registered processes */
  135. struct qeth_notify_list_struct *n_entry;
  136. QETH_DBF_TEXT(trace,3,"procnoti");
  137. spin_lock(&qeth_notify_lock);
  138. list_for_each_entry(n_entry, &qeth_notify_list, list) {
  139. send_sig(n_entry->signum, n_entry->task, 1);
  140. }
  141. spin_unlock(&qeth_notify_lock);
  142. }
  143. int
  144. qeth_notifier_unregister(struct task_struct *p)
  145. {
  146. struct qeth_notify_list_struct *n_entry, *tmp;
  147. QETH_DBF_TEXT(trace, 2, "notunreg");
  148. spin_lock(&qeth_notify_lock);
  149. list_for_each_entry_safe(n_entry, tmp, &qeth_notify_list, list) {
  150. if (n_entry->task == p) {
  151. list_del(&n_entry->list);
  152. kfree(n_entry);
  153. goto out;
  154. }
  155. }
  156. out:
  157. spin_unlock(&qeth_notify_lock);
  158. return 0;
  159. }
  160. int
  161. qeth_notifier_register(struct task_struct *p, int signum)
  162. {
  163. struct qeth_notify_list_struct *n_entry;
  164. /*check first if entry already exists*/
  165. spin_lock(&qeth_notify_lock);
  166. list_for_each_entry(n_entry, &qeth_notify_list, list) {
  167. if (n_entry->task == p) {
  168. n_entry->signum = signum;
  169. spin_unlock(&qeth_notify_lock);
  170. return 0;
  171. }
  172. }
  173. spin_unlock(&qeth_notify_lock);
  174. n_entry = (struct qeth_notify_list_struct *)
  175. kmalloc(sizeof(struct qeth_notify_list_struct),GFP_KERNEL);
  176. if (!n_entry)
  177. return -ENOMEM;
  178. n_entry->task = p;
  179. n_entry->signum = signum;
  180. spin_lock(&qeth_notify_lock);
  181. list_add(&n_entry->list,&qeth_notify_list);
  182. spin_unlock(&qeth_notify_lock);
  183. return 0;
  184. }
  185. /**
  186. * free channel command buffers
  187. */
  188. static void
  189. qeth_clean_channel(struct qeth_channel *channel)
  190. {
  191. int cnt;
  192. QETH_DBF_TEXT(setup, 2, "freech");
  193. for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  194. kfree(channel->iob[cnt].data);
  195. }
  196. /**
  197. * free card
  198. */
  199. static void
  200. qeth_free_card(struct qeth_card *card)
  201. {
  202. QETH_DBF_TEXT(setup, 2, "freecrd");
  203. QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
  204. qeth_clean_channel(&card->read);
  205. qeth_clean_channel(&card->write);
  206. if (card->dev)
  207. free_netdev(card->dev);
  208. qeth_clear_ip_list(card, 0, 0);
  209. qeth_clear_ipato_list(card);
  210. kfree(card->ip_tbd_list);
  211. qeth_free_qdio_buffers(card);
  212. kfree(card);
  213. }
  214. /**
  215. * alloc memory for command buffer per channel
  216. */
  217. static int
  218. qeth_setup_channel(struct qeth_channel *channel)
  219. {
  220. int cnt;
  221. QETH_DBF_TEXT(setup, 2, "setupch");
  222. for (cnt=0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
  223. channel->iob[cnt].data = (char *)
  224. kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
  225. if (channel->iob[cnt].data == NULL)
  226. break;
  227. channel->iob[cnt].state = BUF_STATE_FREE;
  228. channel->iob[cnt].channel = channel;
  229. channel->iob[cnt].callback = qeth_send_control_data_cb;
  230. channel->iob[cnt].rc = 0;
  231. }
  232. if (cnt < QETH_CMD_BUFFER_NO) {
  233. while (cnt-- > 0)
  234. kfree(channel->iob[cnt].data);
  235. return -ENOMEM;
  236. }
  237. channel->buf_no = 0;
  238. channel->io_buf_no = 0;
  239. atomic_set(&channel->irq_pending, 0);
  240. spin_lock_init(&channel->iob_lock);
  241. init_waitqueue_head(&channel->wait_q);
  242. channel->irq_tasklet.data = (unsigned long) channel;
  243. channel->irq_tasklet.func = qeth_irq_tasklet;
  244. return 0;
  245. }
  246. /**
  247. * alloc memory for card structure
  248. */
  249. static struct qeth_card *
  250. qeth_alloc_card(void)
  251. {
  252. struct qeth_card *card;
  253. QETH_DBF_TEXT(setup, 2, "alloccrd");
  254. card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
  255. if (!card)
  256. return NULL;
  257. QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
  258. if (qeth_setup_channel(&card->read)) {
  259. kfree(card);
  260. return NULL;
  261. }
  262. if (qeth_setup_channel(&card->write)) {
  263. qeth_clean_channel(&card->read);
  264. kfree(card);
  265. return NULL;
  266. }
  267. return card;
  268. }
  269. static long
  270. __qeth_check_irb_error(struct ccw_device *cdev, unsigned long intparm,
  271. struct irb *irb)
  272. {
  273. if (!IS_ERR(irb))
  274. return 0;
  275. switch (PTR_ERR(irb)) {
  276. case -EIO:
  277. PRINT_WARN("i/o-error on device %s\n", cdev->dev.bus_id);
  278. QETH_DBF_TEXT(trace, 2, "ckirberr");
  279. QETH_DBF_TEXT_(trace, 2, " rc%d", -EIO);
  280. break;
  281. case -ETIMEDOUT:
  282. PRINT_WARN("timeout on device %s\n", cdev->dev.bus_id);
  283. QETH_DBF_TEXT(trace, 2, "ckirberr");
  284. QETH_DBF_TEXT_(trace, 2, " rc%d", -ETIMEDOUT);
  285. if (intparm == QETH_RCD_PARM) {
  286. struct qeth_card *card = CARD_FROM_CDEV(cdev);
  287. if (card && (card->data.ccwdev == cdev)) {
  288. card->data.state = CH_STATE_DOWN;
  289. wake_up(&card->wait_q);
  290. }
  291. }
  292. break;
  293. default:
  294. PRINT_WARN("unknown error %ld on device %s\n", PTR_ERR(irb),
  295. cdev->dev.bus_id);
  296. QETH_DBF_TEXT(trace, 2, "ckirberr");
  297. QETH_DBF_TEXT(trace, 2, " rc???");
  298. }
  299. return PTR_ERR(irb);
  300. }
  301. static int
  302. qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
  303. {
  304. int dstat,cstat;
  305. char *sense;
  306. sense = (char *) irb->ecw;
  307. cstat = irb->scsw.cstat;
  308. dstat = irb->scsw.dstat;
  309. if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
  310. SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
  311. SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
  312. QETH_DBF_TEXT(trace,2, "CGENCHK");
  313. PRINT_WARN("check on device %s, dstat=x%x, cstat=x%x ",
  314. cdev->dev.bus_id, dstat, cstat);
  315. HEXDUMP16(WARN, "irb: ", irb);
  316. HEXDUMP16(WARN, "irb: ", ((char *) irb) + 32);
  317. return 1;
  318. }
  319. if (dstat & DEV_STAT_UNIT_CHECK) {
  320. if (sense[SENSE_RESETTING_EVENT_BYTE] &
  321. SENSE_RESETTING_EVENT_FLAG) {
  322. QETH_DBF_TEXT(trace,2,"REVIND");
  323. return 1;
  324. }
  325. if (sense[SENSE_COMMAND_REJECT_BYTE] &
  326. SENSE_COMMAND_REJECT_FLAG) {
  327. QETH_DBF_TEXT(trace,2,"CMDREJi");
  328. return 0;
  329. }
  330. if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
  331. QETH_DBF_TEXT(trace,2,"AFFE");
  332. return 1;
  333. }
  334. if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
  335. QETH_DBF_TEXT(trace,2,"ZEROSEN");
  336. return 0;
  337. }
  338. QETH_DBF_TEXT(trace,2,"DGENCHK");
  339. return 1;
  340. }
  341. return 0;
  342. }
  343. static int qeth_issue_next_read(struct qeth_card *);
  344. /**
  345. * interrupt handler
  346. */
  347. static void
  348. qeth_irq(struct ccw_device *cdev, unsigned long intparm, struct irb *irb)
  349. {
  350. int rc;
  351. int cstat,dstat;
  352. struct qeth_cmd_buffer *buffer;
  353. struct qeth_channel *channel;
  354. struct qeth_card *card;
  355. QETH_DBF_TEXT(trace,5,"irq");
  356. if (__qeth_check_irb_error(cdev, intparm, irb))
  357. return;
  358. cstat = irb->scsw.cstat;
  359. dstat = irb->scsw.dstat;
  360. card = CARD_FROM_CDEV(cdev);
  361. if (!card)
  362. return;
  363. if (card->read.ccwdev == cdev){
  364. channel = &card->read;
  365. QETH_DBF_TEXT(trace,5,"read");
  366. } else if (card->write.ccwdev == cdev) {
  367. channel = &card->write;
  368. QETH_DBF_TEXT(trace,5,"write");
  369. } else {
  370. channel = &card->data;
  371. QETH_DBF_TEXT(trace,5,"data");
  372. }
  373. atomic_set(&channel->irq_pending, 0);
  374. if (irb->scsw.fctl & (SCSW_FCTL_CLEAR_FUNC))
  375. channel->state = CH_STATE_STOPPED;
  376. if (irb->scsw.fctl & (SCSW_FCTL_HALT_FUNC))
  377. channel->state = CH_STATE_HALTED;
  378. /*let's wake up immediately on data channel*/
  379. if ((channel == &card->data) && (intparm != 0) &&
  380. (intparm != QETH_RCD_PARM))
  381. goto out;
  382. if (intparm == QETH_CLEAR_CHANNEL_PARM) {
  383. QETH_DBF_TEXT(trace, 6, "clrchpar");
  384. /* we don't have to handle this further */
  385. intparm = 0;
  386. }
  387. if (intparm == QETH_HALT_CHANNEL_PARM) {
  388. QETH_DBF_TEXT(trace, 6, "hltchpar");
  389. /* we don't have to handle this further */
  390. intparm = 0;
  391. }
  392. if ((dstat & DEV_STAT_UNIT_EXCEP) ||
  393. (dstat & DEV_STAT_UNIT_CHECK) ||
  394. (cstat)) {
  395. if (irb->esw.esw0.erw.cons) {
  396. /* TODO: we should make this s390dbf */
  397. PRINT_WARN("sense data available on channel %s.\n",
  398. CHANNEL_ID(channel));
  399. PRINT_WARN(" cstat 0x%X\n dstat 0x%X\n", cstat, dstat);
  400. HEXDUMP16(WARN,"irb: ",irb);
  401. HEXDUMP16(WARN,"sense data: ",irb->ecw);
  402. }
  403. if (intparm == QETH_RCD_PARM) {
  404. channel->state = CH_STATE_DOWN;
  405. goto out;
  406. }
  407. rc = qeth_get_problem(cdev,irb);
  408. if (rc) {
  409. qeth_schedule_recovery(card);
  410. goto out;
  411. }
  412. }
  413. if (intparm == QETH_RCD_PARM) {
  414. channel->state = CH_STATE_RCD_DONE;
  415. goto out;
  416. }
  417. if (intparm) {
  418. buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
  419. buffer->state = BUF_STATE_PROCESSED;
  420. }
  421. if (channel == &card->data)
  422. return;
  423. if (channel == &card->read &&
  424. channel->state == CH_STATE_UP)
  425. qeth_issue_next_read(card);
  426. qeth_irq_tasklet((unsigned long)channel);
  427. return;
  428. out:
  429. wake_up(&card->wait_q);
  430. }
  431. /**
  432. * tasklet function scheduled from irq handler
  433. */
  434. static void
  435. qeth_irq_tasklet(unsigned long data)
  436. {
  437. struct qeth_card *card;
  438. struct qeth_channel *channel;
  439. struct qeth_cmd_buffer *iob;
  440. __u8 index;
  441. QETH_DBF_TEXT(trace,5,"irqtlet");
  442. channel = (struct qeth_channel *) data;
  443. iob = channel->iob;
  444. index = channel->buf_no;
  445. card = CARD_FROM_CDEV(channel->ccwdev);
  446. while (iob[index].state == BUF_STATE_PROCESSED) {
  447. if (iob[index].callback !=NULL) {
  448. iob[index].callback(channel,iob + index);
  449. }
  450. index = (index + 1) % QETH_CMD_BUFFER_NO;
  451. }
  452. channel->buf_no = index;
  453. wake_up(&card->wait_q);
  454. }
  455. static int qeth_stop_card(struct qeth_card *, int);
  456. static int
  457. __qeth_set_offline(struct ccwgroup_device *cgdev, int recovery_mode)
  458. {
  459. struct qeth_card *card = (struct qeth_card *) cgdev->dev.driver_data;
  460. int rc = 0, rc2 = 0, rc3 = 0;
  461. enum qeth_card_states recover_flag;
  462. QETH_DBF_TEXT(setup, 3, "setoffl");
  463. QETH_DBF_HEX(setup, 3, &card, sizeof(void *));
  464. if (card->dev && netif_carrier_ok(card->dev))
  465. netif_carrier_off(card->dev);
  466. recover_flag = card->state;
  467. if (qeth_stop_card(card, recovery_mode) == -ERESTARTSYS){
  468. PRINT_WARN("Stopping card %s interrupted by user!\n",
  469. CARD_BUS_ID(card));
  470. return -ERESTARTSYS;
  471. }
  472. rc = ccw_device_set_offline(CARD_DDEV(card));
  473. rc2 = ccw_device_set_offline(CARD_WDEV(card));
  474. rc3 = ccw_device_set_offline(CARD_RDEV(card));
  475. if (!rc)
  476. rc = (rc2) ? rc2 : rc3;
  477. if (rc)
  478. QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
  479. if (recover_flag == CARD_STATE_UP)
  480. card->state = CARD_STATE_RECOVER;
  481. qeth_notify_processes();
  482. return 0;
  483. }
  484. static int
  485. qeth_set_offline(struct ccwgroup_device *cgdev)
  486. {
  487. return __qeth_set_offline(cgdev, 0);
  488. }
  489. static int
  490. qeth_wait_for_threads(struct qeth_card *card, unsigned long threads);
  491. static void
  492. qeth_remove_device(struct ccwgroup_device *cgdev)
  493. {
  494. struct qeth_card *card = (struct qeth_card *) cgdev->dev.driver_data;
  495. unsigned long flags;
  496. QETH_DBF_TEXT(setup, 3, "rmdev");
  497. QETH_DBF_HEX(setup, 3, &card, sizeof(void *));
  498. if (!card)
  499. return;
  500. if (qeth_wait_for_threads(card, 0xffffffff))
  501. return;
  502. if (cgdev->state == CCWGROUP_ONLINE){
  503. card->use_hard_stop = 1;
  504. qeth_set_offline(cgdev);
  505. }
  506. /* remove form our internal list */
  507. write_lock_irqsave(&qeth_card_list.rwlock, flags);
  508. list_del(&card->list);
  509. write_unlock_irqrestore(&qeth_card_list.rwlock, flags);
  510. if (card->dev)
  511. unregister_netdev(card->dev);
  512. qeth_remove_device_attributes(&cgdev->dev);
  513. qeth_free_card(card);
  514. cgdev->dev.driver_data = NULL;
  515. put_device(&cgdev->dev);
  516. }
  517. static int
  518. qeth_register_addr_entry(struct qeth_card *, struct qeth_ipaddr *);
  519. static int
  520. qeth_deregister_addr_entry(struct qeth_card *, struct qeth_ipaddr *);
  521. /**
  522. * Add/remove address to/from card's ip list, i.e. try to add or remove
  523. * reference to/from an IP address that is already registered on the card.
  524. * Returns:
  525. * 0 address was on card and its reference count has been adjusted,
  526. * but is still > 0, so nothing has to be done
  527. * also returns 0 if card was not on card and the todo was to delete
  528. * the address -> there is also nothing to be done
  529. * 1 address was not on card and the todo is to add it to the card's ip
  530. * list
  531. * -1 address was on card and its reference count has been decremented
  532. * to <= 0 by the todo -> address must be removed from card
  533. */
  534. static int
  535. __qeth_ref_ip_on_card(struct qeth_card *card, struct qeth_ipaddr *todo,
  536. struct qeth_ipaddr **__addr)
  537. {
  538. struct qeth_ipaddr *addr;
  539. int found = 0;
  540. list_for_each_entry(addr, &card->ip_list, entry) {
  541. if (card->options.layer2) {
  542. if ((addr->type == todo->type) &&
  543. (memcmp(&addr->mac, &todo->mac,
  544. OSA_ADDR_LEN) == 0)) {
  545. found = 1;
  546. break;
  547. }
  548. continue;
  549. }
  550. if ((addr->proto == QETH_PROT_IPV4) &&
  551. (todo->proto == QETH_PROT_IPV4) &&
  552. (addr->type == todo->type) &&
  553. (addr->u.a4.addr == todo->u.a4.addr) &&
  554. (addr->u.a4.mask == todo->u.a4.mask)) {
  555. found = 1;
  556. break;
  557. }
  558. if ((addr->proto == QETH_PROT_IPV6) &&
  559. (todo->proto == QETH_PROT_IPV6) &&
  560. (addr->type == todo->type) &&
  561. (addr->u.a6.pfxlen == todo->u.a6.pfxlen) &&
  562. (memcmp(&addr->u.a6.addr, &todo->u.a6.addr,
  563. sizeof(struct in6_addr)) == 0)) {
  564. found = 1;
  565. break;
  566. }
  567. }
  568. if (found) {
  569. addr->users += todo->users;
  570. if (addr->users <= 0){
  571. *__addr = addr;
  572. return -1;
  573. } else {
  574. /* for VIPA and RXIP limit refcount to 1 */
  575. if (addr->type != QETH_IP_TYPE_NORMAL)
  576. addr->users = 1;
  577. return 0;
  578. }
  579. }
  580. if (todo->users > 0) {
  581. /* for VIPA and RXIP limit refcount to 1 */
  582. if (todo->type != QETH_IP_TYPE_NORMAL)
  583. todo->users = 1;
  584. return 1;
  585. } else
  586. return 0;
  587. }
  588. static int
  589. __qeth_address_exists_in_list(struct list_head *list, struct qeth_ipaddr *addr,
  590. int same_type)
  591. {
  592. struct qeth_ipaddr *tmp;
  593. list_for_each_entry(tmp, list, entry) {
  594. if ((tmp->proto == QETH_PROT_IPV4) &&
  595. (addr->proto == QETH_PROT_IPV4) &&
  596. ((same_type && (tmp->type == addr->type)) ||
  597. (!same_type && (tmp->type != addr->type)) ) &&
  598. (tmp->u.a4.addr == addr->u.a4.addr) ){
  599. return 1;
  600. }
  601. if ((tmp->proto == QETH_PROT_IPV6) &&
  602. (addr->proto == QETH_PROT_IPV6) &&
  603. ((same_type && (tmp->type == addr->type)) ||
  604. (!same_type && (tmp->type != addr->type)) ) &&
  605. (memcmp(&tmp->u.a6.addr, &addr->u.a6.addr,
  606. sizeof(struct in6_addr)) == 0) ) {
  607. return 1;
  608. }
  609. }
  610. return 0;
  611. }
  612. /*
  613. * Add IP to be added to todo list. If there is already an "add todo"
  614. * in this list we just incremenent the reference count.
  615. * Returns 0 if we just incremented reference count.
  616. */
  617. static int
  618. __qeth_insert_ip_todo(struct qeth_card *card, struct qeth_ipaddr *addr, int add)
  619. {
  620. struct qeth_ipaddr *tmp, *t;
  621. int found = 0;
  622. list_for_each_entry_safe(tmp, t, card->ip_tbd_list, entry) {
  623. if ((addr->type == QETH_IP_TYPE_DEL_ALL_MC) &&
  624. (tmp->type == QETH_IP_TYPE_DEL_ALL_MC))
  625. return 0;
  626. if (card->options.layer2) {
  627. if ((tmp->type == addr->type) &&
  628. (tmp->is_multicast == addr->is_multicast) &&
  629. (memcmp(&tmp->mac, &addr->mac,
  630. OSA_ADDR_LEN) == 0)) {
  631. found = 1;
  632. break;
  633. }
  634. continue;
  635. }
  636. if ((tmp->proto == QETH_PROT_IPV4) &&
  637. (addr->proto == QETH_PROT_IPV4) &&
  638. (tmp->type == addr->type) &&
  639. (tmp->is_multicast == addr->is_multicast) &&
  640. (tmp->u.a4.addr == addr->u.a4.addr) &&
  641. (tmp->u.a4.mask == addr->u.a4.mask)) {
  642. found = 1;
  643. break;
  644. }
  645. if ((tmp->proto == QETH_PROT_IPV6) &&
  646. (addr->proto == QETH_PROT_IPV6) &&
  647. (tmp->type == addr->type) &&
  648. (tmp->is_multicast == addr->is_multicast) &&
  649. (tmp->u.a6.pfxlen == addr->u.a6.pfxlen) &&
  650. (memcmp(&tmp->u.a6.addr, &addr->u.a6.addr,
  651. sizeof(struct in6_addr)) == 0)) {
  652. found = 1;
  653. break;
  654. }
  655. }
  656. if (found){
  657. if (addr->users != 0)
  658. tmp->users += addr->users;
  659. else
  660. tmp->users += add? 1:-1;
  661. if (tmp->users == 0) {
  662. list_del(&tmp->entry);
  663. kfree(tmp);
  664. }
  665. return 0;
  666. } else {
  667. if (addr->type == QETH_IP_TYPE_DEL_ALL_MC)
  668. list_add(&addr->entry, card->ip_tbd_list);
  669. else {
  670. if (addr->users == 0)
  671. addr->users += add? 1:-1;
  672. if (add && (addr->type == QETH_IP_TYPE_NORMAL) &&
  673. qeth_is_addr_covered_by_ipato(card, addr)){
  674. QETH_DBF_TEXT(trace, 2, "tkovaddr");
  675. addr->set_flags |= QETH_IPA_SETIP_TAKEOVER_FLAG;
  676. }
  677. list_add_tail(&addr->entry, card->ip_tbd_list);
  678. }
  679. return 1;
  680. }
  681. }
  682. /**
  683. * Remove IP address from list
  684. */
  685. static int
  686. qeth_delete_ip(struct qeth_card *card, struct qeth_ipaddr *addr)
  687. {
  688. unsigned long flags;
  689. int rc = 0;
  690. QETH_DBF_TEXT(trace, 4, "delip");
  691. if (card->options.layer2)
  692. QETH_DBF_HEX(trace, 4, &addr->mac, 6);
  693. else if (addr->proto == QETH_PROT_IPV4)
  694. QETH_DBF_HEX(trace, 4, &addr->u.a4.addr, 4);
  695. else {
  696. QETH_DBF_HEX(trace, 4, &addr->u.a6.addr, 8);
  697. QETH_DBF_HEX(trace, 4, ((char *)&addr->u.a6.addr) + 8, 8);
  698. }
  699. spin_lock_irqsave(&card->ip_lock, flags);
  700. rc = __qeth_insert_ip_todo(card, addr, 0);
  701. spin_unlock_irqrestore(&card->ip_lock, flags);
  702. return rc;
  703. }
  704. static int
  705. qeth_add_ip(struct qeth_card *card, struct qeth_ipaddr *addr)
  706. {
  707. unsigned long flags;
  708. int rc = 0;
  709. QETH_DBF_TEXT(trace, 4, "addip");
  710. if (card->options.layer2)
  711. QETH_DBF_HEX(trace, 4, &addr->mac, 6);
  712. else if (addr->proto == QETH_PROT_IPV4)
  713. QETH_DBF_HEX(trace, 4, &addr->u.a4.addr, 4);
  714. else {
  715. QETH_DBF_HEX(trace, 4, &addr->u.a6.addr, 8);
  716. QETH_DBF_HEX(trace, 4, ((char *)&addr->u.a6.addr) + 8, 8);
  717. }
  718. spin_lock_irqsave(&card->ip_lock, flags);
  719. rc = __qeth_insert_ip_todo(card, addr, 1);
  720. spin_unlock_irqrestore(&card->ip_lock, flags);
  721. return rc;
  722. }
  723. static void
  724. __qeth_delete_all_mc(struct qeth_card *card, unsigned long *flags)
  725. {
  726. struct qeth_ipaddr *addr, *tmp;
  727. int rc;
  728. again:
  729. list_for_each_entry_safe(addr, tmp, &card->ip_list, entry) {
  730. if (addr->is_multicast) {
  731. spin_unlock_irqrestore(&card->ip_lock, *flags);
  732. rc = qeth_deregister_addr_entry(card, addr);
  733. spin_lock_irqsave(&card->ip_lock, *flags);
  734. if (!rc) {
  735. list_del(&addr->entry);
  736. kfree(addr);
  737. goto again;
  738. }
  739. }
  740. }
  741. }
  742. static void
  743. qeth_set_ip_addr_list(struct qeth_card *card)
  744. {
  745. struct list_head *tbd_list;
  746. struct qeth_ipaddr *todo, *addr;
  747. unsigned long flags;
  748. int rc;
  749. QETH_DBF_TEXT(trace, 2, "sdiplist");
  750. QETH_DBF_HEX(trace, 2, &card, sizeof(void *));
  751. spin_lock_irqsave(&card->ip_lock, flags);
  752. tbd_list = card->ip_tbd_list;
  753. card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_ATOMIC);
  754. if (!card->ip_tbd_list) {
  755. QETH_DBF_TEXT(trace, 0, "silnomem");
  756. card->ip_tbd_list = tbd_list;
  757. spin_unlock_irqrestore(&card->ip_lock, flags);
  758. return;
  759. } else
  760. INIT_LIST_HEAD(card->ip_tbd_list);
  761. while (!list_empty(tbd_list)){
  762. todo = list_entry(tbd_list->next, struct qeth_ipaddr, entry);
  763. list_del(&todo->entry);
  764. if (todo->type == QETH_IP_TYPE_DEL_ALL_MC){
  765. __qeth_delete_all_mc(card, &flags);
  766. kfree(todo);
  767. continue;
  768. }
  769. rc = __qeth_ref_ip_on_card(card, todo, &addr);
  770. if (rc == 0) {
  771. /* nothing to be done; only adjusted refcount */
  772. kfree(todo);
  773. } else if (rc == 1) {
  774. /* new entry to be added to on-card list */
  775. spin_unlock_irqrestore(&card->ip_lock, flags);
  776. rc = qeth_register_addr_entry(card, todo);
  777. spin_lock_irqsave(&card->ip_lock, flags);
  778. if (!rc)
  779. list_add_tail(&todo->entry, &card->ip_list);
  780. else
  781. kfree(todo);
  782. } else if (rc == -1) {
  783. /* on-card entry to be removed */
  784. list_del_init(&addr->entry);
  785. spin_unlock_irqrestore(&card->ip_lock, flags);
  786. rc = qeth_deregister_addr_entry(card, addr);
  787. spin_lock_irqsave(&card->ip_lock, flags);
  788. if (!rc)
  789. kfree(addr);
  790. else
  791. list_add_tail(&addr->entry, &card->ip_list);
  792. kfree(todo);
  793. }
  794. }
  795. spin_unlock_irqrestore(&card->ip_lock, flags);
  796. kfree(tbd_list);
  797. }
  798. static void qeth_delete_mc_addresses(struct qeth_card *);
  799. static void qeth_add_multicast_ipv4(struct qeth_card *);
  800. static void qeth_layer2_add_multicast(struct qeth_card *);
  801. #ifdef CONFIG_QETH_IPV6
  802. static void qeth_add_multicast_ipv6(struct qeth_card *);
  803. #endif
  804. static int
  805. qeth_set_thread_start_bit(struct qeth_card *card, unsigned long thread)
  806. {
  807. unsigned long flags;
  808. spin_lock_irqsave(&card->thread_mask_lock, flags);
  809. if ( !(card->thread_allowed_mask & thread) ||
  810. (card->thread_start_mask & thread) ) {
  811. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  812. return -EPERM;
  813. }
  814. card->thread_start_mask |= thread;
  815. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  816. return 0;
  817. }
  818. static void
  819. qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
  820. {
  821. unsigned long flags;
  822. spin_lock_irqsave(&card->thread_mask_lock, flags);
  823. card->thread_start_mask &= ~thread;
  824. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  825. wake_up(&card->wait_q);
  826. }
  827. static void
  828. qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
  829. {
  830. unsigned long flags;
  831. spin_lock_irqsave(&card->thread_mask_lock, flags);
  832. card->thread_running_mask &= ~thread;
  833. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  834. wake_up(&card->wait_q);
  835. }
  836. static int
  837. __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  838. {
  839. unsigned long flags;
  840. int rc = 0;
  841. spin_lock_irqsave(&card->thread_mask_lock, flags);
  842. if (card->thread_start_mask & thread){
  843. if ((card->thread_allowed_mask & thread) &&
  844. !(card->thread_running_mask & thread)){
  845. rc = 1;
  846. card->thread_start_mask &= ~thread;
  847. card->thread_running_mask |= thread;
  848. } else
  849. rc = -EPERM;
  850. }
  851. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  852. return rc;
  853. }
  854. static int
  855. qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
  856. {
  857. int rc = 0;
  858. wait_event(card->wait_q,
  859. (rc = __qeth_do_run_thread(card, thread)) >= 0);
  860. return rc;
  861. }
  862. static int
  863. qeth_recover(void *ptr)
  864. {
  865. struct qeth_card *card;
  866. int rc = 0;
  867. card = (struct qeth_card *) ptr;
  868. daemonize("qeth_recover");
  869. QETH_DBF_TEXT(trace,2,"recover1");
  870. QETH_DBF_HEX(trace, 2, &card, sizeof(void *));
  871. if (!qeth_do_run_thread(card, QETH_RECOVER_THREAD))
  872. return 0;
  873. QETH_DBF_TEXT(trace,2,"recover2");
  874. PRINT_WARN("Recovery of device %s started ...\n",
  875. CARD_BUS_ID(card));
  876. card->use_hard_stop = 1;
  877. __qeth_set_offline(card->gdev,1);
  878. rc = __qeth_set_online(card->gdev,1);
  879. /* don't run another scheduled recovery */
  880. qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD);
  881. qeth_clear_thread_running_bit(card, QETH_RECOVER_THREAD);
  882. if (!rc)
  883. PRINT_INFO("Device %s successfully recovered!\n",
  884. CARD_BUS_ID(card));
  885. else
  886. PRINT_INFO("Device %s could not be recovered!\n",
  887. CARD_BUS_ID(card));
  888. return 0;
  889. }
  890. void
  891. qeth_schedule_recovery(struct qeth_card *card)
  892. {
  893. QETH_DBF_TEXT(trace,2,"startrec");
  894. if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
  895. schedule_work(&card->kernel_thread_starter);
  896. }
  897. static int
  898. qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
  899. {
  900. unsigned long flags;
  901. int rc = 0;
  902. spin_lock_irqsave(&card->thread_mask_lock, flags);
  903. QETH_DBF_TEXT_(trace, 4, " %02x%02x%02x",
  904. (u8) card->thread_start_mask,
  905. (u8) card->thread_allowed_mask,
  906. (u8) card->thread_running_mask);
  907. rc = (card->thread_start_mask & thread);
  908. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  909. return rc;
  910. }
  911. static void
  912. qeth_start_kernel_thread(struct work_struct *work)
  913. {
  914. struct qeth_card *card = container_of(work, struct qeth_card, kernel_thread_starter);
  915. QETH_DBF_TEXT(trace , 2, "strthrd");
  916. if (card->read.state != CH_STATE_UP &&
  917. card->write.state != CH_STATE_UP)
  918. return;
  919. if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
  920. kernel_thread(qeth_recover, (void *) card, SIGCHLD);
  921. }
  922. static void
  923. qeth_set_intial_options(struct qeth_card *card)
  924. {
  925. card->options.route4.type = NO_ROUTER;
  926. #ifdef CONFIG_QETH_IPV6
  927. card->options.route6.type = NO_ROUTER;
  928. #endif /* QETH_IPV6 */
  929. card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
  930. card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
  931. card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
  932. card->options.fake_broadcast = 0;
  933. card->options.add_hhlen = DEFAULT_ADD_HHLEN;
  934. card->options.fake_ll = 0;
  935. if (card->info.type == QETH_CARD_TYPE_OSN)
  936. card->options.layer2 = 1;
  937. else
  938. card->options.layer2 = 0;
  939. card->options.performance_stats = 0;
  940. card->options.rx_sg_cb = QETH_RX_SG_CB;
  941. }
  942. /**
  943. * initialize channels ,card and all state machines
  944. */
  945. static int
  946. qeth_setup_card(struct qeth_card *card)
  947. {
  948. QETH_DBF_TEXT(setup, 2, "setupcrd");
  949. QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
  950. card->read.state = CH_STATE_DOWN;
  951. card->write.state = CH_STATE_DOWN;
  952. card->data.state = CH_STATE_DOWN;
  953. card->state = CARD_STATE_DOWN;
  954. card->lan_online = 0;
  955. card->use_hard_stop = 0;
  956. card->dev = NULL;
  957. #ifdef CONFIG_QETH_VLAN
  958. spin_lock_init(&card->vlanlock);
  959. card->vlangrp = NULL;
  960. #endif
  961. spin_lock_init(&card->lock);
  962. spin_lock_init(&card->ip_lock);
  963. spin_lock_init(&card->thread_mask_lock);
  964. card->thread_start_mask = 0;
  965. card->thread_allowed_mask = 0;
  966. card->thread_running_mask = 0;
  967. INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
  968. INIT_LIST_HEAD(&card->ip_list);
  969. card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
  970. if (!card->ip_tbd_list) {
  971. QETH_DBF_TEXT(setup, 0, "iptbdnom");
  972. return -ENOMEM;
  973. }
  974. INIT_LIST_HEAD(card->ip_tbd_list);
  975. INIT_LIST_HEAD(&card->cmd_waiter_list);
  976. init_waitqueue_head(&card->wait_q);
  977. /* intial options */
  978. qeth_set_intial_options(card);
  979. /* IP address takeover */
  980. INIT_LIST_HEAD(&card->ipato.entries);
  981. card->ipato.enabled = 0;
  982. card->ipato.invert4 = 0;
  983. card->ipato.invert6 = 0;
  984. /* init QDIO stuff */
  985. qeth_init_qdio_info(card);
  986. return 0;
  987. }
  988. static int
  989. is_1920_device (struct qeth_card *card)
  990. {
  991. int single_queue = 0;
  992. struct ccw_device *ccwdev;
  993. struct channelPath_dsc {
  994. u8 flags;
  995. u8 lsn;
  996. u8 desc;
  997. u8 chpid;
  998. u8 swla;
  999. u8 zeroes;
  1000. u8 chla;
  1001. u8 chpp;
  1002. } *chp_dsc;
  1003. QETH_DBF_TEXT(setup, 2, "chk_1920");
  1004. ccwdev = card->data.ccwdev;
  1005. chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
  1006. if (chp_dsc != NULL) {
  1007. /* CHPP field bit 6 == 1 -> single queue */
  1008. single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
  1009. kfree(chp_dsc);
  1010. }
  1011. QETH_DBF_TEXT_(setup, 2, "rc:%x", single_queue);
  1012. return single_queue;
  1013. }
  1014. static int
  1015. qeth_determine_card_type(struct qeth_card *card)
  1016. {
  1017. int i = 0;
  1018. QETH_DBF_TEXT(setup, 2, "detcdtyp");
  1019. card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
  1020. card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
  1021. while (known_devices[i][4]) {
  1022. if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
  1023. (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
  1024. card->info.type = known_devices[i][4];
  1025. card->qdio.no_out_queues = known_devices[i][8];
  1026. card->info.is_multicast_different = known_devices[i][9];
  1027. if (is_1920_device(card)) {
  1028. PRINT_INFO("Priority Queueing not able "
  1029. "due to hardware limitations!\n");
  1030. card->qdio.no_out_queues = 1;
  1031. card->qdio.default_out_queue = 0;
  1032. }
  1033. return 0;
  1034. }
  1035. i++;
  1036. }
  1037. card->info.type = QETH_CARD_TYPE_UNKNOWN;
  1038. PRINT_ERR("unknown card type on device %s\n", CARD_BUS_ID(card));
  1039. return -ENOENT;
  1040. }
  1041. static int
  1042. qeth_probe_device(struct ccwgroup_device *gdev)
  1043. {
  1044. struct qeth_card *card;
  1045. struct device *dev;
  1046. unsigned long flags;
  1047. int rc;
  1048. QETH_DBF_TEXT(setup, 2, "probedev");
  1049. dev = &gdev->dev;
  1050. if (!get_device(dev))
  1051. return -ENODEV;
  1052. QETH_DBF_TEXT_(setup, 2, "%s", gdev->dev.bus_id);
  1053. card = qeth_alloc_card();
  1054. if (!card) {
  1055. put_device(dev);
  1056. QETH_DBF_TEXT_(setup, 2, "1err%d", -ENOMEM);
  1057. return -ENOMEM;
  1058. }
  1059. card->read.ccwdev = gdev->cdev[0];
  1060. card->write.ccwdev = gdev->cdev[1];
  1061. card->data.ccwdev = gdev->cdev[2];
  1062. gdev->dev.driver_data = card;
  1063. card->gdev = gdev;
  1064. gdev->cdev[0]->handler = qeth_irq;
  1065. gdev->cdev[1]->handler = qeth_irq;
  1066. gdev->cdev[2]->handler = qeth_irq;
  1067. if ((rc = qeth_determine_card_type(card))){
  1068. PRINT_WARN("%s: not a valid card type\n", __func__);
  1069. QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
  1070. put_device(dev);
  1071. qeth_free_card(card);
  1072. return rc;
  1073. }
  1074. if ((rc = qeth_setup_card(card))){
  1075. QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
  1076. put_device(dev);
  1077. qeth_free_card(card);
  1078. return rc;
  1079. }
  1080. rc = qeth_create_device_attributes(dev);
  1081. if (rc) {
  1082. put_device(dev);
  1083. qeth_free_card(card);
  1084. return rc;
  1085. }
  1086. /* insert into our internal list */
  1087. write_lock_irqsave(&qeth_card_list.rwlock, flags);
  1088. list_add_tail(&card->list, &qeth_card_list.list);
  1089. write_unlock_irqrestore(&qeth_card_list.rwlock, flags);
  1090. return rc;
  1091. }
  1092. static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
  1093. int *length)
  1094. {
  1095. struct ciw *ciw;
  1096. char *rcd_buf;
  1097. int ret;
  1098. struct qeth_channel *channel = &card->data;
  1099. unsigned long flags;
  1100. /*
  1101. * scan for RCD command in extended SenseID data
  1102. */
  1103. ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
  1104. if (!ciw || ciw->cmd == 0)
  1105. return -EOPNOTSUPP;
  1106. rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
  1107. if (!rcd_buf)
  1108. return -ENOMEM;
  1109. channel->ccw.cmd_code = ciw->cmd;
  1110. channel->ccw.cda = (__u32) __pa (rcd_buf);
  1111. channel->ccw.count = ciw->count;
  1112. channel->ccw.flags = CCW_FLAG_SLI;
  1113. channel->state = CH_STATE_RCD;
  1114. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1115. ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
  1116. QETH_RCD_PARM, LPM_ANYPATH, 0,
  1117. QETH_RCD_TIMEOUT);
  1118. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1119. if (!ret)
  1120. wait_event(card->wait_q,
  1121. (channel->state == CH_STATE_RCD_DONE ||
  1122. channel->state == CH_STATE_DOWN));
  1123. if (channel->state == CH_STATE_DOWN)
  1124. ret = -EIO;
  1125. else
  1126. channel->state = CH_STATE_DOWN;
  1127. if (ret) {
  1128. kfree(rcd_buf);
  1129. *buffer = NULL;
  1130. *length = 0;
  1131. } else {
  1132. *length = ciw->count;
  1133. *buffer = rcd_buf;
  1134. }
  1135. return ret;
  1136. }
  1137. static int
  1138. qeth_get_unitaddr(struct qeth_card *card)
  1139. {
  1140. int length;
  1141. char *prcd;
  1142. int rc;
  1143. QETH_DBF_TEXT(setup, 2, "getunit");
  1144. rc = qeth_read_conf_data(card, (void **) &prcd, &length);
  1145. if (rc) {
  1146. PRINT_ERR("qeth_read_conf_data for device %s returned %i\n",
  1147. CARD_DDEV_ID(card), rc);
  1148. return rc;
  1149. }
  1150. card->info.chpid = prcd[30];
  1151. card->info.unit_addr2 = prcd[31];
  1152. card->info.cula = prcd[63];
  1153. card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
  1154. (prcd[0x11] == _ascebc['M']));
  1155. kfree(prcd);
  1156. return 0;
  1157. }
  1158. static void
  1159. qeth_init_tokens(struct qeth_card *card)
  1160. {
  1161. card->token.issuer_rm_w = 0x00010103UL;
  1162. card->token.cm_filter_w = 0x00010108UL;
  1163. card->token.cm_connection_w = 0x0001010aUL;
  1164. card->token.ulp_filter_w = 0x0001010bUL;
  1165. card->token.ulp_connection_w = 0x0001010dUL;
  1166. }
  1167. static inline __u16
  1168. raw_devno_from_bus_id(char *id)
  1169. {
  1170. id += (strlen(id) - 4);
  1171. return (__u16) simple_strtoul(id, &id, 16);
  1172. }
  1173. /**
  1174. * setup channel
  1175. */
  1176. static void
  1177. qeth_setup_ccw(struct qeth_channel *channel,unsigned char *iob, __u32 len)
  1178. {
  1179. struct qeth_card *card;
  1180. QETH_DBF_TEXT(trace, 4, "setupccw");
  1181. card = CARD_FROM_CDEV(channel->ccwdev);
  1182. if (channel == &card->read)
  1183. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  1184. else
  1185. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  1186. channel->ccw.count = len;
  1187. channel->ccw.cda = (__u32) __pa(iob);
  1188. }
  1189. /**
  1190. * get free buffer for ccws (IDX activation, lancmds,ipassists...)
  1191. */
  1192. static struct qeth_cmd_buffer *
  1193. __qeth_get_buffer(struct qeth_channel *channel)
  1194. {
  1195. __u8 index;
  1196. QETH_DBF_TEXT(trace, 6, "getbuff");
  1197. index = channel->io_buf_no;
  1198. do {
  1199. if (channel->iob[index].state == BUF_STATE_FREE) {
  1200. channel->iob[index].state = BUF_STATE_LOCKED;
  1201. channel->io_buf_no = (channel->io_buf_no + 1) %
  1202. QETH_CMD_BUFFER_NO;
  1203. memset(channel->iob[index].data, 0, QETH_BUFSIZE);
  1204. return channel->iob + index;
  1205. }
  1206. index = (index + 1) % QETH_CMD_BUFFER_NO;
  1207. } while(index != channel->io_buf_no);
  1208. return NULL;
  1209. }
  1210. /**
  1211. * release command buffer
  1212. */
  1213. static void
  1214. qeth_release_buffer(struct qeth_channel *channel, struct qeth_cmd_buffer *iob)
  1215. {
  1216. unsigned long flags;
  1217. QETH_DBF_TEXT(trace, 6, "relbuff");
  1218. spin_lock_irqsave(&channel->iob_lock, flags);
  1219. memset(iob->data, 0, QETH_BUFSIZE);
  1220. iob->state = BUF_STATE_FREE;
  1221. iob->callback = qeth_send_control_data_cb;
  1222. iob->rc = 0;
  1223. spin_unlock_irqrestore(&channel->iob_lock, flags);
  1224. }
  1225. static struct qeth_cmd_buffer *
  1226. qeth_get_buffer(struct qeth_channel *channel)
  1227. {
  1228. struct qeth_cmd_buffer *buffer = NULL;
  1229. unsigned long flags;
  1230. spin_lock_irqsave(&channel->iob_lock, flags);
  1231. buffer = __qeth_get_buffer(channel);
  1232. spin_unlock_irqrestore(&channel->iob_lock, flags);
  1233. return buffer;
  1234. }
  1235. static struct qeth_cmd_buffer *
  1236. qeth_wait_for_buffer(struct qeth_channel *channel)
  1237. {
  1238. struct qeth_cmd_buffer *buffer;
  1239. wait_event(channel->wait_q,
  1240. ((buffer = qeth_get_buffer(channel)) != NULL));
  1241. return buffer;
  1242. }
  1243. static void
  1244. qeth_clear_cmd_buffers(struct qeth_channel *channel)
  1245. {
  1246. int cnt;
  1247. for (cnt=0; cnt < QETH_CMD_BUFFER_NO; cnt++)
  1248. qeth_release_buffer(channel,&channel->iob[cnt]);
  1249. channel->buf_no = 0;
  1250. channel->io_buf_no = 0;
  1251. }
  1252. /**
  1253. * start IDX for read and write channel
  1254. */
  1255. static int
  1256. qeth_idx_activate_get_answer(struct qeth_channel *channel,
  1257. void (*idx_reply_cb)(struct qeth_channel *,
  1258. struct qeth_cmd_buffer *))
  1259. {
  1260. struct qeth_cmd_buffer *iob;
  1261. unsigned long flags;
  1262. int rc;
  1263. struct qeth_card *card;
  1264. QETH_DBF_TEXT(setup, 2, "idxanswr");
  1265. card = CARD_FROM_CDEV(channel->ccwdev);
  1266. iob = qeth_get_buffer(channel);
  1267. iob->callback = idx_reply_cb;
  1268. memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
  1269. channel->ccw.count = QETH_BUFSIZE;
  1270. channel->ccw.cda = (__u32) __pa(iob->data);
  1271. wait_event(card->wait_q,
  1272. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1273. QETH_DBF_TEXT(setup, 6, "noirqpnd");
  1274. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1275. rc = ccw_device_start(channel->ccwdev,
  1276. &channel->ccw,(addr_t) iob, 0, 0);
  1277. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1278. if (rc) {
  1279. PRINT_ERR("qeth: Error2 in activating channel rc=%d\n",rc);
  1280. QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
  1281. atomic_set(&channel->irq_pending, 0);
  1282. wake_up(&card->wait_q);
  1283. return rc;
  1284. }
  1285. rc = wait_event_interruptible_timeout(card->wait_q,
  1286. channel->state == CH_STATE_UP, QETH_TIMEOUT);
  1287. if (rc == -ERESTARTSYS)
  1288. return rc;
  1289. if (channel->state != CH_STATE_UP){
  1290. rc = -ETIME;
  1291. QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
  1292. qeth_clear_cmd_buffers(channel);
  1293. } else
  1294. rc = 0;
  1295. return rc;
  1296. }
  1297. static int
  1298. qeth_idx_activate_channel(struct qeth_channel *channel,
  1299. void (*idx_reply_cb)(struct qeth_channel *,
  1300. struct qeth_cmd_buffer *))
  1301. {
  1302. struct qeth_card *card;
  1303. struct qeth_cmd_buffer *iob;
  1304. unsigned long flags;
  1305. __u16 temp;
  1306. int rc;
  1307. card = CARD_FROM_CDEV(channel->ccwdev);
  1308. QETH_DBF_TEXT(setup, 2, "idxactch");
  1309. iob = qeth_get_buffer(channel);
  1310. iob->callback = idx_reply_cb;
  1311. memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
  1312. channel->ccw.count = IDX_ACTIVATE_SIZE;
  1313. channel->ccw.cda = (__u32) __pa(iob->data);
  1314. if (channel == &card->write) {
  1315. memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
  1316. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1317. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1318. card->seqno.trans_hdr++;
  1319. } else {
  1320. memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
  1321. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1322. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1323. }
  1324. memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1325. &card->token.issuer_rm_w,QETH_MPC_TOKEN_LENGTH);
  1326. memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
  1327. &card->info.func_level,sizeof(__u16));
  1328. temp = raw_devno_from_bus_id(CARD_DDEV_ID(card));
  1329. memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp, 2);
  1330. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1331. memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
  1332. wait_event(card->wait_q,
  1333. atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
  1334. QETH_DBF_TEXT(setup, 6, "noirqpnd");
  1335. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  1336. rc = ccw_device_start(channel->ccwdev,
  1337. &channel->ccw,(addr_t) iob, 0, 0);
  1338. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  1339. if (rc) {
  1340. PRINT_ERR("qeth: Error1 in activating channel. rc=%d\n",rc);
  1341. QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
  1342. atomic_set(&channel->irq_pending, 0);
  1343. wake_up(&card->wait_q);
  1344. return rc;
  1345. }
  1346. rc = wait_event_interruptible_timeout(card->wait_q,
  1347. channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
  1348. if (rc == -ERESTARTSYS)
  1349. return rc;
  1350. if (channel->state != CH_STATE_ACTIVATING) {
  1351. PRINT_WARN("qeth: IDX activate timed out!\n");
  1352. QETH_DBF_TEXT_(setup, 2, "2err%d", -ETIME);
  1353. qeth_clear_cmd_buffers(channel);
  1354. return -ETIME;
  1355. }
  1356. return qeth_idx_activate_get_answer(channel,idx_reply_cb);
  1357. }
  1358. static int
  1359. qeth_peer_func_level(int level)
  1360. {
  1361. if ((level & 0xff) == 8)
  1362. return (level & 0xff) + 0x400;
  1363. if (((level >> 8) & 3) == 1)
  1364. return (level & 0xff) + 0x200;
  1365. return level;
  1366. }
  1367. static void
  1368. qeth_idx_write_cb(struct qeth_channel *channel, struct qeth_cmd_buffer *iob)
  1369. {
  1370. struct qeth_card *card;
  1371. __u16 temp;
  1372. QETH_DBF_TEXT(setup ,2, "idxwrcb");
  1373. if (channel->state == CH_STATE_DOWN) {
  1374. channel->state = CH_STATE_ACTIVATING;
  1375. goto out;
  1376. }
  1377. card = CARD_FROM_CDEV(channel->ccwdev);
  1378. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1379. PRINT_ERR("IDX_ACTIVATE on write channel device %s: negative "
  1380. "reply\n", CARD_WDEV_ID(card));
  1381. goto out;
  1382. }
  1383. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1384. if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
  1385. PRINT_WARN("IDX_ACTIVATE on write channel device %s: "
  1386. "function level mismatch "
  1387. "(sent: 0x%x, received: 0x%x)\n",
  1388. CARD_WDEV_ID(card), card->info.func_level, temp);
  1389. goto out;
  1390. }
  1391. channel->state = CH_STATE_UP;
  1392. out:
  1393. qeth_release_buffer(channel, iob);
  1394. }
  1395. static int
  1396. qeth_check_idx_response(unsigned char *buffer)
  1397. {
  1398. if (!buffer)
  1399. return 0;
  1400. QETH_DBF_HEX(control, 2, buffer, QETH_DBF_CONTROL_LEN);
  1401. if ((buffer[2] & 0xc0) == 0xc0) {
  1402. PRINT_WARN("received an IDX TERMINATE "
  1403. "with cause code 0x%02x%s\n",
  1404. buffer[4],
  1405. ((buffer[4] == 0x22) ?
  1406. " -- try another portname" : ""));
  1407. QETH_DBF_TEXT(trace, 2, "ckidxres");
  1408. QETH_DBF_TEXT(trace, 2, " idxterm");
  1409. QETH_DBF_TEXT_(trace, 2, " rc%d", -EIO);
  1410. return -EIO;
  1411. }
  1412. return 0;
  1413. }
  1414. static void
  1415. qeth_idx_read_cb(struct qeth_channel *channel, struct qeth_cmd_buffer *iob)
  1416. {
  1417. struct qeth_card *card;
  1418. __u16 temp;
  1419. QETH_DBF_TEXT(setup , 2, "idxrdcb");
  1420. if (channel->state == CH_STATE_DOWN) {
  1421. channel->state = CH_STATE_ACTIVATING;
  1422. goto out;
  1423. }
  1424. card = CARD_FROM_CDEV(channel->ccwdev);
  1425. if (qeth_check_idx_response(iob->data)) {
  1426. goto out;
  1427. }
  1428. if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
  1429. PRINT_ERR("IDX_ACTIVATE on read channel device %s: negative "
  1430. "reply\n", CARD_RDEV_ID(card));
  1431. goto out;
  1432. }
  1433. /**
  1434. * temporary fix for microcode bug
  1435. * to revert it,replace OR by AND
  1436. */
  1437. if ( (!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
  1438. (card->info.type == QETH_CARD_TYPE_OSAE) )
  1439. card->info.portname_required = 1;
  1440. memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
  1441. if (temp != qeth_peer_func_level(card->info.func_level)) {
  1442. PRINT_WARN("IDX_ACTIVATE on read channel device %s: function "
  1443. "level mismatch (sent: 0x%x, received: 0x%x)\n",
  1444. CARD_RDEV_ID(card), card->info.func_level, temp);
  1445. goto out;
  1446. }
  1447. memcpy(&card->token.issuer_rm_r,
  1448. QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
  1449. QETH_MPC_TOKEN_LENGTH);
  1450. memcpy(&card->info.mcl_level[0],
  1451. QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
  1452. channel->state = CH_STATE_UP;
  1453. out:
  1454. qeth_release_buffer(channel,iob);
  1455. }
  1456. static int
  1457. qeth_issue_next_read(struct qeth_card *card)
  1458. {
  1459. int rc;
  1460. struct qeth_cmd_buffer *iob;
  1461. QETH_DBF_TEXT(trace,5,"issnxrd");
  1462. if (card->read.state != CH_STATE_UP)
  1463. return -EIO;
  1464. iob = qeth_get_buffer(&card->read);
  1465. if (!iob) {
  1466. PRINT_WARN("issue_next_read failed: no iob available!\n");
  1467. return -ENOMEM;
  1468. }
  1469. qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
  1470. QETH_DBF_TEXT(trace, 6, "noirqpnd");
  1471. rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
  1472. (addr_t) iob, 0, 0);
  1473. if (rc) {
  1474. PRINT_ERR("Error in starting next read ccw! rc=%i\n", rc);
  1475. atomic_set(&card->read.irq_pending, 0);
  1476. qeth_schedule_recovery(card);
  1477. wake_up(&card->wait_q);
  1478. }
  1479. return rc;
  1480. }
  1481. static struct qeth_reply *
  1482. qeth_alloc_reply(struct qeth_card *card)
  1483. {
  1484. struct qeth_reply *reply;
  1485. reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
  1486. if (reply){
  1487. atomic_set(&reply->refcnt, 1);
  1488. atomic_set(&reply->received, 0);
  1489. reply->card = card;
  1490. };
  1491. return reply;
  1492. }
  1493. static void
  1494. qeth_get_reply(struct qeth_reply *reply)
  1495. {
  1496. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  1497. atomic_inc(&reply->refcnt);
  1498. }
  1499. static void
  1500. qeth_put_reply(struct qeth_reply *reply)
  1501. {
  1502. WARN_ON(atomic_read(&reply->refcnt) <= 0);
  1503. if (atomic_dec_and_test(&reply->refcnt))
  1504. kfree(reply);
  1505. }
  1506. static void
  1507. qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, struct qeth_card *card)
  1508. {
  1509. int rc;
  1510. int com;
  1511. char * ipa_name;
  1512. com = cmd->hdr.command;
  1513. rc = cmd->hdr.return_code;
  1514. ipa_name = qeth_get_ipa_cmd_name(com);
  1515. PRINT_ERR("%s(x%X) for %s returned x%X \"%s\"\n", ipa_name, com,
  1516. QETH_CARD_IFNAME(card), rc, qeth_get_ipa_msg(rc));
  1517. }
  1518. static struct qeth_ipa_cmd *
  1519. qeth_check_ipa_data(struct qeth_card *card, struct qeth_cmd_buffer *iob)
  1520. {
  1521. struct qeth_ipa_cmd *cmd = NULL;
  1522. QETH_DBF_TEXT(trace,5,"chkipad");
  1523. if (IS_IPA(iob->data)){
  1524. cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
  1525. if (IS_IPA_REPLY(cmd)) {
  1526. if (cmd->hdr.return_code)
  1527. qeth_issue_ipa_msg(cmd, card);
  1528. return cmd;
  1529. }
  1530. else {
  1531. switch (cmd->hdr.command) {
  1532. case IPA_CMD_STOPLAN:
  1533. PRINT_WARN("Link failure on %s (CHPID 0x%X) - "
  1534. "there is a network problem or "
  1535. "someone pulled the cable or "
  1536. "disabled the port.\n",
  1537. QETH_CARD_IFNAME(card),
  1538. card->info.chpid);
  1539. card->lan_online = 0;
  1540. if (card->dev && netif_carrier_ok(card->dev))
  1541. netif_carrier_off(card->dev);
  1542. return NULL;
  1543. case IPA_CMD_STARTLAN:
  1544. PRINT_INFO("Link reestablished on %s "
  1545. "(CHPID 0x%X). Scheduling "
  1546. "IP address reset.\n",
  1547. QETH_CARD_IFNAME(card),
  1548. card->info.chpid);
  1549. netif_carrier_on(card->dev);
  1550. qeth_schedule_recovery(card);
  1551. return NULL;
  1552. case IPA_CMD_MODCCID:
  1553. return cmd;
  1554. case IPA_CMD_REGISTER_LOCAL_ADDR:
  1555. QETH_DBF_TEXT(trace,3, "irla");
  1556. break;
  1557. case IPA_CMD_UNREGISTER_LOCAL_ADDR:
  1558. QETH_DBF_TEXT(trace,3, "urla");
  1559. break;
  1560. default:
  1561. PRINT_WARN("Received data is IPA "
  1562. "but not a reply!\n");
  1563. break;
  1564. }
  1565. }
  1566. }
  1567. return cmd;
  1568. }
  1569. /**
  1570. * wake all waiting ipa commands
  1571. */
  1572. static void
  1573. qeth_clear_ipacmd_list(struct qeth_card *card)
  1574. {
  1575. struct qeth_reply *reply, *r;
  1576. unsigned long flags;
  1577. QETH_DBF_TEXT(trace, 4, "clipalst");
  1578. spin_lock_irqsave(&card->lock, flags);
  1579. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  1580. qeth_get_reply(reply);
  1581. reply->rc = -EIO;
  1582. atomic_inc(&reply->received);
  1583. list_del_init(&reply->list);
  1584. wake_up(&reply->wait_q);
  1585. qeth_put_reply(reply);
  1586. }
  1587. spin_unlock_irqrestore(&card->lock, flags);
  1588. }
  1589. static void
  1590. qeth_send_control_data_cb(struct qeth_channel *channel,
  1591. struct qeth_cmd_buffer *iob)
  1592. {
  1593. struct qeth_card *card;
  1594. struct qeth_reply *reply, *r;
  1595. struct qeth_ipa_cmd *cmd;
  1596. unsigned long flags;
  1597. int keep_reply;
  1598. QETH_DBF_TEXT(trace,4,"sndctlcb");
  1599. card = CARD_FROM_CDEV(channel->ccwdev);
  1600. if (qeth_check_idx_response(iob->data)) {
  1601. qeth_clear_ipacmd_list(card);
  1602. qeth_schedule_recovery(card);
  1603. goto out;
  1604. }
  1605. cmd = qeth_check_ipa_data(card, iob);
  1606. if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
  1607. goto out;
  1608. /*in case of OSN : check if cmd is set */
  1609. if (card->info.type == QETH_CARD_TYPE_OSN &&
  1610. cmd &&
  1611. cmd->hdr.command != IPA_CMD_STARTLAN &&
  1612. card->osn_info.assist_cb != NULL) {
  1613. card->osn_info.assist_cb(card->dev, cmd);
  1614. goto out;
  1615. }
  1616. spin_lock_irqsave(&card->lock, flags);
  1617. list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
  1618. if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
  1619. ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
  1620. qeth_get_reply(reply);
  1621. list_del_init(&reply->list);
  1622. spin_unlock_irqrestore(&card->lock, flags);
  1623. keep_reply = 0;
  1624. if (reply->callback != NULL) {
  1625. if (cmd) {
  1626. reply->offset = (__u16)((char*)cmd -
  1627. (char *)iob->data);
  1628. keep_reply = reply->callback(card,
  1629. reply,
  1630. (unsigned long)cmd);
  1631. } else
  1632. keep_reply = reply->callback(card,
  1633. reply,
  1634. (unsigned long)iob);
  1635. }
  1636. if (cmd)
  1637. reply->rc = (u16) cmd->hdr.return_code;
  1638. else if (iob->rc)
  1639. reply->rc = iob->rc;
  1640. if (keep_reply) {
  1641. spin_lock_irqsave(&card->lock, flags);
  1642. list_add_tail(&reply->list,
  1643. &card->cmd_waiter_list);
  1644. spin_unlock_irqrestore(&card->lock, flags);
  1645. } else {
  1646. atomic_inc(&reply->received);
  1647. wake_up(&reply->wait_q);
  1648. }
  1649. qeth_put_reply(reply);
  1650. goto out;
  1651. }
  1652. }
  1653. spin_unlock_irqrestore(&card->lock, flags);
  1654. out:
  1655. memcpy(&card->seqno.pdu_hdr_ack,
  1656. QETH_PDU_HEADER_SEQ_NO(iob->data),
  1657. QETH_SEQ_NO_LENGTH);
  1658. qeth_release_buffer(channel,iob);
  1659. }
  1660. static void
  1661. qeth_prepare_control_data(struct qeth_card *card, int len,
  1662. struct qeth_cmd_buffer *iob)
  1663. {
  1664. qeth_setup_ccw(&card->write,iob->data,len);
  1665. iob->callback = qeth_release_buffer;
  1666. memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
  1667. &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
  1668. card->seqno.trans_hdr++;
  1669. memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
  1670. &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
  1671. card->seqno.pdu_hdr++;
  1672. memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
  1673. &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
  1674. QETH_DBF_HEX(control, 2, iob->data, QETH_DBF_CONTROL_LEN);
  1675. }
  1676. static int
  1677. qeth_send_control_data(struct qeth_card *card, int len,
  1678. struct qeth_cmd_buffer *iob,
  1679. int (*reply_cb)
  1680. (struct qeth_card *, struct qeth_reply*, unsigned long),
  1681. void *reply_param)
  1682. {
  1683. int rc;
  1684. unsigned long flags;
  1685. struct qeth_reply *reply = NULL;
  1686. unsigned long timeout;
  1687. QETH_DBF_TEXT(trace, 2, "sendctl");
  1688. reply = qeth_alloc_reply(card);
  1689. if (!reply) {
  1690. PRINT_WARN("Could no alloc qeth_reply!\n");
  1691. return -ENOMEM;
  1692. }
  1693. reply->callback = reply_cb;
  1694. reply->param = reply_param;
  1695. if (card->state == CARD_STATE_DOWN)
  1696. reply->seqno = QETH_IDX_COMMAND_SEQNO;
  1697. else
  1698. reply->seqno = card->seqno.ipa++;
  1699. init_waitqueue_head(&reply->wait_q);
  1700. spin_lock_irqsave(&card->lock, flags);
  1701. list_add_tail(&reply->list, &card->cmd_waiter_list);
  1702. spin_unlock_irqrestore(&card->lock, flags);
  1703. QETH_DBF_HEX(control, 2, iob->data, QETH_DBF_CONTROL_LEN);
  1704. while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
  1705. qeth_prepare_control_data(card, len, iob);
  1706. if (IS_IPA(iob->data))
  1707. timeout = jiffies + QETH_IPA_TIMEOUT;
  1708. else
  1709. timeout = jiffies + QETH_TIMEOUT;
  1710. QETH_DBF_TEXT(trace, 6, "noirqpnd");
  1711. spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
  1712. rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
  1713. (addr_t) iob, 0, 0);
  1714. spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
  1715. if (rc){
  1716. PRINT_WARN("qeth_send_control_data: "
  1717. "ccw_device_start rc = %i\n", rc);
  1718. QETH_DBF_TEXT_(trace, 2, " err%d", rc);
  1719. spin_lock_irqsave(&card->lock, flags);
  1720. list_del_init(&reply->list);
  1721. qeth_put_reply(reply);
  1722. spin_unlock_irqrestore(&card->lock, flags);
  1723. qeth_release_buffer(iob->channel, iob);
  1724. atomic_set(&card->write.irq_pending, 0);
  1725. wake_up(&card->wait_q);
  1726. return rc;
  1727. }
  1728. while (!atomic_read(&reply->received)) {
  1729. if (time_after(jiffies, timeout)) {
  1730. spin_lock_irqsave(&reply->card->lock, flags);
  1731. list_del_init(&reply->list);
  1732. spin_unlock_irqrestore(&reply->card->lock, flags);
  1733. reply->rc = -ETIME;
  1734. atomic_inc(&reply->received);
  1735. wake_up(&reply->wait_q);
  1736. }
  1737. cpu_relax();
  1738. };
  1739. rc = reply->rc;
  1740. qeth_put_reply(reply);
  1741. return rc;
  1742. }
  1743. static int
  1744. qeth_osn_send_control_data(struct qeth_card *card, int len,
  1745. struct qeth_cmd_buffer *iob)
  1746. {
  1747. unsigned long flags;
  1748. int rc = 0;
  1749. QETH_DBF_TEXT(trace, 5, "osndctrd");
  1750. wait_event(card->wait_q,
  1751. atomic_cmpxchg(&card->write.irq_pending, 0, 1) == 0);
  1752. qeth_prepare_control_data(card, len, iob);
  1753. QETH_DBF_TEXT(trace, 6, "osnoirqp");
  1754. spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
  1755. rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
  1756. (addr_t) iob, 0, 0);
  1757. spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
  1758. if (rc){
  1759. PRINT_WARN("qeth_osn_send_control_data: "
  1760. "ccw_device_start rc = %i\n", rc);
  1761. QETH_DBF_TEXT_(trace, 2, " err%d", rc);
  1762. qeth_release_buffer(iob->channel, iob);
  1763. atomic_set(&card->write.irq_pending, 0);
  1764. wake_up(&card->wait_q);
  1765. }
  1766. return rc;
  1767. }
  1768. static inline void
  1769. qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  1770. char prot_type)
  1771. {
  1772. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  1773. memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data),&prot_type,1);
  1774. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  1775. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  1776. }
  1777. static int
  1778. qeth_osn_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  1779. int data_len)
  1780. {
  1781. u16 s1, s2;
  1782. QETH_DBF_TEXT(trace,4,"osndipa");
  1783. qeth_prepare_ipa_cmd(card, iob, QETH_PROT_OSN2);
  1784. s1 = (u16)(IPA_PDU_HEADER_SIZE + data_len);
  1785. s2 = (u16)data_len;
  1786. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  1787. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  1788. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  1789. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  1790. return qeth_osn_send_control_data(card, s1, iob);
  1791. }
  1792. static int
  1793. qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  1794. int (*reply_cb)
  1795. (struct qeth_card *,struct qeth_reply*, unsigned long),
  1796. void *reply_param)
  1797. {
  1798. int rc;
  1799. char prot_type;
  1800. QETH_DBF_TEXT(trace,4,"sendipa");
  1801. if (card->options.layer2)
  1802. if (card->info.type == QETH_CARD_TYPE_OSN)
  1803. prot_type = QETH_PROT_OSN2;
  1804. else
  1805. prot_type = QETH_PROT_LAYER2;
  1806. else
  1807. prot_type = QETH_PROT_TCPIP;
  1808. qeth_prepare_ipa_cmd(card,iob,prot_type);
  1809. rc = qeth_send_control_data(card, IPA_CMD_LENGTH, iob,
  1810. reply_cb, reply_param);
  1811. return rc;
  1812. }
  1813. static int
  1814. qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1815. unsigned long data)
  1816. {
  1817. struct qeth_cmd_buffer *iob;
  1818. QETH_DBF_TEXT(setup, 2, "cmenblcb");
  1819. iob = (struct qeth_cmd_buffer *) data;
  1820. memcpy(&card->token.cm_filter_r,
  1821. QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1822. QETH_MPC_TOKEN_LENGTH);
  1823. QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
  1824. return 0;
  1825. }
  1826. static int
  1827. qeth_cm_enable(struct qeth_card *card)
  1828. {
  1829. int rc;
  1830. struct qeth_cmd_buffer *iob;
  1831. QETH_DBF_TEXT(setup,2,"cmenable");
  1832. iob = qeth_wait_for_buffer(&card->write);
  1833. memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
  1834. memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
  1835. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1836. memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
  1837. &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
  1838. rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
  1839. qeth_cm_enable_cb, NULL);
  1840. return rc;
  1841. }
  1842. static int
  1843. qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1844. unsigned long data)
  1845. {
  1846. struct qeth_cmd_buffer *iob;
  1847. QETH_DBF_TEXT(setup, 2, "cmsetpcb");
  1848. iob = (struct qeth_cmd_buffer *) data;
  1849. memcpy(&card->token.cm_connection_r,
  1850. QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
  1851. QETH_MPC_TOKEN_LENGTH);
  1852. QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
  1853. return 0;
  1854. }
  1855. static int
  1856. qeth_cm_setup(struct qeth_card *card)
  1857. {
  1858. int rc;
  1859. struct qeth_cmd_buffer *iob;
  1860. QETH_DBF_TEXT(setup,2,"cmsetup");
  1861. iob = qeth_wait_for_buffer(&card->write);
  1862. memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
  1863. memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
  1864. &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
  1865. memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
  1866. &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
  1867. memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
  1868. &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
  1869. rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
  1870. qeth_cm_setup_cb, NULL);
  1871. return rc;
  1872. }
  1873. static int
  1874. qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
  1875. unsigned long data)
  1876. {
  1877. __u16 mtu, framesize;
  1878. __u16 len;
  1879. __u8 link_type;
  1880. struct qeth_cmd_buffer *iob;
  1881. QETH_DBF_TEXT(setup, 2, "ulpenacb");
  1882. iob = (struct qeth_cmd_buffer *) data;
  1883. memcpy(&card->token.ulp_filter_r,
  1884. QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
  1885. QETH_MPC_TOKEN_LENGTH);
  1886. if (qeth_get_mtu_out_of_mpc(card->info.type)) {
  1887. memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
  1888. mtu = qeth_get_mtu_outof_framesize(framesize);
  1889. if (!mtu) {
  1890. iob->rc = -EINVAL;
  1891. QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
  1892. return 0;
  1893. }
  1894. card->info.max_mtu = mtu;
  1895. card->info.initial_mtu = mtu;
  1896. card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
  1897. } else {
  1898. card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
  1899. card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
  1900. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  1901. }
  1902. memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
  1903. if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
  1904. memcpy(&link_type,
  1905. QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
  1906. card->info.link_type = link_type;
  1907. } else
  1908. card->info.link_type = 0;
  1909. QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
  1910. return 0;
  1911. }
  1912. static int
  1913. qeth_ulp_enable(struct qeth_card *card)
  1914. {
  1915. int rc;
  1916. char prot_type;
  1917. struct qeth_cmd_buffer *iob;
  1918. /*FIXME: trace view callbacks*/
  1919. QETH_DBF_TEXT(setup,2,"ulpenabl");
  1920. iob = qeth_wait_for_buffer(&card->write);
  1921. memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
  1922. *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
  1923. (__u8) card->info.portno;
  1924. if (card->options.layer2)
  1925. if (card->info.type == QETH_CARD_TYPE_OSN)
  1926. prot_type = QETH_PROT_OSN2;
  1927. else
  1928. prot_type = QETH_PROT_LAYER2;
  1929. else
  1930. prot_type = QETH_PROT_TCPIP;
  1931. memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data),&prot_type,1);
  1932. memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
  1933. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  1934. memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
  1935. &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
  1936. memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
  1937. card->info.portname, 9);
  1938. rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
  1939. qeth_ulp_enable_cb, NULL);
  1940. return rc;
  1941. }
  1942. static int
  1943. qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
  1944. unsigned long data)
  1945. {
  1946. struct qeth_cmd_buffer *iob;
  1947. QETH_DBF_TEXT(setup, 2, "ulpstpcb");
  1948. iob = (struct qeth_cmd_buffer *) data;
  1949. memcpy(&card->token.ulp_connection_r,
  1950. QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
  1951. QETH_MPC_TOKEN_LENGTH);
  1952. QETH_DBF_TEXT_(setup, 2, " rc%d", iob->rc);
  1953. return 0;
  1954. }
  1955. static int
  1956. qeth_ulp_setup(struct qeth_card *card)
  1957. {
  1958. int rc;
  1959. __u16 temp;
  1960. struct qeth_cmd_buffer *iob;
  1961. struct ccw_dev_id dev_id;
  1962. QETH_DBF_TEXT(setup,2,"ulpsetup");
  1963. iob = qeth_wait_for_buffer(&card->write);
  1964. memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
  1965. memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
  1966. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  1967. memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
  1968. &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
  1969. memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
  1970. &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
  1971. ccw_device_get_id(CARD_DDEV(card), &dev_id);
  1972. memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
  1973. temp = (card->info.cula << 8) + card->info.unit_addr2;
  1974. memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
  1975. rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
  1976. qeth_ulp_setup_cb, NULL);
  1977. return rc;
  1978. }
  1979. static inline int
  1980. qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
  1981. unsigned int siga_error, const char *dbftext)
  1982. {
  1983. if (qdio_error || siga_error) {
  1984. QETH_DBF_TEXT(trace, 2, dbftext);
  1985. QETH_DBF_TEXT(qerr, 2, dbftext);
  1986. QETH_DBF_TEXT_(qerr, 2, " F15=%02X",
  1987. buf->element[15].flags & 0xff);
  1988. QETH_DBF_TEXT_(qerr, 2, " F14=%02X",
  1989. buf->element[14].flags & 0xff);
  1990. QETH_DBF_TEXT_(qerr, 2, " qerr=%X", qdio_error);
  1991. QETH_DBF_TEXT_(qerr, 2, " serr=%X", siga_error);
  1992. return 1;
  1993. }
  1994. return 0;
  1995. }
  1996. static struct sk_buff *
  1997. qeth_get_skb(unsigned int length, struct qeth_hdr *hdr)
  1998. {
  1999. struct sk_buff* skb;
  2000. int add_len;
  2001. add_len = 0;
  2002. if (hdr->hdr.osn.id == QETH_HEADER_TYPE_OSN)
  2003. add_len = sizeof(struct qeth_hdr);
  2004. #ifdef CONFIG_QETH_VLAN
  2005. else
  2006. add_len = VLAN_HLEN;
  2007. #endif
  2008. skb = dev_alloc_skb(length + add_len);
  2009. if (skb && add_len)
  2010. skb_reserve(skb, add_len);
  2011. return skb;
  2012. }
  2013. static inline int
  2014. qeth_create_skb_frag(struct qdio_buffer_element *element,
  2015. struct sk_buff **pskb,
  2016. int offset, int *pfrag, int data_len)
  2017. {
  2018. struct page *page = virt_to_page(element->addr);
  2019. if (*pfrag == 0) {
  2020. /* the upper protocol layers assume that there is data in the
  2021. * skb itself. Copy a small amount (64 bytes) to make them
  2022. * happy. */
  2023. *pskb = dev_alloc_skb(64 + QETH_FAKE_LL_LEN_ETH);
  2024. if (!(*pskb))
  2025. return -ENOMEM;
  2026. skb_reserve(*pskb, QETH_FAKE_LL_LEN_ETH);
  2027. if (data_len <= 64) {
  2028. memcpy(skb_put(*pskb, data_len), element->addr + offset,
  2029. data_len);
  2030. } else {
  2031. get_page(page);
  2032. memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
  2033. skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
  2034. data_len - 64);
  2035. (*pskb)->data_len += data_len - 64;
  2036. (*pskb)->len += data_len - 64;
  2037. (*pskb)->truesize += data_len - 64;
  2038. }
  2039. } else {
  2040. get_page(page);
  2041. skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
  2042. (*pskb)->data_len += data_len;
  2043. (*pskb)->len += data_len;
  2044. (*pskb)->truesize += data_len;
  2045. }
  2046. (*pfrag)++;
  2047. return 0;
  2048. }
  2049. static inline struct qeth_buffer_pool_entry *
  2050. qeth_find_free_buffer_pool_entry(struct qeth_card *card)
  2051. {
  2052. struct list_head *plh;
  2053. struct qeth_buffer_pool_entry *entry;
  2054. int i, free;
  2055. struct page *page;
  2056. if (list_empty(&card->qdio.in_buf_pool.entry_list))
  2057. return NULL;
  2058. list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
  2059. entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
  2060. free = 1;
  2061. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2062. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2063. free = 0;
  2064. break;
  2065. }
  2066. }
  2067. if (free) {
  2068. list_del_init(&entry->list);
  2069. return entry;
  2070. }
  2071. }
  2072. /* no free buffer in pool so take first one and swap pages */
  2073. entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
  2074. struct qeth_buffer_pool_entry, list);
  2075. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
  2076. if (page_count(virt_to_page(entry->elements[i])) > 1) {
  2077. page = alloc_page(GFP_ATOMIC|GFP_DMA);
  2078. if (!page) {
  2079. return NULL;
  2080. } else {
  2081. free_page((unsigned long)entry->elements[i]);
  2082. entry->elements[i] = page_address(page);
  2083. if (card->options.performance_stats)
  2084. card->perf_stats.sg_alloc_page_rx++;
  2085. }
  2086. }
  2087. }
  2088. list_del_init(&entry->list);
  2089. return entry;
  2090. }
  2091. static struct sk_buff *
  2092. qeth_get_next_skb(struct qeth_card *card, struct qdio_buffer *buffer,
  2093. struct qdio_buffer_element **__element, int *__offset,
  2094. struct qeth_hdr **hdr)
  2095. {
  2096. struct qdio_buffer_element *element = *__element;
  2097. int offset = *__offset;
  2098. struct sk_buff *skb = NULL;
  2099. int skb_len;
  2100. void *data_ptr;
  2101. int data_len;
  2102. int use_rx_sg = 0;
  2103. int frag = 0;
  2104. QETH_DBF_TEXT(trace,6,"nextskb");
  2105. /* qeth_hdr must not cross element boundaries */
  2106. if (element->length < offset + sizeof(struct qeth_hdr)){
  2107. if (qeth_is_last_sbale(element))
  2108. return NULL;
  2109. element++;
  2110. offset = 0;
  2111. if (element->length < sizeof(struct qeth_hdr))
  2112. return NULL;
  2113. }
  2114. *hdr = element->addr + offset;
  2115. offset += sizeof(struct qeth_hdr);
  2116. if (card->options.layer2)
  2117. if (card->info.type == QETH_CARD_TYPE_OSN)
  2118. skb_len = (*hdr)->hdr.osn.pdu_length;
  2119. else
  2120. skb_len = (*hdr)->hdr.l2.pkt_length;
  2121. else
  2122. skb_len = (*hdr)->hdr.l3.length;
  2123. if (!skb_len)
  2124. return NULL;
  2125. if ((skb_len >= card->options.rx_sg_cb) &&
  2126. (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
  2127. (!atomic_read(&card->force_alloc_skb))) {
  2128. use_rx_sg = 1;
  2129. } else {
  2130. if (card->options.fake_ll) {
  2131. if (card->dev->type == ARPHRD_IEEE802_TR) {
  2132. if (!(skb = qeth_get_skb(skb_len +
  2133. QETH_FAKE_LL_LEN_TR, *hdr)))
  2134. goto no_mem;
  2135. skb_reserve(skb, QETH_FAKE_LL_LEN_TR);
  2136. } else {
  2137. if (!(skb = qeth_get_skb(skb_len +
  2138. QETH_FAKE_LL_LEN_ETH, *hdr)))
  2139. goto no_mem;
  2140. skb_reserve(skb, QETH_FAKE_LL_LEN_ETH);
  2141. }
  2142. } else {
  2143. skb = qeth_get_skb(skb_len, *hdr);
  2144. if (!skb)
  2145. goto no_mem;
  2146. }
  2147. }
  2148. data_ptr = element->addr + offset;
  2149. while (skb_len) {
  2150. data_len = min(skb_len, (int)(element->length - offset));
  2151. if (data_len) {
  2152. if (use_rx_sg) {
  2153. if (qeth_create_skb_frag(element, &skb, offset,
  2154. &frag, data_len))
  2155. goto no_mem;
  2156. } else {
  2157. memcpy(skb_put(skb, data_len), data_ptr,
  2158. data_len);
  2159. }
  2160. }
  2161. skb_len -= data_len;
  2162. if (skb_len){
  2163. if (qeth_is_last_sbale(element)){
  2164. QETH_DBF_TEXT(trace,4,"unexeob");
  2165. QETH_DBF_TEXT_(trace,4,"%s",CARD_BUS_ID(card));
  2166. QETH_DBF_TEXT(qerr,2,"unexeob");
  2167. QETH_DBF_TEXT_(qerr,2,"%s",CARD_BUS_ID(card));
  2168. QETH_DBF_HEX(misc,4,buffer,sizeof(*buffer));
  2169. dev_kfree_skb_any(skb);
  2170. card->stats.rx_errors++;
  2171. return NULL;
  2172. }
  2173. element++;
  2174. offset = 0;
  2175. data_ptr = element->addr;
  2176. } else {
  2177. offset += data_len;
  2178. }
  2179. }
  2180. *__element = element;
  2181. *__offset = offset;
  2182. if (use_rx_sg && card->options.performance_stats) {
  2183. card->perf_stats.sg_skbs_rx++;
  2184. card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
  2185. }
  2186. return skb;
  2187. no_mem:
  2188. if (net_ratelimit()){
  2189. PRINT_WARN("No memory for packet received on %s.\n",
  2190. QETH_CARD_IFNAME(card));
  2191. QETH_DBF_TEXT(trace,2,"noskbmem");
  2192. QETH_DBF_TEXT_(trace,2,"%s",CARD_BUS_ID(card));
  2193. }
  2194. card->stats.rx_dropped++;
  2195. return NULL;
  2196. }
  2197. static __be16
  2198. qeth_type_trans(struct sk_buff *skb, struct net_device *dev)
  2199. {
  2200. struct qeth_card *card;
  2201. struct ethhdr *eth;
  2202. QETH_DBF_TEXT(trace,6,"typtrans");
  2203. card = (struct qeth_card *)dev->priv;
  2204. #ifdef CONFIG_TR
  2205. if ((card->info.link_type == QETH_LINK_TYPE_HSTR) ||
  2206. (card->info.link_type == QETH_LINK_TYPE_LANE_TR))
  2207. return tr_type_trans(skb,dev);
  2208. #endif /* CONFIG_TR */
  2209. skb_reset_mac_header(skb);
  2210. skb_pull(skb, ETH_HLEN );
  2211. eth = eth_hdr(skb);
  2212. if (*eth->h_dest & 1) {
  2213. if (memcmp(eth->h_dest, dev->broadcast, ETH_ALEN) == 0)
  2214. skb->pkt_type = PACKET_BROADCAST;
  2215. else
  2216. skb->pkt_type = PACKET_MULTICAST;
  2217. } else if (memcmp(eth->h_dest, dev->dev_addr, ETH_ALEN))
  2218. skb->pkt_type = PACKET_OTHERHOST;
  2219. if (ntohs(eth->h_proto) >= 1536)
  2220. return eth->h_proto;
  2221. if (*(unsigned short *) (skb->data) == 0xFFFF)
  2222. return htons(ETH_P_802_3);
  2223. return htons(ETH_P_802_2);
  2224. }
  2225. static void
  2226. qeth_rebuild_skb_fake_ll_tr(struct qeth_card *card, struct sk_buff *skb,
  2227. struct qeth_hdr *hdr)
  2228. {
  2229. struct trh_hdr *fake_hdr;
  2230. struct trllc *fake_llc;
  2231. struct iphdr *ip_hdr;
  2232. QETH_DBF_TEXT(trace,5,"skbfktr");
  2233. skb_set_mac_header(skb, -QETH_FAKE_LL_LEN_TR);
  2234. /* this is a fake ethernet header */
  2235. fake_hdr = tr_hdr(skb);
  2236. /* the destination MAC address */
  2237. switch (skb->pkt_type){
  2238. case PACKET_MULTICAST:
  2239. switch (skb->protocol){
  2240. #ifdef CONFIG_QETH_IPV6
  2241. case __constant_htons(ETH_P_IPV6):
  2242. ndisc_mc_map((struct in6_addr *)
  2243. skb->data + QETH_FAKE_LL_V6_ADDR_POS,
  2244. fake_hdr->daddr, card->dev, 0);
  2245. break;
  2246. #endif /* CONFIG_QETH_IPV6 */
  2247. case __constant_htons(ETH_P_IP):
  2248. ip_hdr = (struct iphdr *)skb->data;
  2249. ip_tr_mc_map(ip_hdr->daddr, fake_hdr->daddr);
  2250. break;
  2251. default:
  2252. memcpy(fake_hdr->daddr, card->dev->dev_addr, TR_ALEN);
  2253. }
  2254. break;
  2255. case PACKET_BROADCAST:
  2256. memset(fake_hdr->daddr, 0xff, TR_ALEN);
  2257. break;
  2258. default:
  2259. memcpy(fake_hdr->daddr, card->dev->dev_addr, TR_ALEN);
  2260. }
  2261. /* the source MAC address */
  2262. if (hdr->hdr.l3.ext_flags & QETH_HDR_EXT_SRC_MAC_ADDR)
  2263. memcpy(fake_hdr->saddr, &hdr->hdr.l3.dest_addr[2], TR_ALEN);
  2264. else
  2265. memset(fake_hdr->saddr, 0, TR_ALEN);
  2266. fake_hdr->rcf=0;
  2267. fake_llc = (struct trllc*)&(fake_hdr->rcf);
  2268. fake_llc->dsap = EXTENDED_SAP;
  2269. fake_llc->ssap = EXTENDED_SAP;
  2270. fake_llc->llc = UI_CMD;
  2271. fake_llc->protid[0] = 0;
  2272. fake_llc->protid[1] = 0;
  2273. fake_llc->protid[2] = 0;
  2274. fake_llc->ethertype = ETH_P_IP;
  2275. }
  2276. static void
  2277. qeth_rebuild_skb_fake_ll_eth(struct qeth_card *card, struct sk_buff *skb,
  2278. struct qeth_hdr *hdr)
  2279. {
  2280. struct ethhdr *fake_hdr;
  2281. struct iphdr *ip_hdr;
  2282. QETH_DBF_TEXT(trace,5,"skbfketh");
  2283. skb_set_mac_header(skb, -QETH_FAKE_LL_LEN_ETH);
  2284. /* this is a fake ethernet header */
  2285. fake_hdr = eth_hdr(skb);
  2286. /* the destination MAC address */
  2287. switch (skb->pkt_type){
  2288. case PACKET_MULTICAST:
  2289. switch (skb->protocol){
  2290. #ifdef CONFIG_QETH_IPV6
  2291. case __constant_htons(ETH_P_IPV6):
  2292. ndisc_mc_map((struct in6_addr *)
  2293. skb->data + QETH_FAKE_LL_V6_ADDR_POS,
  2294. fake_hdr->h_dest, card->dev, 0);
  2295. break;
  2296. #endif /* CONFIG_QETH_IPV6 */
  2297. case __constant_htons(ETH_P_IP):
  2298. ip_hdr = (struct iphdr *)skb->data;
  2299. ip_eth_mc_map(ip_hdr->daddr, fake_hdr->h_dest);
  2300. break;
  2301. default:
  2302. memcpy(fake_hdr->h_dest, card->dev->dev_addr, ETH_ALEN);
  2303. }
  2304. break;
  2305. case PACKET_BROADCAST:
  2306. memset(fake_hdr->h_dest, 0xff, ETH_ALEN);
  2307. break;
  2308. default:
  2309. memcpy(fake_hdr->h_dest, card->dev->dev_addr, ETH_ALEN);
  2310. }
  2311. /* the source MAC address */
  2312. if (hdr->hdr.l3.ext_flags & QETH_HDR_EXT_SRC_MAC_ADDR)
  2313. memcpy(fake_hdr->h_source, &hdr->hdr.l3.dest_addr[2], ETH_ALEN);
  2314. else
  2315. memset(fake_hdr->h_source, 0, ETH_ALEN);
  2316. /* the protocol */
  2317. fake_hdr->h_proto = skb->protocol;
  2318. }
  2319. static inline void
  2320. qeth_rebuild_skb_fake_ll(struct qeth_card *card, struct sk_buff *skb,
  2321. struct qeth_hdr *hdr)
  2322. {
  2323. if (card->dev->type == ARPHRD_IEEE802_TR)
  2324. qeth_rebuild_skb_fake_ll_tr(card, skb, hdr);
  2325. else
  2326. qeth_rebuild_skb_fake_ll_eth(card, skb, hdr);
  2327. }
  2328. static inline void
  2329. qeth_layer2_rebuild_skb(struct qeth_card *card, struct sk_buff *skb,
  2330. struct qeth_hdr *hdr)
  2331. {
  2332. skb->pkt_type = PACKET_HOST;
  2333. skb->protocol = qeth_type_trans(skb, skb->dev);
  2334. if (card->options.checksum_type == NO_CHECKSUMMING)
  2335. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2336. else
  2337. skb->ip_summed = CHECKSUM_NONE;
  2338. *((__u32 *)skb->cb) = ++card->seqno.pkt_seqno;
  2339. }
  2340. static __u16
  2341. qeth_rebuild_skb(struct qeth_card *card, struct sk_buff *skb,
  2342. struct qeth_hdr *hdr)
  2343. {
  2344. unsigned short vlan_id = 0;
  2345. #ifdef CONFIG_QETH_IPV6
  2346. if (hdr->hdr.l3.flags & QETH_HDR_PASSTHRU) {
  2347. skb->pkt_type = PACKET_HOST;
  2348. skb->protocol = qeth_type_trans(skb, card->dev);
  2349. return 0;
  2350. }
  2351. #endif /* CONFIG_QETH_IPV6 */
  2352. skb->protocol = htons((hdr->hdr.l3.flags & QETH_HDR_IPV6)? ETH_P_IPV6 :
  2353. ETH_P_IP);
  2354. switch (hdr->hdr.l3.flags & QETH_HDR_CAST_MASK){
  2355. case QETH_CAST_UNICAST:
  2356. skb->pkt_type = PACKET_HOST;
  2357. break;
  2358. case QETH_CAST_MULTICAST:
  2359. skb->pkt_type = PACKET_MULTICAST;
  2360. card->stats.multicast++;
  2361. break;
  2362. case QETH_CAST_BROADCAST:
  2363. skb->pkt_type = PACKET_BROADCAST;
  2364. card->stats.multicast++;
  2365. break;
  2366. case QETH_CAST_ANYCAST:
  2367. case QETH_CAST_NOCAST:
  2368. default:
  2369. skb->pkt_type = PACKET_HOST;
  2370. }
  2371. if (hdr->hdr.l3.ext_flags &
  2372. (QETH_HDR_EXT_VLAN_FRAME | QETH_HDR_EXT_INCLUDE_VLAN_TAG)) {
  2373. vlan_id = (hdr->hdr.l3.ext_flags & QETH_HDR_EXT_VLAN_FRAME)?
  2374. hdr->hdr.l3.vlan_id : *((u16 *)&hdr->hdr.l3.dest_addr[12]);
  2375. }
  2376. if (card->options.fake_ll)
  2377. qeth_rebuild_skb_fake_ll(card, skb, hdr);
  2378. else
  2379. skb_reset_mac_header(skb);
  2380. skb->ip_summed = card->options.checksum_type;
  2381. if (card->options.checksum_type == HW_CHECKSUMMING){
  2382. if ( (hdr->hdr.l3.ext_flags &
  2383. (QETH_HDR_EXT_CSUM_HDR_REQ |
  2384. QETH_HDR_EXT_CSUM_TRANSP_REQ)) ==
  2385. (QETH_HDR_EXT_CSUM_HDR_REQ |
  2386. QETH_HDR_EXT_CSUM_TRANSP_REQ) )
  2387. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2388. else
  2389. skb->ip_summed = SW_CHECKSUMMING;
  2390. }
  2391. return vlan_id;
  2392. }
  2393. static void
  2394. qeth_process_inbound_buffer(struct qeth_card *card,
  2395. struct qeth_qdio_buffer *buf, int index)
  2396. {
  2397. struct qdio_buffer_element *element;
  2398. struct sk_buff *skb;
  2399. struct qeth_hdr *hdr;
  2400. int offset;
  2401. int rxrc;
  2402. __u16 vlan_tag = 0;
  2403. /* get first element of current buffer */
  2404. element = (struct qdio_buffer_element *)&buf->buffer->element[0];
  2405. offset = 0;
  2406. if (card->options.performance_stats)
  2407. card->perf_stats.bufs_rec++;
  2408. while((skb = qeth_get_next_skb(card, buf->buffer, &element,
  2409. &offset, &hdr))) {
  2410. skb->dev = card->dev;
  2411. if (hdr->hdr.l2.id == QETH_HEADER_TYPE_LAYER2)
  2412. qeth_layer2_rebuild_skb(card, skb, hdr);
  2413. else if (hdr->hdr.l3.id == QETH_HEADER_TYPE_LAYER3)
  2414. vlan_tag = qeth_rebuild_skb(card, skb, hdr);
  2415. else { /*in case of OSN*/
  2416. skb_push(skb, sizeof(struct qeth_hdr));
  2417. skb_copy_to_linear_data(skb, hdr,
  2418. sizeof(struct qeth_hdr));
  2419. }
  2420. /* is device UP ? */
  2421. if (!(card->dev->flags & IFF_UP)){
  2422. dev_kfree_skb_any(skb);
  2423. continue;
  2424. }
  2425. if (card->info.type == QETH_CARD_TYPE_OSN)
  2426. rxrc = card->osn_info.data_cb(skb);
  2427. else
  2428. #ifdef CONFIG_QETH_VLAN
  2429. if (vlan_tag)
  2430. if (card->vlangrp)
  2431. vlan_hwaccel_rx(skb, card->vlangrp, vlan_tag);
  2432. else {
  2433. dev_kfree_skb_any(skb);
  2434. continue;
  2435. }
  2436. else
  2437. #endif
  2438. rxrc = netif_rx(skb);
  2439. card->dev->last_rx = jiffies;
  2440. card->stats.rx_packets++;
  2441. card->stats.rx_bytes += skb->len;
  2442. }
  2443. }
  2444. static int
  2445. qeth_init_input_buffer(struct qeth_card *card, struct qeth_qdio_buffer *buf)
  2446. {
  2447. struct qeth_buffer_pool_entry *pool_entry;
  2448. int i;
  2449. pool_entry = qeth_find_free_buffer_pool_entry(card);
  2450. if (!pool_entry)
  2451. return 1;
  2452. /*
  2453. * since the buffer is accessed only from the input_tasklet
  2454. * there shouldn't be a need to synchronize; also, since we use
  2455. * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
  2456. * buffers
  2457. */
  2458. BUG_ON(!pool_entry);
  2459. buf->pool_entry = pool_entry;
  2460. for(i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i){
  2461. buf->buffer->element[i].length = PAGE_SIZE;
  2462. buf->buffer->element[i].addr = pool_entry->elements[i];
  2463. if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
  2464. buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
  2465. else
  2466. buf->buffer->element[i].flags = 0;
  2467. }
  2468. buf->state = QETH_QDIO_BUF_EMPTY;
  2469. return 0;
  2470. }
  2471. static void
  2472. qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
  2473. struct qeth_qdio_out_buffer *buf)
  2474. {
  2475. int i;
  2476. struct sk_buff *skb;
  2477. /* is PCI flag set on buffer? */
  2478. if (buf->buffer->element[0].flags & 0x40)
  2479. atomic_dec(&queue->set_pci_flags_count);
  2480. while ((skb = skb_dequeue(&buf->skb_list))){
  2481. atomic_dec(&skb->users);
  2482. dev_kfree_skb_any(skb);
  2483. }
  2484. qeth_eddp_buf_release_contexts(buf);
  2485. for(i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i){
  2486. buf->buffer->element[i].length = 0;
  2487. buf->buffer->element[i].addr = NULL;
  2488. buf->buffer->element[i].flags = 0;
  2489. }
  2490. buf->next_element_to_fill = 0;
  2491. atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
  2492. }
  2493. static void
  2494. qeth_queue_input_buffer(struct qeth_card *card, int index)
  2495. {
  2496. struct qeth_qdio_q *queue = card->qdio.in_q;
  2497. int count;
  2498. int i;
  2499. int rc;
  2500. int newcount = 0;
  2501. QETH_DBF_TEXT(trace,6,"queinbuf");
  2502. count = (index < queue->next_buf_to_init)?
  2503. card->qdio.in_buf_pool.buf_count -
  2504. (queue->next_buf_to_init - index) :
  2505. card->qdio.in_buf_pool.buf_count -
  2506. (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
  2507. /* only requeue at a certain threshold to avoid SIGAs */
  2508. if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)){
  2509. for (i = queue->next_buf_to_init;
  2510. i < queue->next_buf_to_init + count; ++i) {
  2511. if (qeth_init_input_buffer(card,
  2512. &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
  2513. break;
  2514. } else {
  2515. newcount++;
  2516. }
  2517. }
  2518. if (newcount < count) {
  2519. /* we are in memory shortage so we switch back to
  2520. traditional skb allocation and drop packages */
  2521. if (atomic_cmpxchg(&card->force_alloc_skb, 0, 1))
  2522. printk(KERN_WARNING
  2523. "qeth: switch to alloc skb\n");
  2524. count = newcount;
  2525. } else {
  2526. if (atomic_cmpxchg(&card->force_alloc_skb, 1, 0))
  2527. printk(KERN_WARNING "qeth: switch to sg\n");
  2528. }
  2529. /*
  2530. * according to old code it should be avoided to requeue all
  2531. * 128 buffers in order to benefit from PCI avoidance.
  2532. * this function keeps at least one buffer (the buffer at
  2533. * 'index') un-requeued -> this buffer is the first buffer that
  2534. * will be requeued the next time
  2535. */
  2536. if (card->options.performance_stats) {
  2537. card->perf_stats.inbound_do_qdio_cnt++;
  2538. card->perf_stats.inbound_do_qdio_start_time =
  2539. qeth_get_micros();
  2540. }
  2541. rc = do_QDIO(CARD_DDEV(card),
  2542. QDIO_FLAG_SYNC_INPUT | QDIO_FLAG_UNDER_INTERRUPT,
  2543. 0, queue->next_buf_to_init, count, NULL);
  2544. if (card->options.performance_stats)
  2545. card->perf_stats.inbound_do_qdio_time +=
  2546. qeth_get_micros() -
  2547. card->perf_stats.inbound_do_qdio_start_time;
  2548. if (rc){
  2549. PRINT_WARN("qeth_queue_input_buffer's do_QDIO "
  2550. "return %i (device %s).\n",
  2551. rc, CARD_DDEV_ID(card));
  2552. QETH_DBF_TEXT(trace,2,"qinberr");
  2553. QETH_DBF_TEXT_(trace,2,"%s",CARD_BUS_ID(card));
  2554. }
  2555. queue->next_buf_to_init = (queue->next_buf_to_init + count) %
  2556. QDIO_MAX_BUFFERS_PER_Q;
  2557. }
  2558. }
  2559. static inline void
  2560. qeth_put_buffer_pool_entry(struct qeth_card *card,
  2561. struct qeth_buffer_pool_entry *entry)
  2562. {
  2563. QETH_DBF_TEXT(trace, 6, "ptbfplen");
  2564. list_add_tail(&entry->list, &card->qdio.in_buf_pool.entry_list);
  2565. }
  2566. static void
  2567. qeth_qdio_input_handler(struct ccw_device * ccwdev, unsigned int status,
  2568. unsigned int qdio_err, unsigned int siga_err,
  2569. unsigned int queue, int first_element, int count,
  2570. unsigned long card_ptr)
  2571. {
  2572. struct net_device *net_dev;
  2573. struct qeth_card *card;
  2574. struct qeth_qdio_buffer *buffer;
  2575. int index;
  2576. int i;
  2577. QETH_DBF_TEXT(trace, 6, "qdinput");
  2578. card = (struct qeth_card *) card_ptr;
  2579. net_dev = card->dev;
  2580. if (card->options.performance_stats) {
  2581. card->perf_stats.inbound_cnt++;
  2582. card->perf_stats.inbound_start_time = qeth_get_micros();
  2583. }
  2584. if (status & QDIO_STATUS_LOOK_FOR_ERROR) {
  2585. if (status & QDIO_STATUS_ACTIVATE_CHECK_CONDITION){
  2586. QETH_DBF_TEXT(trace, 1,"qdinchk");
  2587. QETH_DBF_TEXT_(trace,1,"%s",CARD_BUS_ID(card));
  2588. QETH_DBF_TEXT_(trace,1,"%04X%04X",first_element,count);
  2589. QETH_DBF_TEXT_(trace,1,"%04X%04X", queue, status);
  2590. qeth_schedule_recovery(card);
  2591. return;
  2592. }
  2593. }
  2594. for (i = first_element; i < (first_element + count); ++i) {
  2595. index = i % QDIO_MAX_BUFFERS_PER_Q;
  2596. buffer = &card->qdio.in_q->bufs[index];
  2597. if (!((status & QDIO_STATUS_LOOK_FOR_ERROR) &&
  2598. qeth_check_qdio_errors(buffer->buffer,
  2599. qdio_err, siga_err,"qinerr")))
  2600. qeth_process_inbound_buffer(card, buffer, index);
  2601. /* clear buffer and give back to hardware */
  2602. qeth_put_buffer_pool_entry(card, buffer->pool_entry);
  2603. qeth_queue_input_buffer(card, index);
  2604. }
  2605. if (card->options.performance_stats)
  2606. card->perf_stats.inbound_time += qeth_get_micros() -
  2607. card->perf_stats.inbound_start_time;
  2608. }
  2609. static int
  2610. qeth_handle_send_error(struct qeth_card *card,
  2611. struct qeth_qdio_out_buffer *buffer,
  2612. unsigned int qdio_err, unsigned int siga_err)
  2613. {
  2614. int sbalf15 = buffer->buffer->element[15].flags & 0xff;
  2615. int cc = siga_err & 3;
  2616. QETH_DBF_TEXT(trace, 6, "hdsnderr");
  2617. qeth_check_qdio_errors(buffer->buffer, qdio_err, siga_err, "qouterr");
  2618. switch (cc) {
  2619. case 0:
  2620. if (qdio_err){
  2621. QETH_DBF_TEXT(trace, 1,"lnkfail");
  2622. QETH_DBF_TEXT_(trace,1,"%s",CARD_BUS_ID(card));
  2623. QETH_DBF_TEXT_(trace,1,"%04x %02x",
  2624. (u16)qdio_err, (u8)sbalf15);
  2625. return QETH_SEND_ERROR_LINK_FAILURE;
  2626. }
  2627. return QETH_SEND_ERROR_NONE;
  2628. case 2:
  2629. if (siga_err & QDIO_SIGA_ERROR_B_BIT_SET) {
  2630. QETH_DBF_TEXT(trace, 1, "SIGAcc2B");
  2631. QETH_DBF_TEXT_(trace,1,"%s",CARD_BUS_ID(card));
  2632. return QETH_SEND_ERROR_KICK_IT;
  2633. }
  2634. if ((sbalf15 >= 15) && (sbalf15 <= 31))
  2635. return QETH_SEND_ERROR_RETRY;
  2636. return QETH_SEND_ERROR_LINK_FAILURE;
  2637. /* look at qdio_error and sbalf 15 */
  2638. case 1:
  2639. QETH_DBF_TEXT(trace, 1, "SIGAcc1");
  2640. QETH_DBF_TEXT_(trace,1,"%s",CARD_BUS_ID(card));
  2641. return QETH_SEND_ERROR_LINK_FAILURE;
  2642. case 3:
  2643. default:
  2644. QETH_DBF_TEXT(trace, 1, "SIGAcc3");
  2645. QETH_DBF_TEXT_(trace,1,"%s",CARD_BUS_ID(card));
  2646. return QETH_SEND_ERROR_KICK_IT;
  2647. }
  2648. }
  2649. void
  2650. qeth_flush_buffers(struct qeth_qdio_out_q *queue, int under_int,
  2651. int index, int count)
  2652. {
  2653. struct qeth_qdio_out_buffer *buf;
  2654. int rc;
  2655. int i;
  2656. unsigned int qdio_flags;
  2657. QETH_DBF_TEXT(trace, 6, "flushbuf");
  2658. for (i = index; i < index + count; ++i) {
  2659. buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
  2660. buf->buffer->element[buf->next_element_to_fill - 1].flags |=
  2661. SBAL_FLAGS_LAST_ENTRY;
  2662. if (queue->card->info.type == QETH_CARD_TYPE_IQD)
  2663. continue;
  2664. if (!queue->do_pack){
  2665. if ((atomic_read(&queue->used_buffers) >=
  2666. (QETH_HIGH_WATERMARK_PACK -
  2667. QETH_WATERMARK_PACK_FUZZ)) &&
  2668. !atomic_read(&queue->set_pci_flags_count)){
  2669. /* it's likely that we'll go to packing
  2670. * mode soon */
  2671. atomic_inc(&queue->set_pci_flags_count);
  2672. buf->buffer->element[0].flags |= 0x40;
  2673. }
  2674. } else {
  2675. if (!atomic_read(&queue->set_pci_flags_count)){
  2676. /*
  2677. * there's no outstanding PCI any more, so we
  2678. * have to request a PCI to be sure that the PCI
  2679. * will wake at some time in the future then we
  2680. * can flush packed buffers that might still be
  2681. * hanging around, which can happen if no
  2682. * further send was requested by the stack
  2683. */
  2684. atomic_inc(&queue->set_pci_flags_count);
  2685. buf->buffer->element[0].flags |= 0x40;
  2686. }
  2687. }
  2688. }
  2689. queue->card->dev->trans_start = jiffies;
  2690. if (queue->card->options.performance_stats) {
  2691. queue->card->perf_stats.outbound_do_qdio_cnt++;
  2692. queue->card->perf_stats.outbound_do_qdio_start_time =
  2693. qeth_get_micros();
  2694. }
  2695. qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
  2696. if (under_int)
  2697. qdio_flags |= QDIO_FLAG_UNDER_INTERRUPT;
  2698. if (atomic_read(&queue->set_pci_flags_count))
  2699. qdio_flags |= QDIO_FLAG_PCI_OUT;
  2700. rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
  2701. queue->queue_no, index, count, NULL);
  2702. if (queue->card->options.performance_stats)
  2703. queue->card->perf_stats.outbound_do_qdio_time +=
  2704. qeth_get_micros() -
  2705. queue->card->perf_stats.outbound_do_qdio_start_time;
  2706. if (rc){
  2707. QETH_DBF_TEXT(trace, 2, "flushbuf");
  2708. QETH_DBF_TEXT_(trace, 2, " err%d", rc);
  2709. QETH_DBF_TEXT_(trace, 2, "%s", CARD_DDEV_ID(queue->card));
  2710. queue->card->stats.tx_errors += count;
  2711. /* this must not happen under normal circumstances. if it
  2712. * happens something is really wrong -> recover */
  2713. qeth_schedule_recovery(queue->card);
  2714. return;
  2715. }
  2716. atomic_add(count, &queue->used_buffers);
  2717. if (queue->card->options.performance_stats)
  2718. queue->card->perf_stats.bufs_sent += count;
  2719. }
  2720. /*
  2721. * Switched to packing state if the number of used buffers on a queue
  2722. * reaches a certain limit.
  2723. */
  2724. static void
  2725. qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
  2726. {
  2727. if (!queue->do_pack) {
  2728. if (atomic_read(&queue->used_buffers)
  2729. >= QETH_HIGH_WATERMARK_PACK){
  2730. /* switch non-PACKING -> PACKING */
  2731. QETH_DBF_TEXT(trace, 6, "np->pack");
  2732. if (queue->card->options.performance_stats)
  2733. queue->card->perf_stats.sc_dp_p++;
  2734. queue->do_pack = 1;
  2735. }
  2736. }
  2737. }
  2738. /*
  2739. * Switches from packing to non-packing mode. If there is a packing
  2740. * buffer on the queue this buffer will be prepared to be flushed.
  2741. * In that case 1 is returned to inform the caller. If no buffer
  2742. * has to be flushed, zero is returned.
  2743. */
  2744. static int
  2745. qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
  2746. {
  2747. struct qeth_qdio_out_buffer *buffer;
  2748. int flush_count = 0;
  2749. if (queue->do_pack) {
  2750. if (atomic_read(&queue->used_buffers)
  2751. <= QETH_LOW_WATERMARK_PACK) {
  2752. /* switch PACKING -> non-PACKING */
  2753. QETH_DBF_TEXT(trace, 6, "pack->np");
  2754. if (queue->card->options.performance_stats)
  2755. queue->card->perf_stats.sc_p_dp++;
  2756. queue->do_pack = 0;
  2757. /* flush packing buffers */
  2758. buffer = &queue->bufs[queue->next_buf_to_fill];
  2759. if ((atomic_read(&buffer->state) ==
  2760. QETH_QDIO_BUF_EMPTY) &&
  2761. (buffer->next_element_to_fill > 0)) {
  2762. atomic_set(&buffer->state,QETH_QDIO_BUF_PRIMED);
  2763. flush_count++;
  2764. queue->next_buf_to_fill =
  2765. (queue->next_buf_to_fill + 1) %
  2766. QDIO_MAX_BUFFERS_PER_Q;
  2767. }
  2768. }
  2769. }
  2770. return flush_count;
  2771. }
  2772. /*
  2773. * Called to flush a packing buffer if no more pci flags are on the queue.
  2774. * Checks if there is a packing buffer and prepares it to be flushed.
  2775. * In that case returns 1, otherwise zero.
  2776. */
  2777. static int
  2778. qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
  2779. {
  2780. struct qeth_qdio_out_buffer *buffer;
  2781. buffer = &queue->bufs[queue->next_buf_to_fill];
  2782. if((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
  2783. (buffer->next_element_to_fill > 0)){
  2784. /* it's a packing buffer */
  2785. atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
  2786. queue->next_buf_to_fill =
  2787. (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
  2788. return 1;
  2789. }
  2790. return 0;
  2791. }
  2792. static void
  2793. qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
  2794. {
  2795. int index;
  2796. int flush_cnt = 0;
  2797. int q_was_packing = 0;
  2798. /*
  2799. * check if weed have to switch to non-packing mode or if
  2800. * we have to get a pci flag out on the queue
  2801. */
  2802. if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
  2803. !atomic_read(&queue->set_pci_flags_count)){
  2804. if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
  2805. QETH_OUT_Q_UNLOCKED) {
  2806. /*
  2807. * If we get in here, there was no action in
  2808. * do_send_packet. So, we check if there is a
  2809. * packing buffer to be flushed here.
  2810. */
  2811. netif_stop_queue(queue->card->dev);
  2812. index = queue->next_buf_to_fill;
  2813. q_was_packing = queue->do_pack;
  2814. flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
  2815. if (!flush_cnt &&
  2816. !atomic_read(&queue->set_pci_flags_count))
  2817. flush_cnt +=
  2818. qeth_flush_buffers_on_no_pci(queue);
  2819. if (queue->card->options.performance_stats &&
  2820. q_was_packing)
  2821. queue->card->perf_stats.bufs_sent_pack +=
  2822. flush_cnt;
  2823. if (flush_cnt)
  2824. qeth_flush_buffers(queue, 1, index, flush_cnt);
  2825. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  2826. }
  2827. }
  2828. }
  2829. static void
  2830. qeth_qdio_output_handler(struct ccw_device * ccwdev, unsigned int status,
  2831. unsigned int qdio_error, unsigned int siga_error,
  2832. unsigned int __queue, int first_element, int count,
  2833. unsigned long card_ptr)
  2834. {
  2835. struct qeth_card *card = (struct qeth_card *) card_ptr;
  2836. struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
  2837. struct qeth_qdio_out_buffer *buffer;
  2838. int i;
  2839. QETH_DBF_TEXT(trace, 6, "qdouhdl");
  2840. if (status & QDIO_STATUS_LOOK_FOR_ERROR) {
  2841. if (status & QDIO_STATUS_ACTIVATE_CHECK_CONDITION){
  2842. QETH_DBF_TEXT(trace, 2, "achkcond");
  2843. QETH_DBF_TEXT_(trace, 2, "%s", CARD_BUS_ID(card));
  2844. QETH_DBF_TEXT_(trace, 2, "%08x", status);
  2845. netif_stop_queue(card->dev);
  2846. qeth_schedule_recovery(card);
  2847. return;
  2848. }
  2849. }
  2850. if (card->options.performance_stats) {
  2851. card->perf_stats.outbound_handler_cnt++;
  2852. card->perf_stats.outbound_handler_start_time =
  2853. qeth_get_micros();
  2854. }
  2855. for(i = first_element; i < (first_element + count); ++i){
  2856. buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
  2857. /*we only handle the KICK_IT error by doing a recovery */
  2858. if (qeth_handle_send_error(card, buffer,
  2859. qdio_error, siga_error)
  2860. == QETH_SEND_ERROR_KICK_IT){
  2861. netif_stop_queue(card->dev);
  2862. qeth_schedule_recovery(card);
  2863. return;
  2864. }
  2865. qeth_clear_output_buffer(queue, buffer);
  2866. }
  2867. atomic_sub(count, &queue->used_buffers);
  2868. /* check if we need to do something on this outbound queue */
  2869. if (card->info.type != QETH_CARD_TYPE_IQD)
  2870. qeth_check_outbound_queue(queue);
  2871. netif_wake_queue(queue->card->dev);
  2872. if (card->options.performance_stats)
  2873. card->perf_stats.outbound_handler_time += qeth_get_micros() -
  2874. card->perf_stats.outbound_handler_start_time;
  2875. }
  2876. static void
  2877. qeth_create_qib_param_field(struct qeth_card *card, char *param_field)
  2878. {
  2879. param_field[0] = _ascebc['P'];
  2880. param_field[1] = _ascebc['C'];
  2881. param_field[2] = _ascebc['I'];
  2882. param_field[3] = _ascebc['T'];
  2883. *((unsigned int *) (&param_field[4])) = QETH_PCI_THRESHOLD_A(card);
  2884. *((unsigned int *) (&param_field[8])) = QETH_PCI_THRESHOLD_B(card);
  2885. *((unsigned int *) (&param_field[12])) = QETH_PCI_TIMER_VALUE(card);
  2886. }
  2887. static void
  2888. qeth_create_qib_param_field_blkt(struct qeth_card *card, char *param_field)
  2889. {
  2890. param_field[16] = _ascebc['B'];
  2891. param_field[17] = _ascebc['L'];
  2892. param_field[18] = _ascebc['K'];
  2893. param_field[19] = _ascebc['T'];
  2894. *((unsigned int *) (&param_field[20])) = card->info.blkt.time_total;
  2895. *((unsigned int *) (&param_field[24])) = card->info.blkt.inter_packet;
  2896. *((unsigned int *) (&param_field[28])) = card->info.blkt.inter_packet_jumbo;
  2897. }
  2898. static void
  2899. qeth_initialize_working_pool_list(struct qeth_card *card)
  2900. {
  2901. struct qeth_buffer_pool_entry *entry;
  2902. QETH_DBF_TEXT(trace,5,"inwrklst");
  2903. list_for_each_entry(entry,
  2904. &card->qdio.init_pool.entry_list, init_list) {
  2905. qeth_put_buffer_pool_entry(card,entry);
  2906. }
  2907. }
  2908. static void
  2909. qeth_clear_working_pool_list(struct qeth_card *card)
  2910. {
  2911. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  2912. QETH_DBF_TEXT(trace,5,"clwrklst");
  2913. list_for_each_entry_safe(pool_entry, tmp,
  2914. &card->qdio.in_buf_pool.entry_list, list){
  2915. list_del(&pool_entry->list);
  2916. }
  2917. }
  2918. static void
  2919. qeth_free_buffer_pool(struct qeth_card *card)
  2920. {
  2921. struct qeth_buffer_pool_entry *pool_entry, *tmp;
  2922. int i=0;
  2923. QETH_DBF_TEXT(trace,5,"freepool");
  2924. list_for_each_entry_safe(pool_entry, tmp,
  2925. &card->qdio.init_pool.entry_list, init_list){
  2926. for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
  2927. free_page((unsigned long)pool_entry->elements[i]);
  2928. list_del(&pool_entry->init_list);
  2929. kfree(pool_entry);
  2930. }
  2931. }
  2932. static int
  2933. qeth_alloc_buffer_pool(struct qeth_card *card)
  2934. {
  2935. struct qeth_buffer_pool_entry *pool_entry;
  2936. void *ptr;
  2937. int i, j;
  2938. QETH_DBF_TEXT(trace,5,"alocpool");
  2939. for (i = 0; i < card->qdio.init_pool.buf_count; ++i){
  2940. pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
  2941. if (!pool_entry){
  2942. qeth_free_buffer_pool(card);
  2943. return -ENOMEM;
  2944. }
  2945. for(j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j){
  2946. ptr = (void *) __get_free_page(GFP_KERNEL|GFP_DMA);
  2947. if (!ptr) {
  2948. while (j > 0)
  2949. free_page((unsigned long)
  2950. pool_entry->elements[--j]);
  2951. kfree(pool_entry);
  2952. qeth_free_buffer_pool(card);
  2953. return -ENOMEM;
  2954. }
  2955. pool_entry->elements[j] = ptr;
  2956. }
  2957. list_add(&pool_entry->init_list,
  2958. &card->qdio.init_pool.entry_list);
  2959. }
  2960. return 0;
  2961. }
  2962. int
  2963. qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
  2964. {
  2965. QETH_DBF_TEXT(trace, 2, "realcbp");
  2966. if ((card->state != CARD_STATE_DOWN) &&
  2967. (card->state != CARD_STATE_RECOVER))
  2968. return -EPERM;
  2969. /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
  2970. qeth_clear_working_pool_list(card);
  2971. qeth_free_buffer_pool(card);
  2972. card->qdio.in_buf_pool.buf_count = bufcnt;
  2973. card->qdio.init_pool.buf_count = bufcnt;
  2974. return qeth_alloc_buffer_pool(card);
  2975. }
  2976. static int
  2977. qeth_alloc_qdio_buffers(struct qeth_card *card)
  2978. {
  2979. int i, j;
  2980. QETH_DBF_TEXT(setup, 2, "allcqdbf");
  2981. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
  2982. QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
  2983. return 0;
  2984. card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
  2985. GFP_KERNEL|GFP_DMA);
  2986. if (!card->qdio.in_q)
  2987. goto out_nomem;
  2988. QETH_DBF_TEXT(setup, 2, "inq");
  2989. QETH_DBF_HEX(setup, 2, &card->qdio.in_q, sizeof(void *));
  2990. memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
  2991. /* give inbound qeth_qdio_buffers their qdio_buffers */
  2992. for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
  2993. card->qdio.in_q->bufs[i].buffer =
  2994. &card->qdio.in_q->qdio_bufs[i];
  2995. /* inbound buffer pool */
  2996. if (qeth_alloc_buffer_pool(card))
  2997. goto out_freeinq;
  2998. /* outbound */
  2999. card->qdio.out_qs =
  3000. kmalloc(card->qdio.no_out_queues *
  3001. sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
  3002. if (!card->qdio.out_qs)
  3003. goto out_freepool;
  3004. for (i = 0; i < card->qdio.no_out_queues; ++i) {
  3005. card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
  3006. GFP_KERNEL|GFP_DMA);
  3007. if (!card->qdio.out_qs[i])
  3008. goto out_freeoutq;
  3009. QETH_DBF_TEXT_(setup, 2, "outq %i", i);
  3010. QETH_DBF_HEX(setup, 2, &card->qdio.out_qs[i], sizeof(void *));
  3011. memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
  3012. card->qdio.out_qs[i]->queue_no = i;
  3013. /* give outbound qeth_qdio_buffers their qdio_buffers */
  3014. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j){
  3015. card->qdio.out_qs[i]->bufs[j].buffer =
  3016. &card->qdio.out_qs[i]->qdio_bufs[j];
  3017. skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
  3018. skb_list);
  3019. lockdep_set_class(
  3020. &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
  3021. &qdio_out_skb_queue_key);
  3022. INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
  3023. }
  3024. }
  3025. return 0;
  3026. out_freeoutq:
  3027. while (i > 0)
  3028. kfree(card->qdio.out_qs[--i]);
  3029. kfree(card->qdio.out_qs);
  3030. out_freepool:
  3031. qeth_free_buffer_pool(card);
  3032. out_freeinq:
  3033. kfree(card->qdio.in_q);
  3034. out_nomem:
  3035. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  3036. return -ENOMEM;
  3037. }
  3038. static void
  3039. qeth_free_qdio_buffers(struct qeth_card *card)
  3040. {
  3041. int i, j;
  3042. QETH_DBF_TEXT(trace, 2, "freeqdbf");
  3043. if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
  3044. QETH_QDIO_UNINITIALIZED)
  3045. return;
  3046. kfree(card->qdio.in_q);
  3047. /* inbound buffer pool */
  3048. qeth_free_buffer_pool(card);
  3049. /* free outbound qdio_qs */
  3050. for (i = 0; i < card->qdio.no_out_queues; ++i){
  3051. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
  3052. qeth_clear_output_buffer(card->qdio.out_qs[i],
  3053. &card->qdio.out_qs[i]->bufs[j]);
  3054. kfree(card->qdio.out_qs[i]);
  3055. }
  3056. kfree(card->qdio.out_qs);
  3057. }
  3058. static void
  3059. qeth_clear_qdio_buffers(struct qeth_card *card)
  3060. {
  3061. int i, j;
  3062. QETH_DBF_TEXT(trace, 2, "clearqdbf");
  3063. /* clear outbound buffers to free skbs */
  3064. for (i = 0; i < card->qdio.no_out_queues; ++i)
  3065. if (card->qdio.out_qs[i]){
  3066. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
  3067. qeth_clear_output_buffer(card->qdio.out_qs[i],
  3068. &card->qdio.out_qs[i]->bufs[j]);
  3069. }
  3070. }
  3071. static void
  3072. qeth_init_qdio_info(struct qeth_card *card)
  3073. {
  3074. QETH_DBF_TEXT(setup, 4, "intqdinf");
  3075. atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
  3076. /* inbound */
  3077. card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
  3078. card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
  3079. card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
  3080. INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
  3081. INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
  3082. }
  3083. static int
  3084. qeth_init_qdio_queues(struct qeth_card *card)
  3085. {
  3086. int i, j;
  3087. int rc;
  3088. QETH_DBF_TEXT(setup, 2, "initqdqs");
  3089. /* inbound queue */
  3090. memset(card->qdio.in_q->qdio_bufs, 0,
  3091. QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
  3092. qeth_initialize_working_pool_list(card);
  3093. /*give only as many buffers to hardware as we have buffer pool entries*/
  3094. for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
  3095. qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
  3096. card->qdio.in_q->next_buf_to_init = card->qdio.in_buf_pool.buf_count - 1;
  3097. rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
  3098. card->qdio.in_buf_pool.buf_count - 1, NULL);
  3099. if (rc) {
  3100. QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
  3101. return rc;
  3102. }
  3103. rc = qdio_synchronize(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0);
  3104. if (rc) {
  3105. QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
  3106. return rc;
  3107. }
  3108. /* outbound queue */
  3109. for (i = 0; i < card->qdio.no_out_queues; ++i){
  3110. memset(card->qdio.out_qs[i]->qdio_bufs, 0,
  3111. QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
  3112. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j){
  3113. qeth_clear_output_buffer(card->qdio.out_qs[i],
  3114. &card->qdio.out_qs[i]->bufs[j]);
  3115. }
  3116. card->qdio.out_qs[i]->card = card;
  3117. card->qdio.out_qs[i]->next_buf_to_fill = 0;
  3118. card->qdio.out_qs[i]->do_pack = 0;
  3119. atomic_set(&card->qdio.out_qs[i]->used_buffers,0);
  3120. atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
  3121. atomic_set(&card->qdio.out_qs[i]->state,
  3122. QETH_OUT_Q_UNLOCKED);
  3123. }
  3124. return 0;
  3125. }
  3126. static int
  3127. qeth_qdio_establish(struct qeth_card *card)
  3128. {
  3129. struct qdio_initialize init_data;
  3130. char *qib_param_field;
  3131. struct qdio_buffer **in_sbal_ptrs;
  3132. struct qdio_buffer **out_sbal_ptrs;
  3133. int i, j, k;
  3134. int rc = 0;
  3135. QETH_DBF_TEXT(setup, 2, "qdioest");
  3136. qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
  3137. GFP_KERNEL);
  3138. if (!qib_param_field)
  3139. return -ENOMEM;
  3140. qeth_create_qib_param_field(card, qib_param_field);
  3141. qeth_create_qib_param_field_blkt(card, qib_param_field);
  3142. in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
  3143. GFP_KERNEL);
  3144. if (!in_sbal_ptrs) {
  3145. kfree(qib_param_field);
  3146. return -ENOMEM;
  3147. }
  3148. for(i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
  3149. in_sbal_ptrs[i] = (struct qdio_buffer *)
  3150. virt_to_phys(card->qdio.in_q->bufs[i].buffer);
  3151. out_sbal_ptrs =
  3152. kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
  3153. sizeof(void *), GFP_KERNEL);
  3154. if (!out_sbal_ptrs) {
  3155. kfree(in_sbal_ptrs);
  3156. kfree(qib_param_field);
  3157. return -ENOMEM;
  3158. }
  3159. for(i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
  3160. for(j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k){
  3161. out_sbal_ptrs[k] = (struct qdio_buffer *)
  3162. virt_to_phys(card->qdio.out_qs[i]->
  3163. bufs[j].buffer);
  3164. }
  3165. memset(&init_data, 0, sizeof(struct qdio_initialize));
  3166. init_data.cdev = CARD_DDEV(card);
  3167. init_data.q_format = qeth_get_qdio_q_format(card);
  3168. init_data.qib_param_field_format = 0;
  3169. init_data.qib_param_field = qib_param_field;
  3170. init_data.min_input_threshold = QETH_MIN_INPUT_THRESHOLD;
  3171. init_data.max_input_threshold = QETH_MAX_INPUT_THRESHOLD;
  3172. init_data.min_output_threshold = QETH_MIN_OUTPUT_THRESHOLD;
  3173. init_data.max_output_threshold = QETH_MAX_OUTPUT_THRESHOLD;
  3174. init_data.no_input_qs = 1;
  3175. init_data.no_output_qs = card->qdio.no_out_queues;
  3176. init_data.input_handler = (qdio_handler_t *)
  3177. qeth_qdio_input_handler;
  3178. init_data.output_handler = (qdio_handler_t *)
  3179. qeth_qdio_output_handler;
  3180. init_data.int_parm = (unsigned long) card;
  3181. init_data.flags = QDIO_INBOUND_0COPY_SBALS |
  3182. QDIO_OUTBOUND_0COPY_SBALS |
  3183. QDIO_USE_OUTBOUND_PCIS;
  3184. init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
  3185. init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
  3186. if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
  3187. QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED)
  3188. if ((rc = qdio_initialize(&init_data)))
  3189. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  3190. kfree(out_sbal_ptrs);
  3191. kfree(in_sbal_ptrs);
  3192. kfree(qib_param_field);
  3193. return rc;
  3194. }
  3195. static int
  3196. qeth_qdio_activate(struct qeth_card *card)
  3197. {
  3198. QETH_DBF_TEXT(setup,3,"qdioact");
  3199. return qdio_activate(CARD_DDEV(card), 0);
  3200. }
  3201. static int
  3202. qeth_clear_channel(struct qeth_channel *channel)
  3203. {
  3204. unsigned long flags;
  3205. struct qeth_card *card;
  3206. int rc;
  3207. QETH_DBF_TEXT(trace,3,"clearch");
  3208. card = CARD_FROM_CDEV(channel->ccwdev);
  3209. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  3210. rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
  3211. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  3212. if (rc)
  3213. return rc;
  3214. rc = wait_event_interruptible_timeout(card->wait_q,
  3215. channel->state==CH_STATE_STOPPED, QETH_TIMEOUT);
  3216. if (rc == -ERESTARTSYS)
  3217. return rc;
  3218. if (channel->state != CH_STATE_STOPPED)
  3219. return -ETIME;
  3220. channel->state = CH_STATE_DOWN;
  3221. return 0;
  3222. }
  3223. static int
  3224. qeth_halt_channel(struct qeth_channel *channel)
  3225. {
  3226. unsigned long flags;
  3227. struct qeth_card *card;
  3228. int rc;
  3229. QETH_DBF_TEXT(trace,3,"haltch");
  3230. card = CARD_FROM_CDEV(channel->ccwdev);
  3231. spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
  3232. rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
  3233. spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
  3234. if (rc)
  3235. return rc;
  3236. rc = wait_event_interruptible_timeout(card->wait_q,
  3237. channel->state==CH_STATE_HALTED, QETH_TIMEOUT);
  3238. if (rc == -ERESTARTSYS)
  3239. return rc;
  3240. if (channel->state != CH_STATE_HALTED)
  3241. return -ETIME;
  3242. return 0;
  3243. }
  3244. static int
  3245. qeth_halt_channels(struct qeth_card *card)
  3246. {
  3247. int rc1 = 0, rc2=0, rc3 = 0;
  3248. QETH_DBF_TEXT(trace,3,"haltchs");
  3249. rc1 = qeth_halt_channel(&card->read);
  3250. rc2 = qeth_halt_channel(&card->write);
  3251. rc3 = qeth_halt_channel(&card->data);
  3252. if (rc1)
  3253. return rc1;
  3254. if (rc2)
  3255. return rc2;
  3256. return rc3;
  3257. }
  3258. static int
  3259. qeth_clear_channels(struct qeth_card *card)
  3260. {
  3261. int rc1 = 0, rc2=0, rc3 = 0;
  3262. QETH_DBF_TEXT(trace,3,"clearchs");
  3263. rc1 = qeth_clear_channel(&card->read);
  3264. rc2 = qeth_clear_channel(&card->write);
  3265. rc3 = qeth_clear_channel(&card->data);
  3266. if (rc1)
  3267. return rc1;
  3268. if (rc2)
  3269. return rc2;
  3270. return rc3;
  3271. }
  3272. static int
  3273. qeth_clear_halt_card(struct qeth_card *card, int halt)
  3274. {
  3275. int rc = 0;
  3276. QETH_DBF_TEXT(trace,3,"clhacrd");
  3277. QETH_DBF_HEX(trace, 3, &card, sizeof(void *));
  3278. if (halt)
  3279. rc = qeth_halt_channels(card);
  3280. if (rc)
  3281. return rc;
  3282. return qeth_clear_channels(card);
  3283. }
  3284. static int
  3285. qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
  3286. {
  3287. int rc = 0;
  3288. QETH_DBF_TEXT(trace,3,"qdioclr");
  3289. switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
  3290. QETH_QDIO_CLEANING)) {
  3291. case QETH_QDIO_ESTABLISHED:
  3292. if ((rc = qdio_cleanup(CARD_DDEV(card),
  3293. (card->info.type == QETH_CARD_TYPE_IQD) ?
  3294. QDIO_FLAG_CLEANUP_USING_HALT :
  3295. QDIO_FLAG_CLEANUP_USING_CLEAR)))
  3296. QETH_DBF_TEXT_(trace, 3, "1err%d", rc);
  3297. atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
  3298. break;
  3299. case QETH_QDIO_CLEANING:
  3300. return rc;
  3301. default:
  3302. break;
  3303. }
  3304. if ((rc = qeth_clear_halt_card(card, use_halt)))
  3305. QETH_DBF_TEXT_(trace, 3, "2err%d", rc);
  3306. card->state = CARD_STATE_DOWN;
  3307. return rc;
  3308. }
  3309. static int
  3310. qeth_dm_act(struct qeth_card *card)
  3311. {
  3312. int rc;
  3313. struct qeth_cmd_buffer *iob;
  3314. QETH_DBF_TEXT(setup,2,"dmact");
  3315. iob = qeth_wait_for_buffer(&card->write);
  3316. memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
  3317. memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
  3318. &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
  3319. memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
  3320. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  3321. rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
  3322. return rc;
  3323. }
  3324. static int
  3325. qeth_mpc_initialize(struct qeth_card *card)
  3326. {
  3327. int rc;
  3328. QETH_DBF_TEXT(setup,2,"mpcinit");
  3329. if ((rc = qeth_issue_next_read(card))){
  3330. QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
  3331. return rc;
  3332. }
  3333. if ((rc = qeth_cm_enable(card))){
  3334. QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
  3335. goto out_qdio;
  3336. }
  3337. if ((rc = qeth_cm_setup(card))){
  3338. QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
  3339. goto out_qdio;
  3340. }
  3341. if ((rc = qeth_ulp_enable(card))){
  3342. QETH_DBF_TEXT_(setup, 2, "4err%d", rc);
  3343. goto out_qdio;
  3344. }
  3345. if ((rc = qeth_ulp_setup(card))){
  3346. QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
  3347. goto out_qdio;
  3348. }
  3349. if ((rc = qeth_alloc_qdio_buffers(card))){
  3350. QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
  3351. goto out_qdio;
  3352. }
  3353. if ((rc = qeth_qdio_establish(card))){
  3354. QETH_DBF_TEXT_(setup, 2, "6err%d", rc);
  3355. qeth_free_qdio_buffers(card);
  3356. goto out_qdio;
  3357. }
  3358. if ((rc = qeth_qdio_activate(card))){
  3359. QETH_DBF_TEXT_(setup, 2, "7err%d", rc);
  3360. goto out_qdio;
  3361. }
  3362. if ((rc = qeth_dm_act(card))){
  3363. QETH_DBF_TEXT_(setup, 2, "8err%d", rc);
  3364. goto out_qdio;
  3365. }
  3366. return 0;
  3367. out_qdio:
  3368. qeth_qdio_clear_card(card, card->info.type!=QETH_CARD_TYPE_IQD);
  3369. return rc;
  3370. }
  3371. static struct net_device *
  3372. qeth_get_netdevice(enum qeth_card_types type, enum qeth_link_types linktype)
  3373. {
  3374. struct net_device *dev = NULL;
  3375. switch (type) {
  3376. case QETH_CARD_TYPE_OSAE:
  3377. switch (linktype) {
  3378. case QETH_LINK_TYPE_LANE_TR:
  3379. case QETH_LINK_TYPE_HSTR:
  3380. #ifdef CONFIG_TR
  3381. dev = alloc_trdev(0);
  3382. #endif /* CONFIG_TR */
  3383. break;
  3384. default:
  3385. dev = alloc_etherdev(0);
  3386. }
  3387. break;
  3388. case QETH_CARD_TYPE_IQD:
  3389. dev = alloc_netdev(0, "hsi%d", ether_setup);
  3390. break;
  3391. case QETH_CARD_TYPE_OSN:
  3392. dev = alloc_netdev(0, "osn%d", ether_setup);
  3393. break;
  3394. default:
  3395. dev = alloc_etherdev(0);
  3396. }
  3397. return dev;
  3398. }
  3399. /*hard_header fake function; used in case fake_ll is set */
  3400. static int
  3401. qeth_fake_header(struct sk_buff *skb, struct net_device *dev,
  3402. unsigned short type, void *daddr, void *saddr,
  3403. unsigned len)
  3404. {
  3405. if(dev->type == ARPHRD_IEEE802_TR){
  3406. struct trh_hdr *hdr;
  3407. hdr = (struct trh_hdr *)skb_push(skb, QETH_FAKE_LL_LEN_TR);
  3408. memcpy(hdr->saddr, dev->dev_addr, TR_ALEN);
  3409. memcpy(hdr->daddr, "FAKELL", TR_ALEN);
  3410. return QETH_FAKE_LL_LEN_TR;
  3411. } else {
  3412. struct ethhdr *hdr;
  3413. hdr = (struct ethhdr *)skb_push(skb, QETH_FAKE_LL_LEN_ETH);
  3414. memcpy(hdr->h_source, dev->dev_addr, ETH_ALEN);
  3415. memcpy(hdr->h_dest, "FAKELL", ETH_ALEN);
  3416. if (type != ETH_P_802_3)
  3417. hdr->h_proto = htons(type);
  3418. else
  3419. hdr->h_proto = htons(len);
  3420. return QETH_FAKE_LL_LEN_ETH;
  3421. }
  3422. }
  3423. static int
  3424. qeth_send_packet(struct qeth_card *, struct sk_buff *);
  3425. static int
  3426. qeth_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  3427. {
  3428. int rc;
  3429. struct qeth_card *card;
  3430. QETH_DBF_TEXT(trace, 6, "hrdstxmi");
  3431. card = (struct qeth_card *)dev->priv;
  3432. if (skb==NULL) {
  3433. card->stats.tx_dropped++;
  3434. card->stats.tx_errors++;
  3435. /* return OK; otherwise ksoftirqd goes to 100% */
  3436. return NETDEV_TX_OK;
  3437. }
  3438. if ((card->state != CARD_STATE_UP) || !card->lan_online) {
  3439. card->stats.tx_dropped++;
  3440. card->stats.tx_errors++;
  3441. card->stats.tx_carrier_errors++;
  3442. dev_kfree_skb_any(skb);
  3443. /* return OK; otherwise ksoftirqd goes to 100% */
  3444. return NETDEV_TX_OK;
  3445. }
  3446. if (card->options.performance_stats) {
  3447. card->perf_stats.outbound_cnt++;
  3448. card->perf_stats.outbound_start_time = qeth_get_micros();
  3449. }
  3450. netif_stop_queue(dev);
  3451. if ((rc = qeth_send_packet(card, skb))) {
  3452. if (rc == -EBUSY) {
  3453. return NETDEV_TX_BUSY;
  3454. } else {
  3455. card->stats.tx_errors++;
  3456. card->stats.tx_dropped++;
  3457. dev_kfree_skb_any(skb);
  3458. /*set to OK; otherwise ksoftirqd goes to 100% */
  3459. rc = NETDEV_TX_OK;
  3460. }
  3461. }
  3462. netif_wake_queue(dev);
  3463. if (card->options.performance_stats)
  3464. card->perf_stats.outbound_time += qeth_get_micros() -
  3465. card->perf_stats.outbound_start_time;
  3466. return rc;
  3467. }
  3468. static int
  3469. qeth_verify_vlan_dev(struct net_device *dev, struct qeth_card *card)
  3470. {
  3471. int rc = 0;
  3472. #ifdef CONFIG_QETH_VLAN
  3473. struct vlan_group *vg;
  3474. int i;
  3475. if (!(vg = card->vlangrp))
  3476. return rc;
  3477. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++){
  3478. if (vlan_group_get_device(vg, i) == dev){
  3479. rc = QETH_VLAN_CARD;
  3480. break;
  3481. }
  3482. }
  3483. if (rc && !(VLAN_DEV_INFO(dev)->real_dev->priv == (void *)card))
  3484. return 0;
  3485. #endif
  3486. return rc;
  3487. }
  3488. static int
  3489. qeth_verify_dev(struct net_device *dev)
  3490. {
  3491. struct qeth_card *card;
  3492. unsigned long flags;
  3493. int rc = 0;
  3494. read_lock_irqsave(&qeth_card_list.rwlock, flags);
  3495. list_for_each_entry(card, &qeth_card_list.list, list){
  3496. if (card->dev == dev){
  3497. rc = QETH_REAL_CARD;
  3498. break;
  3499. }
  3500. rc = qeth_verify_vlan_dev(dev, card);
  3501. if (rc)
  3502. break;
  3503. }
  3504. read_unlock_irqrestore(&qeth_card_list.rwlock, flags);
  3505. return rc;
  3506. }
  3507. static struct qeth_card *
  3508. qeth_get_card_from_dev(struct net_device *dev)
  3509. {
  3510. struct qeth_card *card = NULL;
  3511. int rc;
  3512. rc = qeth_verify_dev(dev);
  3513. if (rc == QETH_REAL_CARD)
  3514. card = (struct qeth_card *)dev->priv;
  3515. else if (rc == QETH_VLAN_CARD)
  3516. card = (struct qeth_card *)
  3517. VLAN_DEV_INFO(dev)->real_dev->priv;
  3518. QETH_DBF_TEXT_(trace, 4, "%d", rc);
  3519. return card ;
  3520. }
  3521. static void
  3522. qeth_tx_timeout(struct net_device *dev)
  3523. {
  3524. struct qeth_card *card;
  3525. card = (struct qeth_card *) dev->priv;
  3526. card->stats.tx_errors++;
  3527. qeth_schedule_recovery(card);
  3528. }
  3529. static int
  3530. qeth_open(struct net_device *dev)
  3531. {
  3532. struct qeth_card *card;
  3533. QETH_DBF_TEXT(trace, 4, "qethopen");
  3534. card = (struct qeth_card *) dev->priv;
  3535. if (card->state != CARD_STATE_SOFTSETUP)
  3536. return -ENODEV;
  3537. if ( (card->info.type != QETH_CARD_TYPE_OSN) &&
  3538. (card->options.layer2) &&
  3539. (!(card->info.mac_bits & QETH_LAYER2_MAC_REGISTERED))) {
  3540. QETH_DBF_TEXT(trace,4,"nomacadr");
  3541. return -EPERM;
  3542. }
  3543. card->data.state = CH_STATE_UP;
  3544. card->state = CARD_STATE_UP;
  3545. card->dev->flags |= IFF_UP;
  3546. netif_start_queue(dev);
  3547. if (!card->lan_online && netif_carrier_ok(dev))
  3548. netif_carrier_off(dev);
  3549. return 0;
  3550. }
  3551. static int
  3552. qeth_stop(struct net_device *dev)
  3553. {
  3554. struct qeth_card *card;
  3555. QETH_DBF_TEXT(trace, 4, "qethstop");
  3556. card = (struct qeth_card *) dev->priv;
  3557. netif_tx_disable(dev);
  3558. card->dev->flags &= ~IFF_UP;
  3559. if (card->state == CARD_STATE_UP)
  3560. card->state = CARD_STATE_SOFTSETUP;
  3561. return 0;
  3562. }
  3563. static int
  3564. qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
  3565. {
  3566. int cast_type = RTN_UNSPEC;
  3567. if (card->info.type == QETH_CARD_TYPE_OSN)
  3568. return cast_type;
  3569. if (skb->dst && skb->dst->neighbour){
  3570. cast_type = skb->dst->neighbour->type;
  3571. if ((cast_type == RTN_BROADCAST) ||
  3572. (cast_type == RTN_MULTICAST) ||
  3573. (cast_type == RTN_ANYCAST))
  3574. return cast_type;
  3575. else
  3576. return RTN_UNSPEC;
  3577. }
  3578. /* try something else */
  3579. if (skb->protocol == ETH_P_IPV6)
  3580. return (skb_network_header(skb)[24] == 0xff) ?
  3581. RTN_MULTICAST : 0;
  3582. else if (skb->protocol == ETH_P_IP)
  3583. return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
  3584. RTN_MULTICAST : 0;
  3585. /* ... */
  3586. if (!memcmp(skb->data, skb->dev->broadcast, 6))
  3587. return RTN_BROADCAST;
  3588. else {
  3589. u16 hdr_mac;
  3590. hdr_mac = *((u16 *)skb->data);
  3591. /* tr multicast? */
  3592. switch (card->info.link_type) {
  3593. case QETH_LINK_TYPE_HSTR:
  3594. case QETH_LINK_TYPE_LANE_TR:
  3595. if ((hdr_mac == QETH_TR_MAC_NC) ||
  3596. (hdr_mac == QETH_TR_MAC_C))
  3597. return RTN_MULTICAST;
  3598. break;
  3599. /* eth or so multicast? */
  3600. default:
  3601. if ((hdr_mac == QETH_ETH_MAC_V4) ||
  3602. (hdr_mac == QETH_ETH_MAC_V6))
  3603. return RTN_MULTICAST;
  3604. }
  3605. }
  3606. return cast_type;
  3607. }
  3608. static int
  3609. qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
  3610. int ipv, int cast_type)
  3611. {
  3612. if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
  3613. return card->qdio.default_out_queue;
  3614. switch (card->qdio.no_out_queues) {
  3615. case 4:
  3616. if (cast_type && card->info.is_multicast_different)
  3617. return card->info.is_multicast_different &
  3618. (card->qdio.no_out_queues - 1);
  3619. if (card->qdio.do_prio_queueing && (ipv == 4)) {
  3620. const u8 tos = ip_hdr(skb)->tos;
  3621. if (card->qdio.do_prio_queueing==QETH_PRIO_Q_ING_TOS){
  3622. if (tos & IP_TOS_NOTIMPORTANT)
  3623. return 3;
  3624. if (tos & IP_TOS_HIGHRELIABILITY)
  3625. return 2;
  3626. if (tos & IP_TOS_HIGHTHROUGHPUT)
  3627. return 1;
  3628. if (tos & IP_TOS_LOWDELAY)
  3629. return 0;
  3630. }
  3631. if (card->qdio.do_prio_queueing==QETH_PRIO_Q_ING_PREC)
  3632. return 3 - (tos >> 6);
  3633. } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
  3634. /* TODO: IPv6!!! */
  3635. }
  3636. return card->qdio.default_out_queue;
  3637. case 1: /* fallthrough for single-out-queue 1920-device */
  3638. default:
  3639. return card->qdio.default_out_queue;
  3640. }
  3641. }
  3642. static inline int
  3643. qeth_get_ip_version(struct sk_buff *skb)
  3644. {
  3645. switch (skb->protocol) {
  3646. case ETH_P_IPV6:
  3647. return 6;
  3648. case ETH_P_IP:
  3649. return 4;
  3650. default:
  3651. return 0;
  3652. }
  3653. }
  3654. static struct qeth_hdr *
  3655. __qeth_prepare_skb(struct qeth_card *card, struct sk_buff *skb, int ipv)
  3656. {
  3657. #ifdef CONFIG_QETH_VLAN
  3658. u16 *tag;
  3659. if (card->vlangrp && vlan_tx_tag_present(skb) &&
  3660. ((ipv == 6) || card->options.layer2) ) {
  3661. /*
  3662. * Move the mac addresses (6 bytes src, 6 bytes dest)
  3663. * to the beginning of the new header. We are using three
  3664. * memcpys instead of one memmove to save cycles.
  3665. */
  3666. skb_push(skb, VLAN_HLEN);
  3667. skb_copy_to_linear_data(skb, skb->data + 4, 4);
  3668. skb_copy_to_linear_data_offset(skb, 4, skb->data + 8, 4);
  3669. skb_copy_to_linear_data_offset(skb, 8, skb->data + 12, 4);
  3670. tag = (u16 *)(skb->data + 12);
  3671. /*
  3672. * first two bytes = ETH_P_8021Q (0x8100)
  3673. * second two bytes = VLANID
  3674. */
  3675. *tag = __constant_htons(ETH_P_8021Q);
  3676. *(tag + 1) = htons(vlan_tx_tag_get(skb));
  3677. }
  3678. #endif
  3679. return ((struct qeth_hdr *)
  3680. qeth_push_skb(card, skb, sizeof(struct qeth_hdr)));
  3681. }
  3682. static void
  3683. __qeth_free_new_skb(struct sk_buff *orig_skb, struct sk_buff *new_skb)
  3684. {
  3685. if (orig_skb != new_skb)
  3686. dev_kfree_skb_any(new_skb);
  3687. }
  3688. static struct sk_buff *
  3689. qeth_prepare_skb(struct qeth_card *card, struct sk_buff *skb,
  3690. struct qeth_hdr **hdr, int ipv)
  3691. {
  3692. struct sk_buff *new_skb, *new_skb2;
  3693. QETH_DBF_TEXT(trace, 6, "prepskb");
  3694. new_skb = skb;
  3695. new_skb = qeth_pskb_unshare(skb, GFP_ATOMIC);
  3696. if (!new_skb)
  3697. return NULL;
  3698. new_skb2 = qeth_realloc_headroom(card, new_skb,
  3699. sizeof(struct qeth_hdr));
  3700. if (!new_skb2) {
  3701. __qeth_free_new_skb(skb, new_skb);
  3702. return NULL;
  3703. }
  3704. if (new_skb != skb)
  3705. __qeth_free_new_skb(new_skb2, new_skb);
  3706. new_skb = new_skb2;
  3707. *hdr = __qeth_prepare_skb(card, new_skb, ipv);
  3708. if (*hdr == NULL) {
  3709. __qeth_free_new_skb(skb, new_skb);
  3710. return NULL;
  3711. }
  3712. return new_skb;
  3713. }
  3714. static inline u8
  3715. qeth_get_qeth_hdr_flags4(int cast_type)
  3716. {
  3717. if (cast_type == RTN_MULTICAST)
  3718. return QETH_CAST_MULTICAST;
  3719. if (cast_type == RTN_BROADCAST)
  3720. return QETH_CAST_BROADCAST;
  3721. return QETH_CAST_UNICAST;
  3722. }
  3723. static inline u8
  3724. qeth_get_qeth_hdr_flags6(int cast_type)
  3725. {
  3726. u8 ct = QETH_HDR_PASSTHRU | QETH_HDR_IPV6;
  3727. if (cast_type == RTN_MULTICAST)
  3728. return ct | QETH_CAST_MULTICAST;
  3729. if (cast_type == RTN_ANYCAST)
  3730. return ct | QETH_CAST_ANYCAST;
  3731. if (cast_type == RTN_BROADCAST)
  3732. return ct | QETH_CAST_BROADCAST;
  3733. return ct | QETH_CAST_UNICAST;
  3734. }
  3735. static void
  3736. qeth_layer2_get_packet_type(struct qeth_card *card, struct qeth_hdr *hdr,
  3737. struct sk_buff *skb)
  3738. {
  3739. __u16 hdr_mac;
  3740. if (!memcmp(skb->data+QETH_HEADER_SIZE,
  3741. skb->dev->broadcast,6)) { /* broadcast? */
  3742. *(__u32 *)hdr->hdr.l2.flags |=
  3743. QETH_LAYER2_FLAG_BROADCAST << 8;
  3744. return;
  3745. }
  3746. hdr_mac=*((__u16*)skb->data);
  3747. /* tr multicast? */
  3748. switch (card->info.link_type) {
  3749. case QETH_LINK_TYPE_HSTR:
  3750. case QETH_LINK_TYPE_LANE_TR:
  3751. if ((hdr_mac == QETH_TR_MAC_NC) ||
  3752. (hdr_mac == QETH_TR_MAC_C) )
  3753. *(__u32 *)hdr->hdr.l2.flags |=
  3754. QETH_LAYER2_FLAG_MULTICAST << 8;
  3755. else
  3756. *(__u32 *)hdr->hdr.l2.flags |=
  3757. QETH_LAYER2_FLAG_UNICAST << 8;
  3758. break;
  3759. /* eth or so multicast? */
  3760. default:
  3761. if ( (hdr_mac==QETH_ETH_MAC_V4) ||
  3762. (hdr_mac==QETH_ETH_MAC_V6) )
  3763. *(__u32 *)hdr->hdr.l2.flags |=
  3764. QETH_LAYER2_FLAG_MULTICAST << 8;
  3765. else
  3766. *(__u32 *)hdr->hdr.l2.flags |=
  3767. QETH_LAYER2_FLAG_UNICAST << 8;
  3768. }
  3769. }
  3770. static void
  3771. qeth_layer2_fill_header(struct qeth_card *card, struct qeth_hdr *hdr,
  3772. struct sk_buff *skb, int cast_type)
  3773. {
  3774. memset(hdr, 0, sizeof(struct qeth_hdr));
  3775. hdr->hdr.l2.id = QETH_HEADER_TYPE_LAYER2;
  3776. /* set byte 0 to "0x02" and byte 3 to casting flags */
  3777. if (cast_type==RTN_MULTICAST)
  3778. *(__u32 *)hdr->hdr.l2.flags |= QETH_LAYER2_FLAG_MULTICAST << 8;
  3779. else if (cast_type==RTN_BROADCAST)
  3780. *(__u32 *)hdr->hdr.l2.flags |= QETH_LAYER2_FLAG_BROADCAST << 8;
  3781. else
  3782. qeth_layer2_get_packet_type(card, hdr, skb);
  3783. hdr->hdr.l2.pkt_length = skb->len-QETH_HEADER_SIZE;
  3784. #ifdef CONFIG_QETH_VLAN
  3785. /* VSWITCH relies on the VLAN
  3786. * information to be present in
  3787. * the QDIO header */
  3788. if ((card->vlangrp != NULL) &&
  3789. vlan_tx_tag_present(skb)) {
  3790. *(__u32 *)hdr->hdr.l2.flags |= QETH_LAYER2_FLAG_VLAN << 8;
  3791. hdr->hdr.l2.vlan_id = vlan_tx_tag_get(skb);
  3792. }
  3793. #endif
  3794. }
  3795. void
  3796. qeth_fill_header(struct qeth_card *card, struct qeth_hdr *hdr,
  3797. struct sk_buff *skb, int ipv, int cast_type)
  3798. {
  3799. QETH_DBF_TEXT(trace, 6, "fillhdr");
  3800. memset(hdr, 0, sizeof(struct qeth_hdr));
  3801. if (card->options.layer2) {
  3802. qeth_layer2_fill_header(card, hdr, skb, cast_type);
  3803. return;
  3804. }
  3805. hdr->hdr.l3.id = QETH_HEADER_TYPE_LAYER3;
  3806. hdr->hdr.l3.ext_flags = 0;
  3807. #ifdef CONFIG_QETH_VLAN
  3808. /*
  3809. * before we're going to overwrite this location with next hop ip.
  3810. * v6 uses passthrough, v4 sets the tag in the QDIO header.
  3811. */
  3812. if (card->vlangrp && vlan_tx_tag_present(skb)) {
  3813. hdr->hdr.l3.ext_flags = (ipv == 4) ?
  3814. QETH_HDR_EXT_VLAN_FRAME :
  3815. QETH_HDR_EXT_INCLUDE_VLAN_TAG;
  3816. hdr->hdr.l3.vlan_id = vlan_tx_tag_get(skb);
  3817. }
  3818. #endif /* CONFIG_QETH_VLAN */
  3819. hdr->hdr.l3.length = skb->len - sizeof(struct qeth_hdr);
  3820. if (ipv == 4) { /* IPv4 */
  3821. hdr->hdr.l3.flags = qeth_get_qeth_hdr_flags4(cast_type);
  3822. memset(hdr->hdr.l3.dest_addr, 0, 12);
  3823. if ((skb->dst) && (skb->dst->neighbour)) {
  3824. *((u32 *) (&hdr->hdr.l3.dest_addr[12])) =
  3825. *((u32 *) skb->dst->neighbour->primary_key);
  3826. } else {
  3827. /* fill in destination address used in ip header */
  3828. *((u32 *)(&hdr->hdr.l3.dest_addr[12])) =
  3829. ip_hdr(skb)->daddr;
  3830. }
  3831. } else if (ipv == 6) { /* IPv6 or passthru */
  3832. hdr->hdr.l3.flags = qeth_get_qeth_hdr_flags6(cast_type);
  3833. if ((skb->dst) && (skb->dst->neighbour)) {
  3834. memcpy(hdr->hdr.l3.dest_addr,
  3835. skb->dst->neighbour->primary_key, 16);
  3836. } else {
  3837. /* fill in destination address used in ip header */
  3838. memcpy(hdr->hdr.l3.dest_addr,
  3839. &ipv6_hdr(skb)->daddr, 16);
  3840. }
  3841. } else { /* passthrough */
  3842. if((skb->dev->type == ARPHRD_IEEE802_TR) &&
  3843. !memcmp(skb->data + sizeof(struct qeth_hdr) +
  3844. sizeof(__u16), skb->dev->broadcast, 6)) {
  3845. hdr->hdr.l3.flags = QETH_CAST_BROADCAST |
  3846. QETH_HDR_PASSTHRU;
  3847. } else if (!memcmp(skb->data + sizeof(struct qeth_hdr),
  3848. skb->dev->broadcast, 6)) { /* broadcast? */
  3849. hdr->hdr.l3.flags = QETH_CAST_BROADCAST |
  3850. QETH_HDR_PASSTHRU;
  3851. } else {
  3852. hdr->hdr.l3.flags = (cast_type == RTN_MULTICAST) ?
  3853. QETH_CAST_MULTICAST | QETH_HDR_PASSTHRU :
  3854. QETH_CAST_UNICAST | QETH_HDR_PASSTHRU;
  3855. }
  3856. }
  3857. }
  3858. static void
  3859. __qeth_fill_buffer(struct sk_buff *skb, struct qdio_buffer *buffer,
  3860. int is_tso, int *next_element_to_fill)
  3861. {
  3862. int length = skb->len;
  3863. int length_here;
  3864. int element;
  3865. char *data;
  3866. int first_lap ;
  3867. element = *next_element_to_fill;
  3868. data = skb->data;
  3869. first_lap = (is_tso == 0 ? 1 : 0);
  3870. while (length > 0) {
  3871. /* length_here is the remaining amount of data in this page */
  3872. length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
  3873. if (length < length_here)
  3874. length_here = length;
  3875. buffer->element[element].addr = data;
  3876. buffer->element[element].length = length_here;
  3877. length -= length_here;
  3878. if (!length) {
  3879. if (first_lap)
  3880. buffer->element[element].flags = 0;
  3881. else
  3882. buffer->element[element].flags =
  3883. SBAL_FLAGS_LAST_FRAG;
  3884. } else {
  3885. if (first_lap)
  3886. buffer->element[element].flags =
  3887. SBAL_FLAGS_FIRST_FRAG;
  3888. else
  3889. buffer->element[element].flags =
  3890. SBAL_FLAGS_MIDDLE_FRAG;
  3891. }
  3892. data += length_here;
  3893. element++;
  3894. first_lap = 0;
  3895. }
  3896. *next_element_to_fill = element;
  3897. }
  3898. static int
  3899. qeth_fill_buffer(struct qeth_qdio_out_q *queue,
  3900. struct qeth_qdio_out_buffer *buf,
  3901. struct sk_buff *skb)
  3902. {
  3903. struct qdio_buffer *buffer;
  3904. struct qeth_hdr_tso *hdr;
  3905. int flush_cnt = 0, hdr_len, large_send = 0;
  3906. QETH_DBF_TEXT(trace, 6, "qdfillbf");
  3907. buffer = buf->buffer;
  3908. atomic_inc(&skb->users);
  3909. skb_queue_tail(&buf->skb_list, skb);
  3910. hdr = (struct qeth_hdr_tso *) skb->data;
  3911. /*check first on TSO ....*/
  3912. if (hdr->hdr.hdr.l3.id == QETH_HEADER_TYPE_TSO) {
  3913. int element = buf->next_element_to_fill;
  3914. hdr_len = sizeof(struct qeth_hdr_tso) + hdr->ext.dg_hdr_len;
  3915. /*fill first buffer entry only with header information */
  3916. buffer->element[element].addr = skb->data;
  3917. buffer->element[element].length = hdr_len;
  3918. buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
  3919. buf->next_element_to_fill++;
  3920. skb->data += hdr_len;
  3921. skb->len -= hdr_len;
  3922. large_send = 1;
  3923. }
  3924. if (skb_shinfo(skb)->nr_frags == 0)
  3925. __qeth_fill_buffer(skb, buffer, large_send,
  3926. (int *)&buf->next_element_to_fill);
  3927. else
  3928. __qeth_fill_buffer_frag(skb, buffer, large_send,
  3929. (int *)&buf->next_element_to_fill);
  3930. if (!queue->do_pack) {
  3931. QETH_DBF_TEXT(trace, 6, "fillbfnp");
  3932. /* set state to PRIMED -> will be flushed */
  3933. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3934. flush_cnt = 1;
  3935. } else {
  3936. QETH_DBF_TEXT(trace, 6, "fillbfpa");
  3937. if (queue->card->options.performance_stats)
  3938. queue->card->perf_stats.skbs_sent_pack++;
  3939. if (buf->next_element_to_fill >=
  3940. QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
  3941. /*
  3942. * packed buffer if full -> set state PRIMED
  3943. * -> will be flushed
  3944. */
  3945. atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
  3946. flush_cnt = 1;
  3947. }
  3948. }
  3949. return flush_cnt;
  3950. }
  3951. static int
  3952. qeth_do_send_packet_fast(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  3953. struct sk_buff *skb, struct qeth_hdr *hdr,
  3954. int elements_needed,
  3955. struct qeth_eddp_context *ctx)
  3956. {
  3957. struct qeth_qdio_out_buffer *buffer;
  3958. int buffers_needed = 0;
  3959. int flush_cnt = 0;
  3960. int index;
  3961. QETH_DBF_TEXT(trace, 6, "dosndpfa");
  3962. /* spin until we get the queue ... */
  3963. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  3964. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  3965. /* ... now we've got the queue */
  3966. index = queue->next_buf_to_fill;
  3967. buffer = &queue->bufs[queue->next_buf_to_fill];
  3968. /*
  3969. * check if buffer is empty to make sure that we do not 'overtake'
  3970. * ourselves and try to fill a buffer that is already primed
  3971. */
  3972. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
  3973. goto out;
  3974. if (ctx == NULL)
  3975. queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
  3976. QDIO_MAX_BUFFERS_PER_Q;
  3977. else {
  3978. buffers_needed = qeth_eddp_check_buffers_for_context(queue,ctx);
  3979. if (buffers_needed < 0)
  3980. goto out;
  3981. queue->next_buf_to_fill =
  3982. (queue->next_buf_to_fill + buffers_needed) %
  3983. QDIO_MAX_BUFFERS_PER_Q;
  3984. }
  3985. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3986. if (ctx == NULL) {
  3987. qeth_fill_buffer(queue, buffer, skb);
  3988. qeth_flush_buffers(queue, 0, index, 1);
  3989. } else {
  3990. flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
  3991. WARN_ON(buffers_needed != flush_cnt);
  3992. qeth_flush_buffers(queue, 0, index, flush_cnt);
  3993. }
  3994. return 0;
  3995. out:
  3996. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  3997. return -EBUSY;
  3998. }
  3999. static int
  4000. qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
  4001. struct sk_buff *skb, struct qeth_hdr *hdr,
  4002. int elements_needed, struct qeth_eddp_context *ctx)
  4003. {
  4004. struct qeth_qdio_out_buffer *buffer;
  4005. int start_index;
  4006. int flush_count = 0;
  4007. int do_pack = 0;
  4008. int tmp;
  4009. int rc = 0;
  4010. QETH_DBF_TEXT(trace, 6, "dosndpkt");
  4011. /* spin until we get the queue ... */
  4012. while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
  4013. QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
  4014. start_index = queue->next_buf_to_fill;
  4015. buffer = &queue->bufs[queue->next_buf_to_fill];
  4016. /*
  4017. * check if buffer is empty to make sure that we do not 'overtake'
  4018. * ourselves and try to fill a buffer that is already primed
  4019. */
  4020. if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
  4021. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  4022. return -EBUSY;
  4023. }
  4024. /* check if we need to switch packing state of this queue */
  4025. qeth_switch_to_packing_if_needed(queue);
  4026. if (queue->do_pack){
  4027. do_pack = 1;
  4028. if (ctx == NULL) {
  4029. /* does packet fit in current buffer? */
  4030. if((QETH_MAX_BUFFER_ELEMENTS(card) -
  4031. buffer->next_element_to_fill) < elements_needed){
  4032. /* ... no -> set state PRIMED */
  4033. atomic_set(&buffer->state,QETH_QDIO_BUF_PRIMED);
  4034. flush_count++;
  4035. queue->next_buf_to_fill =
  4036. (queue->next_buf_to_fill + 1) %
  4037. QDIO_MAX_BUFFERS_PER_Q;
  4038. buffer = &queue->bufs[queue->next_buf_to_fill];
  4039. /* we did a step forward, so check buffer state
  4040. * again */
  4041. if (atomic_read(&buffer->state) !=
  4042. QETH_QDIO_BUF_EMPTY){
  4043. qeth_flush_buffers(queue, 0, start_index, flush_count);
  4044. atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
  4045. return -EBUSY;
  4046. }
  4047. }
  4048. } else {
  4049. /* check if we have enough elements (including following
  4050. * free buffers) to handle eddp context */
  4051. if (qeth_eddp_check_buffers_for_context(queue,ctx) < 0){
  4052. printk("eddp tx_dropped 1\n");
  4053. rc = -EBUSY;
  4054. goto out;
  4055. }
  4056. }
  4057. }
  4058. if (ctx == NULL)
  4059. tmp = qeth_fill_buffer(queue, buffer, skb);
  4060. else {
  4061. tmp = qeth_eddp_fill_buffer(queue,ctx,queue->next_buf_to_fill);
  4062. if (tmp < 0) {
  4063. printk("eddp tx_dropped 2\n");
  4064. rc = - EBUSY;
  4065. goto out;
  4066. }
  4067. }
  4068. queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
  4069. QDIO_MAX_BUFFERS_PER_Q;
  4070. flush_count += tmp;
  4071. out:
  4072. if (flush_count)
  4073. qeth_flush_buffers(queue, 0, start_index, flush_count);
  4074. else if (!atomic_read(&queue->set_pci_flags_count))
  4075. atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
  4076. /*
  4077. * queue->state will go from LOCKED -> UNLOCKED or from
  4078. * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
  4079. * (switch packing state or flush buffer to get another pci flag out).
  4080. * In that case we will enter this loop
  4081. */
  4082. while (atomic_dec_return(&queue->state)){
  4083. flush_count = 0;
  4084. start_index = queue->next_buf_to_fill;
  4085. /* check if we can go back to non-packing state */
  4086. flush_count += qeth_switch_to_nonpacking_if_needed(queue);
  4087. /*
  4088. * check if we need to flush a packing buffer to get a pci
  4089. * flag out on the queue
  4090. */
  4091. if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
  4092. flush_count += qeth_flush_buffers_on_no_pci(queue);
  4093. if (flush_count)
  4094. qeth_flush_buffers(queue, 0, start_index, flush_count);
  4095. }
  4096. /* at this point the queue is UNLOCKED again */
  4097. if (queue->card->options.performance_stats && do_pack)
  4098. queue->card->perf_stats.bufs_sent_pack += flush_count;
  4099. return rc;
  4100. }
  4101. static int
  4102. qeth_get_elements_no(struct qeth_card *card, void *hdr,
  4103. struct sk_buff *skb, int elems)
  4104. {
  4105. int elements_needed = 0;
  4106. if (skb_shinfo(skb)->nr_frags > 0)
  4107. elements_needed = (skb_shinfo(skb)->nr_frags + 1);
  4108. if (elements_needed == 0)
  4109. elements_needed = 1 + (((((unsigned long) hdr) % PAGE_SIZE)
  4110. + skb->len) >> PAGE_SHIFT);
  4111. if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)){
  4112. PRINT_ERR("Invalid size of IP packet "
  4113. "(Number=%d / Length=%d). Discarded.\n",
  4114. (elements_needed+elems), skb->len);
  4115. return 0;
  4116. }
  4117. return elements_needed;
  4118. }
  4119. static int
  4120. qeth_send_packet(struct qeth_card *card, struct sk_buff *skb)
  4121. {
  4122. int ipv = 0;
  4123. int cast_type;
  4124. struct qeth_qdio_out_q *queue;
  4125. struct qeth_hdr *hdr = NULL;
  4126. int elements_needed = 0;
  4127. enum qeth_large_send_types large_send = QETH_LARGE_SEND_NO;
  4128. struct qeth_eddp_context *ctx = NULL;
  4129. int tx_bytes = skb->len;
  4130. unsigned short nr_frags = skb_shinfo(skb)->nr_frags;
  4131. unsigned short tso_size = skb_shinfo(skb)->gso_size;
  4132. struct sk_buff *new_skb, *new_skb2;
  4133. int rc;
  4134. QETH_DBF_TEXT(trace, 6, "sendpkt");
  4135. new_skb = skb;
  4136. if ((card->info.type == QETH_CARD_TYPE_OSN) &&
  4137. (skb->protocol == htons(ETH_P_IPV6)))
  4138. return -EPERM;
  4139. cast_type = qeth_get_cast_type(card, skb);
  4140. if ((cast_type == RTN_BROADCAST) &&
  4141. (card->info.broadcast_capable == 0))
  4142. return -EPERM;
  4143. queue = card->qdio.out_qs
  4144. [qeth_get_priority_queue(card, skb, ipv, cast_type)];
  4145. if (!card->options.layer2) {
  4146. ipv = qeth_get_ip_version(skb);
  4147. if ((card->dev->hard_header == qeth_fake_header) && ipv) {
  4148. new_skb = qeth_pskb_unshare(skb, GFP_ATOMIC);
  4149. if (!new_skb)
  4150. return -ENOMEM;
  4151. if(card->dev->type == ARPHRD_IEEE802_TR){
  4152. skb_pull(new_skb, QETH_FAKE_LL_LEN_TR);
  4153. } else {
  4154. skb_pull(new_skb, QETH_FAKE_LL_LEN_ETH);
  4155. }
  4156. }
  4157. }
  4158. if (skb_is_gso(skb))
  4159. large_send = card->options.large_send;
  4160. /* check on OSN device*/
  4161. if (card->info.type == QETH_CARD_TYPE_OSN)
  4162. hdr = (struct qeth_hdr *)new_skb->data;
  4163. /*are we able to do TSO ? */
  4164. if ((large_send == QETH_LARGE_SEND_TSO) &&
  4165. (cast_type == RTN_UNSPEC)) {
  4166. rc = qeth_tso_prepare_packet(card, new_skb, ipv, cast_type);
  4167. if (rc) {
  4168. __qeth_free_new_skb(skb, new_skb);
  4169. return rc;
  4170. }
  4171. elements_needed++;
  4172. } else if (card->info.type != QETH_CARD_TYPE_OSN) {
  4173. new_skb2 = qeth_prepare_skb(card, new_skb, &hdr, ipv);
  4174. if (!new_skb2) {
  4175. __qeth_free_new_skb(skb, new_skb);
  4176. return -EINVAL;
  4177. }
  4178. if (new_skb != skb)
  4179. __qeth_free_new_skb(new_skb2, new_skb);
  4180. new_skb = new_skb2;
  4181. qeth_fill_header(card, hdr, new_skb, ipv, cast_type);
  4182. }
  4183. if (large_send == QETH_LARGE_SEND_EDDP) {
  4184. ctx = qeth_eddp_create_context(card, new_skb, hdr,
  4185. skb->sk->sk_protocol);
  4186. if (ctx == NULL) {
  4187. __qeth_free_new_skb(skb, new_skb);
  4188. PRINT_WARN("could not create eddp context\n");
  4189. return -EINVAL;
  4190. }
  4191. } else {
  4192. int elems = qeth_get_elements_no(card,(void*) hdr, new_skb,
  4193. elements_needed);
  4194. if (!elems) {
  4195. __qeth_free_new_skb(skb, new_skb);
  4196. return -EINVAL;
  4197. }
  4198. elements_needed += elems;
  4199. }
  4200. if (card->info.type != QETH_CARD_TYPE_IQD)
  4201. rc = qeth_do_send_packet(card, queue, new_skb, hdr,
  4202. elements_needed, ctx);
  4203. else
  4204. rc = qeth_do_send_packet_fast(card, queue, new_skb, hdr,
  4205. elements_needed, ctx);
  4206. if (!rc) {
  4207. card->stats.tx_packets++;
  4208. card->stats.tx_bytes += tx_bytes;
  4209. if (new_skb != skb)
  4210. dev_kfree_skb_any(skb);
  4211. if (card->options.performance_stats) {
  4212. if (tso_size &&
  4213. !(large_send == QETH_LARGE_SEND_NO)) {
  4214. card->perf_stats.large_send_bytes += tx_bytes;
  4215. card->perf_stats.large_send_cnt++;
  4216. }
  4217. if (nr_frags > 0) {
  4218. card->perf_stats.sg_skbs_sent++;
  4219. /* nr_frags + skb->data */
  4220. card->perf_stats.sg_frags_sent +=
  4221. nr_frags + 1;
  4222. }
  4223. }
  4224. } else {
  4225. card->stats.tx_dropped++;
  4226. __qeth_free_new_skb(skb, new_skb);
  4227. }
  4228. if (ctx != NULL) {
  4229. /* drop creator's reference */
  4230. qeth_eddp_put_context(ctx);
  4231. /* free skb; it's not referenced by a buffer */
  4232. if (!rc)
  4233. dev_kfree_skb_any(new_skb);
  4234. }
  4235. return rc;
  4236. }
  4237. static int
  4238. qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
  4239. {
  4240. struct qeth_card *card = (struct qeth_card *) dev->priv;
  4241. int rc = 0;
  4242. switch(regnum){
  4243. case MII_BMCR: /* Basic mode control register */
  4244. rc = BMCR_FULLDPLX;
  4245. if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH)&&
  4246. (card->info.link_type != QETH_LINK_TYPE_OSN) &&
  4247. (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
  4248. rc |= BMCR_SPEED100;
  4249. break;
  4250. case MII_BMSR: /* Basic mode status register */
  4251. rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
  4252. BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
  4253. BMSR_100BASE4;
  4254. break;
  4255. case MII_PHYSID1: /* PHYS ID 1 */
  4256. rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
  4257. dev->dev_addr[2];
  4258. rc = (rc >> 5) & 0xFFFF;
  4259. break;
  4260. case MII_PHYSID2: /* PHYS ID 2 */
  4261. rc = (dev->dev_addr[2] << 10) & 0xFFFF;
  4262. break;
  4263. case MII_ADVERTISE: /* Advertisement control reg */
  4264. rc = ADVERTISE_ALL;
  4265. break;
  4266. case MII_LPA: /* Link partner ability reg */
  4267. rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
  4268. LPA_100BASE4 | LPA_LPACK;
  4269. break;
  4270. case MII_EXPANSION: /* Expansion register */
  4271. break;
  4272. case MII_DCOUNTER: /* disconnect counter */
  4273. break;
  4274. case MII_FCSCOUNTER: /* false carrier counter */
  4275. break;
  4276. case MII_NWAYTEST: /* N-way auto-neg test register */
  4277. break;
  4278. case MII_RERRCOUNTER: /* rx error counter */
  4279. rc = card->stats.rx_errors;
  4280. break;
  4281. case MII_SREVISION: /* silicon revision */
  4282. break;
  4283. case MII_RESV1: /* reserved 1 */
  4284. break;
  4285. case MII_LBRERROR: /* loopback, rx, bypass error */
  4286. break;
  4287. case MII_PHYADDR: /* physical address */
  4288. break;
  4289. case MII_RESV2: /* reserved 2 */
  4290. break;
  4291. case MII_TPISTATUS: /* TPI status for 10mbps */
  4292. break;
  4293. case MII_NCONFIG: /* network interface config */
  4294. break;
  4295. default:
  4296. break;
  4297. }
  4298. return rc;
  4299. }
  4300. static const char *
  4301. qeth_arp_get_error_cause(int *rc)
  4302. {
  4303. switch (*rc) {
  4304. case QETH_IPA_ARP_RC_FAILED:
  4305. *rc = -EIO;
  4306. return "operation failed";
  4307. case QETH_IPA_ARP_RC_NOTSUPP:
  4308. *rc = -EOPNOTSUPP;
  4309. return "operation not supported";
  4310. case QETH_IPA_ARP_RC_OUT_OF_RANGE:
  4311. *rc = -EINVAL;
  4312. return "argument out of range";
  4313. case QETH_IPA_ARP_RC_Q_NOTSUPP:
  4314. *rc = -EOPNOTSUPP;
  4315. return "query operation not supported";
  4316. case QETH_IPA_ARP_RC_Q_NO_DATA:
  4317. *rc = -ENOENT;
  4318. return "no query data available";
  4319. default:
  4320. return "unknown error";
  4321. }
  4322. }
  4323. static int
  4324. qeth_send_simple_setassparms(struct qeth_card *, enum qeth_ipa_funcs,
  4325. __u16, long);
  4326. static int
  4327. qeth_arp_set_no_entries(struct qeth_card *card, int no_entries)
  4328. {
  4329. int tmp;
  4330. int rc;
  4331. QETH_DBF_TEXT(trace,3,"arpstnoe");
  4332. /*
  4333. * currently GuestLAN only supports the ARP assist function
  4334. * IPA_CMD_ASS_ARP_QUERY_INFO, but not IPA_CMD_ASS_ARP_SET_NO_ENTRIES;
  4335. * thus we say EOPNOTSUPP for this ARP function
  4336. */
  4337. if (card->info.guestlan)
  4338. return -EOPNOTSUPP;
  4339. if (!qeth_is_supported(card,IPA_ARP_PROCESSING)) {
  4340. PRINT_WARN("ARP processing not supported "
  4341. "on %s!\n", QETH_CARD_IFNAME(card));
  4342. return -EOPNOTSUPP;
  4343. }
  4344. rc = qeth_send_simple_setassparms(card, IPA_ARP_PROCESSING,
  4345. IPA_CMD_ASS_ARP_SET_NO_ENTRIES,
  4346. no_entries);
  4347. if (rc) {
  4348. tmp = rc;
  4349. PRINT_WARN("Could not set number of ARP entries on %s: "
  4350. "%s (0x%x/%d)\n",
  4351. QETH_CARD_IFNAME(card), qeth_arp_get_error_cause(&rc),
  4352. tmp, tmp);
  4353. }
  4354. return rc;
  4355. }
  4356. static void
  4357. qeth_copy_arp_entries_stripped(struct qeth_arp_query_info *qinfo,
  4358. struct qeth_arp_query_data *qdata,
  4359. int entry_size, int uentry_size)
  4360. {
  4361. char *entry_ptr;
  4362. char *uentry_ptr;
  4363. int i;
  4364. entry_ptr = (char *)&qdata->data;
  4365. uentry_ptr = (char *)(qinfo->udata + qinfo->udata_offset);
  4366. for (i = 0; i < qdata->no_entries; ++i){
  4367. /* strip off 32 bytes "media specific information" */
  4368. memcpy(uentry_ptr, (entry_ptr + 32), entry_size - 32);
  4369. entry_ptr += entry_size;
  4370. uentry_ptr += uentry_size;
  4371. }
  4372. }
  4373. static int
  4374. qeth_arp_query_cb(struct qeth_card *card, struct qeth_reply *reply,
  4375. unsigned long data)
  4376. {
  4377. struct qeth_ipa_cmd *cmd;
  4378. struct qeth_arp_query_data *qdata;
  4379. struct qeth_arp_query_info *qinfo;
  4380. int entry_size;
  4381. int uentry_size;
  4382. int i;
  4383. QETH_DBF_TEXT(trace,4,"arpquecb");
  4384. qinfo = (struct qeth_arp_query_info *) reply->param;
  4385. cmd = (struct qeth_ipa_cmd *) data;
  4386. if (cmd->hdr.return_code) {
  4387. QETH_DBF_TEXT_(trace,4,"qaer1%i", cmd->hdr.return_code);
  4388. return 0;
  4389. }
  4390. if (cmd->data.setassparms.hdr.return_code) {
  4391. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  4392. QETH_DBF_TEXT_(trace,4,"qaer2%i", cmd->hdr.return_code);
  4393. return 0;
  4394. }
  4395. qdata = &cmd->data.setassparms.data.query_arp;
  4396. switch(qdata->reply_bits){
  4397. case 5:
  4398. uentry_size = entry_size = sizeof(struct qeth_arp_qi_entry5);
  4399. if (qinfo->mask_bits & QETH_QARP_STRIP_ENTRIES)
  4400. uentry_size = sizeof(struct qeth_arp_qi_entry5_short);
  4401. break;
  4402. case 7:
  4403. /* fall through to default */
  4404. default:
  4405. /* tr is the same as eth -> entry7 */
  4406. uentry_size = entry_size = sizeof(struct qeth_arp_qi_entry7);
  4407. if (qinfo->mask_bits & QETH_QARP_STRIP_ENTRIES)
  4408. uentry_size = sizeof(struct qeth_arp_qi_entry7_short);
  4409. break;
  4410. }
  4411. /* check if there is enough room in userspace */
  4412. if ((qinfo->udata_len - qinfo->udata_offset) <
  4413. qdata->no_entries * uentry_size){
  4414. QETH_DBF_TEXT_(trace, 4, "qaer3%i", -ENOMEM);
  4415. cmd->hdr.return_code = -ENOMEM;
  4416. PRINT_WARN("query ARP user space buffer is too small for "
  4417. "the returned number of ARP entries. "
  4418. "Aborting query!\n");
  4419. goto out_error;
  4420. }
  4421. QETH_DBF_TEXT_(trace, 4, "anore%i",
  4422. cmd->data.setassparms.hdr.number_of_replies);
  4423. QETH_DBF_TEXT_(trace, 4, "aseqn%i", cmd->data.setassparms.hdr.seq_no);
  4424. QETH_DBF_TEXT_(trace, 4, "anoen%i", qdata->no_entries);
  4425. if (qinfo->mask_bits & QETH_QARP_STRIP_ENTRIES) {
  4426. /* strip off "media specific information" */
  4427. qeth_copy_arp_entries_stripped(qinfo, qdata, entry_size,
  4428. uentry_size);
  4429. } else
  4430. /*copy entries to user buffer*/
  4431. memcpy(qinfo->udata + qinfo->udata_offset,
  4432. (char *)&qdata->data, qdata->no_entries*uentry_size);
  4433. qinfo->no_entries += qdata->no_entries;
  4434. qinfo->udata_offset += (qdata->no_entries*uentry_size);
  4435. /* check if all replies received ... */
  4436. if (cmd->data.setassparms.hdr.seq_no <
  4437. cmd->data.setassparms.hdr.number_of_replies)
  4438. return 1;
  4439. memcpy(qinfo->udata, &qinfo->no_entries, 4);
  4440. /* keep STRIP_ENTRIES flag so the user program can distinguish
  4441. * stripped entries from normal ones */
  4442. if (qinfo->mask_bits & QETH_QARP_STRIP_ENTRIES)
  4443. qdata->reply_bits |= QETH_QARP_STRIP_ENTRIES;
  4444. memcpy(qinfo->udata + QETH_QARP_MASK_OFFSET,&qdata->reply_bits,2);
  4445. return 0;
  4446. out_error:
  4447. i = 0;
  4448. memcpy(qinfo->udata, &i, 4);
  4449. return 0;
  4450. }
  4451. static int
  4452. qeth_send_ipa_arp_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  4453. int len, int (*reply_cb)(struct qeth_card *,
  4454. struct qeth_reply *,
  4455. unsigned long),
  4456. void *reply_param)
  4457. {
  4458. QETH_DBF_TEXT(trace,4,"sendarp");
  4459. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  4460. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  4461. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  4462. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  4463. reply_cb, reply_param);
  4464. }
  4465. static int
  4466. qeth_send_ipa_snmp_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  4467. int len, int (*reply_cb)(struct qeth_card *,
  4468. struct qeth_reply *,
  4469. unsigned long),
  4470. void *reply_param)
  4471. {
  4472. u16 s1, s2;
  4473. QETH_DBF_TEXT(trace,4,"sendsnmp");
  4474. memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
  4475. memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
  4476. &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
  4477. /* adjust PDU length fields in IPA_PDU_HEADER */
  4478. s1 = (u32) IPA_PDU_HEADER_SIZE + len;
  4479. s2 = (u32) len;
  4480. memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
  4481. memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
  4482. memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
  4483. memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
  4484. return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
  4485. reply_cb, reply_param);
  4486. }
  4487. static struct qeth_cmd_buffer *
  4488. qeth_get_setassparms_cmd(struct qeth_card *, enum qeth_ipa_funcs,
  4489. __u16, __u16, enum qeth_prot_versions);
  4490. static int
  4491. qeth_arp_query(struct qeth_card *card, char __user *udata)
  4492. {
  4493. struct qeth_cmd_buffer *iob;
  4494. struct qeth_arp_query_info qinfo = {0, };
  4495. int tmp;
  4496. int rc;
  4497. QETH_DBF_TEXT(trace,3,"arpquery");
  4498. if (!qeth_is_supported(card,/*IPA_QUERY_ARP_ADDR_INFO*/
  4499. IPA_ARP_PROCESSING)) {
  4500. PRINT_WARN("ARP processing not supported "
  4501. "on %s!\n", QETH_CARD_IFNAME(card));
  4502. return -EOPNOTSUPP;
  4503. }
  4504. /* get size of userspace buffer and mask_bits -> 6 bytes */
  4505. if (copy_from_user(&qinfo, udata, 6))
  4506. return -EFAULT;
  4507. if (!(qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL)))
  4508. return -ENOMEM;
  4509. qinfo.udata_offset = QETH_QARP_ENTRIES_OFFSET;
  4510. iob = qeth_get_setassparms_cmd(card, IPA_ARP_PROCESSING,
  4511. IPA_CMD_ASS_ARP_QUERY_INFO,
  4512. sizeof(int),QETH_PROT_IPV4);
  4513. rc = qeth_send_ipa_arp_cmd(card, iob,
  4514. QETH_SETASS_BASE_LEN+QETH_ARP_CMD_LEN,
  4515. qeth_arp_query_cb, (void *)&qinfo);
  4516. if (rc) {
  4517. tmp = rc;
  4518. PRINT_WARN("Error while querying ARP cache on %s: %s "
  4519. "(0x%x/%d)\n",
  4520. QETH_CARD_IFNAME(card), qeth_arp_get_error_cause(&rc),
  4521. tmp, tmp);
  4522. if (copy_to_user(udata, qinfo.udata, 4))
  4523. rc = -EFAULT;
  4524. } else {
  4525. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4526. rc = -EFAULT;
  4527. }
  4528. kfree(qinfo.udata);
  4529. return rc;
  4530. }
  4531. /**
  4532. * SNMP command callback
  4533. */
  4534. static int
  4535. qeth_snmp_command_cb(struct qeth_card *card, struct qeth_reply *reply,
  4536. unsigned long sdata)
  4537. {
  4538. struct qeth_ipa_cmd *cmd;
  4539. struct qeth_arp_query_info *qinfo;
  4540. struct qeth_snmp_cmd *snmp;
  4541. unsigned char *data;
  4542. __u16 data_len;
  4543. QETH_DBF_TEXT(trace,3,"snpcmdcb");
  4544. cmd = (struct qeth_ipa_cmd *) sdata;
  4545. data = (unsigned char *)((char *)cmd - reply->offset);
  4546. qinfo = (struct qeth_arp_query_info *) reply->param;
  4547. snmp = &cmd->data.setadapterparms.data.snmp;
  4548. if (cmd->hdr.return_code) {
  4549. QETH_DBF_TEXT_(trace,4,"scer1%i", cmd->hdr.return_code);
  4550. return 0;
  4551. }
  4552. if (cmd->data.setadapterparms.hdr.return_code) {
  4553. cmd->hdr.return_code = cmd->data.setadapterparms.hdr.return_code;
  4554. QETH_DBF_TEXT_(trace,4,"scer2%i", cmd->hdr.return_code);
  4555. return 0;
  4556. }
  4557. data_len = *((__u16*)QETH_IPA_PDU_LEN_PDU1(data));
  4558. if (cmd->data.setadapterparms.hdr.seq_no == 1)
  4559. data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
  4560. else
  4561. data_len -= (__u16)((char*)&snmp->request - (char *)cmd);
  4562. /* check if there is enough room in userspace */
  4563. if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
  4564. QETH_DBF_TEXT_(trace, 4, "scer3%i", -ENOMEM);
  4565. cmd->hdr.return_code = -ENOMEM;
  4566. return 0;
  4567. }
  4568. QETH_DBF_TEXT_(trace, 4, "snore%i",
  4569. cmd->data.setadapterparms.hdr.used_total);
  4570. QETH_DBF_TEXT_(trace, 4, "sseqn%i", cmd->data.setadapterparms.hdr.seq_no);
  4571. /*copy entries to user buffer*/
  4572. if (cmd->data.setadapterparms.hdr.seq_no == 1) {
  4573. memcpy(qinfo->udata + qinfo->udata_offset,
  4574. (char *)snmp,
  4575. data_len + offsetof(struct qeth_snmp_cmd,data));
  4576. qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
  4577. } else {
  4578. memcpy(qinfo->udata + qinfo->udata_offset,
  4579. (char *)&snmp->request, data_len);
  4580. }
  4581. qinfo->udata_offset += data_len;
  4582. /* check if all replies received ... */
  4583. QETH_DBF_TEXT_(trace, 4, "srtot%i",
  4584. cmd->data.setadapterparms.hdr.used_total);
  4585. QETH_DBF_TEXT_(trace, 4, "srseq%i",
  4586. cmd->data.setadapterparms.hdr.seq_no);
  4587. if (cmd->data.setadapterparms.hdr.seq_no <
  4588. cmd->data.setadapterparms.hdr.used_total)
  4589. return 1;
  4590. return 0;
  4591. }
  4592. static struct qeth_cmd_buffer *
  4593. qeth_get_ipacmd_buffer(struct qeth_card *, enum qeth_ipa_cmds,
  4594. enum qeth_prot_versions );
  4595. static struct qeth_cmd_buffer *
  4596. qeth_get_adapter_cmd(struct qeth_card *card, __u32 command, __u32 cmdlen)
  4597. {
  4598. struct qeth_cmd_buffer *iob;
  4599. struct qeth_ipa_cmd *cmd;
  4600. iob = qeth_get_ipacmd_buffer(card,IPA_CMD_SETADAPTERPARMS,
  4601. QETH_PROT_IPV4);
  4602. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4603. cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
  4604. cmd->data.setadapterparms.hdr.command_code = command;
  4605. cmd->data.setadapterparms.hdr.used_total = 1;
  4606. cmd->data.setadapterparms.hdr.seq_no = 1;
  4607. return iob;
  4608. }
  4609. /**
  4610. * function to send SNMP commands to OSA-E card
  4611. */
  4612. static int
  4613. qeth_snmp_command(struct qeth_card *card, char __user *udata)
  4614. {
  4615. struct qeth_cmd_buffer *iob;
  4616. struct qeth_ipa_cmd *cmd;
  4617. struct qeth_snmp_ureq *ureq;
  4618. int req_len;
  4619. struct qeth_arp_query_info qinfo = {0, };
  4620. int rc = 0;
  4621. QETH_DBF_TEXT(trace,3,"snmpcmd");
  4622. if (card->info.guestlan)
  4623. return -EOPNOTSUPP;
  4624. if ((!qeth_adp_supported(card,IPA_SETADP_SET_SNMP_CONTROL)) &&
  4625. (!card->options.layer2) ) {
  4626. PRINT_WARN("SNMP Query MIBS not supported "
  4627. "on %s!\n", QETH_CARD_IFNAME(card));
  4628. return -EOPNOTSUPP;
  4629. }
  4630. /* skip 4 bytes (data_len struct member) to get req_len */
  4631. if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
  4632. return -EFAULT;
  4633. ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
  4634. if (!ureq) {
  4635. QETH_DBF_TEXT(trace, 2, "snmpnome");
  4636. return -ENOMEM;
  4637. }
  4638. if (copy_from_user(ureq, udata,
  4639. req_len+sizeof(struct qeth_snmp_ureq_hdr))){
  4640. kfree(ureq);
  4641. return -EFAULT;
  4642. }
  4643. qinfo.udata_len = ureq->hdr.data_len;
  4644. if (!(qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL))){
  4645. kfree(ureq);
  4646. return -ENOMEM;
  4647. }
  4648. qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
  4649. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
  4650. QETH_SNMP_SETADP_CMDLENGTH + req_len);
  4651. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  4652. memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
  4653. rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
  4654. qeth_snmp_command_cb, (void *)&qinfo);
  4655. if (rc)
  4656. PRINT_WARN("SNMP command failed on %s: (0x%x)\n",
  4657. QETH_CARD_IFNAME(card), rc);
  4658. else {
  4659. if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
  4660. rc = -EFAULT;
  4661. }
  4662. kfree(ureq);
  4663. kfree(qinfo.udata);
  4664. return rc;
  4665. }
  4666. static int
  4667. qeth_default_setassparms_cb(struct qeth_card *, struct qeth_reply *,
  4668. unsigned long);
  4669. static int
  4670. qeth_default_setadapterparms_cb(struct qeth_card *card,
  4671. struct qeth_reply *reply,
  4672. unsigned long data);
  4673. static int
  4674. qeth_send_setassparms(struct qeth_card *, struct qeth_cmd_buffer *,
  4675. __u16, long,
  4676. int (*reply_cb)
  4677. (struct qeth_card *, struct qeth_reply *, unsigned long),
  4678. void *reply_param);
  4679. static int
  4680. qeth_arp_add_entry(struct qeth_card *card, struct qeth_arp_cache_entry *entry)
  4681. {
  4682. struct qeth_cmd_buffer *iob;
  4683. char buf[16];
  4684. int tmp;
  4685. int rc;
  4686. QETH_DBF_TEXT(trace,3,"arpadent");
  4687. /*
  4688. * currently GuestLAN only supports the ARP assist function
  4689. * IPA_CMD_ASS_ARP_QUERY_INFO, but not IPA_CMD_ASS_ARP_ADD_ENTRY;
  4690. * thus we say EOPNOTSUPP for this ARP function
  4691. */
  4692. if (card->info.guestlan)
  4693. return -EOPNOTSUPP;
  4694. if (!qeth_is_supported(card,IPA_ARP_PROCESSING)) {
  4695. PRINT_WARN("ARP processing not supported "
  4696. "on %s!\n", QETH_CARD_IFNAME(card));
  4697. return -EOPNOTSUPP;
  4698. }
  4699. iob = qeth_get_setassparms_cmd(card, IPA_ARP_PROCESSING,
  4700. IPA_CMD_ASS_ARP_ADD_ENTRY,
  4701. sizeof(struct qeth_arp_cache_entry),
  4702. QETH_PROT_IPV4);
  4703. rc = qeth_send_setassparms(card, iob,
  4704. sizeof(struct qeth_arp_cache_entry),
  4705. (unsigned long) entry,
  4706. qeth_default_setassparms_cb, NULL);
  4707. if (rc) {
  4708. tmp = rc;
  4709. qeth_ipaddr4_to_string((u8 *)entry->ipaddr, buf);
  4710. PRINT_WARN("Could not add ARP entry for address %s on %s: "
  4711. "%s (0x%x/%d)\n",
  4712. buf, QETH_CARD_IFNAME(card),
  4713. qeth_arp_get_error_cause(&rc), tmp, tmp);
  4714. }
  4715. return rc;
  4716. }
  4717. static int
  4718. qeth_arp_remove_entry(struct qeth_card *card, struct qeth_arp_cache_entry *entry)
  4719. {
  4720. struct qeth_cmd_buffer *iob;
  4721. char buf[16] = {0, };
  4722. int tmp;
  4723. int rc;
  4724. QETH_DBF_TEXT(trace,3,"arprment");
  4725. /*
  4726. * currently GuestLAN only supports the ARP assist function
  4727. * IPA_CMD_ASS_ARP_QUERY_INFO, but not IPA_CMD_ASS_ARP_REMOVE_ENTRY;
  4728. * thus we say EOPNOTSUPP for this ARP function
  4729. */
  4730. if (card->info.guestlan)
  4731. return -EOPNOTSUPP;
  4732. if (!qeth_is_supported(card,IPA_ARP_PROCESSING)) {
  4733. PRINT_WARN("ARP processing not supported "
  4734. "on %s!\n", QETH_CARD_IFNAME(card));
  4735. return -EOPNOTSUPP;
  4736. }
  4737. memcpy(buf, entry, 12);
  4738. iob = qeth_get_setassparms_cmd(card, IPA_ARP_PROCESSING,
  4739. IPA_CMD_ASS_ARP_REMOVE_ENTRY,
  4740. 12,
  4741. QETH_PROT_IPV4);
  4742. rc = qeth_send_setassparms(card, iob,
  4743. 12, (unsigned long)buf,
  4744. qeth_default_setassparms_cb, NULL);
  4745. if (rc) {
  4746. tmp = rc;
  4747. memset(buf, 0, 16);
  4748. qeth_ipaddr4_to_string((u8 *)entry->ipaddr, buf);
  4749. PRINT_WARN("Could not delete ARP entry for address %s on %s: "
  4750. "%s (0x%x/%d)\n",
  4751. buf, QETH_CARD_IFNAME(card),
  4752. qeth_arp_get_error_cause(&rc), tmp, tmp);
  4753. }
  4754. return rc;
  4755. }
  4756. static int
  4757. qeth_arp_flush_cache(struct qeth_card *card)
  4758. {
  4759. int rc;
  4760. int tmp;
  4761. QETH_DBF_TEXT(trace,3,"arpflush");
  4762. /*
  4763. * currently GuestLAN only supports the ARP assist function
  4764. * IPA_CMD_ASS_ARP_QUERY_INFO, but not IPA_CMD_ASS_ARP_FLUSH_CACHE;
  4765. * thus we say EOPNOTSUPP for this ARP function
  4766. */
  4767. if (card->info.guestlan || (card->info.type == QETH_CARD_TYPE_IQD))
  4768. return -EOPNOTSUPP;
  4769. if (!qeth_is_supported(card,IPA_ARP_PROCESSING)) {
  4770. PRINT_WARN("ARP processing not supported "
  4771. "on %s!\n", QETH_CARD_IFNAME(card));
  4772. return -EOPNOTSUPP;
  4773. }
  4774. rc = qeth_send_simple_setassparms(card, IPA_ARP_PROCESSING,
  4775. IPA_CMD_ASS_ARP_FLUSH_CACHE, 0);
  4776. if (rc){
  4777. tmp = rc;
  4778. PRINT_WARN("Could not flush ARP cache on %s: %s (0x%x/%d)\n",
  4779. QETH_CARD_IFNAME(card), qeth_arp_get_error_cause(&rc),
  4780. tmp, tmp);
  4781. }
  4782. return rc;
  4783. }
  4784. static int
  4785. qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  4786. {
  4787. struct qeth_card *card = (struct qeth_card *)dev->priv;
  4788. struct qeth_arp_cache_entry arp_entry;
  4789. struct mii_ioctl_data *mii_data;
  4790. int rc = 0;
  4791. if (!card)
  4792. return -ENODEV;
  4793. if ((card->state != CARD_STATE_UP) &&
  4794. (card->state != CARD_STATE_SOFTSETUP))
  4795. return -ENODEV;
  4796. if (card->info.type == QETH_CARD_TYPE_OSN)
  4797. return -EPERM;
  4798. switch (cmd){
  4799. case SIOC_QETH_ARP_SET_NO_ENTRIES:
  4800. if ( !capable(CAP_NET_ADMIN) ||
  4801. (card->options.layer2) ) {
  4802. rc = -EPERM;
  4803. break;
  4804. }
  4805. rc = qeth_arp_set_no_entries(card, rq->ifr_ifru.ifru_ivalue);
  4806. break;
  4807. case SIOC_QETH_ARP_QUERY_INFO:
  4808. if ( !capable(CAP_NET_ADMIN) ||
  4809. (card->options.layer2) ) {
  4810. rc = -EPERM;
  4811. break;
  4812. }
  4813. rc = qeth_arp_query(card, rq->ifr_ifru.ifru_data);
  4814. break;
  4815. case SIOC_QETH_ARP_ADD_ENTRY:
  4816. if ( !capable(CAP_NET_ADMIN) ||
  4817. (card->options.layer2) ) {
  4818. rc = -EPERM;
  4819. break;
  4820. }
  4821. if (copy_from_user(&arp_entry, rq->ifr_ifru.ifru_data,
  4822. sizeof(struct qeth_arp_cache_entry)))
  4823. rc = -EFAULT;
  4824. else
  4825. rc = qeth_arp_add_entry(card, &arp_entry);
  4826. break;
  4827. case SIOC_QETH_ARP_REMOVE_ENTRY:
  4828. if ( !capable(CAP_NET_ADMIN) ||
  4829. (card->options.layer2) ) {
  4830. rc = -EPERM;
  4831. break;
  4832. }
  4833. if (copy_from_user(&arp_entry, rq->ifr_ifru.ifru_data,
  4834. sizeof(struct qeth_arp_cache_entry)))
  4835. rc = -EFAULT;
  4836. else
  4837. rc = qeth_arp_remove_entry(card, &arp_entry);
  4838. break;
  4839. case SIOC_QETH_ARP_FLUSH_CACHE:
  4840. if ( !capable(CAP_NET_ADMIN) ||
  4841. (card->options.layer2) ) {
  4842. rc = -EPERM;
  4843. break;
  4844. }
  4845. rc = qeth_arp_flush_cache(card);
  4846. break;
  4847. case SIOC_QETH_ADP_SET_SNMP_CONTROL:
  4848. rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data);
  4849. break;
  4850. case SIOC_QETH_GET_CARD_TYPE:
  4851. if ((card->info.type == QETH_CARD_TYPE_OSAE) &&
  4852. !card->info.guestlan)
  4853. return 1;
  4854. return 0;
  4855. break;
  4856. case SIOCGMIIPHY:
  4857. mii_data = if_mii(rq);
  4858. mii_data->phy_id = 0;
  4859. break;
  4860. case SIOCGMIIREG:
  4861. mii_data = if_mii(rq);
  4862. if (mii_data->phy_id != 0)
  4863. rc = -EINVAL;
  4864. else
  4865. mii_data->val_out = qeth_mdio_read(dev,mii_data->phy_id,
  4866. mii_data->reg_num);
  4867. break;
  4868. default:
  4869. rc = -EOPNOTSUPP;
  4870. }
  4871. if (rc)
  4872. QETH_DBF_TEXT_(trace, 2, "ioce%d", rc);
  4873. return rc;
  4874. }
  4875. static struct net_device_stats *
  4876. qeth_get_stats(struct net_device *dev)
  4877. {
  4878. struct qeth_card *card;
  4879. card = (struct qeth_card *) (dev->priv);
  4880. QETH_DBF_TEXT(trace,5,"getstat");
  4881. return &card->stats;
  4882. }
  4883. static int
  4884. qeth_change_mtu(struct net_device *dev, int new_mtu)
  4885. {
  4886. struct qeth_card *card;
  4887. char dbf_text[15];
  4888. card = (struct qeth_card *) (dev->priv);
  4889. QETH_DBF_TEXT(trace,4,"chgmtu");
  4890. sprintf(dbf_text, "%8x", new_mtu);
  4891. QETH_DBF_TEXT(trace,4,dbf_text);
  4892. if (new_mtu < 64)
  4893. return -EINVAL;
  4894. if (new_mtu > 65535)
  4895. return -EINVAL;
  4896. if ((!qeth_is_supported(card,IPA_IP_FRAGMENTATION)) &&
  4897. (!qeth_mtu_is_valid(card, new_mtu)))
  4898. return -EINVAL;
  4899. dev->mtu = new_mtu;
  4900. return 0;
  4901. }
  4902. #ifdef CONFIG_QETH_VLAN
  4903. static void
  4904. qeth_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
  4905. {
  4906. struct qeth_card *card;
  4907. unsigned long flags;
  4908. QETH_DBF_TEXT(trace,4,"vlanreg");
  4909. card = (struct qeth_card *) dev->priv;
  4910. spin_lock_irqsave(&card->vlanlock, flags);
  4911. card->vlangrp = grp;
  4912. spin_unlock_irqrestore(&card->vlanlock, flags);
  4913. }
  4914. static void
  4915. qeth_free_vlan_buffer(struct qeth_card *card, struct qeth_qdio_out_buffer *buf,
  4916. unsigned short vid)
  4917. {
  4918. int i;
  4919. struct sk_buff *skb;
  4920. struct sk_buff_head tmp_list;
  4921. skb_queue_head_init(&tmp_list);
  4922. lockdep_set_class(&tmp_list.lock, &qdio_out_skb_queue_key);
  4923. for(i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i){
  4924. while ((skb = skb_dequeue(&buf->skb_list))){
  4925. if (vlan_tx_tag_present(skb) &&
  4926. (vlan_tx_tag_get(skb) == vid)) {
  4927. atomic_dec(&skb->users);
  4928. dev_kfree_skb(skb);
  4929. } else
  4930. skb_queue_tail(&tmp_list, skb);
  4931. }
  4932. }
  4933. while ((skb = skb_dequeue(&tmp_list)))
  4934. skb_queue_tail(&buf->skb_list, skb);
  4935. }
  4936. static void
  4937. qeth_free_vlan_skbs(struct qeth_card *card, unsigned short vid)
  4938. {
  4939. int i, j;
  4940. QETH_DBF_TEXT(trace, 4, "frvlskbs");
  4941. for (i = 0; i < card->qdio.no_out_queues; ++i){
  4942. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
  4943. qeth_free_vlan_buffer(card, &card->qdio.
  4944. out_qs[i]->bufs[j], vid);
  4945. }
  4946. }
  4947. static void
  4948. qeth_free_vlan_addresses4(struct qeth_card *card, unsigned short vid)
  4949. {
  4950. struct in_device *in_dev;
  4951. struct in_ifaddr *ifa;
  4952. struct qeth_ipaddr *addr;
  4953. QETH_DBF_TEXT(trace, 4, "frvaddr4");
  4954. rcu_read_lock();
  4955. in_dev = __in_dev_get_rcu(vlan_group_get_device(card->vlangrp, vid));
  4956. if (!in_dev)
  4957. goto out;
  4958. for (ifa = in_dev->ifa_list; ifa; ifa = ifa->ifa_next) {
  4959. addr = qeth_get_addr_buffer(QETH_PROT_IPV4);
  4960. if (addr){
  4961. addr->u.a4.addr = ifa->ifa_address;
  4962. addr->u.a4.mask = ifa->ifa_mask;
  4963. addr->type = QETH_IP_TYPE_NORMAL;
  4964. if (!qeth_delete_ip(card, addr))
  4965. kfree(addr);
  4966. }
  4967. }
  4968. out:
  4969. rcu_read_unlock();
  4970. }
  4971. static void
  4972. qeth_free_vlan_addresses6(struct qeth_card *card, unsigned short vid)
  4973. {
  4974. #ifdef CONFIG_QETH_IPV6
  4975. struct inet6_dev *in6_dev;
  4976. struct inet6_ifaddr *ifa;
  4977. struct qeth_ipaddr *addr;
  4978. QETH_DBF_TEXT(trace, 4, "frvaddr6");
  4979. in6_dev = in6_dev_get(vlan_group_get_device(card->vlangrp, vid));
  4980. if (!in6_dev)
  4981. return;
  4982. for (ifa = in6_dev->addr_list; ifa; ifa = ifa->lst_next){
  4983. addr = qeth_get_addr_buffer(QETH_PROT_IPV6);
  4984. if (addr){
  4985. memcpy(&addr->u.a6.addr, &ifa->addr,
  4986. sizeof(struct in6_addr));
  4987. addr->u.a6.pfxlen = ifa->prefix_len;
  4988. addr->type = QETH_IP_TYPE_NORMAL;
  4989. if (!qeth_delete_ip(card, addr))
  4990. kfree(addr);
  4991. }
  4992. }
  4993. in6_dev_put(in6_dev);
  4994. #endif /* CONFIG_QETH_IPV6 */
  4995. }
  4996. static void
  4997. qeth_free_vlan_addresses(struct qeth_card *card, unsigned short vid)
  4998. {
  4999. if (card->options.layer2 || !card->vlangrp)
  5000. return;
  5001. qeth_free_vlan_addresses4(card, vid);
  5002. qeth_free_vlan_addresses6(card, vid);
  5003. }
  5004. static int
  5005. qeth_layer2_send_setdelvlan_cb(struct qeth_card *card,
  5006. struct qeth_reply *reply,
  5007. unsigned long data)
  5008. {
  5009. struct qeth_ipa_cmd *cmd;
  5010. QETH_DBF_TEXT(trace, 2, "L2sdvcb");
  5011. cmd = (struct qeth_ipa_cmd *) data;
  5012. if (cmd->hdr.return_code) {
  5013. PRINT_ERR("Error in processing VLAN %i on %s: 0x%x. "
  5014. "Continuing\n",cmd->data.setdelvlan.vlan_id,
  5015. QETH_CARD_IFNAME(card), cmd->hdr.return_code);
  5016. QETH_DBF_TEXT_(trace, 2, "L2VL%4x", cmd->hdr.command);
  5017. QETH_DBF_TEXT_(trace, 2, "L2%s", CARD_BUS_ID(card));
  5018. QETH_DBF_TEXT_(trace, 2, "err%d", cmd->hdr.return_code);
  5019. }
  5020. return 0;
  5021. }
  5022. static int
  5023. qeth_layer2_send_setdelvlan(struct qeth_card *card, __u16 i,
  5024. enum qeth_ipa_cmds ipacmd)
  5025. {
  5026. struct qeth_ipa_cmd *cmd;
  5027. struct qeth_cmd_buffer *iob;
  5028. QETH_DBF_TEXT_(trace, 4, "L2sdv%x",ipacmd);
  5029. iob = qeth_get_ipacmd_buffer(card, ipacmd, QETH_PROT_IPV4);
  5030. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  5031. cmd->data.setdelvlan.vlan_id = i;
  5032. return qeth_send_ipa_cmd(card, iob,
  5033. qeth_layer2_send_setdelvlan_cb, NULL);
  5034. }
  5035. static void
  5036. qeth_layer2_process_vlans(struct qeth_card *card, int clear)
  5037. {
  5038. unsigned short i;
  5039. QETH_DBF_TEXT(trace, 3, "L2prcvln");
  5040. if (!card->vlangrp)
  5041. return;
  5042. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  5043. if (vlan_group_get_device(card->vlangrp, i) == NULL)
  5044. continue;
  5045. if (clear)
  5046. qeth_layer2_send_setdelvlan(card, i, IPA_CMD_DELVLAN);
  5047. else
  5048. qeth_layer2_send_setdelvlan(card, i, IPA_CMD_SETVLAN);
  5049. }
  5050. }
  5051. /*add_vid is layer 2 used only ....*/
  5052. static void
  5053. qeth_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
  5054. {
  5055. struct qeth_card *card;
  5056. QETH_DBF_TEXT_(trace, 4, "aid:%d", vid);
  5057. card = (struct qeth_card *) dev->priv;
  5058. if (!card->options.layer2)
  5059. return;
  5060. qeth_layer2_send_setdelvlan(card, vid, IPA_CMD_SETVLAN);
  5061. }
  5062. /*... kill_vid used for both modes*/
  5063. static void
  5064. qeth_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
  5065. {
  5066. struct qeth_card *card;
  5067. unsigned long flags;
  5068. QETH_DBF_TEXT_(trace, 4, "kid:%d", vid);
  5069. card = (struct qeth_card *) dev->priv;
  5070. /* free all skbs for the vlan device */
  5071. qeth_free_vlan_skbs(card, vid);
  5072. spin_lock_irqsave(&card->vlanlock, flags);
  5073. /* unregister IP addresses of vlan device */
  5074. qeth_free_vlan_addresses(card, vid);
  5075. vlan_group_set_device(card->vlangrp, vid, NULL);
  5076. spin_unlock_irqrestore(&card->vlanlock, flags);
  5077. if (card->options.layer2)
  5078. qeth_layer2_send_setdelvlan(card, vid, IPA_CMD_DELVLAN);
  5079. qeth_set_multicast_list(card->dev);
  5080. }
  5081. #endif
  5082. /**
  5083. * Examine hardware response to SET_PROMISC_MODE
  5084. */
  5085. static int
  5086. qeth_setadp_promisc_mode_cb(struct qeth_card *card,
  5087. struct qeth_reply *reply,
  5088. unsigned long data)
  5089. {
  5090. struct qeth_ipa_cmd *cmd;
  5091. struct qeth_ipacmd_setadpparms *setparms;
  5092. QETH_DBF_TEXT(trace,4,"prmadpcb");
  5093. cmd = (struct qeth_ipa_cmd *) data;
  5094. setparms = &(cmd->data.setadapterparms);
  5095. qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  5096. if (cmd->hdr.return_code) {
  5097. QETH_DBF_TEXT_(trace,4,"prmrc%2.2x",cmd->hdr.return_code);
  5098. setparms->data.mode = SET_PROMISC_MODE_OFF;
  5099. }
  5100. card->info.promisc_mode = setparms->data.mode;
  5101. return 0;
  5102. }
  5103. /*
  5104. * Set promiscuous mode (on or off) (SET_PROMISC_MODE command)
  5105. */
  5106. static void
  5107. qeth_setadp_promisc_mode(struct qeth_card *card)
  5108. {
  5109. enum qeth_ipa_promisc_modes mode;
  5110. struct net_device *dev = card->dev;
  5111. struct qeth_cmd_buffer *iob;
  5112. struct qeth_ipa_cmd *cmd;
  5113. QETH_DBF_TEXT(trace, 4, "setprom");
  5114. if (((dev->flags & IFF_PROMISC) &&
  5115. (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
  5116. (!(dev->flags & IFF_PROMISC) &&
  5117. (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
  5118. return;
  5119. mode = SET_PROMISC_MODE_OFF;
  5120. if (dev->flags & IFF_PROMISC)
  5121. mode = SET_PROMISC_MODE_ON;
  5122. QETH_DBF_TEXT_(trace, 4, "mode:%x", mode);
  5123. iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
  5124. sizeof(struct qeth_ipacmd_setadpparms));
  5125. cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
  5126. cmd->data.setadapterparms.data.mode = mode;
  5127. qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
  5128. }
  5129. /**
  5130. * set multicast address on card
  5131. */
  5132. static void
  5133. qeth_set_multicast_list(struct net_device *dev)
  5134. {
  5135. struct qeth_card *card = (struct qeth_card *) dev->priv;
  5136. if (card->info.type == QETH_CARD_TYPE_OSN)
  5137. return ;
  5138. QETH_DBF_TEXT(trace, 3, "setmulti");
  5139. qeth_delete_mc_addresses(card);
  5140. if (card->options.layer2) {
  5141. qeth_layer2_add_multicast(card);
  5142. goto out;
  5143. }
  5144. qeth_add_multicast_ipv4(card);
  5145. #ifdef CONFIG_QETH_IPV6
  5146. qeth_add_multicast_ipv6(card);
  5147. #endif
  5148. out:
  5149. qeth_set_ip_addr_list(card);
  5150. if (!qeth_adp_supported(card, IPA_SETADP_SET_PROMISC_MODE))
  5151. return;
  5152. qeth_setadp_promisc_mode(card);
  5153. }
  5154. static int
  5155. qeth_neigh_setup(struct net_device *dev, struct neigh_parms *np)
  5156. {
  5157. return 0;
  5158. }
  5159. static void
  5160. qeth_get_mac_for_ipm(__u32 ipm, char *mac, struct net_device *dev)
  5161. {
  5162. if (dev->type == ARPHRD_IEEE802_TR)
  5163. ip_tr_mc_map(ipm, mac);
  5164. else
  5165. ip_eth_mc_map(ipm, mac);
  5166. }
  5167. static struct qeth_ipaddr *
  5168. qeth_get_addr_buffer(enum qeth_prot_versions prot)
  5169. {
  5170. struct qeth_ipaddr *addr;
  5171. addr = kzalloc(sizeof(struct qeth_ipaddr), GFP_ATOMIC);
  5172. if (addr == NULL) {
  5173. PRINT_WARN("Not enough memory to add address\n");
  5174. return NULL;
  5175. }
  5176. addr->type = QETH_IP_TYPE_NORMAL;
  5177. addr->proto = prot;
  5178. return addr;
  5179. }
  5180. int
  5181. qeth_osn_assist(struct net_device *dev,
  5182. void *data,
  5183. int data_len)
  5184. {
  5185. struct qeth_cmd_buffer *iob;
  5186. struct qeth_card *card;
  5187. int rc;
  5188. QETH_DBF_TEXT(trace, 2, "osnsdmc");
  5189. if (!dev)
  5190. return -ENODEV;
  5191. card = (struct qeth_card *)dev->priv;
  5192. if (!card)
  5193. return -ENODEV;
  5194. if ((card->state != CARD_STATE_UP) &&
  5195. (card->state != CARD_STATE_SOFTSETUP))
  5196. return -ENODEV;
  5197. iob = qeth_wait_for_buffer(&card->write);
  5198. memcpy(iob->data+IPA_PDU_HEADER_SIZE, data, data_len);
  5199. rc = qeth_osn_send_ipa_cmd(card, iob, data_len);
  5200. return rc;
  5201. }
  5202. static struct net_device *
  5203. qeth_netdev_by_devno(unsigned char *read_dev_no)
  5204. {
  5205. struct qeth_card *card;
  5206. struct net_device *ndev;
  5207. unsigned char *readno;
  5208. __u16 temp_dev_no, card_dev_no;
  5209. char *endp;
  5210. unsigned long flags;
  5211. ndev = NULL;
  5212. memcpy(&temp_dev_no, read_dev_no, 2);
  5213. read_lock_irqsave(&qeth_card_list.rwlock, flags);
  5214. list_for_each_entry(card, &qeth_card_list.list, list) {
  5215. readno = CARD_RDEV_ID(card);
  5216. readno += (strlen(readno) - 4);
  5217. card_dev_no = simple_strtoul(readno, &endp, 16);
  5218. if (card_dev_no == temp_dev_no) {
  5219. ndev = card->dev;
  5220. break;
  5221. }
  5222. }
  5223. read_unlock_irqrestore(&qeth_card_list.rwlock, flags);
  5224. return ndev;
  5225. }
  5226. int
  5227. qeth_osn_register(unsigned char *read_dev_no,
  5228. struct net_device **dev,
  5229. int (*assist_cb)(struct net_device *, void *),
  5230. int (*data_cb)(struct sk_buff *))
  5231. {
  5232. struct qeth_card * card;
  5233. QETH_DBF_TEXT(trace, 2, "osnreg");
  5234. *dev = qeth_netdev_by_devno(read_dev_no);
  5235. if (*dev == NULL)
  5236. return -ENODEV;
  5237. card = (struct qeth_card *)(*dev)->priv;
  5238. if (!card)
  5239. return -ENODEV;
  5240. if ((assist_cb == NULL) || (data_cb == NULL))
  5241. return -EINVAL;
  5242. card->osn_info.assist_cb = assist_cb;
  5243. card->osn_info.data_cb = data_cb;
  5244. return 0;
  5245. }
  5246. void
  5247. qeth_osn_deregister(struct net_device * dev)
  5248. {
  5249. struct qeth_card *card;
  5250. QETH_DBF_TEXT(trace, 2, "osndereg");
  5251. if (!dev)
  5252. return;
  5253. card = (struct qeth_card *)dev->priv;
  5254. if (!card)
  5255. return;
  5256. card->osn_info.assist_cb = NULL;
  5257. card->osn_info.data_cb = NULL;
  5258. return;
  5259. }
  5260. static void
  5261. qeth_delete_mc_addresses(struct qeth_card *card)
  5262. {
  5263. struct qeth_ipaddr *iptodo;
  5264. unsigned long flags;
  5265. QETH_DBF_TEXT(trace,4,"delmc");
  5266. iptodo = qeth_get_addr_buffer(QETH_PROT_IPV4);
  5267. if (!iptodo) {
  5268. QETH_DBF_TEXT(trace, 2, "dmcnomem");
  5269. return;
  5270. }
  5271. iptodo->type = QETH_IP_TYPE_DEL_ALL_MC;
  5272. spin_lock_irqsave(&card->ip_lock, flags);
  5273. if (!__qeth_insert_ip_todo(card, iptodo, 0))
  5274. kfree(iptodo);
  5275. spin_unlock_irqrestore(&card->ip_lock, flags);
  5276. }
  5277. static void
  5278. qeth_add_mc(struct qeth_card *card, struct in_device *in4_dev)
  5279. {
  5280. struct qeth_ipaddr *ipm;
  5281. struct ip_mc_list *im4;
  5282. char buf[MAX_ADDR_LEN];
  5283. QETH_DBF_TEXT(trace,4,"addmc");
  5284. for (im4 = in4_dev->mc_list; im4; im4 = im4->next) {
  5285. qeth_get_mac_for_ipm(im4->multiaddr, buf, in4_dev->dev);
  5286. ipm = qeth_get_addr_buffer(QETH_PROT_IPV4);
  5287. if (!ipm)
  5288. continue;
  5289. ipm->u.a4.addr = im4->multiaddr;
  5290. memcpy(ipm->mac,buf,OSA_ADDR_LEN);
  5291. ipm->is_multicast = 1;
  5292. if (!qeth_add_ip(card,ipm))
  5293. kfree(ipm);
  5294. }
  5295. }
  5296. static inline void
  5297. qeth_add_vlan_mc(struct qeth_card *card)
  5298. {
  5299. #ifdef CONFIG_QETH_VLAN
  5300. struct in_device *in_dev;
  5301. struct vlan_group *vg;
  5302. int i;
  5303. QETH_DBF_TEXT(trace,4,"addmcvl");
  5304. if ( ((card->options.layer2 == 0) &&
  5305. (!qeth_is_supported(card,IPA_FULL_VLAN))) ||
  5306. (card->vlangrp == NULL) )
  5307. return ;
  5308. vg = card->vlangrp;
  5309. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  5310. struct net_device *netdev = vlan_group_get_device(vg, i);
  5311. if (netdev == NULL ||
  5312. !(netdev->flags & IFF_UP))
  5313. continue;
  5314. in_dev = in_dev_get(netdev);
  5315. if (!in_dev)
  5316. continue;
  5317. read_lock(&in_dev->mc_list_lock);
  5318. qeth_add_mc(card,in_dev);
  5319. read_unlock(&in_dev->mc_list_lock);
  5320. in_dev_put(in_dev);
  5321. }
  5322. #endif
  5323. }
  5324. static void
  5325. qeth_add_multicast_ipv4(struct qeth_card *card)
  5326. {
  5327. struct in_device *in4_dev;
  5328. QETH_DBF_TEXT(trace,4,"chkmcv4");
  5329. in4_dev = in_dev_get(card->dev);
  5330. if (in4_dev == NULL)
  5331. return;
  5332. read_lock(&in4_dev->mc_list_lock);
  5333. qeth_add_mc(card, in4_dev);
  5334. qeth_add_vlan_mc(card);
  5335. read_unlock(&in4_dev->mc_list_lock);
  5336. in_dev_put(in4_dev);
  5337. }
  5338. static void
  5339. qeth_layer2_add_multicast(struct qeth_card *card)
  5340. {
  5341. struct qeth_ipaddr *ipm;
  5342. struct dev_mc_list *dm;
  5343. QETH_DBF_TEXT(trace,4,"L2addmc");
  5344. for (dm = card->dev->mc_list; dm; dm = dm->next) {
  5345. ipm = qeth_get_addr_buffer(QETH_PROT_IPV4);
  5346. if (!ipm)
  5347. continue;
  5348. memcpy(ipm->mac,dm->dmi_addr,MAX_ADDR_LEN);
  5349. ipm->is_multicast = 1;
  5350. if (!qeth_add_ip(card, ipm))
  5351. kfree(ipm);
  5352. }
  5353. }
  5354. #ifdef CONFIG_QETH_IPV6
  5355. static void
  5356. qeth_add_mc6(struct qeth_card *card, struct inet6_dev *in6_dev)
  5357. {
  5358. struct qeth_ipaddr *ipm;
  5359. struct ifmcaddr6 *im6;
  5360. char buf[MAX_ADDR_LEN];
  5361. QETH_DBF_TEXT(trace,4,"addmc6");
  5362. for (im6 = in6_dev->mc_list; im6 != NULL; im6 = im6->next) {
  5363. ndisc_mc_map(&im6->mca_addr, buf, in6_dev->dev, 0);
  5364. ipm = qeth_get_addr_buffer(QETH_PROT_IPV6);
  5365. if (!ipm)
  5366. continue;
  5367. ipm->is_multicast = 1;
  5368. memcpy(ipm->mac,buf,OSA_ADDR_LEN);
  5369. memcpy(&ipm->u.a6.addr,&im6->mca_addr.s6_addr,
  5370. sizeof(struct in6_addr));
  5371. if (!qeth_add_ip(card,ipm))
  5372. kfree(ipm);
  5373. }
  5374. }
  5375. static inline void
  5376. qeth_add_vlan_mc6(struct qeth_card *card)
  5377. {
  5378. #ifdef CONFIG_QETH_VLAN
  5379. struct inet6_dev *in_dev;
  5380. struct vlan_group *vg;
  5381. int i;
  5382. QETH_DBF_TEXT(trace,4,"admc6vl");
  5383. if ( ((card->options.layer2 == 0) &&
  5384. (!qeth_is_supported(card,IPA_FULL_VLAN))) ||
  5385. (card->vlangrp == NULL))
  5386. return ;
  5387. vg = card->vlangrp;
  5388. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  5389. struct net_device *netdev = vlan_group_get_device(vg, i);
  5390. if (netdev == NULL ||
  5391. !(netdev->flags & IFF_UP))
  5392. continue;
  5393. in_dev = in6_dev_get(netdev);
  5394. if (!in_dev)
  5395. continue;
  5396. read_lock_bh(&in_dev->lock);
  5397. qeth_add_mc6(card,in_dev);
  5398. read_unlock_bh(&in_dev->lock);
  5399. in6_dev_put(in_dev);
  5400. }
  5401. #endif /* CONFIG_QETH_VLAN */
  5402. }
  5403. static void
  5404. qeth_add_multicast_ipv6(struct qeth_card *card)
  5405. {
  5406. struct inet6_dev *in6_dev;
  5407. QETH_DBF_TEXT(trace,4,"chkmcv6");
  5408. if (!qeth_is_supported(card, IPA_IPV6))
  5409. return ;
  5410. in6_dev = in6_dev_get(card->dev);
  5411. if (in6_dev == NULL)
  5412. return;
  5413. read_lock_bh(&in6_dev->lock);
  5414. qeth_add_mc6(card, in6_dev);
  5415. qeth_add_vlan_mc6(card);
  5416. read_unlock_bh(&in6_dev->lock);
  5417. in6_dev_put(in6_dev);
  5418. }
  5419. #endif /* CONFIG_QETH_IPV6 */
  5420. static int
  5421. qeth_layer2_send_setdelmac(struct qeth_card *card, __u8 *mac,
  5422. enum qeth_ipa_cmds ipacmd,
  5423. int (*reply_cb) (struct qeth_card *,
  5424. struct qeth_reply*,
  5425. unsigned long))
  5426. {
  5427. struct qeth_ipa_cmd *cmd;
  5428. struct qeth_cmd_buffer *iob;
  5429. QETH_DBF_TEXT(trace, 2, "L2sdmac");
  5430. iob = qeth_get_ipacmd_buffer(card, ipacmd, QETH_PROT_IPV4);
  5431. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  5432. cmd->data.setdelmac.mac_length = OSA_ADDR_LEN;
  5433. memcpy(&cmd->data.setdelmac.mac, mac, OSA_ADDR_LEN);
  5434. return qeth_send_ipa_cmd(card, iob, reply_cb, NULL);
  5435. }
  5436. static int
  5437. qeth_layer2_send_setgroupmac_cb(struct qeth_card *card,
  5438. struct qeth_reply *reply,
  5439. unsigned long data)
  5440. {
  5441. struct qeth_ipa_cmd *cmd;
  5442. __u8 *mac;
  5443. QETH_DBF_TEXT(trace, 2, "L2Sgmacb");
  5444. cmd = (struct qeth_ipa_cmd *) data;
  5445. mac = &cmd->data.setdelmac.mac[0];
  5446. /* MAC already registered, needed in couple/uncouple case */
  5447. if (cmd->hdr.return_code == 0x2005) {
  5448. PRINT_WARN("Group MAC %02x:%02x:%02x:%02x:%02x:%02x " \
  5449. "already existing on %s \n",
  5450. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
  5451. QETH_CARD_IFNAME(card));
  5452. cmd->hdr.return_code = 0;
  5453. }
  5454. if (cmd->hdr.return_code)
  5455. PRINT_ERR("Could not set group MAC " \
  5456. "%02x:%02x:%02x:%02x:%02x:%02x on %s: %x\n",
  5457. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
  5458. QETH_CARD_IFNAME(card),cmd->hdr.return_code);
  5459. return 0;
  5460. }
  5461. static int
  5462. qeth_layer2_send_setgroupmac(struct qeth_card *card, __u8 *mac)
  5463. {
  5464. QETH_DBF_TEXT(trace, 2, "L2Sgmac");
  5465. return qeth_layer2_send_setdelmac(card, mac, IPA_CMD_SETGMAC,
  5466. qeth_layer2_send_setgroupmac_cb);
  5467. }
  5468. static int
  5469. qeth_layer2_send_delgroupmac_cb(struct qeth_card *card,
  5470. struct qeth_reply *reply,
  5471. unsigned long data)
  5472. {
  5473. struct qeth_ipa_cmd *cmd;
  5474. __u8 *mac;
  5475. QETH_DBF_TEXT(trace, 2, "L2Dgmacb");
  5476. cmd = (struct qeth_ipa_cmd *) data;
  5477. mac = &cmd->data.setdelmac.mac[0];
  5478. if (cmd->hdr.return_code)
  5479. PRINT_ERR("Could not delete group MAC " \
  5480. "%02x:%02x:%02x:%02x:%02x:%02x on %s: %x\n",
  5481. mac[0], mac[1], mac[2], mac[3], mac[4], mac[5],
  5482. QETH_CARD_IFNAME(card), cmd->hdr.return_code);
  5483. return 0;
  5484. }
  5485. static int
  5486. qeth_layer2_send_delgroupmac(struct qeth_card *card, __u8 *mac)
  5487. {
  5488. QETH_DBF_TEXT(trace, 2, "L2Dgmac");
  5489. return qeth_layer2_send_setdelmac(card, mac, IPA_CMD_DELGMAC,
  5490. qeth_layer2_send_delgroupmac_cb);
  5491. }
  5492. static int
  5493. qeth_layer2_send_setmac_cb(struct qeth_card *card,
  5494. struct qeth_reply *reply,
  5495. unsigned long data)
  5496. {
  5497. struct qeth_ipa_cmd *cmd;
  5498. QETH_DBF_TEXT(trace, 2, "L2Smaccb");
  5499. cmd = (struct qeth_ipa_cmd *) data;
  5500. if (cmd->hdr.return_code) {
  5501. QETH_DBF_TEXT_(trace, 2, "L2er%x", cmd->hdr.return_code);
  5502. card->info.mac_bits &= ~QETH_LAYER2_MAC_REGISTERED;
  5503. cmd->hdr.return_code = -EIO;
  5504. } else {
  5505. card->info.mac_bits |= QETH_LAYER2_MAC_REGISTERED;
  5506. memcpy(card->dev->dev_addr,cmd->data.setdelmac.mac,
  5507. OSA_ADDR_LEN);
  5508. PRINT_INFO("MAC address %2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x "
  5509. "successfully registered on device %s\n",
  5510. card->dev->dev_addr[0], card->dev->dev_addr[1],
  5511. card->dev->dev_addr[2], card->dev->dev_addr[3],
  5512. card->dev->dev_addr[4], card->dev->dev_addr[5],
  5513. card->dev->name);
  5514. }
  5515. return 0;
  5516. }
  5517. static int
  5518. qeth_layer2_send_setmac(struct qeth_card *card, __u8 *mac)
  5519. {
  5520. QETH_DBF_TEXT(trace, 2, "L2Setmac");
  5521. return qeth_layer2_send_setdelmac(card, mac, IPA_CMD_SETVMAC,
  5522. qeth_layer2_send_setmac_cb);
  5523. }
  5524. static int
  5525. qeth_layer2_send_delmac_cb(struct qeth_card *card,
  5526. struct qeth_reply *reply,
  5527. unsigned long data)
  5528. {
  5529. struct qeth_ipa_cmd *cmd;
  5530. QETH_DBF_TEXT(trace, 2, "L2Dmaccb");
  5531. cmd = (struct qeth_ipa_cmd *) data;
  5532. if (cmd->hdr.return_code) {
  5533. QETH_DBF_TEXT_(trace, 2, "err%d", cmd->hdr.return_code);
  5534. cmd->hdr.return_code = -EIO;
  5535. return 0;
  5536. }
  5537. card->info.mac_bits &= ~QETH_LAYER2_MAC_REGISTERED;
  5538. return 0;
  5539. }
  5540. static int
  5541. qeth_layer2_send_delmac(struct qeth_card *card, __u8 *mac)
  5542. {
  5543. QETH_DBF_TEXT(trace, 2, "L2Delmac");
  5544. if (!(card->info.mac_bits & QETH_LAYER2_MAC_REGISTERED))
  5545. return 0;
  5546. return qeth_layer2_send_setdelmac(card, mac, IPA_CMD_DELVMAC,
  5547. qeth_layer2_send_delmac_cb);
  5548. }
  5549. static int
  5550. qeth_layer2_set_mac_address(struct net_device *dev, void *p)
  5551. {
  5552. struct sockaddr *addr = p;
  5553. struct qeth_card *card;
  5554. int rc = 0;
  5555. QETH_DBF_TEXT(trace, 3, "setmac");
  5556. if (qeth_verify_dev(dev) != QETH_REAL_CARD) {
  5557. QETH_DBF_TEXT(trace, 3, "setmcINV");
  5558. return -EOPNOTSUPP;
  5559. }
  5560. card = (struct qeth_card *) dev->priv;
  5561. if (!card->options.layer2) {
  5562. PRINT_WARN("Setting MAC address on %s is not supported "
  5563. "in Layer 3 mode.\n", dev->name);
  5564. QETH_DBF_TEXT(trace, 3, "setmcLY3");
  5565. return -EOPNOTSUPP;
  5566. }
  5567. if (card->info.type == QETH_CARD_TYPE_OSN) {
  5568. PRINT_WARN("Setting MAC address on %s is not supported.\n",
  5569. dev->name);
  5570. QETH_DBF_TEXT(trace, 3, "setmcOSN");
  5571. return -EOPNOTSUPP;
  5572. }
  5573. QETH_DBF_TEXT_(trace, 3, "%s", CARD_BUS_ID(card));
  5574. QETH_DBF_HEX(trace, 3, addr->sa_data, OSA_ADDR_LEN);
  5575. rc = qeth_layer2_send_delmac(card, &card->dev->dev_addr[0]);
  5576. if (!rc)
  5577. rc = qeth_layer2_send_setmac(card, addr->sa_data);
  5578. return rc;
  5579. }
  5580. static void
  5581. qeth_fill_ipacmd_header(struct qeth_card *card, struct qeth_ipa_cmd *cmd,
  5582. __u8 command, enum qeth_prot_versions prot)
  5583. {
  5584. memset(cmd, 0, sizeof (struct qeth_ipa_cmd));
  5585. cmd->hdr.command = command;
  5586. cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
  5587. cmd->hdr.seqno = card->seqno.ipa;
  5588. cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
  5589. cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
  5590. if (card->options.layer2)
  5591. cmd->hdr.prim_version_no = 2;
  5592. else
  5593. cmd->hdr.prim_version_no = 1;
  5594. cmd->hdr.param_count = 1;
  5595. cmd->hdr.prot_version = prot;
  5596. cmd->hdr.ipa_supported = 0;
  5597. cmd->hdr.ipa_enabled = 0;
  5598. }
  5599. static struct qeth_cmd_buffer *
  5600. qeth_get_ipacmd_buffer(struct qeth_card *card, enum qeth_ipa_cmds ipacmd,
  5601. enum qeth_prot_versions prot)
  5602. {
  5603. struct qeth_cmd_buffer *iob;
  5604. struct qeth_ipa_cmd *cmd;
  5605. iob = qeth_wait_for_buffer(&card->write);
  5606. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  5607. qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
  5608. return iob;
  5609. }
  5610. static int
  5611. qeth_send_setdelmc(struct qeth_card *card, struct qeth_ipaddr *addr, int ipacmd)
  5612. {
  5613. int rc;
  5614. struct qeth_cmd_buffer *iob;
  5615. struct qeth_ipa_cmd *cmd;
  5616. QETH_DBF_TEXT(trace,4,"setdelmc");
  5617. iob = qeth_get_ipacmd_buffer(card, ipacmd, addr->proto);
  5618. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  5619. memcpy(&cmd->data.setdelipm.mac,addr->mac, OSA_ADDR_LEN);
  5620. if (addr->proto == QETH_PROT_IPV6)
  5621. memcpy(cmd->data.setdelipm.ip6, &addr->u.a6.addr,
  5622. sizeof(struct in6_addr));
  5623. else
  5624. memcpy(&cmd->data.setdelipm.ip4, &addr->u.a4.addr,4);
  5625. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  5626. return rc;
  5627. }
  5628. static void
  5629. qeth_fill_netmask(u8 *netmask, unsigned int len)
  5630. {
  5631. int i,j;
  5632. for (i=0;i<16;i++) {
  5633. j=(len)-(i*8);
  5634. if (j >= 8)
  5635. netmask[i] = 0xff;
  5636. else if (j > 0)
  5637. netmask[i] = (u8)(0xFF00>>j);
  5638. else
  5639. netmask[i] = 0;
  5640. }
  5641. }
  5642. static int
  5643. qeth_send_setdelip(struct qeth_card *card, struct qeth_ipaddr *addr,
  5644. int ipacmd, unsigned int flags)
  5645. {
  5646. int rc;
  5647. struct qeth_cmd_buffer *iob;
  5648. struct qeth_ipa_cmd *cmd;
  5649. __u8 netmask[16];
  5650. QETH_DBF_TEXT(trace,4,"setdelip");
  5651. QETH_DBF_TEXT_(trace,4,"flags%02X", flags);
  5652. iob = qeth_get_ipacmd_buffer(card, ipacmd, addr->proto);
  5653. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  5654. if (addr->proto == QETH_PROT_IPV6) {
  5655. memcpy(cmd->data.setdelip6.ip_addr, &addr->u.a6.addr,
  5656. sizeof(struct in6_addr));
  5657. qeth_fill_netmask(netmask,addr->u.a6.pfxlen);
  5658. memcpy(cmd->data.setdelip6.mask, netmask,
  5659. sizeof(struct in6_addr));
  5660. cmd->data.setdelip6.flags = flags;
  5661. } else {
  5662. memcpy(cmd->data.setdelip4.ip_addr, &addr->u.a4.addr, 4);
  5663. memcpy(cmd->data.setdelip4.mask, &addr->u.a4.mask, 4);
  5664. cmd->data.setdelip4.flags = flags;
  5665. }
  5666. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  5667. return rc;
  5668. }
  5669. static int
  5670. qeth_layer2_register_addr_entry(struct qeth_card *card,
  5671. struct qeth_ipaddr *addr)
  5672. {
  5673. if (!addr->is_multicast)
  5674. return 0;
  5675. QETH_DBF_TEXT(trace, 2, "setgmac");
  5676. QETH_DBF_HEX(trace,3,&addr->mac[0],OSA_ADDR_LEN);
  5677. return qeth_layer2_send_setgroupmac(card, &addr->mac[0]);
  5678. }
  5679. static int
  5680. qeth_layer2_deregister_addr_entry(struct qeth_card *card,
  5681. struct qeth_ipaddr *addr)
  5682. {
  5683. if (!addr->is_multicast)
  5684. return 0;
  5685. QETH_DBF_TEXT(trace, 2, "delgmac");
  5686. QETH_DBF_HEX(trace,3,&addr->mac[0],OSA_ADDR_LEN);
  5687. return qeth_layer2_send_delgroupmac(card, &addr->mac[0]);
  5688. }
  5689. static int
  5690. qeth_layer3_register_addr_entry(struct qeth_card *card,
  5691. struct qeth_ipaddr *addr)
  5692. {
  5693. char buf[50];
  5694. int rc;
  5695. int cnt = 3;
  5696. if (addr->proto == QETH_PROT_IPV4) {
  5697. QETH_DBF_TEXT(trace, 2,"setaddr4");
  5698. QETH_DBF_HEX(trace, 3, &addr->u.a4.addr, sizeof(int));
  5699. } else if (addr->proto == QETH_PROT_IPV6) {
  5700. QETH_DBF_TEXT(trace, 2, "setaddr6");
  5701. QETH_DBF_HEX(trace,3,&addr->u.a6.addr,8);
  5702. QETH_DBF_HEX(trace,3,((char *)&addr->u.a6.addr)+8,8);
  5703. } else {
  5704. QETH_DBF_TEXT(trace, 2, "setaddr?");
  5705. QETH_DBF_HEX(trace, 3, addr, sizeof(struct qeth_ipaddr));
  5706. }
  5707. do {
  5708. if (addr->is_multicast)
  5709. rc = qeth_send_setdelmc(card, addr, IPA_CMD_SETIPM);
  5710. else
  5711. rc = qeth_send_setdelip(card, addr, IPA_CMD_SETIP,
  5712. addr->set_flags);
  5713. if (rc)
  5714. QETH_DBF_TEXT(trace, 2, "failed");
  5715. } while ((--cnt > 0) && rc);
  5716. if (rc){
  5717. QETH_DBF_TEXT(trace, 2, "FAILED");
  5718. qeth_ipaddr_to_string(addr->proto, (u8 *)&addr->u, buf);
  5719. PRINT_WARN("Could not register IP address %s (rc=0x%x/%d)\n",
  5720. buf, rc, rc);
  5721. }
  5722. return rc;
  5723. }
  5724. static int
  5725. qeth_layer3_deregister_addr_entry(struct qeth_card *card,
  5726. struct qeth_ipaddr *addr)
  5727. {
  5728. //char buf[50];
  5729. int rc;
  5730. if (addr->proto == QETH_PROT_IPV4) {
  5731. QETH_DBF_TEXT(trace, 2,"deladdr4");
  5732. QETH_DBF_HEX(trace, 3, &addr->u.a4.addr, sizeof(int));
  5733. } else if (addr->proto == QETH_PROT_IPV6) {
  5734. QETH_DBF_TEXT(trace, 2, "deladdr6");
  5735. QETH_DBF_HEX(trace,3,&addr->u.a6.addr,8);
  5736. QETH_DBF_HEX(trace,3,((char *)&addr->u.a6.addr)+8,8);
  5737. } else {
  5738. QETH_DBF_TEXT(trace, 2, "deladdr?");
  5739. QETH_DBF_HEX(trace, 3, addr, sizeof(struct qeth_ipaddr));
  5740. }
  5741. if (addr->is_multicast)
  5742. rc = qeth_send_setdelmc(card, addr, IPA_CMD_DELIPM);
  5743. else
  5744. rc = qeth_send_setdelip(card, addr, IPA_CMD_DELIP,
  5745. addr->del_flags);
  5746. if (rc) {
  5747. QETH_DBF_TEXT(trace, 2, "failed");
  5748. /* TODO: re-activate this warning as soon as we have a
  5749. * clean mirco code
  5750. qeth_ipaddr_to_string(addr->proto, (u8 *)&addr->u, buf);
  5751. PRINT_WARN("Could not deregister IP address %s (rc=%x)\n",
  5752. buf, rc);
  5753. */
  5754. }
  5755. return rc;
  5756. }
  5757. static int
  5758. qeth_register_addr_entry(struct qeth_card *card, struct qeth_ipaddr *addr)
  5759. {
  5760. if (card->options.layer2)
  5761. return qeth_layer2_register_addr_entry(card, addr);
  5762. return qeth_layer3_register_addr_entry(card, addr);
  5763. }
  5764. static int
  5765. qeth_deregister_addr_entry(struct qeth_card *card, struct qeth_ipaddr *addr)
  5766. {
  5767. if (card->options.layer2)
  5768. return qeth_layer2_deregister_addr_entry(card, addr);
  5769. return qeth_layer3_deregister_addr_entry(card, addr);
  5770. }
  5771. static u32
  5772. qeth_ethtool_get_tx_csum(struct net_device *dev)
  5773. {
  5774. /* We may need to say that we support tx csum offload if
  5775. * we do EDDP or TSO. There are discussions going on to
  5776. * enforce rules in the stack and in ethtool that make
  5777. * SG and TSO depend on HW_CSUM. At the moment there are
  5778. * no such rules....
  5779. * If we say yes here, we have to checksum outbound packets
  5780. * any time. */
  5781. return 0;
  5782. }
  5783. static int
  5784. qeth_ethtool_set_tx_csum(struct net_device *dev, u32 data)
  5785. {
  5786. return -EINVAL;
  5787. }
  5788. static u32
  5789. qeth_ethtool_get_rx_csum(struct net_device *dev)
  5790. {
  5791. struct qeth_card *card = (struct qeth_card *)dev->priv;
  5792. return (card->options.checksum_type == HW_CHECKSUMMING);
  5793. }
  5794. static int
  5795. qeth_ethtool_set_rx_csum(struct net_device *dev, u32 data)
  5796. {
  5797. struct qeth_card *card = (struct qeth_card *)dev->priv;
  5798. if ((card->state != CARD_STATE_DOWN) &&
  5799. (card->state != CARD_STATE_RECOVER))
  5800. return -EPERM;
  5801. if (data)
  5802. card->options.checksum_type = HW_CHECKSUMMING;
  5803. else
  5804. card->options.checksum_type = SW_CHECKSUMMING;
  5805. return 0;
  5806. }
  5807. static u32
  5808. qeth_ethtool_get_sg(struct net_device *dev)
  5809. {
  5810. struct qeth_card *card = (struct qeth_card *)dev->priv;
  5811. return ((card->options.large_send != QETH_LARGE_SEND_NO) &&
  5812. (dev->features & NETIF_F_SG));
  5813. }
  5814. static int
  5815. qeth_ethtool_set_sg(struct net_device *dev, u32 data)
  5816. {
  5817. struct qeth_card *card = (struct qeth_card *)dev->priv;
  5818. if (data) {
  5819. if (card->options.large_send != QETH_LARGE_SEND_NO)
  5820. dev->features |= NETIF_F_SG;
  5821. else {
  5822. dev->features &= ~NETIF_F_SG;
  5823. return -EINVAL;
  5824. }
  5825. } else
  5826. dev->features &= ~NETIF_F_SG;
  5827. return 0;
  5828. }
  5829. static u32
  5830. qeth_ethtool_get_tso(struct net_device *dev)
  5831. {
  5832. struct qeth_card *card = (struct qeth_card *)dev->priv;
  5833. return ((card->options.large_send != QETH_LARGE_SEND_NO) &&
  5834. (dev->features & NETIF_F_TSO));
  5835. }
  5836. static int
  5837. qeth_ethtool_set_tso(struct net_device *dev, u32 data)
  5838. {
  5839. struct qeth_card *card = (struct qeth_card *)dev->priv;
  5840. if (data) {
  5841. if (card->options.large_send != QETH_LARGE_SEND_NO)
  5842. dev->features |= NETIF_F_TSO;
  5843. else {
  5844. dev->features &= ~NETIF_F_TSO;
  5845. return -EINVAL;
  5846. }
  5847. } else
  5848. dev->features &= ~NETIF_F_TSO;
  5849. return 0;
  5850. }
  5851. static struct ethtool_ops qeth_ethtool_ops = {
  5852. .get_tx_csum = qeth_ethtool_get_tx_csum,
  5853. .set_tx_csum = qeth_ethtool_set_tx_csum,
  5854. .get_rx_csum = qeth_ethtool_get_rx_csum,
  5855. .set_rx_csum = qeth_ethtool_set_rx_csum,
  5856. .get_sg = qeth_ethtool_get_sg,
  5857. .set_sg = qeth_ethtool_set_sg,
  5858. .get_tso = qeth_ethtool_get_tso,
  5859. .set_tso = qeth_ethtool_set_tso,
  5860. };
  5861. static int
  5862. qeth_hard_header_parse(struct sk_buff *skb, unsigned char *haddr)
  5863. {
  5864. struct qeth_card *card;
  5865. struct ethhdr *eth;
  5866. card = qeth_get_card_from_dev(skb->dev);
  5867. if (card->options.layer2)
  5868. goto haveheader;
  5869. #ifdef CONFIG_QETH_IPV6
  5870. /* cause of the manipulated arp constructor and the ARP
  5871. flag for OSAE devices we have some nasty exceptions */
  5872. if (card->info.type == QETH_CARD_TYPE_OSAE) {
  5873. if (!card->options.fake_ll) {
  5874. if ((skb->pkt_type==PACKET_OUTGOING) &&
  5875. (skb->protocol==ETH_P_IPV6))
  5876. goto haveheader;
  5877. else
  5878. return 0;
  5879. } else {
  5880. if ((skb->pkt_type==PACKET_OUTGOING) &&
  5881. (skb->protocol==ETH_P_IP))
  5882. return 0;
  5883. else
  5884. goto haveheader;
  5885. }
  5886. }
  5887. #endif
  5888. if (!card->options.fake_ll)
  5889. return 0;
  5890. haveheader:
  5891. eth = eth_hdr(skb);
  5892. memcpy(haddr, eth->h_source, ETH_ALEN);
  5893. return ETH_ALEN;
  5894. }
  5895. static int
  5896. qeth_netdev_init(struct net_device *dev)
  5897. {
  5898. struct qeth_card *card;
  5899. card = (struct qeth_card *) dev->priv;
  5900. QETH_DBF_TEXT(trace,3,"initdev");
  5901. dev->tx_timeout = &qeth_tx_timeout;
  5902. dev->watchdog_timeo = QETH_TX_TIMEOUT;
  5903. dev->open = qeth_open;
  5904. dev->stop = qeth_stop;
  5905. dev->hard_start_xmit = qeth_hard_start_xmit;
  5906. dev->do_ioctl = qeth_do_ioctl;
  5907. dev->get_stats = qeth_get_stats;
  5908. dev->change_mtu = qeth_change_mtu;
  5909. dev->neigh_setup = qeth_neigh_setup;
  5910. dev->set_multicast_list = qeth_set_multicast_list;
  5911. #ifdef CONFIG_QETH_VLAN
  5912. dev->vlan_rx_register = qeth_vlan_rx_register;
  5913. dev->vlan_rx_kill_vid = qeth_vlan_rx_kill_vid;
  5914. dev->vlan_rx_add_vid = qeth_vlan_rx_add_vid;
  5915. #endif
  5916. if (qeth_get_netdev_flags(card) & IFF_NOARP) {
  5917. dev->rebuild_header = NULL;
  5918. dev->hard_header = NULL;
  5919. dev->header_cache_update = NULL;
  5920. dev->hard_header_cache = NULL;
  5921. }
  5922. #ifdef CONFIG_QETH_IPV6
  5923. /*IPv6 address autoconfiguration stuff*/
  5924. if (!(card->info.unique_id & UNIQUE_ID_NOT_BY_CARD))
  5925. card->dev->dev_id = card->info.unique_id & 0xffff;
  5926. #endif
  5927. if (card->options.fake_ll &&
  5928. (qeth_get_netdev_flags(card) & IFF_NOARP))
  5929. dev->hard_header = qeth_fake_header;
  5930. if (dev->type == ARPHRD_IEEE802_TR)
  5931. dev->hard_header_parse = NULL;
  5932. else
  5933. dev->hard_header_parse = qeth_hard_header_parse;
  5934. dev->set_mac_address = qeth_layer2_set_mac_address;
  5935. dev->flags |= qeth_get_netdev_flags(card);
  5936. if ((card->options.fake_broadcast) ||
  5937. (card->info.broadcast_capable))
  5938. dev->flags |= IFF_BROADCAST;
  5939. dev->hard_header_len =
  5940. qeth_get_hlen(card->info.link_type) + card->options.add_hhlen;
  5941. dev->addr_len = OSA_ADDR_LEN;
  5942. dev->mtu = card->info.initial_mtu;
  5943. if (card->info.type != QETH_CARD_TYPE_OSN)
  5944. SET_ETHTOOL_OPS(dev, &qeth_ethtool_ops);
  5945. SET_MODULE_OWNER(dev);
  5946. return 0;
  5947. }
  5948. static void
  5949. qeth_init_func_level(struct qeth_card *card)
  5950. {
  5951. if (card->ipato.enabled) {
  5952. if (card->info.type == QETH_CARD_TYPE_IQD)
  5953. card->info.func_level =
  5954. QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
  5955. else
  5956. card->info.func_level =
  5957. QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
  5958. } else {
  5959. if (card->info.type == QETH_CARD_TYPE_IQD)
  5960. /*FIXME:why do we have same values for dis and ena for osae??? */
  5961. card->info.func_level =
  5962. QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
  5963. else
  5964. card->info.func_level =
  5965. QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
  5966. }
  5967. }
  5968. /**
  5969. * hardsetup card, initialize MPC and QDIO stuff
  5970. */
  5971. static int
  5972. qeth_hardsetup_card(struct qeth_card *card)
  5973. {
  5974. int retries = 3;
  5975. int rc;
  5976. QETH_DBF_TEXT(setup, 2, "hrdsetup");
  5977. atomic_set(&card->force_alloc_skb, 0);
  5978. retry:
  5979. if (retries < 3){
  5980. PRINT_WARN("Retrying to do IDX activates.\n");
  5981. ccw_device_set_offline(CARD_DDEV(card));
  5982. ccw_device_set_offline(CARD_WDEV(card));
  5983. ccw_device_set_offline(CARD_RDEV(card));
  5984. ccw_device_set_online(CARD_RDEV(card));
  5985. ccw_device_set_online(CARD_WDEV(card));
  5986. ccw_device_set_online(CARD_DDEV(card));
  5987. }
  5988. rc = qeth_qdio_clear_card(card,card->info.type!=QETH_CARD_TYPE_IQD);
  5989. if (rc == -ERESTARTSYS) {
  5990. QETH_DBF_TEXT(setup, 2, "break1");
  5991. return rc;
  5992. } else if (rc) {
  5993. QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
  5994. if (--retries < 0)
  5995. goto out;
  5996. else
  5997. goto retry;
  5998. }
  5999. if ((rc = qeth_get_unitaddr(card))){
  6000. QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
  6001. return rc;
  6002. }
  6003. qeth_init_tokens(card);
  6004. qeth_init_func_level(card);
  6005. rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
  6006. if (rc == -ERESTARTSYS) {
  6007. QETH_DBF_TEXT(setup, 2, "break2");
  6008. return rc;
  6009. } else if (rc) {
  6010. QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
  6011. if (--retries < 0)
  6012. goto out;
  6013. else
  6014. goto retry;
  6015. }
  6016. rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
  6017. if (rc == -ERESTARTSYS) {
  6018. QETH_DBF_TEXT(setup, 2, "break3");
  6019. return rc;
  6020. } else if (rc) {
  6021. QETH_DBF_TEXT_(setup, 2, "4err%d", rc);
  6022. if (--retries < 0)
  6023. goto out;
  6024. else
  6025. goto retry;
  6026. }
  6027. if ((rc = qeth_mpc_initialize(card))){
  6028. QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
  6029. goto out;
  6030. }
  6031. /*network device will be recovered*/
  6032. if (card->dev) {
  6033. card->dev->hard_header = card->orig_hard_header;
  6034. if (card->options.fake_ll &&
  6035. (qeth_get_netdev_flags(card) & IFF_NOARP))
  6036. card->dev->hard_header = qeth_fake_header;
  6037. return 0;
  6038. }
  6039. /* at first set_online allocate netdev */
  6040. card->dev = qeth_get_netdevice(card->info.type,
  6041. card->info.link_type);
  6042. if (!card->dev){
  6043. qeth_qdio_clear_card(card, card->info.type !=
  6044. QETH_CARD_TYPE_IQD);
  6045. rc = -ENODEV;
  6046. QETH_DBF_TEXT_(setup, 2, "6err%d", rc);
  6047. goto out;
  6048. }
  6049. card->dev->priv = card;
  6050. card->orig_hard_header = card->dev->hard_header;
  6051. card->dev->type = qeth_get_arphdr_type(card->info.type,
  6052. card->info.link_type);
  6053. card->dev->init = qeth_netdev_init;
  6054. return 0;
  6055. out:
  6056. PRINT_ERR("Initialization in hardsetup failed! rc=%d\n", rc);
  6057. return rc;
  6058. }
  6059. static int
  6060. qeth_default_setassparms_cb(struct qeth_card *card, struct qeth_reply *reply,
  6061. unsigned long data)
  6062. {
  6063. struct qeth_ipa_cmd *cmd;
  6064. QETH_DBF_TEXT(trace,4,"defadpcb");
  6065. cmd = (struct qeth_ipa_cmd *) data;
  6066. if (cmd->hdr.return_code == 0){
  6067. cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code;
  6068. if (cmd->hdr.prot_version == QETH_PROT_IPV4)
  6069. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  6070. #ifdef CONFIG_QETH_IPV6
  6071. if (cmd->hdr.prot_version == QETH_PROT_IPV6)
  6072. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  6073. #endif
  6074. }
  6075. if (cmd->data.setassparms.hdr.assist_no == IPA_INBOUND_CHECKSUM &&
  6076. cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) {
  6077. card->info.csum_mask = cmd->data.setassparms.data.flags_32bit;
  6078. QETH_DBF_TEXT_(trace, 3, "csum:%d", card->info.csum_mask);
  6079. }
  6080. return 0;
  6081. }
  6082. static int
  6083. qeth_default_setadapterparms_cb(struct qeth_card *card,
  6084. struct qeth_reply *reply,
  6085. unsigned long data)
  6086. {
  6087. struct qeth_ipa_cmd *cmd;
  6088. QETH_DBF_TEXT(trace,4,"defadpcb");
  6089. cmd = (struct qeth_ipa_cmd *) data;
  6090. if (cmd->hdr.return_code == 0)
  6091. cmd->hdr.return_code = cmd->data.setadapterparms.hdr.return_code;
  6092. return 0;
  6093. }
  6094. static int
  6095. qeth_query_setadapterparms_cb(struct qeth_card *card, struct qeth_reply *reply,
  6096. unsigned long data)
  6097. {
  6098. struct qeth_ipa_cmd *cmd;
  6099. QETH_DBF_TEXT(trace,3,"quyadpcb");
  6100. cmd = (struct qeth_ipa_cmd *) data;
  6101. if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
  6102. card->info.link_type =
  6103. cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
  6104. card->options.adp.supported_funcs =
  6105. cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
  6106. return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
  6107. }
  6108. static int
  6109. qeth_query_setadapterparms(struct qeth_card *card)
  6110. {
  6111. int rc;
  6112. struct qeth_cmd_buffer *iob;
  6113. QETH_DBF_TEXT(trace,3,"queryadp");
  6114. iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
  6115. sizeof(struct qeth_ipacmd_setadpparms));
  6116. rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
  6117. return rc;
  6118. }
  6119. static int
  6120. qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
  6121. struct qeth_reply *reply,
  6122. unsigned long data)
  6123. {
  6124. struct qeth_ipa_cmd *cmd;
  6125. QETH_DBF_TEXT(trace,4,"chgmaccb");
  6126. cmd = (struct qeth_ipa_cmd *) data;
  6127. if (!card->options.layer2 ||
  6128. !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
  6129. memcpy(card->dev->dev_addr,
  6130. &cmd->data.setadapterparms.data.change_addr.addr,
  6131. OSA_ADDR_LEN);
  6132. card->info.mac_bits |= QETH_LAYER2_MAC_READ;
  6133. }
  6134. qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
  6135. return 0;
  6136. }
  6137. static int
  6138. qeth_setadpparms_change_macaddr(struct qeth_card *card)
  6139. {
  6140. int rc;
  6141. struct qeth_cmd_buffer *iob;
  6142. struct qeth_ipa_cmd *cmd;
  6143. QETH_DBF_TEXT(trace,4,"chgmac");
  6144. iob = qeth_get_adapter_cmd(card,IPA_SETADP_ALTER_MAC_ADDRESS,
  6145. sizeof(struct qeth_ipacmd_setadpparms));
  6146. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  6147. cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
  6148. cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
  6149. memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
  6150. card->dev->dev_addr, OSA_ADDR_LEN);
  6151. rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
  6152. NULL);
  6153. return rc;
  6154. }
  6155. static int
  6156. qeth_send_setadp_mode(struct qeth_card *card, __u32 command, __u32 mode)
  6157. {
  6158. int rc;
  6159. struct qeth_cmd_buffer *iob;
  6160. struct qeth_ipa_cmd *cmd;
  6161. QETH_DBF_TEXT(trace,4,"adpmode");
  6162. iob = qeth_get_adapter_cmd(card, command,
  6163. sizeof(struct qeth_ipacmd_setadpparms));
  6164. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  6165. cmd->data.setadapterparms.data.mode = mode;
  6166. rc = qeth_send_ipa_cmd(card, iob, qeth_default_setadapterparms_cb,
  6167. NULL);
  6168. return rc;
  6169. }
  6170. static int
  6171. qeth_setadapter_hstr(struct qeth_card *card)
  6172. {
  6173. int rc;
  6174. QETH_DBF_TEXT(trace,4,"adphstr");
  6175. if (qeth_adp_supported(card,IPA_SETADP_SET_BROADCAST_MODE)) {
  6176. rc = qeth_send_setadp_mode(card, IPA_SETADP_SET_BROADCAST_MODE,
  6177. card->options.broadcast_mode);
  6178. if (rc)
  6179. PRINT_WARN("couldn't set broadcast mode on "
  6180. "device %s: x%x\n",
  6181. CARD_BUS_ID(card), rc);
  6182. rc = qeth_send_setadp_mode(card, IPA_SETADP_ALTER_MAC_ADDRESS,
  6183. card->options.macaddr_mode);
  6184. if (rc)
  6185. PRINT_WARN("couldn't set macaddr mode on "
  6186. "device %s: x%x\n", CARD_BUS_ID(card), rc);
  6187. return rc;
  6188. }
  6189. if (card->options.broadcast_mode == QETH_TR_BROADCAST_LOCAL)
  6190. PRINT_WARN("set adapter parameters not available "
  6191. "to set broadcast mode, using ALLRINGS "
  6192. "on device %s:\n", CARD_BUS_ID(card));
  6193. if (card->options.macaddr_mode == QETH_TR_MACADDR_CANONICAL)
  6194. PRINT_WARN("set adapter parameters not available "
  6195. "to set macaddr mode, using NONCANONICAL "
  6196. "on device %s:\n", CARD_BUS_ID(card));
  6197. return 0;
  6198. }
  6199. static int
  6200. qeth_setadapter_parms(struct qeth_card *card)
  6201. {
  6202. int rc;
  6203. QETH_DBF_TEXT(setup, 2, "setadprm");
  6204. if (!qeth_is_supported(card, IPA_SETADAPTERPARMS)){
  6205. PRINT_WARN("set adapter parameters not supported "
  6206. "on device %s.\n",
  6207. CARD_BUS_ID(card));
  6208. QETH_DBF_TEXT(setup, 2, " notsupp");
  6209. return 0;
  6210. }
  6211. rc = qeth_query_setadapterparms(card);
  6212. if (rc) {
  6213. PRINT_WARN("couldn't set adapter parameters on device %s: "
  6214. "x%x\n", CARD_BUS_ID(card), rc);
  6215. return rc;
  6216. }
  6217. if (qeth_adp_supported(card,IPA_SETADP_ALTER_MAC_ADDRESS)) {
  6218. rc = qeth_setadpparms_change_macaddr(card);
  6219. if (rc)
  6220. PRINT_WARN("couldn't get MAC address on "
  6221. "device %s: x%x\n",
  6222. CARD_BUS_ID(card), rc);
  6223. }
  6224. if ((card->info.link_type == QETH_LINK_TYPE_HSTR) ||
  6225. (card->info.link_type == QETH_LINK_TYPE_LANE_TR))
  6226. rc = qeth_setadapter_hstr(card);
  6227. return rc;
  6228. }
  6229. static int
  6230. qeth_layer2_initialize(struct qeth_card *card)
  6231. {
  6232. int rc = 0;
  6233. QETH_DBF_TEXT(setup, 2, "doL2init");
  6234. QETH_DBF_TEXT_(setup, 2, "doL2%s", CARD_BUS_ID(card));
  6235. rc = qeth_query_setadapterparms(card);
  6236. if (rc) {
  6237. PRINT_WARN("could not query adapter parameters on device %s: "
  6238. "x%x\n", CARD_BUS_ID(card), rc);
  6239. }
  6240. rc = qeth_setadpparms_change_macaddr(card);
  6241. if (rc) {
  6242. PRINT_WARN("couldn't get MAC address on "
  6243. "device %s: x%x\n",
  6244. CARD_BUS_ID(card), rc);
  6245. QETH_DBF_TEXT_(setup, 2,"1err%d",rc);
  6246. return rc;
  6247. }
  6248. QETH_DBF_HEX(setup,2, card->dev->dev_addr, OSA_ADDR_LEN);
  6249. rc = qeth_layer2_send_setmac(card, &card->dev->dev_addr[0]);
  6250. if (rc)
  6251. QETH_DBF_TEXT_(setup, 2,"2err%d",rc);
  6252. return 0;
  6253. }
  6254. static int
  6255. qeth_send_startstoplan(struct qeth_card *card, enum qeth_ipa_cmds ipacmd,
  6256. enum qeth_prot_versions prot)
  6257. {
  6258. int rc;
  6259. struct qeth_cmd_buffer *iob;
  6260. iob = qeth_get_ipacmd_buffer(card,ipacmd,prot);
  6261. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  6262. return rc;
  6263. }
  6264. static int
  6265. qeth_send_startlan(struct qeth_card *card, enum qeth_prot_versions prot)
  6266. {
  6267. int rc;
  6268. QETH_DBF_TEXT_(setup, 2, "strtlan%i", prot);
  6269. rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, prot);
  6270. return rc;
  6271. }
  6272. static int
  6273. qeth_send_stoplan(struct qeth_card *card)
  6274. {
  6275. int rc = 0;
  6276. /*
  6277. * TODO: according to the IPA format document page 14,
  6278. * TCP/IP (we!) never issue a STOPLAN
  6279. * is this right ?!?
  6280. */
  6281. QETH_DBF_TEXT(trace, 2, "stoplan");
  6282. rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, QETH_PROT_IPV4);
  6283. return rc;
  6284. }
  6285. static int
  6286. qeth_query_ipassists_cb(struct qeth_card *card, struct qeth_reply *reply,
  6287. unsigned long data)
  6288. {
  6289. struct qeth_ipa_cmd *cmd;
  6290. QETH_DBF_TEXT(setup, 2, "qipasscb");
  6291. cmd = (struct qeth_ipa_cmd *) data;
  6292. if (cmd->hdr.prot_version == QETH_PROT_IPV4) {
  6293. card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported;
  6294. card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled;
  6295. /* Disable IPV6 support hard coded for Hipersockets */
  6296. if(card->info.type == QETH_CARD_TYPE_IQD)
  6297. card->options.ipa4.supported_funcs &= ~IPA_IPV6;
  6298. } else {
  6299. #ifdef CONFIG_QETH_IPV6
  6300. card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported;
  6301. card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled;
  6302. #endif
  6303. }
  6304. QETH_DBF_TEXT(setup, 2, "suppenbl");
  6305. QETH_DBF_TEXT_(setup, 2, "%x",cmd->hdr.ipa_supported);
  6306. QETH_DBF_TEXT_(setup, 2, "%x",cmd->hdr.ipa_enabled);
  6307. return 0;
  6308. }
  6309. static int
  6310. qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot)
  6311. {
  6312. int rc;
  6313. struct qeth_cmd_buffer *iob;
  6314. QETH_DBF_TEXT_(setup, 2, "qipassi%i", prot);
  6315. if (card->options.layer2) {
  6316. QETH_DBF_TEXT(setup, 2, "noprmly2");
  6317. return -EPERM;
  6318. }
  6319. iob = qeth_get_ipacmd_buffer(card,IPA_CMD_QIPASSIST,prot);
  6320. rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL);
  6321. return rc;
  6322. }
  6323. static struct qeth_cmd_buffer *
  6324. qeth_get_setassparms_cmd(struct qeth_card *card, enum qeth_ipa_funcs ipa_func,
  6325. __u16 cmd_code, __u16 len,
  6326. enum qeth_prot_versions prot)
  6327. {
  6328. struct qeth_cmd_buffer *iob;
  6329. struct qeth_ipa_cmd *cmd;
  6330. QETH_DBF_TEXT(trace,4,"getasscm");
  6331. iob = qeth_get_ipacmd_buffer(card,IPA_CMD_SETASSPARMS,prot);
  6332. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  6333. cmd->data.setassparms.hdr.assist_no = ipa_func;
  6334. cmd->data.setassparms.hdr.length = 8 + len;
  6335. cmd->data.setassparms.hdr.command_code = cmd_code;
  6336. cmd->data.setassparms.hdr.return_code = 0;
  6337. cmd->data.setassparms.hdr.seq_no = 0;
  6338. return iob;
  6339. }
  6340. static int
  6341. qeth_send_setassparms(struct qeth_card *card, struct qeth_cmd_buffer *iob,
  6342. __u16 len, long data,
  6343. int (*reply_cb)
  6344. (struct qeth_card *,struct qeth_reply *,unsigned long),
  6345. void *reply_param)
  6346. {
  6347. int rc;
  6348. struct qeth_ipa_cmd *cmd;
  6349. QETH_DBF_TEXT(trace,4,"sendassp");
  6350. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  6351. if (len <= sizeof(__u32))
  6352. cmd->data.setassparms.data.flags_32bit = (__u32) data;
  6353. else /* (len > sizeof(__u32)) */
  6354. memcpy(&cmd->data.setassparms.data, (void *) data, len);
  6355. rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param);
  6356. return rc;
  6357. }
  6358. #ifdef CONFIG_QETH_IPV6
  6359. static int
  6360. qeth_send_simple_setassparms_ipv6(struct qeth_card *card,
  6361. enum qeth_ipa_funcs ipa_func, __u16 cmd_code)
  6362. {
  6363. int rc;
  6364. struct qeth_cmd_buffer *iob;
  6365. QETH_DBF_TEXT(trace,4,"simassp6");
  6366. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
  6367. 0, QETH_PROT_IPV6);
  6368. rc = qeth_send_setassparms(card, iob, 0, 0,
  6369. qeth_default_setassparms_cb, NULL);
  6370. return rc;
  6371. }
  6372. #endif
  6373. static int
  6374. qeth_send_simple_setassparms(struct qeth_card *card,
  6375. enum qeth_ipa_funcs ipa_func,
  6376. __u16 cmd_code, long data)
  6377. {
  6378. int rc;
  6379. int length = 0;
  6380. struct qeth_cmd_buffer *iob;
  6381. QETH_DBF_TEXT(trace,4,"simassp4");
  6382. if (data)
  6383. length = sizeof(__u32);
  6384. iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code,
  6385. length, QETH_PROT_IPV4);
  6386. rc = qeth_send_setassparms(card, iob, length, data,
  6387. qeth_default_setassparms_cb, NULL);
  6388. return rc;
  6389. }
  6390. static int
  6391. qeth_start_ipa_arp_processing(struct qeth_card *card)
  6392. {
  6393. int rc;
  6394. QETH_DBF_TEXT(trace,3,"ipaarp");
  6395. if (!qeth_is_supported(card,IPA_ARP_PROCESSING)) {
  6396. PRINT_WARN("ARP processing not supported "
  6397. "on %s!\n", QETH_CARD_IFNAME(card));
  6398. return 0;
  6399. }
  6400. rc = qeth_send_simple_setassparms(card,IPA_ARP_PROCESSING,
  6401. IPA_CMD_ASS_START, 0);
  6402. if (rc) {
  6403. PRINT_WARN("Could not start ARP processing "
  6404. "assist on %s: 0x%x\n",
  6405. QETH_CARD_IFNAME(card), rc);
  6406. }
  6407. return rc;
  6408. }
  6409. static int
  6410. qeth_start_ipa_ip_fragmentation(struct qeth_card *card)
  6411. {
  6412. int rc;
  6413. QETH_DBF_TEXT(trace,3,"ipaipfrg");
  6414. if (!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) {
  6415. PRINT_INFO("Hardware IP fragmentation not supported on %s\n",
  6416. QETH_CARD_IFNAME(card));
  6417. return -EOPNOTSUPP;
  6418. }
  6419. rc = qeth_send_simple_setassparms(card, IPA_IP_FRAGMENTATION,
  6420. IPA_CMD_ASS_START, 0);
  6421. if (rc) {
  6422. PRINT_WARN("Could not start Hardware IP fragmentation "
  6423. "assist on %s: 0x%x\n",
  6424. QETH_CARD_IFNAME(card), rc);
  6425. } else
  6426. PRINT_INFO("Hardware IP fragmentation enabled \n");
  6427. return rc;
  6428. }
  6429. static int
  6430. qeth_start_ipa_source_mac(struct qeth_card *card)
  6431. {
  6432. int rc;
  6433. QETH_DBF_TEXT(trace,3,"stsrcmac");
  6434. if (!card->options.fake_ll)
  6435. return -EOPNOTSUPP;
  6436. if (!qeth_is_supported(card, IPA_SOURCE_MAC)) {
  6437. PRINT_INFO("Inbound source address not "
  6438. "supported on %s\n", QETH_CARD_IFNAME(card));
  6439. return -EOPNOTSUPP;
  6440. }
  6441. rc = qeth_send_simple_setassparms(card, IPA_SOURCE_MAC,
  6442. IPA_CMD_ASS_START, 0);
  6443. if (rc)
  6444. PRINT_WARN("Could not start inbound source "
  6445. "assist on %s: 0x%x\n",
  6446. QETH_CARD_IFNAME(card), rc);
  6447. return rc;
  6448. }
  6449. static int
  6450. qeth_start_ipa_vlan(struct qeth_card *card)
  6451. {
  6452. int rc = 0;
  6453. QETH_DBF_TEXT(trace,3,"strtvlan");
  6454. #ifdef CONFIG_QETH_VLAN
  6455. if (!qeth_is_supported(card, IPA_FULL_VLAN)) {
  6456. PRINT_WARN("VLAN not supported on %s\n", QETH_CARD_IFNAME(card));
  6457. return -EOPNOTSUPP;
  6458. }
  6459. rc = qeth_send_simple_setassparms(card, IPA_VLAN_PRIO,
  6460. IPA_CMD_ASS_START,0);
  6461. if (rc) {
  6462. PRINT_WARN("Could not start vlan "
  6463. "assist on %s: 0x%x\n",
  6464. QETH_CARD_IFNAME(card), rc);
  6465. } else {
  6466. PRINT_INFO("VLAN enabled \n");
  6467. card->dev->features |=
  6468. NETIF_F_HW_VLAN_FILTER |
  6469. NETIF_F_HW_VLAN_TX |
  6470. NETIF_F_HW_VLAN_RX;
  6471. }
  6472. #endif /* QETH_VLAN */
  6473. return rc;
  6474. }
  6475. static int
  6476. qeth_start_ipa_multicast(struct qeth_card *card)
  6477. {
  6478. int rc;
  6479. QETH_DBF_TEXT(trace,3,"stmcast");
  6480. if (!qeth_is_supported(card, IPA_MULTICASTING)) {
  6481. PRINT_WARN("Multicast not supported on %s\n",
  6482. QETH_CARD_IFNAME(card));
  6483. return -EOPNOTSUPP;
  6484. }
  6485. rc = qeth_send_simple_setassparms(card, IPA_MULTICASTING,
  6486. IPA_CMD_ASS_START,0);
  6487. if (rc) {
  6488. PRINT_WARN("Could not start multicast "
  6489. "assist on %s: rc=%i\n",
  6490. QETH_CARD_IFNAME(card), rc);
  6491. } else {
  6492. PRINT_INFO("Multicast enabled\n");
  6493. card->dev->flags |= IFF_MULTICAST;
  6494. }
  6495. return rc;
  6496. }
  6497. #ifdef CONFIG_QETH_IPV6
  6498. static int
  6499. qeth_softsetup_ipv6(struct qeth_card *card)
  6500. {
  6501. int rc;
  6502. QETH_DBF_TEXT(trace,3,"softipv6");
  6503. rc = qeth_send_startlan(card, QETH_PROT_IPV6);
  6504. if (rc) {
  6505. PRINT_ERR("IPv6 startlan failed on %s\n",
  6506. QETH_CARD_IFNAME(card));
  6507. return rc;
  6508. }
  6509. rc = qeth_query_ipassists(card,QETH_PROT_IPV6);
  6510. if (rc) {
  6511. PRINT_ERR("IPv6 query ipassist failed on %s\n",
  6512. QETH_CARD_IFNAME(card));
  6513. return rc;
  6514. }
  6515. rc = qeth_send_simple_setassparms(card, IPA_IPV6,
  6516. IPA_CMD_ASS_START, 3);
  6517. if (rc) {
  6518. PRINT_WARN("IPv6 start assist (version 4) failed "
  6519. "on %s: 0x%x\n",
  6520. QETH_CARD_IFNAME(card), rc);
  6521. return rc;
  6522. }
  6523. rc = qeth_send_simple_setassparms_ipv6(card, IPA_IPV6,
  6524. IPA_CMD_ASS_START);
  6525. if (rc) {
  6526. PRINT_WARN("IPV6 start assist (version 6) failed "
  6527. "on %s: 0x%x\n",
  6528. QETH_CARD_IFNAME(card), rc);
  6529. return rc;
  6530. }
  6531. rc = qeth_send_simple_setassparms_ipv6(card, IPA_PASSTHRU,
  6532. IPA_CMD_ASS_START);
  6533. if (rc) {
  6534. PRINT_WARN("Could not enable passthrough "
  6535. "on %s: 0x%x\n",
  6536. QETH_CARD_IFNAME(card), rc);
  6537. return rc;
  6538. }
  6539. PRINT_INFO("IPV6 enabled \n");
  6540. return 0;
  6541. }
  6542. #endif
  6543. static int
  6544. qeth_start_ipa_ipv6(struct qeth_card *card)
  6545. {
  6546. int rc = 0;
  6547. #ifdef CONFIG_QETH_IPV6
  6548. QETH_DBF_TEXT(trace,3,"strtipv6");
  6549. if (!qeth_is_supported(card, IPA_IPV6)) {
  6550. PRINT_WARN("IPv6 not supported on %s\n",
  6551. QETH_CARD_IFNAME(card));
  6552. return 0;
  6553. }
  6554. rc = qeth_softsetup_ipv6(card);
  6555. #endif
  6556. return rc ;
  6557. }
  6558. static int
  6559. qeth_start_ipa_broadcast(struct qeth_card *card)
  6560. {
  6561. int rc;
  6562. QETH_DBF_TEXT(trace,3,"stbrdcst");
  6563. card->info.broadcast_capable = 0;
  6564. if (!qeth_is_supported(card, IPA_FILTERING)) {
  6565. PRINT_WARN("Broadcast not supported on %s\n",
  6566. QETH_CARD_IFNAME(card));
  6567. rc = -EOPNOTSUPP;
  6568. goto out;
  6569. }
  6570. rc = qeth_send_simple_setassparms(card, IPA_FILTERING,
  6571. IPA_CMD_ASS_START, 0);
  6572. if (rc) {
  6573. PRINT_WARN("Could not enable broadcasting filtering "
  6574. "on %s: 0x%x\n",
  6575. QETH_CARD_IFNAME(card), rc);
  6576. goto out;
  6577. }
  6578. rc = qeth_send_simple_setassparms(card, IPA_FILTERING,
  6579. IPA_CMD_ASS_CONFIGURE, 1);
  6580. if (rc) {
  6581. PRINT_WARN("Could not set up broadcast filtering on %s: 0x%x\n",
  6582. QETH_CARD_IFNAME(card), rc);
  6583. goto out;
  6584. }
  6585. card->info.broadcast_capable = QETH_BROADCAST_WITH_ECHO;
  6586. PRINT_INFO("Broadcast enabled \n");
  6587. rc = qeth_send_simple_setassparms(card, IPA_FILTERING,
  6588. IPA_CMD_ASS_ENABLE, 1);
  6589. if (rc) {
  6590. PRINT_WARN("Could not set up broadcast echo filtering on "
  6591. "%s: 0x%x\n", QETH_CARD_IFNAME(card), rc);
  6592. goto out;
  6593. }
  6594. card->info.broadcast_capable = QETH_BROADCAST_WITHOUT_ECHO;
  6595. out:
  6596. if (card->info.broadcast_capable)
  6597. card->dev->flags |= IFF_BROADCAST;
  6598. else
  6599. card->dev->flags &= ~IFF_BROADCAST;
  6600. return rc;
  6601. }
  6602. static int
  6603. qeth_send_checksum_command(struct qeth_card *card)
  6604. {
  6605. int rc;
  6606. rc = qeth_send_simple_setassparms(card, IPA_INBOUND_CHECKSUM,
  6607. IPA_CMD_ASS_START, 0);
  6608. if (rc) {
  6609. PRINT_WARN("Starting Inbound HW Checksumming failed on %s: "
  6610. "0x%x,\ncontinuing using Inbound SW Checksumming\n",
  6611. QETH_CARD_IFNAME(card), rc);
  6612. return rc;
  6613. }
  6614. rc = qeth_send_simple_setassparms(card, IPA_INBOUND_CHECKSUM,
  6615. IPA_CMD_ASS_ENABLE,
  6616. card->info.csum_mask);
  6617. if (rc) {
  6618. PRINT_WARN("Enabling Inbound HW Checksumming failed on %s: "
  6619. "0x%x,\ncontinuing using Inbound SW Checksumming\n",
  6620. QETH_CARD_IFNAME(card), rc);
  6621. return rc;
  6622. }
  6623. return 0;
  6624. }
  6625. static int
  6626. qeth_start_ipa_checksum(struct qeth_card *card)
  6627. {
  6628. int rc = 0;
  6629. QETH_DBF_TEXT(trace,3,"strtcsum");
  6630. if (card->options.checksum_type == NO_CHECKSUMMING) {
  6631. PRINT_WARN("Using no checksumming on %s.\n",
  6632. QETH_CARD_IFNAME(card));
  6633. return 0;
  6634. }
  6635. if (card->options.checksum_type == SW_CHECKSUMMING) {
  6636. PRINT_WARN("Using SW checksumming on %s.\n",
  6637. QETH_CARD_IFNAME(card));
  6638. return 0;
  6639. }
  6640. if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM)) {
  6641. PRINT_WARN("Inbound HW Checksumming not "
  6642. "supported on %s,\ncontinuing "
  6643. "using Inbound SW Checksumming\n",
  6644. QETH_CARD_IFNAME(card));
  6645. card->options.checksum_type = SW_CHECKSUMMING;
  6646. return 0;
  6647. }
  6648. rc = qeth_send_checksum_command(card);
  6649. if (!rc) {
  6650. PRINT_INFO("HW Checksumming (inbound) enabled \n");
  6651. }
  6652. return rc;
  6653. }
  6654. static int
  6655. qeth_start_ipa_tso(struct qeth_card *card)
  6656. {
  6657. int rc;
  6658. QETH_DBF_TEXT(trace,3,"sttso");
  6659. if (!qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
  6660. PRINT_WARN("Outbound TSO not supported on %s\n",
  6661. QETH_CARD_IFNAME(card));
  6662. rc = -EOPNOTSUPP;
  6663. } else {
  6664. rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO,
  6665. IPA_CMD_ASS_START,0);
  6666. if (rc)
  6667. PRINT_WARN("Could not start outbound TSO "
  6668. "assist on %s: rc=%i\n",
  6669. QETH_CARD_IFNAME(card), rc);
  6670. else
  6671. PRINT_INFO("Outbound TSO enabled\n");
  6672. }
  6673. if (rc && (card->options.large_send == QETH_LARGE_SEND_TSO)){
  6674. card->options.large_send = QETH_LARGE_SEND_NO;
  6675. card->dev->features &= ~ (NETIF_F_TSO | NETIF_F_SG);
  6676. }
  6677. return rc;
  6678. }
  6679. static int
  6680. qeth_start_ipassists(struct qeth_card *card)
  6681. {
  6682. QETH_DBF_TEXT(trace,3,"strtipas");
  6683. qeth_start_ipa_arp_processing(card); /* go on*/
  6684. qeth_start_ipa_ip_fragmentation(card); /* go on*/
  6685. qeth_start_ipa_source_mac(card); /* go on*/
  6686. qeth_start_ipa_vlan(card); /* go on*/
  6687. qeth_start_ipa_multicast(card); /* go on*/
  6688. qeth_start_ipa_ipv6(card); /* go on*/
  6689. qeth_start_ipa_broadcast(card); /* go on*/
  6690. qeth_start_ipa_checksum(card); /* go on*/
  6691. qeth_start_ipa_tso(card); /* go on*/
  6692. return 0;
  6693. }
  6694. static int
  6695. qeth_send_setrouting(struct qeth_card *card, enum qeth_routing_types type,
  6696. enum qeth_prot_versions prot)
  6697. {
  6698. int rc;
  6699. struct qeth_ipa_cmd *cmd;
  6700. struct qeth_cmd_buffer *iob;
  6701. QETH_DBF_TEXT(trace,4,"setroutg");
  6702. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETRTG, prot);
  6703. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  6704. cmd->data.setrtg.type = (type);
  6705. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  6706. return rc;
  6707. }
  6708. static void
  6709. qeth_correct_routing_type(struct qeth_card *card, enum qeth_routing_types *type,
  6710. enum qeth_prot_versions prot)
  6711. {
  6712. if (card->info.type == QETH_CARD_TYPE_IQD) {
  6713. switch (*type) {
  6714. case NO_ROUTER:
  6715. case PRIMARY_CONNECTOR:
  6716. case SECONDARY_CONNECTOR:
  6717. case MULTICAST_ROUTER:
  6718. return;
  6719. default:
  6720. goto out_inval;
  6721. }
  6722. } else {
  6723. switch (*type) {
  6724. case NO_ROUTER:
  6725. case PRIMARY_ROUTER:
  6726. case SECONDARY_ROUTER:
  6727. return;
  6728. case MULTICAST_ROUTER:
  6729. if (qeth_is_ipafunc_supported(card, prot,
  6730. IPA_OSA_MC_ROUTER))
  6731. return;
  6732. default:
  6733. goto out_inval;
  6734. }
  6735. }
  6736. out_inval:
  6737. PRINT_WARN("Routing type '%s' not supported for interface %s.\n"
  6738. "Router status set to 'no router'.\n",
  6739. ((*type == PRIMARY_ROUTER)? "primary router" :
  6740. (*type == SECONDARY_ROUTER)? "secondary router" :
  6741. (*type == PRIMARY_CONNECTOR)? "primary connector" :
  6742. (*type == SECONDARY_CONNECTOR)? "secondary connector" :
  6743. (*type == MULTICAST_ROUTER)? "multicast router" :
  6744. "unknown"),
  6745. card->dev->name);
  6746. *type = NO_ROUTER;
  6747. }
  6748. int
  6749. qeth_setrouting_v4(struct qeth_card *card)
  6750. {
  6751. int rc;
  6752. QETH_DBF_TEXT(trace,3,"setrtg4");
  6753. qeth_correct_routing_type(card, &card->options.route4.type,
  6754. QETH_PROT_IPV4);
  6755. rc = qeth_send_setrouting(card, card->options.route4.type,
  6756. QETH_PROT_IPV4);
  6757. if (rc) {
  6758. card->options.route4.type = NO_ROUTER;
  6759. PRINT_WARN("Error (0x%04x) while setting routing type on %s. "
  6760. "Type set to 'no router'.\n",
  6761. rc, QETH_CARD_IFNAME(card));
  6762. }
  6763. return rc;
  6764. }
  6765. int
  6766. qeth_setrouting_v6(struct qeth_card *card)
  6767. {
  6768. int rc = 0;
  6769. QETH_DBF_TEXT(trace,3,"setrtg6");
  6770. #ifdef CONFIG_QETH_IPV6
  6771. if (!qeth_is_supported(card, IPA_IPV6))
  6772. return 0;
  6773. qeth_correct_routing_type(card, &card->options.route6.type,
  6774. QETH_PROT_IPV6);
  6775. rc = qeth_send_setrouting(card, card->options.route6.type,
  6776. QETH_PROT_IPV6);
  6777. if (rc) {
  6778. card->options.route6.type = NO_ROUTER;
  6779. PRINT_WARN("Error (0x%04x) while setting routing type on %s. "
  6780. "Type set to 'no router'.\n",
  6781. rc, QETH_CARD_IFNAME(card));
  6782. }
  6783. #endif
  6784. return rc;
  6785. }
  6786. int
  6787. qeth_set_large_send(struct qeth_card *card, enum qeth_large_send_types type)
  6788. {
  6789. int rc = 0;
  6790. if (card->dev == NULL) {
  6791. card->options.large_send = type;
  6792. return 0;
  6793. }
  6794. if (card->state == CARD_STATE_UP)
  6795. netif_tx_disable(card->dev);
  6796. card->options.large_send = type;
  6797. switch (card->options.large_send) {
  6798. case QETH_LARGE_SEND_EDDP:
  6799. card->dev->features |= NETIF_F_TSO | NETIF_F_SG;
  6800. break;
  6801. case QETH_LARGE_SEND_TSO:
  6802. if (qeth_is_supported(card, IPA_OUTBOUND_TSO)){
  6803. card->dev->features |= NETIF_F_TSO | NETIF_F_SG;
  6804. } else {
  6805. PRINT_WARN("TSO not supported on %s. "
  6806. "large_send set to 'no'.\n",
  6807. card->dev->name);
  6808. card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG);
  6809. card->options.large_send = QETH_LARGE_SEND_NO;
  6810. rc = -EOPNOTSUPP;
  6811. }
  6812. break;
  6813. default: /* includes QETH_LARGE_SEND_NO */
  6814. card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG);
  6815. break;
  6816. }
  6817. if (card->state == CARD_STATE_UP)
  6818. netif_wake_queue(card->dev);
  6819. return rc;
  6820. }
  6821. /*
  6822. * softsetup card: init IPA stuff
  6823. */
  6824. static int
  6825. qeth_softsetup_card(struct qeth_card *card)
  6826. {
  6827. int rc;
  6828. QETH_DBF_TEXT(setup, 2, "softsetp");
  6829. if ((rc = qeth_send_startlan(card, QETH_PROT_IPV4))){
  6830. QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
  6831. if (rc == 0xe080){
  6832. PRINT_WARN("LAN on card %s if offline! "
  6833. "Waiting for STARTLAN from card.\n",
  6834. CARD_BUS_ID(card));
  6835. card->lan_online = 0;
  6836. }
  6837. return rc;
  6838. } else
  6839. card->lan_online = 1;
  6840. if (card->info.type==QETH_CARD_TYPE_OSN)
  6841. goto out;
  6842. qeth_set_large_send(card, card->options.large_send);
  6843. if (card->options.layer2) {
  6844. card->dev->features |=
  6845. NETIF_F_HW_VLAN_FILTER |
  6846. NETIF_F_HW_VLAN_TX |
  6847. NETIF_F_HW_VLAN_RX;
  6848. card->dev->flags|=IFF_MULTICAST|IFF_BROADCAST;
  6849. card->info.broadcast_capable=1;
  6850. if ((rc = qeth_layer2_initialize(card))) {
  6851. QETH_DBF_TEXT_(setup, 2, "L2err%d", rc);
  6852. return rc;
  6853. }
  6854. #ifdef CONFIG_QETH_VLAN
  6855. qeth_layer2_process_vlans(card, 0);
  6856. #endif
  6857. goto out;
  6858. }
  6859. if ((rc = qeth_setadapter_parms(card)))
  6860. QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
  6861. if ((rc = qeth_start_ipassists(card)))
  6862. QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
  6863. if ((rc = qeth_setrouting_v4(card)))
  6864. QETH_DBF_TEXT_(setup, 2, "4err%d", rc);
  6865. if ((rc = qeth_setrouting_v6(card)))
  6866. QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
  6867. out:
  6868. netif_tx_disable(card->dev);
  6869. return 0;
  6870. }
  6871. #ifdef CONFIG_QETH_IPV6
  6872. static int
  6873. qeth_get_unique_id_cb(struct qeth_card *card, struct qeth_reply *reply,
  6874. unsigned long data)
  6875. {
  6876. struct qeth_ipa_cmd *cmd;
  6877. cmd = (struct qeth_ipa_cmd *) data;
  6878. if (cmd->hdr.return_code == 0)
  6879. card->info.unique_id = *((__u16 *)
  6880. &cmd->data.create_destroy_addr.unique_id[6]);
  6881. else {
  6882. card->info.unique_id = UNIQUE_ID_IF_CREATE_ADDR_FAILED |
  6883. UNIQUE_ID_NOT_BY_CARD;
  6884. PRINT_WARN("couldn't get a unique id from the card on device "
  6885. "%s (result=x%x), using default id. ipv6 "
  6886. "autoconfig on other lpars may lead to duplicate "
  6887. "ip addresses. please use manually "
  6888. "configured ones.\n",
  6889. CARD_BUS_ID(card), cmd->hdr.return_code);
  6890. }
  6891. return 0;
  6892. }
  6893. #endif
  6894. static int
  6895. qeth_put_unique_id(struct qeth_card *card)
  6896. {
  6897. int rc = 0;
  6898. #ifdef CONFIG_QETH_IPV6
  6899. struct qeth_cmd_buffer *iob;
  6900. struct qeth_ipa_cmd *cmd;
  6901. QETH_DBF_TEXT(trace,2,"puniqeid");
  6902. if ((card->info.unique_id & UNIQUE_ID_NOT_BY_CARD) ==
  6903. UNIQUE_ID_NOT_BY_CARD)
  6904. return -1;
  6905. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_DESTROY_ADDR,
  6906. QETH_PROT_IPV6);
  6907. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  6908. *((__u16 *) &cmd->data.create_destroy_addr.unique_id[6]) =
  6909. card->info.unique_id;
  6910. memcpy(&cmd->data.create_destroy_addr.unique_id[0],
  6911. card->dev->dev_addr, OSA_ADDR_LEN);
  6912. rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
  6913. #else
  6914. card->info.unique_id = UNIQUE_ID_IF_CREATE_ADDR_FAILED |
  6915. UNIQUE_ID_NOT_BY_CARD;
  6916. #endif
  6917. return rc;
  6918. }
  6919. /**
  6920. * Clear IP List
  6921. */
  6922. static void
  6923. qeth_clear_ip_list(struct qeth_card *card, int clean, int recover)
  6924. {
  6925. struct qeth_ipaddr *addr, *tmp;
  6926. unsigned long flags;
  6927. QETH_DBF_TEXT(trace,4,"clearip");
  6928. spin_lock_irqsave(&card->ip_lock, flags);
  6929. /* clear todo list */
  6930. list_for_each_entry_safe(addr, tmp, card->ip_tbd_list, entry){
  6931. list_del(&addr->entry);
  6932. kfree(addr);
  6933. }
  6934. while (!list_empty(&card->ip_list)) {
  6935. addr = list_entry(card->ip_list.next,
  6936. struct qeth_ipaddr, entry);
  6937. list_del_init(&addr->entry);
  6938. if (clean) {
  6939. spin_unlock_irqrestore(&card->ip_lock, flags);
  6940. qeth_deregister_addr_entry(card, addr);
  6941. spin_lock_irqsave(&card->ip_lock, flags);
  6942. }
  6943. if (!recover || addr->is_multicast) {
  6944. kfree(addr);
  6945. continue;
  6946. }
  6947. list_add_tail(&addr->entry, card->ip_tbd_list);
  6948. }
  6949. spin_unlock_irqrestore(&card->ip_lock, flags);
  6950. }
  6951. static void
  6952. qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
  6953. int clear_start_mask)
  6954. {
  6955. unsigned long flags;
  6956. spin_lock_irqsave(&card->thread_mask_lock, flags);
  6957. card->thread_allowed_mask = threads;
  6958. if (clear_start_mask)
  6959. card->thread_start_mask &= threads;
  6960. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  6961. wake_up(&card->wait_q);
  6962. }
  6963. static int
  6964. qeth_threads_running(struct qeth_card *card, unsigned long threads)
  6965. {
  6966. unsigned long flags;
  6967. int rc = 0;
  6968. spin_lock_irqsave(&card->thread_mask_lock, flags);
  6969. rc = (card->thread_running_mask & threads);
  6970. spin_unlock_irqrestore(&card->thread_mask_lock, flags);
  6971. return rc;
  6972. }
  6973. static int
  6974. qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
  6975. {
  6976. return wait_event_interruptible(card->wait_q,
  6977. qeth_threads_running(card, threads) == 0);
  6978. }
  6979. static int
  6980. qeth_stop_card(struct qeth_card *card, int recovery_mode)
  6981. {
  6982. int rc = 0;
  6983. QETH_DBF_TEXT(setup ,2,"stopcard");
  6984. QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
  6985. qeth_set_allowed_threads(card, 0, 1);
  6986. if (qeth_wait_for_threads(card, ~QETH_RECOVER_THREAD))
  6987. return -ERESTARTSYS;
  6988. if (card->read.state == CH_STATE_UP &&
  6989. card->write.state == CH_STATE_UP &&
  6990. (card->state == CARD_STATE_UP)) {
  6991. if (recovery_mode &&
  6992. card->info.type != QETH_CARD_TYPE_OSN) {
  6993. qeth_stop(card->dev);
  6994. } else {
  6995. rtnl_lock();
  6996. dev_close(card->dev);
  6997. rtnl_unlock();
  6998. }
  6999. if (!card->use_hard_stop) {
  7000. __u8 *mac = &card->dev->dev_addr[0];
  7001. rc = qeth_layer2_send_delmac(card, mac);
  7002. QETH_DBF_TEXT_(setup, 2, "Lerr%d", rc);
  7003. if ((rc = qeth_send_stoplan(card)))
  7004. QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
  7005. }
  7006. card->state = CARD_STATE_SOFTSETUP;
  7007. }
  7008. if (card->state == CARD_STATE_SOFTSETUP) {
  7009. #ifdef CONFIG_QETH_VLAN
  7010. if (card->options.layer2)
  7011. qeth_layer2_process_vlans(card, 1);
  7012. #endif
  7013. qeth_clear_ip_list(card, !card->use_hard_stop, 1);
  7014. qeth_clear_ipacmd_list(card);
  7015. card->state = CARD_STATE_HARDSETUP;
  7016. }
  7017. if (card->state == CARD_STATE_HARDSETUP) {
  7018. if ((!card->use_hard_stop) &&
  7019. (!card->options.layer2))
  7020. if ((rc = qeth_put_unique_id(card)))
  7021. QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
  7022. qeth_qdio_clear_card(card, 0);
  7023. qeth_clear_qdio_buffers(card);
  7024. qeth_clear_working_pool_list(card);
  7025. card->state = CARD_STATE_DOWN;
  7026. }
  7027. if (card->state == CARD_STATE_DOWN) {
  7028. qeth_clear_cmd_buffers(&card->read);
  7029. qeth_clear_cmd_buffers(&card->write);
  7030. }
  7031. card->use_hard_stop = 0;
  7032. return rc;
  7033. }
  7034. static int
  7035. qeth_get_unique_id(struct qeth_card *card)
  7036. {
  7037. int rc = 0;
  7038. #ifdef CONFIG_QETH_IPV6
  7039. struct qeth_cmd_buffer *iob;
  7040. struct qeth_ipa_cmd *cmd;
  7041. QETH_DBF_TEXT(setup, 2, "guniqeid");
  7042. if (!qeth_is_supported(card,IPA_IPV6)) {
  7043. card->info.unique_id = UNIQUE_ID_IF_CREATE_ADDR_FAILED |
  7044. UNIQUE_ID_NOT_BY_CARD;
  7045. return 0;
  7046. }
  7047. iob = qeth_get_ipacmd_buffer(card, IPA_CMD_CREATE_ADDR,
  7048. QETH_PROT_IPV6);
  7049. cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
  7050. *((__u16 *) &cmd->data.create_destroy_addr.unique_id[6]) =
  7051. card->info.unique_id;
  7052. rc = qeth_send_ipa_cmd(card, iob, qeth_get_unique_id_cb, NULL);
  7053. #else
  7054. card->info.unique_id = UNIQUE_ID_IF_CREATE_ADDR_FAILED |
  7055. UNIQUE_ID_NOT_BY_CARD;
  7056. #endif
  7057. return rc;
  7058. }
  7059. static void
  7060. qeth_print_status_with_portname(struct qeth_card *card)
  7061. {
  7062. char dbf_text[15];
  7063. int i;
  7064. sprintf(dbf_text, "%s", card->info.portname + 1);
  7065. for (i = 0; i < 8; i++)
  7066. dbf_text[i] =
  7067. (char) _ebcasc[(__u8) dbf_text[i]];
  7068. dbf_text[8] = 0;
  7069. printk("qeth: Device %s/%s/%s is a%s card%s%s%s\n"
  7070. "with link type %s (portname: %s)\n",
  7071. CARD_RDEV_ID(card),
  7072. CARD_WDEV_ID(card),
  7073. CARD_DDEV_ID(card),
  7074. qeth_get_cardname(card),
  7075. (card->info.mcl_level[0]) ? " (level: " : "",
  7076. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  7077. (card->info.mcl_level[0]) ? ")" : "",
  7078. qeth_get_cardname_short(card),
  7079. dbf_text);
  7080. }
  7081. static void
  7082. qeth_print_status_no_portname(struct qeth_card *card)
  7083. {
  7084. if (card->info.portname[0])
  7085. printk("qeth: Device %s/%s/%s is a%s "
  7086. "card%s%s%s\nwith link type %s "
  7087. "(no portname needed by interface).\n",
  7088. CARD_RDEV_ID(card),
  7089. CARD_WDEV_ID(card),
  7090. CARD_DDEV_ID(card),
  7091. qeth_get_cardname(card),
  7092. (card->info.mcl_level[0]) ? " (level: " : "",
  7093. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  7094. (card->info.mcl_level[0]) ? ")" : "",
  7095. qeth_get_cardname_short(card));
  7096. else
  7097. printk("qeth: Device %s/%s/%s is a%s "
  7098. "card%s%s%s\nwith link type %s.\n",
  7099. CARD_RDEV_ID(card),
  7100. CARD_WDEV_ID(card),
  7101. CARD_DDEV_ID(card),
  7102. qeth_get_cardname(card),
  7103. (card->info.mcl_level[0]) ? " (level: " : "",
  7104. (card->info.mcl_level[0]) ? card->info.mcl_level : "",
  7105. (card->info.mcl_level[0]) ? ")" : "",
  7106. qeth_get_cardname_short(card));
  7107. }
  7108. static void
  7109. qeth_print_status_message(struct qeth_card *card)
  7110. {
  7111. switch (card->info.type) {
  7112. case QETH_CARD_TYPE_OSAE:
  7113. /* VM will use a non-zero first character
  7114. * to indicate a HiperSockets like reporting
  7115. * of the level OSA sets the first character to zero
  7116. * */
  7117. if (!card->info.mcl_level[0]) {
  7118. sprintf(card->info.mcl_level,"%02x%02x",
  7119. card->info.mcl_level[2],
  7120. card->info.mcl_level[3]);
  7121. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  7122. break;
  7123. }
  7124. /* fallthrough */
  7125. case QETH_CARD_TYPE_IQD:
  7126. if (card->info.guestlan) {
  7127. card->info.mcl_level[0] = (char) _ebcasc[(__u8)
  7128. card->info.mcl_level[0]];
  7129. card->info.mcl_level[1] = (char) _ebcasc[(__u8)
  7130. card->info.mcl_level[1]];
  7131. card->info.mcl_level[2] = (char) _ebcasc[(__u8)
  7132. card->info.mcl_level[2]];
  7133. card->info.mcl_level[3] = (char) _ebcasc[(__u8)
  7134. card->info.mcl_level[3]];
  7135. card->info.mcl_level[QETH_MCL_LENGTH] = 0;
  7136. }
  7137. break;
  7138. default:
  7139. memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
  7140. }
  7141. if (card->info.portname_required)
  7142. qeth_print_status_with_portname(card);
  7143. else
  7144. qeth_print_status_no_portname(card);
  7145. }
  7146. static int
  7147. qeth_register_netdev(struct qeth_card *card)
  7148. {
  7149. QETH_DBF_TEXT(setup, 3, "regnetd");
  7150. if (card->dev->reg_state != NETREG_UNINITIALIZED)
  7151. return 0;
  7152. /* sysfs magic */
  7153. SET_NETDEV_DEV(card->dev, &card->gdev->dev);
  7154. return register_netdev(card->dev);
  7155. }
  7156. static void
  7157. qeth_start_again(struct qeth_card *card, int recovery_mode)
  7158. {
  7159. QETH_DBF_TEXT(setup ,2, "startag");
  7160. if (recovery_mode &&
  7161. card->info.type != QETH_CARD_TYPE_OSN) {
  7162. qeth_open(card->dev);
  7163. } else {
  7164. rtnl_lock();
  7165. dev_open(card->dev);
  7166. rtnl_unlock();
  7167. }
  7168. /* this also sets saved unicast addresses */
  7169. qeth_set_multicast_list(card->dev);
  7170. }
  7171. /* Layer 2 specific stuff */
  7172. #define IGNORE_PARAM_EQ(option,value,reset_value,msg) \
  7173. if (card->options.option == value) { \
  7174. PRINT_ERR("%s not supported with layer 2 " \
  7175. "functionality, ignoring option on read" \
  7176. "channel device %s .\n",msg,CARD_RDEV_ID(card)); \
  7177. card->options.option = reset_value; \
  7178. }
  7179. #define IGNORE_PARAM_NEQ(option,value,reset_value,msg) \
  7180. if (card->options.option != value) { \
  7181. PRINT_ERR("%s not supported with layer 2 " \
  7182. "functionality, ignoring option on read" \
  7183. "channel device %s .\n",msg,CARD_RDEV_ID(card)); \
  7184. card->options.option = reset_value; \
  7185. }
  7186. static void qeth_make_parameters_consistent(struct qeth_card *card)
  7187. {
  7188. if (card->options.layer2 == 0)
  7189. return;
  7190. if (card->info.type == QETH_CARD_TYPE_OSN)
  7191. return;
  7192. if (card->info.type == QETH_CARD_TYPE_IQD) {
  7193. PRINT_ERR("Device %s does not support layer 2 functionality." \
  7194. " Ignoring layer2 option.\n",CARD_BUS_ID(card));
  7195. card->options.layer2 = 0;
  7196. return;
  7197. }
  7198. IGNORE_PARAM_NEQ(route4.type, NO_ROUTER, NO_ROUTER,
  7199. "Routing options are");
  7200. #ifdef CONFIG_QETH_IPV6
  7201. IGNORE_PARAM_NEQ(route6.type, NO_ROUTER, NO_ROUTER,
  7202. "Routing options are");
  7203. #endif
  7204. IGNORE_PARAM_EQ(checksum_type, HW_CHECKSUMMING,
  7205. QETH_CHECKSUM_DEFAULT,
  7206. "Checksumming options are");
  7207. IGNORE_PARAM_NEQ(broadcast_mode, QETH_TR_BROADCAST_ALLRINGS,
  7208. QETH_TR_BROADCAST_ALLRINGS,
  7209. "Broadcast mode options are");
  7210. IGNORE_PARAM_NEQ(macaddr_mode, QETH_TR_MACADDR_NONCANONICAL,
  7211. QETH_TR_MACADDR_NONCANONICAL,
  7212. "Canonical MAC addr options are");
  7213. IGNORE_PARAM_NEQ(fake_broadcast, 0, 0,
  7214. "Broadcast faking options are");
  7215. IGNORE_PARAM_NEQ(add_hhlen, DEFAULT_ADD_HHLEN,
  7216. DEFAULT_ADD_HHLEN,"Option add_hhlen is");
  7217. IGNORE_PARAM_NEQ(fake_ll, 0, 0,"Option fake_ll is");
  7218. }
  7219. static int
  7220. __qeth_set_online(struct ccwgroup_device *gdev, int recovery_mode)
  7221. {
  7222. struct qeth_card *card = gdev->dev.driver_data;
  7223. int rc = 0;
  7224. enum qeth_card_states recover_flag;
  7225. BUG_ON(!card);
  7226. QETH_DBF_TEXT(setup ,2, "setonlin");
  7227. QETH_DBF_HEX(setup, 2, &card, sizeof(void *));
  7228. qeth_set_allowed_threads(card, QETH_RECOVER_THREAD, 1);
  7229. if (qeth_wait_for_threads(card, ~QETH_RECOVER_THREAD)){
  7230. PRINT_WARN("set_online of card %s interrupted by user!\n",
  7231. CARD_BUS_ID(card));
  7232. return -ERESTARTSYS;
  7233. }
  7234. recover_flag = card->state;
  7235. if ((rc = ccw_device_set_online(CARD_RDEV(card))) ||
  7236. (rc = ccw_device_set_online(CARD_WDEV(card))) ||
  7237. (rc = ccw_device_set_online(CARD_DDEV(card)))){
  7238. QETH_DBF_TEXT_(setup, 2, "1err%d", rc);
  7239. return -EIO;
  7240. }
  7241. qeth_make_parameters_consistent(card);
  7242. if ((rc = qeth_hardsetup_card(card))){
  7243. QETH_DBF_TEXT_(setup, 2, "2err%d", rc);
  7244. goto out_remove;
  7245. }
  7246. card->state = CARD_STATE_HARDSETUP;
  7247. if (!(rc = qeth_query_ipassists(card,QETH_PROT_IPV4)))
  7248. rc = qeth_get_unique_id(card);
  7249. if (rc && card->options.layer2 == 0) {
  7250. QETH_DBF_TEXT_(setup, 2, "3err%d", rc);
  7251. goto out_remove;
  7252. }
  7253. qeth_print_status_message(card);
  7254. if ((rc = qeth_register_netdev(card))){
  7255. QETH_DBF_TEXT_(setup, 2, "4err%d", rc);
  7256. goto out_remove;
  7257. }
  7258. if ((rc = qeth_softsetup_card(card))){
  7259. QETH_DBF_TEXT_(setup, 2, "5err%d", rc);
  7260. goto out_remove;
  7261. }
  7262. if ((rc = qeth_init_qdio_queues(card))){
  7263. QETH_DBF_TEXT_(setup, 2, "6err%d", rc);
  7264. goto out_remove;
  7265. }
  7266. card->state = CARD_STATE_SOFTSETUP;
  7267. netif_carrier_on(card->dev);
  7268. qeth_set_allowed_threads(card, 0xffffffff, 0);
  7269. if (recover_flag == CARD_STATE_RECOVER)
  7270. qeth_start_again(card, recovery_mode);
  7271. qeth_notify_processes();
  7272. return 0;
  7273. out_remove:
  7274. card->use_hard_stop = 1;
  7275. qeth_stop_card(card, 0);
  7276. ccw_device_set_offline(CARD_DDEV(card));
  7277. ccw_device_set_offline(CARD_WDEV(card));
  7278. ccw_device_set_offline(CARD_RDEV(card));
  7279. if (recover_flag == CARD_STATE_RECOVER)
  7280. card->state = CARD_STATE_RECOVER;
  7281. else
  7282. card->state = CARD_STATE_DOWN;
  7283. return -ENODEV;
  7284. }
  7285. static int
  7286. qeth_set_online(struct ccwgroup_device *gdev)
  7287. {
  7288. return __qeth_set_online(gdev, 0);
  7289. }
  7290. static struct ccw_device_id qeth_ids[] = {
  7291. {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
  7292. {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
  7293. {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
  7294. {},
  7295. };
  7296. MODULE_DEVICE_TABLE(ccw, qeth_ids);
  7297. struct device *qeth_root_dev = NULL;
  7298. struct ccwgroup_driver qeth_ccwgroup_driver = {
  7299. .owner = THIS_MODULE,
  7300. .name = "qeth",
  7301. .driver_id = 0xD8C5E3C8,
  7302. .probe = qeth_probe_device,
  7303. .remove = qeth_remove_device,
  7304. .set_online = qeth_set_online,
  7305. .set_offline = qeth_set_offline,
  7306. };
  7307. struct ccw_driver qeth_ccw_driver = {
  7308. .name = "qeth",
  7309. .ids = qeth_ids,
  7310. .probe = ccwgroup_probe_ccwdev,
  7311. .remove = ccwgroup_remove_ccwdev,
  7312. };
  7313. static void
  7314. qeth_unregister_dbf_views(void)
  7315. {
  7316. if (qeth_dbf_setup)
  7317. debug_unregister(qeth_dbf_setup);
  7318. if (qeth_dbf_qerr)
  7319. debug_unregister(qeth_dbf_qerr);
  7320. if (qeth_dbf_sense)
  7321. debug_unregister(qeth_dbf_sense);
  7322. if (qeth_dbf_misc)
  7323. debug_unregister(qeth_dbf_misc);
  7324. if (qeth_dbf_data)
  7325. debug_unregister(qeth_dbf_data);
  7326. if (qeth_dbf_control)
  7327. debug_unregister(qeth_dbf_control);
  7328. if (qeth_dbf_trace)
  7329. debug_unregister(qeth_dbf_trace);
  7330. }
  7331. static int
  7332. qeth_register_dbf_views(void)
  7333. {
  7334. qeth_dbf_setup = debug_register(QETH_DBF_SETUP_NAME,
  7335. QETH_DBF_SETUP_PAGES,
  7336. QETH_DBF_SETUP_NR_AREAS,
  7337. QETH_DBF_SETUP_LEN);
  7338. qeth_dbf_misc = debug_register(QETH_DBF_MISC_NAME,
  7339. QETH_DBF_MISC_PAGES,
  7340. QETH_DBF_MISC_NR_AREAS,
  7341. QETH_DBF_MISC_LEN);
  7342. qeth_dbf_data = debug_register(QETH_DBF_DATA_NAME,
  7343. QETH_DBF_DATA_PAGES,
  7344. QETH_DBF_DATA_NR_AREAS,
  7345. QETH_DBF_DATA_LEN);
  7346. qeth_dbf_control = debug_register(QETH_DBF_CONTROL_NAME,
  7347. QETH_DBF_CONTROL_PAGES,
  7348. QETH_DBF_CONTROL_NR_AREAS,
  7349. QETH_DBF_CONTROL_LEN);
  7350. qeth_dbf_sense = debug_register(QETH_DBF_SENSE_NAME,
  7351. QETH_DBF_SENSE_PAGES,
  7352. QETH_DBF_SENSE_NR_AREAS,
  7353. QETH_DBF_SENSE_LEN);
  7354. qeth_dbf_qerr = debug_register(QETH_DBF_QERR_NAME,
  7355. QETH_DBF_QERR_PAGES,
  7356. QETH_DBF_QERR_NR_AREAS,
  7357. QETH_DBF_QERR_LEN);
  7358. qeth_dbf_trace = debug_register(QETH_DBF_TRACE_NAME,
  7359. QETH_DBF_TRACE_PAGES,
  7360. QETH_DBF_TRACE_NR_AREAS,
  7361. QETH_DBF_TRACE_LEN);
  7362. if ((qeth_dbf_setup == NULL) || (qeth_dbf_misc == NULL) ||
  7363. (qeth_dbf_data == NULL) || (qeth_dbf_control == NULL) ||
  7364. (qeth_dbf_sense == NULL) || (qeth_dbf_qerr == NULL) ||
  7365. (qeth_dbf_trace == NULL)) {
  7366. qeth_unregister_dbf_views();
  7367. return -ENOMEM;
  7368. }
  7369. debug_register_view(qeth_dbf_setup, &debug_hex_ascii_view);
  7370. debug_set_level(qeth_dbf_setup, QETH_DBF_SETUP_LEVEL);
  7371. debug_register_view(qeth_dbf_misc, &debug_hex_ascii_view);
  7372. debug_set_level(qeth_dbf_misc, QETH_DBF_MISC_LEVEL);
  7373. debug_register_view(qeth_dbf_data, &debug_hex_ascii_view);
  7374. debug_set_level(qeth_dbf_data, QETH_DBF_DATA_LEVEL);
  7375. debug_register_view(qeth_dbf_control, &debug_hex_ascii_view);
  7376. debug_set_level(qeth_dbf_control, QETH_DBF_CONTROL_LEVEL);
  7377. debug_register_view(qeth_dbf_sense, &debug_hex_ascii_view);
  7378. debug_set_level(qeth_dbf_sense, QETH_DBF_SENSE_LEVEL);
  7379. debug_register_view(qeth_dbf_qerr, &debug_hex_ascii_view);
  7380. debug_set_level(qeth_dbf_qerr, QETH_DBF_QERR_LEVEL);
  7381. debug_register_view(qeth_dbf_trace, &debug_hex_ascii_view);
  7382. debug_set_level(qeth_dbf_trace, QETH_DBF_TRACE_LEVEL);
  7383. return 0;
  7384. }
  7385. #ifdef CONFIG_QETH_IPV6
  7386. extern struct neigh_table arp_tbl;
  7387. static struct neigh_ops *arp_direct_ops;
  7388. static int (*qeth_old_arp_constructor) (struct neighbour *);
  7389. static struct neigh_ops arp_direct_ops_template = {
  7390. .family = AF_INET,
  7391. .solicit = NULL,
  7392. .error_report = NULL,
  7393. .output = dev_queue_xmit,
  7394. .connected_output = dev_queue_xmit,
  7395. .hh_output = dev_queue_xmit,
  7396. .queue_xmit = dev_queue_xmit
  7397. };
  7398. static int
  7399. qeth_arp_constructor(struct neighbour *neigh)
  7400. {
  7401. struct net_device *dev = neigh->dev;
  7402. struct in_device *in_dev;
  7403. struct neigh_parms *parms;
  7404. struct qeth_card *card;
  7405. card = qeth_get_card_from_dev(dev);
  7406. if (card == NULL)
  7407. goto out;
  7408. if((card->options.layer2) ||
  7409. (card->dev->hard_header == qeth_fake_header))
  7410. goto out;
  7411. rcu_read_lock();
  7412. in_dev = __in_dev_get_rcu(dev);
  7413. if (in_dev == NULL) {
  7414. rcu_read_unlock();
  7415. return -EINVAL;
  7416. }
  7417. parms = in_dev->arp_parms;
  7418. __neigh_parms_put(neigh->parms);
  7419. neigh->parms = neigh_parms_clone(parms);
  7420. rcu_read_unlock();
  7421. neigh->type = inet_addr_type(*(__be32 *) neigh->primary_key);
  7422. neigh->nud_state = NUD_NOARP;
  7423. neigh->ops = arp_direct_ops;
  7424. neigh->output = neigh->ops->queue_xmit;
  7425. return 0;
  7426. out:
  7427. return qeth_old_arp_constructor(neigh);
  7428. }
  7429. #endif /*CONFIG_QETH_IPV6*/
  7430. /*
  7431. * IP address takeover related functions
  7432. */
  7433. static void
  7434. qeth_clear_ipato_list(struct qeth_card *card)
  7435. {
  7436. struct qeth_ipato_entry *ipatoe, *tmp;
  7437. unsigned long flags;
  7438. spin_lock_irqsave(&card->ip_lock, flags);
  7439. list_for_each_entry_safe(ipatoe, tmp, &card->ipato.entries, entry) {
  7440. list_del(&ipatoe->entry);
  7441. kfree(ipatoe);
  7442. }
  7443. spin_unlock_irqrestore(&card->ip_lock, flags);
  7444. }
  7445. int
  7446. qeth_add_ipato_entry(struct qeth_card *card, struct qeth_ipato_entry *new)
  7447. {
  7448. struct qeth_ipato_entry *ipatoe;
  7449. unsigned long flags;
  7450. int rc = 0;
  7451. QETH_DBF_TEXT(trace, 2, "addipato");
  7452. spin_lock_irqsave(&card->ip_lock, flags);
  7453. list_for_each_entry(ipatoe, &card->ipato.entries, entry){
  7454. if (ipatoe->proto != new->proto)
  7455. continue;
  7456. if (!memcmp(ipatoe->addr, new->addr,
  7457. (ipatoe->proto == QETH_PROT_IPV4)? 4:16) &&
  7458. (ipatoe->mask_bits == new->mask_bits)){
  7459. PRINT_WARN("ipato entry already exists!\n");
  7460. rc = -EEXIST;
  7461. break;
  7462. }
  7463. }
  7464. if (!rc) {
  7465. list_add_tail(&new->entry, &card->ipato.entries);
  7466. }
  7467. spin_unlock_irqrestore(&card->ip_lock, flags);
  7468. return rc;
  7469. }
  7470. void
  7471. qeth_del_ipato_entry(struct qeth_card *card, enum qeth_prot_versions proto,
  7472. u8 *addr, int mask_bits)
  7473. {
  7474. struct qeth_ipato_entry *ipatoe, *tmp;
  7475. unsigned long flags;
  7476. QETH_DBF_TEXT(trace, 2, "delipato");
  7477. spin_lock_irqsave(&card->ip_lock, flags);
  7478. list_for_each_entry_safe(ipatoe, tmp, &card->ipato.entries, entry){
  7479. if (ipatoe->proto != proto)
  7480. continue;
  7481. if (!memcmp(ipatoe->addr, addr,
  7482. (proto == QETH_PROT_IPV4)? 4:16) &&
  7483. (ipatoe->mask_bits == mask_bits)){
  7484. list_del(&ipatoe->entry);
  7485. kfree(ipatoe);
  7486. }
  7487. }
  7488. spin_unlock_irqrestore(&card->ip_lock, flags);
  7489. }
  7490. static void
  7491. qeth_convert_addr_to_bits(u8 *addr, u8 *bits, int len)
  7492. {
  7493. int i, j;
  7494. u8 octet;
  7495. for (i = 0; i < len; ++i){
  7496. octet = addr[i];
  7497. for (j = 7; j >= 0; --j){
  7498. bits[i*8 + j] = octet & 1;
  7499. octet >>= 1;
  7500. }
  7501. }
  7502. }
  7503. static int
  7504. qeth_is_addr_covered_by_ipato(struct qeth_card *card, struct qeth_ipaddr *addr)
  7505. {
  7506. struct qeth_ipato_entry *ipatoe;
  7507. u8 addr_bits[128] = {0, };
  7508. u8 ipatoe_bits[128] = {0, };
  7509. int rc = 0;
  7510. if (!card->ipato.enabled)
  7511. return 0;
  7512. qeth_convert_addr_to_bits((u8 *) &addr->u, addr_bits,
  7513. (addr->proto == QETH_PROT_IPV4)? 4:16);
  7514. list_for_each_entry(ipatoe, &card->ipato.entries, entry){
  7515. if (addr->proto != ipatoe->proto)
  7516. continue;
  7517. qeth_convert_addr_to_bits(ipatoe->addr, ipatoe_bits,
  7518. (ipatoe->proto==QETH_PROT_IPV4) ?
  7519. 4:16);
  7520. if (addr->proto == QETH_PROT_IPV4)
  7521. rc = !memcmp(addr_bits, ipatoe_bits,
  7522. min(32, ipatoe->mask_bits));
  7523. else
  7524. rc = !memcmp(addr_bits, ipatoe_bits,
  7525. min(128, ipatoe->mask_bits));
  7526. if (rc)
  7527. break;
  7528. }
  7529. /* invert? */
  7530. if ((addr->proto == QETH_PROT_IPV4) && card->ipato.invert4)
  7531. rc = !rc;
  7532. else if ((addr->proto == QETH_PROT_IPV6) && card->ipato.invert6)
  7533. rc = !rc;
  7534. return rc;
  7535. }
  7536. /*
  7537. * VIPA related functions
  7538. */
  7539. int
  7540. qeth_add_vipa(struct qeth_card *card, enum qeth_prot_versions proto,
  7541. const u8 *addr)
  7542. {
  7543. struct qeth_ipaddr *ipaddr;
  7544. unsigned long flags;
  7545. int rc = 0;
  7546. ipaddr = qeth_get_addr_buffer(proto);
  7547. if (ipaddr){
  7548. if (proto == QETH_PROT_IPV4){
  7549. QETH_DBF_TEXT(trace, 2, "addvipa4");
  7550. memcpy(&ipaddr->u.a4.addr, addr, 4);
  7551. ipaddr->u.a4.mask = 0;
  7552. #ifdef CONFIG_QETH_IPV6
  7553. } else if (proto == QETH_PROT_IPV6){
  7554. QETH_DBF_TEXT(trace, 2, "addvipa6");
  7555. memcpy(&ipaddr->u.a6.addr, addr, 16);
  7556. ipaddr->u.a6.pfxlen = 0;
  7557. #endif
  7558. }
  7559. ipaddr->type = QETH_IP_TYPE_VIPA;
  7560. ipaddr->set_flags = QETH_IPA_SETIP_VIPA_FLAG;
  7561. ipaddr->del_flags = QETH_IPA_DELIP_VIPA_FLAG;
  7562. } else
  7563. return -ENOMEM;
  7564. spin_lock_irqsave(&card->ip_lock, flags);
  7565. if (__qeth_address_exists_in_list(&card->ip_list, ipaddr, 0) ||
  7566. __qeth_address_exists_in_list(card->ip_tbd_list, ipaddr, 0))
  7567. rc = -EEXIST;
  7568. spin_unlock_irqrestore(&card->ip_lock, flags);
  7569. if (rc){
  7570. PRINT_WARN("Cannot add VIPA. Address already exists!\n");
  7571. return rc;
  7572. }
  7573. if (!qeth_add_ip(card, ipaddr))
  7574. kfree(ipaddr);
  7575. qeth_set_ip_addr_list(card);
  7576. return rc;
  7577. }
  7578. void
  7579. qeth_del_vipa(struct qeth_card *card, enum qeth_prot_versions proto,
  7580. const u8 *addr)
  7581. {
  7582. struct qeth_ipaddr *ipaddr;
  7583. ipaddr = qeth_get_addr_buffer(proto);
  7584. if (ipaddr){
  7585. if (proto == QETH_PROT_IPV4){
  7586. QETH_DBF_TEXT(trace, 2, "delvipa4");
  7587. memcpy(&ipaddr->u.a4.addr, addr, 4);
  7588. ipaddr->u.a4.mask = 0;
  7589. #ifdef CONFIG_QETH_IPV6
  7590. } else if (proto == QETH_PROT_IPV6){
  7591. QETH_DBF_TEXT(trace, 2, "delvipa6");
  7592. memcpy(&ipaddr->u.a6.addr, addr, 16);
  7593. ipaddr->u.a6.pfxlen = 0;
  7594. #endif
  7595. }
  7596. ipaddr->type = QETH_IP_TYPE_VIPA;
  7597. } else
  7598. return;
  7599. if (!qeth_delete_ip(card, ipaddr))
  7600. kfree(ipaddr);
  7601. qeth_set_ip_addr_list(card);
  7602. }
  7603. /*
  7604. * proxy ARP related functions
  7605. */
  7606. int
  7607. qeth_add_rxip(struct qeth_card *card, enum qeth_prot_versions proto,
  7608. const u8 *addr)
  7609. {
  7610. struct qeth_ipaddr *ipaddr;
  7611. unsigned long flags;
  7612. int rc = 0;
  7613. ipaddr = qeth_get_addr_buffer(proto);
  7614. if (ipaddr){
  7615. if (proto == QETH_PROT_IPV4){
  7616. QETH_DBF_TEXT(trace, 2, "addrxip4");
  7617. memcpy(&ipaddr->u.a4.addr, addr, 4);
  7618. ipaddr->u.a4.mask = 0;
  7619. #ifdef CONFIG_QETH_IPV6
  7620. } else if (proto == QETH_PROT_IPV6){
  7621. QETH_DBF_TEXT(trace, 2, "addrxip6");
  7622. memcpy(&ipaddr->u.a6.addr, addr, 16);
  7623. ipaddr->u.a6.pfxlen = 0;
  7624. #endif
  7625. }
  7626. ipaddr->type = QETH_IP_TYPE_RXIP;
  7627. ipaddr->set_flags = QETH_IPA_SETIP_TAKEOVER_FLAG;
  7628. ipaddr->del_flags = 0;
  7629. } else
  7630. return -ENOMEM;
  7631. spin_lock_irqsave(&card->ip_lock, flags);
  7632. if (__qeth_address_exists_in_list(&card->ip_list, ipaddr, 0) ||
  7633. __qeth_address_exists_in_list(card->ip_tbd_list, ipaddr, 0))
  7634. rc = -EEXIST;
  7635. spin_unlock_irqrestore(&card->ip_lock, flags);
  7636. if (rc){
  7637. PRINT_WARN("Cannot add RXIP. Address already exists!\n");
  7638. return rc;
  7639. }
  7640. if (!qeth_add_ip(card, ipaddr))
  7641. kfree(ipaddr);
  7642. qeth_set_ip_addr_list(card);
  7643. return 0;
  7644. }
  7645. void
  7646. qeth_del_rxip(struct qeth_card *card, enum qeth_prot_versions proto,
  7647. const u8 *addr)
  7648. {
  7649. struct qeth_ipaddr *ipaddr;
  7650. ipaddr = qeth_get_addr_buffer(proto);
  7651. if (ipaddr){
  7652. if (proto == QETH_PROT_IPV4){
  7653. QETH_DBF_TEXT(trace, 2, "addrxip4");
  7654. memcpy(&ipaddr->u.a4.addr, addr, 4);
  7655. ipaddr->u.a4.mask = 0;
  7656. #ifdef CONFIG_QETH_IPV6
  7657. } else if (proto == QETH_PROT_IPV6){
  7658. QETH_DBF_TEXT(trace, 2, "addrxip6");
  7659. memcpy(&ipaddr->u.a6.addr, addr, 16);
  7660. ipaddr->u.a6.pfxlen = 0;
  7661. #endif
  7662. }
  7663. ipaddr->type = QETH_IP_TYPE_RXIP;
  7664. } else
  7665. return;
  7666. if (!qeth_delete_ip(card, ipaddr))
  7667. kfree(ipaddr);
  7668. qeth_set_ip_addr_list(card);
  7669. }
  7670. /**
  7671. * IP event handler
  7672. */
  7673. static int
  7674. qeth_ip_event(struct notifier_block *this,
  7675. unsigned long event,void *ptr)
  7676. {
  7677. struct in_ifaddr *ifa = (struct in_ifaddr *)ptr;
  7678. struct net_device *dev =(struct net_device *) ifa->ifa_dev->dev;
  7679. struct qeth_ipaddr *addr;
  7680. struct qeth_card *card;
  7681. QETH_DBF_TEXT(trace,3,"ipevent");
  7682. card = qeth_get_card_from_dev(dev);
  7683. if (!card)
  7684. return NOTIFY_DONE;
  7685. if (card->options.layer2)
  7686. return NOTIFY_DONE;
  7687. addr = qeth_get_addr_buffer(QETH_PROT_IPV4);
  7688. if (addr != NULL) {
  7689. addr->u.a4.addr = ifa->ifa_address;
  7690. addr->u.a4.mask = ifa->ifa_mask;
  7691. addr->type = QETH_IP_TYPE_NORMAL;
  7692. } else
  7693. goto out;
  7694. switch(event) {
  7695. case NETDEV_UP:
  7696. if (!qeth_add_ip(card, addr))
  7697. kfree(addr);
  7698. break;
  7699. case NETDEV_DOWN:
  7700. if (!qeth_delete_ip(card, addr))
  7701. kfree(addr);
  7702. break;
  7703. default:
  7704. break;
  7705. }
  7706. qeth_set_ip_addr_list(card);
  7707. out:
  7708. return NOTIFY_DONE;
  7709. }
  7710. static struct notifier_block qeth_ip_notifier = {
  7711. qeth_ip_event,
  7712. NULL,
  7713. };
  7714. #ifdef CONFIG_QETH_IPV6
  7715. /**
  7716. * IPv6 event handler
  7717. */
  7718. static int
  7719. qeth_ip6_event(struct notifier_block *this,
  7720. unsigned long event,void *ptr)
  7721. {
  7722. struct inet6_ifaddr *ifa = (struct inet6_ifaddr *)ptr;
  7723. struct net_device *dev = (struct net_device *)ifa->idev->dev;
  7724. struct qeth_ipaddr *addr;
  7725. struct qeth_card *card;
  7726. QETH_DBF_TEXT(trace,3,"ip6event");
  7727. card = qeth_get_card_from_dev(dev);
  7728. if (!card)
  7729. return NOTIFY_DONE;
  7730. if (!qeth_is_supported(card, IPA_IPV6))
  7731. return NOTIFY_DONE;
  7732. addr = qeth_get_addr_buffer(QETH_PROT_IPV6);
  7733. if (addr != NULL) {
  7734. memcpy(&addr->u.a6.addr, &ifa->addr, sizeof(struct in6_addr));
  7735. addr->u.a6.pfxlen = ifa->prefix_len;
  7736. addr->type = QETH_IP_TYPE_NORMAL;
  7737. } else
  7738. goto out;
  7739. switch(event) {
  7740. case NETDEV_UP:
  7741. if (!qeth_add_ip(card, addr))
  7742. kfree(addr);
  7743. break;
  7744. case NETDEV_DOWN:
  7745. if (!qeth_delete_ip(card, addr))
  7746. kfree(addr);
  7747. break;
  7748. default:
  7749. break;
  7750. }
  7751. qeth_set_ip_addr_list(card);
  7752. out:
  7753. return NOTIFY_DONE;
  7754. }
  7755. static struct notifier_block qeth_ip6_notifier = {
  7756. qeth_ip6_event,
  7757. NULL,
  7758. };
  7759. #endif
  7760. static int
  7761. __qeth_reboot_event_card(struct device *dev, void *data)
  7762. {
  7763. struct qeth_card *card;
  7764. card = (struct qeth_card *) dev->driver_data;
  7765. qeth_clear_ip_list(card, 0, 0);
  7766. qeth_qdio_clear_card(card, 0);
  7767. qeth_clear_qdio_buffers(card);
  7768. return 0;
  7769. }
  7770. static int
  7771. qeth_reboot_event(struct notifier_block *this, unsigned long event, void *ptr)
  7772. {
  7773. int ret;
  7774. ret = driver_for_each_device(&qeth_ccwgroup_driver.driver, NULL, NULL,
  7775. __qeth_reboot_event_card);
  7776. return ret ? NOTIFY_BAD : NOTIFY_DONE;
  7777. }
  7778. static struct notifier_block qeth_reboot_notifier = {
  7779. qeth_reboot_event,
  7780. NULL,
  7781. };
  7782. static int
  7783. qeth_register_notifiers(void)
  7784. {
  7785. int r;
  7786. QETH_DBF_TEXT(trace,5,"regnotif");
  7787. if ((r = register_reboot_notifier(&qeth_reboot_notifier)))
  7788. return r;
  7789. if ((r = register_inetaddr_notifier(&qeth_ip_notifier)))
  7790. goto out_reboot;
  7791. #ifdef CONFIG_QETH_IPV6
  7792. if ((r = register_inet6addr_notifier(&qeth_ip6_notifier)))
  7793. goto out_ipv4;
  7794. #endif
  7795. return 0;
  7796. #ifdef CONFIG_QETH_IPV6
  7797. out_ipv4:
  7798. unregister_inetaddr_notifier(&qeth_ip_notifier);
  7799. #endif
  7800. out_reboot:
  7801. unregister_reboot_notifier(&qeth_reboot_notifier);
  7802. return r;
  7803. }
  7804. /**
  7805. * unregister all event notifiers
  7806. */
  7807. static void
  7808. qeth_unregister_notifiers(void)
  7809. {
  7810. QETH_DBF_TEXT(trace,5,"unregnot");
  7811. BUG_ON(unregister_reboot_notifier(&qeth_reboot_notifier));
  7812. BUG_ON(unregister_inetaddr_notifier(&qeth_ip_notifier));
  7813. #ifdef CONFIG_QETH_IPV6
  7814. BUG_ON(unregister_inet6addr_notifier(&qeth_ip6_notifier));
  7815. #endif /* QETH_IPV6 */
  7816. }
  7817. #ifdef CONFIG_QETH_IPV6
  7818. static int
  7819. qeth_ipv6_init(void)
  7820. {
  7821. qeth_old_arp_constructor = arp_tbl.constructor;
  7822. write_lock_bh(&arp_tbl.lock);
  7823. arp_tbl.constructor = qeth_arp_constructor;
  7824. write_unlock_bh(&arp_tbl.lock);
  7825. arp_direct_ops = (struct neigh_ops*)
  7826. kmalloc(sizeof(struct neigh_ops), GFP_KERNEL);
  7827. if (!arp_direct_ops)
  7828. return -ENOMEM;
  7829. memcpy(arp_direct_ops, &arp_direct_ops_template,
  7830. sizeof(struct neigh_ops));
  7831. return 0;
  7832. }
  7833. static void
  7834. qeth_ipv6_uninit(void)
  7835. {
  7836. write_lock_bh(&arp_tbl.lock);
  7837. arp_tbl.constructor = qeth_old_arp_constructor;
  7838. write_unlock_bh(&arp_tbl.lock);
  7839. kfree(arp_direct_ops);
  7840. }
  7841. #endif /* CONFIG_QETH_IPV6 */
  7842. static void
  7843. qeth_sysfs_unregister(void)
  7844. {
  7845. s390_root_dev_unregister(qeth_root_dev);
  7846. qeth_remove_driver_attributes();
  7847. ccw_driver_unregister(&qeth_ccw_driver);
  7848. ccwgroup_driver_unregister(&qeth_ccwgroup_driver);
  7849. }
  7850. /**
  7851. * register qeth at sysfs
  7852. */
  7853. static int
  7854. qeth_sysfs_register(void)
  7855. {
  7856. int rc;
  7857. rc = ccwgroup_driver_register(&qeth_ccwgroup_driver);
  7858. if (rc)
  7859. goto out;
  7860. rc = ccw_driver_register(&qeth_ccw_driver);
  7861. if (rc)
  7862. goto out_ccw_driver;
  7863. rc = qeth_create_driver_attributes();
  7864. if (rc)
  7865. goto out_qeth_attr;
  7866. qeth_root_dev = s390_root_dev_register("qeth");
  7867. rc = IS_ERR(qeth_root_dev) ? PTR_ERR(qeth_root_dev) : 0;
  7868. if (!rc)
  7869. goto out;
  7870. qeth_remove_driver_attributes();
  7871. out_qeth_attr:
  7872. ccw_driver_unregister(&qeth_ccw_driver);
  7873. out_ccw_driver:
  7874. ccwgroup_driver_unregister(&qeth_ccwgroup_driver);
  7875. out:
  7876. return rc;
  7877. }
  7878. /***
  7879. * init function
  7880. */
  7881. static int __init
  7882. qeth_init(void)
  7883. {
  7884. int rc;
  7885. PRINT_INFO("loading %s\n", version);
  7886. INIT_LIST_HEAD(&qeth_card_list.list);
  7887. INIT_LIST_HEAD(&qeth_notify_list);
  7888. spin_lock_init(&qeth_notify_lock);
  7889. rwlock_init(&qeth_card_list.rwlock);
  7890. rc = qeth_register_dbf_views();
  7891. if (rc)
  7892. goto out_err;
  7893. rc = qeth_sysfs_register();
  7894. if (rc)
  7895. goto out_dbf;
  7896. #ifdef CONFIG_QETH_IPV6
  7897. rc = qeth_ipv6_init();
  7898. if (rc) {
  7899. PRINT_ERR("Out of memory during ipv6 init code = %d\n", rc);
  7900. goto out_sysfs;
  7901. }
  7902. #endif /* QETH_IPV6 */
  7903. rc = qeth_register_notifiers();
  7904. if (rc)
  7905. goto out_ipv6;
  7906. rc = qeth_create_procfs_entries();
  7907. if (rc)
  7908. goto out_notifiers;
  7909. return rc;
  7910. out_notifiers:
  7911. qeth_unregister_notifiers();
  7912. out_ipv6:
  7913. #ifdef CONFIG_QETH_IPV6
  7914. qeth_ipv6_uninit();
  7915. out_sysfs:
  7916. #endif /* QETH_IPV6 */
  7917. qeth_sysfs_unregister();
  7918. out_dbf:
  7919. qeth_unregister_dbf_views();
  7920. out_err:
  7921. PRINT_ERR("Initialization failed with code %d\n", rc);
  7922. return rc;
  7923. }
  7924. static void
  7925. __exit qeth_exit(void)
  7926. {
  7927. struct qeth_card *card, *tmp;
  7928. unsigned long flags;
  7929. QETH_DBF_TEXT(trace,1, "cleanup.");
  7930. /*
  7931. * Weed would not need to clean up our devices here, because the
  7932. * common device layer calls qeth_remove_device for each device
  7933. * as soon as we unregister our driver (done in qeth_sysfs_unregister).
  7934. * But we do cleanup here so we can do a "soft" shutdown of our cards.
  7935. * qeth_remove_device called by the common device layer would otherwise
  7936. * do a "hard" shutdown (card->use_hard_stop is set to one in
  7937. * qeth_remove_device).
  7938. */
  7939. again:
  7940. read_lock_irqsave(&qeth_card_list.rwlock, flags);
  7941. list_for_each_entry_safe(card, tmp, &qeth_card_list.list, list){
  7942. read_unlock_irqrestore(&qeth_card_list.rwlock, flags);
  7943. qeth_set_offline(card->gdev);
  7944. qeth_remove_device(card->gdev);
  7945. goto again;
  7946. }
  7947. read_unlock_irqrestore(&qeth_card_list.rwlock, flags);
  7948. #ifdef CONFIG_QETH_IPV6
  7949. qeth_ipv6_uninit();
  7950. #endif
  7951. qeth_unregister_notifiers();
  7952. qeth_remove_procfs_entries();
  7953. qeth_sysfs_unregister();
  7954. qeth_unregister_dbf_views();
  7955. printk("qeth: removed\n");
  7956. }
  7957. EXPORT_SYMBOL(qeth_osn_register);
  7958. EXPORT_SYMBOL(qeth_osn_deregister);
  7959. EXPORT_SYMBOL(qeth_osn_assist);
  7960. module_init(qeth_init);
  7961. module_exit(qeth_exit);
  7962. MODULE_AUTHOR("Frank Pavlic <fpavlic@de.ibm.com>");
  7963. MODULE_DESCRIPTION("Linux on zSeries OSA Express and HiperSockets support\n" \
  7964. "Copyright 2000,2003 IBM Corporation\n");
  7965. MODULE_LICENSE("GPL");