tc35815.c 88 KB

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  1. /*
  2. * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
  3. *
  4. * Based on skelton.c by Donald Becker.
  5. *
  6. * This driver is a replacement of older and less maintained version.
  7. * This is a header of the older version:
  8. * -----<snip>-----
  9. * Copyright 2001 MontaVista Software Inc.
  10. * Author: MontaVista Software, Inc.
  11. * ahennessy@mvista.com
  12. * Copyright (C) 2000-2001 Toshiba Corporation
  13. * static const char *version =
  14. * "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
  15. * -----<snip>-----
  16. *
  17. * This file is subject to the terms and conditions of the GNU General Public
  18. * License. See the file "COPYING" in the main directory of this archive
  19. * for more details.
  20. *
  21. * (C) Copyright TOSHIBA CORPORATION 2004-2005
  22. * All Rights Reserved.
  23. */
  24. #ifdef TC35815_NAPI
  25. #define DRV_VERSION "1.36-NAPI"
  26. #else
  27. #define DRV_VERSION "1.36"
  28. #endif
  29. static const char *version = "tc35815.c:v" DRV_VERSION "\n";
  30. #define MODNAME "tc35815"
  31. #include <linux/module.h>
  32. #include <linux/kernel.h>
  33. #include <linux/types.h>
  34. #include <linux/fcntl.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/ioport.h>
  37. #include <linux/in.h>
  38. #include <linux/slab.h>
  39. #include <linux/string.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/errno.h>
  42. #include <linux/init.h>
  43. #include <linux/netdevice.h>
  44. #include <linux/etherdevice.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/delay.h>
  47. #include <linux/pci.h>
  48. #include <linux/mii.h>
  49. #include <linux/ethtool.h>
  50. #include <linux/platform_device.h>
  51. #include <asm/io.h>
  52. #include <asm/byteorder.h>
  53. /* First, a few definitions that the brave might change. */
  54. #define GATHER_TXINT /* On-Demand Tx Interrupt */
  55. #define WORKAROUND_LOSTCAR
  56. #define WORKAROUND_100HALF_PROMISC
  57. /* #define TC35815_USE_PACKEDBUFFER */
  58. typedef enum {
  59. TC35815CF = 0,
  60. TC35815_NWU,
  61. TC35815_TX4939,
  62. } board_t;
  63. /* indexed by board_t, above */
  64. static const struct {
  65. const char *name;
  66. } board_info[] __devinitdata = {
  67. { "TOSHIBA TC35815CF 10/100BaseTX" },
  68. { "TOSHIBA TC35815 with Wake on LAN" },
  69. { "TOSHIBA TC35815/TX4939" },
  70. };
  71. static const struct pci_device_id tc35815_pci_tbl[] = {
  72. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
  73. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
  74. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
  75. {0,}
  76. };
  77. MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl);
  78. /* see MODULE_PARM_DESC */
  79. static struct tc35815_options {
  80. int speed;
  81. int duplex;
  82. int doforce;
  83. } options;
  84. /*
  85. * Registers
  86. */
  87. struct tc35815_regs {
  88. volatile __u32 DMA_Ctl; /* 0x00 */
  89. volatile __u32 TxFrmPtr;
  90. volatile __u32 TxThrsh;
  91. volatile __u32 TxPollCtr;
  92. volatile __u32 BLFrmPtr;
  93. volatile __u32 RxFragSize;
  94. volatile __u32 Int_En;
  95. volatile __u32 FDA_Bas;
  96. volatile __u32 FDA_Lim; /* 0x20 */
  97. volatile __u32 Int_Src;
  98. volatile __u32 unused0[2];
  99. volatile __u32 PauseCnt;
  100. volatile __u32 RemPauCnt;
  101. volatile __u32 TxCtlFrmStat;
  102. volatile __u32 unused1;
  103. volatile __u32 MAC_Ctl; /* 0x40 */
  104. volatile __u32 CAM_Ctl;
  105. volatile __u32 Tx_Ctl;
  106. volatile __u32 Tx_Stat;
  107. volatile __u32 Rx_Ctl;
  108. volatile __u32 Rx_Stat;
  109. volatile __u32 MD_Data;
  110. volatile __u32 MD_CA;
  111. volatile __u32 CAM_Adr; /* 0x60 */
  112. volatile __u32 CAM_Data;
  113. volatile __u32 CAM_Ena;
  114. volatile __u32 PROM_Ctl;
  115. volatile __u32 PROM_Data;
  116. volatile __u32 Algn_Cnt;
  117. volatile __u32 CRC_Cnt;
  118. volatile __u32 Miss_Cnt;
  119. };
  120. /*
  121. * Bit assignments
  122. */
  123. /* DMA_Ctl bit asign ------------------------------------------------------- */
  124. #define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */
  125. #define DMA_RxAlign_1 0x00400000
  126. #define DMA_RxAlign_2 0x00800000
  127. #define DMA_RxAlign_3 0x00c00000
  128. #define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */
  129. #define DMA_IntMask 0x00040000 /* 1:Interupt mask */
  130. #define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */
  131. #define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */
  132. #define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */
  133. #define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */
  134. #define DMA_TestMode 0x00002000 /* 1:Test Mode */
  135. #define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */
  136. #define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */
  137. /* RxFragSize bit asign ---------------------------------------------------- */
  138. #define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */
  139. #define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */
  140. /* MAC_Ctl bit asign ------------------------------------------------------- */
  141. #define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */
  142. #define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */
  143. #define MAC_MissRoll 0x00000400 /* 1:Missed Roll */
  144. #define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */
  145. #define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */
  146. #define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/
  147. #define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */
  148. #define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */
  149. #define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */
  150. #define MAC_Reset 0x00000004 /* 1:Software Reset */
  151. #define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */
  152. #define MAC_HaltReq 0x00000001 /* 1:Halt request */
  153. /* PROM_Ctl bit asign ------------------------------------------------------ */
  154. #define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */
  155. #define PROM_Read 0x00004000 /*10:Read operation */
  156. #define PROM_Write 0x00002000 /*01:Write operation */
  157. #define PROM_Erase 0x00006000 /*11:Erase operation */
  158. /*00:Enable or Disable Writting, */
  159. /* as specified in PROM_Addr. */
  160. #define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */
  161. /*00xxxx: disable */
  162. /* CAM_Ctl bit asign ------------------------------------------------------- */
  163. #define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */
  164. #define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/
  165. /* accept other */
  166. #define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */
  167. #define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */
  168. #define CAM_StationAcc 0x00000001 /* 1:unicast accept */
  169. /* CAM_Ena bit asign ------------------------------------------------------- */
  170. #define CAM_ENTRY_MAX 21 /* CAM Data entry max count */
  171. #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */
  172. #define CAM_Ena_Bit(index) (1<<(index))
  173. #define CAM_ENTRY_DESTINATION 0
  174. #define CAM_ENTRY_SOURCE 1
  175. #define CAM_ENTRY_MACCTL 20
  176. /* Tx_Ctl bit asign -------------------------------------------------------- */
  177. #define Tx_En 0x00000001 /* 1:Transmit enable */
  178. #define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */
  179. #define Tx_NoPad 0x00000004 /* 1:Suppress Padding */
  180. #define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */
  181. #define Tx_FBack 0x00000010 /* 1:Fast Back-off */
  182. #define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */
  183. #define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */
  184. #define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */
  185. #define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */
  186. #define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */
  187. #define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */
  188. #define Tx_EnComp 0x00004000 /* 1:Enable Completion */
  189. /* Tx_Stat bit asign ------------------------------------------------------- */
  190. #define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */
  191. #define Tx_ExColl 0x00000010 /* Excessive Collision */
  192. #define Tx_TXDefer 0x00000020 /* Transmit Defered */
  193. #define Tx_Paused 0x00000040 /* Transmit Paused */
  194. #define Tx_IntTx 0x00000080 /* Interrupt on Tx */
  195. #define Tx_Under 0x00000100 /* Underrun */
  196. #define Tx_Defer 0x00000200 /* Deferral */
  197. #define Tx_NCarr 0x00000400 /* No Carrier */
  198. #define Tx_10Stat 0x00000800 /* 10Mbps Status */
  199. #define Tx_LateColl 0x00001000 /* Late Collision */
  200. #define Tx_TxPar 0x00002000 /* Tx Parity Error */
  201. #define Tx_Comp 0x00004000 /* Completion */
  202. #define Tx_Halted 0x00008000 /* Tx Halted */
  203. #define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */
  204. /* Rx_Ctl bit asign -------------------------------------------------------- */
  205. #define Rx_EnGood 0x00004000 /* 1:Enable Good */
  206. #define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */
  207. #define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */
  208. #define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */
  209. #define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */
  210. #define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */
  211. #define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */
  212. #define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */
  213. #define Rx_ShortEn 0x00000008 /* 1:Short Enable */
  214. #define Rx_LongEn 0x00000004 /* 1:Long Enable */
  215. #define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */
  216. #define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */
  217. /* Rx_Stat bit asign ------------------------------------------------------- */
  218. #define Rx_Halted 0x00008000 /* Rx Halted */
  219. #define Rx_Good 0x00004000 /* Rx Good */
  220. #define Rx_RxPar 0x00002000 /* Rx Parity Error */
  221. /* 0x00001000 not use */
  222. #define Rx_LongErr 0x00000800 /* Rx Long Error */
  223. #define Rx_Over 0x00000400 /* Rx Overflow */
  224. #define Rx_CRCErr 0x00000200 /* Rx CRC Error */
  225. #define Rx_Align 0x00000100 /* Rx Alignment Error */
  226. #define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */
  227. #define Rx_IntRx 0x00000040 /* Rx Interrupt */
  228. #define Rx_CtlRecd 0x00000020 /* Rx Control Receive */
  229. #define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */
  230. /* Int_En bit asign -------------------------------------------------------- */
  231. #define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */
  232. #define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Control Complete Enable */
  233. #define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */
  234. #define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */
  235. #define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */
  236. #define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */
  237. #define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */
  238. #define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */
  239. #define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */
  240. #define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */
  241. #define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */
  242. #define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */
  243. /* Exhausted Enable */
  244. /* Int_Src bit asign ------------------------------------------------------- */
  245. #define Int_NRabt 0x00004000 /* 1:Non Recoverable error */
  246. #define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */
  247. #define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */
  248. #define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */
  249. #define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */
  250. #define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */
  251. #define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */
  252. #define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */
  253. #define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */
  254. #define Int_SWInt 0x00000020 /* 1:Software request & Clear */
  255. #define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */
  256. #define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */
  257. #define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */
  258. #define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */
  259. #define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */
  260. /* MD_CA bit asign --------------------------------------------------------- */
  261. #define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */
  262. #define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */
  263. #define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */
  264. /*
  265. * Descriptors
  266. */
  267. /* Frame descripter */
  268. struct FDesc {
  269. volatile __u32 FDNext;
  270. volatile __u32 FDSystem;
  271. volatile __u32 FDStat;
  272. volatile __u32 FDCtl;
  273. };
  274. /* Buffer descripter */
  275. struct BDesc {
  276. volatile __u32 BuffData;
  277. volatile __u32 BDCtl;
  278. };
  279. #define FD_ALIGN 16
  280. /* Frame Descripter bit asign ---------------------------------------------- */
  281. #define FD_FDLength_MASK 0x0000FFFF /* Length MASK */
  282. #define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */
  283. #define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */
  284. #define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */
  285. #define FD_FrmOpt_IntTx 0x20000000 /* Tx only */
  286. #define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */
  287. #define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */
  288. #define FD_FrmOpt_Packing 0x04000000 /* Rx only */
  289. #define FD_CownsFD 0x80000000 /* FD Controller owner bit */
  290. #define FD_Next_EOL 0x00000001 /* FD EOL indicator */
  291. #define FD_BDCnt_SHIFT 16
  292. /* Buffer Descripter bit asign --------------------------------------------- */
  293. #define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */
  294. #define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */
  295. #define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */
  296. #define BD_CownsBD 0x80000000 /* BD Controller owner bit */
  297. #define BD_RxBDID_SHIFT 16
  298. #define BD_RxBDSeqN_SHIFT 24
  299. /* Some useful constants. */
  300. #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
  301. #ifdef NO_CHECK_CARRIER
  302. #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
  303. Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
  304. Tx_En) /* maybe 0x7b01 */
  305. #else
  306. #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
  307. Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
  308. Tx_En) /* maybe 0x7b01 */
  309. #endif
  310. #define RX_CTL_CMD (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
  311. | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) /* maybe 0x6f01 */
  312. #define INT_EN_CMD (Int_NRAbtEn | \
  313. Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
  314. Int_SSysErrEn | Int_RMasAbtEn | Int_RTargAbtEn | \
  315. Int_STargAbtEn | \
  316. Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/
  317. #define DMA_CTL_CMD DMA_BURST_SIZE
  318. #define HAVE_DMA_RXALIGN(lp) likely((lp)->boardtype != TC35815CF)
  319. /* Tuning parameters */
  320. #define DMA_BURST_SIZE 32
  321. #define TX_THRESHOLD 1024
  322. #define TX_THRESHOLD_MAX 1536 /* used threshold with packet max byte for low pci transfer ability.*/
  323. #define TX_THRESHOLD_KEEP_LIMIT 10 /* setting threshold max value when overrun error occured this count. */
  324. /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
  325. #ifdef TC35815_USE_PACKEDBUFFER
  326. #define FD_PAGE_NUM 2
  327. #define RX_BUF_NUM 8 /* >= 2 */
  328. #define RX_FD_NUM 250 /* >= 32 */
  329. #define TX_FD_NUM 128
  330. #define RX_BUF_SIZE PAGE_SIZE
  331. #else /* TC35815_USE_PACKEDBUFFER */
  332. #define FD_PAGE_NUM 4
  333. #define RX_BUF_NUM 128 /* < 256 */
  334. #define RX_FD_NUM 256 /* >= 32 */
  335. #define TX_FD_NUM 128
  336. #if RX_CTL_CMD & Rx_LongEn
  337. #define RX_BUF_SIZE PAGE_SIZE
  338. #elif RX_CTL_CMD & Rx_StripCRC
  339. #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */
  340. #else
  341. #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */
  342. #endif
  343. #endif /* TC35815_USE_PACKEDBUFFER */
  344. #define RX_FD_RESERVE (2 / 2) /* max 2 BD per RxFD */
  345. #define NAPI_WEIGHT 16
  346. struct TxFD {
  347. struct FDesc fd;
  348. struct BDesc bd;
  349. struct BDesc unused;
  350. };
  351. struct RxFD {
  352. struct FDesc fd;
  353. struct BDesc bd[0]; /* variable length */
  354. };
  355. struct FrFD {
  356. struct FDesc fd;
  357. struct BDesc bd[RX_BUF_NUM];
  358. };
  359. #define tc_readl(addr) readl(addr)
  360. #define tc_writel(d, addr) writel(d, addr)
  361. #define TC35815_TX_TIMEOUT msecs_to_jiffies(400)
  362. /* Timer state engine. */
  363. enum tc35815_timer_state {
  364. arbwait = 0, /* Waiting for auto negotiation to complete. */
  365. lupwait = 1, /* Auto-neg complete, awaiting link-up status. */
  366. ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */
  367. asleep = 3, /* Time inactive. */
  368. lcheck = 4, /* Check link status. */
  369. };
  370. /* Information that need to be kept for each board. */
  371. struct tc35815_local {
  372. struct pci_dev *pci_dev;
  373. /* statistics */
  374. struct net_device_stats stats;
  375. struct {
  376. int max_tx_qlen;
  377. int tx_ints;
  378. int rx_ints;
  379. int tx_underrun;
  380. } lstats;
  381. /* Tx control lock. This protects the transmit buffer ring
  382. * state along with the "tx full" state of the driver. This
  383. * means all netif_queue flow control actions are protected
  384. * by this lock as well.
  385. */
  386. spinlock_t lock;
  387. int phy_addr;
  388. int fullduplex;
  389. unsigned short saved_lpa;
  390. struct timer_list timer;
  391. enum tc35815_timer_state timer_state; /* State of auto-neg timer. */
  392. unsigned int timer_ticks; /* Number of clicks at each state */
  393. /*
  394. * Transmitting: Batch Mode.
  395. * 1 BD in 1 TxFD.
  396. * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
  397. * 1 circular FD for Free Buffer List.
  398. * RX_BUF_NUM BD in Free Buffer FD.
  399. * One Free Buffer BD has PAGE_SIZE data buffer.
  400. * Or Non-Packing Mode.
  401. * 1 circular FD for Free Buffer List.
  402. * RX_BUF_NUM BD in Free Buffer FD.
  403. * One Free Buffer BD has ETH_FRAME_LEN data buffer.
  404. */
  405. void * fd_buf; /* for TxFD, RxFD, FrFD */
  406. dma_addr_t fd_buf_dma;
  407. struct TxFD *tfd_base;
  408. unsigned int tfd_start;
  409. unsigned int tfd_end;
  410. struct RxFD *rfd_base;
  411. struct RxFD *rfd_limit;
  412. struct RxFD *rfd_cur;
  413. struct FrFD *fbl_ptr;
  414. #ifdef TC35815_USE_PACKEDBUFFER
  415. unsigned char fbl_curid;
  416. void * data_buf[RX_BUF_NUM]; /* packing */
  417. dma_addr_t data_buf_dma[RX_BUF_NUM];
  418. struct {
  419. struct sk_buff *skb;
  420. dma_addr_t skb_dma;
  421. } tx_skbs[TX_FD_NUM];
  422. #else
  423. unsigned int fbl_count;
  424. struct {
  425. struct sk_buff *skb;
  426. dma_addr_t skb_dma;
  427. } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
  428. #endif
  429. struct mii_if_info mii;
  430. unsigned short mii_id[2];
  431. u32 msg_enable;
  432. board_t boardtype;
  433. };
  434. static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
  435. {
  436. return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
  437. }
  438. #ifdef DEBUG
  439. static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
  440. {
  441. return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
  442. }
  443. #endif
  444. #ifdef TC35815_USE_PACKEDBUFFER
  445. static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
  446. {
  447. int i;
  448. for (i = 0; i < RX_BUF_NUM; i++) {
  449. if (bus >= lp->data_buf_dma[i] &&
  450. bus < lp->data_buf_dma[i] + PAGE_SIZE)
  451. return (void *)((u8 *)lp->data_buf[i] +
  452. (bus - lp->data_buf_dma[i]));
  453. }
  454. return NULL;
  455. }
  456. #define TC35815_DMA_SYNC_ONDEMAND
  457. static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
  458. {
  459. #ifdef TC35815_DMA_SYNC_ONDEMAND
  460. void *buf;
  461. /* pci_map + pci_dma_sync will be more effective than
  462. * pci_alloc_consistent on some archs. */
  463. if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL)
  464. return NULL;
  465. *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
  466. PCI_DMA_FROMDEVICE);
  467. if (pci_dma_mapping_error(*dma_handle)) {
  468. free_page((unsigned long)buf);
  469. return NULL;
  470. }
  471. return buf;
  472. #else
  473. return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
  474. #endif
  475. }
  476. static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
  477. {
  478. #ifdef TC35815_DMA_SYNC_ONDEMAND
  479. pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
  480. free_page((unsigned long)buf);
  481. #else
  482. pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
  483. #endif
  484. }
  485. #else /* TC35815_USE_PACKEDBUFFER */
  486. static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
  487. struct pci_dev *hwdev,
  488. dma_addr_t *dma_handle)
  489. {
  490. struct sk_buff *skb;
  491. skb = dev_alloc_skb(RX_BUF_SIZE);
  492. if (!skb)
  493. return NULL;
  494. *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
  495. PCI_DMA_FROMDEVICE);
  496. if (pci_dma_mapping_error(*dma_handle)) {
  497. dev_kfree_skb_any(skb);
  498. return NULL;
  499. }
  500. skb_reserve(skb, 2); /* make IP header 4byte aligned */
  501. return skb;
  502. }
  503. static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
  504. {
  505. pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
  506. PCI_DMA_FROMDEVICE);
  507. dev_kfree_skb_any(skb);
  508. }
  509. #endif /* TC35815_USE_PACKEDBUFFER */
  510. /* Index to functions, as function prototypes. */
  511. static int tc35815_open(struct net_device *dev);
  512. static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
  513. static irqreturn_t tc35815_interrupt(int irq, void *dev_id);
  514. #ifdef TC35815_NAPI
  515. static int tc35815_rx(struct net_device *dev, int limit);
  516. static int tc35815_poll(struct net_device *dev, int *budget);
  517. #else
  518. static void tc35815_rx(struct net_device *dev);
  519. #endif
  520. static void tc35815_txdone(struct net_device *dev);
  521. static int tc35815_close(struct net_device *dev);
  522. static struct net_device_stats *tc35815_get_stats(struct net_device *dev);
  523. static void tc35815_set_multicast_list(struct net_device *dev);
  524. static void tc35815_tx_timeout(struct net_device *dev);
  525. static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
  526. #ifdef CONFIG_NET_POLL_CONTROLLER
  527. static void tc35815_poll_controller(struct net_device *dev);
  528. #endif
  529. static const struct ethtool_ops tc35815_ethtool_ops;
  530. /* Example routines you must write ;->. */
  531. static void tc35815_chip_reset(struct net_device *dev);
  532. static void tc35815_chip_init(struct net_device *dev);
  533. static void tc35815_find_phy(struct net_device *dev);
  534. static void tc35815_phy_chip_init(struct net_device *dev);
  535. #ifdef DEBUG
  536. static void panic_queues(struct net_device *dev);
  537. #endif
  538. static void tc35815_timer(unsigned long data);
  539. static void tc35815_start_auto_negotiation(struct net_device *dev,
  540. struct ethtool_cmd *ep);
  541. static int tc_mdio_read(struct net_device *dev, int phy_id, int location);
  542. static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
  543. int val);
  544. #ifdef CONFIG_CPU_TX49XX
  545. /*
  546. * Find a platform_device providing a MAC address. The platform code
  547. * should provide a "tc35815-mac" device with a MAC address in its
  548. * platform_data.
  549. */
  550. static int __devinit tc35815_mac_match(struct device *dev, void *data)
  551. {
  552. struct platform_device *plat_dev = to_platform_device(dev);
  553. struct pci_dev *pci_dev = data;
  554. unsigned int id = (pci_dev->bus->number << 8) | pci_dev->devfn;
  555. return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id;
  556. }
  557. static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
  558. {
  559. struct tc35815_local *lp = dev->priv;
  560. struct device *pd = bus_find_device(&platform_bus_type, NULL,
  561. lp->pci_dev, tc35815_mac_match);
  562. if (pd) {
  563. if (pd->platform_data)
  564. memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN);
  565. put_device(pd);
  566. return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV;
  567. }
  568. return -ENODEV;
  569. }
  570. #else
  571. static int __devinit tc35815_read_plat_dev_addr(struct device *dev)
  572. {
  573. return -ENODEV;
  574. }
  575. #endif
  576. static int __devinit tc35815_init_dev_addr (struct net_device *dev)
  577. {
  578. struct tc35815_regs __iomem *tr =
  579. (struct tc35815_regs __iomem *)dev->base_addr;
  580. int i;
  581. while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
  582. ;
  583. for (i = 0; i < 6; i += 2) {
  584. unsigned short data;
  585. tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
  586. while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
  587. ;
  588. data = tc_readl(&tr->PROM_Data);
  589. dev->dev_addr[i] = data & 0xff;
  590. dev->dev_addr[i+1] = data >> 8;
  591. }
  592. if (!is_valid_ether_addr(dev->dev_addr))
  593. return tc35815_read_plat_dev_addr(dev);
  594. return 0;
  595. }
  596. static int __devinit tc35815_init_one (struct pci_dev *pdev,
  597. const struct pci_device_id *ent)
  598. {
  599. void __iomem *ioaddr = NULL;
  600. struct net_device *dev;
  601. struct tc35815_local *lp;
  602. int rc;
  603. unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
  604. static int printed_version;
  605. if (!printed_version++) {
  606. printk(version);
  607. dev_printk(KERN_DEBUG, &pdev->dev,
  608. "speed:%d duplex:%d doforce:%d\n",
  609. options.speed, options.duplex, options.doforce);
  610. }
  611. if (!pdev->irq) {
  612. dev_warn(&pdev->dev, "no IRQ assigned.\n");
  613. return -ENODEV;
  614. }
  615. /* dev zeroed in alloc_etherdev */
  616. dev = alloc_etherdev (sizeof (*lp));
  617. if (dev == NULL) {
  618. dev_err(&pdev->dev, "unable to alloc new ethernet\n");
  619. return -ENOMEM;
  620. }
  621. SET_MODULE_OWNER(dev);
  622. SET_NETDEV_DEV(dev, &pdev->dev);
  623. lp = dev->priv;
  624. /* enable device (incl. PCI PM wakeup), and bus-mastering */
  625. rc = pci_enable_device (pdev);
  626. if (rc)
  627. goto err_out;
  628. mmio_start = pci_resource_start (pdev, 1);
  629. mmio_end = pci_resource_end (pdev, 1);
  630. mmio_flags = pci_resource_flags (pdev, 1);
  631. mmio_len = pci_resource_len (pdev, 1);
  632. /* set this immediately, we need to know before
  633. * we talk to the chip directly */
  634. /* make sure PCI base addr 1 is MMIO */
  635. if (!(mmio_flags & IORESOURCE_MEM)) {
  636. dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
  637. rc = -ENODEV;
  638. goto err_out;
  639. }
  640. /* check for weird/broken PCI region reporting */
  641. if ((mmio_len < sizeof(struct tc35815_regs))) {
  642. dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n");
  643. rc = -ENODEV;
  644. goto err_out;
  645. }
  646. rc = pci_request_regions (pdev, MODNAME);
  647. if (rc)
  648. goto err_out;
  649. pci_set_master (pdev);
  650. /* ioremap MMIO region */
  651. ioaddr = ioremap (mmio_start, mmio_len);
  652. if (ioaddr == NULL) {
  653. dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
  654. rc = -EIO;
  655. goto err_out_free_res;
  656. }
  657. /* Initialize the device structure. */
  658. dev->open = tc35815_open;
  659. dev->hard_start_xmit = tc35815_send_packet;
  660. dev->stop = tc35815_close;
  661. dev->get_stats = tc35815_get_stats;
  662. dev->set_multicast_list = tc35815_set_multicast_list;
  663. dev->do_ioctl = tc35815_ioctl;
  664. dev->ethtool_ops = &tc35815_ethtool_ops;
  665. dev->tx_timeout = tc35815_tx_timeout;
  666. dev->watchdog_timeo = TC35815_TX_TIMEOUT;
  667. #ifdef TC35815_NAPI
  668. dev->poll = tc35815_poll;
  669. dev->weight = NAPI_WEIGHT;
  670. #endif
  671. #ifdef CONFIG_NET_POLL_CONTROLLER
  672. dev->poll_controller = tc35815_poll_controller;
  673. #endif
  674. dev->irq = pdev->irq;
  675. dev->base_addr = (unsigned long) ioaddr;
  676. /* dev->priv/lp zeroed and aligned in alloc_etherdev */
  677. lp = dev->priv;
  678. spin_lock_init(&lp->lock);
  679. lp->pci_dev = pdev;
  680. lp->boardtype = ent->driver_data;
  681. lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
  682. pci_set_drvdata(pdev, dev);
  683. /* Soft reset the chip. */
  684. tc35815_chip_reset(dev);
  685. /* Retrieve the ethernet address. */
  686. if (tc35815_init_dev_addr(dev)) {
  687. dev_warn(&pdev->dev, "not valid ether addr\n");
  688. random_ether_addr(dev->dev_addr);
  689. }
  690. rc = register_netdev (dev);
  691. if (rc)
  692. goto err_out_unmap;
  693. memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
  694. printk(KERN_INFO "%s: %s at 0x%lx, "
  695. "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
  696. "IRQ %d\n",
  697. dev->name,
  698. board_info[ent->driver_data].name,
  699. dev->base_addr,
  700. dev->dev_addr[0], dev->dev_addr[1],
  701. dev->dev_addr[2], dev->dev_addr[3],
  702. dev->dev_addr[4], dev->dev_addr[5],
  703. dev->irq);
  704. setup_timer(&lp->timer, tc35815_timer, (unsigned long) dev);
  705. lp->mii.dev = dev;
  706. lp->mii.mdio_read = tc_mdio_read;
  707. lp->mii.mdio_write = tc_mdio_write;
  708. lp->mii.phy_id_mask = 0x1f;
  709. lp->mii.reg_num_mask = 0x1f;
  710. tc35815_find_phy(dev);
  711. lp->mii.phy_id = lp->phy_addr;
  712. lp->mii.full_duplex = 0;
  713. lp->mii.force_media = 0;
  714. return 0;
  715. err_out_unmap:
  716. iounmap(ioaddr);
  717. err_out_free_res:
  718. pci_release_regions (pdev);
  719. err_out:
  720. free_netdev (dev);
  721. return rc;
  722. }
  723. static void __devexit tc35815_remove_one (struct pci_dev *pdev)
  724. {
  725. struct net_device *dev = pci_get_drvdata (pdev);
  726. unsigned long mmio_addr;
  727. mmio_addr = dev->base_addr;
  728. unregister_netdev (dev);
  729. if (mmio_addr) {
  730. iounmap ((void __iomem *)mmio_addr);
  731. pci_release_regions (pdev);
  732. }
  733. free_netdev (dev);
  734. pci_set_drvdata (pdev, NULL);
  735. }
  736. static int
  737. tc35815_init_queues(struct net_device *dev)
  738. {
  739. struct tc35815_local *lp = dev->priv;
  740. int i;
  741. unsigned long fd_addr;
  742. if (!lp->fd_buf) {
  743. BUG_ON(sizeof(struct FDesc) +
  744. sizeof(struct BDesc) * RX_BUF_NUM +
  745. sizeof(struct FDesc) * RX_FD_NUM +
  746. sizeof(struct TxFD) * TX_FD_NUM >
  747. PAGE_SIZE * FD_PAGE_NUM);
  748. if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0)
  749. return -ENOMEM;
  750. for (i = 0; i < RX_BUF_NUM; i++) {
  751. #ifdef TC35815_USE_PACKEDBUFFER
  752. if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) {
  753. while (--i >= 0) {
  754. free_rxbuf_page(lp->pci_dev,
  755. lp->data_buf[i],
  756. lp->data_buf_dma[i]);
  757. lp->data_buf[i] = NULL;
  758. }
  759. pci_free_consistent(lp->pci_dev,
  760. PAGE_SIZE * FD_PAGE_NUM,
  761. lp->fd_buf,
  762. lp->fd_buf_dma);
  763. lp->fd_buf = NULL;
  764. return -ENOMEM;
  765. }
  766. #else
  767. lp->rx_skbs[i].skb =
  768. alloc_rxbuf_skb(dev, lp->pci_dev,
  769. &lp->rx_skbs[i].skb_dma);
  770. if (!lp->rx_skbs[i].skb) {
  771. while (--i >= 0) {
  772. free_rxbuf_skb(lp->pci_dev,
  773. lp->rx_skbs[i].skb,
  774. lp->rx_skbs[i].skb_dma);
  775. lp->rx_skbs[i].skb = NULL;
  776. }
  777. pci_free_consistent(lp->pci_dev,
  778. PAGE_SIZE * FD_PAGE_NUM,
  779. lp->fd_buf,
  780. lp->fd_buf_dma);
  781. lp->fd_buf = NULL;
  782. return -ENOMEM;
  783. }
  784. #endif
  785. }
  786. printk(KERN_DEBUG "%s: FD buf %p DataBuf",
  787. dev->name, lp->fd_buf);
  788. #ifdef TC35815_USE_PACKEDBUFFER
  789. printk(" DataBuf");
  790. for (i = 0; i < RX_BUF_NUM; i++)
  791. printk(" %p", lp->data_buf[i]);
  792. #endif
  793. printk("\n");
  794. } else {
  795. for (i = 0; i < FD_PAGE_NUM; i++) {
  796. clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE));
  797. }
  798. }
  799. fd_addr = (unsigned long)lp->fd_buf;
  800. /* Free Descriptors (for Receive) */
  801. lp->rfd_base = (struct RxFD *)fd_addr;
  802. fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
  803. for (i = 0; i < RX_FD_NUM; i++) {
  804. lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
  805. }
  806. lp->rfd_cur = lp->rfd_base;
  807. lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
  808. /* Transmit Descriptors */
  809. lp->tfd_base = (struct TxFD *)fd_addr;
  810. fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
  811. for (i = 0; i < TX_FD_NUM; i++) {
  812. lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
  813. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  814. lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
  815. }
  816. lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
  817. lp->tfd_start = 0;
  818. lp->tfd_end = 0;
  819. /* Buffer List (for Receive) */
  820. lp->fbl_ptr = (struct FrFD *)fd_addr;
  821. lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
  822. lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
  823. #ifndef TC35815_USE_PACKEDBUFFER
  824. /*
  825. * move all allocated skbs to head of rx_skbs[] array.
  826. * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
  827. * tc35815_rx() had failed.
  828. */
  829. lp->fbl_count = 0;
  830. for (i = 0; i < RX_BUF_NUM; i++) {
  831. if (lp->rx_skbs[i].skb) {
  832. if (i != lp->fbl_count) {
  833. lp->rx_skbs[lp->fbl_count].skb =
  834. lp->rx_skbs[i].skb;
  835. lp->rx_skbs[lp->fbl_count].skb_dma =
  836. lp->rx_skbs[i].skb_dma;
  837. }
  838. lp->fbl_count++;
  839. }
  840. }
  841. #endif
  842. for (i = 0; i < RX_BUF_NUM; i++) {
  843. #ifdef TC35815_USE_PACKEDBUFFER
  844. lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
  845. #else
  846. if (i >= lp->fbl_count) {
  847. lp->fbl_ptr->bd[i].BuffData = 0;
  848. lp->fbl_ptr->bd[i].BDCtl = 0;
  849. continue;
  850. }
  851. lp->fbl_ptr->bd[i].BuffData =
  852. cpu_to_le32(lp->rx_skbs[i].skb_dma);
  853. #endif
  854. /* BDID is index of FrFD.bd[] */
  855. lp->fbl_ptr->bd[i].BDCtl =
  856. cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
  857. RX_BUF_SIZE);
  858. }
  859. #ifdef TC35815_USE_PACKEDBUFFER
  860. lp->fbl_curid = 0;
  861. #endif
  862. printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
  863. dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
  864. return 0;
  865. }
  866. static void
  867. tc35815_clear_queues(struct net_device *dev)
  868. {
  869. struct tc35815_local *lp = dev->priv;
  870. int i;
  871. for (i = 0; i < TX_FD_NUM; i++) {
  872. u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
  873. struct sk_buff *skb =
  874. fdsystem != 0xffffffff ?
  875. lp->tx_skbs[fdsystem].skb : NULL;
  876. #ifdef DEBUG
  877. if (lp->tx_skbs[i].skb != skb) {
  878. printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
  879. panic_queues(dev);
  880. }
  881. #else
  882. BUG_ON(lp->tx_skbs[i].skb != skb);
  883. #endif
  884. if (skb) {
  885. pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
  886. lp->tx_skbs[i].skb = NULL;
  887. lp->tx_skbs[i].skb_dma = 0;
  888. dev_kfree_skb_any(skb);
  889. }
  890. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  891. }
  892. tc35815_init_queues(dev);
  893. }
  894. static void
  895. tc35815_free_queues(struct net_device *dev)
  896. {
  897. struct tc35815_local *lp = dev->priv;
  898. int i;
  899. if (lp->tfd_base) {
  900. for (i = 0; i < TX_FD_NUM; i++) {
  901. u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
  902. struct sk_buff *skb =
  903. fdsystem != 0xffffffff ?
  904. lp->tx_skbs[fdsystem].skb : NULL;
  905. #ifdef DEBUG
  906. if (lp->tx_skbs[i].skb != skb) {
  907. printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
  908. panic_queues(dev);
  909. }
  910. #else
  911. BUG_ON(lp->tx_skbs[i].skb != skb);
  912. #endif
  913. if (skb) {
  914. dev_kfree_skb(skb);
  915. pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
  916. lp->tx_skbs[i].skb = NULL;
  917. lp->tx_skbs[i].skb_dma = 0;
  918. }
  919. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  920. }
  921. }
  922. lp->rfd_base = NULL;
  923. lp->rfd_limit = NULL;
  924. lp->rfd_cur = NULL;
  925. lp->fbl_ptr = NULL;
  926. for (i = 0; i < RX_BUF_NUM; i++) {
  927. #ifdef TC35815_USE_PACKEDBUFFER
  928. if (lp->data_buf[i]) {
  929. free_rxbuf_page(lp->pci_dev,
  930. lp->data_buf[i], lp->data_buf_dma[i]);
  931. lp->data_buf[i] = NULL;
  932. }
  933. #else
  934. if (lp->rx_skbs[i].skb) {
  935. free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
  936. lp->rx_skbs[i].skb_dma);
  937. lp->rx_skbs[i].skb = NULL;
  938. }
  939. #endif
  940. }
  941. if (lp->fd_buf) {
  942. pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
  943. lp->fd_buf, lp->fd_buf_dma);
  944. lp->fd_buf = NULL;
  945. }
  946. }
  947. static void
  948. dump_txfd(struct TxFD *fd)
  949. {
  950. printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
  951. le32_to_cpu(fd->fd.FDNext),
  952. le32_to_cpu(fd->fd.FDSystem),
  953. le32_to_cpu(fd->fd.FDStat),
  954. le32_to_cpu(fd->fd.FDCtl));
  955. printk("BD: ");
  956. printk(" %08x %08x",
  957. le32_to_cpu(fd->bd.BuffData),
  958. le32_to_cpu(fd->bd.BDCtl));
  959. printk("\n");
  960. }
  961. static int
  962. dump_rxfd(struct RxFD *fd)
  963. {
  964. int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
  965. if (bd_count > 8)
  966. bd_count = 8;
  967. printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
  968. le32_to_cpu(fd->fd.FDNext),
  969. le32_to_cpu(fd->fd.FDSystem),
  970. le32_to_cpu(fd->fd.FDStat),
  971. le32_to_cpu(fd->fd.FDCtl));
  972. if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
  973. return 0;
  974. printk("BD: ");
  975. for (i = 0; i < bd_count; i++)
  976. printk(" %08x %08x",
  977. le32_to_cpu(fd->bd[i].BuffData),
  978. le32_to_cpu(fd->bd[i].BDCtl));
  979. printk("\n");
  980. return bd_count;
  981. }
  982. #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
  983. static void
  984. dump_frfd(struct FrFD *fd)
  985. {
  986. int i;
  987. printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
  988. le32_to_cpu(fd->fd.FDNext),
  989. le32_to_cpu(fd->fd.FDSystem),
  990. le32_to_cpu(fd->fd.FDStat),
  991. le32_to_cpu(fd->fd.FDCtl));
  992. printk("BD: ");
  993. for (i = 0; i < RX_BUF_NUM; i++)
  994. printk(" %08x %08x",
  995. le32_to_cpu(fd->bd[i].BuffData),
  996. le32_to_cpu(fd->bd[i].BDCtl));
  997. printk("\n");
  998. }
  999. #endif
  1000. #ifdef DEBUG
  1001. static void
  1002. panic_queues(struct net_device *dev)
  1003. {
  1004. struct tc35815_local *lp = dev->priv;
  1005. int i;
  1006. printk("TxFD base %p, start %u, end %u\n",
  1007. lp->tfd_base, lp->tfd_start, lp->tfd_end);
  1008. printk("RxFD base %p limit %p cur %p\n",
  1009. lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
  1010. printk("FrFD %p\n", lp->fbl_ptr);
  1011. for (i = 0; i < TX_FD_NUM; i++)
  1012. dump_txfd(&lp->tfd_base[i]);
  1013. for (i = 0; i < RX_FD_NUM; i++) {
  1014. int bd_count = dump_rxfd(&lp->rfd_base[i]);
  1015. i += (bd_count + 1) / 2; /* skip BDs */
  1016. }
  1017. dump_frfd(lp->fbl_ptr);
  1018. panic("%s: Illegal queue state.", dev->name);
  1019. }
  1020. #endif
  1021. static void print_eth(char *add)
  1022. {
  1023. int i;
  1024. printk("print_eth(%p)\n", add);
  1025. for (i = 0; i < 6; i++)
  1026. printk(" %2.2X", (unsigned char) add[i + 6]);
  1027. printk(" =>");
  1028. for (i = 0; i < 6; i++)
  1029. printk(" %2.2X", (unsigned char) add[i]);
  1030. printk(" : %2.2X%2.2X\n", (unsigned char) add[12], (unsigned char) add[13]);
  1031. }
  1032. static int tc35815_tx_full(struct net_device *dev)
  1033. {
  1034. struct tc35815_local *lp = dev->priv;
  1035. return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
  1036. }
  1037. static void tc35815_restart(struct net_device *dev)
  1038. {
  1039. struct tc35815_local *lp = dev->priv;
  1040. int pid = lp->phy_addr;
  1041. int do_phy_reset = 1;
  1042. del_timer(&lp->timer); /* Kill if running */
  1043. if (lp->mii_id[0] == 0x0016 && (lp->mii_id[1] & 0xfc00) == 0xf800) {
  1044. /* Resetting PHY cause problem on some chip... (SEEQ 80221) */
  1045. do_phy_reset = 0;
  1046. }
  1047. if (do_phy_reset) {
  1048. int timeout;
  1049. tc_mdio_write(dev, pid, MII_BMCR, BMCR_RESET);
  1050. timeout = 100;
  1051. while (--timeout) {
  1052. if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_RESET))
  1053. break;
  1054. udelay(1);
  1055. }
  1056. if (!timeout)
  1057. printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
  1058. }
  1059. tc35815_chip_reset(dev);
  1060. tc35815_clear_queues(dev);
  1061. tc35815_chip_init(dev);
  1062. /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
  1063. tc35815_set_multicast_list(dev);
  1064. }
  1065. static void tc35815_tx_timeout(struct net_device *dev)
  1066. {
  1067. struct tc35815_local *lp = dev->priv;
  1068. struct tc35815_regs __iomem *tr =
  1069. (struct tc35815_regs __iomem *)dev->base_addr;
  1070. printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
  1071. dev->name, tc_readl(&tr->Tx_Stat));
  1072. /* Try to restart the adaptor. */
  1073. spin_lock_irq(&lp->lock);
  1074. tc35815_restart(dev);
  1075. spin_unlock_irq(&lp->lock);
  1076. lp->stats.tx_errors++;
  1077. /* If we have space available to accept new transmit
  1078. * requests, wake up the queueing layer. This would
  1079. * be the case if the chipset_init() call above just
  1080. * flushes out the tx queue and empties it.
  1081. *
  1082. * If instead, the tx queue is retained then the
  1083. * netif_wake_queue() call should be placed in the
  1084. * TX completion interrupt handler of the driver instead
  1085. * of here.
  1086. */
  1087. if (!tc35815_tx_full(dev))
  1088. netif_wake_queue(dev);
  1089. }
  1090. /*
  1091. * Open/initialize the board. This is called (in the current kernel)
  1092. * sometime after booting when the 'ifconfig' program is run.
  1093. *
  1094. * This routine should set everything up anew at each open, even
  1095. * registers that "should" only need to be set once at boot, so that
  1096. * there is non-reboot way to recover if something goes wrong.
  1097. */
  1098. static int
  1099. tc35815_open(struct net_device *dev)
  1100. {
  1101. struct tc35815_local *lp = dev->priv;
  1102. /*
  1103. * This is used if the interrupt line can turned off (shared).
  1104. * See 3c503.c for an example of selecting the IRQ at config-time.
  1105. */
  1106. if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) {
  1107. return -EAGAIN;
  1108. }
  1109. del_timer(&lp->timer); /* Kill if running */
  1110. tc35815_chip_reset(dev);
  1111. if (tc35815_init_queues(dev) != 0) {
  1112. free_irq(dev->irq, dev);
  1113. return -EAGAIN;
  1114. }
  1115. /* Reset the hardware here. Don't forget to set the station address. */
  1116. spin_lock_irq(&lp->lock);
  1117. tc35815_chip_init(dev);
  1118. spin_unlock_irq(&lp->lock);
  1119. /* We are now ready to accept transmit requeusts from
  1120. * the queueing layer of the networking.
  1121. */
  1122. netif_start_queue(dev);
  1123. return 0;
  1124. }
  1125. /* This will only be invoked if your driver is _not_ in XOFF state.
  1126. * What this means is that you need not check it, and that this
  1127. * invariant will hold if you make sure that the netif_*_queue()
  1128. * calls are done at the proper times.
  1129. */
  1130. static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
  1131. {
  1132. struct tc35815_local *lp = dev->priv;
  1133. struct TxFD *txfd;
  1134. unsigned long flags;
  1135. /* If some error occurs while trying to transmit this
  1136. * packet, you should return '1' from this function.
  1137. * In such a case you _may not_ do anything to the
  1138. * SKB, it is still owned by the network queueing
  1139. * layer when an error is returned. This means you
  1140. * may not modify any SKB fields, you may not free
  1141. * the SKB, etc.
  1142. */
  1143. /* This is the most common case for modern hardware.
  1144. * The spinlock protects this code from the TX complete
  1145. * hardware interrupt handler. Queue flow control is
  1146. * thus managed under this lock as well.
  1147. */
  1148. spin_lock_irqsave(&lp->lock, flags);
  1149. /* failsafe... (handle txdone now if half of FDs are used) */
  1150. if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
  1151. TX_FD_NUM / 2)
  1152. tc35815_txdone(dev);
  1153. if (netif_msg_pktdata(lp))
  1154. print_eth(skb->data);
  1155. #ifdef DEBUG
  1156. if (lp->tx_skbs[lp->tfd_start].skb) {
  1157. printk("%s: tx_skbs conflict.\n", dev->name);
  1158. panic_queues(dev);
  1159. }
  1160. #else
  1161. BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
  1162. #endif
  1163. lp->tx_skbs[lp->tfd_start].skb = skb;
  1164. lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
  1165. /*add to ring */
  1166. txfd = &lp->tfd_base[lp->tfd_start];
  1167. txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
  1168. txfd->bd.BDCtl = cpu_to_le32(skb->len);
  1169. txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
  1170. txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
  1171. if (lp->tfd_start == lp->tfd_end) {
  1172. struct tc35815_regs __iomem *tr =
  1173. (struct tc35815_regs __iomem *)dev->base_addr;
  1174. /* Start DMA Transmitter. */
  1175. txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
  1176. #ifdef GATHER_TXINT
  1177. txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
  1178. #endif
  1179. if (netif_msg_tx_queued(lp)) {
  1180. printk("%s: starting TxFD.\n", dev->name);
  1181. dump_txfd(txfd);
  1182. }
  1183. tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
  1184. } else {
  1185. txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
  1186. if (netif_msg_tx_queued(lp)) {
  1187. printk("%s: queueing TxFD.\n", dev->name);
  1188. dump_txfd(txfd);
  1189. }
  1190. }
  1191. lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
  1192. dev->trans_start = jiffies;
  1193. /* If we just used up the very last entry in the
  1194. * TX ring on this device, tell the queueing
  1195. * layer to send no more.
  1196. */
  1197. if (tc35815_tx_full(dev)) {
  1198. if (netif_msg_tx_queued(lp))
  1199. printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
  1200. netif_stop_queue(dev);
  1201. }
  1202. /* When the TX completion hw interrupt arrives, this
  1203. * is when the transmit statistics are updated.
  1204. */
  1205. spin_unlock_irqrestore(&lp->lock, flags);
  1206. return 0;
  1207. }
  1208. #define FATAL_ERROR_INT \
  1209. (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
  1210. static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
  1211. {
  1212. static int count;
  1213. printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
  1214. dev->name, status);
  1215. if (status & Int_IntPCI)
  1216. printk(" IntPCI");
  1217. if (status & Int_DmParErr)
  1218. printk(" DmParErr");
  1219. if (status & Int_IntNRAbt)
  1220. printk(" IntNRAbt");
  1221. printk("\n");
  1222. if (count++ > 100)
  1223. panic("%s: Too many fatal errors.", dev->name);
  1224. printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
  1225. /* Try to restart the adaptor. */
  1226. tc35815_restart(dev);
  1227. }
  1228. #ifdef TC35815_NAPI
  1229. static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
  1230. #else
  1231. static int tc35815_do_interrupt(struct net_device *dev, u32 status)
  1232. #endif
  1233. {
  1234. struct tc35815_local *lp = dev->priv;
  1235. struct tc35815_regs __iomem *tr =
  1236. (struct tc35815_regs __iomem *)dev->base_addr;
  1237. int ret = -1;
  1238. /* Fatal errors... */
  1239. if (status & FATAL_ERROR_INT) {
  1240. tc35815_fatal_error_interrupt(dev, status);
  1241. return 0;
  1242. }
  1243. /* recoverable errors */
  1244. if (status & Int_IntFDAEx) {
  1245. /* disable FDAEx int. (until we make rooms...) */
  1246. tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En);
  1247. printk(KERN_WARNING
  1248. "%s: Free Descriptor Area Exhausted (%#x).\n",
  1249. dev->name, status);
  1250. lp->stats.rx_dropped++;
  1251. ret = 0;
  1252. }
  1253. if (status & Int_IntBLEx) {
  1254. /* disable BLEx int. (until we make rooms...) */
  1255. tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En);
  1256. printk(KERN_WARNING
  1257. "%s: Buffer List Exhausted (%#x).\n",
  1258. dev->name, status);
  1259. lp->stats.rx_dropped++;
  1260. ret = 0;
  1261. }
  1262. if (status & Int_IntExBD) {
  1263. printk(KERN_WARNING
  1264. "%s: Excessive Buffer Descriptiors (%#x).\n",
  1265. dev->name, status);
  1266. lp->stats.rx_length_errors++;
  1267. ret = 0;
  1268. }
  1269. /* normal notification */
  1270. if (status & Int_IntMacRx) {
  1271. /* Got a packet(s). */
  1272. #ifdef TC35815_NAPI
  1273. ret = tc35815_rx(dev, limit);
  1274. #else
  1275. tc35815_rx(dev);
  1276. ret = 0;
  1277. #endif
  1278. lp->lstats.rx_ints++;
  1279. }
  1280. if (status & Int_IntMacTx) {
  1281. /* Transmit complete. */
  1282. lp->lstats.tx_ints++;
  1283. tc35815_txdone(dev);
  1284. netif_wake_queue(dev);
  1285. ret = 0;
  1286. }
  1287. return ret;
  1288. }
  1289. /*
  1290. * The typical workload of the driver:
  1291. * Handle the network interface interrupts.
  1292. */
  1293. static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
  1294. {
  1295. struct net_device *dev = dev_id;
  1296. struct tc35815_regs __iomem *tr =
  1297. (struct tc35815_regs __iomem *)dev->base_addr;
  1298. #ifdef TC35815_NAPI
  1299. u32 dmactl = tc_readl(&tr->DMA_Ctl);
  1300. if (!(dmactl & DMA_IntMask)) {
  1301. /* disable interrupts */
  1302. tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
  1303. if (netif_rx_schedule_prep(dev))
  1304. __netif_rx_schedule(dev);
  1305. else {
  1306. printk(KERN_ERR "%s: interrupt taken in poll\n",
  1307. dev->name);
  1308. BUG();
  1309. }
  1310. (void)tc_readl(&tr->Int_Src); /* flush */
  1311. return IRQ_HANDLED;
  1312. }
  1313. return IRQ_NONE;
  1314. #else
  1315. struct tc35815_local *lp = dev->priv;
  1316. int handled;
  1317. u32 status;
  1318. spin_lock(&lp->lock);
  1319. status = tc_readl(&tr->Int_Src);
  1320. tc_writel(status, &tr->Int_Src); /* write to clear */
  1321. handled = tc35815_do_interrupt(dev, status);
  1322. (void)tc_readl(&tr->Int_Src); /* flush */
  1323. spin_unlock(&lp->lock);
  1324. return IRQ_RETVAL(handled >= 0);
  1325. #endif /* TC35815_NAPI */
  1326. }
  1327. #ifdef CONFIG_NET_POLL_CONTROLLER
  1328. static void tc35815_poll_controller(struct net_device *dev)
  1329. {
  1330. disable_irq(dev->irq);
  1331. tc35815_interrupt(dev->irq, dev);
  1332. enable_irq(dev->irq);
  1333. }
  1334. #endif
  1335. /* We have a good packet(s), get it/them out of the buffers. */
  1336. #ifdef TC35815_NAPI
  1337. static int
  1338. tc35815_rx(struct net_device *dev, int limit)
  1339. #else
  1340. static void
  1341. tc35815_rx(struct net_device *dev)
  1342. #endif
  1343. {
  1344. struct tc35815_local *lp = dev->priv;
  1345. unsigned int fdctl;
  1346. int i;
  1347. int buf_free_count = 0;
  1348. int fd_free_count = 0;
  1349. #ifdef TC35815_NAPI
  1350. int received = 0;
  1351. #endif
  1352. while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
  1353. int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
  1354. int pkt_len = fdctl & FD_FDLength_MASK;
  1355. int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
  1356. #ifdef DEBUG
  1357. struct RxFD *next_rfd;
  1358. #endif
  1359. #if (RX_CTL_CMD & Rx_StripCRC) == 0
  1360. pkt_len -= 4;
  1361. #endif
  1362. if (netif_msg_rx_status(lp))
  1363. dump_rxfd(lp->rfd_cur);
  1364. if (status & Rx_Good) {
  1365. struct sk_buff *skb;
  1366. unsigned char *data;
  1367. int cur_bd;
  1368. #ifdef TC35815_USE_PACKEDBUFFER
  1369. int offset;
  1370. #endif
  1371. #ifdef TC35815_NAPI
  1372. if (--limit < 0)
  1373. break;
  1374. #endif
  1375. #ifdef TC35815_USE_PACKEDBUFFER
  1376. BUG_ON(bd_count > 2);
  1377. skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */
  1378. if (skb == NULL) {
  1379. printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
  1380. dev->name);
  1381. lp->stats.rx_dropped++;
  1382. break;
  1383. }
  1384. skb_reserve(skb, 2); /* 16 bit alignment */
  1385. data = skb_put(skb, pkt_len);
  1386. /* copy from receive buffer */
  1387. cur_bd = 0;
  1388. offset = 0;
  1389. while (offset < pkt_len && cur_bd < bd_count) {
  1390. int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
  1391. BD_BuffLength_MASK;
  1392. dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
  1393. void *rxbuf = rxbuf_bus_to_virt(lp, dma);
  1394. if (offset + len > pkt_len)
  1395. len = pkt_len - offset;
  1396. #ifdef TC35815_DMA_SYNC_ONDEMAND
  1397. pci_dma_sync_single_for_cpu(lp->pci_dev,
  1398. dma, len,
  1399. PCI_DMA_FROMDEVICE);
  1400. #endif
  1401. memcpy(data + offset, rxbuf, len);
  1402. #ifdef TC35815_DMA_SYNC_ONDEMAND
  1403. pci_dma_sync_single_for_device(lp->pci_dev,
  1404. dma, len,
  1405. PCI_DMA_FROMDEVICE);
  1406. #endif
  1407. offset += len;
  1408. cur_bd++;
  1409. }
  1410. #else /* TC35815_USE_PACKEDBUFFER */
  1411. BUG_ON(bd_count > 1);
  1412. cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
  1413. & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
  1414. #ifdef DEBUG
  1415. if (cur_bd >= RX_BUF_NUM) {
  1416. printk("%s: invalid BDID.\n", dev->name);
  1417. panic_queues(dev);
  1418. }
  1419. BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
  1420. (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
  1421. if (!lp->rx_skbs[cur_bd].skb) {
  1422. printk("%s: NULL skb.\n", dev->name);
  1423. panic_queues(dev);
  1424. }
  1425. #else
  1426. BUG_ON(cur_bd >= RX_BUF_NUM);
  1427. #endif
  1428. skb = lp->rx_skbs[cur_bd].skb;
  1429. prefetch(skb->data);
  1430. lp->rx_skbs[cur_bd].skb = NULL;
  1431. lp->fbl_count--;
  1432. pci_unmap_single(lp->pci_dev,
  1433. lp->rx_skbs[cur_bd].skb_dma,
  1434. RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  1435. if (!HAVE_DMA_RXALIGN(lp))
  1436. memmove(skb->data, skb->data - 2, pkt_len);
  1437. data = skb_put(skb, pkt_len);
  1438. #endif /* TC35815_USE_PACKEDBUFFER */
  1439. if (netif_msg_pktdata(lp))
  1440. print_eth(data);
  1441. skb->protocol = eth_type_trans(skb, dev);
  1442. #ifdef TC35815_NAPI
  1443. netif_receive_skb(skb);
  1444. received++;
  1445. #else
  1446. netif_rx(skb);
  1447. #endif
  1448. dev->last_rx = jiffies;
  1449. lp->stats.rx_packets++;
  1450. lp->stats.rx_bytes += pkt_len;
  1451. } else {
  1452. lp->stats.rx_errors++;
  1453. printk(KERN_DEBUG "%s: Rx error (status %x)\n",
  1454. dev->name, status & Rx_Stat_Mask);
  1455. /* WORKAROUND: LongErr and CRCErr means Overflow. */
  1456. if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
  1457. status &= ~(Rx_LongErr|Rx_CRCErr);
  1458. status |= Rx_Over;
  1459. }
  1460. if (status & Rx_LongErr) lp->stats.rx_length_errors++;
  1461. if (status & Rx_Over) lp->stats.rx_fifo_errors++;
  1462. if (status & Rx_CRCErr) lp->stats.rx_crc_errors++;
  1463. if (status & Rx_Align) lp->stats.rx_frame_errors++;
  1464. }
  1465. if (bd_count > 0) {
  1466. /* put Free Buffer back to controller */
  1467. int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
  1468. unsigned char id =
  1469. (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
  1470. #ifdef DEBUG
  1471. if (id >= RX_BUF_NUM) {
  1472. printk("%s: invalid BDID.\n", dev->name);
  1473. panic_queues(dev);
  1474. }
  1475. #else
  1476. BUG_ON(id >= RX_BUF_NUM);
  1477. #endif
  1478. /* free old buffers */
  1479. #ifdef TC35815_USE_PACKEDBUFFER
  1480. while (lp->fbl_curid != id)
  1481. #else
  1482. while (lp->fbl_count < RX_BUF_NUM)
  1483. #endif
  1484. {
  1485. #ifdef TC35815_USE_PACKEDBUFFER
  1486. unsigned char curid = lp->fbl_curid;
  1487. #else
  1488. unsigned char curid =
  1489. (id + 1 + lp->fbl_count) % RX_BUF_NUM;
  1490. #endif
  1491. struct BDesc *bd = &lp->fbl_ptr->bd[curid];
  1492. #ifdef DEBUG
  1493. bdctl = le32_to_cpu(bd->BDCtl);
  1494. if (bdctl & BD_CownsBD) {
  1495. printk("%s: Freeing invalid BD.\n",
  1496. dev->name);
  1497. panic_queues(dev);
  1498. }
  1499. #endif
  1500. /* pass BD to controler */
  1501. #ifndef TC35815_USE_PACKEDBUFFER
  1502. if (!lp->rx_skbs[curid].skb) {
  1503. lp->rx_skbs[curid].skb =
  1504. alloc_rxbuf_skb(dev,
  1505. lp->pci_dev,
  1506. &lp->rx_skbs[curid].skb_dma);
  1507. if (!lp->rx_skbs[curid].skb)
  1508. break; /* try on next reception */
  1509. bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
  1510. }
  1511. #endif /* TC35815_USE_PACKEDBUFFER */
  1512. /* Note: BDLength was modified by chip. */
  1513. bd->BDCtl = cpu_to_le32(BD_CownsBD |
  1514. (curid << BD_RxBDID_SHIFT) |
  1515. RX_BUF_SIZE);
  1516. #ifdef TC35815_USE_PACKEDBUFFER
  1517. lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
  1518. if (netif_msg_rx_status(lp)) {
  1519. printk("%s: Entering new FBD %d\n",
  1520. dev->name, lp->fbl_curid);
  1521. dump_frfd(lp->fbl_ptr);
  1522. }
  1523. #else
  1524. lp->fbl_count++;
  1525. #endif
  1526. buf_free_count++;
  1527. }
  1528. }
  1529. /* put RxFD back to controller */
  1530. #ifdef DEBUG
  1531. next_rfd = fd_bus_to_virt(lp,
  1532. le32_to_cpu(lp->rfd_cur->fd.FDNext));
  1533. if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
  1534. printk("%s: RxFD FDNext invalid.\n", dev->name);
  1535. panic_queues(dev);
  1536. }
  1537. #endif
  1538. for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
  1539. /* pass FD to controler */
  1540. #ifdef DEBUG
  1541. lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
  1542. #else
  1543. lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
  1544. #endif
  1545. lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
  1546. lp->rfd_cur++;
  1547. fd_free_count++;
  1548. }
  1549. if (lp->rfd_cur > lp->rfd_limit)
  1550. lp->rfd_cur = lp->rfd_base;
  1551. #ifdef DEBUG
  1552. if (lp->rfd_cur != next_rfd)
  1553. printk("rfd_cur = %p, next_rfd %p\n",
  1554. lp->rfd_cur, next_rfd);
  1555. #endif
  1556. }
  1557. /* re-enable BL/FDA Exhaust interrupts. */
  1558. if (fd_free_count) {
  1559. struct tc35815_regs __iomem *tr =
  1560. (struct tc35815_regs __iomem *)dev->base_addr;
  1561. u32 en, en_old = tc_readl(&tr->Int_En);
  1562. en = en_old | Int_FDAExEn;
  1563. if (buf_free_count)
  1564. en |= Int_BLExEn;
  1565. if (en != en_old)
  1566. tc_writel(en, &tr->Int_En);
  1567. }
  1568. #ifdef TC35815_NAPI
  1569. return received;
  1570. #endif
  1571. }
  1572. #ifdef TC35815_NAPI
  1573. static int
  1574. tc35815_poll(struct net_device *dev, int *budget)
  1575. {
  1576. struct tc35815_local *lp = dev->priv;
  1577. struct tc35815_regs __iomem *tr =
  1578. (struct tc35815_regs __iomem *)dev->base_addr;
  1579. int limit = min(*budget, dev->quota);
  1580. int received = 0, handled;
  1581. u32 status;
  1582. spin_lock(&lp->lock);
  1583. status = tc_readl(&tr->Int_Src);
  1584. do {
  1585. tc_writel(status, &tr->Int_Src); /* write to clear */
  1586. handled = tc35815_do_interrupt(dev, status, limit);
  1587. if (handled >= 0) {
  1588. received += handled;
  1589. limit -= handled;
  1590. if (limit <= 0)
  1591. break;
  1592. }
  1593. status = tc_readl(&tr->Int_Src);
  1594. } while (status);
  1595. spin_unlock(&lp->lock);
  1596. dev->quota -= received;
  1597. *budget -= received;
  1598. if (limit <= 0)
  1599. return 1;
  1600. netif_rx_complete(dev);
  1601. /* enable interrupts */
  1602. tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
  1603. return 0;
  1604. }
  1605. #endif
  1606. #ifdef NO_CHECK_CARRIER
  1607. #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
  1608. #else
  1609. #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
  1610. #endif
  1611. static void
  1612. tc35815_check_tx_stat(struct net_device *dev, int status)
  1613. {
  1614. struct tc35815_local *lp = dev->priv;
  1615. const char *msg = NULL;
  1616. /* count collisions */
  1617. if (status & Tx_ExColl)
  1618. lp->stats.collisions += 16;
  1619. if (status & Tx_TxColl_MASK)
  1620. lp->stats.collisions += status & Tx_TxColl_MASK;
  1621. #ifndef NO_CHECK_CARRIER
  1622. /* TX4939 does not have NCarr */
  1623. if (lp->boardtype == TC35815_TX4939)
  1624. status &= ~Tx_NCarr;
  1625. #ifdef WORKAROUND_LOSTCAR
  1626. /* WORKAROUND: ignore LostCrS in full duplex operation */
  1627. if ((lp->timer_state != asleep && lp->timer_state != lcheck)
  1628. || lp->fullduplex)
  1629. status &= ~Tx_NCarr;
  1630. #endif
  1631. #endif
  1632. if (!(status & TX_STA_ERR)) {
  1633. /* no error. */
  1634. lp->stats.tx_packets++;
  1635. return;
  1636. }
  1637. lp->stats.tx_errors++;
  1638. if (status & Tx_ExColl) {
  1639. lp->stats.tx_aborted_errors++;
  1640. msg = "Excessive Collision.";
  1641. }
  1642. if (status & Tx_Under) {
  1643. lp->stats.tx_fifo_errors++;
  1644. msg = "Tx FIFO Underrun.";
  1645. if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
  1646. lp->lstats.tx_underrun++;
  1647. if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
  1648. struct tc35815_regs __iomem *tr =
  1649. (struct tc35815_regs __iomem *)dev->base_addr;
  1650. tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
  1651. msg = "Tx FIFO Underrun.Change Tx threshold to max.";
  1652. }
  1653. }
  1654. }
  1655. if (status & Tx_Defer) {
  1656. lp->stats.tx_fifo_errors++;
  1657. msg = "Excessive Deferral.";
  1658. }
  1659. #ifndef NO_CHECK_CARRIER
  1660. if (status & Tx_NCarr) {
  1661. lp->stats.tx_carrier_errors++;
  1662. msg = "Lost Carrier Sense.";
  1663. }
  1664. #endif
  1665. if (status & Tx_LateColl) {
  1666. lp->stats.tx_aborted_errors++;
  1667. msg = "Late Collision.";
  1668. }
  1669. if (status & Tx_TxPar) {
  1670. lp->stats.tx_fifo_errors++;
  1671. msg = "Transmit Parity Error.";
  1672. }
  1673. if (status & Tx_SQErr) {
  1674. lp->stats.tx_heartbeat_errors++;
  1675. msg = "Signal Quality Error.";
  1676. }
  1677. if (msg && netif_msg_tx_err(lp))
  1678. printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
  1679. }
  1680. /* This handles TX complete events posted by the device
  1681. * via interrupts.
  1682. */
  1683. static void
  1684. tc35815_txdone(struct net_device *dev)
  1685. {
  1686. struct tc35815_local *lp = dev->priv;
  1687. struct TxFD *txfd;
  1688. unsigned int fdctl;
  1689. txfd = &lp->tfd_base[lp->tfd_end];
  1690. while (lp->tfd_start != lp->tfd_end &&
  1691. !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
  1692. int status = le32_to_cpu(txfd->fd.FDStat);
  1693. struct sk_buff *skb;
  1694. unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
  1695. u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
  1696. if (netif_msg_tx_done(lp)) {
  1697. printk("%s: complete TxFD.\n", dev->name);
  1698. dump_txfd(txfd);
  1699. }
  1700. tc35815_check_tx_stat(dev, status);
  1701. skb = fdsystem != 0xffffffff ?
  1702. lp->tx_skbs[fdsystem].skb : NULL;
  1703. #ifdef DEBUG
  1704. if (lp->tx_skbs[lp->tfd_end].skb != skb) {
  1705. printk("%s: tx_skbs mismatch.\n", dev->name);
  1706. panic_queues(dev);
  1707. }
  1708. #else
  1709. BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
  1710. #endif
  1711. if (skb) {
  1712. lp->stats.tx_bytes += skb->len;
  1713. pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
  1714. lp->tx_skbs[lp->tfd_end].skb = NULL;
  1715. lp->tx_skbs[lp->tfd_end].skb_dma = 0;
  1716. #ifdef TC35815_NAPI
  1717. dev_kfree_skb_any(skb);
  1718. #else
  1719. dev_kfree_skb_irq(skb);
  1720. #endif
  1721. }
  1722. txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
  1723. lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
  1724. txfd = &lp->tfd_base[lp->tfd_end];
  1725. #ifdef DEBUG
  1726. if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
  1727. printk("%s: TxFD FDNext invalid.\n", dev->name);
  1728. panic_queues(dev);
  1729. }
  1730. #endif
  1731. if (fdnext & FD_Next_EOL) {
  1732. /* DMA Transmitter has been stopping... */
  1733. if (lp->tfd_end != lp->tfd_start) {
  1734. struct tc35815_regs __iomem *tr =
  1735. (struct tc35815_regs __iomem *)dev->base_addr;
  1736. int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
  1737. struct TxFD* txhead = &lp->tfd_base[head];
  1738. int qlen = (lp->tfd_start + TX_FD_NUM
  1739. - lp->tfd_end) % TX_FD_NUM;
  1740. #ifdef DEBUG
  1741. if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
  1742. printk("%s: TxFD FDCtl invalid.\n", dev->name);
  1743. panic_queues(dev);
  1744. }
  1745. #endif
  1746. /* log max queue length */
  1747. if (lp->lstats.max_tx_qlen < qlen)
  1748. lp->lstats.max_tx_qlen = qlen;
  1749. /* start DMA Transmitter again */
  1750. txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
  1751. #ifdef GATHER_TXINT
  1752. txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
  1753. #endif
  1754. if (netif_msg_tx_queued(lp)) {
  1755. printk("%s: start TxFD on queue.\n",
  1756. dev->name);
  1757. dump_txfd(txfd);
  1758. }
  1759. tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
  1760. }
  1761. break;
  1762. }
  1763. }
  1764. /* If we had stopped the queue due to a "tx full"
  1765. * condition, and space has now been made available,
  1766. * wake up the queue.
  1767. */
  1768. if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev))
  1769. netif_wake_queue(dev);
  1770. }
  1771. /* The inverse routine to tc35815_open(). */
  1772. static int
  1773. tc35815_close(struct net_device *dev)
  1774. {
  1775. struct tc35815_local *lp = dev->priv;
  1776. netif_stop_queue(dev);
  1777. /* Flush the Tx and disable Rx here. */
  1778. del_timer(&lp->timer); /* Kill if running */
  1779. tc35815_chip_reset(dev);
  1780. free_irq(dev->irq, dev);
  1781. tc35815_free_queues(dev);
  1782. return 0;
  1783. }
  1784. /*
  1785. * Get the current statistics.
  1786. * This may be called with the card open or closed.
  1787. */
  1788. static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
  1789. {
  1790. struct tc35815_local *lp = dev->priv;
  1791. struct tc35815_regs __iomem *tr =
  1792. (struct tc35815_regs __iomem *)dev->base_addr;
  1793. if (netif_running(dev)) {
  1794. /* Update the statistics from the device registers. */
  1795. lp->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
  1796. }
  1797. return &lp->stats;
  1798. }
  1799. static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
  1800. {
  1801. struct tc35815_local *lp = dev->priv;
  1802. struct tc35815_regs __iomem *tr =
  1803. (struct tc35815_regs __iomem *)dev->base_addr;
  1804. int cam_index = index * 6;
  1805. u32 cam_data;
  1806. u32 saved_addr;
  1807. saved_addr = tc_readl(&tr->CAM_Adr);
  1808. if (netif_msg_hw(lp)) {
  1809. int i;
  1810. printk(KERN_DEBUG "%s: CAM %d:", dev->name, index);
  1811. for (i = 0; i < 6; i++)
  1812. printk(" %02x", addr[i]);
  1813. printk("\n");
  1814. }
  1815. if (index & 1) {
  1816. /* read modify write */
  1817. tc_writel(cam_index - 2, &tr->CAM_Adr);
  1818. cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
  1819. cam_data |= addr[0] << 8 | addr[1];
  1820. tc_writel(cam_data, &tr->CAM_Data);
  1821. /* write whole word */
  1822. tc_writel(cam_index + 2, &tr->CAM_Adr);
  1823. cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
  1824. tc_writel(cam_data, &tr->CAM_Data);
  1825. } else {
  1826. /* write whole word */
  1827. tc_writel(cam_index, &tr->CAM_Adr);
  1828. cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
  1829. tc_writel(cam_data, &tr->CAM_Data);
  1830. /* read modify write */
  1831. tc_writel(cam_index + 4, &tr->CAM_Adr);
  1832. cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
  1833. cam_data |= addr[4] << 24 | (addr[5] << 16);
  1834. tc_writel(cam_data, &tr->CAM_Data);
  1835. }
  1836. tc_writel(saved_addr, &tr->CAM_Adr);
  1837. }
  1838. /*
  1839. * Set or clear the multicast filter for this adaptor.
  1840. * num_addrs == -1 Promiscuous mode, receive all packets
  1841. * num_addrs == 0 Normal mode, clear multicast list
  1842. * num_addrs > 0 Multicast mode, receive normal and MC packets,
  1843. * and do best-effort filtering.
  1844. */
  1845. static void
  1846. tc35815_set_multicast_list(struct net_device *dev)
  1847. {
  1848. struct tc35815_regs __iomem *tr =
  1849. (struct tc35815_regs __iomem *)dev->base_addr;
  1850. if (dev->flags&IFF_PROMISC)
  1851. {
  1852. #ifdef WORKAROUND_100HALF_PROMISC
  1853. /* With some (all?) 100MHalf HUB, controller will hang
  1854. * if we enabled promiscuous mode before linkup... */
  1855. struct tc35815_local *lp = dev->priv;
  1856. int pid = lp->phy_addr;
  1857. if (!(tc_mdio_read(dev, pid, MII_BMSR) & BMSR_LSTATUS))
  1858. return;
  1859. #endif
  1860. /* Enable promiscuous mode */
  1861. tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
  1862. }
  1863. else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3)
  1864. {
  1865. /* CAM 0, 1, 20 are reserved. */
  1866. /* Disable promiscuous mode, use normal mode. */
  1867. tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
  1868. }
  1869. else if(dev->mc_count)
  1870. {
  1871. struct dev_mc_list* cur_addr = dev->mc_list;
  1872. int i;
  1873. int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
  1874. tc_writel(0, &tr->CAM_Ctl);
  1875. /* Walk the address list, and load the filter */
  1876. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1877. if (!cur_addr)
  1878. break;
  1879. /* entry 0,1 is reserved. */
  1880. tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
  1881. ena_bits |= CAM_Ena_Bit(i + 2);
  1882. }
  1883. tc_writel(ena_bits, &tr->CAM_Ena);
  1884. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  1885. }
  1886. else {
  1887. tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
  1888. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  1889. }
  1890. }
  1891. static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1892. {
  1893. struct tc35815_local *lp = dev->priv;
  1894. strcpy(info->driver, MODNAME);
  1895. strcpy(info->version, DRV_VERSION);
  1896. strcpy(info->bus_info, pci_name(lp->pci_dev));
  1897. }
  1898. static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1899. {
  1900. struct tc35815_local *lp = dev->priv;
  1901. spin_lock_irq(&lp->lock);
  1902. mii_ethtool_gset(&lp->mii, cmd);
  1903. spin_unlock_irq(&lp->lock);
  1904. return 0;
  1905. }
  1906. static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1907. {
  1908. struct tc35815_local *lp = dev->priv;
  1909. int rc;
  1910. #if 1 /* use our negotiation method... */
  1911. /* Verify the settings we care about. */
  1912. if (cmd->autoneg != AUTONEG_ENABLE &&
  1913. cmd->autoneg != AUTONEG_DISABLE)
  1914. return -EINVAL;
  1915. if (cmd->autoneg == AUTONEG_DISABLE &&
  1916. ((cmd->speed != SPEED_100 &&
  1917. cmd->speed != SPEED_10) ||
  1918. (cmd->duplex != DUPLEX_HALF &&
  1919. cmd->duplex != DUPLEX_FULL)))
  1920. return -EINVAL;
  1921. /* Ok, do it to it. */
  1922. spin_lock_irq(&lp->lock);
  1923. del_timer(&lp->timer);
  1924. tc35815_start_auto_negotiation(dev, cmd);
  1925. spin_unlock_irq(&lp->lock);
  1926. rc = 0;
  1927. #else
  1928. spin_lock_irq(&lp->lock);
  1929. rc = mii_ethtool_sset(&lp->mii, cmd);
  1930. spin_unlock_irq(&lp->lock);
  1931. #endif
  1932. return rc;
  1933. }
  1934. static int tc35815_nway_reset(struct net_device *dev)
  1935. {
  1936. struct tc35815_local *lp = dev->priv;
  1937. int rc;
  1938. spin_lock_irq(&lp->lock);
  1939. rc = mii_nway_restart(&lp->mii);
  1940. spin_unlock_irq(&lp->lock);
  1941. return rc;
  1942. }
  1943. static u32 tc35815_get_link(struct net_device *dev)
  1944. {
  1945. struct tc35815_local *lp = dev->priv;
  1946. int rc;
  1947. spin_lock_irq(&lp->lock);
  1948. rc = mii_link_ok(&lp->mii);
  1949. spin_unlock_irq(&lp->lock);
  1950. return rc;
  1951. }
  1952. static u32 tc35815_get_msglevel(struct net_device *dev)
  1953. {
  1954. struct tc35815_local *lp = dev->priv;
  1955. return lp->msg_enable;
  1956. }
  1957. static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
  1958. {
  1959. struct tc35815_local *lp = dev->priv;
  1960. lp->msg_enable = datum;
  1961. }
  1962. static int tc35815_get_stats_count(struct net_device *dev)
  1963. {
  1964. struct tc35815_local *lp = dev->priv;
  1965. return sizeof(lp->lstats) / sizeof(int);
  1966. }
  1967. static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
  1968. {
  1969. struct tc35815_local *lp = dev->priv;
  1970. data[0] = lp->lstats.max_tx_qlen;
  1971. data[1] = lp->lstats.tx_ints;
  1972. data[2] = lp->lstats.rx_ints;
  1973. data[3] = lp->lstats.tx_underrun;
  1974. }
  1975. static struct {
  1976. const char str[ETH_GSTRING_LEN];
  1977. } ethtool_stats_keys[] = {
  1978. { "max_tx_qlen" },
  1979. { "tx_ints" },
  1980. { "rx_ints" },
  1981. { "tx_underrun" },
  1982. };
  1983. static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  1984. {
  1985. memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
  1986. }
  1987. static const struct ethtool_ops tc35815_ethtool_ops = {
  1988. .get_drvinfo = tc35815_get_drvinfo,
  1989. .get_settings = tc35815_get_settings,
  1990. .set_settings = tc35815_set_settings,
  1991. .nway_reset = tc35815_nway_reset,
  1992. .get_link = tc35815_get_link,
  1993. .get_msglevel = tc35815_get_msglevel,
  1994. .set_msglevel = tc35815_set_msglevel,
  1995. .get_strings = tc35815_get_strings,
  1996. .get_stats_count = tc35815_get_stats_count,
  1997. .get_ethtool_stats = tc35815_get_ethtool_stats,
  1998. .get_perm_addr = ethtool_op_get_perm_addr,
  1999. };
  2000. static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  2001. {
  2002. struct tc35815_local *lp = dev->priv;
  2003. int rc;
  2004. if (!netif_running(dev))
  2005. return -EINVAL;
  2006. spin_lock_irq(&lp->lock);
  2007. rc = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL);
  2008. spin_unlock_irq(&lp->lock);
  2009. return rc;
  2010. }
  2011. static int tc_mdio_read(struct net_device *dev, int phy_id, int location)
  2012. {
  2013. struct tc35815_regs __iomem *tr =
  2014. (struct tc35815_regs __iomem *)dev->base_addr;
  2015. u32 data;
  2016. tc_writel(MD_CA_Busy | (phy_id << 5) | location, &tr->MD_CA);
  2017. while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
  2018. ;
  2019. data = tc_readl(&tr->MD_Data);
  2020. return data & 0xffff;
  2021. }
  2022. static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
  2023. int val)
  2024. {
  2025. struct tc35815_regs __iomem *tr =
  2026. (struct tc35815_regs __iomem *)dev->base_addr;
  2027. tc_writel(val, &tr->MD_Data);
  2028. tc_writel(MD_CA_Busy | MD_CA_Wr | (phy_id << 5) | location, &tr->MD_CA);
  2029. while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
  2030. ;
  2031. }
  2032. /* Auto negotiation. The scheme is very simple. We have a timer routine
  2033. * that keeps watching the auto negotiation process as it progresses.
  2034. * The DP83840 is first told to start doing it's thing, we set up the time
  2035. * and place the timer state machine in it's initial state.
  2036. *
  2037. * Here the timer peeks at the DP83840 status registers at each click to see
  2038. * if the auto negotiation has completed, we assume here that the DP83840 PHY
  2039. * will time out at some point and just tell us what (didn't) happen. For
  2040. * complete coverage we only allow so many of the ticks at this level to run,
  2041. * when this has expired we print a warning message and try another strategy.
  2042. * This "other" strategy is to force the interface into various speed/duplex
  2043. * configurations and we stop when we see a link-up condition before the
  2044. * maximum number of "peek" ticks have occurred.
  2045. *
  2046. * Once a valid link status has been detected we configure the BigMAC and
  2047. * the rest of the Happy Meal to speak the most efficient protocol we could
  2048. * get a clean link for. The priority for link configurations, highest first
  2049. * is:
  2050. * 100 Base-T Full Duplex
  2051. * 100 Base-T Half Duplex
  2052. * 10 Base-T Full Duplex
  2053. * 10 Base-T Half Duplex
  2054. *
  2055. * We start a new timer now, after a successful auto negotiation status has
  2056. * been detected. This timer just waits for the link-up bit to get set in
  2057. * the BMCR of the DP83840. When this occurs we print a kernel log message
  2058. * describing the link type in use and the fact that it is up.
  2059. *
  2060. * If a fatal error of some sort is signalled and detected in the interrupt
  2061. * service routine, and the chip is reset, or the link is ifconfig'd down
  2062. * and then back up, this entire process repeats itself all over again.
  2063. */
  2064. /* Note: Above comments are come from sunhme driver. */
  2065. static int tc35815_try_next_permutation(struct net_device *dev)
  2066. {
  2067. struct tc35815_local *lp = dev->priv;
  2068. int pid = lp->phy_addr;
  2069. unsigned short bmcr;
  2070. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2071. /* Downgrade from full to half duplex. Only possible via ethtool. */
  2072. if (bmcr & BMCR_FULLDPLX) {
  2073. bmcr &= ~BMCR_FULLDPLX;
  2074. printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
  2075. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2076. return 0;
  2077. }
  2078. /* Downgrade from 100 to 10. */
  2079. if (bmcr & BMCR_SPEED100) {
  2080. bmcr &= ~BMCR_SPEED100;
  2081. printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
  2082. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2083. return 0;
  2084. }
  2085. /* We've tried everything. */
  2086. return -1;
  2087. }
  2088. static void
  2089. tc35815_display_link_mode(struct net_device *dev)
  2090. {
  2091. struct tc35815_local *lp = dev->priv;
  2092. int pid = lp->phy_addr;
  2093. unsigned short lpa, bmcr;
  2094. char *speed = "", *duplex = "";
  2095. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2096. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2097. if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
  2098. speed = "100Mb/s";
  2099. else
  2100. speed = "10Mb/s";
  2101. if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
  2102. duplex = "Full Duplex";
  2103. else
  2104. duplex = "Half Duplex";
  2105. if (netif_msg_link(lp))
  2106. printk(KERN_INFO "%s: Link is up at %s, %s.\n",
  2107. dev->name, speed, duplex);
  2108. printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
  2109. dev->name,
  2110. bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
  2111. }
  2112. static void tc35815_display_forced_link_mode(struct net_device *dev)
  2113. {
  2114. struct tc35815_local *lp = dev->priv;
  2115. int pid = lp->phy_addr;
  2116. unsigned short bmcr;
  2117. char *speed = "", *duplex = "";
  2118. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2119. if (bmcr & BMCR_SPEED100)
  2120. speed = "100Mb/s";
  2121. else
  2122. speed = "10Mb/s";
  2123. if (bmcr & BMCR_FULLDPLX)
  2124. duplex = "Full Duplex.\n";
  2125. else
  2126. duplex = "Half Duplex.\n";
  2127. if (netif_msg_link(lp))
  2128. printk(KERN_INFO "%s: Link has been forced up at %s, %s",
  2129. dev->name, speed, duplex);
  2130. }
  2131. static void tc35815_set_link_modes(struct net_device *dev)
  2132. {
  2133. struct tc35815_local *lp = dev->priv;
  2134. struct tc35815_regs __iomem *tr =
  2135. (struct tc35815_regs __iomem *)dev->base_addr;
  2136. int pid = lp->phy_addr;
  2137. unsigned short bmcr, lpa;
  2138. int speed;
  2139. if (lp->timer_state == arbwait) {
  2140. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2141. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2142. printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
  2143. dev->name,
  2144. bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
  2145. if (!(lpa & (LPA_10HALF | LPA_10FULL |
  2146. LPA_100HALF | LPA_100FULL))) {
  2147. /* fall back to 10HALF */
  2148. printk(KERN_INFO "%s: bad ability %04x - falling back to 10HD.\n",
  2149. dev->name, lpa);
  2150. lpa = LPA_10HALF;
  2151. }
  2152. if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
  2153. lp->fullduplex = 1;
  2154. else
  2155. lp->fullduplex = 0;
  2156. if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
  2157. speed = 100;
  2158. else
  2159. speed = 10;
  2160. } else {
  2161. /* Forcing a link mode. */
  2162. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2163. if (bmcr & BMCR_FULLDPLX)
  2164. lp->fullduplex = 1;
  2165. else
  2166. lp->fullduplex = 0;
  2167. if (bmcr & BMCR_SPEED100)
  2168. speed = 100;
  2169. else
  2170. speed = 10;
  2171. }
  2172. tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_HaltReq, &tr->MAC_Ctl);
  2173. if (lp->fullduplex) {
  2174. tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl);
  2175. } else {
  2176. tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_FullDup, &tr->MAC_Ctl);
  2177. }
  2178. tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_HaltReq, &tr->MAC_Ctl);
  2179. /* TX4939 PCFG.SPEEDn bit will be changed on NETDEV_CHANGE event. */
  2180. #ifndef NO_CHECK_CARRIER
  2181. /* TX4939 does not have EnLCarr */
  2182. if (lp->boardtype != TC35815_TX4939) {
  2183. #ifdef WORKAROUND_LOSTCAR
  2184. /* WORKAROUND: enable LostCrS only if half duplex operation */
  2185. if (!lp->fullduplex && lp->boardtype != TC35815_TX4939)
  2186. tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, &tr->Tx_Ctl);
  2187. #endif
  2188. }
  2189. #endif
  2190. lp->mii.full_duplex = lp->fullduplex;
  2191. }
  2192. static void tc35815_timer(unsigned long data)
  2193. {
  2194. struct net_device *dev = (struct net_device *)data;
  2195. struct tc35815_local *lp = dev->priv;
  2196. int pid = lp->phy_addr;
  2197. unsigned short bmsr, bmcr, lpa;
  2198. int restart_timer = 0;
  2199. spin_lock_irq(&lp->lock);
  2200. lp->timer_ticks++;
  2201. switch (lp->timer_state) {
  2202. case arbwait:
  2203. /*
  2204. * Only allow for 5 ticks, thats 10 seconds and much too
  2205. * long to wait for arbitration to complete.
  2206. */
  2207. /* TC35815 need more times... */
  2208. if (lp->timer_ticks >= 10) {
  2209. /* Enter force mode. */
  2210. if (!options.doforce) {
  2211. printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
  2212. " cable probblem?\n", dev->name);
  2213. /* Try to restart the adaptor. */
  2214. tc35815_restart(dev);
  2215. goto out;
  2216. }
  2217. printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
  2218. " trying force link mode\n", dev->name);
  2219. printk(KERN_DEBUG "%s: BMCR %x BMSR %x\n", dev->name,
  2220. tc_mdio_read(dev, pid, MII_BMCR),
  2221. tc_mdio_read(dev, pid, MII_BMSR));
  2222. bmcr = BMCR_SPEED100;
  2223. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2224. /*
  2225. * OK, seems we need do disable the transceiver
  2226. * for the first tick to make sure we get an
  2227. * accurate link state at the second tick.
  2228. */
  2229. lp->timer_state = ltrywait;
  2230. lp->timer_ticks = 0;
  2231. restart_timer = 1;
  2232. } else {
  2233. /* Anything interesting happen? */
  2234. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2235. if (bmsr & BMSR_ANEGCOMPLETE) {
  2236. /* Just what we've been waiting for... */
  2237. tc35815_set_link_modes(dev);
  2238. /*
  2239. * Success, at least so far, advance our state
  2240. * engine.
  2241. */
  2242. lp->timer_state = lupwait;
  2243. restart_timer = 1;
  2244. } else {
  2245. restart_timer = 1;
  2246. }
  2247. }
  2248. break;
  2249. case lupwait:
  2250. /*
  2251. * Auto negotiation was successful and we are awaiting a
  2252. * link up status. I have decided to let this timer run
  2253. * forever until some sort of error is signalled, reporting
  2254. * a message to the user at 10 second intervals.
  2255. */
  2256. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2257. if (bmsr & BMSR_LSTATUS) {
  2258. /*
  2259. * Wheee, it's up, display the link mode in use and put
  2260. * the timer to sleep.
  2261. */
  2262. tc35815_display_link_mode(dev);
  2263. netif_carrier_on(dev);
  2264. #ifdef WORKAROUND_100HALF_PROMISC
  2265. /* delayed promiscuous enabling */
  2266. if (dev->flags & IFF_PROMISC)
  2267. tc35815_set_multicast_list(dev);
  2268. #endif
  2269. #if 1
  2270. lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
  2271. lp->timer_state = lcheck;
  2272. restart_timer = 1;
  2273. #else
  2274. lp->timer_state = asleep;
  2275. restart_timer = 0;
  2276. #endif
  2277. } else {
  2278. if (lp->timer_ticks >= 10) {
  2279. printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
  2280. "not completely up.\n", dev->name);
  2281. lp->timer_ticks = 0;
  2282. restart_timer = 1;
  2283. } else {
  2284. restart_timer = 1;
  2285. }
  2286. }
  2287. break;
  2288. case ltrywait:
  2289. /*
  2290. * Making the timeout here too long can make it take
  2291. * annoyingly long to attempt all of the link mode
  2292. * permutations, but then again this is essentially
  2293. * error recovery code for the most part.
  2294. */
  2295. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2296. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2297. if (lp->timer_ticks == 1) {
  2298. /*
  2299. * Re-enable transceiver, we'll re-enable the
  2300. * transceiver next tick, then check link state
  2301. * on the following tick.
  2302. */
  2303. restart_timer = 1;
  2304. break;
  2305. }
  2306. if (lp->timer_ticks == 2) {
  2307. restart_timer = 1;
  2308. break;
  2309. }
  2310. if (bmsr & BMSR_LSTATUS) {
  2311. /* Force mode selection success. */
  2312. tc35815_display_forced_link_mode(dev);
  2313. netif_carrier_on(dev);
  2314. tc35815_set_link_modes(dev);
  2315. #ifdef WORKAROUND_100HALF_PROMISC
  2316. /* delayed promiscuous enabling */
  2317. if (dev->flags & IFF_PROMISC)
  2318. tc35815_set_multicast_list(dev);
  2319. #endif
  2320. #if 1
  2321. lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
  2322. lp->timer_state = lcheck;
  2323. restart_timer = 1;
  2324. #else
  2325. lp->timer_state = asleep;
  2326. restart_timer = 0;
  2327. #endif
  2328. } else {
  2329. if (lp->timer_ticks >= 4) { /* 6 seconds or so... */
  2330. int ret;
  2331. ret = tc35815_try_next_permutation(dev);
  2332. if (ret == -1) {
  2333. /*
  2334. * Aieee, tried them all, reset the
  2335. * chip and try all over again.
  2336. */
  2337. printk(KERN_NOTICE "%s: Link down, "
  2338. "cable problem?\n",
  2339. dev->name);
  2340. /* Try to restart the adaptor. */
  2341. tc35815_restart(dev);
  2342. goto out;
  2343. }
  2344. lp->timer_ticks = 0;
  2345. restart_timer = 1;
  2346. } else {
  2347. restart_timer = 1;
  2348. }
  2349. }
  2350. break;
  2351. case lcheck:
  2352. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2353. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2354. if (bmcr & (BMCR_PDOWN | BMCR_ISOLATE | BMCR_RESET)) {
  2355. printk(KERN_ERR "%s: PHY down? (BMCR %x)\n", dev->name,
  2356. bmcr);
  2357. } else if ((lp->saved_lpa ^ lpa) &
  2358. (LPA_100FULL|LPA_100HALF|LPA_10FULL|LPA_10HALF)) {
  2359. printk(KERN_NOTICE "%s: link status changed"
  2360. " (BMCR %x LPA %x->%x)\n", dev->name,
  2361. bmcr, lp->saved_lpa, lpa);
  2362. } else {
  2363. /* go on */
  2364. restart_timer = 1;
  2365. break;
  2366. }
  2367. /* Try to restart the adaptor. */
  2368. tc35815_restart(dev);
  2369. goto out;
  2370. case asleep:
  2371. default:
  2372. /* Can't happens.... */
  2373. printk(KERN_ERR "%s: Aieee, link timer is asleep but we got "
  2374. "one anyways!\n", dev->name);
  2375. restart_timer = 0;
  2376. lp->timer_ticks = 0;
  2377. lp->timer_state = asleep; /* foo on you */
  2378. break;
  2379. }
  2380. if (restart_timer) {
  2381. lp->timer.expires = jiffies + msecs_to_jiffies(1200);
  2382. add_timer(&lp->timer);
  2383. }
  2384. out:
  2385. spin_unlock_irq(&lp->lock);
  2386. }
  2387. static void tc35815_start_auto_negotiation(struct net_device *dev,
  2388. struct ethtool_cmd *ep)
  2389. {
  2390. struct tc35815_local *lp = dev->priv;
  2391. int pid = lp->phy_addr;
  2392. unsigned short bmsr, bmcr, advertize;
  2393. int timeout;
  2394. netif_carrier_off(dev);
  2395. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2396. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2397. advertize = tc_mdio_read(dev, pid, MII_ADVERTISE);
  2398. if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
  2399. if (options.speed || options.duplex) {
  2400. /* Advertise only specified configuration. */
  2401. advertize &= ~(ADVERTISE_10HALF |
  2402. ADVERTISE_10FULL |
  2403. ADVERTISE_100HALF |
  2404. ADVERTISE_100FULL);
  2405. if (options.speed != 10) {
  2406. if (options.duplex != 1)
  2407. advertize |= ADVERTISE_100FULL;
  2408. if (options.duplex != 2)
  2409. advertize |= ADVERTISE_100HALF;
  2410. }
  2411. if (options.speed != 100) {
  2412. if (options.duplex != 1)
  2413. advertize |= ADVERTISE_10FULL;
  2414. if (options.duplex != 2)
  2415. advertize |= ADVERTISE_10HALF;
  2416. }
  2417. if (options.speed == 100)
  2418. bmcr |= BMCR_SPEED100;
  2419. else if (options.speed == 10)
  2420. bmcr &= ~BMCR_SPEED100;
  2421. if (options.duplex == 2)
  2422. bmcr |= BMCR_FULLDPLX;
  2423. else if (options.duplex == 1)
  2424. bmcr &= ~BMCR_FULLDPLX;
  2425. } else {
  2426. /* Advertise everything we can support. */
  2427. if (bmsr & BMSR_10HALF)
  2428. advertize |= ADVERTISE_10HALF;
  2429. else
  2430. advertize &= ~ADVERTISE_10HALF;
  2431. if (bmsr & BMSR_10FULL)
  2432. advertize |= ADVERTISE_10FULL;
  2433. else
  2434. advertize &= ~ADVERTISE_10FULL;
  2435. if (bmsr & BMSR_100HALF)
  2436. advertize |= ADVERTISE_100HALF;
  2437. else
  2438. advertize &= ~ADVERTISE_100HALF;
  2439. if (bmsr & BMSR_100FULL)
  2440. advertize |= ADVERTISE_100FULL;
  2441. else
  2442. advertize &= ~ADVERTISE_100FULL;
  2443. }
  2444. tc_mdio_write(dev, pid, MII_ADVERTISE, advertize);
  2445. /* Enable Auto-Negotiation, this is usually on already... */
  2446. bmcr |= BMCR_ANENABLE;
  2447. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2448. /* Restart it to make sure it is going. */
  2449. bmcr |= BMCR_ANRESTART;
  2450. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2451. printk(KERN_DEBUG "%s: ADVERTISE %x BMCR %x\n", dev->name, advertize, bmcr);
  2452. /* BMCR_ANRESTART self clears when the process has begun. */
  2453. timeout = 64; /* More than enough. */
  2454. while (--timeout) {
  2455. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2456. if (!(bmcr & BMCR_ANRESTART))
  2457. break; /* got it. */
  2458. udelay(10);
  2459. }
  2460. if (!timeout) {
  2461. printk(KERN_ERR "%s: TC35815 would not start auto "
  2462. "negotiation BMCR=0x%04x\n",
  2463. dev->name, bmcr);
  2464. printk(KERN_NOTICE "%s: Performing force link "
  2465. "detection.\n", dev->name);
  2466. goto force_link;
  2467. } else {
  2468. printk(KERN_DEBUG "%s: auto negotiation started.\n", dev->name);
  2469. lp->timer_state = arbwait;
  2470. }
  2471. } else {
  2472. force_link:
  2473. /* Force the link up, trying first a particular mode.
  2474. * Either we are here at the request of ethtool or
  2475. * because the Happy Meal would not start to autoneg.
  2476. */
  2477. /* Disable auto-negotiation in BMCR, enable the duplex and
  2478. * speed setting, init the timer state machine, and fire it off.
  2479. */
  2480. if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
  2481. bmcr = BMCR_SPEED100;
  2482. } else {
  2483. if (ep->speed == SPEED_100)
  2484. bmcr = BMCR_SPEED100;
  2485. else
  2486. bmcr = 0;
  2487. if (ep->duplex == DUPLEX_FULL)
  2488. bmcr |= BMCR_FULLDPLX;
  2489. }
  2490. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2491. /* OK, seems we need do disable the transceiver for the first
  2492. * tick to make sure we get an accurate link state at the
  2493. * second tick.
  2494. */
  2495. lp->timer_state = ltrywait;
  2496. }
  2497. del_timer(&lp->timer);
  2498. lp->timer_ticks = 0;
  2499. lp->timer.expires = jiffies + msecs_to_jiffies(1200);
  2500. add_timer(&lp->timer);
  2501. }
  2502. static void tc35815_find_phy(struct net_device *dev)
  2503. {
  2504. struct tc35815_local *lp = dev->priv;
  2505. int pid = lp->phy_addr;
  2506. unsigned short id0;
  2507. /* find MII phy */
  2508. for (pid = 31; pid >= 0; pid--) {
  2509. id0 = tc_mdio_read(dev, pid, MII_BMSR);
  2510. if (id0 != 0xffff && id0 != 0x0000 &&
  2511. (id0 & BMSR_RESV) != (0xffff & BMSR_RESV) /* paranoia? */
  2512. ) {
  2513. lp->phy_addr = pid;
  2514. break;
  2515. }
  2516. }
  2517. if (pid < 0) {
  2518. printk(KERN_ERR "%s: No MII Phy found.\n",
  2519. dev->name);
  2520. lp->phy_addr = pid = 0;
  2521. }
  2522. lp->mii_id[0] = tc_mdio_read(dev, pid, MII_PHYSID1);
  2523. lp->mii_id[1] = tc_mdio_read(dev, pid, MII_PHYSID2);
  2524. if (netif_msg_hw(lp))
  2525. printk(KERN_INFO "%s: PHY(%02x) ID %04x %04x\n", dev->name,
  2526. pid, lp->mii_id[0], lp->mii_id[1]);
  2527. }
  2528. static void tc35815_phy_chip_init(struct net_device *dev)
  2529. {
  2530. struct tc35815_local *lp = dev->priv;
  2531. int pid = lp->phy_addr;
  2532. unsigned short bmcr;
  2533. struct ethtool_cmd ecmd, *ep;
  2534. /* dis-isolate if needed. */
  2535. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2536. if (bmcr & BMCR_ISOLATE) {
  2537. int count = 32;
  2538. printk(KERN_DEBUG "%s: unisolating...", dev->name);
  2539. tc_mdio_write(dev, pid, MII_BMCR, bmcr & ~BMCR_ISOLATE);
  2540. while (--count) {
  2541. if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_ISOLATE))
  2542. break;
  2543. udelay(20);
  2544. }
  2545. printk(" %s.\n", count ? "done" : "failed");
  2546. }
  2547. if (options.speed && options.duplex) {
  2548. ecmd.autoneg = AUTONEG_DISABLE;
  2549. ecmd.speed = options.speed == 10 ? SPEED_10 : SPEED_100;
  2550. ecmd.duplex = options.duplex == 1 ? DUPLEX_HALF : DUPLEX_FULL;
  2551. ep = &ecmd;
  2552. } else {
  2553. ep = NULL;
  2554. }
  2555. tc35815_start_auto_negotiation(dev, ep);
  2556. }
  2557. static void tc35815_chip_reset(struct net_device *dev)
  2558. {
  2559. struct tc35815_regs __iomem *tr =
  2560. (struct tc35815_regs __iomem *)dev->base_addr;
  2561. int i;
  2562. /* reset the controller */
  2563. tc_writel(MAC_Reset, &tr->MAC_Ctl);
  2564. udelay(4); /* 3200ns */
  2565. i = 0;
  2566. while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
  2567. if (i++ > 100) {
  2568. printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
  2569. break;
  2570. }
  2571. mdelay(1);
  2572. }
  2573. tc_writel(0, &tr->MAC_Ctl);
  2574. /* initialize registers to default value */
  2575. tc_writel(0, &tr->DMA_Ctl);
  2576. tc_writel(0, &tr->TxThrsh);
  2577. tc_writel(0, &tr->TxPollCtr);
  2578. tc_writel(0, &tr->RxFragSize);
  2579. tc_writel(0, &tr->Int_En);
  2580. tc_writel(0, &tr->FDA_Bas);
  2581. tc_writel(0, &tr->FDA_Lim);
  2582. tc_writel(0xffffffff, &tr->Int_Src); /* Write 1 to clear */
  2583. tc_writel(0, &tr->CAM_Ctl);
  2584. tc_writel(0, &tr->Tx_Ctl);
  2585. tc_writel(0, &tr->Rx_Ctl);
  2586. tc_writel(0, &tr->CAM_Ena);
  2587. (void)tc_readl(&tr->Miss_Cnt); /* Read to clear */
  2588. /* initialize internal SRAM */
  2589. tc_writel(DMA_TestMode, &tr->DMA_Ctl);
  2590. for (i = 0; i < 0x1000; i += 4) {
  2591. tc_writel(i, &tr->CAM_Adr);
  2592. tc_writel(0, &tr->CAM_Data);
  2593. }
  2594. tc_writel(0, &tr->DMA_Ctl);
  2595. }
  2596. static void tc35815_chip_init(struct net_device *dev)
  2597. {
  2598. struct tc35815_local *lp = dev->priv;
  2599. struct tc35815_regs __iomem *tr =
  2600. (struct tc35815_regs __iomem *)dev->base_addr;
  2601. unsigned long txctl = TX_CTL_CMD;
  2602. tc35815_phy_chip_init(dev);
  2603. /* load station address to CAM */
  2604. tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
  2605. /* Enable CAM (broadcast and unicast) */
  2606. tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
  2607. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  2608. /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
  2609. if (HAVE_DMA_RXALIGN(lp))
  2610. tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
  2611. else
  2612. tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
  2613. #ifdef TC35815_USE_PACKEDBUFFER
  2614. tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize); /* Packing */
  2615. #else
  2616. tc_writel(ETH_ZLEN, &tr->RxFragSize);
  2617. #endif
  2618. tc_writel(0, &tr->TxPollCtr); /* Batch mode */
  2619. tc_writel(TX_THRESHOLD, &tr->TxThrsh);
  2620. tc_writel(INT_EN_CMD, &tr->Int_En);
  2621. /* set queues */
  2622. tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
  2623. tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
  2624. &tr->FDA_Lim);
  2625. /*
  2626. * Activation method:
  2627. * First, enable the MAC Transmitter and the DMA Receive circuits.
  2628. * Then enable the DMA Transmitter and the MAC Receive circuits.
  2629. */
  2630. tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr); /* start DMA receiver */
  2631. tc_writel(RX_CTL_CMD, &tr->Rx_Ctl); /* start MAC receiver */
  2632. /* start MAC transmitter */
  2633. #ifndef NO_CHECK_CARRIER
  2634. /* TX4939 does not have EnLCarr */
  2635. if (lp->boardtype == TC35815_TX4939)
  2636. txctl &= ~Tx_EnLCarr;
  2637. #ifdef WORKAROUND_LOSTCAR
  2638. /* WORKAROUND: ignore LostCrS in full duplex operation */
  2639. if ((lp->timer_state != asleep && lp->timer_state != lcheck) ||
  2640. lp->fullduplex)
  2641. txctl &= ~Tx_EnLCarr;
  2642. #endif
  2643. #endif /* !NO_CHECK_CARRIER */
  2644. #ifdef GATHER_TXINT
  2645. txctl &= ~Tx_EnComp; /* disable global tx completion int. */
  2646. #endif
  2647. tc_writel(txctl, &tr->Tx_Ctl);
  2648. }
  2649. #ifdef CONFIG_PM
  2650. static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
  2651. {
  2652. struct net_device *dev = pci_get_drvdata(pdev);
  2653. struct tc35815_local *lp = dev->priv;
  2654. unsigned long flags;
  2655. pci_save_state(pdev);
  2656. if (!netif_running(dev))
  2657. return 0;
  2658. netif_device_detach(dev);
  2659. spin_lock_irqsave(&lp->lock, flags);
  2660. del_timer(&lp->timer); /* Kill if running */
  2661. tc35815_chip_reset(dev);
  2662. spin_unlock_irqrestore(&lp->lock, flags);
  2663. pci_set_power_state(pdev, PCI_D3hot);
  2664. return 0;
  2665. }
  2666. static int tc35815_resume(struct pci_dev *pdev)
  2667. {
  2668. struct net_device *dev = pci_get_drvdata(pdev);
  2669. struct tc35815_local *lp = dev->priv;
  2670. unsigned long flags;
  2671. pci_restore_state(pdev);
  2672. if (!netif_running(dev))
  2673. return 0;
  2674. pci_set_power_state(pdev, PCI_D0);
  2675. spin_lock_irqsave(&lp->lock, flags);
  2676. tc35815_restart(dev);
  2677. spin_unlock_irqrestore(&lp->lock, flags);
  2678. netif_device_attach(dev);
  2679. return 0;
  2680. }
  2681. #endif /* CONFIG_PM */
  2682. static struct pci_driver tc35815_pci_driver = {
  2683. .name = MODNAME,
  2684. .id_table = tc35815_pci_tbl,
  2685. .probe = tc35815_init_one,
  2686. .remove = __devexit_p(tc35815_remove_one),
  2687. #ifdef CONFIG_PM
  2688. .suspend = tc35815_suspend,
  2689. .resume = tc35815_resume,
  2690. #endif
  2691. };
  2692. module_param_named(speed, options.speed, int, 0);
  2693. MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
  2694. module_param_named(duplex, options.duplex, int, 0);
  2695. MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
  2696. module_param_named(doforce, options.doforce, int, 0);
  2697. MODULE_PARM_DESC(doforce, "try force link mode if auto-negotiation failed");
  2698. static int __init tc35815_init_module(void)
  2699. {
  2700. return pci_register_driver(&tc35815_pci_driver);
  2701. }
  2702. static void __exit tc35815_cleanup_module(void)
  2703. {
  2704. pci_unregister_driver(&tc35815_pci_driver);
  2705. }
  2706. module_init(tc35815_init_module);
  2707. module_exit(tc35815_cleanup_module);
  2708. MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
  2709. MODULE_LICENSE("GPL");