ov7670.c 35 KB

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  1. /*
  2. * A V4L2 driver for OmniVision OV7670 cameras.
  3. *
  4. * Copyright 2006 One Laptop Per Child Association, Inc. Written
  5. * by Jonathan Corbet with substantial inspiration from Mark
  6. * McClelland's ovcamchip code.
  7. *
  8. * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
  9. *
  10. * This file may be distributed under the terms of the GNU General
  11. * Public License, version 2.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/module.h>
  15. #include <linux/moduleparam.h>
  16. #include <linux/slab.h>
  17. #include <linux/delay.h>
  18. #include <linux/videodev.h>
  19. #include <media/v4l2-common.h>
  20. #include <media/v4l2-chip-ident.h>
  21. #include <linux/i2c.h>
  22. MODULE_AUTHOR("Jonathan Corbet <corbet@lwn.net>");
  23. MODULE_DESCRIPTION("A low-level driver for OmniVision ov7670 sensors");
  24. MODULE_LICENSE("GPL");
  25. /*
  26. * Basic window sizes. These probably belong somewhere more globally
  27. * useful.
  28. */
  29. #define VGA_WIDTH 640
  30. #define VGA_HEIGHT 480
  31. #define QVGA_WIDTH 320
  32. #define QVGA_HEIGHT 240
  33. #define CIF_WIDTH 352
  34. #define CIF_HEIGHT 288
  35. #define QCIF_WIDTH 176
  36. #define QCIF_HEIGHT 144
  37. /*
  38. * Our nominal (default) frame rate.
  39. */
  40. #define OV7670_FRAME_RATE 30
  41. /*
  42. * The 7670 sits on i2c with ID 0x42
  43. */
  44. #define OV7670_I2C_ADDR 0x42
  45. /* Registers */
  46. #define REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
  47. #define REG_BLUE 0x01 /* blue gain */
  48. #define REG_RED 0x02 /* red gain */
  49. #define REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
  50. #define REG_COM1 0x04 /* Control 1 */
  51. #define COM1_CCIR656 0x40 /* CCIR656 enable */
  52. #define REG_BAVE 0x05 /* U/B Average level */
  53. #define REG_GbAVE 0x06 /* Y/Gb Average level */
  54. #define REG_AECHH 0x07 /* AEC MS 5 bits */
  55. #define REG_RAVE 0x08 /* V/R Average level */
  56. #define REG_COM2 0x09 /* Control 2 */
  57. #define COM2_SSLEEP 0x10 /* Soft sleep mode */
  58. #define REG_PID 0x0a /* Product ID MSB */
  59. #define REG_VER 0x0b /* Product ID LSB */
  60. #define REG_COM3 0x0c /* Control 3 */
  61. #define COM3_SWAP 0x40 /* Byte swap */
  62. #define COM3_SCALEEN 0x08 /* Enable scaling */
  63. #define COM3_DCWEN 0x04 /* Enable downsamp/crop/window */
  64. #define REG_COM4 0x0d /* Control 4 */
  65. #define REG_COM5 0x0e /* All "reserved" */
  66. #define REG_COM6 0x0f /* Control 6 */
  67. #define REG_AECH 0x10 /* More bits of AEC value */
  68. #define REG_CLKRC 0x11 /* Clocl control */
  69. #define CLK_EXT 0x40 /* Use external clock directly */
  70. #define CLK_SCALE 0x3f /* Mask for internal clock scale */
  71. #define REG_COM7 0x12 /* Control 7 */
  72. #define COM7_RESET 0x80 /* Register reset */
  73. #define COM7_FMT_MASK 0x38
  74. #define COM7_FMT_VGA 0x00
  75. #define COM7_FMT_CIF 0x20 /* CIF format */
  76. #define COM7_FMT_QVGA 0x10 /* QVGA format */
  77. #define COM7_FMT_QCIF 0x08 /* QCIF format */
  78. #define COM7_RGB 0x04 /* bits 0 and 2 - RGB format */
  79. #define COM7_YUV 0x00 /* YUV */
  80. #define COM7_BAYER 0x01 /* Bayer format */
  81. #define COM7_PBAYER 0x05 /* "Processed bayer" */
  82. #define REG_COM8 0x13 /* Control 8 */
  83. #define COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
  84. #define COM8_AECSTEP 0x40 /* Unlimited AEC step size */
  85. #define COM8_BFILT 0x20 /* Band filter enable */
  86. #define COM8_AGC 0x04 /* Auto gain enable */
  87. #define COM8_AWB 0x02 /* White balance enable */
  88. #define COM8_AEC 0x01 /* Auto exposure enable */
  89. #define REG_COM9 0x14 /* Control 9 - gain ceiling */
  90. #define REG_COM10 0x15 /* Control 10 */
  91. #define COM10_HSYNC 0x40 /* HSYNC instead of HREF */
  92. #define COM10_PCLK_HB 0x20 /* Suppress PCLK on horiz blank */
  93. #define COM10_HREF_REV 0x08 /* Reverse HREF */
  94. #define COM10_VS_LEAD 0x04 /* VSYNC on clock leading edge */
  95. #define COM10_VS_NEG 0x02 /* VSYNC negative */
  96. #define COM10_HS_NEG 0x01 /* HSYNC negative */
  97. #define REG_HSTART 0x17 /* Horiz start high bits */
  98. #define REG_HSTOP 0x18 /* Horiz stop high bits */
  99. #define REG_VSTART 0x19 /* Vert start high bits */
  100. #define REG_VSTOP 0x1a /* Vert stop high bits */
  101. #define REG_PSHFT 0x1b /* Pixel delay after HREF */
  102. #define REG_MIDH 0x1c /* Manuf. ID high */
  103. #define REG_MIDL 0x1d /* Manuf. ID low */
  104. #define REG_MVFP 0x1e /* Mirror / vflip */
  105. #define MVFP_MIRROR 0x20 /* Mirror image */
  106. #define MVFP_FLIP 0x10 /* Vertical flip */
  107. #define REG_AEW 0x24 /* AGC upper limit */
  108. #define REG_AEB 0x25 /* AGC lower limit */
  109. #define REG_VPT 0x26 /* AGC/AEC fast mode op region */
  110. #define REG_HSYST 0x30 /* HSYNC rising edge delay */
  111. #define REG_HSYEN 0x31 /* HSYNC falling edge delay */
  112. #define REG_HREF 0x32 /* HREF pieces */
  113. #define REG_TSLB 0x3a /* lots of stuff */
  114. #define TSLB_YLAST 0x04 /* UYVY or VYUY - see com13 */
  115. #define REG_COM11 0x3b /* Control 11 */
  116. #define COM11_NIGHT 0x80 /* NIght mode enable */
  117. #define COM11_NMFR 0x60 /* Two bit NM frame rate */
  118. #define COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
  119. #define COM11_50HZ 0x08 /* Manual 50Hz select */
  120. #define COM11_EXP 0x02
  121. #define REG_COM12 0x3c /* Control 12 */
  122. #define COM12_HREF 0x80 /* HREF always */
  123. #define REG_COM13 0x3d /* Control 13 */
  124. #define COM13_GAMMA 0x80 /* Gamma enable */
  125. #define COM13_UVSAT 0x40 /* UV saturation auto adjustment */
  126. #define COM13_UVSWAP 0x01 /* V before U - w/TSLB */
  127. #define REG_COM14 0x3e /* Control 14 */
  128. #define COM14_DCWEN 0x10 /* DCW/PCLK-scale enable */
  129. #define REG_EDGE 0x3f /* Edge enhancement factor */
  130. #define REG_COM15 0x40 /* Control 15 */
  131. #define COM15_R10F0 0x00 /* Data range 10 to F0 */
  132. #define COM15_R01FE 0x80 /* 01 to FE */
  133. #define COM15_R00FF 0xc0 /* 00 to FF */
  134. #define COM15_RGB565 0x10 /* RGB565 output */
  135. #define COM15_RGB555 0x30 /* RGB555 output */
  136. #define REG_COM16 0x41 /* Control 16 */
  137. #define COM16_AWBGAIN 0x08 /* AWB gain enable */
  138. #define REG_COM17 0x42 /* Control 17 */
  139. #define COM17_AECWIN 0xc0 /* AEC window - must match COM4 */
  140. #define COM17_CBAR 0x08 /* DSP Color bar */
  141. /*
  142. * This matrix defines how the colors are generated, must be
  143. * tweaked to adjust hue and saturation.
  144. *
  145. * Order: v-red, v-green, v-blue, u-red, u-green, u-blue
  146. *
  147. * They are nine-bit signed quantities, with the sign bit
  148. * stored in 0x58. Sign for v-red is bit 0, and up from there.
  149. */
  150. #define REG_CMATRIX_BASE 0x4f
  151. #define CMATRIX_LEN 6
  152. #define REG_CMATRIX_SIGN 0x58
  153. #define REG_BRIGHT 0x55 /* Brightness */
  154. #define REG_CONTRAS 0x56 /* Contrast control */
  155. #define REG_GFIX 0x69 /* Fix gain control */
  156. #define REG_REG76 0x76 /* OV's name */
  157. #define R76_BLKPCOR 0x80 /* Black pixel correction enable */
  158. #define R76_WHTPCOR 0x40 /* White pixel correction enable */
  159. #define REG_RGB444 0x8c /* RGB 444 control */
  160. #define R444_ENABLE 0x02 /* Turn on RGB444, overrides 5x5 */
  161. #define R444_RGBX 0x01 /* Empty nibble at end */
  162. #define REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
  163. #define REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
  164. #define REG_BD50MAX 0xa5 /* 50hz banding step limit */
  165. #define REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
  166. #define REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
  167. #define REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
  168. #define REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
  169. #define REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
  170. #define REG_BD60MAX 0xab /* 60hz banding step limit */
  171. /*
  172. * Information we maintain about a known sensor.
  173. */
  174. struct ov7670_format_struct; /* coming later */
  175. struct ov7670_info {
  176. struct ov7670_format_struct *fmt; /* Current format */
  177. unsigned char sat; /* Saturation value */
  178. int hue; /* Hue value */
  179. };
  180. /*
  181. * The default register settings, as obtained from OmniVision. There
  182. * is really no making sense of most of these - lots of "reserved" values
  183. * and such.
  184. *
  185. * These settings give VGA YUYV.
  186. */
  187. struct regval_list {
  188. unsigned char reg_num;
  189. unsigned char value;
  190. };
  191. static struct regval_list ov7670_default_regs[] = {
  192. { REG_COM7, COM7_RESET },
  193. /*
  194. * Clock scale: 3 = 15fps
  195. * 2 = 20fps
  196. * 1 = 30fps
  197. */
  198. { REG_CLKRC, 0x1 }, /* OV: clock scale (30 fps) */
  199. { REG_TSLB, 0x04 }, /* OV */
  200. { REG_COM7, 0 }, /* VGA */
  201. /*
  202. * Set the hardware window. These values from OV don't entirely
  203. * make sense - hstop is less than hstart. But they work...
  204. */
  205. { REG_HSTART, 0x13 }, { REG_HSTOP, 0x01 },
  206. { REG_HREF, 0xb6 }, { REG_VSTART, 0x02 },
  207. { REG_VSTOP, 0x7a }, { REG_VREF, 0x0a },
  208. { REG_COM3, 0 }, { REG_COM14, 0 },
  209. /* Mystery scaling numbers */
  210. { 0x70, 0x3a }, { 0x71, 0x35 },
  211. { 0x72, 0x11 }, { 0x73, 0xf0 },
  212. { 0xa2, 0x02 }, { REG_COM10, 0x0 },
  213. /* Gamma curve values */
  214. { 0x7a, 0x20 }, { 0x7b, 0x10 },
  215. { 0x7c, 0x1e }, { 0x7d, 0x35 },
  216. { 0x7e, 0x5a }, { 0x7f, 0x69 },
  217. { 0x80, 0x76 }, { 0x81, 0x80 },
  218. { 0x82, 0x88 }, { 0x83, 0x8f },
  219. { 0x84, 0x96 }, { 0x85, 0xa3 },
  220. { 0x86, 0xaf }, { 0x87, 0xc4 },
  221. { 0x88, 0xd7 }, { 0x89, 0xe8 },
  222. /* AGC and AEC parameters. Note we start by disabling those features,
  223. then turn them only after tweaking the values. */
  224. { REG_COM8, COM8_FASTAEC | COM8_AECSTEP | COM8_BFILT },
  225. { REG_GAIN, 0 }, { REG_AECH, 0 },
  226. { REG_COM4, 0x40 }, /* magic reserved bit */
  227. { REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
  228. { REG_BD50MAX, 0x05 }, { REG_BD60MAX, 0x07 },
  229. { REG_AEW, 0x95 }, { REG_AEB, 0x33 },
  230. { REG_VPT, 0xe3 }, { REG_HAECC1, 0x78 },
  231. { REG_HAECC2, 0x68 }, { 0xa1, 0x03 }, /* magic */
  232. { REG_HAECC3, 0xd8 }, { REG_HAECC4, 0xd8 },
  233. { REG_HAECC5, 0xf0 }, { REG_HAECC6, 0x90 },
  234. { REG_HAECC7, 0x94 },
  235. { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC },
  236. /* Almost all of these are magic "reserved" values. */
  237. { REG_COM5, 0x61 }, { REG_COM6, 0x4b },
  238. { 0x16, 0x02 }, { REG_MVFP, 0x07 },
  239. { 0x21, 0x02 }, { 0x22, 0x91 },
  240. { 0x29, 0x07 }, { 0x33, 0x0b },
  241. { 0x35, 0x0b }, { 0x37, 0x1d },
  242. { 0x38, 0x71 }, { 0x39, 0x2a },
  243. { REG_COM12, 0x78 }, { 0x4d, 0x40 },
  244. { 0x4e, 0x20 }, { REG_GFIX, 0 },
  245. { 0x6b, 0x4a }, { 0x74, 0x10 },
  246. { 0x8d, 0x4f }, { 0x8e, 0 },
  247. { 0x8f, 0 }, { 0x90, 0 },
  248. { 0x91, 0 }, { 0x96, 0 },
  249. { 0x9a, 0 }, { 0xb0, 0x84 },
  250. { 0xb1, 0x0c }, { 0xb2, 0x0e },
  251. { 0xb3, 0x82 }, { 0xb8, 0x0a },
  252. /* More reserved magic, some of which tweaks white balance */
  253. { 0x43, 0x0a }, { 0x44, 0xf0 },
  254. { 0x45, 0x34 }, { 0x46, 0x58 },
  255. { 0x47, 0x28 }, { 0x48, 0x3a },
  256. { 0x59, 0x88 }, { 0x5a, 0x88 },
  257. { 0x5b, 0x44 }, { 0x5c, 0x67 },
  258. { 0x5d, 0x49 }, { 0x5e, 0x0e },
  259. { 0x6c, 0x0a }, { 0x6d, 0x55 },
  260. { 0x6e, 0x11 }, { 0x6f, 0x9f }, /* "9e for advance AWB" */
  261. { 0x6a, 0x40 }, { REG_BLUE, 0x40 },
  262. { REG_RED, 0x60 },
  263. { REG_COM8, COM8_FASTAEC|COM8_AECSTEP|COM8_BFILT|COM8_AGC|COM8_AEC|COM8_AWB },
  264. /* Matrix coefficients */
  265. { 0x4f, 0x80 }, { 0x50, 0x80 },
  266. { 0x51, 0 }, { 0x52, 0x22 },
  267. { 0x53, 0x5e }, { 0x54, 0x80 },
  268. { 0x58, 0x9e },
  269. { REG_COM16, COM16_AWBGAIN }, { REG_EDGE, 0 },
  270. { 0x75, 0x05 }, { 0x76, 0xe1 },
  271. { 0x4c, 0 }, { 0x77, 0x01 },
  272. { REG_COM13, 0xc3 }, { 0x4b, 0x09 },
  273. { 0xc9, 0x60 }, { REG_COM16, 0x38 },
  274. { 0x56, 0x40 },
  275. { 0x34, 0x11 }, { REG_COM11, COM11_EXP|COM11_HZAUTO },
  276. { 0xa4, 0x88 }, { 0x96, 0 },
  277. { 0x97, 0x30 }, { 0x98, 0x20 },
  278. { 0x99, 0x30 }, { 0x9a, 0x84 },
  279. { 0x9b, 0x29 }, { 0x9c, 0x03 },
  280. { 0x9d, 0x4c }, { 0x9e, 0x3f },
  281. { 0x78, 0x04 },
  282. /* Extra-weird stuff. Some sort of multiplexor register */
  283. { 0x79, 0x01 }, { 0xc8, 0xf0 },
  284. { 0x79, 0x0f }, { 0xc8, 0x00 },
  285. { 0x79, 0x10 }, { 0xc8, 0x7e },
  286. { 0x79, 0x0a }, { 0xc8, 0x80 },
  287. { 0x79, 0x0b }, { 0xc8, 0x01 },
  288. { 0x79, 0x0c }, { 0xc8, 0x0f },
  289. { 0x79, 0x0d }, { 0xc8, 0x20 },
  290. { 0x79, 0x09 }, { 0xc8, 0x80 },
  291. { 0x79, 0x02 }, { 0xc8, 0xc0 },
  292. { 0x79, 0x03 }, { 0xc8, 0x40 },
  293. { 0x79, 0x05 }, { 0xc8, 0x30 },
  294. { 0x79, 0x26 },
  295. { 0xff, 0xff }, /* END MARKER */
  296. };
  297. /*
  298. * Here we'll try to encapsulate the changes for just the output
  299. * video format.
  300. *
  301. * RGB656 and YUV422 come from OV; RGB444 is homebrewed.
  302. *
  303. * IMPORTANT RULE: the first entry must be for COM7, see ov7670_s_fmt for why.
  304. */
  305. static struct regval_list ov7670_fmt_yuv422[] = {
  306. { REG_COM7, 0x0 }, /* Selects YUV mode */
  307. { REG_RGB444, 0 }, /* No RGB444 please */
  308. { REG_COM1, 0 },
  309. { REG_COM15, COM15_R00FF },
  310. { REG_COM9, 0x18 }, /* 4x gain ceiling; 0x8 is reserved bit */
  311. { 0x4f, 0x80 }, /* "matrix coefficient 1" */
  312. { 0x50, 0x80 }, /* "matrix coefficient 2" */
  313. { 0x51, 0 }, /* vb */
  314. { 0x52, 0x22 }, /* "matrix coefficient 4" */
  315. { 0x53, 0x5e }, /* "matrix coefficient 5" */
  316. { 0x54, 0x80 }, /* "matrix coefficient 6" */
  317. { REG_COM13, COM13_GAMMA|COM13_UVSAT },
  318. { 0xff, 0xff },
  319. };
  320. static struct regval_list ov7670_fmt_rgb565[] = {
  321. { REG_COM7, COM7_RGB }, /* Selects RGB mode */
  322. { REG_RGB444, 0 }, /* No RGB444 please */
  323. { REG_COM1, 0x0 },
  324. { REG_COM15, COM15_RGB565 },
  325. { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
  326. { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
  327. { 0x50, 0xb3 }, /* "matrix coefficient 2" */
  328. { 0x51, 0 }, /* vb */
  329. { 0x52, 0x3d }, /* "matrix coefficient 4" */
  330. { 0x53, 0xa7 }, /* "matrix coefficient 5" */
  331. { 0x54, 0xe4 }, /* "matrix coefficient 6" */
  332. { REG_COM13, COM13_GAMMA|COM13_UVSAT },
  333. { 0xff, 0xff },
  334. };
  335. static struct regval_list ov7670_fmt_rgb444[] = {
  336. { REG_COM7, COM7_RGB }, /* Selects RGB mode */
  337. { REG_RGB444, R444_ENABLE }, /* Enable xxxxrrrr ggggbbbb */
  338. { REG_COM1, 0x40 }, /* Magic reserved bit */
  339. { REG_COM15, COM15_R01FE|COM15_RGB565 }, /* Data range needed? */
  340. { REG_COM9, 0x38 }, /* 16x gain ceiling; 0x8 is reserved bit */
  341. { 0x4f, 0xb3 }, /* "matrix coefficient 1" */
  342. { 0x50, 0xb3 }, /* "matrix coefficient 2" */
  343. { 0x51, 0 }, /* vb */
  344. { 0x52, 0x3d }, /* "matrix coefficient 4" */
  345. { 0x53, 0xa7 }, /* "matrix coefficient 5" */
  346. { 0x54, 0xe4 }, /* "matrix coefficient 6" */
  347. { REG_COM13, COM13_GAMMA|COM13_UVSAT|0x2 }, /* Magic rsvd bit */
  348. { 0xff, 0xff },
  349. };
  350. static struct regval_list ov7670_fmt_raw[] = {
  351. { REG_COM7, COM7_BAYER },
  352. { REG_COM13, 0x08 }, /* No gamma, magic rsvd bit */
  353. { REG_COM16, 0x3d }, /* Edge enhancement, denoise */
  354. { REG_REG76, 0xe1 }, /* Pix correction, magic rsvd */
  355. { 0xff, 0xff },
  356. };
  357. /*
  358. * Low-level register I/O.
  359. */
  360. static int ov7670_read(struct i2c_client *c, unsigned char reg,
  361. unsigned char *value)
  362. {
  363. int ret;
  364. ret = i2c_smbus_read_byte_data(c, reg);
  365. if (ret >= 0)
  366. *value = (unsigned char) ret;
  367. return ret;
  368. }
  369. static int ov7670_write(struct i2c_client *c, unsigned char reg,
  370. unsigned char value)
  371. {
  372. return i2c_smbus_write_byte_data(c, reg, value);
  373. }
  374. /*
  375. * Write a list of register settings; ff/ff stops the process.
  376. */
  377. static int ov7670_write_array(struct i2c_client *c, struct regval_list *vals)
  378. {
  379. while (vals->reg_num != 0xff || vals->value != 0xff) {
  380. int ret = ov7670_write(c, vals->reg_num, vals->value);
  381. if (ret < 0)
  382. return ret;
  383. vals++;
  384. }
  385. return 0;
  386. }
  387. /*
  388. * Stuff that knows about the sensor.
  389. */
  390. static void ov7670_reset(struct i2c_client *client)
  391. {
  392. ov7670_write(client, REG_COM7, COM7_RESET);
  393. msleep(1);
  394. }
  395. static int ov7670_init(struct i2c_client *client)
  396. {
  397. return ov7670_write_array(client, ov7670_default_regs);
  398. }
  399. static int ov7670_detect(struct i2c_client *client)
  400. {
  401. unsigned char v;
  402. int ret;
  403. ret = ov7670_init(client);
  404. if (ret < 0)
  405. return ret;
  406. ret = ov7670_read(client, REG_MIDH, &v);
  407. if (ret < 0)
  408. return ret;
  409. if (v != 0x7f) /* OV manuf. id. */
  410. return -ENODEV;
  411. ret = ov7670_read(client, REG_MIDL, &v);
  412. if (ret < 0)
  413. return ret;
  414. if (v != 0xa2)
  415. return -ENODEV;
  416. /*
  417. * OK, we know we have an OmniVision chip...but which one?
  418. */
  419. ret = ov7670_read(client, REG_PID, &v);
  420. if (ret < 0)
  421. return ret;
  422. if (v != 0x76) /* PID + VER = 0x76 / 0x73 */
  423. return -ENODEV;
  424. ret = ov7670_read(client, REG_VER, &v);
  425. if (ret < 0)
  426. return ret;
  427. if (v != 0x73) /* PID + VER = 0x76 / 0x73 */
  428. return -ENODEV;
  429. return 0;
  430. }
  431. /*
  432. * Store information about the video data format. The color matrix
  433. * is deeply tied into the format, so keep the relevant values here.
  434. * The magic matrix nubmers come from OmniVision.
  435. */
  436. static struct ov7670_format_struct {
  437. __u8 *desc;
  438. __u32 pixelformat;
  439. struct regval_list *regs;
  440. int cmatrix[CMATRIX_LEN];
  441. int bpp; /* Bytes per pixel */
  442. } ov7670_formats[] = {
  443. {
  444. .desc = "YUYV 4:2:2",
  445. .pixelformat = V4L2_PIX_FMT_YUYV,
  446. .regs = ov7670_fmt_yuv422,
  447. .cmatrix = { 128, -128, 0, -34, -94, 128 },
  448. .bpp = 2,
  449. },
  450. {
  451. .desc = "RGB 444",
  452. .pixelformat = V4L2_PIX_FMT_RGB444,
  453. .regs = ov7670_fmt_rgb444,
  454. .cmatrix = { 179, -179, 0, -61, -176, 228 },
  455. .bpp = 2,
  456. },
  457. {
  458. .desc = "RGB 565",
  459. .pixelformat = V4L2_PIX_FMT_RGB565,
  460. .regs = ov7670_fmt_rgb565,
  461. .cmatrix = { 179, -179, 0, -61, -176, 228 },
  462. .bpp = 2,
  463. },
  464. {
  465. .desc = "Raw RGB Bayer",
  466. .pixelformat = V4L2_PIX_FMT_SBGGR8,
  467. .regs = ov7670_fmt_raw,
  468. .cmatrix = { 0, 0, 0, 0, 0, 0 },
  469. .bpp = 1
  470. },
  471. };
  472. #define N_OV7670_FMTS ARRAY_SIZE(ov7670_formats)
  473. /*
  474. * Then there is the issue of window sizes. Try to capture the info here.
  475. */
  476. /*
  477. * QCIF mode is done (by OV) in a very strange way - it actually looks like
  478. * VGA with weird scaling options - they do *not* use the canned QCIF mode
  479. * which is allegedly provided by the sensor. So here's the weird register
  480. * settings.
  481. */
  482. static struct regval_list ov7670_qcif_regs[] = {
  483. { REG_COM3, COM3_SCALEEN|COM3_DCWEN },
  484. { REG_COM3, COM3_DCWEN },
  485. { REG_COM14, COM14_DCWEN | 0x01},
  486. { 0x73, 0xf1 },
  487. { 0xa2, 0x52 },
  488. { 0x7b, 0x1c },
  489. { 0x7c, 0x28 },
  490. { 0x7d, 0x3c },
  491. { 0x7f, 0x69 },
  492. { REG_COM9, 0x38 },
  493. { 0xa1, 0x0b },
  494. { 0x74, 0x19 },
  495. { 0x9a, 0x80 },
  496. { 0x43, 0x14 },
  497. { REG_COM13, 0xc0 },
  498. { 0xff, 0xff },
  499. };
  500. static struct ov7670_win_size {
  501. int width;
  502. int height;
  503. unsigned char com7_bit;
  504. int hstart; /* Start/stop values for the camera. Note */
  505. int hstop; /* that they do not always make complete */
  506. int vstart; /* sense to humans, but evidently the sensor */
  507. int vstop; /* will do the right thing... */
  508. struct regval_list *regs; /* Regs to tweak */
  509. /* h/vref stuff */
  510. } ov7670_win_sizes[] = {
  511. /* VGA */
  512. {
  513. .width = VGA_WIDTH,
  514. .height = VGA_HEIGHT,
  515. .com7_bit = COM7_FMT_VGA,
  516. .hstart = 158, /* These values from */
  517. .hstop = 14, /* Omnivision */
  518. .vstart = 10,
  519. .vstop = 490,
  520. .regs = NULL,
  521. },
  522. /* CIF */
  523. {
  524. .width = CIF_WIDTH,
  525. .height = CIF_HEIGHT,
  526. .com7_bit = COM7_FMT_CIF,
  527. .hstart = 170, /* Empirically determined */
  528. .hstop = 90,
  529. .vstart = 14,
  530. .vstop = 494,
  531. .regs = NULL,
  532. },
  533. /* QVGA */
  534. {
  535. .width = QVGA_WIDTH,
  536. .height = QVGA_HEIGHT,
  537. .com7_bit = COM7_FMT_QVGA,
  538. .hstart = 164, /* Empirically determined */
  539. .hstop = 20,
  540. .vstart = 14,
  541. .vstop = 494,
  542. .regs = NULL,
  543. },
  544. /* QCIF */
  545. {
  546. .width = QCIF_WIDTH,
  547. .height = QCIF_HEIGHT,
  548. .com7_bit = COM7_FMT_VGA, /* see comment above */
  549. .hstart = 456, /* Empirically determined */
  550. .hstop = 24,
  551. .vstart = 14,
  552. .vstop = 494,
  553. .regs = ov7670_qcif_regs,
  554. },
  555. };
  556. #define N_WIN_SIZES (sizeof(ov7670_win_sizes)/sizeof(ov7670_win_sizes[0]))
  557. /*
  558. * Store a set of start/stop values into the camera.
  559. */
  560. static int ov7670_set_hw(struct i2c_client *client, int hstart, int hstop,
  561. int vstart, int vstop)
  562. {
  563. int ret;
  564. unsigned char v;
  565. /*
  566. * Horizontal: 11 bits, top 8 live in hstart and hstop. Bottom 3 of
  567. * hstart are in href[2:0], bottom 3 of hstop in href[5:3]. There is
  568. * a mystery "edge offset" value in the top two bits of href.
  569. */
  570. ret = ov7670_write(client, REG_HSTART, (hstart >> 3) & 0xff);
  571. ret += ov7670_write(client, REG_HSTOP, (hstop >> 3) & 0xff);
  572. ret += ov7670_read(client, REG_HREF, &v);
  573. v = (v & 0xc0) | ((hstop & 0x7) << 3) | (hstart & 0x7);
  574. msleep(10);
  575. ret += ov7670_write(client, REG_HREF, v);
  576. /*
  577. * Vertical: similar arrangement, but only 10 bits.
  578. */
  579. ret += ov7670_write(client, REG_VSTART, (vstart >> 2) & 0xff);
  580. ret += ov7670_write(client, REG_VSTOP, (vstop >> 2) & 0xff);
  581. ret += ov7670_read(client, REG_VREF, &v);
  582. v = (v & 0xf0) | ((vstop & 0x3) << 2) | (vstart & 0x3);
  583. msleep(10);
  584. ret += ov7670_write(client, REG_VREF, v);
  585. return ret;
  586. }
  587. static int ov7670_enum_fmt(struct i2c_client *c, struct v4l2_fmtdesc *fmt)
  588. {
  589. struct ov7670_format_struct *ofmt;
  590. if (fmt->index >= N_OV7670_FMTS)
  591. return -EINVAL;
  592. ofmt = ov7670_formats + fmt->index;
  593. fmt->flags = 0;
  594. strcpy(fmt->description, ofmt->desc);
  595. fmt->pixelformat = ofmt->pixelformat;
  596. return 0;
  597. }
  598. static int ov7670_try_fmt(struct i2c_client *c, struct v4l2_format *fmt,
  599. struct ov7670_format_struct **ret_fmt,
  600. struct ov7670_win_size **ret_wsize)
  601. {
  602. int index;
  603. struct ov7670_win_size *wsize;
  604. struct v4l2_pix_format *pix = &fmt->fmt.pix;
  605. for (index = 0; index < N_OV7670_FMTS; index++)
  606. if (ov7670_formats[index].pixelformat == pix->pixelformat)
  607. break;
  608. if (index >= N_OV7670_FMTS)
  609. return -EINVAL;
  610. if (ret_fmt != NULL)
  611. *ret_fmt = ov7670_formats + index;
  612. /*
  613. * Fields: the OV devices claim to be progressive.
  614. */
  615. if (pix->field == V4L2_FIELD_ANY)
  616. pix->field = V4L2_FIELD_NONE;
  617. else if (pix->field != V4L2_FIELD_NONE)
  618. return -EINVAL;
  619. /*
  620. * Round requested image size down to the nearest
  621. * we support, but not below the smallest.
  622. */
  623. for (wsize = ov7670_win_sizes; wsize < ov7670_win_sizes + N_WIN_SIZES;
  624. wsize++)
  625. if (pix->width >= wsize->width && pix->height >= wsize->height)
  626. break;
  627. if (wsize >= ov7670_win_sizes + N_WIN_SIZES)
  628. wsize--; /* Take the smallest one */
  629. if (ret_wsize != NULL)
  630. *ret_wsize = wsize;
  631. /*
  632. * Note the size we'll actually handle.
  633. */
  634. pix->width = wsize->width;
  635. pix->height = wsize->height;
  636. pix->bytesperline = pix->width*ov7670_formats[index].bpp;
  637. pix->sizeimage = pix->height*pix->bytesperline;
  638. return 0;
  639. }
  640. /*
  641. * Set a format.
  642. */
  643. static int ov7670_s_fmt(struct i2c_client *c, struct v4l2_format *fmt)
  644. {
  645. int ret;
  646. struct ov7670_format_struct *ovfmt;
  647. struct ov7670_win_size *wsize;
  648. struct ov7670_info *info = i2c_get_clientdata(c);
  649. unsigned char com7, clkrc;
  650. ret = ov7670_try_fmt(c, fmt, &ovfmt, &wsize);
  651. if (ret)
  652. return ret;
  653. /*
  654. * HACK: if we're running rgb565 we need to grab then rewrite
  655. * CLKRC. If we're *not*, however, then rewriting clkrc hoses
  656. * the colors.
  657. */
  658. if (fmt->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565) {
  659. ret = ov7670_read(c, REG_CLKRC, &clkrc);
  660. if (ret)
  661. return ret;
  662. }
  663. /*
  664. * COM7 is a pain in the ass, it doesn't like to be read then
  665. * quickly written afterward. But we have everything we need
  666. * to set it absolutely here, as long as the format-specific
  667. * register sets list it first.
  668. */
  669. com7 = ovfmt->regs[0].value;
  670. com7 |= wsize->com7_bit;
  671. ov7670_write(c, REG_COM7, com7);
  672. /*
  673. * Now write the rest of the array. Also store start/stops
  674. */
  675. ov7670_write_array(c, ovfmt->regs + 1);
  676. ov7670_set_hw(c, wsize->hstart, wsize->hstop, wsize->vstart,
  677. wsize->vstop);
  678. ret = 0;
  679. if (wsize->regs)
  680. ret = ov7670_write_array(c, wsize->regs);
  681. info->fmt = ovfmt;
  682. if (fmt->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB565 && ret == 0)
  683. ret = ov7670_write(c, REG_CLKRC, clkrc);
  684. return ret;
  685. }
  686. /*
  687. * Implement G/S_PARM. There is a "high quality" mode we could try
  688. * to do someday; for now, we just do the frame rate tweak.
  689. */
  690. static int ov7670_g_parm(struct i2c_client *c, struct v4l2_streamparm *parms)
  691. {
  692. struct v4l2_captureparm *cp = &parms->parm.capture;
  693. unsigned char clkrc;
  694. int ret;
  695. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  696. return -EINVAL;
  697. ret = ov7670_read(c, REG_CLKRC, &clkrc);
  698. if (ret < 0)
  699. return ret;
  700. memset(cp, 0, sizeof(struct v4l2_captureparm));
  701. cp->capability = V4L2_CAP_TIMEPERFRAME;
  702. cp->timeperframe.numerator = 1;
  703. cp->timeperframe.denominator = OV7670_FRAME_RATE;
  704. if ((clkrc & CLK_EXT) == 0 && (clkrc & CLK_SCALE) > 1)
  705. cp->timeperframe.denominator /= (clkrc & CLK_SCALE);
  706. return 0;
  707. }
  708. static int ov7670_s_parm(struct i2c_client *c, struct v4l2_streamparm *parms)
  709. {
  710. struct v4l2_captureparm *cp = &parms->parm.capture;
  711. struct v4l2_fract *tpf = &cp->timeperframe;
  712. unsigned char clkrc;
  713. int ret, div;
  714. if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
  715. return -EINVAL;
  716. if (cp->extendedmode != 0)
  717. return -EINVAL;
  718. /*
  719. * CLKRC has a reserved bit, so let's preserve it.
  720. */
  721. ret = ov7670_read(c, REG_CLKRC, &clkrc);
  722. if (ret < 0)
  723. return ret;
  724. if (tpf->numerator == 0 || tpf->denominator == 0)
  725. div = 1; /* Reset to full rate */
  726. else
  727. div = (tpf->numerator*OV7670_FRAME_RATE)/tpf->denominator;
  728. if (div == 0)
  729. div = 1;
  730. else if (div > CLK_SCALE)
  731. div = CLK_SCALE;
  732. clkrc = (clkrc & 0x80) | div;
  733. tpf->numerator = 1;
  734. tpf->denominator = OV7670_FRAME_RATE/div;
  735. return ov7670_write(c, REG_CLKRC, clkrc);
  736. }
  737. /*
  738. * Code for dealing with controls.
  739. */
  740. static int ov7670_store_cmatrix(struct i2c_client *client,
  741. int matrix[CMATRIX_LEN])
  742. {
  743. int i, ret;
  744. unsigned char signbits;
  745. /*
  746. * Weird crap seems to exist in the upper part of
  747. * the sign bits register, so let's preserve it.
  748. */
  749. ret = ov7670_read(client, REG_CMATRIX_SIGN, &signbits);
  750. signbits &= 0xc0;
  751. for (i = 0; i < CMATRIX_LEN; i++) {
  752. unsigned char raw;
  753. if (matrix[i] < 0) {
  754. signbits |= (1 << i);
  755. if (matrix[i] < -255)
  756. raw = 0xff;
  757. else
  758. raw = (-1 * matrix[i]) & 0xff;
  759. }
  760. else {
  761. if (matrix[i] > 255)
  762. raw = 0xff;
  763. else
  764. raw = matrix[i] & 0xff;
  765. }
  766. ret += ov7670_write(client, REG_CMATRIX_BASE + i, raw);
  767. }
  768. ret += ov7670_write(client, REG_CMATRIX_SIGN, signbits);
  769. return ret;
  770. }
  771. /*
  772. * Hue also requires messing with the color matrix. It also requires
  773. * trig functions, which tend not to be well supported in the kernel.
  774. * So here is a simple table of sine values, 0-90 degrees, in steps
  775. * of five degrees. Values are multiplied by 1000.
  776. *
  777. * The following naive approximate trig functions require an argument
  778. * carefully limited to -180 <= theta <= 180.
  779. */
  780. #define SIN_STEP 5
  781. static const int ov7670_sin_table[] = {
  782. 0, 87, 173, 258, 342, 422,
  783. 499, 573, 642, 707, 766, 819,
  784. 866, 906, 939, 965, 984, 996,
  785. 1000
  786. };
  787. static int ov7670_sine(int theta)
  788. {
  789. int chs = 1;
  790. int sine;
  791. if (theta < 0) {
  792. theta = -theta;
  793. chs = -1;
  794. }
  795. if (theta <= 90)
  796. sine = ov7670_sin_table[theta/SIN_STEP];
  797. else {
  798. theta -= 90;
  799. sine = 1000 - ov7670_sin_table[theta/SIN_STEP];
  800. }
  801. return sine*chs;
  802. }
  803. static int ov7670_cosine(int theta)
  804. {
  805. theta = 90 - theta;
  806. if (theta > 180)
  807. theta -= 360;
  808. else if (theta < -180)
  809. theta += 360;
  810. return ov7670_sine(theta);
  811. }
  812. static void ov7670_calc_cmatrix(struct ov7670_info *info,
  813. int matrix[CMATRIX_LEN])
  814. {
  815. int i;
  816. /*
  817. * Apply the current saturation setting first.
  818. */
  819. for (i = 0; i < CMATRIX_LEN; i++)
  820. matrix[i] = (info->fmt->cmatrix[i]*info->sat) >> 7;
  821. /*
  822. * Then, if need be, rotate the hue value.
  823. */
  824. if (info->hue != 0) {
  825. int sinth, costh, tmpmatrix[CMATRIX_LEN];
  826. memcpy(tmpmatrix, matrix, CMATRIX_LEN*sizeof(int));
  827. sinth = ov7670_sine(info->hue);
  828. costh = ov7670_cosine(info->hue);
  829. matrix[0] = (matrix[3]*sinth + matrix[0]*costh)/1000;
  830. matrix[1] = (matrix[4]*sinth + matrix[1]*costh)/1000;
  831. matrix[2] = (matrix[5]*sinth + matrix[2]*costh)/1000;
  832. matrix[3] = (matrix[3]*costh - matrix[0]*sinth)/1000;
  833. matrix[4] = (matrix[4]*costh - matrix[1]*sinth)/1000;
  834. matrix[5] = (matrix[5]*costh - matrix[2]*sinth)/1000;
  835. }
  836. }
  837. static int ov7670_t_sat(struct i2c_client *client, int value)
  838. {
  839. struct ov7670_info *info = i2c_get_clientdata(client);
  840. int matrix[CMATRIX_LEN];
  841. int ret;
  842. info->sat = value;
  843. ov7670_calc_cmatrix(info, matrix);
  844. ret = ov7670_store_cmatrix(client, matrix);
  845. return ret;
  846. }
  847. static int ov7670_q_sat(struct i2c_client *client, __s32 *value)
  848. {
  849. struct ov7670_info *info = i2c_get_clientdata(client);
  850. *value = info->sat;
  851. return 0;
  852. }
  853. static int ov7670_t_hue(struct i2c_client *client, int value)
  854. {
  855. struct ov7670_info *info = i2c_get_clientdata(client);
  856. int matrix[CMATRIX_LEN];
  857. int ret;
  858. if (value < -180 || value > 180)
  859. return -EINVAL;
  860. info->hue = value;
  861. ov7670_calc_cmatrix(info, matrix);
  862. ret = ov7670_store_cmatrix(client, matrix);
  863. return ret;
  864. }
  865. static int ov7670_q_hue(struct i2c_client *client, __s32 *value)
  866. {
  867. struct ov7670_info *info = i2c_get_clientdata(client);
  868. *value = info->hue;
  869. return 0;
  870. }
  871. /*
  872. * Some weird registers seem to store values in a sign/magnitude format!
  873. */
  874. static unsigned char ov7670_sm_to_abs(unsigned char v)
  875. {
  876. if ((v & 0x80) == 0)
  877. return v + 128;
  878. else
  879. return 128 - (v & 0x7f);
  880. }
  881. static unsigned char ov7670_abs_to_sm(unsigned char v)
  882. {
  883. if (v > 127)
  884. return v & 0x7f;
  885. else
  886. return (128 - v) | 0x80;
  887. }
  888. static int ov7670_t_brightness(struct i2c_client *client, int value)
  889. {
  890. unsigned char com8, v;
  891. int ret;
  892. ov7670_read(client, REG_COM8, &com8);
  893. com8 &= ~COM8_AEC;
  894. ov7670_write(client, REG_COM8, com8);
  895. v = ov7670_abs_to_sm(value);
  896. ret = ov7670_write(client, REG_BRIGHT, v);
  897. return ret;
  898. }
  899. static int ov7670_q_brightness(struct i2c_client *client, __s32 *value)
  900. {
  901. unsigned char v;
  902. int ret = ov7670_read(client, REG_BRIGHT, &v);
  903. *value = ov7670_sm_to_abs(v);
  904. return ret;
  905. }
  906. static int ov7670_t_contrast(struct i2c_client *client, int value)
  907. {
  908. return ov7670_write(client, REG_CONTRAS, (unsigned char) value);
  909. }
  910. static int ov7670_q_contrast(struct i2c_client *client, __s32 *value)
  911. {
  912. unsigned char v;
  913. int ret = ov7670_read(client, REG_CONTRAS, &v);
  914. *value = v;
  915. return ret;
  916. }
  917. static int ov7670_q_hflip(struct i2c_client *client, __s32 *value)
  918. {
  919. int ret;
  920. unsigned char v;
  921. ret = ov7670_read(client, REG_MVFP, &v);
  922. *value = (v & MVFP_MIRROR) == MVFP_MIRROR;
  923. return ret;
  924. }
  925. static int ov7670_t_hflip(struct i2c_client *client, int value)
  926. {
  927. unsigned char v;
  928. int ret;
  929. ret = ov7670_read(client, REG_MVFP, &v);
  930. if (value)
  931. v |= MVFP_MIRROR;
  932. else
  933. v &= ~MVFP_MIRROR;
  934. msleep(10); /* FIXME */
  935. ret += ov7670_write(client, REG_MVFP, v);
  936. return ret;
  937. }
  938. static int ov7670_q_vflip(struct i2c_client *client, __s32 *value)
  939. {
  940. int ret;
  941. unsigned char v;
  942. ret = ov7670_read(client, REG_MVFP, &v);
  943. *value = (v & MVFP_FLIP) == MVFP_FLIP;
  944. return ret;
  945. }
  946. static int ov7670_t_vflip(struct i2c_client *client, int value)
  947. {
  948. unsigned char v;
  949. int ret;
  950. ret = ov7670_read(client, REG_MVFP, &v);
  951. if (value)
  952. v |= MVFP_FLIP;
  953. else
  954. v &= ~MVFP_FLIP;
  955. msleep(10); /* FIXME */
  956. ret += ov7670_write(client, REG_MVFP, v);
  957. return ret;
  958. }
  959. static struct ov7670_control {
  960. struct v4l2_queryctrl qc;
  961. int (*query)(struct i2c_client *c, __s32 *value);
  962. int (*tweak)(struct i2c_client *c, int value);
  963. } ov7670_controls[] =
  964. {
  965. {
  966. .qc = {
  967. .id = V4L2_CID_BRIGHTNESS,
  968. .type = V4L2_CTRL_TYPE_INTEGER,
  969. .name = "Brightness",
  970. .minimum = 0,
  971. .maximum = 255,
  972. .step = 1,
  973. .default_value = 0x80,
  974. .flags = V4L2_CTRL_FLAG_SLIDER
  975. },
  976. .tweak = ov7670_t_brightness,
  977. .query = ov7670_q_brightness,
  978. },
  979. {
  980. .qc = {
  981. .id = V4L2_CID_CONTRAST,
  982. .type = V4L2_CTRL_TYPE_INTEGER,
  983. .name = "Contrast",
  984. .minimum = 0,
  985. .maximum = 127,
  986. .step = 1,
  987. .default_value = 0x40, /* XXX ov7670 spec */
  988. .flags = V4L2_CTRL_FLAG_SLIDER
  989. },
  990. .tweak = ov7670_t_contrast,
  991. .query = ov7670_q_contrast,
  992. },
  993. {
  994. .qc = {
  995. .id = V4L2_CID_SATURATION,
  996. .type = V4L2_CTRL_TYPE_INTEGER,
  997. .name = "Saturation",
  998. .minimum = 0,
  999. .maximum = 256,
  1000. .step = 1,
  1001. .default_value = 0x80,
  1002. .flags = V4L2_CTRL_FLAG_SLIDER
  1003. },
  1004. .tweak = ov7670_t_sat,
  1005. .query = ov7670_q_sat,
  1006. },
  1007. {
  1008. .qc = {
  1009. .id = V4L2_CID_HUE,
  1010. .type = V4L2_CTRL_TYPE_INTEGER,
  1011. .name = "HUE",
  1012. .minimum = -180,
  1013. .maximum = 180,
  1014. .step = 5,
  1015. .default_value = 0,
  1016. .flags = V4L2_CTRL_FLAG_SLIDER
  1017. },
  1018. .tweak = ov7670_t_hue,
  1019. .query = ov7670_q_hue,
  1020. },
  1021. {
  1022. .qc = {
  1023. .id = V4L2_CID_VFLIP,
  1024. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1025. .name = "Vertical flip",
  1026. .minimum = 0,
  1027. .maximum = 1,
  1028. .step = 1,
  1029. .default_value = 0,
  1030. },
  1031. .tweak = ov7670_t_vflip,
  1032. .query = ov7670_q_vflip,
  1033. },
  1034. {
  1035. .qc = {
  1036. .id = V4L2_CID_HFLIP,
  1037. .type = V4L2_CTRL_TYPE_BOOLEAN,
  1038. .name = "Horizontal mirror",
  1039. .minimum = 0,
  1040. .maximum = 1,
  1041. .step = 1,
  1042. .default_value = 0,
  1043. },
  1044. .tweak = ov7670_t_hflip,
  1045. .query = ov7670_q_hflip,
  1046. },
  1047. };
  1048. #define N_CONTROLS (sizeof(ov7670_controls)/sizeof(ov7670_controls[0]))
  1049. static struct ov7670_control *ov7670_find_control(__u32 id)
  1050. {
  1051. int i;
  1052. for (i = 0; i < N_CONTROLS; i++)
  1053. if (ov7670_controls[i].qc.id == id)
  1054. return ov7670_controls + i;
  1055. return NULL;
  1056. }
  1057. static int ov7670_queryctrl(struct i2c_client *client,
  1058. struct v4l2_queryctrl *qc)
  1059. {
  1060. struct ov7670_control *ctrl = ov7670_find_control(qc->id);
  1061. if (ctrl == NULL)
  1062. return -EINVAL;
  1063. *qc = ctrl->qc;
  1064. return 0;
  1065. }
  1066. static int ov7670_g_ctrl(struct i2c_client *client, struct v4l2_control *ctrl)
  1067. {
  1068. struct ov7670_control *octrl = ov7670_find_control(ctrl->id);
  1069. int ret;
  1070. if (octrl == NULL)
  1071. return -EINVAL;
  1072. ret = octrl->query(client, &ctrl->value);
  1073. if (ret >= 0)
  1074. return 0;
  1075. return ret;
  1076. }
  1077. static int ov7670_s_ctrl(struct i2c_client *client, struct v4l2_control *ctrl)
  1078. {
  1079. struct ov7670_control *octrl = ov7670_find_control(ctrl->id);
  1080. int ret;
  1081. if (octrl == NULL)
  1082. return -EINVAL;
  1083. ret = octrl->tweak(client, ctrl->value);
  1084. if (ret >= 0)
  1085. return 0;
  1086. return ret;
  1087. }
  1088. /*
  1089. * Basic i2c stuff.
  1090. */
  1091. static struct i2c_driver ov7670_driver;
  1092. static int ov7670_attach(struct i2c_adapter *adapter)
  1093. {
  1094. int ret;
  1095. struct i2c_client *client;
  1096. struct ov7670_info *info;
  1097. /*
  1098. * For now: only deal with adapters we recognize.
  1099. */
  1100. if (adapter->id != I2C_HW_SMBUS_CAFE)
  1101. return -ENODEV;
  1102. client = kzalloc(sizeof (struct i2c_client), GFP_KERNEL);
  1103. if (! client)
  1104. return -ENOMEM;
  1105. client->adapter = adapter;
  1106. client->addr = OV7670_I2C_ADDR;
  1107. client->driver = &ov7670_driver,
  1108. strcpy(client->name, "OV7670");
  1109. /*
  1110. * Set up our info structure.
  1111. */
  1112. info = kzalloc(sizeof (struct ov7670_info), GFP_KERNEL);
  1113. if (! info) {
  1114. ret = -ENOMEM;
  1115. goto out_free;
  1116. }
  1117. info->fmt = &ov7670_formats[0];
  1118. info->sat = 128; /* Review this */
  1119. i2c_set_clientdata(client, info);
  1120. /*
  1121. * Make sure it's an ov7670
  1122. */
  1123. ret = ov7670_detect(client);
  1124. if (ret)
  1125. goto out_free_info;
  1126. ret = i2c_attach_client(client);
  1127. if (ret)
  1128. goto out_free_info;
  1129. return 0;
  1130. out_free_info:
  1131. kfree(info);
  1132. out_free:
  1133. kfree(client);
  1134. return ret;
  1135. }
  1136. static int ov7670_detach(struct i2c_client *client)
  1137. {
  1138. i2c_detach_client(client);
  1139. kfree(i2c_get_clientdata(client));
  1140. kfree(client);
  1141. return 0;
  1142. }
  1143. static int ov7670_command(struct i2c_client *client, unsigned int cmd,
  1144. void *arg)
  1145. {
  1146. switch (cmd) {
  1147. case VIDIOC_G_CHIP_IDENT:
  1148. return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_OV7670, 0);
  1149. case VIDIOC_INT_RESET:
  1150. ov7670_reset(client);
  1151. return 0;
  1152. case VIDIOC_INT_INIT:
  1153. return ov7670_init(client);
  1154. case VIDIOC_ENUM_FMT:
  1155. return ov7670_enum_fmt(client, (struct v4l2_fmtdesc *) arg);
  1156. case VIDIOC_TRY_FMT:
  1157. return ov7670_try_fmt(client, (struct v4l2_format *) arg, NULL, NULL);
  1158. case VIDIOC_S_FMT:
  1159. return ov7670_s_fmt(client, (struct v4l2_format *) arg);
  1160. case VIDIOC_QUERYCTRL:
  1161. return ov7670_queryctrl(client, (struct v4l2_queryctrl *) arg);
  1162. case VIDIOC_S_CTRL:
  1163. return ov7670_s_ctrl(client, (struct v4l2_control *) arg);
  1164. case VIDIOC_G_CTRL:
  1165. return ov7670_g_ctrl(client, (struct v4l2_control *) arg);
  1166. case VIDIOC_S_PARM:
  1167. return ov7670_s_parm(client, (struct v4l2_streamparm *) arg);
  1168. case VIDIOC_G_PARM:
  1169. return ov7670_g_parm(client, (struct v4l2_streamparm *) arg);
  1170. }
  1171. return -EINVAL;
  1172. }
  1173. static struct i2c_driver ov7670_driver = {
  1174. .driver = {
  1175. .name = "ov7670",
  1176. },
  1177. .id = I2C_DRIVERID_OV7670,
  1178. .class = I2C_CLASS_CAM_DIGITAL,
  1179. .attach_adapter = ov7670_attach,
  1180. .detach_client = ov7670_detach,
  1181. .command = ov7670_command,
  1182. };
  1183. /*
  1184. * Module initialization
  1185. */
  1186. static int __init ov7670_mod_init(void)
  1187. {
  1188. printk(KERN_NOTICE "OmniVision ov7670 sensor driver, at your service\n");
  1189. return i2c_add_driver(&ov7670_driver);
  1190. }
  1191. static void __exit ov7670_mod_exit(void)
  1192. {
  1193. i2c_del_driver(&ov7670_driver);
  1194. }
  1195. module_init(ov7670_mod_init);
  1196. module_exit(ov7670_mod_exit);