tda10086.c 18 KB

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  1. /*
  2. Driver for Philips tda10086 DVBS Demodulator
  3. (c) 2006 Andrew de Quincey
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include <linux/init.h>
  17. #include <linux/module.h>
  18. #include <linux/moduleparam.h>
  19. #include <linux/device.h>
  20. #include <linux/jiffies.h>
  21. #include <linux/string.h>
  22. #include <linux/slab.h>
  23. #include "dvb_frontend.h"
  24. #include "tda10086.h"
  25. #define SACLK 96000000
  26. struct tda10086_state {
  27. struct i2c_adapter* i2c;
  28. const struct tda10086_config* config;
  29. struct dvb_frontend frontend;
  30. /* private demod data */
  31. u32 frequency;
  32. u32 symbol_rate;
  33. bool has_lock;
  34. };
  35. static int debug = 0;
  36. #define dprintk(args...) \
  37. do { \
  38. if (debug) printk(KERN_DEBUG "tda10086: " args); \
  39. } while (0)
  40. static int tda10086_write_byte(struct tda10086_state *state, int reg, int data)
  41. {
  42. int ret;
  43. u8 b0[] = { reg, data };
  44. struct i2c_msg msg = { .flags = 0, .buf = b0, .len = 2 };
  45. msg.addr = state->config->demod_address;
  46. ret = i2c_transfer(state->i2c, &msg, 1);
  47. if (ret != 1)
  48. dprintk("%s: error reg=0x%x, data=0x%x, ret=%i\n",
  49. __FUNCTION__, reg, data, ret);
  50. return (ret != 1) ? ret : 0;
  51. }
  52. static int tda10086_read_byte(struct tda10086_state *state, int reg)
  53. {
  54. int ret;
  55. u8 b0[] = { reg };
  56. u8 b1[] = { 0 };
  57. struct i2c_msg msg[] = {{ .flags = 0, .buf = b0, .len = 1 },
  58. { .flags = I2C_M_RD, .buf = b1, .len = 1 }};
  59. msg[0].addr = state->config->demod_address;
  60. msg[1].addr = state->config->demod_address;
  61. ret = i2c_transfer(state->i2c, msg, 2);
  62. if (ret != 2) {
  63. dprintk("%s: error reg=0x%x, ret=%i\n", __FUNCTION__, reg,
  64. ret);
  65. return ret;
  66. }
  67. return b1[0];
  68. }
  69. static int tda10086_write_mask(struct tda10086_state *state, int reg, int mask, int data)
  70. {
  71. int val;
  72. // read a byte and check
  73. val = tda10086_read_byte(state, reg);
  74. if (val < 0)
  75. return val;
  76. // mask if off
  77. val = val & ~mask;
  78. val |= data & 0xff;
  79. // write it out again
  80. return tda10086_write_byte(state, reg, val);
  81. }
  82. static int tda10086_init(struct dvb_frontend* fe)
  83. {
  84. struct tda10086_state* state = fe->demodulator_priv;
  85. dprintk ("%s\n", __FUNCTION__);
  86. // reset
  87. tda10086_write_byte(state, 0x00, 0x00);
  88. msleep(10);
  89. // misc setup
  90. tda10086_write_byte(state, 0x01, 0x94);
  91. tda10086_write_byte(state, 0x02, 0x35); // NOTE: TT drivers appear to disable CSWP
  92. tda10086_write_byte(state, 0x03, 0xe4);
  93. tda10086_write_byte(state, 0x04, 0x43);
  94. tda10086_write_byte(state, 0x0c, 0x0c);
  95. tda10086_write_byte(state, 0x1b, 0xb0); // noise threshold
  96. tda10086_write_byte(state, 0x20, 0x89); // misc
  97. tda10086_write_byte(state, 0x30, 0x04); // acquisition period length
  98. tda10086_write_byte(state, 0x32, 0x00); // irq off
  99. tda10086_write_byte(state, 0x31, 0x56); // setup AFC
  100. // setup PLL (assumes 16Mhz XIN)
  101. tda10086_write_byte(state, 0x55, 0x2c); // misc PLL setup
  102. tda10086_write_byte(state, 0x3a, 0x0b); // M=12
  103. tda10086_write_byte(state, 0x3b, 0x01); // P=2
  104. tda10086_write_mask(state, 0x55, 0x20, 0x00); // powerup PLL
  105. // setup TS interface
  106. tda10086_write_byte(state, 0x11, 0x81);
  107. tda10086_write_byte(state, 0x12, 0x81);
  108. tda10086_write_byte(state, 0x19, 0x40); // parallel mode A + MSBFIRST
  109. tda10086_write_byte(state, 0x56, 0x80); // powerdown WPLL - unused in the mode we use
  110. tda10086_write_byte(state, 0x57, 0x08); // bypass WPLL - unused in the mode we use
  111. tda10086_write_byte(state, 0x10, 0x2a);
  112. // setup ADC
  113. tda10086_write_byte(state, 0x58, 0x61); // ADC setup
  114. tda10086_write_mask(state, 0x58, 0x01, 0x00); // powerup ADC
  115. // setup AGC
  116. tda10086_write_byte(state, 0x05, 0x0B);
  117. tda10086_write_byte(state, 0x37, 0x63);
  118. tda10086_write_byte(state, 0x3f, 0x0a); // NOTE: flydvb varies it
  119. tda10086_write_byte(state, 0x40, 0x64);
  120. tda10086_write_byte(state, 0x41, 0x4f);
  121. tda10086_write_byte(state, 0x42, 0x43);
  122. // setup viterbi
  123. tda10086_write_byte(state, 0x1a, 0x11); // VBER 10^6, DVB, QPSK
  124. // setup carrier recovery
  125. tda10086_write_byte(state, 0x3d, 0x80);
  126. // setup SEC
  127. tda10086_write_byte(state, 0x36, 0x00); // all SEC off
  128. tda10086_write_byte(state, 0x34, (((1<<19) * (22000/1000)) / (SACLK/1000))); // } tone frequency
  129. tda10086_write_byte(state, 0x35, (((1<<19) * (22000/1000)) / (SACLK/1000)) >> 8); // }
  130. return 0;
  131. }
  132. static void tda10086_diseqc_wait(struct tda10086_state *state)
  133. {
  134. unsigned long timeout = jiffies + msecs_to_jiffies(200);
  135. while (!(tda10086_read_byte(state, 0x50) & 0x01)) {
  136. if(time_after(jiffies, timeout)) {
  137. printk("%s: diseqc queue not ready, command may be lost.\n", __FUNCTION__);
  138. break;
  139. }
  140. msleep(10);
  141. }
  142. }
  143. static int tda10086_set_tone (struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
  144. {
  145. struct tda10086_state* state = fe->demodulator_priv;
  146. dprintk ("%s\n", __FUNCTION__);
  147. switch(tone) {
  148. case SEC_TONE_OFF:
  149. tda10086_write_byte(state, 0x36, 0x00);
  150. break;
  151. case SEC_TONE_ON:
  152. tda10086_write_byte(state, 0x36, 0x01);
  153. break;
  154. }
  155. return 0;
  156. }
  157. static int tda10086_send_master_cmd (struct dvb_frontend* fe,
  158. struct dvb_diseqc_master_cmd* cmd)
  159. {
  160. struct tda10086_state* state = fe->demodulator_priv;
  161. int i;
  162. u8 oldval;
  163. dprintk ("%s\n", __FUNCTION__);
  164. if (cmd->msg_len > 6)
  165. return -EINVAL;
  166. oldval = tda10086_read_byte(state, 0x36);
  167. for(i=0; i< cmd->msg_len; i++) {
  168. tda10086_write_byte(state, 0x48+i, cmd->msg[i]);
  169. }
  170. tda10086_write_byte(state, 0x36, 0x08 | ((cmd->msg_len - 1) << 4));
  171. tda10086_diseqc_wait(state);
  172. tda10086_write_byte(state, 0x36, oldval);
  173. return 0;
  174. }
  175. static int tda10086_send_burst (struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd)
  176. {
  177. struct tda10086_state* state = fe->demodulator_priv;
  178. u8 oldval = tda10086_read_byte(state, 0x36);
  179. dprintk ("%s\n", __FUNCTION__);
  180. switch(minicmd) {
  181. case SEC_MINI_A:
  182. tda10086_write_byte(state, 0x36, 0x04);
  183. break;
  184. case SEC_MINI_B:
  185. tda10086_write_byte(state, 0x36, 0x06);
  186. break;
  187. }
  188. tda10086_diseqc_wait(state);
  189. tda10086_write_byte(state, 0x36, oldval);
  190. return 0;
  191. }
  192. static int tda10086_set_inversion(struct tda10086_state *state,
  193. struct dvb_frontend_parameters *fe_params)
  194. {
  195. u8 invval = 0x80;
  196. dprintk ("%s %i %i\n", __FUNCTION__, fe_params->inversion, state->config->invert);
  197. switch(fe_params->inversion) {
  198. case INVERSION_OFF:
  199. if (state->config->invert)
  200. invval = 0x40;
  201. break;
  202. case INVERSION_ON:
  203. if (!state->config->invert)
  204. invval = 0x40;
  205. break;
  206. case INVERSION_AUTO:
  207. invval = 0x00;
  208. break;
  209. }
  210. tda10086_write_mask(state, 0x0c, 0xc0, invval);
  211. return 0;
  212. }
  213. static int tda10086_set_symbol_rate(struct tda10086_state *state,
  214. struct dvb_frontend_parameters *fe_params)
  215. {
  216. u8 dfn = 0;
  217. u8 afs = 0;
  218. u8 byp = 0;
  219. u8 reg37 = 0x43;
  220. u8 reg42 = 0x43;
  221. u64 big;
  222. u32 tmp;
  223. u32 bdr;
  224. u32 bdri;
  225. u32 symbol_rate = fe_params->u.qpsk.symbol_rate;
  226. dprintk ("%s %i\n", __FUNCTION__, symbol_rate);
  227. // setup the decimation and anti-aliasing filters..
  228. if (symbol_rate < (u32) (SACLK * 0.0137)) {
  229. dfn=4;
  230. afs=1;
  231. } else if (symbol_rate < (u32) (SACLK * 0.0208)) {
  232. dfn=4;
  233. afs=0;
  234. } else if (symbol_rate < (u32) (SACLK * 0.0270)) {
  235. dfn=3;
  236. afs=1;
  237. } else if (symbol_rate < (u32) (SACLK * 0.0416)) {
  238. dfn=3;
  239. afs=0;
  240. } else if (symbol_rate < (u32) (SACLK * 0.0550)) {
  241. dfn=2;
  242. afs=1;
  243. } else if (symbol_rate < (u32) (SACLK * 0.0833)) {
  244. dfn=2;
  245. afs=0;
  246. } else if (symbol_rate < (u32) (SACLK * 0.1100)) {
  247. dfn=1;
  248. afs=1;
  249. } else if (symbol_rate < (u32) (SACLK * 0.1666)) {
  250. dfn=1;
  251. afs=0;
  252. } else if (symbol_rate < (u32) (SACLK * 0.2200)) {
  253. dfn=0;
  254. afs=1;
  255. } else if (symbol_rate < (u32) (SACLK * 0.3333)) {
  256. dfn=0;
  257. afs=0;
  258. } else {
  259. reg37 = 0x63;
  260. reg42 = 0x4f;
  261. byp=1;
  262. }
  263. // calculate BDR
  264. big = (1ULL<<21) * ((u64) symbol_rate/1000ULL) * (1ULL<<dfn);
  265. big += ((SACLK/1000ULL)-1ULL);
  266. do_div(big, (SACLK/1000ULL));
  267. bdr = big & 0xfffff;
  268. // calculate BDRI
  269. tmp = (1<<dfn)*(symbol_rate/1000);
  270. bdri = ((32 * (SACLK/1000)) + (tmp-1)) / tmp;
  271. tda10086_write_byte(state, 0x21, (afs << 7) | dfn);
  272. tda10086_write_mask(state, 0x20, 0x08, byp << 3);
  273. tda10086_write_byte(state, 0x06, bdr);
  274. tda10086_write_byte(state, 0x07, bdr >> 8);
  275. tda10086_write_byte(state, 0x08, bdr >> 16);
  276. tda10086_write_byte(state, 0x09, bdri);
  277. tda10086_write_byte(state, 0x37, reg37);
  278. tda10086_write_byte(state, 0x42, reg42);
  279. return 0;
  280. }
  281. static int tda10086_set_fec(struct tda10086_state *state,
  282. struct dvb_frontend_parameters *fe_params)
  283. {
  284. u8 fecval;
  285. dprintk ("%s %i\n", __FUNCTION__, fe_params->u.qpsk.fec_inner);
  286. switch(fe_params->u.qpsk.fec_inner) {
  287. case FEC_1_2:
  288. fecval = 0x00;
  289. break;
  290. case FEC_2_3:
  291. fecval = 0x01;
  292. break;
  293. case FEC_3_4:
  294. fecval = 0x02;
  295. break;
  296. case FEC_4_5:
  297. fecval = 0x03;
  298. break;
  299. case FEC_5_6:
  300. fecval = 0x04;
  301. break;
  302. case FEC_6_7:
  303. fecval = 0x05;
  304. break;
  305. case FEC_7_8:
  306. fecval = 0x06;
  307. break;
  308. case FEC_8_9:
  309. fecval = 0x07;
  310. break;
  311. case FEC_AUTO:
  312. fecval = 0x08;
  313. break;
  314. default:
  315. return -1;
  316. }
  317. tda10086_write_byte(state, 0x0d, fecval);
  318. return 0;
  319. }
  320. static int tda10086_set_frontend(struct dvb_frontend* fe,
  321. struct dvb_frontend_parameters *fe_params)
  322. {
  323. struct tda10086_state *state = fe->demodulator_priv;
  324. int ret;
  325. u32 freq = 0;
  326. int freqoff;
  327. dprintk ("%s\n", __FUNCTION__);
  328. // modify parameters for tuning
  329. tda10086_write_byte(state, 0x02, 0x35);
  330. state->has_lock = false;
  331. // set params
  332. if (fe->ops.tuner_ops.set_params) {
  333. fe->ops.tuner_ops.set_params(fe, fe_params);
  334. if (fe->ops.i2c_gate_ctrl)
  335. fe->ops.i2c_gate_ctrl(fe, 0);
  336. if (fe->ops.tuner_ops.get_frequency)
  337. fe->ops.tuner_ops.get_frequency(fe, &freq);
  338. if (fe->ops.i2c_gate_ctrl)
  339. fe->ops.i2c_gate_ctrl(fe, 0);
  340. }
  341. // calcluate the frequency offset (in *Hz* not kHz)
  342. freqoff = fe_params->frequency - freq;
  343. freqoff = ((1<<16) * freqoff) / (SACLK/1000);
  344. tda10086_write_byte(state, 0x3d, 0x80 | ((freqoff >> 8) & 0x7f));
  345. tda10086_write_byte(state, 0x3e, freqoff);
  346. if ((ret = tda10086_set_inversion(state, fe_params)) < 0)
  347. return ret;
  348. if ((ret = tda10086_set_symbol_rate(state, fe_params)) < 0)
  349. return ret;
  350. if ((ret = tda10086_set_fec(state, fe_params)) < 0)
  351. return ret;
  352. // soft reset + disable TS output until lock
  353. tda10086_write_mask(state, 0x10, 0x40, 0x40);
  354. tda10086_write_mask(state, 0x00, 0x01, 0x00);
  355. state->symbol_rate = fe_params->u.qpsk.symbol_rate;
  356. state->frequency = fe_params->frequency;
  357. return 0;
  358. }
  359. static int tda10086_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *fe_params)
  360. {
  361. struct tda10086_state* state = fe->demodulator_priv;
  362. u8 val;
  363. int tmp;
  364. u64 tmp64;
  365. dprintk ("%s\n", __FUNCTION__);
  366. // check for invalid symbol rate
  367. if (fe_params->u.qpsk.symbol_rate < 500000)
  368. return -EINVAL;
  369. // calculate the updated frequency (note: we convert from Hz->kHz)
  370. tmp64 = tda10086_read_byte(state, 0x52);
  371. tmp64 |= (tda10086_read_byte(state, 0x51) << 8);
  372. if (tmp64 & 0x8000)
  373. tmp64 |= 0xffffffffffff0000ULL;
  374. tmp64 = (tmp64 * (SACLK/1000ULL));
  375. do_div(tmp64, (1ULL<<15) * (1ULL<<1));
  376. fe_params->frequency = (int) state->frequency + (int) tmp64;
  377. // the inversion
  378. val = tda10086_read_byte(state, 0x0c);
  379. if (val & 0x80) {
  380. switch(val & 0x40) {
  381. case 0x00:
  382. fe_params->inversion = INVERSION_OFF;
  383. if (state->config->invert)
  384. fe_params->inversion = INVERSION_ON;
  385. break;
  386. default:
  387. fe_params->inversion = INVERSION_ON;
  388. if (state->config->invert)
  389. fe_params->inversion = INVERSION_OFF;
  390. break;
  391. }
  392. } else {
  393. tda10086_read_byte(state, 0x0f);
  394. switch(val & 0x02) {
  395. case 0x00:
  396. fe_params->inversion = INVERSION_OFF;
  397. if (state->config->invert)
  398. fe_params->inversion = INVERSION_ON;
  399. break;
  400. default:
  401. fe_params->inversion = INVERSION_ON;
  402. if (state->config->invert)
  403. fe_params->inversion = INVERSION_OFF;
  404. break;
  405. }
  406. }
  407. // calculate the updated symbol rate
  408. tmp = tda10086_read_byte(state, 0x1d);
  409. if (tmp & 0x80)
  410. tmp |= 0xffffff00;
  411. tmp = (tmp * 480 * (1<<1)) / 128;
  412. tmp = ((state->symbol_rate/1000) * tmp) / (1000000/1000);
  413. fe_params->u.qpsk.symbol_rate = state->symbol_rate + tmp;
  414. // the FEC
  415. val = (tda10086_read_byte(state, 0x0d) & 0x70) >> 4;
  416. switch(val) {
  417. case 0x00:
  418. fe_params->u.qpsk.fec_inner = FEC_1_2;
  419. break;
  420. case 0x01:
  421. fe_params->u.qpsk.fec_inner = FEC_2_3;
  422. break;
  423. case 0x02:
  424. fe_params->u.qpsk.fec_inner = FEC_3_4;
  425. break;
  426. case 0x03:
  427. fe_params->u.qpsk.fec_inner = FEC_4_5;
  428. break;
  429. case 0x04:
  430. fe_params->u.qpsk.fec_inner = FEC_5_6;
  431. break;
  432. case 0x05:
  433. fe_params->u.qpsk.fec_inner = FEC_6_7;
  434. break;
  435. case 0x06:
  436. fe_params->u.qpsk.fec_inner = FEC_7_8;
  437. break;
  438. case 0x07:
  439. fe_params->u.qpsk.fec_inner = FEC_8_9;
  440. break;
  441. }
  442. return 0;
  443. }
  444. static int tda10086_read_status(struct dvb_frontend* fe, fe_status_t *fe_status)
  445. {
  446. struct tda10086_state* state = fe->demodulator_priv;
  447. u8 val;
  448. dprintk ("%s\n", __FUNCTION__);
  449. val = tda10086_read_byte(state, 0x0e);
  450. *fe_status = 0;
  451. if (val & 0x01)
  452. *fe_status |= FE_HAS_SIGNAL;
  453. if (val & 0x02)
  454. *fe_status |= FE_HAS_CARRIER;
  455. if (val & 0x04)
  456. *fe_status |= FE_HAS_VITERBI;
  457. if (val & 0x08)
  458. *fe_status |= FE_HAS_SYNC;
  459. if (val & 0x10) {
  460. *fe_status |= FE_HAS_LOCK;
  461. if (!state->has_lock) {
  462. state->has_lock = true;
  463. // modify parameters for stable reception
  464. tda10086_write_byte(state, 0x02, 0x00);
  465. }
  466. }
  467. return 0;
  468. }
  469. static int tda10086_read_signal_strength(struct dvb_frontend* fe, u16 * signal)
  470. {
  471. struct tda10086_state* state = fe->demodulator_priv;
  472. u8 _str;
  473. dprintk ("%s\n", __FUNCTION__);
  474. _str = 0xff - tda10086_read_byte(state, 0x43);
  475. *signal = (_str << 8) | _str;
  476. return 0;
  477. }
  478. static int tda10086_read_snr(struct dvb_frontend* fe, u16 * snr)
  479. {
  480. struct tda10086_state* state = fe->demodulator_priv;
  481. u8 _snr;
  482. dprintk ("%s\n", __FUNCTION__);
  483. _snr = 0xff - tda10086_read_byte(state, 0x1c);
  484. *snr = (_snr << 8) | _snr;
  485. return 0;
  486. }
  487. static int tda10086_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
  488. {
  489. struct tda10086_state* state = fe->demodulator_priv;
  490. dprintk ("%s\n", __FUNCTION__);
  491. // read it
  492. *ucblocks = tda10086_read_byte(state, 0x18) & 0x7f;
  493. // reset counter
  494. tda10086_write_byte(state, 0x18, 0x00);
  495. tda10086_write_byte(state, 0x18, 0x80);
  496. return 0;
  497. }
  498. static int tda10086_read_ber(struct dvb_frontend* fe, u32* ber)
  499. {
  500. struct tda10086_state* state = fe->demodulator_priv;
  501. dprintk ("%s\n", __FUNCTION__);
  502. // read it
  503. *ber = 0;
  504. *ber |= tda10086_read_byte(state, 0x15);
  505. *ber |= tda10086_read_byte(state, 0x16) << 8;
  506. *ber |= (tda10086_read_byte(state, 0x17) & 0xf) << 16;
  507. return 0;
  508. }
  509. static int tda10086_sleep(struct dvb_frontend* fe)
  510. {
  511. struct tda10086_state* state = fe->demodulator_priv;
  512. dprintk ("%s\n", __FUNCTION__);
  513. tda10086_write_mask(state, 0x00, 0x08, 0x08);
  514. return 0;
  515. }
  516. static int tda10086_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
  517. {
  518. struct tda10086_state* state = fe->demodulator_priv;
  519. dprintk ("%s\n", __FUNCTION__);
  520. if (enable) {
  521. tda10086_write_mask(state, 0x00, 0x10, 0x10);
  522. } else {
  523. tda10086_write_mask(state, 0x00, 0x10, 0x00);
  524. }
  525. return 0;
  526. }
  527. static int tda10086_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
  528. {
  529. if (fesettings->parameters.u.qpsk.symbol_rate > 20000000) {
  530. fesettings->min_delay_ms = 50;
  531. fesettings->step_size = 2000;
  532. fesettings->max_drift = 8000;
  533. } else if (fesettings->parameters.u.qpsk.symbol_rate > 12000000) {
  534. fesettings->min_delay_ms = 100;
  535. fesettings->step_size = 1500;
  536. fesettings->max_drift = 9000;
  537. } else if (fesettings->parameters.u.qpsk.symbol_rate > 8000000) {
  538. fesettings->min_delay_ms = 100;
  539. fesettings->step_size = 1000;
  540. fesettings->max_drift = 8000;
  541. } else if (fesettings->parameters.u.qpsk.symbol_rate > 4000000) {
  542. fesettings->min_delay_ms = 100;
  543. fesettings->step_size = 500;
  544. fesettings->max_drift = 7000;
  545. } else if (fesettings->parameters.u.qpsk.symbol_rate > 2000000) {
  546. fesettings->min_delay_ms = 200;
  547. fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000);
  548. fesettings->max_drift = 14 * fesettings->step_size;
  549. } else {
  550. fesettings->min_delay_ms = 200;
  551. fesettings->step_size = (fesettings->parameters.u.qpsk.symbol_rate / 8000);
  552. fesettings->max_drift = 18 * fesettings->step_size;
  553. }
  554. return 0;
  555. }
  556. static void tda10086_release(struct dvb_frontend* fe)
  557. {
  558. struct tda10086_state *state = fe->demodulator_priv;
  559. tda10086_sleep(fe);
  560. kfree(state);
  561. }
  562. static struct dvb_frontend_ops tda10086_ops = {
  563. .info = {
  564. .name = "Philips TDA10086 DVB-S",
  565. .type = FE_QPSK,
  566. .frequency_min = 950000,
  567. .frequency_max = 2150000,
  568. .frequency_stepsize = 125, /* kHz for QPSK frontends */
  569. .symbol_rate_min = 1000000,
  570. .symbol_rate_max = 45000000,
  571. .caps = FE_CAN_INVERSION_AUTO |
  572. FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  573. FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  574. FE_CAN_QPSK
  575. },
  576. .release = tda10086_release,
  577. .init = tda10086_init,
  578. .sleep = tda10086_sleep,
  579. .i2c_gate_ctrl = tda10086_i2c_gate_ctrl,
  580. .set_frontend = tda10086_set_frontend,
  581. .get_frontend = tda10086_get_frontend,
  582. .get_tune_settings = tda10086_get_tune_settings,
  583. .read_status = tda10086_read_status,
  584. .read_ber = tda10086_read_ber,
  585. .read_signal_strength = tda10086_read_signal_strength,
  586. .read_snr = tda10086_read_snr,
  587. .read_ucblocks = tda10086_read_ucblocks,
  588. .diseqc_send_master_cmd = tda10086_send_master_cmd,
  589. .diseqc_send_burst = tda10086_send_burst,
  590. .set_tone = tda10086_set_tone,
  591. };
  592. struct dvb_frontend* tda10086_attach(const struct tda10086_config* config,
  593. struct i2c_adapter* i2c)
  594. {
  595. struct tda10086_state *state;
  596. dprintk ("%s\n", __FUNCTION__);
  597. /* allocate memory for the internal state */
  598. state = kmalloc(sizeof(struct tda10086_state), GFP_KERNEL);
  599. if (!state)
  600. return NULL;
  601. /* setup the state */
  602. state->config = config;
  603. state->i2c = i2c;
  604. /* check if the demod is there */
  605. if (tda10086_read_byte(state, 0x1e) != 0xe1) {
  606. kfree(state);
  607. return NULL;
  608. }
  609. /* create dvb_frontend */
  610. memcpy(&state->frontend.ops, &tda10086_ops, sizeof(struct dvb_frontend_ops));
  611. state->frontend.demodulator_priv = state;
  612. return &state->frontend;
  613. }
  614. module_param(debug, int, 0644);
  615. MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
  616. MODULE_DESCRIPTION("Philips TDA10086 DVB-S Demodulator");
  617. MODULE_AUTHOR("Andrew de Quincey");
  618. MODULE_LICENSE("GPL");
  619. EXPORT_SYMBOL(tda10086_attach);