mmu.c 36 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "kvm.h"
  21. #include <linux/types.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/highmem.h>
  25. #include <linux/module.h>
  26. #include <asm/page.h>
  27. #include <asm/cmpxchg.h>
  28. #undef MMU_DEBUG
  29. #undef AUDIT
  30. #ifdef AUDIT
  31. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  32. #else
  33. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  34. #endif
  35. #ifdef MMU_DEBUG
  36. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  37. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  38. #else
  39. #define pgprintk(x...) do { } while (0)
  40. #define rmap_printk(x...) do { } while (0)
  41. #endif
  42. #if defined(MMU_DEBUG) || defined(AUDIT)
  43. static int dbg = 1;
  44. #endif
  45. #ifndef MMU_DEBUG
  46. #define ASSERT(x) do { } while (0)
  47. #else
  48. #define ASSERT(x) \
  49. if (!(x)) { \
  50. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  51. __FILE__, __LINE__, #x); \
  52. }
  53. #endif
  54. #define PT64_PT_BITS 9
  55. #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  56. #define PT32_PT_BITS 10
  57. #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  58. #define PT_WRITABLE_SHIFT 1
  59. #define PT_PRESENT_MASK (1ULL << 0)
  60. #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  61. #define PT_USER_MASK (1ULL << 2)
  62. #define PT_PWT_MASK (1ULL << 3)
  63. #define PT_PCD_MASK (1ULL << 4)
  64. #define PT_ACCESSED_MASK (1ULL << 5)
  65. #define PT_DIRTY_MASK (1ULL << 6)
  66. #define PT_PAGE_SIZE_MASK (1ULL << 7)
  67. #define PT_PAT_MASK (1ULL << 7)
  68. #define PT_GLOBAL_MASK (1ULL << 8)
  69. #define PT64_NX_MASK (1ULL << 63)
  70. #define PT_PAT_SHIFT 7
  71. #define PT_DIR_PAT_SHIFT 12
  72. #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  73. #define PT32_DIR_PSE36_SIZE 4
  74. #define PT32_DIR_PSE36_SHIFT 13
  75. #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  76. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  77. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  78. #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  79. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  80. #define PT64_LEVEL_BITS 9
  81. #define PT64_LEVEL_SHIFT(level) \
  82. ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
  83. #define PT64_LEVEL_MASK(level) \
  84. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  85. #define PT64_INDEX(address, level)\
  86. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  87. #define PT32_LEVEL_BITS 10
  88. #define PT32_LEVEL_SHIFT(level) \
  89. ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
  90. #define PT32_LEVEL_MASK(level) \
  91. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  92. #define PT32_INDEX(address, level)\
  93. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  94. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  95. #define PT64_DIR_BASE_ADDR_MASK \
  96. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  97. #define PT32_BASE_ADDR_MASK PAGE_MASK
  98. #define PT32_DIR_BASE_ADDR_MASK \
  99. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  100. #define PFERR_PRESENT_MASK (1U << 0)
  101. #define PFERR_WRITE_MASK (1U << 1)
  102. #define PFERR_USER_MASK (1U << 2)
  103. #define PFERR_FETCH_MASK (1U << 4)
  104. #define PT64_ROOT_LEVEL 4
  105. #define PT32_ROOT_LEVEL 2
  106. #define PT32E_ROOT_LEVEL 3
  107. #define PT_DIRECTORY_LEVEL 2
  108. #define PT_PAGE_TABLE_LEVEL 1
  109. #define RMAP_EXT 4
  110. struct kvm_rmap_desc {
  111. u64 *shadow_ptes[RMAP_EXT];
  112. struct kvm_rmap_desc *more;
  113. };
  114. static struct kmem_cache *pte_chain_cache;
  115. static struct kmem_cache *rmap_desc_cache;
  116. static struct kmem_cache *mmu_page_cache;
  117. static struct kmem_cache *mmu_page_header_cache;
  118. static int is_write_protection(struct kvm_vcpu *vcpu)
  119. {
  120. return vcpu->cr0 & CR0_WP_MASK;
  121. }
  122. static int is_cpuid_PSE36(void)
  123. {
  124. return 1;
  125. }
  126. static int is_nx(struct kvm_vcpu *vcpu)
  127. {
  128. return vcpu->shadow_efer & EFER_NX;
  129. }
  130. static int is_present_pte(unsigned long pte)
  131. {
  132. return pte & PT_PRESENT_MASK;
  133. }
  134. static int is_writeble_pte(unsigned long pte)
  135. {
  136. return pte & PT_WRITABLE_MASK;
  137. }
  138. static int is_io_pte(unsigned long pte)
  139. {
  140. return pte & PT_SHADOW_IO_MARK;
  141. }
  142. static int is_rmap_pte(u64 pte)
  143. {
  144. return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
  145. == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
  146. }
  147. static void set_shadow_pte(u64 *sptep, u64 spte)
  148. {
  149. #ifdef CONFIG_X86_64
  150. set_64bit((unsigned long *)sptep, spte);
  151. #else
  152. set_64bit((unsigned long long *)sptep, spte);
  153. #endif
  154. }
  155. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  156. struct kmem_cache *base_cache, int min,
  157. gfp_t gfp_flags)
  158. {
  159. void *obj;
  160. if (cache->nobjs >= min)
  161. return 0;
  162. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  163. obj = kmem_cache_zalloc(base_cache, gfp_flags);
  164. if (!obj)
  165. return -ENOMEM;
  166. cache->objects[cache->nobjs++] = obj;
  167. }
  168. return 0;
  169. }
  170. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  171. {
  172. while (mc->nobjs)
  173. kfree(mc->objects[--mc->nobjs]);
  174. }
  175. static int __mmu_topup_memory_caches(struct kvm_vcpu *vcpu, gfp_t gfp_flags)
  176. {
  177. int r;
  178. r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
  179. pte_chain_cache, 4, gfp_flags);
  180. if (r)
  181. goto out;
  182. r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
  183. rmap_desc_cache, 1, gfp_flags);
  184. if (r)
  185. goto out;
  186. r = mmu_topup_memory_cache(&vcpu->mmu_page_cache,
  187. mmu_page_cache, 4, gfp_flags);
  188. if (r)
  189. goto out;
  190. r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
  191. mmu_page_header_cache, 4, gfp_flags);
  192. out:
  193. return r;
  194. }
  195. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  196. {
  197. int r;
  198. r = __mmu_topup_memory_caches(vcpu, GFP_NOWAIT);
  199. if (r < 0) {
  200. spin_unlock(&vcpu->kvm->lock);
  201. kvm_arch_ops->vcpu_put(vcpu);
  202. r = __mmu_topup_memory_caches(vcpu, GFP_KERNEL);
  203. kvm_arch_ops->vcpu_load(vcpu);
  204. spin_lock(&vcpu->kvm->lock);
  205. }
  206. return r;
  207. }
  208. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  209. {
  210. mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
  211. mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
  212. mmu_free_memory_cache(&vcpu->mmu_page_cache);
  213. mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
  214. }
  215. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  216. size_t size)
  217. {
  218. void *p;
  219. BUG_ON(!mc->nobjs);
  220. p = mc->objects[--mc->nobjs];
  221. memset(p, 0, size);
  222. return p;
  223. }
  224. static void mmu_memory_cache_free(struct kvm_mmu_memory_cache *mc, void *obj)
  225. {
  226. if (mc->nobjs < KVM_NR_MEM_OBJS)
  227. mc->objects[mc->nobjs++] = obj;
  228. else
  229. kfree(obj);
  230. }
  231. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  232. {
  233. return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
  234. sizeof(struct kvm_pte_chain));
  235. }
  236. static void mmu_free_pte_chain(struct kvm_vcpu *vcpu,
  237. struct kvm_pte_chain *pc)
  238. {
  239. mmu_memory_cache_free(&vcpu->mmu_pte_chain_cache, pc);
  240. }
  241. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  242. {
  243. return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
  244. sizeof(struct kvm_rmap_desc));
  245. }
  246. static void mmu_free_rmap_desc(struct kvm_vcpu *vcpu,
  247. struct kvm_rmap_desc *rd)
  248. {
  249. mmu_memory_cache_free(&vcpu->mmu_rmap_desc_cache, rd);
  250. }
  251. /*
  252. * Reverse mapping data structures:
  253. *
  254. * If page->private bit zero is zero, then page->private points to the
  255. * shadow page table entry that points to page_address(page).
  256. *
  257. * If page->private bit zero is one, (then page->private & ~1) points
  258. * to a struct kvm_rmap_desc containing more mappings.
  259. */
  260. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
  261. {
  262. struct page *page;
  263. struct kvm_rmap_desc *desc;
  264. int i;
  265. if (!is_rmap_pte(*spte))
  266. return;
  267. page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  268. if (!page_private(page)) {
  269. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  270. set_page_private(page,(unsigned long)spte);
  271. } else if (!(page_private(page) & 1)) {
  272. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  273. desc = mmu_alloc_rmap_desc(vcpu);
  274. desc->shadow_ptes[0] = (u64 *)page_private(page);
  275. desc->shadow_ptes[1] = spte;
  276. set_page_private(page,(unsigned long)desc | 1);
  277. } else {
  278. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  279. desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
  280. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  281. desc = desc->more;
  282. if (desc->shadow_ptes[RMAP_EXT-1]) {
  283. desc->more = mmu_alloc_rmap_desc(vcpu);
  284. desc = desc->more;
  285. }
  286. for (i = 0; desc->shadow_ptes[i]; ++i)
  287. ;
  288. desc->shadow_ptes[i] = spte;
  289. }
  290. }
  291. static void rmap_desc_remove_entry(struct kvm_vcpu *vcpu,
  292. struct page *page,
  293. struct kvm_rmap_desc *desc,
  294. int i,
  295. struct kvm_rmap_desc *prev_desc)
  296. {
  297. int j;
  298. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  299. ;
  300. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  301. desc->shadow_ptes[j] = NULL;
  302. if (j != 0)
  303. return;
  304. if (!prev_desc && !desc->more)
  305. set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
  306. else
  307. if (prev_desc)
  308. prev_desc->more = desc->more;
  309. else
  310. set_page_private(page,(unsigned long)desc->more | 1);
  311. mmu_free_rmap_desc(vcpu, desc);
  312. }
  313. static void rmap_remove(struct kvm_vcpu *vcpu, u64 *spte)
  314. {
  315. struct page *page;
  316. struct kvm_rmap_desc *desc;
  317. struct kvm_rmap_desc *prev_desc;
  318. int i;
  319. if (!is_rmap_pte(*spte))
  320. return;
  321. page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  322. if (!page_private(page)) {
  323. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  324. BUG();
  325. } else if (!(page_private(page) & 1)) {
  326. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  327. if ((u64 *)page_private(page) != spte) {
  328. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  329. spte, *spte);
  330. BUG();
  331. }
  332. set_page_private(page,0);
  333. } else {
  334. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  335. desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
  336. prev_desc = NULL;
  337. while (desc) {
  338. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  339. if (desc->shadow_ptes[i] == spte) {
  340. rmap_desc_remove_entry(vcpu, page,
  341. desc, i,
  342. prev_desc);
  343. return;
  344. }
  345. prev_desc = desc;
  346. desc = desc->more;
  347. }
  348. BUG();
  349. }
  350. }
  351. static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
  352. {
  353. struct kvm *kvm = vcpu->kvm;
  354. struct page *page;
  355. struct kvm_rmap_desc *desc;
  356. u64 *spte;
  357. page = gfn_to_page(kvm, gfn);
  358. BUG_ON(!page);
  359. while (page_private(page)) {
  360. if (!(page_private(page) & 1))
  361. spte = (u64 *)page_private(page);
  362. else {
  363. desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
  364. spte = desc->shadow_ptes[0];
  365. }
  366. BUG_ON(!spte);
  367. BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
  368. != page_to_pfn(page));
  369. BUG_ON(!(*spte & PT_PRESENT_MASK));
  370. BUG_ON(!(*spte & PT_WRITABLE_MASK));
  371. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  372. rmap_remove(vcpu, spte);
  373. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  374. kvm_flush_remote_tlbs(vcpu->kvm);
  375. }
  376. }
  377. #ifdef MMU_DEBUG
  378. static int is_empty_shadow_page(u64 *spt)
  379. {
  380. u64 *pos;
  381. u64 *end;
  382. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  383. if (*pos != 0) {
  384. printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
  385. pos, *pos);
  386. return 0;
  387. }
  388. return 1;
  389. }
  390. #endif
  391. static void kvm_mmu_free_page(struct kvm_vcpu *vcpu,
  392. struct kvm_mmu_page *page_head)
  393. {
  394. ASSERT(is_empty_shadow_page(page_head->spt));
  395. list_del(&page_head->link);
  396. mmu_memory_cache_free(&vcpu->mmu_page_cache, page_head->spt);
  397. mmu_memory_cache_free(&vcpu->mmu_page_header_cache, page_head);
  398. ++vcpu->kvm->n_free_mmu_pages;
  399. }
  400. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  401. {
  402. return gfn;
  403. }
  404. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  405. u64 *parent_pte)
  406. {
  407. struct kvm_mmu_page *page;
  408. if (!vcpu->kvm->n_free_mmu_pages)
  409. return NULL;
  410. page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
  411. sizeof *page);
  412. page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  413. set_page_private(virt_to_page(page->spt), (unsigned long)page);
  414. list_add(&page->link, &vcpu->kvm->active_mmu_pages);
  415. ASSERT(is_empty_shadow_page(page->spt));
  416. page->slot_bitmap = 0;
  417. page->multimapped = 0;
  418. page->parent_pte = parent_pte;
  419. --vcpu->kvm->n_free_mmu_pages;
  420. return page;
  421. }
  422. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  423. struct kvm_mmu_page *page, u64 *parent_pte)
  424. {
  425. struct kvm_pte_chain *pte_chain;
  426. struct hlist_node *node;
  427. int i;
  428. if (!parent_pte)
  429. return;
  430. if (!page->multimapped) {
  431. u64 *old = page->parent_pte;
  432. if (!old) {
  433. page->parent_pte = parent_pte;
  434. return;
  435. }
  436. page->multimapped = 1;
  437. pte_chain = mmu_alloc_pte_chain(vcpu);
  438. INIT_HLIST_HEAD(&page->parent_ptes);
  439. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  440. pte_chain->parent_ptes[0] = old;
  441. }
  442. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
  443. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  444. continue;
  445. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  446. if (!pte_chain->parent_ptes[i]) {
  447. pte_chain->parent_ptes[i] = parent_pte;
  448. return;
  449. }
  450. }
  451. pte_chain = mmu_alloc_pte_chain(vcpu);
  452. BUG_ON(!pte_chain);
  453. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  454. pte_chain->parent_ptes[0] = parent_pte;
  455. }
  456. static void mmu_page_remove_parent_pte(struct kvm_vcpu *vcpu,
  457. struct kvm_mmu_page *page,
  458. u64 *parent_pte)
  459. {
  460. struct kvm_pte_chain *pte_chain;
  461. struct hlist_node *node;
  462. int i;
  463. if (!page->multimapped) {
  464. BUG_ON(page->parent_pte != parent_pte);
  465. page->parent_pte = NULL;
  466. return;
  467. }
  468. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
  469. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  470. if (!pte_chain->parent_ptes[i])
  471. break;
  472. if (pte_chain->parent_ptes[i] != parent_pte)
  473. continue;
  474. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  475. && pte_chain->parent_ptes[i + 1]) {
  476. pte_chain->parent_ptes[i]
  477. = pte_chain->parent_ptes[i + 1];
  478. ++i;
  479. }
  480. pte_chain->parent_ptes[i] = NULL;
  481. if (i == 0) {
  482. hlist_del(&pte_chain->link);
  483. mmu_free_pte_chain(vcpu, pte_chain);
  484. if (hlist_empty(&page->parent_ptes)) {
  485. page->multimapped = 0;
  486. page->parent_pte = NULL;
  487. }
  488. }
  489. return;
  490. }
  491. BUG();
  492. }
  493. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
  494. gfn_t gfn)
  495. {
  496. unsigned index;
  497. struct hlist_head *bucket;
  498. struct kvm_mmu_page *page;
  499. struct hlist_node *node;
  500. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  501. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  502. bucket = &vcpu->kvm->mmu_page_hash[index];
  503. hlist_for_each_entry(page, node, bucket, hash_link)
  504. if (page->gfn == gfn && !page->role.metaphysical) {
  505. pgprintk("%s: found role %x\n",
  506. __FUNCTION__, page->role.word);
  507. return page;
  508. }
  509. return NULL;
  510. }
  511. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  512. gfn_t gfn,
  513. gva_t gaddr,
  514. unsigned level,
  515. int metaphysical,
  516. unsigned hugepage_access,
  517. u64 *parent_pte)
  518. {
  519. union kvm_mmu_page_role role;
  520. unsigned index;
  521. unsigned quadrant;
  522. struct hlist_head *bucket;
  523. struct kvm_mmu_page *page;
  524. struct hlist_node *node;
  525. role.word = 0;
  526. role.glevels = vcpu->mmu.root_level;
  527. role.level = level;
  528. role.metaphysical = metaphysical;
  529. role.hugepage_access = hugepage_access;
  530. if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
  531. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  532. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  533. role.quadrant = quadrant;
  534. }
  535. pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
  536. gfn, role.word);
  537. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  538. bucket = &vcpu->kvm->mmu_page_hash[index];
  539. hlist_for_each_entry(page, node, bucket, hash_link)
  540. if (page->gfn == gfn && page->role.word == role.word) {
  541. mmu_page_add_parent_pte(vcpu, page, parent_pte);
  542. pgprintk("%s: found\n", __FUNCTION__);
  543. return page;
  544. }
  545. page = kvm_mmu_alloc_page(vcpu, parent_pte);
  546. if (!page)
  547. return page;
  548. pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
  549. page->gfn = gfn;
  550. page->role = role;
  551. hlist_add_head(&page->hash_link, bucket);
  552. if (!metaphysical)
  553. rmap_write_protect(vcpu, gfn);
  554. return page;
  555. }
  556. static void kvm_mmu_page_unlink_children(struct kvm_vcpu *vcpu,
  557. struct kvm_mmu_page *page)
  558. {
  559. unsigned i;
  560. u64 *pt;
  561. u64 ent;
  562. pt = page->spt;
  563. if (page->role.level == PT_PAGE_TABLE_LEVEL) {
  564. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  565. if (pt[i] & PT_PRESENT_MASK)
  566. rmap_remove(vcpu, &pt[i]);
  567. pt[i] = 0;
  568. }
  569. kvm_flush_remote_tlbs(vcpu->kvm);
  570. return;
  571. }
  572. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  573. ent = pt[i];
  574. pt[i] = 0;
  575. if (!(ent & PT_PRESENT_MASK))
  576. continue;
  577. ent &= PT64_BASE_ADDR_MASK;
  578. mmu_page_remove_parent_pte(vcpu, page_header(ent), &pt[i]);
  579. }
  580. kvm_flush_remote_tlbs(vcpu->kvm);
  581. }
  582. static void kvm_mmu_put_page(struct kvm_vcpu *vcpu,
  583. struct kvm_mmu_page *page,
  584. u64 *parent_pte)
  585. {
  586. mmu_page_remove_parent_pte(vcpu, page, parent_pte);
  587. }
  588. static void kvm_mmu_zap_page(struct kvm_vcpu *vcpu,
  589. struct kvm_mmu_page *page)
  590. {
  591. u64 *parent_pte;
  592. while (page->multimapped || page->parent_pte) {
  593. if (!page->multimapped)
  594. parent_pte = page->parent_pte;
  595. else {
  596. struct kvm_pte_chain *chain;
  597. chain = container_of(page->parent_ptes.first,
  598. struct kvm_pte_chain, link);
  599. parent_pte = chain->parent_ptes[0];
  600. }
  601. BUG_ON(!parent_pte);
  602. kvm_mmu_put_page(vcpu, page, parent_pte);
  603. set_shadow_pte(parent_pte, 0);
  604. }
  605. kvm_mmu_page_unlink_children(vcpu, page);
  606. if (!page->root_count) {
  607. hlist_del(&page->hash_link);
  608. kvm_mmu_free_page(vcpu, page);
  609. } else
  610. list_move(&page->link, &vcpu->kvm->active_mmu_pages);
  611. }
  612. static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  613. {
  614. unsigned index;
  615. struct hlist_head *bucket;
  616. struct kvm_mmu_page *page;
  617. struct hlist_node *node, *n;
  618. int r;
  619. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  620. r = 0;
  621. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  622. bucket = &vcpu->kvm->mmu_page_hash[index];
  623. hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
  624. if (page->gfn == gfn && !page->role.metaphysical) {
  625. pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
  626. page->role.word);
  627. kvm_mmu_zap_page(vcpu, page);
  628. r = 1;
  629. }
  630. return r;
  631. }
  632. static void mmu_unshadow(struct kvm_vcpu *vcpu, gfn_t gfn)
  633. {
  634. struct kvm_mmu_page *page;
  635. while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) {
  636. pgprintk("%s: zap %lx %x\n",
  637. __FUNCTION__, gfn, page->role.word);
  638. kvm_mmu_zap_page(vcpu, page);
  639. }
  640. }
  641. static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
  642. {
  643. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
  644. struct kvm_mmu_page *page_head = page_header(__pa(pte));
  645. __set_bit(slot, &page_head->slot_bitmap);
  646. }
  647. hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
  648. {
  649. hpa_t hpa = gpa_to_hpa(vcpu, gpa);
  650. return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
  651. }
  652. hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
  653. {
  654. struct page *page;
  655. ASSERT((gpa & HPA_ERR_MASK) == 0);
  656. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  657. if (!page)
  658. return gpa | HPA_ERR_MASK;
  659. return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
  660. | (gpa & (PAGE_SIZE-1));
  661. }
  662. hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
  663. {
  664. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  665. if (gpa == UNMAPPED_GVA)
  666. return UNMAPPED_GVA;
  667. return gpa_to_hpa(vcpu, gpa);
  668. }
  669. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  670. {
  671. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  672. if (gpa == UNMAPPED_GVA)
  673. return NULL;
  674. return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
  675. }
  676. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  677. {
  678. }
  679. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
  680. {
  681. int level = PT32E_ROOT_LEVEL;
  682. hpa_t table_addr = vcpu->mmu.root_hpa;
  683. for (; ; level--) {
  684. u32 index = PT64_INDEX(v, level);
  685. u64 *table;
  686. u64 pte;
  687. ASSERT(VALID_PAGE(table_addr));
  688. table = __va(table_addr);
  689. if (level == 1) {
  690. pte = table[index];
  691. if (is_present_pte(pte) && is_writeble_pte(pte))
  692. return 0;
  693. mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
  694. page_header_update_slot(vcpu->kvm, table, v);
  695. table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
  696. PT_USER_MASK;
  697. rmap_add(vcpu, &table[index]);
  698. return 0;
  699. }
  700. if (table[index] == 0) {
  701. struct kvm_mmu_page *new_table;
  702. gfn_t pseudo_gfn;
  703. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  704. >> PAGE_SHIFT;
  705. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  706. v, level - 1,
  707. 1, 0, &table[index]);
  708. if (!new_table) {
  709. pgprintk("nonpaging_map: ENOMEM\n");
  710. return -ENOMEM;
  711. }
  712. table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
  713. | PT_WRITABLE_MASK | PT_USER_MASK;
  714. }
  715. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  716. }
  717. }
  718. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  719. {
  720. int i;
  721. struct kvm_mmu_page *page;
  722. if (!VALID_PAGE(vcpu->mmu.root_hpa))
  723. return;
  724. #ifdef CONFIG_X86_64
  725. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  726. hpa_t root = vcpu->mmu.root_hpa;
  727. page = page_header(root);
  728. --page->root_count;
  729. vcpu->mmu.root_hpa = INVALID_PAGE;
  730. return;
  731. }
  732. #endif
  733. for (i = 0; i < 4; ++i) {
  734. hpa_t root = vcpu->mmu.pae_root[i];
  735. if (root) {
  736. root &= PT64_BASE_ADDR_MASK;
  737. page = page_header(root);
  738. --page->root_count;
  739. }
  740. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  741. }
  742. vcpu->mmu.root_hpa = INVALID_PAGE;
  743. }
  744. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  745. {
  746. int i;
  747. gfn_t root_gfn;
  748. struct kvm_mmu_page *page;
  749. root_gfn = vcpu->cr3 >> PAGE_SHIFT;
  750. #ifdef CONFIG_X86_64
  751. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  752. hpa_t root = vcpu->mmu.root_hpa;
  753. ASSERT(!VALID_PAGE(root));
  754. page = kvm_mmu_get_page(vcpu, root_gfn, 0,
  755. PT64_ROOT_LEVEL, 0, 0, NULL);
  756. root = __pa(page->spt);
  757. ++page->root_count;
  758. vcpu->mmu.root_hpa = root;
  759. return;
  760. }
  761. #endif
  762. for (i = 0; i < 4; ++i) {
  763. hpa_t root = vcpu->mmu.pae_root[i];
  764. ASSERT(!VALID_PAGE(root));
  765. if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
  766. if (!is_present_pte(vcpu->pdptrs[i])) {
  767. vcpu->mmu.pae_root[i] = 0;
  768. continue;
  769. }
  770. root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
  771. } else if (vcpu->mmu.root_level == 0)
  772. root_gfn = 0;
  773. page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  774. PT32_ROOT_LEVEL, !is_paging(vcpu),
  775. 0, NULL);
  776. root = __pa(page->spt);
  777. ++page->root_count;
  778. vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
  779. }
  780. vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
  781. }
  782. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  783. {
  784. return vaddr;
  785. }
  786. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  787. u32 error_code)
  788. {
  789. gpa_t addr = gva;
  790. hpa_t paddr;
  791. int r;
  792. r = mmu_topup_memory_caches(vcpu);
  793. if (r)
  794. return r;
  795. ASSERT(vcpu);
  796. ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
  797. paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
  798. if (is_error_hpa(paddr))
  799. return 1;
  800. return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
  801. }
  802. static void nonpaging_free(struct kvm_vcpu *vcpu)
  803. {
  804. mmu_free_roots(vcpu);
  805. }
  806. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  807. {
  808. struct kvm_mmu *context = &vcpu->mmu;
  809. context->new_cr3 = nonpaging_new_cr3;
  810. context->page_fault = nonpaging_page_fault;
  811. context->gva_to_gpa = nonpaging_gva_to_gpa;
  812. context->free = nonpaging_free;
  813. context->root_level = 0;
  814. context->shadow_root_level = PT32E_ROOT_LEVEL;
  815. context->root_hpa = INVALID_PAGE;
  816. return 0;
  817. }
  818. static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  819. {
  820. ++vcpu->stat.tlb_flush;
  821. kvm_arch_ops->tlb_flush(vcpu);
  822. }
  823. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  824. {
  825. pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
  826. mmu_free_roots(vcpu);
  827. }
  828. static void inject_page_fault(struct kvm_vcpu *vcpu,
  829. u64 addr,
  830. u32 err_code)
  831. {
  832. kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
  833. }
  834. static void paging_free(struct kvm_vcpu *vcpu)
  835. {
  836. nonpaging_free(vcpu);
  837. }
  838. #define PTTYPE 64
  839. #include "paging_tmpl.h"
  840. #undef PTTYPE
  841. #define PTTYPE 32
  842. #include "paging_tmpl.h"
  843. #undef PTTYPE
  844. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  845. {
  846. struct kvm_mmu *context = &vcpu->mmu;
  847. ASSERT(is_pae(vcpu));
  848. context->new_cr3 = paging_new_cr3;
  849. context->page_fault = paging64_page_fault;
  850. context->gva_to_gpa = paging64_gva_to_gpa;
  851. context->free = paging_free;
  852. context->root_level = level;
  853. context->shadow_root_level = level;
  854. context->root_hpa = INVALID_PAGE;
  855. return 0;
  856. }
  857. static int paging64_init_context(struct kvm_vcpu *vcpu)
  858. {
  859. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  860. }
  861. static int paging32_init_context(struct kvm_vcpu *vcpu)
  862. {
  863. struct kvm_mmu *context = &vcpu->mmu;
  864. context->new_cr3 = paging_new_cr3;
  865. context->page_fault = paging32_page_fault;
  866. context->gva_to_gpa = paging32_gva_to_gpa;
  867. context->free = paging_free;
  868. context->root_level = PT32_ROOT_LEVEL;
  869. context->shadow_root_level = PT32E_ROOT_LEVEL;
  870. context->root_hpa = INVALID_PAGE;
  871. return 0;
  872. }
  873. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  874. {
  875. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  876. }
  877. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  878. {
  879. ASSERT(vcpu);
  880. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  881. if (!is_paging(vcpu))
  882. return nonpaging_init_context(vcpu);
  883. else if (is_long_mode(vcpu))
  884. return paging64_init_context(vcpu);
  885. else if (is_pae(vcpu))
  886. return paging32E_init_context(vcpu);
  887. else
  888. return paging32_init_context(vcpu);
  889. }
  890. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  891. {
  892. ASSERT(vcpu);
  893. if (VALID_PAGE(vcpu->mmu.root_hpa)) {
  894. vcpu->mmu.free(vcpu);
  895. vcpu->mmu.root_hpa = INVALID_PAGE;
  896. }
  897. }
  898. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  899. {
  900. destroy_kvm_mmu(vcpu);
  901. return init_kvm_mmu(vcpu);
  902. }
  903. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  904. {
  905. int r;
  906. spin_lock(&vcpu->kvm->lock);
  907. r = mmu_topup_memory_caches(vcpu);
  908. if (r)
  909. goto out;
  910. mmu_alloc_roots(vcpu);
  911. kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
  912. kvm_mmu_flush_tlb(vcpu);
  913. out:
  914. spin_unlock(&vcpu->kvm->lock);
  915. return r;
  916. }
  917. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  918. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  919. {
  920. mmu_free_roots(vcpu);
  921. }
  922. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  923. struct kvm_mmu_page *page,
  924. u64 *spte)
  925. {
  926. u64 pte;
  927. struct kvm_mmu_page *child;
  928. pte = *spte;
  929. if (is_present_pte(pte)) {
  930. if (page->role.level == PT_PAGE_TABLE_LEVEL)
  931. rmap_remove(vcpu, spte);
  932. else {
  933. child = page_header(pte & PT64_BASE_ADDR_MASK);
  934. mmu_page_remove_parent_pte(vcpu, child, spte);
  935. }
  936. }
  937. *spte = 0;
  938. kvm_flush_remote_tlbs(vcpu->kvm);
  939. }
  940. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  941. struct kvm_mmu_page *page,
  942. u64 *spte,
  943. const void *new, int bytes)
  944. {
  945. if (page->role.level != PT_PAGE_TABLE_LEVEL)
  946. return;
  947. if (page->role.glevels == PT32_ROOT_LEVEL)
  948. paging32_update_pte(vcpu, page, spte, new, bytes);
  949. else
  950. paging64_update_pte(vcpu, page, spte, new, bytes);
  951. }
  952. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  953. const u8 *old, const u8 *new, int bytes)
  954. {
  955. gfn_t gfn = gpa >> PAGE_SHIFT;
  956. struct kvm_mmu_page *page;
  957. struct hlist_node *node, *n;
  958. struct hlist_head *bucket;
  959. unsigned index;
  960. u64 *spte;
  961. unsigned offset = offset_in_page(gpa);
  962. unsigned pte_size;
  963. unsigned page_offset;
  964. unsigned misaligned;
  965. unsigned quadrant;
  966. int level;
  967. int flooded = 0;
  968. int npte;
  969. pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
  970. if (gfn == vcpu->last_pt_write_gfn) {
  971. ++vcpu->last_pt_write_count;
  972. if (vcpu->last_pt_write_count >= 3)
  973. flooded = 1;
  974. } else {
  975. vcpu->last_pt_write_gfn = gfn;
  976. vcpu->last_pt_write_count = 1;
  977. }
  978. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  979. bucket = &vcpu->kvm->mmu_page_hash[index];
  980. hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
  981. if (page->gfn != gfn || page->role.metaphysical)
  982. continue;
  983. pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  984. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  985. misaligned |= bytes < 4;
  986. if (misaligned || flooded) {
  987. /*
  988. * Misaligned accesses are too much trouble to fix
  989. * up; also, they usually indicate a page is not used
  990. * as a page table.
  991. *
  992. * If we're seeing too many writes to a page,
  993. * it may no longer be a page table, or we may be
  994. * forking, in which case it is better to unmap the
  995. * page.
  996. */
  997. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  998. gpa, bytes, page->role.word);
  999. kvm_mmu_zap_page(vcpu, page);
  1000. continue;
  1001. }
  1002. page_offset = offset;
  1003. level = page->role.level;
  1004. npte = 1;
  1005. if (page->role.glevels == PT32_ROOT_LEVEL) {
  1006. page_offset <<= 1; /* 32->64 */
  1007. /*
  1008. * A 32-bit pde maps 4MB while the shadow pdes map
  1009. * only 2MB. So we need to double the offset again
  1010. * and zap two pdes instead of one.
  1011. */
  1012. if (level == PT32_ROOT_LEVEL) {
  1013. page_offset &= ~7; /* kill rounding error */
  1014. page_offset <<= 1;
  1015. npte = 2;
  1016. }
  1017. quadrant = page_offset >> PAGE_SHIFT;
  1018. page_offset &= ~PAGE_MASK;
  1019. if (quadrant != page->role.quadrant)
  1020. continue;
  1021. }
  1022. spte = &page->spt[page_offset / sizeof(*spte)];
  1023. while (npte--) {
  1024. mmu_pte_write_zap_pte(vcpu, page, spte);
  1025. mmu_pte_write_new_pte(vcpu, page, spte, new, bytes);
  1026. ++spte;
  1027. }
  1028. }
  1029. }
  1030. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1031. {
  1032. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  1033. return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
  1034. }
  1035. void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1036. {
  1037. while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
  1038. struct kvm_mmu_page *page;
  1039. page = container_of(vcpu->kvm->active_mmu_pages.prev,
  1040. struct kvm_mmu_page, link);
  1041. kvm_mmu_zap_page(vcpu, page);
  1042. }
  1043. }
  1044. EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
  1045. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1046. {
  1047. struct kvm_mmu_page *page;
  1048. while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
  1049. page = container_of(vcpu->kvm->active_mmu_pages.next,
  1050. struct kvm_mmu_page, link);
  1051. kvm_mmu_zap_page(vcpu, page);
  1052. }
  1053. free_page((unsigned long)vcpu->mmu.pae_root);
  1054. }
  1055. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1056. {
  1057. struct page *page;
  1058. int i;
  1059. ASSERT(vcpu);
  1060. vcpu->kvm->n_free_mmu_pages = KVM_NUM_MMU_PAGES;
  1061. /*
  1062. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1063. * Therefore we need to allocate shadow page tables in the first
  1064. * 4GB of memory, which happens to fit the DMA32 zone.
  1065. */
  1066. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1067. if (!page)
  1068. goto error_1;
  1069. vcpu->mmu.pae_root = page_address(page);
  1070. for (i = 0; i < 4; ++i)
  1071. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  1072. return 0;
  1073. error_1:
  1074. free_mmu_pages(vcpu);
  1075. return -ENOMEM;
  1076. }
  1077. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1078. {
  1079. ASSERT(vcpu);
  1080. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1081. return alloc_mmu_pages(vcpu);
  1082. }
  1083. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1084. {
  1085. ASSERT(vcpu);
  1086. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1087. return init_kvm_mmu(vcpu);
  1088. }
  1089. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1090. {
  1091. ASSERT(vcpu);
  1092. destroy_kvm_mmu(vcpu);
  1093. free_mmu_pages(vcpu);
  1094. mmu_free_memory_caches(vcpu);
  1095. }
  1096. void kvm_mmu_slot_remove_write_access(struct kvm_vcpu *vcpu, int slot)
  1097. {
  1098. struct kvm *kvm = vcpu->kvm;
  1099. struct kvm_mmu_page *page;
  1100. list_for_each_entry(page, &kvm->active_mmu_pages, link) {
  1101. int i;
  1102. u64 *pt;
  1103. if (!test_bit(slot, &page->slot_bitmap))
  1104. continue;
  1105. pt = page->spt;
  1106. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1107. /* avoid RMW */
  1108. if (pt[i] & PT_WRITABLE_MASK) {
  1109. rmap_remove(vcpu, &pt[i]);
  1110. pt[i] &= ~PT_WRITABLE_MASK;
  1111. }
  1112. }
  1113. }
  1114. void kvm_mmu_zap_all(struct kvm_vcpu *vcpu)
  1115. {
  1116. destroy_kvm_mmu(vcpu);
  1117. while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
  1118. struct kvm_mmu_page *page;
  1119. page = container_of(vcpu->kvm->active_mmu_pages.next,
  1120. struct kvm_mmu_page, link);
  1121. kvm_mmu_zap_page(vcpu, page);
  1122. }
  1123. mmu_free_memory_caches(vcpu);
  1124. kvm_flush_remote_tlbs(vcpu->kvm);
  1125. init_kvm_mmu(vcpu);
  1126. }
  1127. void kvm_mmu_module_exit(void)
  1128. {
  1129. if (pte_chain_cache)
  1130. kmem_cache_destroy(pte_chain_cache);
  1131. if (rmap_desc_cache)
  1132. kmem_cache_destroy(rmap_desc_cache);
  1133. if (mmu_page_cache)
  1134. kmem_cache_destroy(mmu_page_cache);
  1135. if (mmu_page_header_cache)
  1136. kmem_cache_destroy(mmu_page_header_cache);
  1137. }
  1138. int kvm_mmu_module_init(void)
  1139. {
  1140. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1141. sizeof(struct kvm_pte_chain),
  1142. 0, 0, NULL, NULL);
  1143. if (!pte_chain_cache)
  1144. goto nomem;
  1145. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1146. sizeof(struct kvm_rmap_desc),
  1147. 0, 0, NULL, NULL);
  1148. if (!rmap_desc_cache)
  1149. goto nomem;
  1150. mmu_page_cache = kmem_cache_create("kvm_mmu_page",
  1151. PAGE_SIZE,
  1152. PAGE_SIZE, 0, NULL, NULL);
  1153. if (!mmu_page_cache)
  1154. goto nomem;
  1155. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1156. sizeof(struct kvm_mmu_page),
  1157. 0, 0, NULL, NULL);
  1158. if (!mmu_page_header_cache)
  1159. goto nomem;
  1160. return 0;
  1161. nomem:
  1162. kvm_mmu_module_exit();
  1163. return -ENOMEM;
  1164. }
  1165. #ifdef AUDIT
  1166. static const char *audit_msg;
  1167. static gva_t canonicalize(gva_t gva)
  1168. {
  1169. #ifdef CONFIG_X86_64
  1170. gva = (long long)(gva << 16) >> 16;
  1171. #endif
  1172. return gva;
  1173. }
  1174. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1175. gva_t va, int level)
  1176. {
  1177. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1178. int i;
  1179. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1180. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1181. u64 ent = pt[i];
  1182. if (!(ent & PT_PRESENT_MASK))
  1183. continue;
  1184. va = canonicalize(va);
  1185. if (level > 1)
  1186. audit_mappings_page(vcpu, ent, va, level - 1);
  1187. else {
  1188. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
  1189. hpa_t hpa = gpa_to_hpa(vcpu, gpa);
  1190. if ((ent & PT_PRESENT_MASK)
  1191. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  1192. printk(KERN_ERR "audit error: (%s) levels %d"
  1193. " gva %lx gpa %llx hpa %llx ent %llx\n",
  1194. audit_msg, vcpu->mmu.root_level,
  1195. va, gpa, hpa, ent);
  1196. }
  1197. }
  1198. }
  1199. static void audit_mappings(struct kvm_vcpu *vcpu)
  1200. {
  1201. unsigned i;
  1202. if (vcpu->mmu.root_level == 4)
  1203. audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
  1204. else
  1205. for (i = 0; i < 4; ++i)
  1206. if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
  1207. audit_mappings_page(vcpu,
  1208. vcpu->mmu.pae_root[i],
  1209. i << 30,
  1210. 2);
  1211. }
  1212. static int count_rmaps(struct kvm_vcpu *vcpu)
  1213. {
  1214. int nmaps = 0;
  1215. int i, j, k;
  1216. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  1217. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  1218. struct kvm_rmap_desc *d;
  1219. for (j = 0; j < m->npages; ++j) {
  1220. struct page *page = m->phys_mem[j];
  1221. if (!page->private)
  1222. continue;
  1223. if (!(page->private & 1)) {
  1224. ++nmaps;
  1225. continue;
  1226. }
  1227. d = (struct kvm_rmap_desc *)(page->private & ~1ul);
  1228. while (d) {
  1229. for (k = 0; k < RMAP_EXT; ++k)
  1230. if (d->shadow_ptes[k])
  1231. ++nmaps;
  1232. else
  1233. break;
  1234. d = d->more;
  1235. }
  1236. }
  1237. }
  1238. return nmaps;
  1239. }
  1240. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  1241. {
  1242. int nmaps = 0;
  1243. struct kvm_mmu_page *page;
  1244. int i;
  1245. list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
  1246. u64 *pt = page->spt;
  1247. if (page->role.level != PT_PAGE_TABLE_LEVEL)
  1248. continue;
  1249. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1250. u64 ent = pt[i];
  1251. if (!(ent & PT_PRESENT_MASK))
  1252. continue;
  1253. if (!(ent & PT_WRITABLE_MASK))
  1254. continue;
  1255. ++nmaps;
  1256. }
  1257. }
  1258. return nmaps;
  1259. }
  1260. static void audit_rmap(struct kvm_vcpu *vcpu)
  1261. {
  1262. int n_rmap = count_rmaps(vcpu);
  1263. int n_actual = count_writable_mappings(vcpu);
  1264. if (n_rmap != n_actual)
  1265. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  1266. __FUNCTION__, audit_msg, n_rmap, n_actual);
  1267. }
  1268. static void audit_write_protection(struct kvm_vcpu *vcpu)
  1269. {
  1270. struct kvm_mmu_page *page;
  1271. list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
  1272. hfn_t hfn;
  1273. struct page *pg;
  1274. if (page->role.metaphysical)
  1275. continue;
  1276. hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
  1277. >> PAGE_SHIFT;
  1278. pg = pfn_to_page(hfn);
  1279. if (pg->private)
  1280. printk(KERN_ERR "%s: (%s) shadow page has writable"
  1281. " mappings: gfn %lx role %x\n",
  1282. __FUNCTION__, audit_msg, page->gfn,
  1283. page->role.word);
  1284. }
  1285. }
  1286. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  1287. {
  1288. int olddbg = dbg;
  1289. dbg = 0;
  1290. audit_msg = msg;
  1291. audit_rmap(vcpu);
  1292. audit_write_protection(vcpu);
  1293. audit_mappings(vcpu);
  1294. dbg = olddbg;
  1295. }
  1296. #endif