i8042.c 28 KB

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  1. /*
  2. * i8042 keyboard and mouse controller driver for Linux
  3. *
  4. * Copyright (c) 1999-2004 Vojtech Pavlik
  5. */
  6. /*
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. */
  11. #include <linux/delay.h>
  12. #include <linux/module.h>
  13. #include <linux/moduleparam.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/ioport.h>
  16. #include <linux/init.h>
  17. #include <linux/serio.h>
  18. #include <linux/err.h>
  19. #include <linux/rcupdate.h>
  20. #include <linux/platform_device.h>
  21. #include <asm/io.h>
  22. MODULE_AUTHOR("Vojtech Pavlik <vojtech@suse.cz>");
  23. MODULE_DESCRIPTION("i8042 keyboard and mouse controller driver");
  24. MODULE_LICENSE("GPL");
  25. static unsigned int i8042_nokbd;
  26. module_param_named(nokbd, i8042_nokbd, bool, 0);
  27. MODULE_PARM_DESC(nokbd, "Do not probe or use KBD port.");
  28. static unsigned int i8042_noaux;
  29. module_param_named(noaux, i8042_noaux, bool, 0);
  30. MODULE_PARM_DESC(noaux, "Do not probe or use AUX (mouse) port.");
  31. static unsigned int i8042_nomux;
  32. module_param_named(nomux, i8042_nomux, bool, 0);
  33. MODULE_PARM_DESC(nomux, "Do not check whether an active multiplexing conrtoller is present.");
  34. static unsigned int i8042_unlock;
  35. module_param_named(unlock, i8042_unlock, bool, 0);
  36. MODULE_PARM_DESC(unlock, "Ignore keyboard lock.");
  37. static unsigned int i8042_reset;
  38. module_param_named(reset, i8042_reset, bool, 0);
  39. MODULE_PARM_DESC(reset, "Reset controller during init and cleanup.");
  40. static unsigned int i8042_direct;
  41. module_param_named(direct, i8042_direct, bool, 0);
  42. MODULE_PARM_DESC(direct, "Put keyboard port into non-translated mode.");
  43. static unsigned int i8042_dumbkbd;
  44. module_param_named(dumbkbd, i8042_dumbkbd, bool, 0);
  45. MODULE_PARM_DESC(dumbkbd, "Pretend that controller can only read data from keyboard");
  46. static unsigned int i8042_noloop;
  47. module_param_named(noloop, i8042_noloop, bool, 0);
  48. MODULE_PARM_DESC(noloop, "Disable the AUX Loopback command while probing for the AUX port");
  49. static unsigned int i8042_blink_frequency = 500;
  50. module_param_named(panicblink, i8042_blink_frequency, uint, 0600);
  51. MODULE_PARM_DESC(panicblink, "Frequency with which keyboard LEDs should blink when kernel panics");
  52. #ifdef CONFIG_PNP
  53. static int i8042_nopnp;
  54. module_param_named(nopnp, i8042_nopnp, bool, 0);
  55. MODULE_PARM_DESC(nopnp, "Do not use PNP to detect controller settings");
  56. #endif
  57. #define DEBUG
  58. #ifdef DEBUG
  59. static int i8042_debug;
  60. module_param_named(debug, i8042_debug, bool, 0600);
  61. MODULE_PARM_DESC(debug, "Turn i8042 debugging mode on and off");
  62. #endif
  63. #include "i8042.h"
  64. static DEFINE_SPINLOCK(i8042_lock);
  65. struct i8042_port {
  66. struct serio *serio;
  67. int irq;
  68. unsigned char exists;
  69. signed char mux;
  70. };
  71. #define I8042_KBD_PORT_NO 0
  72. #define I8042_AUX_PORT_NO 1
  73. #define I8042_MUX_PORT_NO 2
  74. #define I8042_NUM_PORTS (I8042_NUM_MUX_PORTS + 2)
  75. static struct i8042_port i8042_ports[I8042_NUM_PORTS];
  76. static unsigned char i8042_initial_ctr;
  77. static unsigned char i8042_ctr;
  78. static unsigned char i8042_mux_present;
  79. static unsigned char i8042_kbd_irq_registered;
  80. static unsigned char i8042_aux_irq_registered;
  81. static unsigned char i8042_suppress_kbd_ack;
  82. static struct platform_device *i8042_platform_device;
  83. static irqreturn_t i8042_interrupt(int irq, void *dev_id);
  84. /*
  85. * The i8042_wait_read() and i8042_wait_write functions wait for the i8042 to
  86. * be ready for reading values from it / writing values to it.
  87. * Called always with i8042_lock held.
  88. */
  89. static int i8042_wait_read(void)
  90. {
  91. int i = 0;
  92. while ((~i8042_read_status() & I8042_STR_OBF) && (i < I8042_CTL_TIMEOUT)) {
  93. udelay(50);
  94. i++;
  95. }
  96. return -(i == I8042_CTL_TIMEOUT);
  97. }
  98. static int i8042_wait_write(void)
  99. {
  100. int i = 0;
  101. while ((i8042_read_status() & I8042_STR_IBF) && (i < I8042_CTL_TIMEOUT)) {
  102. udelay(50);
  103. i++;
  104. }
  105. return -(i == I8042_CTL_TIMEOUT);
  106. }
  107. /*
  108. * i8042_flush() flushes all data that may be in the keyboard and mouse buffers
  109. * of the i8042 down the toilet.
  110. */
  111. static int i8042_flush(void)
  112. {
  113. unsigned long flags;
  114. unsigned char data, str;
  115. int i = 0;
  116. spin_lock_irqsave(&i8042_lock, flags);
  117. while (((str = i8042_read_status()) & I8042_STR_OBF) && (i < I8042_BUFFER_SIZE)) {
  118. udelay(50);
  119. data = i8042_read_data();
  120. i++;
  121. dbg("%02x <- i8042 (flush, %s)", data,
  122. str & I8042_STR_AUXDATA ? "aux" : "kbd");
  123. }
  124. spin_unlock_irqrestore(&i8042_lock, flags);
  125. return i;
  126. }
  127. /*
  128. * i8042_command() executes a command on the i8042. It also sends the input
  129. * parameter(s) of the commands to it, and receives the output value(s). The
  130. * parameters are to be stored in the param array, and the output is placed
  131. * into the same array. The number of the parameters and output values is
  132. * encoded in bits 8-11 of the command number.
  133. */
  134. static int __i8042_command(unsigned char *param, int command)
  135. {
  136. int i, error;
  137. if (i8042_noloop && command == I8042_CMD_AUX_LOOP)
  138. return -1;
  139. error = i8042_wait_write();
  140. if (error)
  141. return error;
  142. dbg("%02x -> i8042 (command)", command & 0xff);
  143. i8042_write_command(command & 0xff);
  144. for (i = 0; i < ((command >> 12) & 0xf); i++) {
  145. error = i8042_wait_write();
  146. if (error)
  147. return error;
  148. dbg("%02x -> i8042 (parameter)", param[i]);
  149. i8042_write_data(param[i]);
  150. }
  151. for (i = 0; i < ((command >> 8) & 0xf); i++) {
  152. error = i8042_wait_read();
  153. if (error) {
  154. dbg(" -- i8042 (timeout)");
  155. return error;
  156. }
  157. if (command == I8042_CMD_AUX_LOOP &&
  158. !(i8042_read_status() & I8042_STR_AUXDATA)) {
  159. dbg(" -- i8042 (auxerr)");
  160. return -1;
  161. }
  162. param[i] = i8042_read_data();
  163. dbg("%02x <- i8042 (return)", param[i]);
  164. }
  165. return 0;
  166. }
  167. static int i8042_command(unsigned char *param, int command)
  168. {
  169. unsigned long flags;
  170. int retval;
  171. spin_lock_irqsave(&i8042_lock, flags);
  172. retval = __i8042_command(param, command);
  173. spin_unlock_irqrestore(&i8042_lock, flags);
  174. return retval;
  175. }
  176. /*
  177. * i8042_kbd_write() sends a byte out through the keyboard interface.
  178. */
  179. static int i8042_kbd_write(struct serio *port, unsigned char c)
  180. {
  181. unsigned long flags;
  182. int retval = 0;
  183. spin_lock_irqsave(&i8042_lock, flags);
  184. if (!(retval = i8042_wait_write())) {
  185. dbg("%02x -> i8042 (kbd-data)", c);
  186. i8042_write_data(c);
  187. }
  188. spin_unlock_irqrestore(&i8042_lock, flags);
  189. return retval;
  190. }
  191. /*
  192. * i8042_aux_write() sends a byte out through the aux interface.
  193. */
  194. static int i8042_aux_write(struct serio *serio, unsigned char c)
  195. {
  196. struct i8042_port *port = serio->port_data;
  197. return i8042_command(&c, port->mux == -1 ?
  198. I8042_CMD_AUX_SEND :
  199. I8042_CMD_MUX_SEND + port->mux);
  200. }
  201. /*
  202. * i8042_start() is called by serio core when port is about to finish
  203. * registering. It will mark port as existing so i8042_interrupt can
  204. * start sending data through it.
  205. */
  206. static int i8042_start(struct serio *serio)
  207. {
  208. struct i8042_port *port = serio->port_data;
  209. port->exists = 1;
  210. mb();
  211. return 0;
  212. }
  213. /*
  214. * i8042_stop() marks serio port as non-existing so i8042_interrupt
  215. * will not try to send data to the port that is about to go away.
  216. * The function is called by serio core as part of unregister procedure.
  217. */
  218. static void i8042_stop(struct serio *serio)
  219. {
  220. struct i8042_port *port = serio->port_data;
  221. port->exists = 0;
  222. synchronize_sched();
  223. port->serio = NULL;
  224. }
  225. /*
  226. * i8042_interrupt() is the most important function in this driver -
  227. * it handles the interrupts from the i8042, and sends incoming bytes
  228. * to the upper layers.
  229. */
  230. static irqreturn_t i8042_interrupt(int irq, void *dev_id)
  231. {
  232. struct i8042_port *port;
  233. unsigned long flags;
  234. unsigned char str, data;
  235. unsigned int dfl;
  236. unsigned int port_no;
  237. int ret = 1;
  238. spin_lock_irqsave(&i8042_lock, flags);
  239. str = i8042_read_status();
  240. if (unlikely(~str & I8042_STR_OBF)) {
  241. spin_unlock_irqrestore(&i8042_lock, flags);
  242. if (irq) dbg("Interrupt %d, without any data", irq);
  243. ret = 0;
  244. goto out;
  245. }
  246. data = i8042_read_data();
  247. spin_unlock_irqrestore(&i8042_lock, flags);
  248. if (i8042_mux_present && (str & I8042_STR_AUXDATA)) {
  249. static unsigned long last_transmit;
  250. static unsigned char last_str;
  251. dfl = 0;
  252. if (str & I8042_STR_MUXERR) {
  253. dbg("MUX error, status is %02x, data is %02x", str, data);
  254. /*
  255. * When MUXERR condition is signalled the data register can only contain
  256. * 0xfd, 0xfe or 0xff if implementation follows the spec. Unfortunately
  257. * it is not always the case. Some KBCs also report 0xfc when there is
  258. * nothing connected to the port while others sometimes get confused which
  259. * port the data came from and signal error leaving the data intact. They
  260. * _do not_ revert to legacy mode (actually I've never seen KBC reverting
  261. * to legacy mode yet, when we see one we'll add proper handling).
  262. * Anyway, we process 0xfc, 0xfd, 0xfe and 0xff as timeouts, and for the
  263. * rest assume that the data came from the same serio last byte
  264. * was transmitted (if transmission happened not too long ago).
  265. */
  266. switch (data) {
  267. default:
  268. if (time_before(jiffies, last_transmit + HZ/10)) {
  269. str = last_str;
  270. break;
  271. }
  272. /* fall through - report timeout */
  273. case 0xfc:
  274. case 0xfd:
  275. case 0xfe: dfl = SERIO_TIMEOUT; data = 0xfe; break;
  276. case 0xff: dfl = SERIO_PARITY; data = 0xfe; break;
  277. }
  278. }
  279. port_no = I8042_MUX_PORT_NO + ((str >> 6) & 3);
  280. last_str = str;
  281. last_transmit = jiffies;
  282. } else {
  283. dfl = ((str & I8042_STR_PARITY) ? SERIO_PARITY : 0) |
  284. ((str & I8042_STR_TIMEOUT) ? SERIO_TIMEOUT : 0);
  285. port_no = (str & I8042_STR_AUXDATA) ?
  286. I8042_AUX_PORT_NO : I8042_KBD_PORT_NO;
  287. }
  288. port = &i8042_ports[port_no];
  289. dbg("%02x <- i8042 (interrupt, %d, %d%s%s)",
  290. data, port_no, irq,
  291. dfl & SERIO_PARITY ? ", bad parity" : "",
  292. dfl & SERIO_TIMEOUT ? ", timeout" : "");
  293. if (unlikely(i8042_suppress_kbd_ack))
  294. if (port_no == I8042_KBD_PORT_NO &&
  295. (data == 0xfa || data == 0xfe)) {
  296. i8042_suppress_kbd_ack--;
  297. goto out;
  298. }
  299. if (likely(port->exists))
  300. serio_interrupt(port->serio, data, dfl);
  301. out:
  302. return IRQ_RETVAL(ret);
  303. }
  304. /*
  305. * i8042_enable_kbd_port enables keybaord port on chip
  306. */
  307. static int i8042_enable_kbd_port(void)
  308. {
  309. i8042_ctr &= ~I8042_CTR_KBDDIS;
  310. i8042_ctr |= I8042_CTR_KBDINT;
  311. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  312. printk(KERN_ERR "i8042.c: Failed to enable KBD port.\n");
  313. return -EIO;
  314. }
  315. return 0;
  316. }
  317. /*
  318. * i8042_enable_aux_port enables AUX (mouse) port on chip
  319. */
  320. static int i8042_enable_aux_port(void)
  321. {
  322. i8042_ctr &= ~I8042_CTR_AUXDIS;
  323. i8042_ctr |= I8042_CTR_AUXINT;
  324. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  325. printk(KERN_ERR "i8042.c: Failed to enable AUX port.\n");
  326. return -EIO;
  327. }
  328. return 0;
  329. }
  330. /*
  331. * i8042_enable_mux_ports enables 4 individual AUX ports after
  332. * the controller has been switched into Multiplexed mode
  333. */
  334. static int i8042_enable_mux_ports(void)
  335. {
  336. unsigned char param;
  337. int i;
  338. for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
  339. i8042_command(&param, I8042_CMD_MUX_PFX + i);
  340. i8042_command(&param, I8042_CMD_AUX_ENABLE);
  341. }
  342. return i8042_enable_aux_port();
  343. }
  344. /*
  345. * i8042_set_mux_mode checks whether the controller has an active
  346. * multiplexor and puts the chip into Multiplexed (1) or Legacy (0) mode.
  347. */
  348. static int i8042_set_mux_mode(unsigned int mode, unsigned char *mux_version)
  349. {
  350. unsigned char param;
  351. /*
  352. * Get rid of bytes in the queue.
  353. */
  354. i8042_flush();
  355. /*
  356. * Internal loopback test - send three bytes, they should come back from the
  357. * mouse interface, the last should be version.
  358. */
  359. param = 0xf0;
  360. if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != 0xf0)
  361. return -1;
  362. param = mode ? 0x56 : 0xf6;
  363. if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param != (mode ? 0x56 : 0xf6))
  364. return -1;
  365. param = mode ? 0xa4 : 0xa5;
  366. if (i8042_command(&param, I8042_CMD_AUX_LOOP) || param == (mode ? 0xa4 : 0xa5))
  367. return -1;
  368. if (mux_version)
  369. *mux_version = param;
  370. return 0;
  371. }
  372. /*
  373. * i8042_check_mux() checks whether the controller supports the PS/2 Active
  374. * Multiplexing specification by Synaptics, Phoenix, Insyde and
  375. * LCS/Telegraphics.
  376. */
  377. static int __devinit i8042_check_mux(void)
  378. {
  379. unsigned char mux_version;
  380. if (i8042_set_mux_mode(1, &mux_version))
  381. return -1;
  382. /*
  383. * Workaround for interference with USB Legacy emulation
  384. * that causes a v10.12 MUX to be found.
  385. */
  386. if (mux_version == 0xAC)
  387. return -1;
  388. printk(KERN_INFO "i8042.c: Detected active multiplexing controller, rev %d.%d.\n",
  389. (mux_version >> 4) & 0xf, mux_version & 0xf);
  390. /*
  391. * Disable all muxed ports by disabling AUX.
  392. */
  393. i8042_ctr |= I8042_CTR_AUXDIS;
  394. i8042_ctr &= ~I8042_CTR_AUXINT;
  395. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  396. printk(KERN_ERR "i8042.c: Failed to disable AUX port, can't use MUX.\n");
  397. return -EIO;
  398. }
  399. i8042_mux_present = 1;
  400. return 0;
  401. }
  402. /*
  403. * The following is used to test AUX IRQ delivery.
  404. */
  405. static struct completion i8042_aux_irq_delivered __devinitdata;
  406. static int i8042_irq_being_tested __devinitdata;
  407. static irqreturn_t __devinit i8042_aux_test_irq(int irq, void *dev_id)
  408. {
  409. unsigned long flags;
  410. unsigned char str, data;
  411. spin_lock_irqsave(&i8042_lock, flags);
  412. str = i8042_read_status();
  413. if (str & I8042_STR_OBF) {
  414. data = i8042_read_data();
  415. if (i8042_irq_being_tested &&
  416. data == 0xa5 && (str & I8042_STR_AUXDATA))
  417. complete(&i8042_aux_irq_delivered);
  418. }
  419. spin_unlock_irqrestore(&i8042_lock, flags);
  420. return IRQ_HANDLED;
  421. }
  422. /*
  423. * i8042_toggle_aux - enables or disables AUX port on i8042 via command and
  424. * verifies success by readinng CTR. Used when testing for presence of AUX
  425. * port.
  426. */
  427. static int __devinit i8042_toggle_aux(int on)
  428. {
  429. unsigned char param;
  430. int i;
  431. if (i8042_command(&param,
  432. on ? I8042_CMD_AUX_ENABLE : I8042_CMD_AUX_DISABLE))
  433. return -1;
  434. /* some chips need some time to set the I8042_CTR_AUXDIS bit */
  435. for (i = 0; i < 100; i++) {
  436. udelay(50);
  437. if (i8042_command(&param, I8042_CMD_CTL_RCTR))
  438. return -1;
  439. if (!(param & I8042_CTR_AUXDIS) == on)
  440. return 0;
  441. }
  442. return -1;
  443. }
  444. /*
  445. * i8042_check_aux() applies as much paranoia as it can at detecting
  446. * the presence of an AUX interface.
  447. */
  448. static int __devinit i8042_check_aux(void)
  449. {
  450. int retval = -1;
  451. int irq_registered = 0;
  452. int aux_loop_broken = 0;
  453. unsigned long flags;
  454. unsigned char param;
  455. /*
  456. * Get rid of bytes in the queue.
  457. */
  458. i8042_flush();
  459. /*
  460. * Internal loopback test - filters out AT-type i8042's. Unfortunately
  461. * SiS screwed up and their 5597 doesn't support the LOOP command even
  462. * though it has an AUX port.
  463. */
  464. param = 0x5a;
  465. retval = i8042_command(&param, I8042_CMD_AUX_LOOP);
  466. if (retval || param != 0x5a) {
  467. /*
  468. * External connection test - filters out AT-soldered PS/2 i8042's
  469. * 0x00 - no error, 0x01-0x03 - clock/data stuck, 0xff - general error
  470. * 0xfa - no error on some notebooks which ignore the spec
  471. * Because it's common for chipsets to return error on perfectly functioning
  472. * AUX ports, we test for this only when the LOOP command failed.
  473. */
  474. if (i8042_command(&param, I8042_CMD_AUX_TEST) ||
  475. (param && param != 0xfa && param != 0xff))
  476. return -1;
  477. /*
  478. * If AUX_LOOP completed without error but returned unexpected data
  479. * mark it as broken
  480. */
  481. if (!retval)
  482. aux_loop_broken = 1;
  483. }
  484. /*
  485. * Bit assignment test - filters out PS/2 i8042's in AT mode
  486. */
  487. if (i8042_toggle_aux(0)) {
  488. printk(KERN_WARNING "Failed to disable AUX port, but continuing anyway... Is this a SiS?\n");
  489. printk(KERN_WARNING "If AUX port is really absent please use the 'i8042.noaux' option.\n");
  490. }
  491. if (i8042_toggle_aux(1))
  492. return -1;
  493. /*
  494. * Test AUX IRQ delivery to make sure BIOS did not grab the IRQ and
  495. * used it for a PCI card or somethig else.
  496. */
  497. if (i8042_noloop || aux_loop_broken) {
  498. /*
  499. * Without LOOP command we can't test AUX IRQ delivery. Assume the port
  500. * is working and hope we are right.
  501. */
  502. retval = 0;
  503. goto out;
  504. }
  505. if (request_irq(I8042_AUX_IRQ, i8042_aux_test_irq, IRQF_SHARED,
  506. "i8042", i8042_platform_device))
  507. goto out;
  508. irq_registered = 1;
  509. if (i8042_enable_aux_port())
  510. goto out;
  511. spin_lock_irqsave(&i8042_lock, flags);
  512. init_completion(&i8042_aux_irq_delivered);
  513. i8042_irq_being_tested = 1;
  514. param = 0xa5;
  515. retval = __i8042_command(&param, I8042_CMD_AUX_LOOP & 0xf0ff);
  516. spin_unlock_irqrestore(&i8042_lock, flags);
  517. if (retval)
  518. goto out;
  519. if (wait_for_completion_timeout(&i8042_aux_irq_delivered,
  520. msecs_to_jiffies(250)) == 0) {
  521. /*
  522. * AUX IRQ was never delivered so we need to flush the controller to
  523. * get rid of the byte we put there; otherwise keyboard may not work.
  524. */
  525. i8042_flush();
  526. retval = -1;
  527. }
  528. out:
  529. /*
  530. * Disable the interface.
  531. */
  532. i8042_ctr |= I8042_CTR_AUXDIS;
  533. i8042_ctr &= ~I8042_CTR_AUXINT;
  534. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
  535. retval = -1;
  536. if (irq_registered)
  537. free_irq(I8042_AUX_IRQ, i8042_platform_device);
  538. return retval;
  539. }
  540. static int i8042_controller_check(void)
  541. {
  542. if (i8042_flush() == I8042_BUFFER_SIZE) {
  543. printk(KERN_ERR "i8042.c: No controller found.\n");
  544. return -ENODEV;
  545. }
  546. return 0;
  547. }
  548. static int i8042_controller_selftest(void)
  549. {
  550. unsigned char param;
  551. if (!i8042_reset)
  552. return 0;
  553. if (i8042_command(&param, I8042_CMD_CTL_TEST)) {
  554. printk(KERN_ERR "i8042.c: i8042 controller self test timeout.\n");
  555. return -ENODEV;
  556. }
  557. if (param != I8042_RET_CTL_TEST) {
  558. printk(KERN_ERR "i8042.c: i8042 controller selftest failed. (%#x != %#x)\n",
  559. param, I8042_RET_CTL_TEST);
  560. return -EIO;
  561. }
  562. return 0;
  563. }
  564. /*
  565. * i8042_controller init initializes the i8042 controller, and,
  566. * most importantly, sets it into non-xlated mode if that's
  567. * desired.
  568. */
  569. static int i8042_controller_init(void)
  570. {
  571. unsigned long flags;
  572. /*
  573. * Save the CTR for restoral on unload / reboot.
  574. */
  575. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) {
  576. printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n");
  577. return -EIO;
  578. }
  579. i8042_initial_ctr = i8042_ctr;
  580. /*
  581. * Disable the keyboard interface and interrupt.
  582. */
  583. i8042_ctr |= I8042_CTR_KBDDIS;
  584. i8042_ctr &= ~I8042_CTR_KBDINT;
  585. /*
  586. * Handle keylock.
  587. */
  588. spin_lock_irqsave(&i8042_lock, flags);
  589. if (~i8042_read_status() & I8042_STR_KEYLOCK) {
  590. if (i8042_unlock)
  591. i8042_ctr |= I8042_CTR_IGNKEYLOCK;
  592. else
  593. printk(KERN_WARNING "i8042.c: Warning: Keylock active.\n");
  594. }
  595. spin_unlock_irqrestore(&i8042_lock, flags);
  596. /*
  597. * If the chip is configured into nontranslated mode by the BIOS, don't
  598. * bother enabling translating and be happy.
  599. */
  600. if (~i8042_ctr & I8042_CTR_XLATE)
  601. i8042_direct = 1;
  602. /*
  603. * Set nontranslated mode for the kbd interface if requested by an option.
  604. * After this the kbd interface becomes a simple serial in/out, like the aux
  605. * interface is. We don't do this by default, since it can confuse notebook
  606. * BIOSes.
  607. */
  608. if (i8042_direct)
  609. i8042_ctr &= ~I8042_CTR_XLATE;
  610. /*
  611. * Write CTR back.
  612. */
  613. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  614. printk(KERN_ERR "i8042.c: Can't write CTR while initializing i8042.\n");
  615. return -EIO;
  616. }
  617. return 0;
  618. }
  619. /*
  620. * Reset the controller and reset CRT to the original value set by BIOS.
  621. */
  622. static void i8042_controller_reset(void)
  623. {
  624. i8042_flush();
  625. /*
  626. * Disable both KBD and AUX interfaces so they don't get in the way
  627. */
  628. i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
  629. i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
  630. /*
  631. * Disable MUX mode if present.
  632. */
  633. if (i8042_mux_present)
  634. i8042_set_mux_mode(0, NULL);
  635. /*
  636. * Reset the controller if requested.
  637. */
  638. i8042_controller_selftest();
  639. /*
  640. * Restore the original control register setting.
  641. */
  642. if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR))
  643. printk(KERN_WARNING "i8042.c: Can't restore CTR.\n");
  644. }
  645. /*
  646. * i8042_panic_blink() will flash the keyboard LEDs and is called when
  647. * kernel panics. Flashing LEDs is useful for users running X who may
  648. * not see the console and will help distingushing panics from "real"
  649. * lockups.
  650. *
  651. * Note that DELAY has a limit of 10ms so we will not get stuck here
  652. * waiting for KBC to free up even if KBD interrupt is off
  653. */
  654. #define DELAY do { mdelay(1); if (++delay > 10) return delay; } while(0)
  655. static long i8042_panic_blink(long count)
  656. {
  657. long delay = 0;
  658. static long last_blink;
  659. static char led;
  660. /*
  661. * We expect frequency to be about 1/2s. KDB uses about 1s.
  662. * Make sure they are different.
  663. */
  664. if (!i8042_blink_frequency)
  665. return 0;
  666. if (count - last_blink < i8042_blink_frequency)
  667. return 0;
  668. led ^= 0x01 | 0x04;
  669. while (i8042_read_status() & I8042_STR_IBF)
  670. DELAY;
  671. dbg("%02x -> i8042 (panic blink)", 0xed);
  672. i8042_suppress_kbd_ack = 2;
  673. i8042_write_data(0xed); /* set leds */
  674. DELAY;
  675. while (i8042_read_status() & I8042_STR_IBF)
  676. DELAY;
  677. DELAY;
  678. dbg("%02x -> i8042 (panic blink)", led);
  679. i8042_write_data(led);
  680. DELAY;
  681. last_blink = count;
  682. return delay;
  683. }
  684. #undef DELAY
  685. #ifdef CONFIG_PM
  686. /*
  687. * Here we try to restore the original BIOS settings. We only want to
  688. * do that once, when we really suspend, not when we taking memory
  689. * snapshot for swsusp (in this case we'll perform required cleanup
  690. * as part of shutdown process).
  691. */
  692. static int i8042_suspend(struct platform_device *dev, pm_message_t state)
  693. {
  694. if (dev->dev.power.power_state.event != state.event) {
  695. if (state.event == PM_EVENT_SUSPEND)
  696. i8042_controller_reset();
  697. dev->dev.power.power_state = state;
  698. }
  699. return 0;
  700. }
  701. /*
  702. * Here we try to reset everything back to a state in which suspended
  703. */
  704. static int i8042_resume(struct platform_device *dev)
  705. {
  706. int error;
  707. /*
  708. * Do not bother with restoring state if we haven't suspened yet
  709. */
  710. if (dev->dev.power.power_state.event == PM_EVENT_ON)
  711. return 0;
  712. error = i8042_controller_check();
  713. if (error)
  714. return error;
  715. error = i8042_controller_selftest();
  716. if (error)
  717. return error;
  718. /*
  719. * Restore original CTR value and disable all ports
  720. */
  721. i8042_ctr = i8042_initial_ctr;
  722. if (i8042_direct)
  723. i8042_ctr &= ~I8042_CTR_XLATE;
  724. i8042_ctr |= I8042_CTR_AUXDIS | I8042_CTR_KBDDIS;
  725. i8042_ctr &= ~(I8042_CTR_AUXINT | I8042_CTR_KBDINT);
  726. if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) {
  727. printk(KERN_ERR "i8042: Can't write CTR to resume\n");
  728. return -EIO;
  729. }
  730. if (i8042_mux_present) {
  731. if (i8042_set_mux_mode(1, NULL) || i8042_enable_mux_ports())
  732. printk(KERN_WARNING
  733. "i8042: failed to resume active multiplexor, "
  734. "mouse won't work.\n");
  735. } else if (i8042_ports[I8042_AUX_PORT_NO].serio)
  736. i8042_enable_aux_port();
  737. if (i8042_ports[I8042_KBD_PORT_NO].serio)
  738. i8042_enable_kbd_port();
  739. i8042_interrupt(0, NULL);
  740. dev->dev.power.power_state = PMSG_ON;
  741. return 0;
  742. }
  743. #endif /* CONFIG_PM */
  744. /*
  745. * We need to reset the 8042 back to original mode on system shutdown,
  746. * because otherwise BIOSes will be confused.
  747. */
  748. static void i8042_shutdown(struct platform_device *dev)
  749. {
  750. i8042_controller_reset();
  751. }
  752. static int __devinit i8042_create_kbd_port(void)
  753. {
  754. struct serio *serio;
  755. struct i8042_port *port = &i8042_ports[I8042_KBD_PORT_NO];
  756. serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
  757. if (!serio)
  758. return -ENOMEM;
  759. serio->id.type = i8042_direct ? SERIO_8042 : SERIO_8042_XL;
  760. serio->write = i8042_dumbkbd ? NULL : i8042_kbd_write;
  761. serio->start = i8042_start;
  762. serio->stop = i8042_stop;
  763. serio->port_data = port;
  764. serio->dev.parent = &i8042_platform_device->dev;
  765. strlcpy(serio->name, "i8042 KBD port", sizeof(serio->name));
  766. strlcpy(serio->phys, I8042_KBD_PHYS_DESC, sizeof(serio->phys));
  767. port->serio = serio;
  768. port->irq = I8042_KBD_IRQ;
  769. return 0;
  770. }
  771. static int __devinit i8042_create_aux_port(int idx)
  772. {
  773. struct serio *serio;
  774. int port_no = idx < 0 ? I8042_AUX_PORT_NO : I8042_MUX_PORT_NO + idx;
  775. struct i8042_port *port = &i8042_ports[port_no];
  776. serio = kzalloc(sizeof(struct serio), GFP_KERNEL);
  777. if (!serio)
  778. return -ENOMEM;
  779. serio->id.type = SERIO_8042;
  780. serio->write = i8042_aux_write;
  781. serio->start = i8042_start;
  782. serio->stop = i8042_stop;
  783. serio->port_data = port;
  784. serio->dev.parent = &i8042_platform_device->dev;
  785. if (idx < 0) {
  786. strlcpy(serio->name, "i8042 AUX port", sizeof(serio->name));
  787. strlcpy(serio->phys, I8042_AUX_PHYS_DESC, sizeof(serio->phys));
  788. } else {
  789. snprintf(serio->name, sizeof(serio->name), "i8042 AUX%d port", idx);
  790. snprintf(serio->phys, sizeof(serio->phys), I8042_MUX_PHYS_DESC, idx + 1);
  791. }
  792. port->serio = serio;
  793. port->mux = idx;
  794. port->irq = I8042_AUX_IRQ;
  795. return 0;
  796. }
  797. static void __devinit i8042_free_kbd_port(void)
  798. {
  799. kfree(i8042_ports[I8042_KBD_PORT_NO].serio);
  800. i8042_ports[I8042_KBD_PORT_NO].serio = NULL;
  801. }
  802. static void __devinit i8042_free_aux_ports(void)
  803. {
  804. int i;
  805. for (i = I8042_AUX_PORT_NO; i < I8042_NUM_PORTS; i++) {
  806. kfree(i8042_ports[i].serio);
  807. i8042_ports[i].serio = NULL;
  808. }
  809. }
  810. static void __devinit i8042_register_ports(void)
  811. {
  812. int i;
  813. for (i = 0; i < I8042_NUM_PORTS; i++) {
  814. if (i8042_ports[i].serio) {
  815. printk(KERN_INFO "serio: %s at %#lx,%#lx irq %d\n",
  816. i8042_ports[i].serio->name,
  817. (unsigned long) I8042_DATA_REG,
  818. (unsigned long) I8042_COMMAND_REG,
  819. i8042_ports[i].irq);
  820. serio_register_port(i8042_ports[i].serio);
  821. }
  822. }
  823. }
  824. static void __devinit i8042_unregister_ports(void)
  825. {
  826. int i;
  827. for (i = 0; i < I8042_NUM_PORTS; i++) {
  828. if (i8042_ports[i].serio) {
  829. serio_unregister_port(i8042_ports[i].serio);
  830. i8042_ports[i].serio = NULL;
  831. }
  832. }
  833. }
  834. static void i8042_free_irqs(void)
  835. {
  836. if (i8042_aux_irq_registered)
  837. free_irq(I8042_AUX_IRQ, i8042_platform_device);
  838. if (i8042_kbd_irq_registered)
  839. free_irq(I8042_KBD_IRQ, i8042_platform_device);
  840. i8042_aux_irq_registered = i8042_kbd_irq_registered = 0;
  841. }
  842. static int __devinit i8042_setup_aux(void)
  843. {
  844. int (*aux_enable)(void);
  845. int error;
  846. int i;
  847. if (i8042_check_aux())
  848. return -ENODEV;
  849. if (i8042_nomux || i8042_check_mux()) {
  850. error = i8042_create_aux_port(-1);
  851. if (error)
  852. goto err_free_ports;
  853. aux_enable = i8042_enable_aux_port;
  854. } else {
  855. for (i = 0; i < I8042_NUM_MUX_PORTS; i++) {
  856. error = i8042_create_aux_port(i);
  857. if (error)
  858. goto err_free_ports;
  859. }
  860. aux_enable = i8042_enable_mux_ports;
  861. }
  862. error = request_irq(I8042_AUX_IRQ, i8042_interrupt, IRQF_SHARED,
  863. "i8042", i8042_platform_device);
  864. if (error)
  865. goto err_free_ports;
  866. if (aux_enable())
  867. goto err_free_irq;
  868. i8042_aux_irq_registered = 1;
  869. return 0;
  870. err_free_irq:
  871. free_irq(I8042_AUX_IRQ, i8042_platform_device);
  872. err_free_ports:
  873. i8042_free_aux_ports();
  874. return error;
  875. }
  876. static int __devinit i8042_setup_kbd(void)
  877. {
  878. int error;
  879. error = i8042_create_kbd_port();
  880. if (error)
  881. return error;
  882. error = request_irq(I8042_KBD_IRQ, i8042_interrupt, IRQF_SHARED,
  883. "i8042", i8042_platform_device);
  884. if (error)
  885. goto err_free_port;
  886. error = i8042_enable_kbd_port();
  887. if (error)
  888. goto err_free_irq;
  889. i8042_kbd_irq_registered = 1;
  890. return 0;
  891. err_free_irq:
  892. free_irq(I8042_KBD_IRQ, i8042_platform_device);
  893. err_free_port:
  894. i8042_free_kbd_port();
  895. return error;
  896. }
  897. static int __devinit i8042_probe(struct platform_device *dev)
  898. {
  899. int error;
  900. error = i8042_controller_selftest();
  901. if (error)
  902. return error;
  903. error = i8042_controller_init();
  904. if (error)
  905. return error;
  906. if (!i8042_noaux) {
  907. error = i8042_setup_aux();
  908. if (error && error != -ENODEV && error != -EBUSY)
  909. goto out_fail;
  910. }
  911. if (!i8042_nokbd) {
  912. error = i8042_setup_kbd();
  913. if (error)
  914. goto out_fail;
  915. }
  916. /*
  917. * Ok, everything is ready, let's register all serio ports
  918. */
  919. i8042_register_ports();
  920. return 0;
  921. out_fail:
  922. i8042_free_aux_ports(); /* in case KBD failed but AUX not */
  923. i8042_free_irqs();
  924. i8042_controller_reset();
  925. return error;
  926. }
  927. static int __devexit i8042_remove(struct platform_device *dev)
  928. {
  929. i8042_unregister_ports();
  930. i8042_free_irqs();
  931. i8042_controller_reset();
  932. return 0;
  933. }
  934. static struct platform_driver i8042_driver = {
  935. .driver = {
  936. .name = "i8042",
  937. .owner = THIS_MODULE,
  938. },
  939. .probe = i8042_probe,
  940. .remove = __devexit_p(i8042_remove),
  941. .shutdown = i8042_shutdown,
  942. #ifdef CONFIG_PM
  943. .suspend = i8042_suspend,
  944. .resume = i8042_resume,
  945. #endif
  946. };
  947. static int __init i8042_init(void)
  948. {
  949. int err;
  950. dbg_init();
  951. err = i8042_platform_init();
  952. if (err)
  953. return err;
  954. err = i8042_controller_check();
  955. if (err)
  956. goto err_platform_exit;
  957. err = platform_driver_register(&i8042_driver);
  958. if (err)
  959. goto err_platform_exit;
  960. i8042_platform_device = platform_device_alloc("i8042", -1);
  961. if (!i8042_platform_device) {
  962. err = -ENOMEM;
  963. goto err_unregister_driver;
  964. }
  965. err = platform_device_add(i8042_platform_device);
  966. if (err)
  967. goto err_free_device;
  968. panic_blink = i8042_panic_blink;
  969. return 0;
  970. err_free_device:
  971. platform_device_put(i8042_platform_device);
  972. err_unregister_driver:
  973. platform_driver_unregister(&i8042_driver);
  974. err_platform_exit:
  975. i8042_platform_exit();
  976. return err;
  977. }
  978. static void __exit i8042_exit(void)
  979. {
  980. platform_device_unregister(i8042_platform_device);
  981. platform_driver_unregister(&i8042_driver);
  982. i8042_platform_exit();
  983. panic_blink = NULL;
  984. }
  985. module_init(i8042_init);
  986. module_exit(i8042_exit);